From bec4faebb9d54c28c1a0b65b3761296dfccf984f Mon Sep 17 00:00:00 2001 From: Jakub Zymelka Date: Thu, 28 Mar 2024 17:38:16 +0100 Subject: [PATCH] snippets: Add nRF54L15 FLPR core snippets Add snippets to boot nRF54L15 FLPR from application core. Signed-off-by: Jakub Zymelka --- snippets/nordic-flpr-xip/README.rst | 12 ++++++ .../nrf54l15pdk_nrf54l15_cpuapp.overlay | 25 ++++++++++++ .../nordic-flpr-xip/nordic-flpr-xip.overlay | 12 ++++++ snippets/nordic-flpr-xip/snippet.yml | 8 ++++ snippets/nordic-flpr/README.rst | 12 ++++++ .../nrf54l15pdk_nrf54l15_cpuapp.overlay | 39 +++++++++++++++++++ snippets/nordic-flpr/nordic-flpr.overlay | 12 ++++++ snippets/nordic-flpr/snippet.yml | 8 ++++ 8 files changed, 128 insertions(+) create mode 100644 snippets/nordic-flpr-xip/README.rst create mode 100644 snippets/nordic-flpr-xip/boards/nrf54l15pdk_nrf54l15_cpuapp.overlay create mode 100644 snippets/nordic-flpr-xip/nordic-flpr-xip.overlay create mode 100644 snippets/nordic-flpr-xip/snippet.yml create mode 100644 snippets/nordic-flpr/README.rst create mode 100644 snippets/nordic-flpr/boards/nrf54l15pdk_nrf54l15_cpuapp.overlay create mode 100644 snippets/nordic-flpr/nordic-flpr.overlay create mode 100644 snippets/nordic-flpr/snippet.yml diff --git a/snippets/nordic-flpr-xip/README.rst b/snippets/nordic-flpr-xip/README.rst new file mode 100644 index 00000000000000..1f7061e85df996 --- /dev/null +++ b/snippets/nordic-flpr-xip/README.rst @@ -0,0 +1,12 @@ +.. _nordic-flpr-xip: + +Nordic FLPR snippet with execution in place (nordic-flpr-xip) +############################################################# + +Overview +******** + +This snippet allows users to build Zephyr with the capability to boot Nordic FLPR +(Fast Lightweight Peripheral Processor) from application core. +FLPR code is to be executed from RRAM, so the FLPR image must be built +for the ``xip`` board variant, or with :kconfig:option:`CONFIG_XIP` enabled. diff --git a/snippets/nordic-flpr-xip/boards/nrf54l15pdk_nrf54l15_cpuapp.overlay b/snippets/nordic-flpr-xip/boards/nrf54l15pdk_nrf54l15_cpuapp.overlay new file mode 100644 index 00000000000000..c473c27c3190f1 --- /dev/null +++ b/snippets/nordic-flpr-xip/boards/nrf54l15pdk_nrf54l15_cpuapp.overlay @@ -0,0 +1,25 @@ +/* + * Copyright (c) 2024 Nordic Semiconductor + * SPDX-License-Identifier: Apache-2.0 + */ + +/ { + soc { + reserved-memory { + #address-cells = <1>; + #size-cells = <1>; + cpuflpr_code_partition: image@165000 { + /* FLPR core code partition */ + reg = <0x165000 DT_SIZE_K(96)>; + }; + }; + }; +}; + +&uart30 { + status = "reserved"; +}; + +&cpuflpr_vpr { + execution-memory = <&cpuflpr_code_partition>; +}; diff --git a/snippets/nordic-flpr-xip/nordic-flpr-xip.overlay b/snippets/nordic-flpr-xip/nordic-flpr-xip.overlay new file mode 100644 index 00000000000000..fc5e048ad5d180 --- /dev/null +++ b/snippets/nordic-flpr-xip/nordic-flpr-xip.overlay @@ -0,0 +1,12 @@ +/* + * Copyright (c) 2024 Nordic Semiconductor + * SPDX-License-Identifier: Apache-2.0 + */ + +&cpuflpr_vpr { + status = "okay"; +}; + +&cpuflpr_vevif_remote { + status = "okay"; +}; diff --git a/snippets/nordic-flpr-xip/snippet.yml b/snippets/nordic-flpr-xip/snippet.yml new file mode 100644 index 00000000000000..d7ca9c25a232d7 --- /dev/null +++ b/snippets/nordic-flpr-xip/snippet.yml @@ -0,0 +1,8 @@ +name: nordic-flpr-xip +append: + EXTRA_DTC_OVERLAY_FILE: nordic-flpr-xip.overlay + +boards: + nrf54l15pdk/nrf54l15/cpuapp: + append: + EXTRA_DTC_OVERLAY_FILE: boards/nrf54l15pdk_nrf54l15_cpuapp.overlay diff --git a/snippets/nordic-flpr/README.rst b/snippets/nordic-flpr/README.rst new file mode 100644 index 00000000000000..eb5198561244aa --- /dev/null +++ b/snippets/nordic-flpr/README.rst @@ -0,0 +1,12 @@ +.. _nordic-flpr: + +Nordic FLPR snippet with execution from SRAM (nordic-flpr) +########################################################## + +Overview +******** + +This snippet allows users to build Zephyr with the capability to boot Nordic FLPR +(Fast Lightweight Peripheral Processor) from application core. +FLPR code is to be executed from SRAM, so the FLPR image must be built +without the ``xip`` board variant, or with :kconfig:option:`CONFIG_XIP` disabled. diff --git a/snippets/nordic-flpr/boards/nrf54l15pdk_nrf54l15_cpuapp.overlay b/snippets/nordic-flpr/boards/nrf54l15pdk_nrf54l15_cpuapp.overlay new file mode 100644 index 00000000000000..84d6b71b0475b8 --- /dev/null +++ b/snippets/nordic-flpr/boards/nrf54l15pdk_nrf54l15_cpuapp.overlay @@ -0,0 +1,39 @@ +/* + * Copyright (c) 2024 Nordic Semiconductor + * SPDX-License-Identifier: Apache-2.0 + */ + +/ { + soc { + reserved-memory { + #address-cells = <1>; + #size-cells = <1>; + cpuflpr_code_partition: image@165000 { + /* FLPR core code partition */ + reg = <0x165000 DT_SIZE_K(96)>; + }; + }; + + cpuflpr_sram_code_data: memory@20028000 { + compatible = "mmio-sram"; + reg = <0x20028000 DT_SIZE_K(96)>; + #address-cells = <1>; + #size-cells = <1>; + ranges = <0x0 0x20028000 0x18000>; + }; + }; +}; + +&uart30 { + status = "reserved"; +}; + +&cpuapp_sram { + reg = <0x20000000 DT_SIZE_K(160)>; + ranges = <0x0 0x20000000 0x28000>; +}; + +&cpuflpr_vpr { + execution-memory = <&cpuflpr_sram_code_data>; + source-memory = <&cpuflpr_code_partition>; +}; diff --git a/snippets/nordic-flpr/nordic-flpr.overlay b/snippets/nordic-flpr/nordic-flpr.overlay new file mode 100644 index 00000000000000..fc5e048ad5d180 --- /dev/null +++ b/snippets/nordic-flpr/nordic-flpr.overlay @@ -0,0 +1,12 @@ +/* + * Copyright (c) 2024 Nordic Semiconductor + * SPDX-License-Identifier: Apache-2.0 + */ + +&cpuflpr_vpr { + status = "okay"; +}; + +&cpuflpr_vevif_remote { + status = "okay"; +}; diff --git a/snippets/nordic-flpr/snippet.yml b/snippets/nordic-flpr/snippet.yml new file mode 100644 index 00000000000000..e214067145fd3d --- /dev/null +++ b/snippets/nordic-flpr/snippet.yml @@ -0,0 +1,8 @@ +name: nordic-flpr +append: + EXTRA_DTC_OVERLAY_FILE: nordic-flpr.overlay + +boards: + nrf54l15pdk/nrf54l15/cpuapp: + append: + EXTRA_DTC_OVERLAY_FILE: boards/nrf54l15pdk_nrf54l15_cpuapp.overlay