diff --git a/boards/nordic/nrf54l15dk/Kconfig.defconfig b/boards/nordic/nrf54l15dk/Kconfig.defconfig index 2b753df35151b73..cbb822eec9c8a4a 100644 --- a/boards/nordic/nrf54l15dk/Kconfig.defconfig +++ b/boards/nordic/nrf54l15dk/Kconfig.defconfig @@ -1,7 +1,8 @@ # Copyright (c) 2024 Nordic Semiconductor ASA # SPDX-License-Identifier: Apache-2.0 -if BOARD_NRF54L15DK_NRF54L15_CPUAPP +if BOARD_NRF54L15DK_NRF54L05_CPUAPP || BOARD_NRF54L15DK_NRF54L10_CPUAPP || \ + BOARD_NRF54L15DK_NRF54L15_CPUAPP config BT_CTLR default BT @@ -9,4 +10,5 @@ config BT_CTLR config ROM_START_OFFSET default 0x800 if BOOTLOADER_MCUBOOT -endif # BOARD_NRF54L15DK_NRF54L15_CPUAPP +endif # BOARD_NRF54L15DK_NRF54L05_CPUAPP || BOARD_NRF54L15DK_NRF54L10_CPUAPP || \ + # BOARD_NRF54L15DK_NRF54L15_CPUAPP diff --git a/boards/nordic/nrf54l15dk/Kconfig.nrf54l15dk b/boards/nordic/nrf54l15dk/Kconfig.nrf54l15dk index e385ef84f8917a4..25472cfff6c4741 100644 --- a/boards/nordic/nrf54l15dk/Kconfig.nrf54l15dk +++ b/boards/nordic/nrf54l15dk/Kconfig.nrf54l15dk @@ -2,6 +2,8 @@ # SPDX-License-Identifier: Apache-2.0 config BOARD_NRF54L15DK + select SOC_NRF54L05_CPUAPP if BOARD_NRF54L15DK_NRF54L05_CPUAPP + select SOC_NRF54L10_CPUAPP if BOARD_NRF54L15DK_NRF54L10_CPUAPP select SOC_NRF54L15_CPUAPP if BOARD_NRF54L15DK_NRF54L15_CPUAPP select SOC_NRF54L15_CPUFLPR if BOARD_NRF54L15DK_NRF54L15_CPUFLPR || \ BOARD_NRF54L15DK_NRF54L15_CPUFLPR_XIP diff --git a/boards/nordic/nrf54l15dk/board.yml b/boards/nordic/nrf54l15dk/board.yml index 8d750b3d14b9ec9..f1a873cc35f42d5 100644 --- a/boards/nordic/nrf54l15dk/board.yml +++ b/boards/nordic/nrf54l15dk/board.yml @@ -3,6 +3,8 @@ board: full_name: nRF54L15 DK vendor: nordic socs: + - name: nrf54l05 + - name: nrf54l10 - name: nrf54l15 variants: - name: xip diff --git a/boards/nordic/nrf54l15dk/nrf54l15dk_common.dtsi b/boards/nordic/nrf54l15dk/nrf54l15dk_common.dtsi index 02170276476afd1..33cfebb55d6e687 100644 --- a/boards/nordic/nrf54l15dk/nrf54l15dk_common.dtsi +++ b/boards/nordic/nrf54l15dk/nrf54l15dk_common.dtsi @@ -4,7 +4,7 @@ * SPDX-License-Identifier: Apache-2.0 */ -#include "nrf54l15dk_nrf54l15-pinctrl.dtsi" +#include "nrf54l15dk_nrf54l_05_10_15-pinctrl.dtsi" / { leds { diff --git a/boards/nordic/nrf54l15dk/nrf54l15dk_nrf54l05_cpuapp.dts b/boards/nordic/nrf54l15dk/nrf54l15dk_nrf54l05_cpuapp.dts new file mode 100644 index 000000000000000..e2215ce129491f1 --- /dev/null +++ b/boards/nordic/nrf54l15dk/nrf54l15dk_nrf54l05_cpuapp.dts @@ -0,0 +1,63 @@ +/* + * Copyright (c) 2024 Nordic Semiconductor ASA + * + * SPDX-License-Identifier: Apache-2.0 + */ + +/dts-v1/; + +#include +#include "nrf54l_05_10_15_cpuapp_common.dtsi" + +/ { + compatible = "nordic,nrf54l15dk_nrf54l05-cpuapp"; + model = "Nordic nRF54L15 DK nRF54L05 Application MCU"; + + chosen { + zephyr,code-partition = &slot0_partition; + zephyr,sram = &cpuapp_sram; + }; +}; + +/* FLPR not supported yet, give all SRAM and RRAM to the APP core */ +&cpuapp_sram { + reg = <0x20000000 DT_SIZE_K(96)>; + ranges = <0x0 0x20000000 DT_SIZE_K(96)>; +}; + +&cpuapp_rram { + reg = <0x0 DT_SIZE_K(500)>; +}; + +/* These partition sizes assume no FLPR area in RRAM */ +&cpuapp_rram { + partitions { + compatible = "fixed-partitions"; + #address-cells = <1>; + #size-cells = <1>; + boot_partition: partition@0 { + label = "mcuboot"; + reg = <0x0 DT_SIZE_K(64)>; + }; + slot0_partition: partition@10000 { + label = "image-0"; + reg = <0x10000 DT_SIZE_K(100)>; + }; + slot0_ns_partition: partition@29000 { + label = "image-0-nonsecure"; + reg = <0x29000 DT_SIZE_K(100)>; + }; + slot1_partition: partition@42000 { + label = "image-1"; + reg = <0x42000 DT_SIZE_K(100)>; + }; + slot1_ns_partition: partition@5b000 { + label = "image-1-nonsecure"; + reg = <0x5b000 DT_SIZE_K(100)>; + }; + storage_partition: partition@74000 { + label = "storage"; + reg = <0x74000 DT_SIZE_K(36)>; + }; + }; +}; diff --git a/boards/nordic/nrf54l15dk/nrf54l15dk_nrf54l05_cpuapp.yaml b/boards/nordic/nrf54l15dk/nrf54l15dk_nrf54l05_cpuapp.yaml new file mode 100644 index 000000000000000..0c451b19a2efd0e --- /dev/null +++ b/boards/nordic/nrf54l15dk/nrf54l15dk_nrf54l05_cpuapp.yaml @@ -0,0 +1,24 @@ +# Copyright (c) 2024 Nordic Semiconductor ASA +# SPDX-License-Identifier: Apache-2.0 + +identifier: nrf54l15dk/nrf54l05/cpuapp +name: nRF54L15-DK-nRF54L05-Application +type: mcu +arch: arm +toolchain: + - gnuarmemb + - xtools + - zephyr +sysbuild: true +ram: 96 +flash: 100 +supported: + - adc + - counter + - gpio + - i2c + - pwm + - retained_mem + - spi + - watchdog + - i2s diff --git a/boards/nordic/nrf54l15dk/nrf54l15dk_nrf54l05_cpuapp_defconfig b/boards/nordic/nrf54l15dk/nrf54l15dk_nrf54l05_cpuapp_defconfig new file mode 100644 index 000000000000000..02796a1361ef916 --- /dev/null +++ b/boards/nordic/nrf54l15dk/nrf54l15dk_nrf54l05_cpuapp_defconfig @@ -0,0 +1,29 @@ +# Copyright (c) 2024 Nordic Semiconductor ASA +# SPDX-License-Identifier: Apache-2.0 + +# Enable UART driver +CONFIG_SERIAL=y + +# Enable console +CONFIG_CONSOLE=y +CONFIG_UART_CONSOLE=y + +# Enable GPIO +CONFIG_GPIO=y + +# Enable MPU +CONFIG_ARM_MPU=y + +# Enable hardware stack protection +CONFIG_HW_STACK_PROTECTION=y + +# MPU-based null-pointer dereferencing detection cannot +# be applied as the (0x0 - 0x400) is unmapped for this target. +CONFIG_NULL_POINTER_EXCEPTION_DETECTION_NONE=y + +# Enable Cache +CONFIG_CACHE_MANAGEMENT=y +CONFIG_EXTERNAL_CACHE=y + +# Start SYSCOUNTER on driver init +CONFIG_NRF_GRTC_START_SYSCOUNTER=y diff --git a/boards/nordic/nrf54l15dk/nrf54l15dk_nrf54l10_cpuapp.dts b/boards/nordic/nrf54l15dk/nrf54l15dk_nrf54l10_cpuapp.dts new file mode 100644 index 000000000000000..1ae6be3e9e9c095 --- /dev/null +++ b/boards/nordic/nrf54l15dk/nrf54l15dk_nrf54l10_cpuapp.dts @@ -0,0 +1,63 @@ +/* + * Copyright (c) 2024 Nordic Semiconductor ASA + * + * SPDX-License-Identifier: Apache-2.0 + */ + +/dts-v1/; + +#include +#include "nrf54l_05_10_15_cpuapp_common.dtsi" + +/ { + compatible = "nordic,nrf54l15dk_nrf54l10-cpuapp"; + model = "Nordic nRF54L15 DK nRF54L10 Application MCU"; + + chosen { + zephyr,code-partition = &slot0_partition; + zephyr,sram = &cpuapp_sram; + }; +}; + +/* FLPR not supported yet, give all SRAM and RRAM to the APP core */ +&cpuapp_sram { + reg = <0x20000000 DT_SIZE_K(192)>; + ranges = <0x0 0x20000000 DT_SIZE_K(192)>; +}; + +&cpuapp_rram { + reg = <0x0 DT_SIZE_K(1022)>; +}; + +/* These partition sizes assume no FLPR area in RRAM */ +&cpuapp_rram { + partitions { + compatible = "fixed-partitions"; + #address-cells = <1>; + #size-cells = <1>; + boot_partition: partition@0 { + label = "mcuboot"; + reg = <0x0 DT_SIZE_K(64)>; + }; + slot0_partition: partition@10000 { + label = "image-0"; + reg = <0x10000 DT_SIZE_K(230)>; + }; + slot0_ns_partition: partition@49800 { + label = "image-0-nonsecure"; + reg = <0x49800 DT_SIZE_K(230)>; + }; + slot1_partition: partition@83000 { + label = "image-1"; + reg = <0x83000 DT_SIZE_K(230)>; + }; + slot1_ns_partition: partition@bc800 { + label = "image-1-nonsecure"; + reg = <0xbc800 DT_SIZE_K(230)>; + }; + storage_partition: partition@f6000 { + label = "storage"; + reg = <0xf6000 DT_SIZE_K(38)>; + }; + }; +}; diff --git a/boards/nordic/nrf54l15dk/nrf54l15dk_nrf54l10_cpuapp.yaml b/boards/nordic/nrf54l15dk/nrf54l15dk_nrf54l10_cpuapp.yaml new file mode 100644 index 000000000000000..63afb059b93610d --- /dev/null +++ b/boards/nordic/nrf54l15dk/nrf54l15dk_nrf54l10_cpuapp.yaml @@ -0,0 +1,24 @@ +# Copyright (c) 2024 Nordic Semiconductor ASA +# SPDX-License-Identifier: Apache-2.0 + +identifier: nrf54l15dk/nrf54l10/cpuapp +name: nRF54L15-DK-nRF54L10-Application +type: mcu +arch: arm +toolchain: + - gnuarmemb + - xtools + - zephyr +sysbuild: true +ram: 192 +flash: 230 +supported: + - adc + - counter + - gpio + - i2c + - pwm + - retained_mem + - spi + - watchdog + - i2s diff --git a/boards/nordic/nrf54l15dk/nrf54l15dk_nrf54l10_cpuapp_defconfig b/boards/nordic/nrf54l15dk/nrf54l15dk_nrf54l10_cpuapp_defconfig new file mode 100644 index 000000000000000..02796a1361ef916 --- /dev/null +++ b/boards/nordic/nrf54l15dk/nrf54l15dk_nrf54l10_cpuapp_defconfig @@ -0,0 +1,29 @@ +# Copyright (c) 2024 Nordic Semiconductor ASA +# SPDX-License-Identifier: Apache-2.0 + +# Enable UART driver +CONFIG_SERIAL=y + +# Enable console +CONFIG_CONSOLE=y +CONFIG_UART_CONSOLE=y + +# Enable GPIO +CONFIG_GPIO=y + +# Enable MPU +CONFIG_ARM_MPU=y + +# Enable hardware stack protection +CONFIG_HW_STACK_PROTECTION=y + +# MPU-based null-pointer dereferencing detection cannot +# be applied as the (0x0 - 0x400) is unmapped for this target. +CONFIG_NULL_POINTER_EXCEPTION_DETECTION_NONE=y + +# Enable Cache +CONFIG_CACHE_MANAGEMENT=y +CONFIG_EXTERNAL_CACHE=y + +# Start SYSCOUNTER on driver init +CONFIG_NRF_GRTC_START_SYSCOUNTER=y diff --git a/boards/nordic/nrf54l15dk/nrf54l15dk_nrf54l15_cpuapp.dts b/boards/nordic/nrf54l15dk/nrf54l15dk_nrf54l15_cpuapp.dts index b71f55c5fb439dc..79b16bd41254ebe 100644 --- a/boards/nordic/nrf54l15dk/nrf54l15dk_nrf54l15_cpuapp.dts +++ b/boards/nordic/nrf54l15dk/nrf54l15dk_nrf54l15_cpuapp.dts @@ -6,7 +6,8 @@ /dts-v1/; -#include "nrf54l15_cpuapp_common.dtsi" +#include +#include "nrf54l_05_10_15_cpuapp_common.dtsi" / { compatible = "nordic,nrf54l15dk_nrf54l15-cpuapp"; @@ -17,3 +18,36 @@ zephyr,sram = &cpuapp_sram; }; }; + +&cpuapp_rram { + partitions { + compatible = "fixed-partitions"; + #address-cells = <1>; + #size-cells = <1>; + boot_partition: partition@0 { + label = "mcuboot"; + reg = <0x0 DT_SIZE_K(64)>; + }; + slot0_partition: partition@10000 { + label = "image-0"; + reg = <0x10000 DT_SIZE_K(324)>; + }; + slot0_ns_partition: partition@61000 { + label = "image-0-nonsecure"; + reg = <0x61000 DT_SIZE_K(324)>; + }; + slot1_partition: partition@b2000 { + label = "image-1"; + reg = <0xb2000 DT_SIZE_K(324)>; + }; + slot1_ns_partition: partition@103000 { + label = "image-1-nonsecure"; + reg = <0x103000 DT_SIZE_K(324)>; + }; + /* 32k from 0x154000 to 0x15bfff reserved for TF-M partitions */ + storage_partition: partition@15c000 { + label = "storage"; + reg = <0x15c000 DT_SIZE_K(36)>; + }; + }; +}; diff --git a/boards/nordic/nrf54l15dk/nrf54l15dk_nrf54l15-pinctrl.dtsi b/boards/nordic/nrf54l15dk/nrf54l15dk_nrf54l_05_10_15-pinctrl.dtsi similarity index 100% rename from boards/nordic/nrf54l15dk/nrf54l15dk_nrf54l15-pinctrl.dtsi rename to boards/nordic/nrf54l15dk/nrf54l15dk_nrf54l_05_10_15-pinctrl.dtsi diff --git a/boards/nordic/nrf54l15dk/nrf54l15_cpuapp_common.dtsi b/boards/nordic/nrf54l15dk/nrf54l_05_10_15_cpuapp_common.dtsi similarity index 70% rename from boards/nordic/nrf54l15dk/nrf54l15_cpuapp_common.dtsi rename to boards/nordic/nrf54l15dk/nrf54l_05_10_15_cpuapp_common.dtsi index f8714861936e4fa..323ebfd1a1b7fab 100644 --- a/boards/nordic/nrf54l15dk/nrf54l15_cpuapp_common.dtsi +++ b/boards/nordic/nrf54l15dk/nrf54l_05_10_15_cpuapp_common.dtsi @@ -6,7 +6,6 @@ /* This file is common to the secure and non-secure domain */ -#include #include "nrf54l15dk_common.dtsi" / { @@ -52,39 +51,6 @@ status = "okay"; }; -&cpuapp_rram { - partitions { - compatible = "fixed-partitions"; - #address-cells = <1>; - #size-cells = <1>; - boot_partition: partition@0 { - label = "mcuboot"; - reg = <0x0 DT_SIZE_K(64)>; - }; - slot0_partition: partition@10000 { - label = "image-0"; - reg = <0x10000 DT_SIZE_K(324)>; - }; - slot0_ns_partition: partition@61000 { - label = "image-0-nonsecure"; - reg = <0x61000 DT_SIZE_K(324)>; - }; - slot1_partition: partition@b2000 { - label = "image-1"; - reg = <0xb2000 DT_SIZE_K(324)>; - }; - slot1_ns_partition: partition@103000 { - label = "image-1-nonsecure"; - reg = <0x103000 DT_SIZE_K(324)>; - }; - /* 32k from 0x154000 to 0x15bfff reserved for TF-M partitions */ - storage_partition: partition@15c000 { - label = "storage"; - reg = <0x15c000 DT_SIZE_K(36)>; - }; - }; -}; - &uart20 { status = "okay"; };