diff --git a/.github/workflows/clang.yaml b/.github/workflows/clang.yaml index 4221babe2e5f6f1..0d97ecc8abcade1 100644 --- a/.github/workflows/clang.yaml +++ b/.github/workflows/clang.yaml @@ -107,13 +107,13 @@ jobs: export ZEPHYR_TOOLCHAIN_VARIANT=llvm # check if we need to run a full twister or not based on files changed - python3 ./scripts/ci/test_plan.py --platform ${{ matrix.platform }} -c origin/${BASE_REF}.. + python3 ./scripts/ci/test_plan.py --no-detailed-test-id --platform ${{ matrix.platform }} -c origin/${BASE_REF}.. # We can limit scope to just what has changed if [ -s testplan.json ]; then echo "report_needed=1" >> $GITHUB_OUTPUT # Full twister but with options based on changes - ./scripts/twister --force-color --inline-logs -M -N -v --load-tests testplan.json --retry-failed 2 + ./scripts/twister --no-detailed-test-id --force-color --inline-logs -M -N -v --load-tests testplan.json --retry-failed 2 else # if nothing is run, skip reporting step echo "report_needed=0" >> $GITHUB_OUTPUT diff --git a/.github/workflows/twister-prep.yaml b/.github/workflows/twister-prep.yaml index 9a1e183ad28806a..4c8b03a5418b69c 100644 --- a/.github/workflows/twister-prep.yaml +++ b/.github/workflows/twister-prep.yaml @@ -1,4 +1,4 @@ -name: Prep +name: Prepare For a Twister Run on: workflow_call: @@ -83,7 +83,7 @@ jobs: run: | export ZEPHYR_BASE=${PWD} export ZEPHYR_TOOLCHAIN_VARIANT=zephyr - python3 ./scripts/ci/test_plan.py -c origin/${BASE_REF}.. --pull-request -t $TESTS_PER_BUILDER + python3 ./scripts/ci/test_plan.py -c origin/${BASE_REF}.. --no-detailed-test-id --pull-request -t $TESTS_PER_BUILDER if [ -s .testplan ]; then cat .testplan >> $GITHUB_ENV else diff --git a/.github/workflows/twister-publish.yaml b/.github/workflows/twister-publish.yaml index 7e32b0762724ef6..f59a3edca3dbf55 100644 --- a/.github/workflows/twister-publish.yaml +++ b/.github/workflows/twister-publish.yaml @@ -5,7 +5,6 @@ on: workflows: ["Run tests with twister"] branches: - main - - v* types: - completed @@ -44,9 +43,11 @@ jobs: if [ "${{github.event.workflow_run.event}}" = "push" ]; then python3 ./scripts/ci/upload_test_results_es.py -r ${run_date} \ --run-attempt ${{github.run_attempt}} \ + --run-branch ${{github.ref_name}} \ --index zephyr-main-ci-push-1 artifacts/*/*/twister.json elif [ "${{github.event.workflow_run.event}}" = "schedule" ]; then python3 ./scripts/ci/upload_test_results_es.py -r ${run_date} \ --run-attempt ${{github.run_attempt}} \ + --run-branch ${{github.ref_name}} \ --index zephyr-main-ci-weekly-1 artifacts/*/*/twister.json fi diff --git a/.github/workflows/twister.yaml b/.github/workflows/twister.yaml index 1d863c7c6908013..0fa810b3dd76548 100644 --- a/.github/workflows/twister.yaml +++ b/.github/workflows/twister.yaml @@ -44,8 +44,8 @@ jobs: CCACHE_IGNOREOPTIONS: '-specs=* --specs=*' BSIM_OUT_PATH: /opt/bsim/ BSIM_COMPONENTS_PATH: /opt/bsim/components - TWISTER_COMMON: ' --force-color --inline-logs -v -N -M --retry-failed 3 --timeout-multiplier 2 ' - DAILY_OPTIONS: ' -M --build-only --all --show-footprint' + TWISTER_COMMON: '--no-detailed-test-id --force-color --inline-logs -v -N -M --retry-failed 3 --timeout-multiplier 2 ' + WEEKLY_OPTIONS: ' -M --build-only --all --show-footprint --report-filtered' PR_OPTIONS: ' --clobber-output --integration' PUSH_OPTIONS: ' --clobber-output -M --show-footprint --report-filtered' COMMIT_RANGE: ${{ github.event.pull_request.base.sha }}..${{ github.event.pull_request.head.sha }} @@ -148,7 +148,7 @@ jobs: rm -f testplan.json export ZEPHYR_BASE=${PWD} export ZEPHYR_TOOLCHAIN_VARIANT=zephyr - python3 ./scripts/ci/test_plan.py -c origin/${BASE_REF}.. --pull-request + python3 ./scripts/ci/test_plan.py -c origin/${BASE_REF}.. --pull-request --no-detailed-test-id ./scripts/twister --subset ${{matrix.subset}}/${{ strategy.job-total }} --load-tests testplan.json ${TWISTER_COMMON} ${PR_OPTIONS} if [ "${{matrix.subset}}" = "1" -a ${{needs.twister-build-prep.outputs.fullrun}} = 'True' ]; then ./scripts/zephyr_module.py --twister-out module_tests.args @@ -163,11 +163,11 @@ jobs: run: | export ZEPHYR_BASE=${PWD} export ZEPHYR_TOOLCHAIN_VARIANT=zephyr - ./scripts/twister --subset ${{matrix.subset}}/${{ strategy.job-total }} ${TWISTER_COMMON} ${DAILY_OPTIONS} + ./scripts/twister --subset ${{matrix.subset}}/${{ strategy.job-total }} ${TWISTER_COMMON} ${WEEKLY_OPTIONS} if [ "${{matrix.subset}}" = "1" ]; then ./scripts/zephyr_module.py --twister-out module_tests.args if [ -s module_tests.args ]; then - ./scripts/twister +module_tests.args --outdir module_tests ${TWISTER_COMMON} ${DAILY_OPTIONS} + ./scripts/twister +module_tests.args --outdir module_tests ${TWISTER_COMMON} ${WEEKLY_OPTIONS} fi fi diff --git a/.ruff-excludes.toml b/.ruff-excludes.toml index f4dc91731367587..5b05d8ec83ffff2 100644 --- a/.ruff-excludes.toml +++ b/.ruff-excludes.toml @@ -231,12 +231,6 @@ "I001", # https://docs.astral.sh/ruff/rules/unsorted-imports "UP010", # https://docs.astral.sh/ruff/rules/unnecessary-future-import ] -"./samples/modules/thrift/hello/client/hello_client.py" = [ - "I001", # https://docs.astral.sh/ruff/rules/unsorted-imports -] -"./samples/net/cellular_modem/server/te.py" = [ - "I001", # https://docs.astral.sh/ruff/rules/unsorted-imports -] "./samples/net/cellular_modem/server/te_udp_echo.py" = [ "I001", # https://docs.astral.sh/ruff/rules/unsorted-imports "UP039", # https://docs.astral.sh/ruff/rules/unnecessary-class-parentheses @@ -245,28 +239,13 @@ "I001", # https://docs.astral.sh/ruff/rules/unsorted-imports "UP039", # https://docs.astral.sh/ruff/rules/unnecessary-class-parentheses ] -"./samples/net/cloud/aws_iot_mqtt/src/creds/convert_keys.py" = [ - "I001", # https://docs.astral.sh/ruff/rules/unsorted-imports -] "./samples/sensor/sensor_shell/pytest/test_sensor_shell.py" = [ "E501", # https://docs.astral.sh/ruff/rules/line-too-long ] -"./samples/subsys/profiling/perf/pytest/test_perf.py" = [ - "I001", # https://docs.astral.sh/ruff/rules/unsorted-imports -] -"./samples/subsys/testsuite/pytest/basic/pytest/conftest.py" = [ - "I001", # https://docs.astral.sh/ruff/rules/unsorted-imports -] "./samples/subsys/testsuite/pytest/basic/pytest/test_sample.py" = [ "I001", # https://docs.astral.sh/ruff/rules/unsorted-imports "SIM112", # https://docs.astral.sh/ruff/rules/uncapitalized-environment-variables ] -"./samples/subsys/zbus/remote_mock/remote_mock.py" = [ - "I001", # https://docs.astral.sh/ruff/rules/unsorted-imports -] -"./samples/subsys/zbus/uart_bridge/decoder.py" = [ - "I001", # https://docs.astral.sh/ruff/rules/unsorted-imports -] "./scripts/build/check_init_priorities.py" = [ "E501", # https://docs.astral.sh/ruff/rules/line-too-long "F401", # https://docs.astral.sh/ruff/rules/unused-import @@ -279,9 +258,6 @@ "I001", # https://docs.astral.sh/ruff/rules/unsorted-imports "UP026", # https://docs.astral.sh/ruff/rules/deprecated-mock-import ] -"./scripts/build/dir_is_writeable.py" = [ - "I001", # https://docs.astral.sh/ruff/rules/unsorted-imports -] "./scripts/build/elf_parser.py" = [ "E501", # https://docs.astral.sh/ruff/rules/line-too-long "I001", # https://docs.astral.sh/ruff/rules/unsorted-imports @@ -400,9 +376,6 @@ "SIM115", # https://docs.astral.sh/ruff/rules/open-file-with-context-handler "UP039", # https://docs.astral.sh/ruff/rules/unnecessary-class-parentheses ] -"./scripts/build/llext_slidlib.py" = [ - "I001", # https://docs.astral.sh/ruff/rules/unsorted-imports -] "./scripts/build/mergehex.py" = [ "B904", # https://docs.astral.sh/ruff/rules/raise-without-from-inside-except "I001", # https://docs.astral.sh/ruff/rules/unsorted-imports @@ -435,12 +408,6 @@ "UP031", # https://docs.astral.sh/ruff/rules/printf-string-formatting "UP032", # https://docs.astral.sh/ruff/rules/f-string ] -"./scripts/build/user_wordsize.py" = [ - "I001", # https://docs.astral.sh/ruff/rules/unsorted-imports -] -"./scripts/check_maintainers.py" = [ - "I001", # https://docs.astral.sh/ruff/rules/unsorted-imports -] "./scripts/ci/check_compliance.py" = [ "B904", # https://docs.astral.sh/ruff/rules/raise-without-from-inside-except "E501", # https://docs.astral.sh/ruff/rules/line-too-long @@ -510,9 +477,6 @@ "SIM115", # https://docs.astral.sh/ruff/rules/open-file-with-context-handler "UP015", # https://docs.astral.sh/ruff/rules/redundant-open-modes ] -"./scripts/coredump/gdbstubs/__init__.py" = [ - "I001", # https://docs.astral.sh/ruff/rules/unsorted-imports -] "./scripts/coredump/gdbstubs/arch/arm64.py" = [ "I001", # https://docs.astral.sh/ruff/rules/unsorted-imports "UP039", # https://docs.astral.sh/ruff/rules/unnecessary-class-parentheses @@ -646,9 +610,6 @@ "UP015", # https://docs.astral.sh/ruff/rules/redundant-open-modes "UP031", # https://docs.astral.sh/ruff/rules/printf-string-formatting ] -"./scripts/generate_usb_vif/constants/xml_constants.py" = [ - "I001", # https://docs.astral.sh/ruff/rules/unsorted-imports -] "./scripts/generate_usb_vif/generate_vif.py" = [ "E501", # https://docs.astral.sh/ruff/rules/line-too-long "I001", # https://docs.astral.sh/ruff/rules/unsorted-imports @@ -688,9 +649,6 @@ "E501", # https://docs.astral.sh/ruff/rules/line-too-long "UP032", # https://docs.astral.sh/ruff/rules/f-string ] -"./scripts/kconfig/kconfig.py" = [ - "I001", # https://docs.astral.sh/ruff/rules/unsorted-imports -] "./scripts/kconfig/kconfigfunctions.py" = [ "B011", # https://docs.astral.sh/ruff/rules/assert-false "SIM114", # https://docs.astral.sh/ruff/rules/if-with-same-arms @@ -785,12 +743,6 @@ "SIM115", # https://docs.astral.sh/ruff/rules/open-file-with-context-handler "UP015", # https://docs.astral.sh/ruff/rules/redundant-open-modes ] -"./scripts/logging/dictionary/log_parser_uart.py" = [ - "I001", # https://docs.astral.sh/ruff/rules/unsorted-imports -] -"./scripts/logging/dictionary/parserlib.py" = [ - "I001", # https://docs.astral.sh/ruff/rules/unsorted-imports -] "./scripts/make_bugs_pickle.py" = [ "UP006", # https://docs.astral.sh/ruff/rules/non-pep585-annotation "UP035", # https://docs.astral.sh/ruff/rules/deprecated-import @@ -850,9 +802,6 @@ "I001", # https://docs.astral.sh/ruff/rules/unsorted-imports "UP031", # https://docs.astral.sh/ruff/rules/printf-string-formatting ] -"./scripts/pylib/pytest-twister-harness/src/twister_harness/helpers/mcumgr.py" = [ - "I001", # https://docs.astral.sh/ruff/rules/unsorted-imports -] "./scripts/pylib/pytest-twister-harness/src/twister_harness/helpers/shell.py" = [ "E501", # https://docs.astral.sh/ruff/rules/line-too-long "E741", # https://docs.astral.sh/ruff/rules/ambiguous-variable-name @@ -889,12 +838,6 @@ "UP015", # https://docs.astral.sh/ruff/rules/redundant-open-modes "UP035", # https://docs.astral.sh/ruff/rules/deprecated-import ] -"./scripts/pylib/pytest-twister-harness/tests/fixtures/mcumgr_fixture_test.py" = [ - "I001", # https://docs.astral.sh/ruff/rules/unsorted-imports -] -"./scripts/pylib/pytest-twister-harness/tests/helpers/shell_mcuboot_command_parser_test.py" = [ - "I001", # https://docs.astral.sh/ruff/rules/unsorted-imports -] "./scripts/pylib/pytest-twister-harness/tests/helpers/shell_test.py" = [ "E501", # https://docs.astral.sh/ruff/rules/line-too-long ] @@ -1206,9 +1149,6 @@ "I001", # https://docs.astral.sh/ruff/rules/unsorted-imports "UP026", # https://docs.astral.sh/ruff/rules/deprecated-mock-import ] -"./scripts/tests/twister/test_mixins.py" = [ - "I001", # https://docs.astral.sh/ruff/rules/unsorted-imports -] "./scripts/tests/twister/test_platform.py" = [ "B011", # https://docs.astral.sh/ruff/rules/assert-false "E402", # https://docs.astral.sh/ruff/rules/module-import-not-at-top-of-file @@ -1284,9 +1224,6 @@ "UP015", # https://docs.astral.sh/ruff/rules/redundant-open-modes "UP026", # https://docs.astral.sh/ruff/rules/deprecated-mock-import ] -"./scripts/tests/twister_blackbox/test_data/tests/pytest/pytest/conftest.py" = [ - "I001", # https://docs.astral.sh/ruff/rules/unsorted-imports -] "./scripts/tests/twister_blackbox/test_data/tests/pytest/pytest/test_sample.py" = [ "I001", # https://docs.astral.sh/ruff/rules/unsorted-imports "SIM112", # https://docs.astral.sh/ruff/rules/uncapitalized-environment-variables @@ -1422,19 +1359,10 @@ "F541", # https://docs.astral.sh/ruff/rules/f-string-missing-placeholders "I001", # https://docs.astral.sh/ruff/rules/unsorted-imports ] -"./scripts/utils/migrate_includes.py" = [ - "I001", # https://docs.astral.sh/ruff/rules/unsorted-imports -] "./scripts/utils/migrate_mcumgr_kconfigs.py" = [ "E501", # https://docs.astral.sh/ruff/rules/line-too-long "I001", # https://docs.astral.sh/ruff/rules/unsorted-imports ] -"./scripts/utils/migrate_posix_kconfigs.py" = [ - "I001", # https://docs.astral.sh/ruff/rules/unsorted-imports -] -"./scripts/utils/migrate_sys_init.py" = [ - "I001", # https://docs.astral.sh/ruff/rules/unsorted-imports -] "./scripts/utils/ntc_thermistor_table.py" = [ "F541", # https://docs.astral.sh/ruff/rules/f-string-missing-placeholders "I001", # https://docs.astral.sh/ruff/rules/unsorted-imports @@ -1447,9 +1375,6 @@ "UP007", # https://docs.astral.sh/ruff/rules/non-pep604-annotation "UP035", # https://docs.astral.sh/ruff/rules/deprecated-import ] -"./scripts/utils/twister_to_list.py" = [ - "I001", # https://docs.astral.sh/ruff/rules/unsorted-imports -] "./scripts/west_commands/bindesc.py" = [ "E501", # https://docs.astral.sh/ruff/rules/line-too-long "I001", # https://docs.astral.sh/ruff/rules/unsorted-imports @@ -1459,9 +1384,6 @@ "F541", # https://docs.astral.sh/ruff/rules/f-string-missing-placeholders "I001", # https://docs.astral.sh/ruff/rules/unsorted-imports ] -"./scripts/west_commands/boards.py" = [ - "I001", # https://docs.astral.sh/ruff/rules/unsorted-imports -] "./scripts/west_commands/build.py" = [ "E501", # https://docs.astral.sh/ruff/rules/line-too-long "I001", # https://docs.astral.sh/ruff/rules/unsorted-imports @@ -1518,204 +1440,6 @@ "UP015", # https://docs.astral.sh/ruff/rules/redundant-open-modes "UP032", # https://docs.astral.sh/ruff/rules/f-string ] -"./scripts/west_commands/runners/__init__.py" = [ - "F401", # https://docs.astral.sh/ruff/rules/unused-import - "I001", # https://docs.astral.sh/ruff/rules/unsorted-imports - "UP032", # https://docs.astral.sh/ruff/rules/f-string -] -"./scripts/west_commands/runners/blackmagicprobe.py" = [ - "I001", # https://docs.astral.sh/ruff/rules/unsorted-imports - "UP032", # https://docs.astral.sh/ruff/rules/f-string -] -"./scripts/west_commands/runners/bossac.py" = [ - "B904", # https://docs.astral.sh/ruff/rules/raise-without-from-inside-except - "E101", # https://docs.astral.sh/ruff/rules/mixed-spaces-and-tabs - "E501", # https://docs.astral.sh/ruff/rules/line-too-long - "I001", # https://docs.astral.sh/ruff/rules/unsorted-imports - "SIM110", # https://docs.astral.sh/ruff/rules/reimplemented-builtin - "UP031", # https://docs.astral.sh/ruff/rules/printf-string-formatting - "W191", # https://docs.astral.sh/ruff/rules/tab-indentation -] -"./scripts/west_commands/runners/canopen_program.py" = [ - "B904", # https://docs.astral.sh/ruff/rules/raise-without-from-inside-except - "E501", # https://docs.astral.sh/ruff/rules/line-too-long - "E722", # https://docs.astral.sh/ruff/rules/bare-except - "I001", # https://docs.astral.sh/ruff/rules/unsorted-imports - "SIM115", # https://docs.astral.sh/ruff/rules/open-file-with-context-handler - "UP004", # https://docs.astral.sh/ruff/rules/useless-object-inheritance - "UP008", # https://docs.astral.sh/ruff/rules/super-call-with-parameters - "UP032", # https://docs.astral.sh/ruff/rules/f-string -] -"./scripts/west_commands/runners/core.py" = [ - "B010", # https://docs.astral.sh/ruff/rules/set-attr-with-constant - "B027", # https://docs.astral.sh/ruff/rules/empty-method-without-abstract-decorator - "E501", # https://docs.astral.sh/ruff/rules/line-too-long - "I001", # https://docs.astral.sh/ruff/rules/unsorted-imports - "UP006", # https://docs.astral.sh/ruff/rules/non-pep585-annotation - "UP007", # https://docs.astral.sh/ruff/rules/non-pep604-annotation - "UP015", # https://docs.astral.sh/ruff/rules/redundant-open-modes - "UP032", # https://docs.astral.sh/ruff/rules/f-string - "UP035", # https://docs.astral.sh/ruff/rules/deprecated-import -] -"./scripts/west_commands/runners/dediprog.py" = [ - "I001", # https://docs.astral.sh/ruff/rules/unsorted-imports -] -"./scripts/west_commands/runners/dfu.py" = [ - "I001", # https://docs.astral.sh/ruff/rules/unsorted-imports - "UP032", # https://docs.astral.sh/ruff/rules/f-string -] -"./scripts/west_commands/runners/esp32.py" = [ - "I001", # https://docs.astral.sh/ruff/rules/unsorted-imports - "UP032", # https://docs.astral.sh/ruff/rules/f-string -] -"./scripts/west_commands/runners/ezflashcli.py" = [ - "B006", # https://docs.astral.sh/ruff/rules/mutable-argument-default - "E501", # https://docs.astral.sh/ruff/rules/line-too-long - "I001", # https://docs.astral.sh/ruff/rules/unsorted-imports -] -"./scripts/west_commands/runners/gd32isp.py" = [ - "I001", # https://docs.astral.sh/ruff/rules/unsorted-imports -] -"./scripts/west_commands/runners/hifive1.py" = [ - "I001", # https://docs.astral.sh/ruff/rules/unsorted-imports -] -"./scripts/west_commands/runners/intel_adsp.py" = [ - "E501", # https://docs.astral.sh/ruff/rules/line-too-long - "I001", # https://docs.astral.sh/ruff/rules/unsorted-imports -] -"./scripts/west_commands/runners/intel_cyclonev.py" = [ - "E501", # https://docs.astral.sh/ruff/rules/line-too-long - "E714", # https://docs.astral.sh/ruff/rules/not-is-test - "I001", # https://docs.astral.sh/ruff/rules/unsorted-imports - "SIM114", # https://docs.astral.sh/ruff/rules/if-with-same-arms - "UP032", # https://docs.astral.sh/ruff/rules/f-string -] -"./scripts/west_commands/runners/jlink.py" = [ - "B006", # https://docs.astral.sh/ruff/rules/mutable-argument-default - "E501", # https://docs.astral.sh/ruff/rules/line-too-long - "I001", # https://docs.astral.sh/ruff/rules/unsorted-imports - "UP032", # https://docs.astral.sh/ruff/rules/f-string -] -"./scripts/west_commands/runners/linkserver.py" = [ - "B006", # https://docs.astral.sh/ruff/rules/mutable-argument-default - "E501", # https://docs.astral.sh/ruff/rules/line-too-long - "F541", # https://docs.astral.sh/ruff/rules/f-string-missing-placeholders - "I001", # https://docs.astral.sh/ruff/rules/unsorted-imports - "UP032", # https://docs.astral.sh/ruff/rules/f-string -] -"./scripts/west_commands/runners/mdb.py" = [ - "E501", # https://docs.astral.sh/ruff/rules/line-too-long - "E701", # https://docs.astral.sh/ruff/rules/multiple-statements-on-one-line-colon - "I001", # https://docs.astral.sh/ruff/rules/unsorted-imports - "SIM103", # https://docs.astral.sh/ruff/rules/needless-bool - "UP032", # https://docs.astral.sh/ruff/rules/f-string -] -"./scripts/west_commands/runners/misc.py" = [ - "I001", # https://docs.astral.sh/ruff/rules/unsorted-imports -] -"./scripts/west_commands/runners/native.py" = [ - "B011", # https://docs.astral.sh/ruff/rules/assert-false - "I001", # https://docs.astral.sh/ruff/rules/unsorted-imports - "UP032", # https://docs.astral.sh/ruff/rules/f-string -] -"./scripts/west_commands/runners/nios2.py" = [ - "I001", # https://docs.astral.sh/ruff/rules/unsorted-imports - "UP032", # https://docs.astral.sh/ruff/rules/f-string -] -"./scripts/west_commands/runners/nrf_common.py" = [ - "B006", # https://docs.astral.sh/ruff/rules/mutable-argument-default - "E501", # https://docs.astral.sh/ruff/rules/line-too-long - "I001", # https://docs.astral.sh/ruff/rules/unsorted-imports - "SIM102", # https://docs.astral.sh/ruff/rules/collapsible-if - "SIM105", # https://docs.astral.sh/ruff/rules/suppressible-exception - "SIM114", # https://docs.astral.sh/ruff/rules/if-with-same-arms - "UP032", # https://docs.astral.sh/ruff/rules/f-string -] -"./scripts/west_commands/runners/nrfjprog.py" = [ - "B006", # https://docs.astral.sh/ruff/rules/mutable-argument-default - "I001", # https://docs.astral.sh/ruff/rules/unsorted-imports -] -"./scripts/west_commands/runners/nrfutil.py" = [ - "B006", # https://docs.astral.sh/ruff/rules/mutable-argument-default - "F541", # https://docs.astral.sh/ruff/rules/f-string-missing-placeholders - "I001", # https://docs.astral.sh/ruff/rules/unsorted-imports -] -"./scripts/west_commands/runners/nsim.py" = [ - "I001", # https://docs.astral.sh/ruff/rules/unsorted-imports - "UP032", # https://docs.astral.sh/ruff/rules/f-string -] -"./scripts/west_commands/runners/nxp_s32dbg.py" = [ - "B904", # https://docs.astral.sh/ruff/rules/raise-without-from-inside-except - "I001", # https://docs.astral.sh/ruff/rules/unsorted-imports - "UP006", # https://docs.astral.sh/ruff/rules/non-pep585-annotation - "UP007", # https://docs.astral.sh/ruff/rules/non-pep604-annotation - "UP008", # https://docs.astral.sh/ruff/rules/super-call-with-parameters - "UP035", # https://docs.astral.sh/ruff/rules/deprecated-import -] -"./scripts/west_commands/runners/openocd.py" = [ - "E501", # https://docs.astral.sh/ruff/rules/line-too-long - "E714", # https://docs.astral.sh/ruff/rules/not-is-test - "I001", # https://docs.astral.sh/ruff/rules/unsorted-imports - "SIM105", # https://docs.astral.sh/ruff/rules/suppressible-exception -] -"./scripts/west_commands/runners/probe_rs.py" = [ - "I001", # https://docs.astral.sh/ruff/rules/unsorted-imports -] -"./scripts/west_commands/runners/pyocd.py" = [ - "I001", # https://docs.astral.sh/ruff/rules/unsorted-imports - "UP032", # https://docs.astral.sh/ruff/rules/f-string -] -"./scripts/west_commands/runners/qemu.py" = [ - "I001", # https://docs.astral.sh/ruff/rules/unsorted-imports -] -"./scripts/west_commands/runners/renode-robot.py" = [ - "E501", # https://docs.astral.sh/ruff/rules/line-too-long - "I001", # https://docs.astral.sh/ruff/rules/unsorted-imports -] -"./scripts/west_commands/runners/renode.py" = [ - "E501", # https://docs.astral.sh/ruff/rules/line-too-long - "I001", # https://docs.astral.sh/ruff/rules/unsorted-imports -] -"./scripts/west_commands/runners/silabs_commander.py" = [ - "E501", # https://docs.astral.sh/ruff/rules/line-too-long - "I001", # https://docs.astral.sh/ruff/rules/unsorted-imports - "UP032", # https://docs.astral.sh/ruff/rules/f-string -] -"./scripts/west_commands/runners/spi_burn.py" = [ - "E501", # https://docs.astral.sh/ruff/rules/line-too-long - "I001", # https://docs.astral.sh/ruff/rules/unsorted-imports -] -"./scripts/west_commands/runners/stm32cubeprogrammer.py" = [ - "E501", # https://docs.astral.sh/ruff/rules/line-too-long - "I001", # https://docs.astral.sh/ruff/rules/unsorted-imports - "UP006", # https://docs.astral.sh/ruff/rules/non-pep585-annotation - "UP007", # https://docs.astral.sh/ruff/rules/non-pep604-annotation - "UP035", # https://docs.astral.sh/ruff/rules/deprecated-import -] -"./scripts/west_commands/runners/stm32flash.py" = [ - "I001", # https://docs.astral.sh/ruff/rules/unsorted-imports - "UP032", # https://docs.astral.sh/ruff/rules/f-string -] -"./scripts/west_commands/runners/teensy.py" = [ - "I001", # https://docs.astral.sh/ruff/rules/unsorted-imports - "UP032", # https://docs.astral.sh/ruff/rules/f-string -] -"./scripts/west_commands/runners/trace32.py" = [ - "UP006", # https://docs.astral.sh/ruff/rules/non-pep585-annotation - "UP007", # https://docs.astral.sh/ruff/rules/non-pep604-annotation - "UP008", # https://docs.astral.sh/ruff/rules/super-call-with-parameters - "UP035", # https://docs.astral.sh/ruff/rules/deprecated-import -] -"./scripts/west_commands/runners/uf2.py" = [ - "I001", # https://docs.astral.sh/ruff/rules/unsorted-imports -] -"./scripts/west_commands/runners/xsdb.py" = [ - "I001", # https://docs.astral.sh/ruff/rules/unsorted-imports - "UP008", # https://docs.astral.sh/ruff/rules/super-call-with-parameters -] -"./scripts/west_commands/runners/xtensa.py" = [ - "I001", # https://docs.astral.sh/ruff/rules/unsorted-imports -] "./scripts/west_commands/sdk.py" = [ "E501", # https://docs.astral.sh/ruff/rules/line-too-long "E713", # https://docs.astral.sh/ruff/rules/not-in-test @@ -1725,9 +1449,6 @@ "SIM115", # https://docs.astral.sh/ruff/rules/open-file-with-context-handler "SIM300", # https://docs.astral.sh/ruff/rules/yoda-conditions ] -"./scripts/west_commands/shields.py" = [ - "I001", # https://docs.astral.sh/ruff/rules/unsorted-imports -] "./scripts/west_commands/sign.py" = [ "E501", # https://docs.astral.sh/ruff/rules/line-too-long "I001", # https://docs.astral.sh/ruff/rules/unsorted-imports @@ -1773,9 +1494,6 @@ "./scripts/west_commands/tests/test_gd32isp.py" = [ "I001", # https://docs.astral.sh/ruff/rules/unsorted-imports ] -"./scripts/west_commands/tests/test_imports.py" = [ - "I001", # https://docs.astral.sh/ruff/rules/unsorted-imports -] "./scripts/west_commands/tests/test_mdb.py" = [ "F541", # https://docs.astral.sh/ruff/rules/f-string-missing-placeholders "I001", # https://docs.astral.sh/ruff/rules/unsorted-imports @@ -1800,9 +1518,6 @@ "I001", # https://docs.astral.sh/ruff/rules/unsorted-imports "SIM117", # https://docs.astral.sh/ruff/rules/multiple-with-statements ] -"./scripts/west_commands/tests/test_twister.py" = [ - "I001", # https://docs.astral.sh/ruff/rules/unsorted-imports -] "./scripts/west_commands/tests/test_xsdb.py" = [ "I001", # https://docs.astral.sh/ruff/rules/unsorted-imports ] @@ -1856,12 +1571,6 @@ "UP008", # https://docs.astral.sh/ruff/rules/super-call-with-parameters "UP015", # https://docs.astral.sh/ruff/rules/redundant-open-modes ] -"./scripts/west_commands/zspdx/spdxids.py" = [ - "I001", # https://docs.astral.sh/ruff/rules/unsorted-imports -] -"./scripts/west_commands/zspdx/util.py" = [ - "I001", # https://docs.astral.sh/ruff/rules/unsorted-imports -] "./scripts/west_commands/zspdx/walker.py" = [ "E501", # https://docs.astral.sh/ruff/rules/line-too-long "F541", # https://docs.astral.sh/ruff/rules/f-string-missing-placeholders @@ -1878,9 +1587,6 @@ "I001", # https://docs.astral.sh/ruff/rules/unsorted-imports "UP032", # https://docs.astral.sh/ruff/rules/f-string ] -"./soc/intel/intel_adsp/tools/acetool.py" = [ - "I001", # https://docs.astral.sh/ruff/rules/unsorted-imports -] "./soc/intel/intel_adsp/tools/cavstool.py" = [ "E501", # https://docs.astral.sh/ruff/rules/line-too-long "E701", # https://docs.astral.sh/ruff/rules/multiple-statements-on-one-line-colon @@ -1942,15 +1648,6 @@ "./soc/silabs/silabs_sim3/sim3u/gen_crossbar_config.py" = [ "E501", # https://docs.astral.sh/ruff/rules/line-too-long ] -"./tests/boot/with_mcumgr/pytest/test_downgrade_prevention.py" = [ - "I001", # https://docs.astral.sh/ruff/rules/unsorted-imports -] -"./tests/boot/with_mcumgr/pytest/test_upgrade.py" = [ - "I001", # https://docs.astral.sh/ruff/rules/unsorted-imports -] -"./tests/boot/with_mcumgr/pytest/utils.py" = [ - "I001", # https://docs.astral.sh/ruff/rules/unsorted-imports -] "./tests/boot/with_mcumgr/pytest/west_sign_wrapper.py" = [ "I001", # https://docs.astral.sh/ruff/rules/unsorted-imports "UP031", # https://docs.astral.sh/ruff/rules/printf-string-formatting @@ -1962,16 +1659,10 @@ "UP007", # https://docs.astral.sh/ruff/rules/non-pep604-annotation "UP035", # https://docs.astral.sh/ruff/rules/deprecated-import ] -"./tests/drivers/can/host/pytest/conftest.py" = [ - "I001", # https://docs.astral.sh/ruff/rules/unsorted-imports -] "./tests/drivers/can/host/pytest/test_can.py" = [ "I001", # https://docs.astral.sh/ruff/rules/unsorted-imports "UP039", # https://docs.astral.sh/ruff/rules/unnecessary-class-parentheses ] -"./tests/kernel/timer/timer_behavior/pytest/conftest.py" = [ - "I001", # https://docs.astral.sh/ruff/rules/unsorted-imports -] "./tests/kernel/timer/timer_behavior/pytest/saleae_logic2.py" = [ "B905", # https://docs.astral.sh/ruff/rules/zip-without-explicit-strict "I001", # https://docs.astral.sh/ruff/rules/unsorted-imports @@ -1984,9 +1675,6 @@ "E501", # https://docs.astral.sh/ruff/rules/line-too-long "UP015", # https://docs.astral.sh/ruff/rules/redundant-open-modes ] -"./tests/misc/llext-edk/pytest/test_edk.py" = [ - "I001", # https://docs.astral.sh/ruff/rules/unsorted-imports -] "./tests/net/lib/lwm2m/interop/pytest/conftest.py" = [ "E501", # https://docs.astral.sh/ruff/rules/line-too-long "I001", # https://docs.astral.sh/ruff/rules/unsorted-imports @@ -1996,9 +1684,6 @@ "F541", # https://docs.astral.sh/ruff/rules/f-string-missing-placeholders "I001", # https://docs.astral.sh/ruff/rules/unsorted-imports ] -"./tests/net/lib/lwm2m/interop/pytest/test_blockwise.py" = [ - "I001", # https://docs.astral.sh/ruff/rules/unsorted-imports -] "./tests/net/lib/lwm2m/interop/pytest/test_bootstrap.py" = [ "E501", # https://docs.astral.sh/ruff/rules/line-too-long "I001", # https://docs.astral.sh/ruff/rules/unsorted-imports @@ -2018,31 +1703,16 @@ "I001", # https://docs.astral.sh/ruff/rules/unsorted-imports "SIM118", # https://docs.astral.sh/ruff/rules/in-dict-keys ] -"./tests/net/socket/tls_configurations/pytest/conftest.py" = [ - "I001", # https://docs.astral.sh/ruff/rules/unsorted-imports -] "./tests/net/socket/tls_configurations/pytest/test_app_vs_openssl.py" = [ "I001", # https://docs.astral.sh/ruff/rules/unsorted-imports "UP032", # https://docs.astral.sh/ruff/rules/f-string ] -"./tests/net/socket/udp/generate-c-string.py" = [ - "I001", # https://docs.astral.sh/ruff/rules/unsorted-imports -] -"./tests/subsys/debug/gdbstub/pytest/conftest.py" = [ - "I001", # https://docs.astral.sh/ruff/rules/unsorted-imports -] "./tests/subsys/debug/gdbstub/pytest/test_gdbstub.py" = [ "E402", # https://docs.astral.sh/ruff/rules/module-import-not-at-top-of-file "E501", # https://docs.astral.sh/ruff/rules/line-too-long "F541", # https://docs.astral.sh/ruff/rules/f-string-missing-placeholders "I001", # https://docs.astral.sh/ruff/rules/unsorted-imports ] -"./tests/subsys/logging/dictionary/pytest/conftest.py" = [ - "I001", # https://docs.astral.sh/ruff/rules/unsorted-imports -] -"./tests/subsys/logging/dictionary/pytest/test_logging_dictionary.py" = [ - "I001", # https://docs.astral.sh/ruff/rules/unsorted-imports -] "./tests/ztest/ztest_param/pytest/test_parameters.py" = [ "E501", # https://docs.astral.sh/ruff/rules/line-too-long "I001", # https://docs.astral.sh/ruff/rules/unsorted-imports diff --git a/CMakeLists.txt b/CMakeLists.txt index 88b2d77c3a4d5e6..59d91526bd14eba 100644 --- a/CMakeLists.txt +++ b/CMakeLists.txt @@ -1039,14 +1039,6 @@ if(CONFIG_USERSPACE) set(PROCESS_GPERF ${ZEPHYR_BASE}/scripts/build/process_gperf.py) endif() -get_property(GLOBAL_CSTD GLOBAL PROPERTY CSTD) -if(DEFINED GLOBAL_CSTD) - message(DEPRECATION - "Global CSTD property is deprecated, see Kconfig.zephyr for C Standard options.") - set(CSTD ${GLOBAL_CSTD}) - list(APPEND CMAKE_C_COMPILE_FEATURES ${compile_features_${CSTD}}) -endif() - # @Intent: Obtain compiler specific flag for specifying the c standard zephyr_compile_options( $<$:$${CSTD}> diff --git a/Kconfig.zephyr b/Kconfig.zephyr index 51ef697f9c530e1..5ae12736fdf65c9 100644 --- a/Kconfig.zephyr +++ b/Kconfig.zephyr @@ -448,6 +448,7 @@ config CODING_GUIDELINE_CHECK config NATIVE_LIBC bool select FULL_LIBC_SUPPORTED + select TC_PROVIDES_POSIX_C_LANG_SUPPORT_R help Zephyr will use the host system C library. diff --git a/MAINTAINERS.yml b/MAINTAINERS.yml index 7108f8394581133..336b94eaa406816 100644 --- a/MAINTAINERS.yml +++ b/MAINTAINERS.yml @@ -2176,6 +2176,7 @@ Release Notes: - rlubos - kludentwo - krish2718 + - MaochenWang1 files: - drivers/wifi/ - dts/bindings/wifi/ @@ -2202,7 +2203,7 @@ Release Notes: collaborators: - sachinthegreen files: - - drivers/wifi/nrfwifi/ + - drivers/wifi/nrf_wifi/ - dts/bindings/wifi/nordic,nrf70.yaml - dts/bindings/wifi/nordic,nrf70-qspi.yaml - dts/bindings/wifi/nordic,nrf70-spi.yaml @@ -2997,7 +2998,7 @@ Networking: - subsys/net/lib/ptp/ - samples/net/ptp/ labels: - - "area: Networking" + - "area: PTP" tests: - sample.net.ptp @@ -3044,6 +3045,7 @@ Networking: collaborators: - rlubos - krish2718 + - MaochenWang1 files: - doc/connectivity/networking/api/wifi.rst - include/zephyr/net/wifi*.h @@ -3678,7 +3680,7 @@ NXP Drivers: - drivers/*/*.mcux - drivers/*/*.nxp - drivers/*/*nxp* - - drivers/*/*kinetis* + - drivers/*/*/*kinetis* - drivers/misc/*/nxp* - include/zephyr/dt-bindings/*/*nxp* - include/zephyr/dt-bindings/*/*mcux* @@ -5055,6 +5057,16 @@ West: labels: - "area: native port" +"West project: nrf_wifi": + status: maintained + maintainers: + - krish2718 + - sachinthegreen + files: + - modules/nrf_wifi/ + labels: + - "area: Wi-Fi" + "West project: open-amp": status: odd fixes collaborators: @@ -5241,6 +5253,8 @@ West: maintainers: - krish2718 - jukkar + collaborators: + - MaochenWang1 files: - modules/hostap/ labels: diff --git a/arch/Kconfig b/arch/Kconfig index 774840dda0f92cc..27dbbc0b10cf76e 100644 --- a/arch/Kconfig +++ b/arch/Kconfig @@ -1148,3 +1148,9 @@ config ARCH_HAS_CUSTOM_BUSY_WAIT It's possible that an architecture port cannot or does not want to use the provided k_busy_wait(), but instead must do something custom. It must enable this option in that case. + +config ARCH_HAS_CUSTOM_CURRENT_IMPL + bool + help + Select when architecture implements arch_current_thread() & + arch_current_thread_set(). diff --git a/arch/arc/Kconfig b/arch/arc/Kconfig index 3f5ef8543b49ee4..fa00c3722e6be3a 100644 --- a/arch/arc/Kconfig +++ b/arch/arc/Kconfig @@ -262,7 +262,7 @@ config ARC_CURRENT_THREAD_USE_NO_TLS RGF_NUM_BANKS the parameter is disabled by-default because banks syncronization requires significant time, and it slows down performance. ARCMWDT works with tls pointer in different way then GCC. Optimized access to - TLS pointer via _current variable does not provide significant advantages + TLS pointer via arch_current_thread() does not provide significant advantages in case of MetaWare. config GEN_ISR_TABLES diff --git a/arch/arc/core/fault.c b/arch/arc/core/fault.c index 6f9da3cd1e0e957..a6c8410e63357c0 100644 --- a/arch/arc/core/fault.c +++ b/arch/arc/core/fault.c @@ -55,7 +55,7 @@ static bool z_check_thread_stack_fail(const uint32_t fault_addr, uint32_t sp) { #if defined(CONFIG_MULTITHREADING) uint32_t guard_end, guard_start; - const struct k_thread *thread = _current; + const struct k_thread *thread = arch_current_thread(); if (!thread) { /* TODO: Under what circumstances could we get here ? */ diff --git a/arch/arc/core/irq_offload.c b/arch/arc/core/irq_offload.c index d1a3f900ca3f0b3..f24a3e7dd8a5b26 100644 --- a/arch/arc/core/irq_offload.c +++ b/arch/arc/core/irq_offload.c @@ -49,8 +49,8 @@ void arch_irq_offload(irq_offload_routine_t routine, const void *parameter) __asm__ volatile("sync"); - /* If _current was aborted in the offload routine, we shouldn't be here */ - __ASSERT_NO_MSG((_current->base.thread_state & _THREAD_DEAD) == 0); + /* If arch_current_thread() was aborted in the offload routine, we shouldn't be here */ + __ASSERT_NO_MSG((arch_current_thread()->base.thread_state & _THREAD_DEAD) == 0); } /* need to be executed on every core in the system */ diff --git a/arch/arc/core/thread.c b/arch/arc/core/thread.c index 4b1d836103eedba..cb5352bc47547d4 100644 --- a/arch/arc/core/thread.c +++ b/arch/arc/core/thread.c @@ -210,7 +210,7 @@ void arch_new_thread(struct k_thread *thread, k_thread_stack_t *stack, #ifdef CONFIG_MULTITHREADING void *z_arch_get_next_switch_handle(struct k_thread **old_thread) { - *old_thread = _current; + *old_thread = arch_current_thread(); return z_get_next_switch_handle(NULL); } @@ -227,16 +227,16 @@ void *z_arch_get_next_switch_handle(struct k_thread **old_thread) FUNC_NORETURN void arch_user_mode_enter(k_thread_entry_t user_entry, void *p1, void *p2, void *p3) { - setup_stack_vars(_current); + setup_stack_vars(arch_current_thread()); /* possible optimizaiton: no need to load mem domain anymore */ /* need to lock cpu here ? */ - configure_mpu_thread(_current); + configure_mpu_thread(arch_current_thread()); z_arc_userspace_enter(user_entry, p1, p2, p3, - (uint32_t)_current->stack_info.start, - (_current->stack_info.size - - _current->stack_info.delta), _current); + (uint32_t)arch_current_thread()->stack_info.start, + (arch_current_thread()->stack_info.size - + arch_current_thread()->stack_info.delta), arch_current_thread()); CODE_UNREACHABLE; } #endif @@ -336,7 +336,7 @@ int arc_vpx_lock(k_timeout_t timeout) id = _current_cpu->id; #if (CONFIG_MP_MAX_NUM_CPUS > 1) && defined(CONFIG_SCHED_CPU_MASK) - __ASSERT(!arch_is_in_isr() && (_current->base.cpu_mask == BIT(id)), ""); + __ASSERT(!arch_is_in_isr() && (arch_current_thread()->base.cpu_mask == BIT(id)), ""); #endif k_spin_unlock(&lock, key); @@ -355,7 +355,7 @@ void arc_vpx_unlock(void) key = k_spin_lock(&lock); #if (CONFIG_MP_MAX_NUM_CPUS > 1) && defined(CONFIG_SCHED_CPU_MASK) - __ASSERT(!arch_is_in_isr() && (_current->base.cpu_mask == BIT(id)), ""); + __ASSERT(!arch_is_in_isr() && (arch_current_thread()->base.cpu_mask == BIT(id)), ""); #endif id = _current_cpu->id; k_spin_unlock(&lock, key); diff --git a/arch/arc/core/tls.c b/arch/arc/core/tls.c index 3cf7d45cab9135b..9585b228926c2f9 100644 --- a/arch/arc/core/tls.c +++ b/arch/arc/core/tls.c @@ -29,7 +29,7 @@ size_t arch_tls_stack_setup(struct k_thread *new_thread, char *stack_ptr) void *_Preserve_flags _mwget_tls(void) { - return (void *)(_current->tls); + return (void *)(arch_current_thread()->tls); } #else diff --git a/arch/arm/core/cortex_a_r/fault.c b/arch/arm/core/cortex_a_r/fault.c index daf1d2345ca06f3..5e3d38a66b45d65 100644 --- a/arch/arm/core/cortex_a_r/fault.c +++ b/arch/arm/core/cortex_a_r/fault.c @@ -178,7 +178,7 @@ bool z_arm_fault_undef_instruction_fp(void) * context because it is about to be overwritten. */ if (((_current_cpu->nested == 2) - && (_current->base.user_options & K_FP_REGS)) + && (arch_current_thread()->base.user_options & K_FP_REGS)) || ((_current_cpu->nested > 2) && (spill_esf->undefined & FPEXC_EN))) { /* @@ -196,7 +196,7 @@ bool z_arm_fault_undef_instruction_fp(void) * means that a thread that uses the VFP does not have to, * but should, set K_FP_REGS on thread creation. */ - _current->base.user_options |= K_FP_REGS; + arch_current_thread()->base.user_options |= K_FP_REGS; } return false; diff --git a/arch/arm/core/cortex_a_r/swap.c b/arch/arm/core/cortex_a_r/swap.c index 2f7faba741a93de..cf123e8ed932a89 100644 --- a/arch/arm/core/cortex_a_r/swap.c +++ b/arch/arm/core/cortex_a_r/swap.c @@ -17,8 +17,8 @@ int arch_swap(unsigned int key) { /* store off key and return value */ - _current->arch.basepri = key; - _current->arch.swap_return_value = -EAGAIN; + arch_current_thread()->arch.basepri = key; + arch_current_thread()->arch.swap_return_value = -EAGAIN; z_arm_cortex_r_svc(); irq_unlock(key); @@ -26,5 +26,5 @@ int arch_swap(unsigned int key) /* Context switch is performed here. Returning implies the * thread has been context-switched-in again. */ - return _current->arch.swap_return_value; + return arch_current_thread()->arch.swap_return_value; } diff --git a/arch/arm/core/cortex_a_r/swap_helper.S b/arch/arm/core/cortex_a_r/swap_helper.S index a41e1ab5942fe11..36dd9a965480669 100644 --- a/arch/arm/core/cortex_a_r/swap_helper.S +++ b/arch/arm/core/cortex_a_r/swap_helper.S @@ -70,7 +70,7 @@ SECTION_FUNC(TEXT, z_arm_do_swap) #if defined(CONFIG_FPU_SHARING) ldrb r0, [r2, #_thread_offset_to_user_options] - tst r0, #K_FP_REGS /* _current->base.user_options & K_FP_REGS */ + tst r0, #K_FP_REGS /* arch_current_thread()->base.user_options & K_FP_REGS */ beq out_fp_inactive mov ip, #FPEXC_EN @@ -152,7 +152,7 @@ out_fp_inactive: #if defined(CONFIG_FPU_SHARING) ldrb r0, [r2, #_thread_offset_to_user_options] - tst r0, #K_FP_REGS /* _current->base.user_options & K_FP_REGS */ + tst r0, #K_FP_REGS /* arch_current_thread()->base.user_options & K_FP_REGS */ beq in_fp_inactive mov r3, #FPEXC_EN diff --git a/arch/arm/core/cortex_a_r/thread.c b/arch/arm/core/cortex_a_r/thread.c index b3bd91ce5c11c8b..43be2d5069022a8 100644 --- a/arch/arm/core/cortex_a_r/thread.c +++ b/arch/arm/core/cortex_a_r/thread.c @@ -198,8 +198,8 @@ FUNC_NORETURN void arch_user_mode_enter(k_thread_entry_t user_entry, { /* Set up privileged stack before entering user mode */ - _current->arch.priv_stack_start = - (uint32_t)z_priv_stack_find(_current->stack_obj); + arch_current_thread()->arch.priv_stack_start = + (uint32_t)z_priv_stack_find(arch_current_thread()->stack_obj); #if defined(CONFIG_MPU_STACK_GUARD) #if defined(CONFIG_THREAD_STACK_INFO) /* We're dropping to user mode which means the guard area is no @@ -208,13 +208,13 @@ FUNC_NORETURN void arch_user_mode_enter(k_thread_entry_t user_entry, * which accounted for memory borrowed from the thread stack. */ #if FP_GUARD_EXTRA_SIZE > 0 - if ((_current->arch.mode & Z_ARM_MODE_MPU_GUARD_FLOAT_Msk) != 0) { - _current->stack_info.start -= FP_GUARD_EXTRA_SIZE; - _current->stack_info.size += FP_GUARD_EXTRA_SIZE; + if ((arch_current_thread()->arch.mode & Z_ARM_MODE_MPU_GUARD_FLOAT_Msk) != 0) { + arch_current_thread()->stack_info.start -= FP_GUARD_EXTRA_SIZE; + arch_current_thread()->stack_info.size += FP_GUARD_EXTRA_SIZE; } #endif /* FP_GUARD_EXTRA_SIZE */ - _current->stack_info.start -= MPU_GUARD_ALIGN_AND_SIZE; - _current->stack_info.size += MPU_GUARD_ALIGN_AND_SIZE; + arch_current_thread()->stack_info.start -= MPU_GUARD_ALIGN_AND_SIZE; + arch_current_thread()->stack_info.size += MPU_GUARD_ALIGN_AND_SIZE; #endif /* CONFIG_THREAD_STACK_INFO */ /* Stack guard area reserved at the bottom of the thread's @@ -222,23 +222,23 @@ FUNC_NORETURN void arch_user_mode_enter(k_thread_entry_t user_entry, * buffer area accordingly. */ #if defined(CONFIG_FPU) && defined(CONFIG_FPU_SHARING) - _current->arch.priv_stack_start += - ((_current->arch.mode & Z_ARM_MODE_MPU_GUARD_FLOAT_Msk) != 0) ? + arch_current_thread()->arch.priv_stack_start += + ((arch_current_thread()->arch.mode & Z_ARM_MODE_MPU_GUARD_FLOAT_Msk) != 0) ? MPU_GUARD_ALIGN_AND_SIZE_FLOAT : MPU_GUARD_ALIGN_AND_SIZE; #else - _current->arch.priv_stack_start += MPU_GUARD_ALIGN_AND_SIZE; + arch_current_thread()->arch.priv_stack_start += MPU_GUARD_ALIGN_AND_SIZE; #endif /* CONFIG_FPU && CONFIG_FPU_SHARING */ #endif /* CONFIG_MPU_STACK_GUARD */ #if defined(CONFIG_CPU_AARCH32_CORTEX_R) - _current->arch.priv_stack_end = - _current->arch.priv_stack_start + CONFIG_PRIVILEGED_STACK_SIZE; + arch_current_thread()->arch.priv_stack_end = + arch_current_thread()->arch.priv_stack_start + CONFIG_PRIVILEGED_STACK_SIZE; #endif z_arm_userspace_enter(user_entry, p1, p2, p3, - (uint32_t)_current->stack_info.start, - _current->stack_info.size - - _current->stack_info.delta); + (uint32_t)arch_current_thread()->stack_info.start, + arch_current_thread()->stack_info.size - + arch_current_thread()->stack_info.delta); CODE_UNREACHABLE; } @@ -304,7 +304,7 @@ EXPORT_SYMBOL(z_arm_thread_is_in_user_mode); uint32_t z_check_thread_stack_fail(const uint32_t fault_addr, const uint32_t psp) { #if defined(CONFIG_MULTITHREADING) - const struct k_thread *thread = _current; + const struct k_thread *thread = arch_current_thread(); if (thread == NULL) { return 0; @@ -314,7 +314,7 @@ uint32_t z_check_thread_stack_fail(const uint32_t fault_addr, const uint32_t psp #if (defined(CONFIG_FPU) && defined(CONFIG_FPU_SHARING)) && \ defined(CONFIG_MPU_STACK_GUARD) uint32_t guard_len = - ((_current->arch.mode & Z_ARM_MODE_MPU_GUARD_FLOAT_Msk) != 0) ? + ((arch_current_thread()->arch.mode & Z_ARM_MODE_MPU_GUARD_FLOAT_Msk) != 0) ? MPU_GUARD_ALIGN_AND_SIZE_FLOAT : MPU_GUARD_ALIGN_AND_SIZE; #else /* If MPU_STACK_GUARD is not enabled, the guard length is @@ -377,7 +377,7 @@ uint32_t z_check_thread_stack_fail(const uint32_t fault_addr, const uint32_t psp #if defined(CONFIG_FPU) && defined(CONFIG_FPU_SHARING) int arch_float_disable(struct k_thread *thread) { - if (thread != _current) { + if (thread != arch_current_thread()) { return -EINVAL; } diff --git a/arch/arm/core/cortex_m/swap.c b/arch/arm/core/cortex_m/swap.c index 9a597ef219d62ec..72eade765596f7c 100644 --- a/arch/arm/core/cortex_m/swap.c +++ b/arch/arm/core/cortex_m/swap.c @@ -33,8 +33,8 @@ int arch_swap(unsigned int key) { /* store off key and return value */ - _current->arch.basepri = key; - _current->arch.swap_return_value = -EAGAIN; + arch_current_thread()->arch.basepri = key; + arch_current_thread()->arch.swap_return_value = -EAGAIN; /* set pending bit to make sure we will take a PendSV exception */ SCB->ICSR |= SCB_ICSR_PENDSVSET_Msk; @@ -45,5 +45,5 @@ int arch_swap(unsigned int key) /* Context switch is performed here. Returning implies the * thread has been context-switched-in again. */ - return _current->arch.swap_return_value; + return arch_current_thread()->arch.swap_return_value; } diff --git a/arch/arm/core/cortex_m/swap_helper.S b/arch/arm/core/cortex_m/swap_helper.S index c6207084b5ea648..23a49cb87ef5418 100644 --- a/arch/arm/core/cortex_m/swap_helper.S +++ b/arch/arm/core/cortex_m/swap_helper.S @@ -288,7 +288,7 @@ in_fp_endif: #if defined(CONFIG_MPU_STACK_GUARD) || defined(CONFIG_USERSPACE) /* Re-program dynamic memory map */ push {r2,lr} - mov r0, r2 /* _current thread */ + mov r0, r2 /* arch_current_thread() thread */ bl z_arm_configure_dynamic_mpu_regions pop {r2,lr} #endif diff --git a/arch/arm/core/cortex_m/thread.c b/arch/arm/core/cortex_m/thread.c index 6cd7144e79d17b0..4013b636811572b 100644 --- a/arch/arm/core/cortex_m/thread.c +++ b/arch/arm/core/cortex_m/thread.c @@ -231,8 +231,8 @@ FUNC_NORETURN void arch_user_mode_enter(k_thread_entry_t user_entry, { /* Set up privileged stack before entering user mode */ - _current->arch.priv_stack_start = - (uint32_t)z_priv_stack_find(_current->stack_obj); + arch_current_thread()->arch.priv_stack_start = + (uint32_t)z_priv_stack_find(arch_current_thread()->stack_obj); #if defined(CONFIG_MPU_STACK_GUARD) #if defined(CONFIG_THREAD_STACK_INFO) /* We're dropping to user mode which means the guard area is no @@ -241,13 +241,13 @@ FUNC_NORETURN void arch_user_mode_enter(k_thread_entry_t user_entry, * which accounted for memory borrowed from the thread stack. */ #if FP_GUARD_EXTRA_SIZE > 0 - if ((_current->arch.mode & Z_ARM_MODE_MPU_GUARD_FLOAT_Msk) != 0) { - _current->stack_info.start -= FP_GUARD_EXTRA_SIZE; - _current->stack_info.size += FP_GUARD_EXTRA_SIZE; + if ((arch_current_thread()->arch.mode & Z_ARM_MODE_MPU_GUARD_FLOAT_Msk) != 0) { + arch_current_thread()->stack_info.start -= FP_GUARD_EXTRA_SIZE; + arch_current_thread()->stack_info.size += FP_GUARD_EXTRA_SIZE; } #endif /* FP_GUARD_EXTRA_SIZE */ - _current->stack_info.start -= MPU_GUARD_ALIGN_AND_SIZE; - _current->stack_info.size += MPU_GUARD_ALIGN_AND_SIZE; + arch_current_thread()->stack_info.start -= MPU_GUARD_ALIGN_AND_SIZE; + arch_current_thread()->stack_info.size += MPU_GUARD_ALIGN_AND_SIZE; #endif /* CONFIG_THREAD_STACK_INFO */ /* Stack guard area reserved at the bottom of the thread's @@ -255,18 +255,18 @@ FUNC_NORETURN void arch_user_mode_enter(k_thread_entry_t user_entry, * buffer area accordingly. */ #if defined(CONFIG_FPU) && defined(CONFIG_FPU_SHARING) - _current->arch.priv_stack_start += - ((_current->arch.mode & Z_ARM_MODE_MPU_GUARD_FLOAT_Msk) != 0) ? + arch_current_thread()->arch.priv_stack_start += + ((arch_current_thread()->arch.mode & Z_ARM_MODE_MPU_GUARD_FLOAT_Msk) != 0) ? MPU_GUARD_ALIGN_AND_SIZE_FLOAT : MPU_GUARD_ALIGN_AND_SIZE; #else - _current->arch.priv_stack_start += MPU_GUARD_ALIGN_AND_SIZE; + arch_current_thread()->arch.priv_stack_start += MPU_GUARD_ALIGN_AND_SIZE; #endif /* CONFIG_FPU && CONFIG_FPU_SHARING */ #endif /* CONFIG_MPU_STACK_GUARD */ z_arm_userspace_enter(user_entry, p1, p2, p3, - (uint32_t)_current->stack_info.start, - _current->stack_info.size - - _current->stack_info.delta); + (uint32_t)arch_current_thread()->stack_info.start, + arch_current_thread()->stack_info.size - + arch_current_thread()->stack_info.delta); CODE_UNREACHABLE; } @@ -379,7 +379,7 @@ void configure_builtin_stack_guard(struct k_thread *thread) uint32_t z_check_thread_stack_fail(const uint32_t fault_addr, const uint32_t psp) { #if defined(CONFIG_MULTITHREADING) - const struct k_thread *thread = _current; + const struct k_thread *thread = arch_current_thread(); if (thread == NULL) { return 0; @@ -389,7 +389,7 @@ uint32_t z_check_thread_stack_fail(const uint32_t fault_addr, const uint32_t psp #if (defined(CONFIG_FPU) && defined(CONFIG_FPU_SHARING)) && \ defined(CONFIG_MPU_STACK_GUARD) uint32_t guard_len = - ((_current->arch.mode & Z_ARM_MODE_MPU_GUARD_FLOAT_Msk) != 0) ? + ((arch_current_thread()->arch.mode & Z_ARM_MODE_MPU_GUARD_FLOAT_Msk) != 0) ? MPU_GUARD_ALIGN_AND_SIZE_FLOAT : MPU_GUARD_ALIGN_AND_SIZE; #else /* If MPU_STACK_GUARD is not enabled, the guard length is @@ -452,7 +452,7 @@ uint32_t z_check_thread_stack_fail(const uint32_t fault_addr, const uint32_t psp #if defined(CONFIG_FPU) && defined(CONFIG_FPU_SHARING) int arch_float_disable(struct k_thread *thread) { - if (thread != _current) { + if (thread != arch_current_thread()) { return -EINVAL; } @@ -522,7 +522,7 @@ void arch_switch_to_main_thread(struct k_thread *main_thread, char *stack_ptr, { z_arm_prepare_switch_to_main(); - _current = main_thread; + arch_current_thread_set(main_thread); #if defined(CONFIG_THREAD_LOCAL_STORAGE) /* On Cortex-M, TLS uses a global variable as pointer to diff --git a/arch/arm/core/cortex_m/thread_abort.c b/arch/arm/core/cortex_m/thread_abort.c index 99af86711070501..235adeab0b9eb16 100644 --- a/arch/arm/core/cortex_m/thread_abort.c +++ b/arch/arm/core/cortex_m/thread_abort.c @@ -27,7 +27,7 @@ void z_impl_k_thread_abort(k_tid_t thread) { SYS_PORT_TRACING_OBJ_FUNC_ENTER(k_thread, abort, thread); - if (_current == thread) { + if (arch_current_thread() == thread) { if (arch_is_in_isr()) { /* ARM is unlike most arches in that this is true * even for non-peripheral interrupts, even though diff --git a/arch/arm64/core/cortex_r/arm_mpu.c b/arch/arm64/core/cortex_r/arm_mpu.c index 2bd6d265c9a9e6f..5bc9ecbf3e5aca0 100644 --- a/arch/arm64/core/cortex_r/arm_mpu.c +++ b/arch/arm64/core/cortex_r/arm_mpu.c @@ -727,7 +727,7 @@ static int configure_dynamic_mpu_regions(struct k_thread *thread) */ thread->arch.region_num = (uint8_t)region_num; - if (thread == _current) { + if (thread == arch_current_thread()) { ret = flush_dynamic_regions_to_mpu(dyn_regions, region_num); } @@ -795,7 +795,7 @@ int arch_mem_domain_thread_add(struct k_thread *thread) ret = configure_dynamic_mpu_regions(thread); #ifdef CONFIG_SMP - if (ret == 0 && thread != _current) { + if (ret == 0 && thread != arch_current_thread()) { /* the thread could be running on another CPU right now */ z_arm64_mem_cfg_ipi(); } @@ -810,7 +810,7 @@ int arch_mem_domain_thread_remove(struct k_thread *thread) ret = configure_dynamic_mpu_regions(thread); #ifdef CONFIG_SMP - if (ret == 0 && thread != _current) { + if (ret == 0 && thread != arch_current_thread()) { /* the thread could be running on another CPU right now */ z_arm64_mem_cfg_ipi(); } diff --git a/arch/arm64/core/fatal.c b/arch/arm64/core/fatal.c index 7955b6f7d6d16b2..0e793ea18bbe358 100644 --- a/arch/arm64/core/fatal.c +++ b/arch/arm64/core/fatal.c @@ -306,8 +306,9 @@ static bool z_arm64_stack_corruption_check(struct arch_esf *esf, uint64_t esr, u } } #ifdef CONFIG_USERSPACE - else if ((_current->base.user_options & K_USER) != 0 && GET_ESR_EC(esr) == 0x24) { - sp_limit = (uint64_t)_current->stack_info.start; + else if ((arch_current_thread()->base.user_options & K_USER) != 0 && + GET_ESR_EC(esr) == 0x24) { + sp_limit = (uint64_t)arch_current_thread()->stack_info.start; guard_start = sp_limit - Z_ARM64_STACK_GUARD_SIZE; sp = esf->sp; if (sp <= sp_limit || (guard_start <= far && far <= sp_limit)) { @@ -434,7 +435,7 @@ void z_arm64_do_kernel_oops(struct arch_esf *esf) * User mode is only allowed to induce oopses and stack check * failures via software-triggered system fatal exceptions. */ - if (((_current->base.user_options & K_USER) != 0) && + if (((arch_current_thread()->base.user_options & K_USER) != 0) && reason != K_ERR_STACK_CHK_FAIL) { reason = K_ERR_KERNEL_OOPS; } diff --git a/arch/arm64/core/fpu.c b/arch/arm64/core/fpu.c index a585165b9433975..00abd59632a6162 100644 --- a/arch/arm64/core/fpu.c +++ b/arch/arm64/core/fpu.c @@ -36,7 +36,7 @@ static void DBG(char *msg, struct k_thread *th) strcpy(buf, "CPU# exc# "); buf[3] = '0' + _current_cpu->id; buf[8] = '0' + arch_exception_depth(); - strcat(buf, _current->name); + strcat(buf, arch_current_thread()->name); strcat(buf, ": "); strcat(buf, msg); strcat(buf, " "); @@ -125,7 +125,7 @@ static void flush_owned_fpu(struct k_thread *thread) * replace it, and this avoids a deadlock where * two CPUs want to pull each other's FPU context. */ - if (thread == _current) { + if (thread == arch_current_thread()) { arch_flush_local_fpu(); while (atomic_ptr_get(&_kernel.cpus[i].arch.fpu_owner) == thread) { barrier_dsync_fence_full(); @@ -260,15 +260,15 @@ void z_arm64_fpu_trap(struct arch_esf *esf) * Make sure the FPU context we need isn't live on another CPU. * The current CPU's FPU context is NULL at this point. */ - flush_owned_fpu(_current); + flush_owned_fpu(arch_current_thread()); #endif /* become new owner */ - atomic_ptr_set(&_current_cpu->arch.fpu_owner, _current); + atomic_ptr_set(&_current_cpu->arch.fpu_owner, arch_current_thread()); /* restore our content */ - z_arm64_fpu_restore(&_current->arch.saved_fp_context); - DBG("restore", _current); + z_arm64_fpu_restore(&arch_current_thread()->arch.saved_fp_context); + DBG("restore", arch_current_thread()); } /* @@ -287,7 +287,7 @@ static void fpu_access_update(unsigned int exc_update_level) if (arch_exception_depth() == exc_update_level) { /* We're about to execute non-exception code */ - if (atomic_ptr_get(&_current_cpu->arch.fpu_owner) == _current) { + if (atomic_ptr_get(&_current_cpu->arch.fpu_owner) == arch_current_thread()) { /* turn on FPU access */ write_cpacr_el1(cpacr | CPACR_EL1_FPEN_NOTRAP); } else { diff --git a/arch/arm64/core/mmu.c b/arch/arm64/core/mmu.c index a914916d605e7b3..ef199b2e7ab4dab 100644 --- a/arch/arm64/core/mmu.c +++ b/arch/arm64/core/mmu.c @@ -1309,7 +1309,7 @@ int arch_mem_domain_thread_add(struct k_thread *thread) } thread->arch.ptables = domain_ptables; - if (thread == _current) { + if (thread == arch_current_thread()) { z_arm64_swap_ptables(thread); } else { #ifdef CONFIG_SMP diff --git a/arch/arm64/core/smp.c b/arch/arm64/core/smp.c index fd9d457ea7df55b..e1c3f64dbb95f1e 100644 --- a/arch/arm64/core/smp.c +++ b/arch/arm64/core/smp.c @@ -240,7 +240,7 @@ void mem_cfg_ipi_handler(const void *unused) * This is a no-op if the page table is already the right one. * Lock irq to prevent the interrupt during mem region switch. */ - z_arm64_swap_mem_domains(_current); + z_arm64_swap_mem_domains(arch_current_thread()); arch_irq_unlock(key); } diff --git a/arch/arm64/core/thread.c b/arch/arm64/core/thread.c index 18f49945eda4959..f51e203555039e0 100644 --- a/arch/arm64/core/thread.c +++ b/arch/arm64/core/thread.c @@ -159,15 +159,15 @@ FUNC_NORETURN void arch_user_mode_enter(k_thread_entry_t user_entry, uint64_t tmpreg; /* Map the thread stack */ - z_arm64_thread_mem_domains_init(_current); + z_arm64_thread_mem_domains_init(arch_current_thread()); /* Top of the user stack area */ - stack_el0 = Z_STACK_PTR_ALIGN(_current->stack_info.start + - _current->stack_info.size - - _current->stack_info.delta); + stack_el0 = Z_STACK_PTR_ALIGN(arch_current_thread()->stack_info.start + + arch_current_thread()->stack_info.size - + arch_current_thread()->stack_info.delta); /* Top of the privileged non-user-accessible part of the stack */ - stack_el1 = (uintptr_t)(_current->stack_obj + ARCH_THREAD_STACK_RESERVED); + stack_el1 = (uintptr_t)(arch_current_thread()->stack_obj + ARCH_THREAD_STACK_RESERVED); register void *x0 __asm__("x0") = user_entry; register void *x1 __asm__("x1") = p1; diff --git a/arch/posix/core/swap.c b/arch/posix/core/swap.c index d4ec5e50b5ea687..18d83cf78d6b6d8 100644 --- a/arch/posix/core/swap.c +++ b/arch/posix/core/swap.c @@ -23,7 +23,7 @@ int arch_swap(unsigned int key) { /* - * struct k_thread * _current is the currently running thread + * struct k_thread * arch_current_thread() is the currently running thread * struct k_thread * _kernel.ready_q.cache contains the next thread to * run (cannot be NULL) * @@ -34,8 +34,8 @@ int arch_swap(unsigned int key) #if CONFIG_INSTRUMENT_THREAD_SWITCHING z_thread_mark_switched_out(); #endif - _current->callee_saved.key = key; - _current->callee_saved.retval = -EAGAIN; + arch_current_thread()->callee_saved.key = key; + arch_current_thread()->callee_saved.retval = -EAGAIN; /* retval may be modified with a call to * arch_thread_return_value_set() @@ -47,10 +47,10 @@ int arch_swap(unsigned int key) posix_thread_status_t *this_thread_ptr = (posix_thread_status_t *) - _current->callee_saved.thread_status; + arch_current_thread()->callee_saved.thread_status; - _current = _kernel.ready_q.cache; + arch_current_thread_set(_kernel.ready_q.cache); #if CONFIG_INSTRUMENT_THREAD_SWITCHING z_thread_mark_switched_in(); #endif @@ -66,9 +66,9 @@ int arch_swap(unsigned int key) /* When we continue, _kernel->current points back to this thread */ - irq_unlock(_current->callee_saved.key); + irq_unlock(arch_current_thread()->callee_saved.key); - return _current->callee_saved.retval; + return arch_current_thread()->callee_saved.retval; } @@ -94,7 +94,7 @@ void arch_switch_to_main_thread(struct k_thread *main_thread, char *stack_ptr, z_thread_mark_switched_out(); #endif - _current = _kernel.ready_q.cache; + arch_current_thread_set(_kernel.ready_q.cache); #ifdef CONFIG_INSTRUMENT_THREAD_SWITCHING z_thread_mark_switched_in(); diff --git a/arch/posix/core/thread.c b/arch/posix/core/thread.c index 4e443e2283b4f19..0a3f2eccd74b331 100644 --- a/arch/posix/core/thread.c +++ b/arch/posix/core/thread.c @@ -96,6 +96,25 @@ void posix_arch_thread_entry(void *pa_thread_status) z_thread_entry(ptr->entry_point, ptr->arg1, ptr->arg2, ptr->arg3); } +#if defined(CONFIG_FPU) && defined(CONFIG_FPU_SHARING) +int arch_float_disable(struct k_thread *thread) +{ + ARG_UNUSED(thread); + + /* Posix always has FPU enabled so cannot be disabled */ + return -ENOTSUP; +} + +int arch_float_enable(struct k_thread *thread, unsigned int options) +{ + ARG_UNUSED(thread); + ARG_UNUSED(options); + + /* Posix always has FPU enabled so nothing to do here */ + return 0; +} +#endif /* CONFIG_FPU && CONFIG_FPU_SHARING */ + #if defined(CONFIG_ARCH_HAS_THREAD_ABORT) void z_impl_k_thread_abort(k_tid_t thread) { @@ -112,7 +131,7 @@ void z_impl_k_thread_abort(k_tid_t thread) key = irq_lock(); - if (_current == thread) { + if (arch_current_thread() == thread) { if (tstatus->aborted == 0) { /* LCOV_EXCL_BR_LINE */ tstatus->aborted = 1; } else { diff --git a/arch/riscv/Kconfig b/arch/riscv/Kconfig index 7314a1923e2456a..399fc8a2ecf94d4 100644 --- a/arch/riscv/Kconfig +++ b/arch/riscv/Kconfig @@ -28,6 +28,16 @@ config RISCV_GP global pointer at program start or earlier than any instruction using GP relative addressing. +config RISCV_CURRENT_VIA_GP + bool "Store current thread into the global pointer (GP) register" + depends on !RISCV_GP && !USERSPACE + depends on MP_MAX_NUM_CPUS > 1 + select ARCH_HAS_CUSTOM_CURRENT_IMPL + help + Store the current thread's pointer into the global pointer (GP) register. + When is enabled, calls to `arch_current_thread()` & `k_sched_current_thread_query()` will + be reduced to a single register read. + config RISCV_ALWAYS_SWITCH_THROUGH_ECALL bool "Do not use mret outside a trap handler context" depends on MULTITHREADING diff --git a/arch/riscv/core/fatal.c b/arch/riscv/core/fatal.c index 879ffab9a80953e..8e0e55c8e8047df 100644 --- a/arch/riscv/core/fatal.c +++ b/arch/riscv/core/fatal.c @@ -158,23 +158,23 @@ static bool bad_stack_pointer(struct arch_esf *esf) uintptr_t sp = (uintptr_t)esf + sizeof(struct arch_esf); #ifdef CONFIG_USERSPACE - if (_current->arch.priv_stack_start != 0 && - sp >= _current->arch.priv_stack_start && - sp < _current->arch.priv_stack_start + Z_RISCV_STACK_GUARD_SIZE) { + if (arch_current_thread()->arch.priv_stack_start != 0 && + sp >= arch_current_thread()->arch.priv_stack_start && + sp < arch_current_thread()->arch.priv_stack_start + Z_RISCV_STACK_GUARD_SIZE) { return true; } - if (z_stack_is_user_capable(_current->stack_obj) && - sp >= _current->stack_info.start - K_THREAD_STACK_RESERVED && - sp < _current->stack_info.start - K_THREAD_STACK_RESERVED + if (z_stack_is_user_capable(arch_current_thread()->stack_obj) && + sp >= arch_current_thread()->stack_info.start - K_THREAD_STACK_RESERVED && + sp < arch_current_thread()->stack_info.start - K_THREAD_STACK_RESERVED + Z_RISCV_STACK_GUARD_SIZE) { return true; } #endif /* CONFIG_USERSPACE */ #if CONFIG_MULTITHREADING - if (sp >= _current->stack_info.start - K_KERNEL_STACK_RESERVED && - sp < _current->stack_info.start - K_KERNEL_STACK_RESERVED + if (sp >= arch_current_thread()->stack_info.start - K_KERNEL_STACK_RESERVED && + sp < arch_current_thread()->stack_info.start - K_KERNEL_STACK_RESERVED + Z_RISCV_STACK_GUARD_SIZE) { return true; } @@ -191,10 +191,10 @@ static bool bad_stack_pointer(struct arch_esf *esf) #ifdef CONFIG_USERSPACE if ((esf->mstatus & MSTATUS_MPP) == 0 && - (esf->sp < _current->stack_info.start || - esf->sp > _current->stack_info.start + - _current->stack_info.size - - _current->stack_info.delta)) { + (esf->sp < arch_current_thread()->stack_info.start || + esf->sp > arch_current_thread()->stack_info.start + + arch_current_thread()->stack_info.size - + arch_current_thread()->stack_info.delta)) { /* user stack pointer moved outside of its allowed stack */ return true; } @@ -246,9 +246,9 @@ FUNC_NORETURN void arch_syscall_oops(void *ssf_ptr) void z_impl_user_fault(unsigned int reason) { - struct arch_esf *oops_esf = _current->syscall_frame; + struct arch_esf *oops_esf = arch_current_thread()->syscall_frame; - if (((_current->base.user_options & K_USER) != 0) && + if (((arch_current_thread()->base.user_options & K_USER) != 0) && reason != K_ERR_STACK_CHK_FAIL) { reason = K_ERR_KERNEL_OOPS; } diff --git a/arch/riscv/core/fpu.c b/arch/riscv/core/fpu.c index 318e97e0002a9f9..bd648585c436df0 100644 --- a/arch/riscv/core/fpu.c +++ b/arch/riscv/core/fpu.c @@ -36,8 +36,8 @@ static void DBG(char *msg, struct k_thread *th) strcpy(buf, "CPU# exc# "); buf[3] = '0' + _current_cpu->id; - buf[8] = '0' + _current->arch.exception_depth; - strcat(buf, _current->name); + buf[8] = '0' + arch_current_thread()->arch.exception_depth; + strcat(buf, arch_current_thread()->name); strcat(buf, ": "); strcat(buf, msg); strcat(buf, " "); @@ -82,12 +82,12 @@ static void z_riscv_fpu_load(void) "must be called with FPU access disabled"); /* become new owner */ - atomic_ptr_set(&_current_cpu->arch.fpu_owner, _current); + atomic_ptr_set(&_current_cpu->arch.fpu_owner, arch_current_thread()); /* restore our content */ csr_set(mstatus, MSTATUS_FS_INIT); - z_riscv_fpu_restore(&_current->arch.saved_fp_context); - DBG("restore", _current); + z_riscv_fpu_restore(&arch_current_thread()->arch.saved_fp_context); + DBG("restore", arch_current_thread()); } /* @@ -168,7 +168,7 @@ static void flush_owned_fpu(struct k_thread *thread) * replace it, and this avoids a deadlock where * two CPUs want to pull each other's FPU context. */ - if (thread == _current) { + if (thread == arch_current_thread()) { z_riscv_fpu_disable(); arch_flush_local_fpu(); do { @@ -213,7 +213,7 @@ void z_riscv_fpu_trap(struct arch_esf *esf) /* save current owner's content if any */ arch_flush_local_fpu(); - if (_current->arch.exception_depth > 0) { + if (arch_current_thread()->arch.exception_depth > 0) { /* * We were already in exception when the FPU access trapped. * We give it access and prevent any further IRQ recursion @@ -233,7 +233,7 @@ void z_riscv_fpu_trap(struct arch_esf *esf) * Make sure the FPU context we need isn't live on another CPU. * The current CPU's FPU context is NULL at this point. */ - flush_owned_fpu(_current); + flush_owned_fpu(arch_current_thread()); #endif /* make it accessible and clean to the returning context */ @@ -256,13 +256,13 @@ static bool fpu_access_allowed(unsigned int exc_update_level) __ASSERT((csr_read(mstatus) & MSTATUS_IEN) == 0, "must be called with IRQs disabled"); - if (_current->arch.exception_depth == exc_update_level) { + if (arch_current_thread()->arch.exception_depth == exc_update_level) { /* We're about to execute non-exception code */ - if (_current_cpu->arch.fpu_owner == _current) { + if (_current_cpu->arch.fpu_owner == arch_current_thread()) { /* everything is already in place */ return true; } - if (_current->arch.fpu_recently_used) { + if (arch_current_thread()->arch.fpu_recently_used) { /* * Before this thread was context-switched out, * it made active use of the FPU, but someone else @@ -273,7 +273,7 @@ static bool fpu_access_allowed(unsigned int exc_update_level) z_riscv_fpu_disable(); arch_flush_local_fpu(); #ifdef CONFIG_SMP - flush_owned_fpu(_current); + flush_owned_fpu(arch_current_thread()); #endif z_riscv_fpu_load(); _current_cpu->arch.fpu_state = MSTATUS_FS_CLEAN; diff --git a/arch/riscv/core/isr.S b/arch/riscv/core/isr.S index 1def6cfa62d1413..ae8f63357a54463 100644 --- a/arch/riscv/core/isr.S +++ b/arch/riscv/core/isr.S @@ -297,7 +297,7 @@ is_fp: /* Process the FP trap and quickly return from exception */ mv a0, sp tail z_riscv_fpu_trap 2: -no_fp: /* increment _current->arch.exception_depth */ +no_fp: /* increment arch_current_thread()->arch.exception_depth */ lr t0, ___cpu_t_current_OFFSET(s0) lb t1, _thread_offset_to_exception_depth(t0) add t1, t1, 1 @@ -724,7 +724,7 @@ no_reschedule: mv a0, sp call z_riscv_fpu_exit_exc - /* decrement _current->arch.exception_depth */ + /* decrement arch_current_thread()->arch.exception_depth */ lr t0, ___cpu_t_current_OFFSET(s0) lb t1, _thread_offset_to_exception_depth(t0) add t1, t1, -1 diff --git a/arch/riscv/core/pmp.c b/arch/riscv/core/pmp.c index e29c8abd76d61e5..fbbf7c55137ce90 100644 --- a/arch/riscv/core/pmp.c +++ b/arch/riscv/core/pmp.c @@ -752,8 +752,8 @@ int arch_buffer_validate(const void *addr, size_t size, int write) int ret = -1; /* Check if this is on the stack */ - if (IS_WITHIN(start, size, - _current->stack_info.start, _current->stack_info.size)) { + if (IS_WITHIN(start, size, arch_current_thread()->stack_info.start, + arch_current_thread()->stack_info.size)) { return 0; } @@ -768,7 +768,7 @@ int arch_buffer_validate(const void *addr, size_t size, int write) } /* Look for a matching partition in our memory domain */ - struct k_mem_domain *domain = _current->mem_domain_info.mem_domain; + struct k_mem_domain *domain = arch_current_thread()->mem_domain_info.mem_domain; int p_idx, remaining_partitions; k_spinlock_key_t key = k_spin_lock(&z_mem_domain_lock); diff --git a/arch/riscv/core/stacktrace.c b/arch/riscv/core/stacktrace.c index 361e152f00ca3b8..0dfe0a196388251 100644 --- a/arch/riscv/core/stacktrace.c +++ b/arch/riscv/core/stacktrace.c @@ -108,7 +108,7 @@ static void walk_stackframe(riscv_stacktrace_cb cb, void *cookie, const struct k /* Unwind the provided exception stack frame */ fp = esf->s0; ra = esf->mepc; - } else if ((csf == NULL) || (csf == &_current->callee_saved)) { + } else if ((csf == NULL) || (csf == &arch_current_thread()->callee_saved)) { /* Unwind current thread (default case when nothing is provided ) */ fp = (uintptr_t)__builtin_frame_address(0); ra = (uintptr_t)walk_stackframe; @@ -181,7 +181,7 @@ static void walk_stackframe(riscv_stacktrace_cb cb, void *cookie, const struct k /* Unwind the provided exception stack frame */ sp = z_riscv_get_sp_before_exc(esf); ra = esf->mepc; - } else if ((csf == NULL) || (csf == &_current->callee_saved)) { + } else if ((csf == NULL) || (csf == &arch_current_thread()->callee_saved)) { /* Unwind current thread (default case when nothing is provided ) */ sp = current_stack_pointer; ra = (uintptr_t)walk_stackframe; @@ -215,8 +215,10 @@ void arch_stack_walk(stack_trace_callback_fn callback_fn, void *cookie, const struct k_thread *thread, const struct arch_esf *esf) { if (thread == NULL) { - /* In case `thread` is NULL, default that to `_current` and try to unwind */ - thread = _current; + /* In case `thread` is NULL, default that to `arch_current_thread()` + * and try to unwind + */ + thread = arch_current_thread(); } walk_stackframe((riscv_stacktrace_cb)callback_fn, cookie, thread, esf, in_stack_bound, @@ -280,7 +282,8 @@ void z_riscv_unwind_stack(const struct arch_esf *esf, const _callee_saved_t *csf int i = 0; LOG_ERR("call trace:"); - walk_stackframe(print_trace_address, &i, _current, esf, in_fatal_stack_bound, csf); + walk_stackframe(print_trace_address, &i, arch_current_thread(), esf, in_fatal_stack_bound, + csf); LOG_ERR(""); } #endif /* CONFIG_EXCEPTION_STACK_TRACE */ diff --git a/arch/riscv/core/thread.c b/arch/riscv/core/thread.c index b4999bda09ac3ff..5c471034d257533 100644 --- a/arch/riscv/core/thread.c +++ b/arch/riscv/core/thread.c @@ -132,28 +132,29 @@ FUNC_NORETURN void arch_user_mode_enter(k_thread_entry_t user_entry, /* Set up privileged stack */ #ifdef CONFIG_GEN_PRIV_STACKS - _current->arch.priv_stack_start = - (unsigned long)z_priv_stack_find(_current->stack_obj); + arch_current_thread()->arch.priv_stack_start = + (unsigned long)z_priv_stack_find(arch_current_thread()->stack_obj); /* remove the stack guard from the main stack */ - _current->stack_info.start -= K_THREAD_STACK_RESERVED; - _current->stack_info.size += K_THREAD_STACK_RESERVED; + arch_current_thread()->stack_info.start -= K_THREAD_STACK_RESERVED; + arch_current_thread()->stack_info.size += K_THREAD_STACK_RESERVED; #else - _current->arch.priv_stack_start = (unsigned long)_current->stack_obj; + arch_current_thread()->arch.priv_stack_start = + (unsigned long)arch_current_thread()->stack_obj; #endif /* CONFIG_GEN_PRIV_STACKS */ - top_of_priv_stack = Z_STACK_PTR_ALIGN(_current->arch.priv_stack_start + + top_of_priv_stack = Z_STACK_PTR_ALIGN(arch_current_thread()->arch.priv_stack_start + K_KERNEL_STACK_RESERVED + CONFIG_PRIVILEGED_STACK_SIZE); #ifdef CONFIG_INIT_STACKS /* Initialize the privileged stack */ - (void)memset((void *)_current->arch.priv_stack_start, 0xaa, + (void)memset((void *)arch_current_thread()->arch.priv_stack_start, 0xaa, Z_STACK_PTR_ALIGN(K_KERNEL_STACK_RESERVED + CONFIG_PRIVILEGED_STACK_SIZE)); #endif /* CONFIG_INIT_STACKS */ top_of_user_stack = Z_STACK_PTR_ALIGN( - _current->stack_info.start + - _current->stack_info.size - - _current->stack_info.delta); + arch_current_thread()->stack_info.start + + arch_current_thread()->stack_info.size - + arch_current_thread()->stack_info.delta); status = csr_read(mstatus); @@ -169,12 +170,12 @@ FUNC_NORETURN void arch_user_mode_enter(k_thread_entry_t user_entry, #ifdef CONFIG_PMP_STACK_GUARD /* reconfigure as the kernel mode stack will be different */ - z_riscv_pmp_stackguard_prepare(_current); + z_riscv_pmp_stackguard_prepare(arch_current_thread()); #endif /* Set up Physical Memory Protection */ - z_riscv_pmp_usermode_prepare(_current); - z_riscv_pmp_usermode_enable(_current); + z_riscv_pmp_usermode_prepare(arch_current_thread()); + z_riscv_pmp_usermode_enable(arch_current_thread()); /* preserve stack pointer for next exception entry */ arch_curr_cpu()->arch.user_exc_sp = top_of_priv_stack; diff --git a/arch/sparc/Kconfig b/arch/sparc/Kconfig index a3746f147f93653..1a17bf1eddd5a1a 100644 --- a/arch/sparc/Kconfig +++ b/arch/sparc/Kconfig @@ -26,6 +26,12 @@ config NUM_IRQS int default 32 +config SPARC_SVT + bool "Single-vector trapping" + help + Use Single-vector trapping (SVT). Defined by SPARC-V8 Embedded (V8E) + Architecture Specification and available in some LEON processors. + config SPARC_CASA bool "CASA instructions" help diff --git a/arch/sparc/core/CMakeLists.txt b/arch/sparc/core/CMakeLists.txt index 82ff7906638fd2e..cc458404ed8cf87 100644 --- a/arch/sparc/core/CMakeLists.txt +++ b/arch/sparc/core/CMakeLists.txt @@ -13,8 +13,9 @@ zephyr_library_sources( thread.c window_trap.S sw_trap_set_pil.S - trap_table_mvt.S ) +zephyr_library_sources_ifdef(CONFIG_SPARC_SVT trap_table_svt.S) +zephyr_library_sources_ifndef(CONFIG_SPARC_SVT trap_table_mvt.S) zephyr_library_sources_ifdef(CONFIG_IRQ_OFFLOAD irq_offload.c) zephyr_library_sources_ifdef(CONFIG_THREAD_LOCAL_STORAGE tls.c) diff --git a/arch/sparc/core/reset_trap.S b/arch/sparc/core/reset_trap.S index dd4046c47bcdd46..6f1f6c037e3c1d7 100644 --- a/arch/sparc/core/reset_trap.S +++ b/arch/sparc/core/reset_trap.S @@ -12,6 +12,18 @@ GTEXT(__sparc_trap_reset) SECTION_FUNC(TEXT, __sparc_trap_reset) +#ifdef CONFIG_SPARC_SVT +#ifdef CONFIG_SOC_SPARC_LEON + /* On LEON, enable single vector trapping by setting ASR17.SV. */ + rd %asr17, %g1 + set (1<<13), %g2 + or %g1, %g2, %g1 + wr %g1, %asr17 +#else +#error "Don't know how to enable SVT on this SOC" +#endif +#endif + set __sparc_trap_table, %g1 wr %g1, %tbr wr 2, %wim diff --git a/arch/sparc/core/thread.c b/arch/sparc/core/thread.c index e56d9f827c9de3d..8bdc4cd5500f6c8 100644 --- a/arch/sparc/core/thread.c +++ b/arch/sparc/core/thread.c @@ -61,7 +61,7 @@ void arch_new_thread(struct k_thread *thread, k_thread_stack_t *stack, void *z_arch_get_next_switch_handle(struct k_thread **old_thread) { - *old_thread = _current; + *old_thread = arch_current_thread(); return z_get_next_switch_handle(*old_thread); } diff --git a/arch/sparc/core/trap_table_svt.S b/arch/sparc/core/trap_table_svt.S new file mode 100644 index 000000000000000..461cc5a51df6870 --- /dev/null +++ b/arch/sparc/core/trap_table_svt.S @@ -0,0 +1,138 @@ +/* + * Copyright (c) 2023 Frontgrade Gaisler AB + * + * SPDX-License-Identifier: Apache-2.0 + */ + +/* + * This file contains the trap entry for SPARC operating with + * single-vector trap model, defined in SPARC V8E. The processor + * redirects execution to a single entry on any trap event. From + * there, two levels of look-up tables are used to find the trap + * handler. + * + * - Execution time is constant. + * - Condition flags are not modified. + * - Provides handler with PSR in l0, TBR in l6 + * - This SVT implementation is less than 400 bytes long. (An MVT + * table is always 4096 bytes long.) + * + * See trap_table_mvt.S for information about SPARC trap types. + */ + +#include +#include +#include + +#ifdef CONFIG_IRQ_OFFLOAD + #define IRQ_OFFLOAD_HANDLER __sparc_trap_irq_offload +#else + #define IRQ_OFFLOAD_HANDLER __sparc_trap_fault +#endif + +GTEXT(__sparc_trap_table) +GTEXT(__start) + +SECTION_SUBSEC_FUNC(TEXT, traptable, __sparc_trap_table) +__start: + rd %psr, %l0 + mov %tbr, %l6 + + and %l6, 0xf00, %l7 + srl %l7, 6, %l7 + set __sparc_trap_table_svt_level0, %l4 + ld [%l4 + %l7], %l4 + + and %l6, 0x0f0, %l7 + srl %l7, 2, %l7 + ld [%l4 + %l7], %l4 + + srl %l6, 4, %l3 + jmp %l4 + and %l3, 0xf, %l3 /* Interrupt level */ + +__sparc_trap_svt_in_trap: + ta 0x00 + nop + +SECTION_VAR(RODATA, __sparc_trap_table_svt_tables) + .align 4 +__sparc_trap_table_svt_level0: + .word __sparc_trap_table_svt_00 + .word __sparc_trap_table_svt_10 + .word __sparc_trap_table_svt_allbad + .word __sparc_trap_table_svt_allbad + .word __sparc_trap_table_svt_allbad + .word __sparc_trap_table_svt_allbad + .word __sparc_trap_table_svt_allbad + .word __sparc_trap_table_svt_allbad + .word __sparc_trap_table_svt_80 + .word __sparc_trap_table_svt_allbad + .word __sparc_trap_table_svt_allbad + .word __sparc_trap_table_svt_allbad + .word __sparc_trap_table_svt_allbad + .word __sparc_trap_table_svt_allbad + .word __sparc_trap_table_svt_allbad + .word __sparc_trap_table_svt_allbad + +__sparc_trap_table_svt_00: + .word __sparc_trap_reset + .word __sparc_trap_fault + .word __sparc_trap_fault + .word __sparc_trap_fault + .word __sparc_trap_fault + .word __sparc_trap_window_overflow + .word __sparc_trap_window_underflow +__sparc_trap_table_svt_allbad: + .word __sparc_trap_fault + .word __sparc_trap_fault + .word __sparc_trap_fault + .word __sparc_trap_fault + .word __sparc_trap_fault + .word __sparc_trap_fault + .word __sparc_trap_fault + .word __sparc_trap_fault + .word __sparc_trap_fault + .word __sparc_trap_fault + .word __sparc_trap_fault + .word __sparc_trap_fault + .word __sparc_trap_fault + .word __sparc_trap_fault + .word __sparc_trap_fault + .word __sparc_trap_fault + +__sparc_trap_table_svt_10: + .word __sparc_trap_fault + .word __sparc_trap_interrupt + .word __sparc_trap_interrupt + .word __sparc_trap_interrupt + .word __sparc_trap_interrupt + .word __sparc_trap_interrupt + .word __sparc_trap_interrupt + .word __sparc_trap_interrupt + .word __sparc_trap_interrupt + .word __sparc_trap_interrupt + .word __sparc_trap_interrupt + .word __sparc_trap_interrupt + .word __sparc_trap_interrupt + .word __sparc_trap_interrupt + .word __sparc_trap_interrupt + .word __sparc_trap_interrupt + +__sparc_trap_table_svt_80: + .word __sparc_trap_svt_in_trap + .word __sparc_trap_fault + .word __sparc_trap_fault + .word __sparc_trap_flush_windows + .word __sparc_trap_fault + .word __sparc_trap_fault + .word __sparc_trap_fault + .word __sparc_trap_fault + .word __sparc_trap_fault + .word __sparc_trap_sw_set_pil + .word __sparc_trap_fault + .word __sparc_trap_fault + .word __sparc_trap_fault + .word IRQ_OFFLOAD_HANDLER + .word __sparc_trap_fault + .word __sparc_trap_except_reason diff --git a/arch/x86/core/fatal.c b/arch/x86/core/fatal.c index d43499a08d2ac15..f3103861f366ec3 100644 --- a/arch/x86/core/fatal.c +++ b/arch/x86/core/fatal.c @@ -49,7 +49,7 @@ bool z_x86_check_stack_bounds(uintptr_t addr, size_t size, uint16_t cs) { uintptr_t start, end; - if (_current == NULL || arch_is_in_isr()) { + if (arch_current_thread() == NULL || arch_is_in_isr()) { /* We were servicing an interrupt or in early boot environment * and are supposed to be on the interrupt stack */ int cpu_id; @@ -64,7 +64,7 @@ bool z_x86_check_stack_bounds(uintptr_t addr, size_t size, uint16_t cs) end = start + CONFIG_ISR_STACK_SIZE; #ifdef CONFIG_USERSPACE } else if ((cs & 0x3U) == 0U && - (_current->base.user_options & K_USER) != 0) { + (arch_current_thread()->base.user_options & K_USER) != 0) { /* The low two bits of the CS register is the privilege * level. It will be 0 in supervisor mode and 3 in user mode * corresponding to ring 0 / ring 3. @@ -72,14 +72,14 @@ bool z_x86_check_stack_bounds(uintptr_t addr, size_t size, uint16_t cs) * If we get here, we must have been doing a syscall, check * privilege elevation stack bounds */ - start = _current->stack_info.start - CONFIG_PRIVILEGED_STACK_SIZE; - end = _current->stack_info.start; + start = arch_current_thread()->stack_info.start - CONFIG_PRIVILEGED_STACK_SIZE; + end = arch_current_thread()->stack_info.start; #endif /* CONFIG_USERSPACE */ } else { /* Normal thread operation, check its stack buffer */ - start = _current->stack_info.start; - end = Z_STACK_PTR_ALIGN(_current->stack_info.start + - _current->stack_info.size); + start = arch_current_thread()->stack_info.start; + end = Z_STACK_PTR_ALIGN(arch_current_thread()->stack_info.start + + arch_current_thread()->stack_info.size); } return (addr <= start) || (addr + size > end); @@ -97,7 +97,7 @@ bool z_x86_check_stack_bounds(uintptr_t addr, size_t size, uint16_t cs) __pinned_func bool z_x86_check_guard_page(uintptr_t addr) { - struct k_thread *thread = _current; + struct k_thread *thread = arch_current_thread(); uintptr_t start, end; /* Front guard size - before thread stack area */ @@ -233,7 +233,7 @@ static inline uintptr_t get_cr3(const struct arch_esf *esf) * switch when we took the exception via z_x86_trampoline_to_kernel */ if ((esf->cs & 0x3) != 0) { - return _current->arch.ptables; + return arch_current_thread()->arch.ptables; } #else ARG_UNUSED(esf); diff --git a/arch/x86/core/ia32/float.c b/arch/x86/core/ia32/float.c index c89bf7accd5a1e2..e4102d803324f39 100644 --- a/arch/x86/core/ia32/float.c +++ b/arch/x86/core/ia32/float.c @@ -207,7 +207,7 @@ void z_float_enable(struct k_thread *thread, unsigned int options) /* Associate the new FP context with the specified thread */ - if (thread == _current) { + if (thread == arch_current_thread()) { /* * When enabling FP support for the current thread, just claim * ownership of the FPU and leave CR0[TS] unset. @@ -222,7 +222,7 @@ void z_float_enable(struct k_thread *thread, unsigned int options) * of the FPU to them (unless we need it ourselves). */ - if ((_current->base.user_options & _FP_USER_MASK) == 0) { + if ((arch_current_thread()->base.user_options & _FP_USER_MASK) == 0) { /* * We are not FP-capable, so mark FPU as owned by the * thread we've just enabled FP support for, then @@ -278,7 +278,7 @@ int z_float_disable(struct k_thread *thread) thread->base.user_options &= ~_FP_USER_MASK; - if (thread == _current) { + if (thread == arch_current_thread()) { z_FpAccessDisable(); _kernel.current_fp = (struct k_thread *)0; } else { @@ -314,7 +314,7 @@ void _FpNotAvailableExcHandler(struct arch_esf *pEsf) /* Enable highest level of FP capability configured into the kernel */ - k_float_enable(_current, _FP_USER_MASK); + k_float_enable(arch_current_thread(), _FP_USER_MASK); } _EXCEPTION_CONNECT_NOCODE(_FpNotAvailableExcHandler, IV_DEVICE_NOT_AVAILABLE, 0); diff --git a/arch/x86/core/userspace.c b/arch/x86/core/userspace.c index 436bc18edb73d82..fd38d22cb90b086 100644 --- a/arch/x86/core/userspace.c +++ b/arch/x86/core/userspace.c @@ -132,9 +132,9 @@ FUNC_NORETURN void arch_user_mode_enter(k_thread_entry_t user_entry, /* Transition will reset stack pointer to initial, discarding * any old context since this is a one-way operation */ - stack_end = Z_STACK_PTR_ALIGN(_current->stack_info.start + - _current->stack_info.size - - _current->stack_info.delta); + stack_end = Z_STACK_PTR_ALIGN(arch_current_thread()->stack_info.start + + arch_current_thread()->stack_info.size - + arch_current_thread()->stack_info.delta); #ifdef CONFIG_X86_64 /* x86_64 SysV ABI requires 16 byte stack alignment, which @@ -156,15 +156,15 @@ FUNC_NORETURN void arch_user_mode_enter(k_thread_entry_t user_entry, * Note that this also needs to page in the reserved * portion of the stack (which is usually the page just * before the beginning of stack in - * _current->stack_info.start. + * arch_current_thread()->stack_info.start. */ uintptr_t stack_start; size_t stack_size; uintptr_t stack_aligned_start; size_t stack_aligned_size; - stack_start = POINTER_TO_UINT(_current->stack_obj); - stack_size = K_THREAD_STACK_LEN(_current->stack_info.size); + stack_start = POINTER_TO_UINT(arch_current_thread()->stack_obj); + stack_size = K_THREAD_STACK_LEN(arch_current_thread()->stack_info.size); #if defined(CONFIG_X86_STACK_PROTECTION) /* With hardware stack protection, the first page of stack @@ -182,7 +182,7 @@ FUNC_NORETURN void arch_user_mode_enter(k_thread_entry_t user_entry, #endif z_x86_userspace_enter(user_entry, p1, p2, p3, stack_end, - _current->stack_info.start); + arch_current_thread()->stack_info.start); CODE_UNREACHABLE; } diff --git a/arch/x86/core/x86_mmu.c b/arch/x86/core/x86_mmu.c index e4188b8670f8458..fdda995b3b07fd0 100644 --- a/arch/x86/core/x86_mmu.c +++ b/arch/x86/core/x86_mmu.c @@ -421,7 +421,7 @@ void z_x86_tlb_ipi(const void *arg) /* We might have been moved to another memory domain, so always invoke * z_x86_thread_page_tables_get() instead of using current CR3 value. */ - ptables_phys = k_mem_phys_addr(z_x86_thread_page_tables_get(_current)); + ptables_phys = k_mem_phys_addr(z_x86_thread_page_tables_get(arch_current_thread())); #endif /* * In the future, we can consider making this smarter, such as @@ -1440,7 +1440,7 @@ static inline void bcb_fence(void) __pinned_func int arch_buffer_validate(const void *addr, size_t size, int write) { - pentry_t *ptables = z_x86_thread_page_tables_get(_current); + pentry_t *ptables = z_x86_thread_page_tables_get(arch_current_thread()); uint8_t *virt; size_t aligned_size; int ret = 0; @@ -1958,7 +1958,7 @@ int arch_mem_domain_thread_add(struct k_thread *thread) * IPI takes care of this if the thread is currently running on some * other CPU. */ - if (thread == _current && thread->arch.ptables != z_x86_cr3_get()) { + if (thread == arch_current_thread() && thread->arch.ptables != z_x86_cr3_get()) { z_x86_cr3_set(thread->arch.ptables); } #endif /* CONFIG_X86_KPTI */ @@ -1980,8 +1980,9 @@ void z_x86_current_stack_perms(void) /* Clear any previous context in the stack buffer to prevent * unintentional data leakage. */ - (void)memset((void *)_current->stack_info.start, 0xAA, - _current->stack_info.size - _current->stack_info.delta); + (void)memset((void *)arch_current_thread()->stack_info.start, 0xAA, + arch_current_thread()->stack_info.size - + arch_current_thread()->stack_info.delta); /* Only now is it safe to grant access to the stack buffer since any * previous context has been erased. @@ -1991,13 +1992,13 @@ void z_x86_current_stack_perms(void) * This will grant stack and memory domain access if it wasn't set * already (in which case this returns very quickly). */ - z_x86_swap_update_common_page_table(_current); + z_x86_swap_update_common_page_table(arch_current_thread()); #else /* Memory domain access is already programmed into the page tables. * Need to enable access to this new user thread's stack buffer in * its domain-specific page tables. */ - set_stack_perms(_current, z_x86_thread_page_tables_get(_current)); + set_stack_perms(arch_current_thread(), z_x86_thread_page_tables_get(arch_current_thread())); #endif } #endif /* CONFIG_USERSPACE */ diff --git a/arch/xtensa/core/fatal.c b/arch/xtensa/core/fatal.c index 41a7a8d14097bb8..5721f130446a162 100644 --- a/arch/xtensa/core/fatal.c +++ b/arch/xtensa/core/fatal.c @@ -140,7 +140,7 @@ FUNC_NORETURN void arch_syscall_oops(void *ssf) #ifdef CONFIG_USERSPACE void z_impl_xtensa_user_fault(unsigned int reason) { - if ((_current->base.user_options & K_USER) != 0) { + if ((arch_current_thread()->base.user_options & K_USER) != 0) { if ((reason != K_ERR_KERNEL_OOPS) && (reason != K_ERR_STACK_CHK_FAIL)) { reason = K_ERR_KERNEL_OOPS; diff --git a/arch/xtensa/core/ptables.c b/arch/xtensa/core/ptables.c index c02ecc64b0dbef0..b6c8e8fb7fd3261 100644 --- a/arch/xtensa/core/ptables.c +++ b/arch/xtensa/core/ptables.c @@ -1086,7 +1086,7 @@ static int mem_buffer_validate(const void *addr, size_t size, int write, int rin int ret = 0; uint8_t *virt; size_t aligned_size; - const struct k_thread *thread = _current; + const struct k_thread *thread = arch_current_thread(); uint32_t *ptables = thread_page_tables_get(thread); /* addr/size arbitrary, fix this up into an aligned region */ diff --git a/arch/xtensa/core/thread.c b/arch/xtensa/core/thread.c index f9b8179173d4e76..5bc736a352f2f3a 100644 --- a/arch/xtensa/core/thread.c +++ b/arch/xtensa/core/thread.c @@ -156,7 +156,7 @@ int arch_float_enable(struct k_thread *thread, unsigned int options) FUNC_NORETURN void arch_user_mode_enter(k_thread_entry_t user_entry, void *p1, void *p2, void *p3) { - struct k_thread *current = _current; + struct k_thread *current = arch_current_thread(); size_t stack_end; /* Transition will reset stack pointer to initial, discarding diff --git a/arch/xtensa/core/vector_handlers.c b/arch/xtensa/core/vector_handlers.c index fa58b9c2133adc9..f721e480a2c4378 100644 --- a/arch/xtensa/core/vector_handlers.c +++ b/arch/xtensa/core/vector_handlers.c @@ -34,7 +34,7 @@ extern char xtensa_arch_kernel_oops_epc[]; bool xtensa_is_outside_stack_bounds(uintptr_t addr, size_t sz, uint32_t ps) { uintptr_t start, end; - struct k_thread *thread = _current; + struct k_thread *thread = arch_current_thread(); bool was_in_isr, invalid; /* Without userspace, there is no privileged stack so the thread stack diff --git a/boards/01space/esp32c3_042_oled/esp32c3_042_oled.dts b/boards/01space/esp32c3_042_oled/esp32c3_042_oled.dts index c7680c0b1527ac4..219b6f1f9986262 100644 --- a/boards/01space/esp32c3_042_oled/esp32c3_042_oled.dts +++ b/boards/01space/esp32c3_042_oled/esp32c3_042_oled.dts @@ -9,6 +9,7 @@ #include #include "esp32c3_042_oled-pinctrl.dtsi" +#include / { model = "01space ESP32C3 0.42 OLED"; @@ -104,37 +105,3 @@ &esp32_bt_hci { status = "okay"; }; - -&flash0 { - partitions { - compatible = "fixed-partitions"; - #address-cells = <1>; - #size-cells = <1>; - - boot_partition: partition@0 { - label = "mcuboot"; - reg = <0x00000000 0x0000F000>; - read-only; - }; - - slot0_partition: partition@10000 { - label = "image-0"; - reg = <0x00010000 0x00100000>; - }; - - slot1_partition: partition@110000 { - label = "image-1"; - reg = <0x00110000 0x00100000>; - }; - - scratch_partition: partition@210000 { - label = "image-scratch"; - reg = <0x00210000 0x00040000>; - }; - - storage_partition: partition@250000 { - label = "storage"; - reg = <0x00250000 0x00006000>; - }; - }; -}; diff --git a/boards/adi/max32662evkit/max32662evkit.dts b/boards/adi/max32662evkit/max32662evkit.dts index cf9096ff09c5268..5f204b91bef5e11 100644 --- a/boards/adi/max32662evkit/max32662evkit.dts +++ b/boards/adi/max32662evkit/max32662evkit.dts @@ -61,7 +61,7 @@ st7735: st7735@0 { compatible = "sitronix,st7735r"; mipi-max-frequency = ; - mipi-mode = ; + mipi-mode = "MIPI_DBI_MODE_SPI_3WIRE"; reg = <0>; width = <130>; diff --git a/boards/adi/max32672evkit/max32672evkit.dts b/boards/adi/max32672evkit/max32672evkit.dts index d0af6e69c28987c..581a9723c1dbe80 100644 --- a/boards/adi/max32672evkit/max32672evkit.dts +++ b/boards/adi/max32672evkit/max32672evkit.dts @@ -66,7 +66,7 @@ st7735: st7735@0 { compatible = "sitronix,st7735r"; mipi-max-frequency = ; - mipi-mode = ; + mipi-mode = "MIPI_DBI_MODE_SPI_3WIRE"; reg = <0>; width = <130>; diff --git a/boards/adi/max32680evkit/max32680evkit_max32680_m4.dts b/boards/adi/max32680evkit/max32680evkit_max32680_m4.dts index 5d423fe51febcf6..4547da3459df612 100644 --- a/boards/adi/max32680evkit/max32680evkit_max32680_m4.dts +++ b/boards/adi/max32680evkit/max32680evkit_max32680_m4.dts @@ -72,7 +72,7 @@ st7735: st7735@0 { compatible = "sitronix,st7735r"; mipi-max-frequency = ; - mipi-mode = ; + mipi-mode = "MIPI_DBI_MODE_SPI_3WIRE"; reg = <0>; width = <130>; diff --git a/boards/adi/max32690evkit/max32690evkit_max32690_m4.dts b/boards/adi/max32690evkit/max32690evkit_max32690_m4.dts index df709945d74615c..d04a91852cdfb87 100644 --- a/boards/adi/max32690evkit/max32690evkit_max32690_m4.dts +++ b/boards/adi/max32690evkit/max32690evkit_max32690_m4.dts @@ -63,7 +63,7 @@ st7735: st7735@0 { compatible = "sitronix,st7735r"; mipi-max-frequency = ; - mipi-mode = ; + mipi-mode = "MIPI_DBI_MODE_SPI_3WIRE"; reg = <0>; width = <130>; diff --git a/boards/arduino/nicla_vision/arduino_nicla_vision_stm32h747xx_m7.dts b/boards/arduino/nicla_vision/arduino_nicla_vision_stm32h747xx_m7.dts index 1fe8d2f96109906..0028128f8e2310b 100644 --- a/boards/arduino/nicla_vision/arduino_nicla_vision_stm32h747xx_m7.dts +++ b/boards/arduino/nicla_vision/arduino_nicla_vision_stm32h747xx_m7.dts @@ -25,14 +25,6 @@ zephyr,camera = &dcmi; }; - sdram1: sdram@c0000000 { - compatible = "zephyr,memory-region", "mmio-sram"; - device_type = "memory"; - reg = <0xc0000000 DT_SIZE_M(8)>; - zephyr,memory-region = "SDRAM1"; - zephyr,memory-attr = <( DT_MEM_ARM(ATTR_MPU_RAM) )>; - }; - aliases { led0 = &red_led; led1 = &green_led; @@ -46,10 +38,12 @@ &clk_hse { status = "okay"; + hse-bypass; clock-frequency = ; }; &clk_lse { + lse-bypass; status = "okay"; }; @@ -164,6 +158,37 @@ }; }; +&quadspi { + pinctrl-0 = <&quadspi_clk_pf10 &quadspi_bk1_ncs_pg6 + &quadspi_bk1_io0_pd11 &quadspi_bk1_io1_pf9 + &quadspi_bk1_io2_pe2 &quadspi_bk1_io3_pd13>; + pinctrl-names = "default"; + status = "okay"; + + n25q128a1: qspi-nor-flash@90000000 { + compatible = "st,stm32-qspi-nor"; + reg = <0x90000000 DT_SIZE_M(16)>; /* 128 Mbits */ + qspi-max-frequency = <72000000>; + status = "okay"; + + partitions { + compatible = "fixed-partitions"; + #address-cells = <1>; + #size-cells = <1>; + + slot1_partition: partition@0 { + label = "image-1"; + reg = <0x00000000 DT_SIZE_M(1)>; + }; + + storage_partition: partition@100000 { + label = "storage"; + reg = <0x00100000 DT_SIZE_M(15)>; + }; + }; + }; +}; + &rng { status = "okay"; }; diff --git a/boards/arduino/nicla_vision/board_gpio_hse.c b/boards/arduino/nicla_vision/board_gpio_hse.c new file mode 100644 index 000000000000000..caeca006ad5e955 --- /dev/null +++ b/boards/arduino/nicla_vision/board_gpio_hse.c @@ -0,0 +1,30 @@ +/* + * Copyright (c) 2024 DNDG srl + * SPDX-License-Identifier: Apache-2.0 + */ + +#include +#include +#include +#include + +static int board_gpio_hse(void) +{ + /* The external oscillator that drives the HSE clock should be enabled + * by setting the GPIOH1 pin. This function is registered at priority + * RE_KERNEL_1 to be executed before the standard STM clock + * setup code. + */ + + LL_AHB4_GRP1_EnableClock(LL_AHB4_GRP1_PERIPH_GPIOH); + + LL_GPIO_SetPinMode(GPIOH, LL_GPIO_PIN_1, LL_GPIO_MODE_OUTPUT); + LL_GPIO_SetPinSpeed(GPIOH, LL_GPIO_PIN_1, LL_GPIO_SPEED_FREQ_LOW); + LL_GPIO_SetPinOutputType(GPIOH, LL_GPIO_PIN_1, LL_GPIO_OUTPUT_PUSHPULL); + LL_GPIO_SetPinPull(GPIOH, LL_GPIO_PIN_1, LL_GPIO_PULL_UP); + LL_GPIO_SetOutputPin(GPIOH, LL_GPIO_PIN_1); + + return 0; +} + +SYS_INIT(board_gpio_hse, PRE_KERNEL_1, 0); diff --git a/boards/arduino/portenta_h7/arduino_portenta_h7_stm32h747xx_m4.dts b/boards/arduino/portenta_h7/arduino_portenta_h7_stm32h747xx_m4.dts index 12190a28715b35c..3e1352834819d6e 100644 --- a/boards/arduino/portenta_h7/arduino_portenta_h7_stm32h747xx_m4.dts +++ b/boards/arduino/portenta_h7/arduino_portenta_h7_stm32h747xx_m4.dts @@ -28,5 +28,5 @@ }; &usart1 { - status = "disabled"; + status = "okay"; }; diff --git a/boards/arduino/portenta_h7/arduino_portenta_h7_stm32h747xx_m4_defconfig b/boards/arduino/portenta_h7/arduino_portenta_h7_stm32h747xx_m4_defconfig index 8a931846ae78aca..768c0b2c03dcefa 100644 --- a/boards/arduino/portenta_h7/arduino_portenta_h7_stm32h747xx_m4_defconfig +++ b/boards/arduino/portenta_h7/arduino_portenta_h7_stm32h747xx_m4_defconfig @@ -10,9 +10,7 @@ CONFIG_ARM_MPU=y # Enable HW stack protection CONFIG_HW_STACK_PROTECTION=y -# Enable uart driver -# CONFIG_SERIAL=y - -# By default CONSOLE is assigned to m7 -# CONFIG_CONSOLE=y -# CONFIG_UART_CONSOLE=y +# On M4, USART1 is used as the UART console backend by default +CONFIG_SERIAL=y +CONFIG_CONSOLE=y +CONFIG_UART_CONSOLE=y diff --git a/boards/arduino/portenta_h7/arduino_portenta_h7_stm32h747xx_m7.dts b/boards/arduino/portenta_h7/arduino_portenta_h7_stm32h747xx_m7.dts index 4b43bb6cbd4f82a..30b5b06db272058 100644 --- a/boards/arduino/portenta_h7/arduino_portenta_h7_stm32h747xx_m7.dts +++ b/boards/arduino/portenta_h7/arduino_portenta_h7_stm32h747xx_m7.dts @@ -80,9 +80,9 @@ clock-frequency = ; }; - +/* USART1 is enabled on M4 by default */ &usart1 { - status = "okay"; + status = "disabled"; }; &i2c1 { diff --git a/boards/arduino/portenta_h7/arduino_portenta_h7_stm32h747xx_m7_defconfig b/boards/arduino/portenta_h7/arduino_portenta_h7_stm32h747xx_m7_defconfig index ff4b2954d027c65..06d55f8db39ac00 100644 --- a/boards/arduino/portenta_h7/arduino_portenta_h7_stm32h747xx_m7_defconfig +++ b/boards/arduino/portenta_h7/arduino_portenta_h7_stm32h747xx_m7_defconfig @@ -16,12 +16,8 @@ CONFIG_HW_STACK_PROTECTION=y # Use zephyr,code-partition as flash offset CONFIG_USE_DT_CODE_PARTITION=y -# Disable following to assign serial ports to m4 core - -# Enable uart driver +# On M7, USB CDC ACM is used as the UART console backend by default CONFIG_SERIAL=y - -# Enable console CONFIG_CONSOLE=y CONFIG_UART_CONSOLE=y CONFIG_UART_LINE_CTRL=y diff --git a/boards/arm/fvp_base_revc_2xaemv8a/fvp_base_revc_2xaemv8a.yaml b/boards/arm/fvp_base_revc_2xaemv8a/fvp_base_revc_2xaemv8a.yaml index ce4bdb8a5f18e18..02a956dc6288902 100644 --- a/boards/arm/fvp_base_revc_2xaemv8a/fvp_base_revc_2xaemv8a.yaml +++ b/boards/arm/fvp_base_revc_2xaemv8a/fvp_base_revc_2xaemv8a.yaml @@ -5,6 +5,9 @@ identifier: fvp_base_revc_2xaemv8a name: FVP Emulation FVP_Base_RevC-2xAEMvA arch: arm64 type: sim +simulation: + - name: armfvp + exec: FVP_Base_RevC-2xAEMvA toolchain: - zephyr - cross-compile diff --git a/boards/arm/fvp_base_revc_2xaemv8a/fvp_base_revc_2xaemv8a_fvp_base_revc_2xaemv8a_smp_ns.yaml b/boards/arm/fvp_base_revc_2xaemv8a/fvp_base_revc_2xaemv8a_fvp_base_revc_2xaemv8a_smp_ns.yaml index f7ef5f7e24af38d..fae3074e6d8173c 100644 --- a/boards/arm/fvp_base_revc_2xaemv8a/fvp_base_revc_2xaemv8a_fvp_base_revc_2xaemv8a_smp_ns.yaml +++ b/boards/arm/fvp_base_revc_2xaemv8a/fvp_base_revc_2xaemv8a_fvp_base_revc_2xaemv8a_smp_ns.yaml @@ -5,6 +5,9 @@ identifier: fvp_base_revc_2xaemv8a/fvp_base_revc_2xaemv8a/smp/ns name: FVP Emulation FVP_Base_RevC-2xAEMvA (SMP) arch: arm64 type: sim +simulation: + - name: armfvp + exec: FVP_Base_RevC-2xAEMvA toolchain: - zephyr - cross-compile diff --git a/boards/arm/fvp_baser_aemv8r/fvp_baser_aemv8r_fvp_aemv8r_aarch32.yaml b/boards/arm/fvp_baser_aemv8r/fvp_baser_aemv8r_fvp_aemv8r_aarch32.yaml index 0f7b38d648c8c9f..16cdd5264c8afb3 100644 --- a/boards/arm/fvp_baser_aemv8r/fvp_baser_aemv8r_fvp_aemv8r_aarch32.yaml +++ b/boards/arm/fvp_baser_aemv8r/fvp_baser_aemv8r_fvp_aemv8r_aarch32.yaml @@ -6,6 +6,9 @@ identifier: fvp_baser_aemv8r/fvp_aemv8r_aarch32 name: FVP Emulation FVP_BaseR_AEMv8R AArch32 arch: arm type: sim +simulation: + - name: armfvp + exec: FVP_BaseR_AEMv8R toolchain: - zephyr - cross-compile diff --git a/boards/arm/fvp_baser_aemv8r/fvp_baser_aemv8r_fvp_aemv8r_aarch32_smp.yaml b/boards/arm/fvp_baser_aemv8r/fvp_baser_aemv8r_fvp_aemv8r_aarch32_smp.yaml index d056a315af64035..e8eceff40e8ae58 100644 --- a/boards/arm/fvp_baser_aemv8r/fvp_baser_aemv8r_fvp_aemv8r_aarch32_smp.yaml +++ b/boards/arm/fvp_baser_aemv8r/fvp_baser_aemv8r_fvp_aemv8r_aarch32_smp.yaml @@ -5,6 +5,9 @@ identifier: fvp_baser_aemv8r/fvp_aemv8r_aarch32/smp name: FVP Emulation FVP_BaseR_AEMv8R AArch32 (SMP) arch: arm type: sim +simulation: + - name: armfvp + exec: FVP_BaseR_AEMv8R toolchain: - zephyr - cross-compile diff --git a/boards/arm/fvp_baser_aemv8r/fvp_baser_aemv8r_fvp_aemv8r_aarch64.yaml b/boards/arm/fvp_baser_aemv8r/fvp_baser_aemv8r_fvp_aemv8r_aarch64.yaml index 501a6b893743fa6..6f07158964bf323 100644 --- a/boards/arm/fvp_baser_aemv8r/fvp_baser_aemv8r_fvp_aemv8r_aarch64.yaml +++ b/boards/arm/fvp_baser_aemv8r/fvp_baser_aemv8r_fvp_aemv8r_aarch64.yaml @@ -5,6 +5,9 @@ identifier: fvp_baser_aemv8r/fvp_aemv8r_aarch64 name: FVP Emulation FVP_BaseR_AEMv8R arch: arm64 type: sim +simulation: + - name: armfvp + exec: FVP_BaseR_AEMv8R toolchain: - zephyr - cross-compile diff --git a/boards/arm/fvp_baser_aemv8r/fvp_baser_aemv8r_fvp_aemv8r_aarch64_smp.yaml b/boards/arm/fvp_baser_aemv8r/fvp_baser_aemv8r_fvp_aemv8r_aarch64_smp.yaml index fa1baf892d9a823..bd4807b0710f5fb 100644 --- a/boards/arm/fvp_baser_aemv8r/fvp_baser_aemv8r_fvp_aemv8r_aarch64_smp.yaml +++ b/boards/arm/fvp_baser_aemv8r/fvp_baser_aemv8r_fvp_aemv8r_aarch64_smp.yaml @@ -5,6 +5,9 @@ identifier: fvp_baser_aemv8r/fvp_aemv8r_aarch64/smp name: FVP Emulation FVP_BaseR_AEMv8R (SMP) arch: arm64 type: sim +simulation: + - name: armfvp + exec: FVP_BaseR_AEMv8R toolchain: - zephyr - cross-compile diff --git a/boards/arm/mps2/mps2_an385.yaml b/boards/arm/mps2/mps2_an385.yaml index 7bda3fc3dcccc40..bbd929892c5ca54 100644 --- a/boards/arm/mps2/mps2_an385.yaml +++ b/boards/arm/mps2/mps2_an385.yaml @@ -2,7 +2,8 @@ identifier: mps2/an385 name: ARM V2M MPS2 type: mcu arch: arm -simulation: qemu +simulation: + - name: qemu toolchain: - zephyr - gnuarmemb diff --git a/boards/arm/mps2/mps2_an521_cpu0.yaml b/boards/arm/mps2/mps2_an521_cpu0.yaml index e5247a292e5aa18..68210b954b46f50 100644 --- a/boards/arm/mps2/mps2_an521_cpu0.yaml +++ b/boards/arm/mps2/mps2_an521_cpu0.yaml @@ -4,7 +4,9 @@ type: mcu arch: arm ram: 4096 flash: 4096 -simulation: qemu +simulation: + - name: qemu + - name: armfvp toolchain: - gnuarmemb - zephyr diff --git a/boards/arm/mps2/mps2_an521_cpu0_ns.yaml b/boards/arm/mps2/mps2_an521_cpu0_ns.yaml index 6a24f3887858743..c4a589c93967b41 100644 --- a/boards/arm/mps2/mps2_an521_cpu0_ns.yaml +++ b/boards/arm/mps2/mps2_an521_cpu0_ns.yaml @@ -4,7 +4,9 @@ type: mcu arch: arm ram: 512 flash: 512 -simulation: qemu +simulation: + - name: qemu + - name: armfvp toolchain: - gnuarmemb - zephyr diff --git a/boards/arm/mps2/mps2_an521_cpu1.yaml b/boards/arm/mps2/mps2_an521_cpu1.yaml index 29bd722157b4069..3880d479d6ec603 100644 --- a/boards/arm/mps2/mps2_an521_cpu1.yaml +++ b/boards/arm/mps2/mps2_an521_cpu1.yaml @@ -4,7 +4,9 @@ type: mcu arch: arm ram: 512 flash: 468 -simulation: qemu +simulation: + - name: qemu + - name: armfvp toolchain: - gnuarmemb - zephyr diff --git a/boards/arm/mps3/mps3_corstone300_an547.yaml b/boards/arm/mps3/mps3_corstone300_an547.yaml index 44987ebe55220ff..87a7100ed37aab1 100644 --- a/boards/arm/mps3/mps3_corstone300_an547.yaml +++ b/boards/arm/mps3/mps3_corstone300_an547.yaml @@ -11,7 +11,9 @@ type: mcu arch: arm ram: 512 flash: 512 -simulation: qemu +simulation: + - name: qemu + - name: armfvp toolchain: - gnuarmemb - zephyr diff --git a/boards/arm/mps3/mps3_corstone300_an547_ns.yaml b/boards/arm/mps3/mps3_corstone300_an547_ns.yaml index ad66706012fcdcf..3efa3da5de6d4b3 100644 --- a/boards/arm/mps3/mps3_corstone300_an547_ns.yaml +++ b/boards/arm/mps3/mps3_corstone300_an547_ns.yaml @@ -11,7 +11,8 @@ type: mcu arch: arm ram: 2048 flash: 512 -simulation: qemu +simulation: + - name: qemu toolchain: - gnuarmemb - zephyr diff --git a/boards/arm/mps3/mps3_corstone300_fvp.yaml b/boards/arm/mps3/mps3_corstone300_fvp.yaml index 4d665e24aa07a9c..3d850b7f4eaf5a2 100644 --- a/boards/arm/mps3/mps3_corstone300_fvp.yaml +++ b/boards/arm/mps3/mps3_corstone300_fvp.yaml @@ -7,8 +7,9 @@ type: mcu arch: arm ram: 512 flash: 512 -simulation: armfvp -simulation_exec: FVP_Corstone_SSE-300_Ethos-U55 +simulation: + - name: armfvp + exec: FVP_Corstone_SSE-300_Ethos-U55 toolchain: - gnuarmemb - zephyr diff --git a/boards/arm/mps3/mps3_corstone310_fvp.yaml b/boards/arm/mps3/mps3_corstone310_fvp.yaml index e91d524ffc90827..ab6c8d7e561c6ab 100644 --- a/boards/arm/mps3/mps3_corstone310_fvp.yaml +++ b/boards/arm/mps3/mps3_corstone310_fvp.yaml @@ -7,8 +7,9 @@ type: mcu arch: arm ram: 32 flash: 32 -simulation: armfvp -simulation_exec: FVP_Corstone_SSE-310 +simulation: + - name: armfvp + exec: FVP_Corstone_SSE-310 toolchain: - gnuarmemb - zephyr diff --git a/boards/dptechnics/walter/walter_esp32s3_appcpu.dts b/boards/dptechnics/walter/walter_esp32s3_appcpu.dts index b886a2cec6cabec..8135d2084909589 100644 --- a/boards/dptechnics/walter/walter_esp32s3_appcpu.dts +++ b/boards/dptechnics/walter/walter_esp32s3_appcpu.dts @@ -5,7 +5,7 @@ */ /dts-v1/; -#include +#include "espressif/esp32s3/esp32s3_wroom_n16r2.dtsi" #include / { diff --git a/boards/espressif/esp32s2_devkitc/Kconfig.defconfig b/boards/espressif/esp32s2_devkitc/Kconfig.defconfig deleted file mode 100644 index c7fa706256161ff..000000000000000 --- a/boards/espressif/esp32s2_devkitc/Kconfig.defconfig +++ /dev/null @@ -1,7 +0,0 @@ -# ESP32S2 DevKitC board configuration - -# Copyright (c) 2024 Espressif Systems (Shanghai) Co., Ltd. -# SPDX-License-Identifier: Apache-2.0 - -config ENTROPY_GENERATOR - default y diff --git a/boards/espressif/esp32s2_saola/Kconfig.defconfig b/boards/espressif/esp32s2_saola/Kconfig.defconfig deleted file mode 100644 index ffa2b0d832cc46e..000000000000000 --- a/boards/espressif/esp32s2_saola/Kconfig.defconfig +++ /dev/null @@ -1,7 +0,0 @@ -# ESP32S2 Saola board configuration - -# Copyright (c) 2021 Espressif Systems (Shanghai) Co., Ltd. -# SPDX-License-Identifier: Apache-2.0 - -config ENTROPY_GENERATOR - default y diff --git a/boards/espressif/esp32s3_devkitc/esp32s3_devkitc_appcpu.dts b/boards/espressif/esp32s3_devkitc/esp32s3_devkitc_appcpu.dts index b1ad215672403e3..f105a0f8658b2c0 100644 --- a/boards/espressif/esp32s3_devkitc/esp32s3_devkitc_appcpu.dts +++ b/boards/espressif/esp32s3_devkitc/esp32s3_devkitc_appcpu.dts @@ -5,7 +5,7 @@ */ /dts-v1/; -#include +#include #include #include "esp32s3_devkitc-pinctrl.dtsi" diff --git a/boards/espressif/esp32s3_devkitm/esp32s3_devkitm_appcpu.dts b/boards/espressif/esp32s3_devkitm/esp32s3_devkitm_appcpu.dts index a74e8f91751e3d0..4946139c8c6e621 100644 --- a/boards/espressif/esp32s3_devkitm/esp32s3_devkitm_appcpu.dts +++ b/boards/espressif/esp32s3_devkitm/esp32s3_devkitm_appcpu.dts @@ -5,7 +5,7 @@ */ /dts-v1/; -#include +#include #include #include "esp32s3_devkitm-pinctrl.dtsi" diff --git a/boards/espressif/esp32s3_eye/esp32s3_eye_appcpu.dts b/boards/espressif/esp32s3_eye/esp32s3_eye_appcpu.dts index f51ffacab0bdf34..cd14ce2ea493697 100644 --- a/boards/espressif/esp32s3_eye/esp32s3_eye_appcpu.dts +++ b/boards/espressif/esp32s3_eye/esp32s3_eye_appcpu.dts @@ -21,6 +21,10 @@ }; }; +&flash0 { + reg = <0x0 DT_SIZE_M(4)>; +}; + &trng0 { status = "okay"; }; diff --git a/boards/espressif/esp32s3_eye/esp32s3_eye_procpu.dts b/boards/espressif/esp32s3_eye/esp32s3_eye_procpu.dts index fab93cbcf6d1ea7..df053757ee4f5c8 100644 --- a/boards/espressif/esp32s3_eye/esp32s3_eye_procpu.dts +++ b/boards/espressif/esp32s3_eye/esp32s3_eye_procpu.dts @@ -10,6 +10,7 @@ #include #include #include +#include / { model = "Espressif ESP32S3-EYE PROCPU"; @@ -108,7 +109,7 @@ nvgam-param = [D0 04 0C 11 13 2C 3F 44 51 2F 1F 1F 20 23]; ram-param = [00 F0]; rgb-param = [CD 08 14]; - mipi-mode = ; + mipi-mode = "MIPI_DBI_MODE_SPI_4WIRE"; }; }; }; @@ -200,45 +201,6 @@ status = "okay"; }; -&flash0 { - status = "okay"; - partitions { - compatible = "fixed-partitions"; - #address-cells = <1>; - #size-cells = <1>; - - /* Reserve 64kB for the bootloader */ - boot_partition: partition@0 { - label = "mcuboot"; - reg = <0x00000000 0x00010000>; - read-only; - }; - - /* Reserve 1024kB for the application in slot 0 */ - slot0_partition: partition@10000 { - label = "image-0"; - reg = <0x00010000 0x00100000>; - }; - - /* Reserve 1024kB for the application in slot 1 */ - slot1_partition: partition@110000 { - label = "image-1"; - reg = <0x00110000 0x00100000>; - }; - - /* Reserve 256kB for the scratch partition */ - scratch_partition: partition@210000 { - label = "image-scratch"; - reg = <0x00210000 0x00040000>; - }; - - storage_partition: partition@250000 { - label = "storage"; - reg = <0x00250000 0x00006000>; - }; - }; -}; - &esp32_bt_hci { status = "okay"; }; diff --git a/boards/franzininho/esp32s2_franzininho/Kconfig.defconfig b/boards/franzininho/esp32s2_franzininho/Kconfig.defconfig deleted file mode 100644 index 257328f1c0a5eb2..000000000000000 --- a/boards/franzininho/esp32s2_franzininho/Kconfig.defconfig +++ /dev/null @@ -1,7 +0,0 @@ -# ESP32S2 Franzininho board configuration - -# Copyright (c) 2022 Felipe Neves -# SPDX-License-Identifier: Apache-2.0 - -config ENTROPY_GENERATOR - default y diff --git a/boards/franzininho/esp32s2_franzininho/esp32s2_franzininho.dts b/boards/franzininho/esp32s2_franzininho/esp32s2_franzininho.dts index 74d5f7610a94ebf..beee6810d62be88 100644 --- a/boards/franzininho/esp32s2_franzininho/esp32s2_franzininho.dts +++ b/boards/franzininho/esp32s2_franzininho/esp32s2_franzininho.dts @@ -8,6 +8,7 @@ #include #include "esp32s2_franzininho-pinctrl.dtsi" +#include / { model = "ESP32S2 Franzininho"; @@ -107,45 +108,6 @@ pinctrl-names = "default"; }; -&flash0 { - status = "okay"; - partitions { - compatible = "fixed-partitions"; - #address-cells = <1>; - #size-cells = <1>; - - /* Reserve 60kB for the bootloader */ - boot_partition: partition@1000 { - label = "mcuboot"; - reg = <0x00001000 0x0000F000>; - read-only; - }; - - /* Reserve 1024kB for the application in slot 0 */ - slot0_partition: partition@10000 { - label = "image-0"; - reg = <0x00010000 0x00100000>; - }; - - /* Reserve 1024kB for the application in slot 1 */ - slot1_partition: partition@110000 { - label = "image-1"; - reg = <0x00110000 0x00100000>; - }; - - /* Reserve 256kB for the scratch partition */ - scratch_partition: partition@210000 { - label = "image-scratch"; - reg = <0x00210000 0x00040000>; - }; - - storage_partition: partition@250000 { - label = "storage"; - reg = <0x00250000 0x00006000>; - }; - }; -}; - &wdt0 { status = "okay"; }; diff --git a/boards/gaisler/generic_leon3/generic_leon3.yaml b/boards/gaisler/generic_leon3/generic_leon3.yaml index 3aecda82e0e38cf..621306904617d31 100644 --- a/boards/gaisler/generic_leon3/generic_leon3.yaml +++ b/boards/gaisler/generic_leon3/generic_leon3.yaml @@ -1,8 +1,9 @@ identifier: generic_leon3 name: Generic LEON3 system type: mcu -simulation: tsim -simulation_exec: tsim-leon3 +simulation: + - name: tsim + exec: tsim-leon3 arch: sparc ram: 4096 flash: 2048 diff --git a/boards/gaisler/gr716a_mini/gr716a_mini.yaml b/boards/gaisler/gr716a_mini/gr716a_mini.yaml index 7898925121e8c88..4d2743602c67010 100644 --- a/boards/gaisler/gr716a_mini/gr716a_mini.yaml +++ b/boards/gaisler/gr716a_mini/gr716a_mini.yaml @@ -1,8 +1,9 @@ identifier: gr716a_mini name: GR716-MINI Development Board type: mcu -simulation: tsim -simulation_exec: tsim-leon3 +simulation: + - name: tsim + exec: tsim-leon3 arch: sparc toolchain: - zephyr diff --git a/boards/heltec/heltec_wifi_lora32_v2/heltec_wifi_lora32_v2_appcpu.dts b/boards/heltec/heltec_wifi_lora32_v2/heltec_wifi_lora32_v2_appcpu.dts index 1b9f7dff7006dfc..3cbdd5e3f478deb 100644 --- a/boards/heltec/heltec_wifi_lora32_v2/heltec_wifi_lora32_v2_appcpu.dts +++ b/boards/heltec/heltec_wifi_lora32_v2/heltec_wifi_lora32_v2_appcpu.dts @@ -6,6 +6,7 @@ /dts-v1/; #include +#include / { model = "Heltec Wi-Fi Lora32 V2 APPCPU"; @@ -25,42 +26,3 @@ &trng0 { status = "okay"; }; - -&flash0 { - status = "okay"; - partitions { - compatible = "fixed-partitions"; - #address-cells = <1>; - #size-cells = <1>; - - /* Reserve 60kB for the bootloader */ - boot_partition: partition@1000 { - label = "mcuboot"; - reg = <0x00001000 0x0000F000>; - read-only; - }; - - /* Reserve 1024kB for the application in slot 0 */ - slot0_partition: partition@10000 { - label = "image-0"; - reg = <0x00010000 0x00100000>; - }; - - /* Reserve 1024kB for the application in slot 1 */ - slot1_partition: partition@110000 { - label = "image-1"; - reg = <0x00110000 0x00100000>; - }; - - /* Reserve 256kB for the scratch partition */ - scratch_partition: partition@210000 { - label = "image-scratch"; - reg = <0x00210000 0x00040000>; - }; - - storage_partition: partition@250000 { - label = "storage"; - reg = <0x00250000 0x00006000>; - }; - }; -}; diff --git a/boards/heltec/heltec_wifi_lora32_v2/heltec_wifi_lora32_v2_procpu.dts b/boards/heltec/heltec_wifi_lora32_v2/heltec_wifi_lora32_v2_procpu.dts index 4c7cedf82b5fc9b..323947247b54eb9 100644 --- a/boards/heltec/heltec_wifi_lora32_v2/heltec_wifi_lora32_v2_procpu.dts +++ b/boards/heltec/heltec_wifi_lora32_v2/heltec_wifi_lora32_v2_procpu.dts @@ -8,6 +8,7 @@ #include #include "heltec_wifi_lora32_v2-pinctrl.dtsi" #include +#include / { model = "Heltec Wi-Fi Lora32 V2 PROCPU"; @@ -59,6 +60,10 @@ }; }; +&flash0 { + reg = <0x0 DT_SIZE_M(4)>; +}; + &uart0 { status = "okay"; current-speed = <115200>; @@ -106,50 +111,6 @@ }; }; -&flash0 { - /* the board is using plain d0wd SoC part without the flash - * so any additional flash size should be defined at the board level - */ - reg = <0x0 DT_SIZE_M(8)>; - - status = "okay"; - partitions { - compatible = "fixed-partitions"; - #address-cells = <1>; - #size-cells = <1>; - - /* Reserve 60kB for the bootloader */ - boot_partition: partition@1000 { - label = "mcuboot"; - reg = <0x00001000 0x0000F000>; - read-only; - }; - - /* Reserve 1024kB for the application in slot 0 */ - slot0_partition: partition@10000 { - label = "image-0"; - reg = <0x00010000 0x00100000>; - }; - - /* Reserve 1024kB for the application in slot 1 */ - slot1_partition: partition@110000 { - label = "image-1"; - reg = <0x00110000 0x00100000>; - }; - - /* Reserve 256kB for the scratch partition */ - scratch_partition: partition@210000 { - label = "image-scratch"; - reg = <0x00210000 0x00040000>; - }; - - storage_partition: partition@250000 { - label = "storage"; - reg = <0x00250000 0x00006000>; - }; - }; -}; - &esp32_bt_hci { status = "okay"; }; diff --git a/boards/heltec/heltec_wireless_stick_lite_v3/heltec_wireless_stick_lite_v3_appcpu.dts b/boards/heltec/heltec_wireless_stick_lite_v3/heltec_wireless_stick_lite_v3_appcpu.dts index 9a5e3eb304b123a..0a32e1d562b0173 100644 --- a/boards/heltec/heltec_wireless_stick_lite_v3/heltec_wireless_stick_lite_v3_appcpu.dts +++ b/boards/heltec/heltec_wireless_stick_lite_v3/heltec_wireless_stick_lite_v3_appcpu.dts @@ -21,6 +21,10 @@ }; }; +&flash0 { + reg = <0x0 DT_SIZE_M(4)>; +}; + &trng0 { status = "okay"; }; diff --git a/boards/heltec/heltec_wireless_stick_lite_v3/heltec_wireless_stick_lite_v3_procpu.dts b/boards/heltec/heltec_wireless_stick_lite_v3/heltec_wireless_stick_lite_v3_procpu.dts index d4b2f2b17e87fe7..e955d2b0654e710 100644 --- a/boards/heltec/heltec_wireless_stick_lite_v3/heltec_wireless_stick_lite_v3_procpu.dts +++ b/boards/heltec/heltec_wireless_stick_lite_v3/heltec_wireless_stick_lite_v3_procpu.dts @@ -12,6 +12,7 @@ #include #include #include +#include / { model = "Heltec Wireless Stick Lite V3 PROCPU"; @@ -76,6 +77,10 @@ }; }; +&flash0 { + reg = <0x0 DT_SIZE_M(4)>; +}; + &adc1 { status ="okay"; }; @@ -168,45 +173,6 @@ pinctrl-names = "default"; }; -&flash0 { - status = "okay"; - partitions { - compatible = "fixed-partitions"; - #address-cells = <1>; - #size-cells = <1>; - - /* Reserve 64kB for the bootloader */ - boot_partition: partition@0 { - label = "mcuboot"; - reg = <0x00000000 0x00010000>; - read-only; - }; - - /* Reserve 1024kB for the application in slot 0 */ - slot0_partition: partition@10000 { - label = "image-0"; - reg = <0x00010000 0x00100000>; - }; - - /* Reserve 1024kB for the application in slot 1 */ - slot1_partition: partition@110000 { - label = "image-1"; - reg = <0x00110000 0x00100000>; - }; - - /* Reserve 256kB for the scratch partition */ - scratch_partition: partition@210000 { - label = "image-scratch"; - reg = <0x00210000 0x00040000>; - }; - - storage_partition: partition@250000 { - label = "storage"; - reg = <0x00250000 0x00006000>; - }; - }; -}; - &esp32_bt_hci { status = "okay"; }; diff --git a/boards/intel/adsp/twister.yaml b/boards/intel/adsp/twister.yaml index 1bef7d267ad4f84..866f8ff7a90cc92 100644 --- a/boards/intel/adsp/twister.yaml +++ b/boards/intel/adsp/twister.yaml @@ -20,20 +20,23 @@ variants: twister: false intel_adsp/ace20_lnl/sim: type: sim - simulation: custom - simulation_exec: acesim + simulation: + - name: custom + exec: acesim testing: timeout_multiplier: 4 intel_adsp/ace15_mtpm/sim: type: sim - simulation: custom - simulation_exec: acesim + simulation: + - name: custom + exec: acesim testing: timeout_multiplier: 4 intel_adsp/ace30/ptl/sim: type: sim - simulation: custom - simulation_exec: acesim + simulation: + - name: custom + exec: acesim toolchain: - xt-clang - zephyr diff --git a/boards/intel/ish/intel_ish_5_8_0.yaml b/boards/intel/ish/intel_ish_5_8_0.yaml index 566e7f21c1339f8..5713ed69ff89465 100644 --- a/boards/intel/ish/intel_ish_5_8_0.yaml +++ b/boards/intel/ish/intel_ish_5_8_0.yaml @@ -5,8 +5,9 @@ arch: x86 toolchain: - zephyr ram: 640 -simulation: simics -simulation_exec: simics +simulation: + - name: simics + exec: simics supported: - serial testing: diff --git a/boards/lilygo/ttgo_lora32/Kconfig.defconfig b/boards/lilygo/ttgo_lora32/Kconfig.defconfig deleted file mode 100644 index 228856d043612ed..000000000000000 --- a/boards/lilygo/ttgo_lora32/Kconfig.defconfig +++ /dev/null @@ -1,11 +0,0 @@ -# Lilygo ttgo LoRa32 board configuration - -# Copyright (c) 2024 Lothar Felten -# SPDX-License-Identifier: Apache-2.0 - -if BOARD_TTGO_LORA32_ESP32_PROCPU - -config ENTROPY_GENERATOR - default y - -endif # BOARD_TTGO_LORA32_ESP32_PROCPU diff --git a/boards/lilygo/ttgo_lora32/ttgo_lora32_esp32_appcpu.dts b/boards/lilygo/ttgo_lora32/ttgo_lora32_esp32_appcpu.dts index c5eb19c240f3d97..431572891342cb1 100644 --- a/boards/lilygo/ttgo_lora32/ttgo_lora32_esp32_appcpu.dts +++ b/boards/lilygo/ttgo_lora32/ttgo_lora32_esp32_appcpu.dts @@ -6,6 +6,7 @@ /dts-v1/; #include +#include / { model = "ttgo LoRa32 APPCPU"; @@ -25,42 +26,3 @@ &trng0 { status = "okay"; }; - -&flash0 { - status = "okay"; - partitions { - compatible = "fixed-partitions"; - #address-cells = <1>; - #size-cells = <1>; - - /* Reserve 60kB for the bootloader */ - boot_partition: partition@1000 { - label = "mcuboot"; - reg = <0x00001000 0x0000F000>; - read-only; - }; - - /* Reserve 1024kB for the application in slot 0 */ - slot0_partition: partition@10000 { - label = "image-0"; - reg = <0x00010000 0x00100000>; - }; - - /* Reserve 1024kB for the application in slot 1 */ - slot1_partition: partition@110000 { - label = "image-1"; - reg = <0x00110000 0x00100000>; - }; - - /* Reserve 256kB for the scratch partition */ - scratch_partition: partition@210000 { - label = "image-scratch"; - reg = <0x00210000 0x00040000>; - }; - - storage_partition: partition@250000 { - label = "storage"; - reg = <0x00250000 0x00006000>; - }; - }; -}; diff --git a/boards/lilygo/ttgo_lora32/ttgo_lora32_esp32_procpu.dts b/boards/lilygo/ttgo_lora32/ttgo_lora32_esp32_procpu.dts index 42782b142ac14e5..060278b50dc902c 100644 --- a/boards/lilygo/ttgo_lora32/ttgo_lora32_esp32_procpu.dts +++ b/boards/lilygo/ttgo_lora32/ttgo_lora32_esp32_procpu.dts @@ -8,6 +8,7 @@ #include #include "ttgo_lora32-pinctrl.dtsi" #include +#include / { model = "ttgo LoRa32 PROCPU"; @@ -147,42 +148,3 @@ }; }; }; - -&flash0 { - status = "okay"; - partitions { - compatible = "fixed-partitions"; - #address-cells = <1>; - #size-cells = <1>; - - /* Reserve 60kB for the bootloader */ - boot_partition: partition@1000 { - label = "mcuboot"; - reg = <0x00001000 0x0000F000>; - read-only; - }; - - /* Reserve 1024kB for the application in slot 0 */ - slot0_partition: partition@10000 { - label = "image-0"; - reg = <0x00010000 0x00100000>; - }; - - /* Reserve 1024kB for the application in slot 1 */ - slot1_partition: partition@110000 { - label = "image-1"; - reg = <0x00110000 0x00100000>; - }; - - /* Reserve 256kB for the scratch partition */ - scratch_partition: partition@210000 { - label = "image-scratch"; - reg = <0x00210000 0x00040000>; - }; - - storage_partition: partition@250000 { - label = "storage"; - reg = <0x00250000 0x00006000>; - }; - }; -}; diff --git a/boards/lilygo/ttgo_t8c3/ttgo_t8c3.dts b/boards/lilygo/ttgo_t8c3/ttgo_t8c3.dts index a38f5777762ddb1..3e2b0ab74fa1bbb 100644 --- a/boards/lilygo/ttgo_t8c3/ttgo_t8c3.dts +++ b/boards/lilygo/ttgo_t8c3/ttgo_t8c3.dts @@ -8,6 +8,7 @@ #include #include "ttgo_t8c3-pinctrl.dtsi" +#include / { model = "Lilygo TTGO T8-C3"; @@ -38,6 +39,10 @@ }; }; +&flash0 { + reg = <0x0 DT_SIZE_M(4)>; +}; + &uart0 { status = "okay"; current-speed = <115200>; @@ -97,37 +102,3 @@ &esp32_bt_hci{ status = "okay"; }; - -&flash0 { - partitions { - compatible = "fixed-partitions"; - #address-cells = <1>; - #size-cells = <1>; - - boot_partition: partition@0 { - label = "mcuboot"; - reg = <0x00000000 0x0000F000>; - read-only; - }; - - slot0_partition: partition@10000 { - label = "image-0"; - reg = <0x00010000 0x00100000>; - }; - - slot1_partition: partition@110000 { - label = "image-1"; - reg = <0x00110000 0x00100000>; - }; - - scratch_partition: partition@210000 { - label = "image-scratch"; - reg = <0x00210000 0x00040000>; - }; - - storage_partition: partition@250000 { - label = "storage"; - reg = <0x00250000 0x00006000>; - }; - }; -}; diff --git a/boards/lilygo/ttgo_t8s3/Kconfig b/boards/lilygo/ttgo_t8s3/Kconfig new file mode 100644 index 000000000000000..e0797e974b8526a --- /dev/null +++ b/boards/lilygo/ttgo_t8s3/Kconfig @@ -0,0 +1,7 @@ +# Copyright (c) 2024 Lothar Felten +# SPDX-License-Identifier: Apache-2.0 + +config HEAP_MEM_POOL_ADD_SIZE_BOARD + int + default 4096 if BOARD_TTGO_T8S3_ESP32S3_PROCPU + default 256 if BOARD_TTGO_T8S3_ESP32S3_APPCPU diff --git a/boards/lilygo/ttgo_t8s3/Kconfig.sysbuild b/boards/lilygo/ttgo_t8s3/Kconfig.sysbuild new file mode 100644 index 000000000000000..3a2d17ac5cfd067 --- /dev/null +++ b/boards/lilygo/ttgo_t8s3/Kconfig.sysbuild @@ -0,0 +1,10 @@ +# Copyright (c) 2023 Espressif Systems (Shanghai) Co., Ltd. +# SPDX-License-Identifier: Apache-2.0 + +choice BOOTLOADER + default BOOTLOADER_MCUBOOT +endchoice + +choice BOOT_SIGNATURE_TYPE + default BOOT_SIGNATURE_TYPE_NONE +endchoice diff --git a/boards/lilygo/ttgo_t8s3/Kconfig.ttgo_t8s3 b/boards/lilygo/ttgo_t8s3/Kconfig.ttgo_t8s3 new file mode 100644 index 000000000000000..d119b68f6cba4d4 --- /dev/null +++ b/boards/lilygo/ttgo_t8s3/Kconfig.ttgo_t8s3 @@ -0,0 +1,7 @@ +# Copyright 2024 Lothar Felten +# SPDX-License-Identifier: Apache-2.0 + +config BOARD_TTGO_T8S3 + select SOC_ESP32S3_WROOM_N16R8 + select SOC_ESP32S3_PROCPU if BOARD_TTGO_T8S3_ESP32S3_PROCPU + select SOC_ESP32S3_APPCPU if BOARD_TTGO_T8S3_ESP32S3_APPCPU diff --git a/boards/lilygo/ttgo_t8s3/board.cmake b/boards/lilygo/ttgo_t8s3/board.cmake new file mode 100644 index 000000000000000..2f04d1fe8861ea6 --- /dev/null +++ b/boards/lilygo/ttgo_t8s3/board.cmake @@ -0,0 +1,9 @@ +# SPDX-License-Identifier: Apache-2.0 + +if(NOT "${OPENOCD}" MATCHES "^${ESPRESSIF_TOOLCHAIN_PATH}/.*") + set(OPENOCD OPENOCD-NOTFOUND) +endif() +find_program(OPENOCD openocd PATHS ${ESPRESSIF_TOOLCHAIN_PATH}/openocd-esp32/bin NO_DEFAULT_PATH) + +include(${ZEPHYR_BASE}/boards/common/esp32.board.cmake) +include(${ZEPHYR_BASE}/boards/common/openocd.board.cmake) diff --git a/boards/lilygo/ttgo_t8s3/board.yml b/boards/lilygo/ttgo_t8s3/board.yml new file mode 100644 index 000000000000000..a6bed2be9153619 --- /dev/null +++ b/boards/lilygo/ttgo_t8s3/board.yml @@ -0,0 +1,6 @@ +board: + name: ttgo_t8s3 + full_name: TTGO T8-S3 + vendor: lilygo + socs: + - name: esp32s3 diff --git a/boards/lilygo/ttgo_t8s3/doc/img/ttgo_t8s3.webp b/boards/lilygo/ttgo_t8s3/doc/img/ttgo_t8s3.webp new file mode 100644 index 000000000000000..1ebfce3627ce53e Binary files /dev/null and b/boards/lilygo/ttgo_t8s3/doc/img/ttgo_t8s3.webp differ diff --git a/boards/lilygo/ttgo_t8s3/doc/index.rst b/boards/lilygo/ttgo_t8s3/doc/index.rst new file mode 100644 index 000000000000000..09455ed19a60563 --- /dev/null +++ b/boards/lilygo/ttgo_t8s3/doc/index.rst @@ -0,0 +1,229 @@ +.. zephyr:board:: ttgo_t8s3 + +Overview +******** + +Lilygo TTGO T8-S3 is an IoT mini development board based on the +Espressif ESP32-S3 WiFi/Bluetooth dual-mode chip. + +It features the following integrated components: + +- ESP32-S3 chip (240MHz dual core, Bluetooth LE, Wi-Fi) +- on board antenna and IPEX connector +- USB-C connector for power and communication +- MX 1.25mm 2-pin battery connector +- JST SH 1.0mm 4-pin UART connector +- SD card slot + +Functional Description +********************** +This board is based on the ESP32-S3 with 16MB of flash, WiFi and BLE support. It +has an USB-C port for programming and debugging, integrated battery charging +and an on-board antenna. The fitted U.FL external antenna connector can be +enabled by moving a 0-ohm resistor. + +Connections and IOs +=================== + +The ``ttgo_t8s3`` board target supports the following hardware features: + ++------------+------------+-------------------------------------+ +| Interface | Controller | Driver/Component | ++============+============+=====================================+ +| UART | on-chip | serial port | ++------------+------------+-------------------------------------+ +| GPIO | on-chip | gpio | ++------------+------------+-------------------------------------+ +| PINMUX | on-chip | pinmux | ++------------+------------+-------------------------------------+ +| USB-JTAG | on-chip | hardware interface | ++------------+------------+-------------------------------------+ +| SPI Master | on-chip | spi, sdmmc | ++------------+------------+-------------------------------------+ +| TWAI/CAN | on-chip | can | ++------------+------------+-------------------------------------+ +| ADC | on-chip | adc | ++------------+------------+-------------------------------------+ +| Timers | on-chip | counter | ++------------+------------+-------------------------------------+ +| Watchdog | on-chip | watchdog | ++------------+------------+-------------------------------------+ +| TRNG | on-chip | entropy | ++------------+------------+-------------------------------------+ +| LEDC | on-chip | pwm | ++------------+------------+-------------------------------------+ +| MCPWM | on-chip | pwm | ++------------+------------+-------------------------------------+ +| PCNT | on-chip | qdec | ++------------+------------+-------------------------------------+ +| GDMA | on-chip | dma | ++------------+------------+-------------------------------------+ +| USB-CDC | on-chip | serial | ++------------+------------+-------------------------------------+ + +Start Application Development +***************************** + +Before powering up your Lilygo TTGO T8-S3, please make sure that the board is in good +condition with no obvious signs of damage. + +System requirements +******************* + +Prerequisites +============= + +Espressif HAL requires WiFi and Bluetooth binary blobs in order work. Run the command +below to retrieve those files. + +.. code-block:: console + + west blobs fetch hal_espressif + +.. note:: + + It is recommended running the command above after :file:`west update`. + +Building & Flashing +******************* + +Simple boot +=========== + +The board could be loaded using the single binary image, without 2nd stage bootloader. +It is the default option when building the application without additional configuration. + +.. note:: + + Simple boot does not provide any security features nor OTA updates. + +MCUboot bootloader +================== + +User may choose to use MCUboot bootloader instead. In that case the bootloader +must be built (and flashed) at least once. + +There are two options to be used when building an application: + +1. Sysbuild +2. Manual build + +.. note:: + + User can select the MCUboot bootloader by adding the following line + to the board default configuration file. + + .. code-block:: cfg + + CONFIG_BOOTLOADER_MCUBOOT=y + +Sysbuild +======== + +The sysbuild makes possible to build and flash all necessary images needed to +bootstrap the board with the ESP32 SoC. + +To build the sample application using sysbuild use the command: + +.. zephyr-app-commands:: + :tool: west + :zephyr-app: samples/hello_world + :board: ttgo_t8s3/esp32s3/procpu + :goals: build + :west-args: --sysbuild + :compact: + +By default, the ESP32 sysbuild creates bootloader (MCUboot) and application +images. But it can be configured to create other kind of images. + +Build directory structure created by sysbuild is different from traditional +Zephyr build. Output is structured by the domain subdirectories: + +.. code-block:: + + build/ + ├── hello_world + │   └── zephyr + │   ├── zephyr.elf + │   └── zephyr.bin + ├── mcuboot + │ └── zephyr + │ ├── zephyr.elf + │ └── zephyr.bin + └── domains.yaml + +.. note:: + + With ``--sysbuild`` option the bootloader will be re-build and re-flash + every time the pristine build is used. + +For more information about the system build please read the :ref:`sysbuild` documentation. + +Manual build +============ + +During the development cycle, it is intended to build & flash as quickly possible. +For that reason, images can be built one at a time using traditional build. + +The instructions following are relevant for both manual build and sysbuild. +The only difference is the structure of the build directory. + +.. note:: + + Remember that bootloader (MCUboot) needs to be flash at least once. + +Build and flash applications as usual (see :ref:`build_an_application` and +:ref:`application_run` for more details). + +.. zephyr-app-commands:: + :zephyr-app: samples/hello_world + :board: ttgo_t8s3/esp32s3/procpu + :goals: build + +The usual ``flash`` target will work with the ``ttgo_t8s3`` board target +configuration. Here is an example for the :zephyr:code-sample:`hello_world` +application. + +.. zephyr-app-commands:: + :zephyr-app: samples/hello_world + :board: ttgo_t8s3/esp32s3/procpu + :goals: flash + +The default baud rate for the Lilygo TTGO T8-S3 is set to 1500000bps. If experiencing issues when flashing, +try using different values by using ``--esp-baud-rate `` option during +``west flash`` (e.g. ``west flash --esp-baud-rate 115200``). + +You can also open the serial monitor using the following command: + +.. code-block:: shell + + west espressif monitor + +After the board has automatically reset and booted, you should see the following +message in the monitor: + +.. code-block:: console + + ***** Booting Zephyr OS vx.x.x-xxx-gxxxxxxxxxxxx ***** + Hello World! ttgo_t8s3 + +Code samples +============ + +The following code samples will run out of the box on the TTGO T8-S3 board: + +* :zephyr:code-sample:`wifi-shell` +* :zephyr:code-sample:`fs` + + +References +********** + +.. target-notes:: + +.. _`Lilygo TTGO T8-S3 schematic`: https://github.com/Xinyuan-LilyGO/T8-S3/blob/main/schematic/T8_S3_V1.0.pdf +.. _`Lilygo github repo`: https://github.com/Xinyuan-LilyGo +.. _`ESP32-S3 Datasheet`: https://www.espressif.com/sites/default/files/documentation/esp32-s3-mini-1_mini-1u_datasheet_en.pdf +.. _`ESP32-S3 Technical Reference Manual`: https://www.espressif.com/sites/default/files/documentation/esp32-s3_technical_reference_manual_en.pdf +.. _`OpenOCD ESP32`: https://github.com/espressif/openocd-esp32/releases +.. _`JTAG debugging for ESP32-S3`: https://docs.espressif.com/projects/esp-idf/en/latest/esp32s3/api-guides/jtag-debugging/ diff --git a/boards/lilygo/ttgo_t8s3/support/openocd.cfg b/boards/lilygo/ttgo_t8s3/support/openocd.cfg new file mode 100644 index 000000000000000..0b2c4909fe0e0f3 --- /dev/null +++ b/boards/lilygo/ttgo_t8s3/support/openocd.cfg @@ -0,0 +1,7 @@ +set ESP_RTOS none +set ESP32_ONLYCPU 1 + +source [find interface/esp_usb_jtag.cfg] + +source [find target/esp32s3.cfg] +adapter_khz 5000 diff --git a/boards/lilygo/ttgo_t8s3/ttgo_t8s3-pinctrl.dtsi b/boards/lilygo/ttgo_t8s3/ttgo_t8s3-pinctrl.dtsi new file mode 100644 index 000000000000000..7b6d46e474c8f2e --- /dev/null +++ b/boards/lilygo/ttgo_t8s3/ttgo_t8s3-pinctrl.dtsi @@ -0,0 +1,63 @@ +/* + * Copyright (c) 2024 Lothar Felten + * + * SPDX-License-Identifier: Apache-2.0 + */ + +#include +#include +#include + +&pinctrl { + uart0_default: uart0_default { + group1 { + pinmux = ; + output-high; + }; + group2 { + pinmux = ; + bias-pull-up; + }; + }; + + i2c0_default: i2c0_default { + group1 { + pinmux = , + ; + bias-pull-up; + drive-open-drain; + output-high; + }; + }; + + spim2_default: spim2_default { + group1 { + pinmux = , + , + ; + }; + group2 { + pinmux = ; + output-low; + }; + }; + + spim3_default: spim3_default { + group1 { + pinmux = , + , + ; + }; + group2 { + pinmux = ; + output-low; + }; + }; + + twai_default: twai_default { + group1 { + pinmux = , + ; + }; + }; +}; diff --git a/boards/lilygo/ttgo_t8s3/ttgo_t8s3_appcpu.dts b/boards/lilygo/ttgo_t8s3/ttgo_t8s3_appcpu.dts new file mode 100644 index 000000000000000..fe07757f5cf474e --- /dev/null +++ b/boards/lilygo/ttgo_t8s3/ttgo_t8s3_appcpu.dts @@ -0,0 +1,30 @@ +/* + * Copyright (c) 2023 Espressif Systems (Shanghai) Co., Ltd. + * + * SPDX-License-Identifier: Apache-2.0 + */ +/dts-v1/; + +#include +#include + +/ { + model = "TTGO T8S3 APPCPU"; + compatible = "espressif,esp32s3"; + + chosen { + zephyr,sram = &sram0; + zephyr,ipc_shm = &shm0; + zephyr,ipc = &ipm0; + zephyr,flash = &flash0; + zephyr,code-partition = &slot0_appcpu_partition; + }; +}; + +&trng0 { + status = "okay"; +}; + +&ipm0 { + status = "okay"; +}; diff --git a/boards/lilygo/ttgo_t8s3/ttgo_t8s3_appcpu.yaml b/boards/lilygo/ttgo_t8s3/ttgo_t8s3_appcpu.yaml new file mode 100644 index 000000000000000..c64689ec4f7c82b --- /dev/null +++ b/boards/lilygo/ttgo_t8s3/ttgo_t8s3_appcpu.yaml @@ -0,0 +1,27 @@ +identifier: ttgo_t8s3/esp32s3/appcpu +name: TTGO T8S3 APPCPU +type: mcu +arch: xtensa +toolchain: + - zephyr +supported: + - uart +testing: + ignore_tags: + - net + - bluetooth + - flash + - cpp + - posix + - watchdog + - logging + - kernel + - pm + - gpio + - crypto + - eeprom + - heap + - cmsis_rtos + - jwt + - zdsp +vendor: lilygo diff --git a/boards/lilygo/ttgo_t8s3/ttgo_t8s3_appcpu_defconfig b/boards/lilygo/ttgo_t8s3/ttgo_t8s3_appcpu_defconfig new file mode 100644 index 000000000000000..9abf2ff0430aba3 --- /dev/null +++ b/boards/lilygo/ttgo_t8s3/ttgo_t8s3_appcpu_defconfig @@ -0,0 +1,4 @@ +# SPDX-License-Identifier: Apache-2.0 + +CONFIG_MAIN_STACK_SIZE=2048 +CONFIG_CLOCK_CONTROL=y diff --git a/boards/lilygo/ttgo_t8s3/ttgo_t8s3_procpu.dts b/boards/lilygo/ttgo_t8s3/ttgo_t8s3_procpu.dts new file mode 100644 index 000000000000000..a034a9cb49a4e8f --- /dev/null +++ b/boards/lilygo/ttgo_t8s3/ttgo_t8s3_procpu.dts @@ -0,0 +1,146 @@ +/* + * Copyright (c) 2022 Espressif Systems (Shanghai) Co., Ltd. + * + * SPDX-License-Identifier: Apache-2.0 + */ +/dts-v1/; + +#include +#include "ttgo_t8s3-pinctrl.dtsi" +#include +#include +#include + +/ { + model = "TTGO T8S3 PROCPU"; + compatible = "espressif,esp32s3"; + + aliases { + i2c-0 = &i2c0; + watchdog0 = &wdt0; + sdhc0 = &sd0; + uart-0 = &uart0; + sw0 = &button0; + }; + + chosen { + zephyr,sram = &sram0; + /* console can be UART or USB CDC */ + /* zephyr,console = &uart0; */ + /* zephyr,shell-uart = &uart0; */ + zephyr,console = &usb_serial; + zephyr,shell-uart = &usb_serial; + zephyr,flash = &flash0; + zephyr,code-partition = &slot0_partition; + zephyr,bt-hci = &esp32_bt_hci; + }; + + buttons { + compatible = "gpio-keys"; + button0: button_0 { + gpios = <&gpio0 0 (GPIO_PULL_UP | GPIO_ACTIVE_LOW)>; + label = "BOOT Button"; + zephyr,code = ; + }; + }; +}; + +&uart0 { + status = "okay"; + current-speed = <115200>; + pinctrl-0 = <&uart0_default>; + pinctrl-names = "default"; +}; + +&gpio0 { + status = "okay"; +}; + +&gpio1 { + status = "okay"; +}; + +&touch { + debounce-interval-ms = <30>; + href-microvolt = <2700000>; + lref-microvolt = <500000>; + href-atten-microvolt = <1000000>; + filter-mode = ; + filter-debounce-cnt = <1>; + filter-noise-thr = ; + filter-jitter-step = <4>; + filter-smooth-level = ; +}; + +&i2c0 { + clock-frequency = ; + pinctrl-0 = <&i2c0_default>; + pinctrl-names = "default"; +}; + +&spi2 { + #address-cells = <1>; + #size-cells = <0>; + status = "okay"; + pinctrl-0 = <&spim2_default>; + pinctrl-names = "default"; + /* dma-enabled; TODO */ + clock-frequency = <20000000>; + cs-gpios = <&gpio0 10 GPIO_ACTIVE_LOW>; + sd0: sd@0 { + compatible = "zephyr,sdhc-spi-slot"; + reg = <0>; + status = "okay"; + spi-max-frequency = <20000000>; + mmc { + compatible = "zephyr,sdmmc-disk"; + disk-name = "SD"; + status = "okay"; + }; + }; +}; + +&spi3 { + #address-cells = <1>; + #size-cells = <0>; + status = "okay"; + pinctrl-0 = <&spim3_default>; + pinctrl-names = "default"; +}; + +&twai { + pinctrl-0 = <&twai_default>; + pinctrl-names = "default"; +}; + +&usb_serial { + status = "okay"; +}; + +&timer0 { + status = "okay"; +}; + +&timer1 { + status = "okay"; +}; + +&timer2 { + status = "okay"; +}; + +&timer3 { + status = "okay"; +}; + +&wdt0 { + status = "okay"; +}; + +&trng0 { + status = "okay"; +}; + +&esp32_bt_hci { + status = "okay"; +}; diff --git a/boards/lilygo/ttgo_t8s3/ttgo_t8s3_procpu.yaml b/boards/lilygo/ttgo_t8s3/ttgo_t8s3_procpu.yaml new file mode 100644 index 000000000000000..32ab521a903b11f --- /dev/null +++ b/boards/lilygo/ttgo_t8s3/ttgo_t8s3_procpu.yaml @@ -0,0 +1,25 @@ +identifier: ttgo_t8s3/esp32s3/procpu +name: TTGO T8S3 PROCPU +type: mcu +arch: xtensa +toolchain: + - zephyr +supported: + - gpio + - uart + - i2c + - i2s + - spi + - can + - counter + - watchdog + - entropy + - pwm + - dma + - input + - video +testing: + ignore_tags: + - net + - bluetooth +vendor: lilygo diff --git a/boards/lilygo/ttgo_t8s3/ttgo_t8s3_procpu_defconfig b/boards/lilygo/ttgo_t8s3/ttgo_t8s3_procpu_defconfig new file mode 100644 index 000000000000000..723de34c4713681 --- /dev/null +++ b/boards/lilygo/ttgo_t8s3/ttgo_t8s3_procpu_defconfig @@ -0,0 +1,8 @@ +# SPDX-License-Identifier: Apache-2.0 + +CONFIG_MAIN_STACK_SIZE=2048 +CONFIG_CONSOLE=y +CONFIG_SERIAL=y +CONFIG_UART_CONSOLE=y +CONFIG_GPIO=y +CONFIG_CLOCK_CONTROL=y diff --git a/boards/luatos/esp32c3_luatos_core/esp32c3_luatos_core.dtsi b/boards/luatos/esp32c3_luatos_core/esp32c3_luatos_core.dtsi index c7b5b6275475901..f000b61f3162e3e 100644 --- a/boards/luatos/esp32c3_luatos_core/esp32c3_luatos_core.dtsi +++ b/boards/luatos/esp32c3_luatos_core/esp32c3_luatos_core.dtsi @@ -7,6 +7,7 @@ #include #include "esp32c3_luatos_core-pinctrl.dtsi" #include +#include / { model = "ESP32C3 Luatos Core"; @@ -92,45 +93,6 @@ pinctrl-names = "default"; }; -&flash0 { - status = "okay"; - partitions { - compatible = "fixed-partitions"; - #address-cells = <1>; - #size-cells = <1>; - - /* Reserve 60kB for the bootloader */ - boot_partition: partition@0 { - label = "mcuboot"; - reg = <0x00000000 0x0000F000>; - read-only; - }; - - /* Reserve 1024kB for the application in slot 0 */ - slot0_partition: partition@10000 { - label = "image-0"; - reg = <0x00010000 0x00100000>; - }; - - /* Reserve 1024kB for the application in slot 1 */ - slot1_partition: partition@110000 { - label = "image-1"; - reg = <0x00110000 0x00100000>; - }; - - /* Reserve 256kB for the scratch partition */ - scratch_partition: partition@210000 { - label = "image-scratch"; - reg = <0x00210000 0x00040000>; - }; - - storage_partition: partition@250000 { - label = "storage"; - reg = <0x00250000 0x00006000>; - }; - }; -}; - &esp32_bt_hci { status = "okay"; }; diff --git a/boards/luatos/esp32s3_luatos_core/esp32s3_luatos_core_appcpu.dts b/boards/luatos/esp32s3_luatos_core/esp32s3_luatos_core_appcpu.dts index 611a3b648492b31..642949948cf6cad 100644 --- a/boards/luatos/esp32s3_luatos_core/esp32s3_luatos_core_appcpu.dts +++ b/boards/luatos/esp32s3_luatos_core/esp32s3_luatos_core_appcpu.dts @@ -5,7 +5,7 @@ */ /dts-v1/; -#include +#include #include / { diff --git a/boards/luatos/esp32s3_luatos_core/esp32s3_luatos_core_appcpu_usb.dts b/boards/luatos/esp32s3_luatos_core/esp32s3_luatos_core_appcpu_usb.dts index 8a383ad135d9b74..a5dc8a03792361d 100644 --- a/boards/luatos/esp32s3_luatos_core/esp32s3_luatos_core_appcpu_usb.dts +++ b/boards/luatos/esp32s3_luatos_core/esp32s3_luatos_core_appcpu_usb.dts @@ -5,7 +5,7 @@ */ /dts-v1/; -#include +#include #include / { diff --git a/boards/m5stack/m5stack_atom_lite/m5stack_atom_lite_appcpu.dts b/boards/m5stack/m5stack_atom_lite/m5stack_atom_lite_appcpu.dts index f5db6e76116e077..e9fee5269953494 100644 --- a/boards/m5stack/m5stack_atom_lite/m5stack_atom_lite_appcpu.dts +++ b/boards/m5stack/m5stack_atom_lite/m5stack_atom_lite_appcpu.dts @@ -6,6 +6,7 @@ /dts-v1/; #include +#include / { model = "M5Stack Atom Lite APPCPU"; @@ -25,42 +26,3 @@ &trng0 { status = "okay"; }; - -&flash0 { - status = "okay"; - partitions { - compatible = "fixed-partitions"; - #address-cells = <1>; - #size-cells = <1>; - - /* Reserve 60kB for the bootloader */ - boot_partition: partition@1000 { - label = "mcuboot"; - reg = <0x00001000 0x0000F000>; - read-only; - }; - - /* Reserve 1024kB for the application in slot 0 */ - slot0_partition: partition@10000 { - label = "image-0"; - reg = <0x00010000 0x00100000>; - }; - - /* Reserve 1024kB for the application in slot 1 */ - slot1_partition: partition@110000 { - label = "image-1"; - reg = <0x00110000 0x00100000>; - }; - - /* Reserve 256kB for the scratch partition */ - scratch_partition: partition@210000 { - label = "image-scratch"; - reg = <0x00210000 0x00040000>; - }; - - storage_partition: partition@250000 { - label = "storage"; - reg = <0x00250000 0x00006000>; - }; - }; -}; diff --git a/boards/m5stack/m5stack_atom_lite/m5stack_atom_lite_procpu.dts b/boards/m5stack/m5stack_atom_lite/m5stack_atom_lite_procpu.dts index 3a8557f67943664..884fdf949ccf257 100644 --- a/boards/m5stack/m5stack_atom_lite/m5stack_atom_lite_procpu.dts +++ b/boards/m5stack/m5stack_atom_lite/m5stack_atom_lite_procpu.dts @@ -13,6 +13,7 @@ #include #include #include +#include / { model = "M5Stack ATOM Lite PROCPU"; @@ -143,45 +144,6 @@ status = "okay"; }; -&flash0 { - status = "okay"; - partitions { - compatible = "fixed-partitions"; - #address-cells = <1>; - #size-cells = <1>; - - /* Reserve 60kB for the bootloader */ - boot_partition: partition@1000 { - label = "mcuboot"; - reg = <0x00001000 0x0000F000>; - read-only; - }; - - /* Reserve 1024kB for the application in slot 0 */ - slot0_partition: partition@10000 { - label = "image-0"; - reg = <0x00010000 0x00100000>; - }; - - /* Reserve 1024kB for the application in slot 1 */ - slot1_partition: partition@110000 { - label = "image-1"; - reg = <0x00110000 0x00100000>; - }; - - /* Reserve 256kB for the scratch partition */ - scratch_partition: partition@210000 { - label = "image-scratch"; - reg = <0x00210000 0x00040000>; - }; - - storage_partition: partition@250000 { - label = "storage"; - reg = <0x00250000 0x00006000>; - }; - }; -}; - &esp32_bt_hci { status = "okay"; }; diff --git a/boards/m5stack/m5stack_atoms3/m5stack_atoms3_appcpu.dts b/boards/m5stack/m5stack_atoms3/m5stack_atoms3_appcpu.dts index ab05fa95eba638c..83eb4941fe8e619 100644 --- a/boards/m5stack/m5stack_atoms3/m5stack_atoms3_appcpu.dts +++ b/boards/m5stack/m5stack_atoms3/m5stack_atoms3_appcpu.dts @@ -5,7 +5,7 @@ */ /dts-v1/; -#include +#include #include / { diff --git a/boards/m5stack/m5stack_atoms3/m5stack_atoms3_procpu.dts b/boards/m5stack/m5stack_atoms3/m5stack_atoms3_procpu.dts index dec42a668986e99..cf12d00387d5628 100644 --- a/boards/m5stack/m5stack_atoms3/m5stack_atoms3_procpu.dts +++ b/boards/m5stack/m5stack_atoms3/m5stack_atoms3_procpu.dts @@ -85,7 +85,7 @@ nvgam-param = [d0 00 02 07 0a 28 31 54 47 0e 1c 17 1b 1e]; ram-param = [00 E0]; rgb-param = [40 02 14]; - mipi-mode = ; + mipi-mode = "MIPI_DBI_MODE_SPI_4WIRE"; }; }; diff --git a/boards/m5stack/m5stack_atoms3_lite/m5stack_atoms3_lite_appcpu.dts b/boards/m5stack/m5stack_atoms3_lite/m5stack_atoms3_lite_appcpu.dts index 9eab1cb663de667..0842908542a065c 100644 --- a/boards/m5stack/m5stack_atoms3_lite/m5stack_atoms3_lite_appcpu.dts +++ b/boards/m5stack/m5stack_atoms3_lite/m5stack_atoms3_lite_appcpu.dts @@ -5,7 +5,7 @@ */ /dts-v1/; -#include +#include #include / { diff --git a/boards/m5stack/m5stack_atoms3_lite/m5stack_atoms3_lite_procpu.dts b/boards/m5stack/m5stack_atoms3_lite/m5stack_atoms3_lite_procpu.dts index 457d4fa62877354..e224b50376222c2 100644 --- a/boards/m5stack/m5stack_atoms3_lite/m5stack_atoms3_lite_procpu.dts +++ b/boards/m5stack/m5stack_atoms3_lite/m5stack_atoms3_lite_procpu.dts @@ -47,6 +47,7 @@ &usb_serial { status = "okay"; }; + &uart0 { status = "okay"; current-speed = <115200>; diff --git a/boards/m5stack/m5stack_core2/m5stack_core2_appcpu.dts b/boards/m5stack/m5stack_core2/m5stack_core2_appcpu.dts index 875d0eaea2ad06a..3a50334db214374 100644 --- a/boards/m5stack/m5stack_core2/m5stack_core2_appcpu.dts +++ b/boards/m5stack/m5stack_core2/m5stack_core2_appcpu.dts @@ -6,6 +6,7 @@ /dts-v1/; #include +#include / { model = "M5Stack Core2 APPCPU"; @@ -25,42 +26,3 @@ &trng0 { status = "okay"; }; - -&flash0 { - status = "okay"; - partitions { - compatible = "fixed-partitions"; - #address-cells = <1>; - #size-cells = <1>; - - /* Reserve 60kB for the bootloader */ - boot_partition: partition@1000 { - label = "mcuboot"; - reg = <0x00001000 0x0000F000>; - read-only; - }; - - /* Reserve 1024kB for the application in slot 0 */ - slot0_partition: partition@10000 { - label = "image-0"; - reg = <0x00010000 0x00100000>; - }; - - /* Reserve 1024kB for the application in slot 1 */ - slot1_partition: partition@110000 { - label = "image-1"; - reg = <0x00110000 0x00100000>; - }; - - /* Reserve 256kB for the scratch partition */ - scratch_partition: partition@210000 { - label = "image-scratch"; - reg = <0x00210000 0x00040000>; - }; - - storage_partition: partition@250000 { - label = "storage"; - reg = <0x00250000 0x00006000>; - }; - }; -}; diff --git a/boards/m5stack/m5stack_core2/m5stack_core2_procpu.dts b/boards/m5stack/m5stack_core2/m5stack_core2_procpu.dts index 5ab9ad9eacd6a62..050f4d885792e2c 100644 --- a/boards/m5stack/m5stack_core2/m5stack_core2_procpu.dts +++ b/boards/m5stack/m5stack_core2/m5stack_core2_procpu.dts @@ -11,6 +11,7 @@ #include "m5stack_mbus_connectors.dtsi" #include #include +#include / { model = "M5Stack Core2 PROCPU"; @@ -75,6 +76,10 @@ }; }; +&flash0 { + reg = <0x0 DT_SIZE_M(16)>; +}; + &psram0 { reg = <0x3f800000 DT_SIZE_M(8)>; status = "disabled"; @@ -245,48 +250,6 @@ status = "okay"; }; -&flash0 { - status = "okay"; - reg = <0 DT_SIZE_M(16)>; - - partitions { - compatible = "fixed-partitions"; - #address-cells = <1>; - #size-cells = <1>; - - /* Reserve 60kB for the bootloader */ - boot_partition: partition@1000 { - label = "mcuboot"; - reg = <0x00001000 0x0000F000>; - read-only; - }; - - /* Reserve 1024kB for the application in slot 0 */ - slot0_partition: partition@10000 { - label = "image-0"; - reg = <0x00010000 0x00100000>; - }; - - /* Reserve 1024kB for the application in slot 1 */ - slot1_partition: partition@110000 { - label = "image-1"; - reg = <0x00110000 0x00100000>; - }; - - /* Reserve 256kB for the scratch partition */ - scratch_partition: partition@210000 { - label = "image-scratch"; - reg = <0x00210000 0x00040000>; - }; - - /* 14MB storage */ - storage_partition: partition@250000 { - label = "storage"; - reg = <0x00250000 0x00db0000>; - }; - }; -}; - &esp32_bt_hci { status = "okay"; }; diff --git a/boards/m5stack/m5stack_cores3/m5stack_cores3_appcpu.dts b/boards/m5stack/m5stack_cores3/m5stack_cores3_appcpu.dts index 236ffd0a3a85dc6..1dac83cc46deafe 100644 --- a/boards/m5stack/m5stack_cores3/m5stack_cores3_appcpu.dts +++ b/boards/m5stack/m5stack_cores3/m5stack_cores3_appcpu.dts @@ -5,7 +5,7 @@ */ /dts-v1/; -#include +#include #include #include "m5stack_cores3-pinctrl.dtsi" diff --git a/boards/m5stack/m5stack_stamps3/m5stack_stamps3_appcpu.dts b/boards/m5stack/m5stack_stamps3/m5stack_stamps3_appcpu.dts index d12429f633e6231..3600c76bde9c4d6 100644 --- a/boards/m5stack/m5stack_stamps3/m5stack_stamps3_appcpu.dts +++ b/boards/m5stack/m5stack_stamps3/m5stack_stamps3_appcpu.dts @@ -5,7 +5,7 @@ */ /dts-v1/; -#include +#include #include / { diff --git a/boards/m5stack/m5stickc_plus/m5stickc_plus_appcpu.dts b/boards/m5stack/m5stickc_plus/m5stickc_plus_appcpu.dts index c2764a78f34029d..e514c55744071bb 100644 --- a/boards/m5stack/m5stickc_plus/m5stickc_plus_appcpu.dts +++ b/boards/m5stack/m5stickc_plus/m5stickc_plus_appcpu.dts @@ -5,7 +5,7 @@ */ /dts-v1/; -#include +#include #include / { diff --git a/boards/m5stack/m5stickc_plus/m5stickc_plus_procpu.dts b/boards/m5stack/m5stickc_plus/m5stickc_plus_procpu.dts index 940d888bfd26447..3575639697311fe 100644 --- a/boards/m5stack/m5stickc_plus/m5stickc_plus_procpu.dts +++ b/boards/m5stack/m5stickc_plus/m5stickc_plus_procpu.dts @@ -10,7 +10,7 @@ #include #include #include -#include +#include / { model = "M5StickC Plus PROCPU"; @@ -96,7 +96,7 @@ nvgam-param = [d0 00 02 07 0a 28 31 54 47 0e 1c 17 1b 1e]; ram-param = [00 F0]; rgb-param = [40 02 14]; - mipi-mode = ; + mipi-mode = "MIPI_DBI_MODE_SPI_4WIRE"; }; }; }; diff --git a/boards/m5stack/stamp_c3/stamp_c3.dts b/boards/m5stack/stamp_c3/stamp_c3.dts index ef026e94454414f..e4b97e586501642 100644 --- a/boards/m5stack/stamp_c3/stamp_c3.dts +++ b/boards/m5stack/stamp_c3/stamp_c3.dts @@ -9,6 +9,7 @@ #include #include "stamp_c3-pinctrl.dtsi" #include +#include / { model = "M5Stack STAMP-C3"; @@ -92,45 +93,6 @@ pinctrl-names = "default"; }; -&flash0 { - status = "okay"; - partitions { - compatible = "fixed-partitions"; - #address-cells = <1>; - #size-cells = <1>; - - /* Reserve 60kB for the bootloader */ - boot_partition: partition@0 { - label = "mcuboot"; - reg = <0x00000000 0x0000F000>; - read-only; - }; - - /* Reserve 1024kB for the application in slot 0 */ - slot0_partition: partition@10000 { - label = "image-0"; - reg = <0x00010000 0x00100000>; - }; - - /* Reserve 1024kB for the application in slot 1 */ - slot1_partition: partition@110000 { - label = "image-1"; - reg = <0x00110000 0x00100000>; - }; - - /* Reserve 256kB for the scratch partition */ - scratch_partition: partition@210000 { - label = "image-scratch"; - reg = <0x00210000 0x00040000>; - }; - - storage_partition: partition@250000 { - label = "storage"; - reg = <0x00250000 0x00006000>; - }; - }; -}; - &esp32_bt_hci { status = "okay"; }; diff --git a/boards/microchip/m2gl025_miv/m2gl025_miv.yaml b/boards/microchip/m2gl025_miv/m2gl025_miv.yaml index 4ba9e126a7feaa2..692892d248dd55f 100644 --- a/boards/microchip/m2gl025_miv/m2gl025_miv.yaml +++ b/boards/microchip/m2gl025_miv/m2gl025_miv.yaml @@ -5,8 +5,9 @@ arch: riscv toolchain: - zephyr ram: 64 -simulation: renode -simulation_exec: renode +simulation: + - name: renode + exec: renode testing: default: true ignore_tags: diff --git a/boards/native/native_posix/irq_handler.c b/boards/native/native_posix/irq_handler.c index 56ce6931c260bc6..69a1f131dcbf2ba 100644 --- a/boards/native/native_posix/irq_handler.c +++ b/boards/native/native_posix/irq_handler.c @@ -105,7 +105,7 @@ void posix_irq_handler(void) */ if (may_swap && (hw_irq_ctrl_get_cur_prio() == 256) - && (_kernel.ready_q.cache) && (_kernel.ready_q.cache != _current)) { + && (_kernel.ready_q.cache) && (_kernel.ready_q.cache != arch_current_thread())) { (void)z_swap_irqlock(irq_lock); } diff --git a/boards/native/native_posix/native_posix.yaml b/boards/native/native_posix/native_posix.yaml index 428cc3807bcaee9..28601c1647e6572 100644 --- a/boards/native/native_posix/native_posix.yaml +++ b/boards/native/native_posix/native_posix.yaml @@ -1,7 +1,8 @@ identifier: native_posix name: Native 32-bit POSIX port type: native -simulation: native +simulation: + - name: native arch: posix ram: 65536 flash: 65536 diff --git a/boards/native/native_posix/native_posix_native_64.yaml b/boards/native/native_posix/native_posix_native_64.yaml index ae4ca0460d8da57..5510fc9ac50952f 100644 --- a/boards/native/native_posix/native_posix_native_64.yaml +++ b/boards/native/native_posix/native_posix_native_64.yaml @@ -1,7 +1,8 @@ identifier: native_posix/native/64 name: Native 64-bit POSIX port type: native -simulation: native +simulation: + - name: native arch: posix ram: 65536 flash: 65536 diff --git a/boards/native/native_sim/irq_handler.c b/boards/native/native_sim/irq_handler.c index 38462b4b14a4281..c9a18f018639bc3 100644 --- a/boards/native/native_sim/irq_handler.c +++ b/boards/native/native_sim/irq_handler.c @@ -113,7 +113,7 @@ void posix_irq_handler(void) */ if (may_swap && (hw_irq_ctrl_get_cur_prio() == 256) - && (_kernel.ready_q.cache) && (_kernel.ready_q.cache != _current)) { + && (_kernel.ready_q.cache) && (_kernel.ready_q.cache != arch_current_thread())) { (void)z_swap_irqlock(irq_lock); } diff --git a/boards/native/native_sim/native_sim.yaml b/boards/native/native_sim/native_sim.yaml index bd131a43af79f0e..8a476ba2771a2aa 100644 --- a/boards/native/native_sim/native_sim.yaml +++ b/boards/native/native_sim/native_sim.yaml @@ -1,7 +1,8 @@ identifier: native_sim name: Native Simulation port - 32-bit type: native -simulation: native +simulation: + - name: native arch: posix ram: 65536 flash: 65536 diff --git a/boards/native/native_sim/native_sim_native_64.yaml b/boards/native/native_sim/native_sim_native_64.yaml index 0377e3f9b95949f..24a4bb082ea8a89 100644 --- a/boards/native/native_sim/native_sim_native_64.yaml +++ b/boards/native/native_sim/native_sim_native_64.yaml @@ -1,7 +1,8 @@ identifier: native_sim/native/64 name: Native Simulation port - 64-bit variant type: native -simulation: native +simulation: + - name: native arch: posix ram: 65536 flash: 65536 diff --git a/boards/native/nrf_bsim/doc/nrf54l15bsim.rst b/boards/native/nrf_bsim/doc/nrf54l15bsim.rst index eaabaf1cc4de1b8..ae8b29d2aecff41 100644 --- a/boards/native/nrf_bsim/doc/nrf54l15bsim.rst +++ b/boards/native/nrf_bsim/doc/nrf54l15bsim.rst @@ -52,6 +52,7 @@ This boards include models of some of the nRF54L15 SOC peripherals: * RTC (Real Time Counter) * TEMP (Temperature sensor) * TIMER +* UARTE (UART with Easy DMA) * UICR (User Information Configuration Registers) and will use the same drivers as the nrf54l15dk targets for these. diff --git a/boards/native/nrf_bsim/irq_handler.c b/boards/native/nrf_bsim/irq_handler.c index 2d6ad4f66b7c431..c794395fb9a73db 100644 --- a/boards/native/nrf_bsim/irq_handler.c +++ b/boards/native/nrf_bsim/irq_handler.c @@ -135,7 +135,7 @@ void posix_irq_handler(void) if (may_swap && (hw_irq_ctrl_get_cur_prio(cpu_n) == 256) && (CPU_will_be_awaken_from_WFE == false) - && (_kernel.ready_q.cache) && (_kernel.ready_q.cache != _current)) { + && (_kernel.ready_q.cache) && (_kernel.ready_q.cache != arch_current_thread())) { z_swap_irqlock(irq_lock); } diff --git a/boards/native/nrf_bsim/nrf52_bsim.yaml b/boards/native/nrf_bsim/nrf52_bsim.yaml index adff9a6add53384..d0b087de4c59363 100644 --- a/boards/native/nrf_bsim/nrf52_bsim.yaml +++ b/boards/native/nrf_bsim/nrf52_bsim.yaml @@ -2,7 +2,8 @@ identifier: nrf52_bsim name: NRF52 BabbleSim board type: native arch: posix -simulation: native +simulation: + - name: native env: - BSIM_OUT_PATH toolchain: diff --git a/boards/native/nrf_bsim/nrf5340bsim_nrf5340_cpuapp.yaml b/boards/native/nrf_bsim/nrf5340bsim_nrf5340_cpuapp.yaml index 9d31586454a7ff8..8509c052974a24e 100644 --- a/boards/native/nrf_bsim/nrf5340bsim_nrf5340_cpuapp.yaml +++ b/boards/native/nrf_bsim/nrf5340bsim_nrf5340_cpuapp.yaml @@ -2,7 +2,8 @@ identifier: nrf5340bsim/nrf5340/cpuapp name: NRF53 BabbleSim - Application Core target type: native arch: posix -simulation: native +simulation: + - name: native env: - BSIM_OUT_PATH toolchain: diff --git a/boards/native/nrf_bsim/nrf5340bsim_nrf5340_cpunet.yaml b/boards/native/nrf_bsim/nrf5340bsim_nrf5340_cpunet.yaml index a0d6d2caa443b30..05f9edf82dceede 100644 --- a/boards/native/nrf_bsim/nrf5340bsim_nrf5340_cpunet.yaml +++ b/boards/native/nrf_bsim/nrf5340bsim_nrf5340_cpunet.yaml @@ -2,7 +2,8 @@ identifier: nrf5340bsim/nrf5340/cpunet name: NRF53 Net Core BabbleSim board type: native arch: posix -simulation: native +simulation: + - name: native env: - BSIM_OUT_PATH toolchain: diff --git a/boards/native/nrf_bsim/nrf54l15bsim_nrf54l15_cpuapp.dts b/boards/native/nrf_bsim/nrf54l15bsim_nrf54l15_cpuapp.dts index fbfe0f0dc651214..cc1de29bd8a7e89 100644 --- a/boards/native/nrf_bsim/nrf54l15bsim_nrf54l15_cpuapp.dts +++ b/boards/native/nrf_bsim/nrf54l15bsim_nrf54l15_cpuapp.dts @@ -8,6 +8,7 @@ #include #include +#include <../boards/nordic/nrf54l15dk/nrf54l15dk_nrf54l_05_10_15-pinctrl.dtsi> / { model = "Nordic NRF54L15 BSIM NRF54L15 Application"; @@ -15,6 +16,7 @@ chosen { zephyr,entropy = &rng; + zephyr,bt-c2h-uart = &uart20; zephyr,flash-controller = &rram_controller; zephyr,flash = &cpuapp_rram; }; @@ -28,19 +30,15 @@ /delete-node/ memory@2002f000; peripheral@50000000 { /delete-node/ spi@4a000; - /delete-node/ uart@4a000; /delete-node/ vpr@4c000; /delete-node/ mailbox@0; /delete-node/ interrupt-controller@f0000000; /delete-node/ i2c@c6000; /delete-node/ spi@c6000; - /delete-node/ uart@c6000; /delete-node/ i2c@c7000; /delete-node/ spi@c7000; - /delete-node/ uart@c7000; /delete-node/ i2c@c8000; /delete-node/ spi@c8000; - /delete-node/ uart@c8000; /delete-node/ pwm@d2000; /delete-node/ pwm@d3000; /delete-node/ pwm@d4000; @@ -51,7 +49,6 @@ /delete-node/ qdec@e1000; /delete-node/ i2c@104000; /delete-node/ spi@104000; - /delete-node/ uart@104000; /delete-node/ watchdog@108000; /delete-node/ watchdog@109000; }; @@ -86,6 +83,20 @@ }; }; +&uart20 { + status = "okay"; + current-speed = <115200>; + pinctrl-0 = <&uart20_default>; + pinctrl-1 = <&uart20_sleep>; + pinctrl-names = "default", "sleep"; +}; + +&uart30 { + current-speed = <115200>; + pinctrl-0 = <&uart30_default>; + pinctrl-1 = <&uart30_sleep>; + pinctrl-names = "default", "sleep"; +}; &gpio0 { status = "okay"; diff --git a/boards/native/nrf_bsim/nrf54l15bsim_nrf54l15_cpuapp.yaml b/boards/native/nrf_bsim/nrf54l15bsim_nrf54l15_cpuapp.yaml index 6bbf4542660245a..143f237289f1cc7 100644 --- a/boards/native/nrf_bsim/nrf54l15bsim_nrf54l15_cpuapp.yaml +++ b/boards/native/nrf_bsim/nrf54l15bsim_nrf54l15_cpuapp.yaml @@ -2,7 +2,8 @@ identifier: nrf54l15bsim/nrf54l15/cpuapp name: NRF54L15 BabbleSim - Application Core target type: native arch: posix -simulation: native +simulation: + - name: native env: - BSIM_OUT_PATH toolchain: @@ -13,5 +14,4 @@ supported: testing: ignore_tags: - modem - - uart - bsim_skip_CI diff --git a/boards/native/nrf_bsim/soc/soc_secure.h b/boards/native/nrf_bsim/soc/soc_secure.h index a39c02435a8d906..06e9cc64993c42b 100644 --- a/boards/native/nrf_bsim/soc/soc_secure.h +++ b/boards/native/nrf_bsim/soc/soc_secure.h @@ -21,4 +21,10 @@ static inline void soc_secure_read_deviceid(uint32_t deviceid[2]) deviceid[1] = nrf_ficr_deviceid_get(NRF_FICR, 1); } +static inline int soc_secure_mem_read(void *dst, void *src, size_t len) +{ + (void)memcpy(dst, src, len); + return 0; +} + #endif /* BOARDS_POSIX_NRF52_BSIM_SOC_SECURE_H */ diff --git a/boards/nordic/nrf54h20dk/nrf54h20dk_nrf54h20-memory_map.dtsi b/boards/nordic/nrf54h20dk/nrf54h20dk_nrf54h20-memory_map.dtsi index 2b2473f92b5feaa..5b920b5ec416812 100644 --- a/boards/nordic/nrf54h20dk/nrf54h20dk_nrf54h20-memory_map.dtsi +++ b/boards/nordic/nrf54h20dk/nrf54h20dk_nrf54h20-memory_map.dtsi @@ -7,44 +7,44 @@ / { reserved-memory { - cpuapp_ram0x_region: memory@2f010000 { + cpurad_ram0x_region: memory@2f010000 { compatible = "nordic,owned-memory"; - reg = <0x2f010000 DT_SIZE_K(260)>; + reg = <0x2f010000 DT_SIZE_K(4)>; status = "disabled"; - nordic,access = ; + nordic,access = ; #address-cells = <1>; #size-cells = <1>; - ranges = <0x0 0x2f010000 0x41000>; + ranges = <0x0 0x2f010000 0x1000>; - cpusec_cpuapp_ipc_shm: memory@0 { + cpusec_cpurad_ipc_shm: memory@0 { reg = <0x0 DT_SIZE_K(2)>; }; - cpuapp_cpusec_ipc_shm: memory@800 { + cpurad_cpusec_ipc_shm: memory@800 { reg = <0x800 DT_SIZE_K(2)>; }; - - cpuapp_data: memory@1000 { - reg = <0x1000 DT_SIZE_K(256)>; - }; }; - cpurad_ram0x_region: memory@2f051000 { + cpuapp_ram0x_region: memory@2f011000 { compatible = "nordic,owned-memory"; - reg = <0x2f051000 DT_SIZE_K(4)>; + reg = <0x2f010000 DT_SIZE_K(260)>; status = "disabled"; - nordic,access = ; + nordic,access = ; #address-cells = <1>; #size-cells = <1>; - ranges = <0x0 0x2f051000 0x1000>; + ranges = <0x0 0x2f011000 0x41000>; - cpusec_cpurad_ipc_shm: memory@0 { + cpusec_cpuapp_ipc_shm: memory@0 { reg = <0x0 DT_SIZE_K(2)>; }; - cpurad_cpusec_ipc_shm: memory@800 { + cpuapp_cpusec_ipc_shm: memory@800 { reg = <0x800 DT_SIZE_K(2)>; }; + + cpuapp_data: memory@1000 { + reg = <0x1000 DT_SIZE_K(256)>; + }; }; etr_buf_ram0x_region: memory@2f0be000 { diff --git a/boards/nordic/nrf9131ek/nrf9131ek_nrf9131_defconfig b/boards/nordic/nrf9131ek/nrf9131ek_nrf9131_defconfig index 4936d06617fa1ab..c486d8323821a2c 100644 --- a/boards/nordic/nrf9131ek/nrf9131ek_nrf9131_defconfig +++ b/boards/nordic/nrf9131ek/nrf9131ek_nrf9131_defconfig @@ -18,5 +18,3 @@ CONFIG_SERIAL=y # Enable console CONFIG_CONSOLE=y CONFIG_UART_CONSOLE=y - -CONFIG_PINCTRL=y diff --git a/boards/nordic/nrf9131ek/nrf9131ek_nrf9131_ns_defconfig b/boards/nordic/nrf9131ek/nrf9131ek_nrf9131_ns_defconfig index 4051bf70caa5a08..5690c239b7ba2cb 100644 --- a/boards/nordic/nrf9131ek/nrf9131ek_nrf9131_ns_defconfig +++ b/boards/nordic/nrf9131ek/nrf9131ek_nrf9131_ns_defconfig @@ -22,8 +22,6 @@ CONFIG_SERIAL=y CONFIG_CONSOLE=y CONFIG_UART_CONSOLE=y -CONFIG_PINCTRL=y - # Enable PMIC CONFIG_I2C=y CONFIG_REGULATOR=y diff --git a/boards/nxp/frdm_mcxn947/board.c b/boards/nxp/frdm_mcxn947/board.c index 75ff1cb04e42ce6..e16cf6f6e5cb3ea 100644 --- a/boards/nxp/frdm_mcxn947/board.c +++ b/boards/nxp/frdm_mcxn947/board.c @@ -190,10 +190,6 @@ static int frdm_mcxn947_init(void) CLOCK_EnableClock(kCLOCK_Gpio4); #endif -#if DT_NODE_HAS_STATUS_OKAY(DT_NODELABEL(gpio5)) - CLOCK_EnableClock(kCLOCK_Gpio5); -#endif - #if DT_NODE_HAS_STATUS_OKAY(DT_NODELABEL(dac0)) SPC_EnableActiveModeAnalogModules(SPC0, kSPC_controlDac0); CLOCK_SetClkDiv(kCLOCK_DivDac0Clk, 1u); diff --git a/boards/nxp/mimxrt1180_evk/doc/index.rst b/boards/nxp/mimxrt1180_evk/doc/index.rst index c8f1147d0b014a3..012cb9407ada5bb 100644 --- a/boards/nxp/mimxrt1180_evk/doc/index.rst +++ b/boards/nxp/mimxrt1180_evk/doc/index.rst @@ -114,6 +114,8 @@ configuration supports the following hardware features: +-----------+------------+-------------------------------------+ | FLEXSPI | on-chip | flash programming | +-----------+------------+-------------------------------------+ +| PWM | on-chip | pwm | ++-----------+------------+-------------------------------------+ The default configuration can be found in the defconfig file: :zephyr_file:`boards/nxp/mimxrt1180_evk/mimxrt1180_evk_mimxrt1189_cm33_defconfig` diff --git a/boards/nxp/mimxrt1180_evk/mimxrt1180_evk-pinctrl.dtsi b/boards/nxp/mimxrt1180_evk/mimxrt1180_evk-pinctrl.dtsi index 81ac3b1eb210e73..29687171a5073c2 100644 --- a/boards/nxp/mimxrt1180_evk/mimxrt1180_evk-pinctrl.dtsi +++ b/boards/nxp/mimxrt1180_evk/mimxrt1180_evk-pinctrl.dtsi @@ -129,4 +129,12 @@ input-enable; }; }; + + pinmux_flexpwm2: pinmux_flexpwm2 { + group0 { + pinmux = <&iomuxc_gpio_ad_27_flexpwm2_pwm1_b>; + drive-strength = "high"; + slew-rate = "fast"; + }; + }; }; diff --git a/boards/nxp/mimxrt1180_evk/mimxrt1180_evk.dtsi b/boards/nxp/mimxrt1180_evk/mimxrt1180_evk.dtsi index 725b5439e996c85..3f71d74a762b55b 100644 --- a/boards/nxp/mimxrt1180_evk/mimxrt1180_evk.dtsi +++ b/boards/nxp/mimxrt1180_evk/mimxrt1180_evk.dtsi @@ -11,6 +11,7 @@ aliases { led0 = &green_led; sw0 = &user_button; + pwm-led0 = &green_pwm_led; }; leds { @@ -29,6 +30,13 @@ zephyr,code = ; }; }; + + pwmleds { + compatible = "pwm-leds"; + green_pwm_led: green_pwm_led { + pwms = <&flexpwm2_pwm1 1 PWM_MSEC(20) PWM_POLARITY_NORMAL>; + }; + }; }; &lpuart1 { @@ -125,3 +133,9 @@ max-bitrate = <5000000>; }; }; + +&flexpwm2_pwm1 { + status = "okay"; + pinctrl-0 = <&pinmux_flexpwm2>; + pinctrl-names = "default"; +}; diff --git a/boards/nxp/mimxrt1180_evk/mimxrt1180_evk_mimxrt1189_cm33.yaml b/boards/nxp/mimxrt1180_evk/mimxrt1180_evk_mimxrt1189_cm33.yaml index add9a84abc6a924..639b19be76818ce 100644 --- a/boards/nxp/mimxrt1180_evk/mimxrt1180_evk_mimxrt1189_cm33.yaml +++ b/boards/nxp/mimxrt1180_evk/mimxrt1180_evk_mimxrt1189_cm33.yaml @@ -22,4 +22,5 @@ supported: - adc - netif:eth - can + - pwm vendor: nxp diff --git a/boards/nxp/mimxrt1180_evk/mimxrt1180_evk_mimxrt1189_cm7.yaml b/boards/nxp/mimxrt1180_evk/mimxrt1180_evk_mimxrt1189_cm7.yaml index 4323dc8ac974b1f..e69b1ca1feee1f3 100644 --- a/boards/nxp/mimxrt1180_evk/mimxrt1180_evk_mimxrt1189_cm7.yaml +++ b/boards/nxp/mimxrt1180_evk/mimxrt1180_evk_mimxrt1189_cm7.yaml @@ -21,4 +21,5 @@ supported: - counter - adc - can + - pwm vendor: nxp diff --git a/boards/nxp/rd_rw612_bga/dts/goworld_16880_lcm.overlay b/boards/nxp/rd_rw612_bga/dts/goworld_16880_lcm.overlay index 31ebc02eb52a1f5..658778d373bce19 100644 --- a/boards/nxp/rd_rw612_bga/dts/goworld_16880_lcm.overlay +++ b/boards/nxp/rd_rw612_bga/dts/goworld_16880_lcm.overlay @@ -17,6 +17,8 @@ &lcdic { status = "okay"; nxp,swap-bytes; + /* Raise the timer0 ratio to enable longer reset delay */ + nxp,timer0-ratio = <15>; /* * Settings to connect this display: * Populate the following resistors: diff --git a/boards/nxp/ucans32k1sic/doc/index.rst b/boards/nxp/ucans32k1sic/doc/index.rst index 3aacf0459ddb26d..8468d46669bb024 100644 --- a/boards/nxp/ucans32k1sic/doc/index.rst +++ b/boards/nxp/ucans32k1sic/doc/index.rst @@ -60,7 +60,7 @@ This board has 5 GPIO ports named from ``gpioa`` to ``gpioe``. Pin control can be further configured from your application overlay by adding children nodes with the desired pinmux configuration to the singleton node ``pinctrl``. Supported properties are described in -:zephyr_file:`dts/bindings/pinctrl/nxp,kinetis-pinctrl.yaml`. +:zephyr_file:`dts/bindings/pinctrl/nxp,port-pinctrl.yaml`. LEDs ---- diff --git a/boards/olimex/olimex_esp32_evb/olimex_esp32_evb_appcpu.dts b/boards/olimex/olimex_esp32_evb/olimex_esp32_evb_appcpu.dts index ae7a2e1e7f65348..e86ffdb90bf793e 100644 --- a/boards/olimex/olimex_esp32_evb/olimex_esp32_evb_appcpu.dts +++ b/boards/olimex/olimex_esp32_evb/olimex_esp32_evb_appcpu.dts @@ -6,6 +6,7 @@ /dts-v1/; #include +#include / { model = "Espressif ESP32-DevkitC APPCPU"; @@ -25,42 +26,3 @@ &trng0 { status = "okay"; }; - -&flash0 { - status = "okay"; - partitions { - compatible = "fixed-partitions"; - #address-cells = <1>; - #size-cells = <1>; - - /* Reserve 60kB for the bootloader */ - boot_partition: partition@1000 { - label = "mcuboot"; - reg = <0x00001000 0x0000F000>; - read-only; - }; - - /* Reserve 1024kB for the application in slot 0 */ - slot0_partition: partition@10000 { - label = "image-0"; - reg = <0x00010000 0x00100000>; - }; - - /* Reserve 1024kB for the application in slot 1 */ - slot1_partition: partition@110000 { - label = "image-1"; - reg = <0x00110000 0x00100000>; - }; - - /* Reserve 256kB for the scratch partition */ - scratch_partition: partition@210000 { - label = "image-scratch"; - reg = <0x00210000 0x00040000>; - }; - - storage_partition: partition@250000 { - label = "storage"; - reg = <0x00250000 0x00006000>; - }; - }; -}; diff --git a/boards/olimex/olimex_esp32_evb/olimex_esp32_evb_procpu.dts b/boards/olimex/olimex_esp32_evb/olimex_esp32_evb_procpu.dts index c239263ea537bfa..b080d47472d9372 100644 --- a/boards/olimex/olimex_esp32_evb/olimex_esp32_evb_procpu.dts +++ b/boards/olimex/olimex_esp32_evb/olimex_esp32_evb_procpu.dts @@ -9,6 +9,7 @@ #include #include "olimex_esp32_evb-pinctrl.dtsi" #include +#include / { model = "Olimex ESP32-EVB"; @@ -127,45 +128,6 @@ uext_spi: &spi2 {}; status = "okay"; }; -&flash0 { - status = "okay"; - partitions { - compatible = "fixed-partitions"; - #address-cells = <1>; - #size-cells = <1>; - - /* Reserve 60kB for the bootloader */ - boot_partition: partition@1000 { - label = "mcuboot"; - reg = <0x00001000 DT_SIZE_K(60)>; - read-only; - }; - - /* Reserve 1024kB for the application in slot 0 */ - slot0_partition: partition@10000 { - label = "image-0"; - reg = <0x00010000 DT_SIZE_K(1024)>; - }; - - /* Reserve 1024kB for the application in slot 1 */ - slot1_partition: partition@110000 { - label = "image-1"; - reg = <0x00110000 DT_SIZE_K(1024)>; - }; - - /* Reserve 256kB for the scratch partition */ - scratch_partition: partition@210000 { - label = "image-scratch"; - reg = <0x00210000 DT_SIZE_K(256)>; - }; - - storage_partition: partition@250000 { - label = "storage"; - reg = <0x00250000 DT_SIZE_K(24)>; - }; - }; -}; - &esp32_bt_hci { status = "okay"; }; diff --git a/boards/others/candlelightfd/Kconfig.candlelightfd b/boards/others/candlelightfd/Kconfig.candlelightfd new file mode 100644 index 000000000000000..ec6bb9d40a82e54 --- /dev/null +++ b/boards/others/candlelightfd/Kconfig.candlelightfd @@ -0,0 +1,5 @@ +# Copyright (c) 2024 Sean Nyekjaer +# SPDX-License-Identifier: Apache-2.0 + +config BOARD_CANDLELIGHTFD + select SOC_STM32G0B1XX diff --git a/boards/others/candlelightfd/board.cmake b/boards/others/candlelightfd/board.cmake new file mode 100644 index 000000000000000..f52f1430d4c51d2 --- /dev/null +++ b/boards/others/candlelightfd/board.cmake @@ -0,0 +1,8 @@ +# Copyright (c) 2024 Sean Nyekjaer +# SPDX-License-Identifier: Apache-2.0 + +board_runner_args(dfu-util "--pid=0483:df11" "--alt=0" "--dfuse") +board_runner_args(jlink "--device=STM32G0B1CB") + +include(${ZEPHYR_BASE}/boards/common/dfu-util.board.cmake) +include(${ZEPHYR_BASE}/boards/common/jlink.board.cmake) diff --git a/boards/others/candlelightfd/board.yml b/boards/others/candlelightfd/board.yml new file mode 100644 index 000000000000000..089e2a8bbaf2268 --- /dev/null +++ b/boards/others/candlelightfd/board.yml @@ -0,0 +1,8 @@ +board: + name: candlelightfd + full_name: candleLightFD + vendor: others + socs: + - name: stm32g0b1xx + variants: + - name: 'dual' diff --git a/boards/others/candlelightfd/candlelightfd.dtsi b/boards/others/candlelightfd/candlelightfd.dtsi new file mode 100644 index 000000000000000..0e87cfadbab07a5 --- /dev/null +++ b/boards/others/candlelightfd/candlelightfd.dtsi @@ -0,0 +1,101 @@ +/* + * Copyright (c) 2024 Sean Nyekjaer + * + * SPDX-License-Identifier: Apache-2.0 + */ + +#include +#include + +/ { + chosen { + zephyr,sram = &sram0; + zephyr,flash = &flash0; + zephyr,code-partition = &slot0_partition; + zephyr,canbus = &fdcan1; + }; + + aliases { + led0 = &led_rx; + led1 = &led_tx; + }; + + leds { + compatible = "gpio-leds"; + led_rx: led_rx { + gpios = <&gpioa 3 GPIO_ACTIVE_LOW>; + label = "LED RX"; + }; + led_tx: led_tx { + gpios = <&gpioa 4 GPIO_ACTIVE_LOW>; + label = "LED TX"; + }; + }; + + transceiver0: can-phy0 { + compatible = "nxp,tja1051", "can-transceiver-gpio"; + enable-gpios = <&gpioa 15 GPIO_ACTIVE_LOW>; + max-bitrate = <5000000>; + #phy-cells = <0>; + }; +}; + +&clk_hse { + status = "okay"; + clock-frequency = ; +}; + +&clk_hsi48 { + status = "okay"; + crs-usb-sof; +}; + +&pll { + div-m = <1>; + mul-n = <30>; + div-p = <2>; + div-q = <3>; + div-r = <4>; + clocks = <&clk_hse>; + status = "okay"; +}; + +&rcc { + clocks = <&pll>; + clock-frequency = ; + ahb-prescaler = <1>; + apb1-prescaler = <1>; +}; + +zephyr_udc0: &usb { + pinctrl-0 = <&usb_dm_pa11 &usb_dp_pa12>; + pinctrl-names = "default"; + status = "okay"; +}; + +&fdcan1 { + clocks = <&rcc STM32_CLOCK_BUS_APB1 0x00001000>, + <&rcc STM32_SRC_PLL_Q FDCAN_SEL(1)>; + pinctrl-0 = <&fdcan1_rx_pd0 &fdcan1_tx_pd1>; + pinctrl-names = "default"; + phys = <&transceiver0>; + status = "okay"; +}; + +&flash0 { + partitions { + compatible = "fixed-partitions"; + #address-cells = <1>; + #size-cells = <1>; + + boot_partition: partition@0 { + label = "mcuboot"; + reg = <0x00000000 DT_SIZE_K(48)>; + read-only; + }; + slot0_partition: partition@c000 { + label = "image-0"; + reg = <0x0000c000 DT_SIZE_K(80)>; + }; + }; +}; diff --git a/boards/others/candlelightfd/candlelightfd_stm32g0b1xx.dts b/boards/others/candlelightfd/candlelightfd_stm32g0b1xx.dts new file mode 100644 index 000000000000000..ce8b6cc46b259db --- /dev/null +++ b/boards/others/candlelightfd/candlelightfd_stm32g0b1xx.dts @@ -0,0 +1,14 @@ +/* + * Copyright (c) 2024 Sean Nyekjaer + * + * SPDX-License-Identifier: Apache-2.0 + */ + +/dts-v1/; + +#include "candlelightfd.dtsi" + +/ { + model = "candleLight FD"; + compatible = "candlelightfd"; +}; diff --git a/boards/others/candlelightfd/candlelightfd_stm32g0b1xx.yaml b/boards/others/candlelightfd/candlelightfd_stm32g0b1xx.yaml new file mode 100644 index 000000000000000..b017c2bb5387aa4 --- /dev/null +++ b/boards/others/candlelightfd/candlelightfd_stm32g0b1xx.yaml @@ -0,0 +1,10 @@ +identifier: candlelightfd/stm32g0b1xx +name: candleLightFD +type: mcu +arch: arm +toolchain: + - zephyr + - gnuarmemb +ram: 144 +flash: 128 +vendor: others diff --git a/boards/others/candlelightfd/candlelightfd_stm32g0b1xx_defconfig b/boards/others/candlelightfd/candlelightfd_stm32g0b1xx_defconfig new file mode 100644 index 000000000000000..8cb5d0f636488f6 --- /dev/null +++ b/boards/others/candlelightfd/candlelightfd_stm32g0b1xx_defconfig @@ -0,0 +1,8 @@ +# Enable MPU +CONFIG_ARM_MPU=y + +# Enable HW stack protection +CONFIG_HW_STACK_PROTECTION=y + +# Enable GPIO +CONFIG_GPIO=y diff --git a/boards/others/candlelightfd/candlelightfd_stm32g0b1xx_dual.dts b/boards/others/candlelightfd/candlelightfd_stm32g0b1xx_dual.dts new file mode 100644 index 000000000000000..2e2767dd536f3f3 --- /dev/null +++ b/boards/others/candlelightfd/candlelightfd_stm32g0b1xx_dual.dts @@ -0,0 +1,30 @@ +/* + * Copyright (c) 2024 Sean Nyekjaer + * + * SPDX-License-Identifier: Apache-2.0 + */ + +/dts-v1/; + +#include "candlelightfd.dtsi" + +/ { + model = "candleLight FD Dual"; + compatible = "candlelightfd"; + + transceiver1: can-phy1 { + compatible = "nxp,tja1051", "can-transceiver-gpio"; + enable-gpios = <&gpiob 2 GPIO_ACTIVE_LOW>; + max-bitrate = <5000000>; + #phy-cells = <0>; + }; +}; + +&fdcan2 { + clocks = <&rcc STM32_CLOCK_BUS_APB1 0x00001000>, + <&rcc STM32_SRC_PLL_Q FDCAN_SEL(1)>; + pinctrl-0 = <&fdcan2_rx_pb0 &fdcan2_tx_pb1>; + pinctrl-names = "default"; + phys = <&transceiver1>; + status = "okay"; +}; diff --git a/boards/others/candlelightfd/candlelightfd_stm32g0b1xx_dual.yaml b/boards/others/candlelightfd/candlelightfd_stm32g0b1xx_dual.yaml new file mode 100644 index 000000000000000..7841d562cb8b55c --- /dev/null +++ b/boards/others/candlelightfd/candlelightfd_stm32g0b1xx_dual.yaml @@ -0,0 +1,10 @@ +identifier: candlelightfd/stm32g0b1xx/dual +name: candleLightFD Dual +type: mcu +arch: arm +toolchain: + - zephyr + - gnuarmemb +ram: 144 +flash: 128 +vendor: others diff --git a/boards/others/candlelightfd/candlelightfd_stm32g0b1xx_dual_defconfig b/boards/others/candlelightfd/candlelightfd_stm32g0b1xx_dual_defconfig new file mode 100644 index 000000000000000..8cb5d0f636488f6 --- /dev/null +++ b/boards/others/candlelightfd/candlelightfd_stm32g0b1xx_dual_defconfig @@ -0,0 +1,8 @@ +# Enable MPU +CONFIG_ARM_MPU=y + +# Enable HW stack protection +CONFIG_HW_STACK_PROTECTION=y + +# Enable GPIO +CONFIG_GPIO=y diff --git a/boards/others/candlelightfd/doc/index.rst b/boards/others/candlelightfd/doc/index.rst new file mode 100644 index 000000000000000..ea622f4db728707 --- /dev/null +++ b/boards/others/candlelightfd/doc/index.rst @@ -0,0 +1,77 @@ +.. zephyr:board:: candlelightfd + +Overview +******** + +The candleLight FD is an open-hardware USB to CAN FD adapter board available from Linux Automation GmBH. +Find more information about the board at the `Linux Automation website`_. + +Hardware +******** + +The candleLight FD board is equipped with a STM32G0B1CBT6 microcontroller and features an USB-C connector, +a DB-9M connector for the CAN bus, and two user LEDs. Schematics and component placement drawings +are available in the `candleLight FD GitHub repository`_. + +Supported Features +================== + +The ``candlelightfd/stm32g0b1xx`` board target supports the following hardware features: + ++-----------+------------+-------------------------------------+ +| Interface | Controller | Driver/Component | ++===========+============+=====================================+ +| NVIC | on-chip | nested vector interrupt controller | ++-----------+------------+-------------------------------------+ +| PINMUX | on-chip | pinmux | ++-----------+------------+-------------------------------------+ +| FLASH | on-chip | flash memory | ++-----------+------------+-------------------------------------+ +| GPIO | on-chip | gpio | ++-----------+------------+-------------------------------------+ +| USB | on-chip | USB | ++-----------+------------+-------------------------------------+ +| CAN1 | on-chip | CAN controller | ++-----------+------------+-------------------------------------+ +| CAN2 | on-chip | CAN controller | ++-----------+------------+-------------------------------------+ + +The default configuration can be found in the defconfig file: +:zephyr_file:`boards/others/candlelightfd/candlelightfd_stm32g0b1xx_defconfig`. + +System Clock +============ + +The STM32G0B1CBT6 PLL is driven by an external crystal oscillator (HSE) running at 8 MHz and +configured to provide a system clock of 60 MHz. This allows generating a FDCAN1 and FDCAN2 core +clock of 80 MHz. + +Programming and Debugging +************************* + +Build and flash applications as usual (see :ref:`build_an_application` and +:ref:`application_run` for more details). + +If flashing via USB DFU, short jumper ``BOOT`` when applying power to the candleLight FD in order to +enter the built-in DFU mode. + +Variants +======== + +The candleLight FD is can be retrofitted with a second transceiver, making it a dual CAN FD device: + +- ``candlelightfd``: The default variant. +- ``candlelightfd_stm32g0b1xx_dual``: Variant for the dual CAN FD. + +Here is an example for the :zephyr:code-sample:`blinky` application. + +.. zephyr-app-commands:: + :zephyr-app: samples/basic/blinky + :board: candlelightfd + :goals: flash + +.. _Linux Automation website: + https://linux-automation.com/en/products/candlelight-fd.html + +.. _candleLight FD GitHub repository: + https://github.com/linux-automation/candleLightFD diff --git a/boards/pine64/pinetime_devkit0/pinetime_devkit0.dts b/boards/pine64/pinetime_devkit0/pinetime_devkit0.dts index 1243d743d9a7b73..a93b91dfc65d1a8 100644 --- a/boards/pine64/pinetime_devkit0/pinetime_devkit0.dts +++ b/boards/pine64/pinetime_devkit0/pinetime_devkit0.dts @@ -112,7 +112,7 @@ nvgam-param = [D0 04 0C 11 13 2C 3F 44 51 2F 1F 1F 20 23]; ram-param = [00 F0]; rgb-param = [CD 08 14]; - mipi-mode = ; + mipi-mode = "MIPI_DBI_MODE_SPI_4WIRE"; }; }; }; diff --git a/boards/qemu/arc/qemu_arc_qemu_arc_em.yaml b/boards/qemu/arc/qemu_arc_qemu_arc_em.yaml index 15adaf6b25af4be..d409cbf34b75eb2 100644 --- a/boards/qemu/arc/qemu_arc_qemu_arc_em.yaml +++ b/boards/qemu/arc/qemu_arc_qemu_arc_em.yaml @@ -1,7 +1,8 @@ identifier: qemu_arc/qemu_arc_em name: QEMU Emulation for ARC EM type: qemu -simulation: qemu +simulation: + - name: qemu arch: arc toolchain: - zephyr diff --git a/boards/qemu/arc/qemu_arc_qemu_arc_hs.yaml b/boards/qemu/arc/qemu_arc_qemu_arc_hs.yaml index 92ea09d4ee8dfce..0e568f34a794cfe 100644 --- a/boards/qemu/arc/qemu_arc_qemu_arc_hs.yaml +++ b/boards/qemu/arc/qemu_arc_qemu_arc_hs.yaml @@ -1,7 +1,8 @@ identifier: qemu_arc/qemu_arc_hs name: QEMU Emulation for ARC HS type: qemu -simulation: qemu +simulation: + - name: qemu arch: arc toolchain: - zephyr diff --git a/boards/qemu/arc/qemu_arc_qemu_arc_hs5x.yaml b/boards/qemu/arc/qemu_arc_qemu_arc_hs5x.yaml index 152fbf0b5c00094..819a8cf9249600d 100644 --- a/boards/qemu/arc/qemu_arc_qemu_arc_hs5x.yaml +++ b/boards/qemu/arc/qemu_arc_qemu_arc_hs5x.yaml @@ -1,7 +1,8 @@ identifier: qemu_arc/qemu_arc_hs5x name: QEMU Emulation for ARC HS5x type: qemu -simulation: qemu +simulation: + - name: qemu arch: arc toolchain: - zephyr diff --git a/boards/qemu/arc/qemu_arc_qemu_arc_hs6x.yaml b/boards/qemu/arc/qemu_arc_qemu_arc_hs6x.yaml index 94b4342a40af9a9..901d15dd34f4c1b 100644 --- a/boards/qemu/arc/qemu_arc_qemu_arc_hs6x.yaml +++ b/boards/qemu/arc/qemu_arc_qemu_arc_hs6x.yaml @@ -1,7 +1,8 @@ identifier: qemu_arc/qemu_arc_hs6x name: QEMU Emulation for ARC HS6x type: qemu -simulation: qemu +simulation: + - name: qemu arch: arc toolchain: - cross-compile diff --git a/boards/qemu/arc/qemu_arc_qemu_arc_hs_xip.yaml b/boards/qemu/arc/qemu_arc_qemu_arc_hs_xip.yaml index dec824ec6b049c5..928ec24190e43c2 100644 --- a/boards/qemu/arc/qemu_arc_qemu_arc_hs_xip.yaml +++ b/boards/qemu/arc/qemu_arc_qemu_arc_hs_xip.yaml @@ -1,7 +1,8 @@ identifier: qemu_arc/qemu_arc_hs/xip name: QEMU Emulation for ARC HS (XIP) type: qemu -simulation: qemu +simulation: + - name: qemu arch: arc toolchain: - zephyr diff --git a/boards/qemu/cortex_a53/qemu_cortex_a53.yaml b/boards/qemu/cortex_a53/qemu_cortex_a53.yaml index b447db17f67d6fe..509a461422fb215 100644 --- a/boards/qemu/cortex_a53/qemu_cortex_a53.yaml +++ b/boards/qemu/cortex_a53/qemu_cortex_a53.yaml @@ -1,7 +1,8 @@ identifier: qemu_cortex_a53 name: QEMU Emulation for Cortex-A53 type: qemu -simulation: qemu +simulation: + - name: qemu arch: arm64 toolchain: - zephyr diff --git a/boards/qemu/cortex_a53/qemu_cortex_a53_qemu_cortex_a53_smp.yaml b/boards/qemu/cortex_a53/qemu_cortex_a53_qemu_cortex_a53_smp.yaml index 4804d0645646b24..2a7e489a559bfdf 100644 --- a/boards/qemu/cortex_a53/qemu_cortex_a53_qemu_cortex_a53_smp.yaml +++ b/boards/qemu/cortex_a53/qemu_cortex_a53_qemu_cortex_a53_smp.yaml @@ -1,7 +1,8 @@ identifier: qemu_cortex_a53/qemu_cortex_a53/smp name: QEMU Emulation for Cortex-A53 SMP type: qemu -simulation: qemu +simulation: + - name: qemu arch: arm64 toolchain: - zephyr diff --git a/boards/qemu/cortex_a53/qemu_cortex_a53_qemu_cortex_a53_xip.yaml b/boards/qemu/cortex_a53/qemu_cortex_a53_qemu_cortex_a53_xip.yaml index 5805780ee333c53..e00d8611b1496d9 100644 --- a/boards/qemu/cortex_a53/qemu_cortex_a53_qemu_cortex_a53_xip.yaml +++ b/boards/qemu/cortex_a53/qemu_cortex_a53_qemu_cortex_a53_xip.yaml @@ -1,7 +1,8 @@ identifier: qemu_cortex_a53/qemu_cortex_a53/xip name: QEMU Emulation for Cortex-A53 (XIP) type: qemu -simulation: qemu +simulation: + - name: qemu arch: arm64 toolchain: - zephyr diff --git a/boards/qemu/cortex_a9/qemu_cortex_a9.yaml b/boards/qemu/cortex_a9/qemu_cortex_a9.yaml index cf8853c3d5f87f7..eb3e9ccc2c2c768 100644 --- a/boards/qemu/cortex_a9/qemu_cortex_a9.yaml +++ b/boards/qemu/cortex_a9/qemu_cortex_a9.yaml @@ -8,7 +8,8 @@ identifier: qemu_cortex_a9 name: QEMU Emulation for Cortex-A9 type: qemu -simulation: qemu +simulation: + - name: qemu arch: arm toolchain: - zephyr diff --git a/boards/qemu/cortex_m0/qemu_cortex_m0.yaml b/boards/qemu/cortex_m0/qemu_cortex_m0.yaml index a0605830d5eedc8..5d6f166eeb7405a 100644 --- a/boards/qemu/cortex_m0/qemu_cortex_m0.yaml +++ b/boards/qemu/cortex_m0/qemu_cortex_m0.yaml @@ -1,7 +1,8 @@ identifier: qemu_cortex_m0 name: QEMU Emulation for Cortex-M0 type: qemu -simulation: qemu +simulation: + - name: qemu arch: arm toolchain: - zephyr diff --git a/boards/qemu/cortex_m3/qemu_cortex_m3.yaml b/boards/qemu/cortex_m3/qemu_cortex_m3.yaml index cceafa8942ef099..70f17485495a45d 100644 --- a/boards/qemu/cortex_m3/qemu_cortex_m3.yaml +++ b/boards/qemu/cortex_m3/qemu_cortex_m3.yaml @@ -1,7 +1,8 @@ identifier: qemu_cortex_m3 name: QEMU Emulation for Cortex-M3 type: qemu -simulation: qemu +simulation: + - name: qemu arch: arm toolchain: - zephyr diff --git a/boards/qemu/cortex_r5/qemu_cortex_r5.yaml b/boards/qemu/cortex_r5/qemu_cortex_r5.yaml index 17fbb1c8d94bd34..120c983fec2ea7d 100644 --- a/boards/qemu/cortex_r5/qemu_cortex_r5.yaml +++ b/boards/qemu/cortex_r5/qemu_cortex_r5.yaml @@ -1,7 +1,8 @@ identifier: qemu_cortex_r5 name: QEMU Emulation for Cortex-R5 type: qemu -simulation: qemu +simulation: + - name: qemu arch: arm toolchain: - zephyr diff --git a/boards/qemu/leon3/qemu_leon3.yaml b/boards/qemu/leon3/qemu_leon3.yaml index 1db6f50a8cb1acd..9e21ec42bbb820c 100644 --- a/boards/qemu/leon3/qemu_leon3.yaml +++ b/boards/qemu/leon3/qemu_leon3.yaml @@ -1,7 +1,8 @@ identifier: qemu_leon3 name: QEMU Emulation for LEON3 type: qemu -simulation: qemu +simulation: + - name: qemu arch: sparc ram: 1048576 flash: 524288 diff --git a/boards/qemu/malta/qemu_malta.yaml b/boards/qemu/malta/qemu_malta.yaml index 083fb0e93b11bf9..836d037aabb3d0a 100644 --- a/boards/qemu/malta/qemu_malta.yaml +++ b/boards/qemu/malta/qemu_malta.yaml @@ -1,7 +1,8 @@ identifier: qemu_malta name: QEMU emulation for MIPS (little endian) type: qemu -simulation: qemu +simulation: + - name: qemu arch: mips toolchain: - zephyr diff --git a/boards/qemu/malta/qemu_malta_qemu_malta_be.yaml b/boards/qemu/malta/qemu_malta_qemu_malta_be.yaml index 3bdbe8fa5c88ff7..a20cc223e853a74 100644 --- a/boards/qemu/malta/qemu_malta_qemu_malta_be.yaml +++ b/boards/qemu/malta/qemu_malta_qemu_malta_be.yaml @@ -1,7 +1,8 @@ identifier: qemu_malta/qemu_malta/be name: QEMU emulation for MIPS (big endian) type: qemu -simulation: qemu +simulation: + - name: qemu arch: mips toolchain: - zephyr diff --git a/boards/qemu/nios2/qemu_nios2.yaml b/boards/qemu/nios2/qemu_nios2.yaml index 6f1708734869b28..c0a3cf21644d552 100644 --- a/boards/qemu/nios2/qemu_nios2.yaml +++ b/boards/qemu/nios2/qemu_nios2.yaml @@ -1,7 +1,8 @@ identifier: qemu_nios2 name: QEMU Emulation for NIOS II type: qemu -simulation: qemu +simulation: + - name: qemu arch: nios2 ram: 128 flash: 128 diff --git a/boards/qemu/riscv32/qemu_riscv32.yaml b/boards/qemu/riscv32/qemu_riscv32.yaml index f01b63c2e416cbc..6421fe744bdc454 100644 --- a/boards/qemu/riscv32/qemu_riscv32.yaml +++ b/boards/qemu/riscv32/qemu_riscv32.yaml @@ -1,7 +1,8 @@ identifier: qemu_riscv32 name: QEMU Emulation for RISC-V 32-bit type: qemu -simulation: qemu +simulation: + - name: qemu arch: riscv toolchain: - zephyr diff --git a/boards/qemu/riscv32/qemu_riscv32_qemu_virt_riscv32_smp.yaml b/boards/qemu/riscv32/qemu_riscv32_qemu_virt_riscv32_smp.yaml index ee9af4a3083f855..368fa750090fdbe 100644 --- a/boards/qemu/riscv32/qemu_riscv32_qemu_virt_riscv32_smp.yaml +++ b/boards/qemu/riscv32/qemu_riscv32_qemu_virt_riscv32_smp.yaml @@ -1,7 +1,8 @@ identifier: qemu_riscv32/qemu_virt_riscv32/smp name: QEMU Emulation for RISC-V 32-bit SMP type: qemu -simulation: qemu +simulation: + - name: qemu arch: riscv toolchain: - zephyr diff --git a/boards/qemu/riscv32_xip/qemu_riscv32_xip.yaml b/boards/qemu/riscv32_xip/qemu_riscv32_xip.yaml index 8111ffda6787a5e..2e21c4acd2f6d49 100644 --- a/boards/qemu/riscv32_xip/qemu_riscv32_xip.yaml +++ b/boards/qemu/riscv32_xip/qemu_riscv32_xip.yaml @@ -1,7 +1,8 @@ identifier: qemu_riscv32_xip name: QEMU Emulation for RISC-V 32-bit in XIP mode type: qemu -simulation: qemu +simulation: + - name: qemu arch: riscv ram: 16 toolchain: diff --git a/boards/qemu/riscv32e/qemu_riscv32e.yaml b/boards/qemu/riscv32e/qemu_riscv32e.yaml index 1d9d4d588e6b7d8..8159d8c6292a8bf 100644 --- a/boards/qemu/riscv32e/qemu_riscv32e.yaml +++ b/boards/qemu/riscv32e/qemu_riscv32e.yaml @@ -1,7 +1,8 @@ identifier: qemu_riscv32e name: QEMU Emulation for RISC-V (RV32E) 32-bit type: qemu -simulation: qemu +simulation: + - name: qemu arch: riscv toolchain: - zephyr diff --git a/boards/qemu/riscv64/qemu_riscv64.yaml b/boards/qemu/riscv64/qemu_riscv64.yaml index 82bf68f3b1d3cc8..fc840e298866149 100644 --- a/boards/qemu/riscv64/qemu_riscv64.yaml +++ b/boards/qemu/riscv64/qemu_riscv64.yaml @@ -1,7 +1,8 @@ identifier: qemu_riscv64 name: QEMU Emulation for RISC-V 64-bit type: qemu -simulation: qemu +simulation: + - name: qemu arch: riscv toolchain: - zephyr diff --git a/boards/qemu/riscv64/qemu_riscv64_qemu_virt_riscv64_smp.yaml b/boards/qemu/riscv64/qemu_riscv64_qemu_virt_riscv64_smp.yaml index 3b39ef7499d0d16..914aec92c1ad0ba 100644 --- a/boards/qemu/riscv64/qemu_riscv64_qemu_virt_riscv64_smp.yaml +++ b/boards/qemu/riscv64/qemu_riscv64_qemu_virt_riscv64_smp.yaml @@ -1,7 +1,8 @@ identifier: qemu_riscv64/qemu_virt_riscv64/smp name: QEMU Emulation for RISC-V 64-bit SMP type: qemu -simulation: qemu +simulation: + - name: qemu arch: riscv toolchain: - zephyr diff --git a/boards/qemu/x86/qemu_x86.yaml b/boards/qemu/x86/qemu_x86.yaml index ae8bd13f9ca6a7f..09ed538e457cd76 100644 --- a/boards/qemu/x86/qemu_x86.yaml +++ b/boards/qemu/x86/qemu_x86.yaml @@ -1,7 +1,8 @@ identifier: qemu_x86 name: QEMU Emulation for X86 type: qemu -simulation: qemu +simulation: + - name: qemu arch: x86 ram: 3000 toolchain: diff --git a/boards/qemu/x86/qemu_x86_64.yaml b/boards/qemu/x86/qemu_x86_64.yaml index b5c77de4c0e586d..5811211385b93b1 100644 --- a/boards/qemu/x86/qemu_x86_64.yaml +++ b/boards/qemu/x86/qemu_x86_64.yaml @@ -5,7 +5,8 @@ arch: x86 toolchain: - zephyr - xtools -simulation: qemu +simulation: + - name: qemu supported: - acpi - can diff --git a/boards/qemu/x86/qemu_x86_64_atom_nokpti.yaml b/boards/qemu/x86/qemu_x86_64_atom_nokpti.yaml index 22033bdc24d199c..943ee9ae0b661f4 100644 --- a/boards/qemu/x86/qemu_x86_64_atom_nokpti.yaml +++ b/boards/qemu/x86/qemu_x86_64_atom_nokpti.yaml @@ -7,7 +7,8 @@ toolchain: - xtools supported: - smp -simulation: qemu +simulation: + - name: qemu testing: default: true only_tags: diff --git a/boards/qemu/x86/qemu_x86_atom_nokpti.yaml b/boards/qemu/x86/qemu_x86_atom_nokpti.yaml index 54b8d1857d9b650..9620cfc0724a180 100644 --- a/boards/qemu/x86/qemu_x86_atom_nokpti.yaml +++ b/boards/qemu/x86/qemu_x86_atom_nokpti.yaml @@ -2,7 +2,8 @@ identifier: qemu_x86/atom/nokpti name: QEMU Emulation for X86 (KPTI disabled) type: qemu arch: x86 -simulation: qemu +simulation: + - name: qemu toolchain: - zephyr - xtools diff --git a/boards/qemu/x86/qemu_x86_atom_nommu.yaml b/boards/qemu/x86/qemu_x86_atom_nommu.yaml index 1076c2f3f87c1b9..e8fac2e2f5722e9 100644 --- a/boards/qemu/x86/qemu_x86_atom_nommu.yaml +++ b/boards/qemu/x86/qemu_x86_atom_nommu.yaml @@ -2,7 +2,8 @@ identifier: qemu_x86/atom/nommu name: QEMU Emulation for X86 (MMU disabled) type: qemu arch: x86 -simulation: qemu +simulation: + - name: qemu toolchain: - zephyr - xtools diff --git a/boards/qemu/x86/qemu_x86_atom_nopae.yaml b/boards/qemu/x86/qemu_x86_atom_nopae.yaml index 2d3b46acc3f99ff..5809fec52fa02aa 100644 --- a/boards/qemu/x86/qemu_x86_atom_nopae.yaml +++ b/boards/qemu/x86/qemu_x86_atom_nopae.yaml @@ -2,7 +2,8 @@ identifier: qemu_x86/atom/nopae name: QEMU Emulation for X86 (32-bit page tables) type: qemu arch: x86 -simulation: qemu +simulation: + - name: qemu toolchain: - zephyr - xtools diff --git a/boards/qemu/x86/qemu_x86_atom_virt.yaml b/boards/qemu/x86/qemu_x86_atom_virt.yaml index ac656ad922dd767..782a28ac6882fbd 100644 --- a/boards/qemu/x86/qemu_x86_atom_virt.yaml +++ b/boards/qemu/x86/qemu_x86_atom_virt.yaml @@ -2,7 +2,8 @@ identifier: qemu_x86/atom/virt name: QEMU Emulation for X86 (Run in Virtual Address Space) type: qemu arch: x86 -simulation: qemu +simulation: + - name: qemu toolchain: - zephyr - xtools diff --git a/boards/qemu/x86/qemu_x86_atom_xip.yaml b/boards/qemu/x86/qemu_x86_atom_xip.yaml index f55d0b2097ad6b7..ec2cfb9104e0bf2 100644 --- a/boards/qemu/x86/qemu_x86_atom_xip.yaml +++ b/boards/qemu/x86/qemu_x86_atom_xip.yaml @@ -2,7 +2,8 @@ identifier: qemu_x86/atom/xip name: QEMU Emulation for X86 (XIP enabled) type: qemu arch: x86 -simulation: qemu +simulation: + - name: qemu toolchain: - zephyr - xtools diff --git a/boards/qemu/x86/qemu_x86_lakemont.yaml b/boards/qemu/x86/qemu_x86_lakemont.yaml index 1f1d7bb83c925c4..7f153643b9e4d4b 100644 --- a/boards/qemu/x86/qemu_x86_lakemont.yaml +++ b/boards/qemu/x86/qemu_x86_lakemont.yaml @@ -1,7 +1,8 @@ identifier: qemu_x86_lakemont name: QEMU Emulation for X86 (Lakemont) type: qemu -simulation: qemu +simulation: + - name: qemu arch: x86 toolchain: - zephyr diff --git a/boards/qemu/x86/qemu_x86_tiny.yaml b/boards/qemu/x86/qemu_x86_tiny.yaml index 8807d57d8d09e98..c09f5b513796591 100644 --- a/boards/qemu/x86/qemu_x86_tiny.yaml +++ b/boards/qemu/x86/qemu_x86_tiny.yaml @@ -2,7 +2,8 @@ identifier: qemu_x86_tiny name: QEMU Emulation for X86 (small VM) type: qemu arch: x86 -simulation: qemu +simulation: + - name: qemu toolchain: - zephyr - xtools diff --git a/boards/qemu/xtensa/qemu_xtensa_dc233c.yaml b/boards/qemu/xtensa/qemu_xtensa_dc233c.yaml index a3ac9b1ca4fab40..c0fd17ab84c1806 100644 --- a/boards/qemu/xtensa/qemu_xtensa_dc233c.yaml +++ b/boards/qemu/xtensa/qemu_xtensa_dc233c.yaml @@ -1,7 +1,8 @@ identifier: qemu_xtensa/dc233c name: QEMU Emulation for Xtensa type: qemu -simulation: qemu +simulation: + - name: qemu arch: xtensa toolchain: - zephyr diff --git a/boards/qemu/xtensa/qemu_xtensa_dc233c_mmu.yaml b/boards/qemu/xtensa/qemu_xtensa_dc233c_mmu.yaml index 61ab14c91305262..b9bbbd89698975e 100644 --- a/boards/qemu/xtensa/qemu_xtensa_dc233c_mmu.yaml +++ b/boards/qemu/xtensa/qemu_xtensa_dc233c_mmu.yaml @@ -1,7 +1,8 @@ identifier: qemu_xtensa/dc233c/mmu name: QEMU Emulation for Xtensa with MMU type: qemu -simulation: qemu +simulation: + - name: qemu arch: xtensa toolchain: - zephyr diff --git a/boards/qemu/xtensa/qemu_xtensa_sample_controller32_mpu.yaml b/boards/qemu/xtensa/qemu_xtensa_sample_controller32_mpu.yaml index 5c91f09db79ce01..9285fa04e9e403a 100644 --- a/boards/qemu/xtensa/qemu_xtensa_sample_controller32_mpu.yaml +++ b/boards/qemu/xtensa/qemu_xtensa_sample_controller32_mpu.yaml @@ -1,7 +1,8 @@ identifier: qemu_xtensa/sample_controller32/mpu name: QEMU Emulation for Xtensa with MPU type: qemu -simulation: qemu +simulation: + - name: qemu arch: xtensa testing: default: true diff --git a/boards/renesas/da14695_dk_usb/da14695_dk_usb-pinctrl.dtsi b/boards/renesas/da14695_dk_usb/da14695_dk_usb-pinctrl.dtsi index fbdf787a88e9630..521c90da0df4525 100644 --- a/boards/renesas/da14695_dk_usb/da14695_dk_usb-pinctrl.dtsi +++ b/boards/renesas/da14695_dk_usb/da14695_dk_usb-pinctrl.dtsi @@ -18,20 +18,20 @@ uart2_default: uart2_default { group1 { - pinmux = ; + pinmux = ; }; group2 { - pinmux = ; + pinmux = ; bias-pull-up; }; }; uart3_default: uart3_default { group1 { - pinmux = ; + pinmux = ; }; group2 { - pinmux = ; + pinmux = ; bias-pull-up; }; }; @@ -63,8 +63,8 @@ /omit-if-no-ref/ i2c2_sleep: i2c2_sleep { group1 { - pinmux = , - ; + pinmux = , + ; bias-pull-up; }; }; diff --git a/boards/renesas/da14695_dk_usb/da14695_dk_usb.dts b/boards/renesas/da14695_dk_usb/da14695_dk_usb.dts index 1b0df2d3b75a84c..96c241aa9d1cdb0 100644 --- a/boards/renesas/da14695_dk_usb/da14695_dk_usb.dts +++ b/boards/renesas/da14695_dk_usb/da14695_dk_usb.dts @@ -38,51 +38,50 @@ }; }; - mikrobus_header{ - mikrobus-connector-1 { - compatible = "mikro-bus"; - #gpio-cells = <2>; - gpio-map-mask = <0xffffffff 0xffffffc0>; - gpio-map-pass-thru = <0 0x3f>; - gpio-map = <0 0 &gpio0 25 0>, /* AN */ - /* Not a GPIO*/ /* RST */ - <2 0 &gpio1 2 0>, /* CS */ - <3 0 &gpio1 3 0>, /* SCK */ - <4 0 &gpio1 4 0>, /* MISO */ - <5 0 &gpio1 5 0>, /* MOSI */ - /* +3.3V */ - /* GND */ - <6 0 &gpio1 6 0>, /* PWM */ - <7 0 &gpio1 7 0>, /* INT */ - <8 0 &gpio1 8 0>, /* RX */ - <9 0 &gpio0 17 0>, /* TX */ - <10 0 &gpio0 18 0>, /* SCL */ - <11 0 &gpio0 19 0>; /* SDA */ - /* +5V */ - /* GND */ - }; - mikrobus-connector-2 { - compatible = "mikro-bus"; - #gpio-cells = <2>; - gpio-map-mask = <0xffffffff 0xffffffc0>; - gpio-map-pass-thru = <0 0x3f>; - gpio-map = <0 0 &gpio1 9 0>, /* AN */ - /* Not a GPIO*/ /* RST */ - <2 0 &gpio0 20 0>, /* CS */ - <3 0 &gpio0 21 0>, /* SCK */ - <4 0 &gpio0 24 0>, /* MISO */ - <5 0 &gpio0 26 0>, /* MOSI */ - /* +3.3V */ - /* GND */ - <6 0 &gpio1 1 0>, /* PWM */ - <7 0 &gpio0 27 0>, /* INT */ - <8 0 &gpio0 28 0>, /* RX */ - <9 0 &gpio0 29 0>, /* TX */ - <10 0 &gpio0 30 0>, /* SCL */ - <11 0 &gpio0 31 0>; /* SDA */ - /* +5V */ - /* GND */ - }; + mikrobus_1_header: mikrobus-connector-1 { + compatible = "mikro-bus"; + #gpio-cells = <2>; + gpio-map-mask = <0xffffffff 0xffffffc0>; + gpio-map-pass-thru = <0 0x3f>; + gpio-map = <0 0 &gpio1 9 0>, /* AN */ + <1 0 &gpio0 12 0>, /* RST */ + <2 0 &gpio0 20 0>, /* CS */ + <3 0 &gpio0 21 0>, /* SCK */ + <4 0 &gpio0 24 0>, /* MISO */ + <5 0 &gpio0 26 0>, /* MOSI */ + /* +3.3V */ + /* GND */ + <6 0 &gpio1 1 0>, /* PWM */ + <7 0 &gpio0 27 0>, /* INT */ + <8 0 &gpio0 28 0>, /* RX */ + <9 0 &gpio0 29 0>, /* TX */ + <10 0 &gpio0 30 0>, /* SCL */ + <11 0 &gpio0 31 0>; /* SDA */ + /* +5V */ + /* GND */ + }; + + mikrobus_2_header: mikrobus-connector-2 { + compatible = "mikro-bus"; + #gpio-cells = <2>; + gpio-map-mask = <0xffffffff 0xffffffc0>; + gpio-map-pass-thru = <0 0x3f>; + gpio-map = <0 0 &gpio0 25 0>, /* AN */ + <1 0 &gpio0 12 0>, /* RST */ + <2 0 &gpio1 2 0>, /* CS */ + <3 0 &gpio1 3 0>, /* SCK */ + <4 0 &gpio1 4 0>, /* MISO */ + <5 0 &gpio1 5 0>, /* MOSI */ + /* +3.3V */ + /* GND */ + <6 0 &gpio1 6 0>, /* PWM */ + <7 0 &gpio1 7 0>, /* INT */ + <8 0 &gpio1 8 0>, /* RX */ + <9 0 &gpio0 17 0>, /* TX */ + <10 0 &gpio0 18 0>, /* SCL */ + <11 0 &gpio0 19 0>; /* SDA */ + /* +5V */ + /* GND */ }; aliases { @@ -186,6 +185,7 @@ zephyr_udc0: &usbd { &pll { status = "okay"; }; + &i2c { status = "okay"; pinctrl-0 = <&i2c_default>; @@ -218,10 +218,18 @@ mikrobus_1_i2c: &i2c {}; mikrobus_1_spi: &spi {}; -mikrobus_1_uart: &uart2 {}; +mikrobus_1_uart: &uart3 {}; mikrobus_2_i2c: &i2c2 {}; mikrobus_2_spi: &spi2 {}; -mikrobus_2_uart: &uart3 {}; +mikrobus_2_uart: &uart2 {}; + +mikrobus_i2c: &mikrobus_1_i2c {}; + +mikrobus_spi: &mikrobus_1_spi {}; + +mikrobus_serial: &mikrobus_1_uart {}; + +mikrobus_header: &mikrobus_1_header {}; diff --git a/boards/renesas/ek_ra2a1/doc/index.rst b/boards/renesas/ek_ra2a1/doc/index.rst index d4b82826fd62e1a..365a9c2e04efff0 100644 --- a/boards/renesas/ek_ra2a1/doc/index.rst +++ b/boards/renesas/ek_ra2a1/doc/index.rst @@ -78,6 +78,10 @@ hardware features: +-----------+------------+-------------------------------+ | UART | on-chip | uart | +-----------+------------+-------------------------------+ +| SPI | on-chip | spi | ++-----------+------------+-------------------------------+ +| COUNTER | on-chip | counter | ++-----------+------------+-------------------------------+ The default configuration can be found in :zephyr_file:`boards/renesas/ek_ra2a1/ek_ra2a1_defconfig` diff --git a/boards/renesas/ek_ra2a1/ek_ra2a1-pinctrl.dtsi b/boards/renesas/ek_ra2a1/ek_ra2a1-pinctrl.dtsi index cded3e5f6556b33..554b44803d6a58c 100644 --- a/boards/renesas/ek_ra2a1/ek_ra2a1-pinctrl.dtsi +++ b/boards/renesas/ek_ra2a1/ek_ra2a1-pinctrl.dtsi @@ -16,4 +16,14 @@ drive-strength = "medium"; }; }; + + spi1_default: spi1_default { + group1 { + /* MISO MOSI RSPCK SSL */ + psels = , + , + , + ; + }; + }; }; diff --git a/boards/renesas/ek_ra2a1/ek_ra2a1.dts b/boards/renesas/ek_ra2a1/ek_ra2a1.dts index eb14660f8ac0501..1bb06419ca957ca 100644 --- a/boards/renesas/ek_ra2a1/ek_ra2a1.dts +++ b/boards/renesas/ek_ra2a1/ek_ra2a1.dts @@ -58,3 +58,14 @@ status = "okay"; }; }; + +&spi1 { + pinctrl-0 = <&spi1_default>; + pinctrl-names = "default"; + cs-gpios = <&ioport1 2 GPIO_ACTIVE_LOW>; + status = "okay"; +}; + +&ioport1 { + status = "okay"; +}; diff --git a/boards/renesas/ek_ra4e2/doc/index.rst b/boards/renesas/ek_ra4e2/doc/index.rst index 64162fc7f6469c8..cc2eb04af0d96e9 100644 --- a/boards/renesas/ek_ra4e2/doc/index.rst +++ b/boards/renesas/ek_ra4e2/doc/index.rst @@ -98,6 +98,8 @@ The below features are currently supported on Zephyr OS for EK-RA4E2 board: +-----------+------------+----------------------+ | CLOCK | on-chip | clock control | +-----------+------------+----------------------+ +| SPI | on-chip | spi | ++-----------+------------+----------------------+ Other hardware features are currently not supported by the port. diff --git a/boards/renesas/ek_ra4e2/ek_ra4e2-pinctrl.dtsi b/boards/renesas/ek_ra4e2/ek_ra4e2-pinctrl.dtsi index 851d8543beea0c8..9c808d53a5285c2 100644 --- a/boards/renesas/ek_ra4e2/ek_ra4e2-pinctrl.dtsi +++ b/boards/renesas/ek_ra4e2/ek_ra4e2-pinctrl.dtsi @@ -11,4 +11,14 @@ ; }; }; + + spi0_default: spi0_default { + group1 { + /* MISO MOSI RSPCK SSL */ + psels = , + , + , + ; + }; + }; }; diff --git a/boards/renesas/ek_ra4e2/ek_ra4e2.dts b/boards/renesas/ek_ra4e2/ek_ra4e2.dts index aa1e8f9435d3cf4..b99fafa457c7690 100644 --- a/boards/renesas/ek_ra4e2/ek_ra4e2.dts +++ b/boards/renesas/ek_ra4e2/ek_ra4e2.dts @@ -76,3 +76,9 @@ &ioport2 { status = "okay"; }; + +&spi0 { + pinctrl-0 = <&spi0_default>; + pinctrl-names = "default"; + status = "okay"; +}; diff --git a/boards/renesas/ek_ra4m2/doc/index.rst b/boards/renesas/ek_ra4m2/doc/index.rst index d8bc9bce89f631a..c3c5583bf3682fc 100644 --- a/boards/renesas/ek_ra4m2/doc/index.rst +++ b/boards/renesas/ek_ra4m2/doc/index.rst @@ -98,6 +98,10 @@ The below features are currently supported on Zephyr OS for EK-RA4M2 board: +-----------+------------+----------------------+ | CLOCK | on-chip | clock control | +-----------+------------+----------------------+ +| SPI | on-chip | spi | ++-----------+------------+----------------------+ +| COUNTER | on-chip | counter | ++-----------+------------+----------------------+ Other hardware features are currently not supported by the port. diff --git a/boards/renesas/ek_ra4m2/ek_ra4m2-pinctrl.dtsi b/boards/renesas/ek_ra4m2/ek_ra4m2-pinctrl.dtsi index 851d8543beea0c8..a4c832c6e9e4b0d 100644 --- a/boards/renesas/ek_ra4m2/ek_ra4m2-pinctrl.dtsi +++ b/boards/renesas/ek_ra4m2/ek_ra4m2-pinctrl.dtsi @@ -11,4 +11,14 @@ ; }; }; + + spi0_default: spi0_default { + group1 { + /* MISO MOSI RSPCK SSL */ + psels = , + , + , + ; + }; + }; }; diff --git a/boards/renesas/ek_ra4m2/ek_ra4m2.dts b/boards/renesas/ek_ra4m2/ek_ra4m2.dts index 9ccde6acd8a383b..aa75e8a795cad9f 100644 --- a/boards/renesas/ek_ra4m2/ek_ra4m2.dts +++ b/boards/renesas/ek_ra4m2/ek_ra4m2.dts @@ -72,3 +72,9 @@ &ioport4 { status = "okay"; }; + +&spi0 { + pinctrl-0 = <&spi0_default>; + pinctrl-names = "default"; + status = "okay"; +}; diff --git a/boards/renesas/ek_ra4m3/doc/index.rst b/boards/renesas/ek_ra4m3/doc/index.rst index 5b1ee93c77ad289..5ff3b755654d9f9 100644 --- a/boards/renesas/ek_ra4m3/doc/index.rst +++ b/boards/renesas/ek_ra4m3/doc/index.rst @@ -100,6 +100,10 @@ The below features are currently supported on Zephyr OS for EK-RA4M3 board: +-----------+------------+----------------------+ | CLOCK | on-chip | clock control | +-----------+------------+----------------------+ +| SPI | on-chip | spi | ++-----------+------------+----------------------+ +| COUNTER | on-chip | counter | ++-----------+------------+----------------------+ Other hardware features are currently not supported by the port. diff --git a/boards/renesas/ek_ra4m3/ek_ra4m3-pinctrl.dtsi b/boards/renesas/ek_ra4m3/ek_ra4m3-pinctrl.dtsi index 851d8543beea0c8..408f6e610b5a5ee 100644 --- a/boards/renesas/ek_ra4m3/ek_ra4m3-pinctrl.dtsi +++ b/boards/renesas/ek_ra4m3/ek_ra4m3-pinctrl.dtsi @@ -11,4 +11,14 @@ ; }; }; + + spi0_default: spi0_default { + group1 { + /* MISO MOSI RSPCK SSL */ + psels = , + , + , + ; + }; + }; }; diff --git a/boards/renesas/ek_ra4m3/ek_ra4m3.dts b/boards/renesas/ek_ra4m3/ek_ra4m3.dts index 21867f1dbe493a4..cdcb10ca08db457 100644 --- a/boards/renesas/ek_ra4m3/ek_ra4m3.dts +++ b/boards/renesas/ek_ra4m3/ek_ra4m3.dts @@ -72,3 +72,9 @@ &ioport4 { status = "okay"; }; + +&spi0 { + pinctrl-0 = <&spi0_default>; + pinctrl-names = "default"; + status = "okay"; +}; diff --git a/boards/renesas/ek_ra4w1/doc/index.rst b/boards/renesas/ek_ra4w1/doc/index.rst index 7e2cae31d29d8e5..097b1b4448a3c20 100644 --- a/boards/renesas/ek_ra4w1/doc/index.rst +++ b/boards/renesas/ek_ra4w1/doc/index.rst @@ -90,6 +90,10 @@ The below features are currently supported on Zephyr OS for EK-RA4W1 board: +-----------+------------+----------------------+ | CLOCK | on-chip | clock control | +-----------+------------+----------------------+ +| SPI | on-chip | spi | ++-----------+------------+----------------------+ +| COUNTER | on-chip | counter | ++-----------+------------+----------------------+ Other hardware features are currently not supported by the port. diff --git a/boards/renesas/ek_ra4w1/ek_ra4w1-pinctrl.dtsi b/boards/renesas/ek_ra4w1/ek_ra4w1-pinctrl.dtsi index 3c01cb6bec4cfc9..cfcc3fc54104856 100644 --- a/boards/renesas/ek_ra4w1/ek_ra4w1-pinctrl.dtsi +++ b/boards/renesas/ek_ra4w1/ek_ra4w1-pinctrl.dtsi @@ -11,4 +11,14 @@ ; }; }; + + spi1_default: spi1_default { + group1 { + /* MISO MOSI RSPCK SSL */ + psels = , + , + , + ; + }; + }; }; diff --git a/boards/renesas/ek_ra4w1/ek_ra4w1.dts b/boards/renesas/ek_ra4w1/ek_ra4w1.dts index 7d764631e034b50..2ba85852e9b3085 100644 --- a/boards/renesas/ek_ra4w1/ek_ra4w1.dts +++ b/boards/renesas/ek_ra4w1/ek_ra4w1.dts @@ -59,3 +59,9 @@ &ioport4 { status = "okay"; }; + +&spi1 { + pinctrl-0 = <&spi1_default>; + pinctrl-names = "default"; + status = "okay"; +}; diff --git a/boards/renesas/ek_ra6e2/doc/index.rst b/boards/renesas/ek_ra6e2/doc/index.rst index b32aeab97bdcd6e..4dce24edaf05b24 100644 --- a/boards/renesas/ek_ra6e2/doc/index.rst +++ b/boards/renesas/ek_ra6e2/doc/index.rst @@ -98,6 +98,8 @@ The below features are currently supported on Zephyr OS for EK-RA6E2 board: +-----------+------------+----------------------+ | CLOCK | on-chip | clock control | +-----------+------------+----------------------+ +| SPI | on-chip | spi | ++-----------+------------+----------------------+ Other hardware features are currently not supported by the port. diff --git a/boards/renesas/ek_ra6e2/ek_ra6e2-pinctrl.dtsi b/boards/renesas/ek_ra6e2/ek_ra6e2-pinctrl.dtsi index 851d8543beea0c8..5c47dd207044d14 100644 --- a/boards/renesas/ek_ra6e2/ek_ra6e2-pinctrl.dtsi +++ b/boards/renesas/ek_ra6e2/ek_ra6e2-pinctrl.dtsi @@ -11,4 +11,14 @@ ; }; }; + + spi0_default: spi0_default { + group1 { + /* MISO MOSI RSPCK SSL */ + psels = , + , + , + ; + }; + }; }; diff --git a/boards/renesas/ek_ra6e2/ek_ra6e2.dts b/boards/renesas/ek_ra6e2/ek_ra6e2.dts index 6e068eb55bd83f3..a19f1ab5ff8e4c6 100644 --- a/boards/renesas/ek_ra6e2/ek_ra6e2.dts +++ b/boards/renesas/ek_ra6e2/ek_ra6e2.dts @@ -56,6 +56,12 @@ status = "okay"; }; +&spi0 { + pinctrl-0 = <&spi0_default>; + pinctrl-names = "default"; + status = "okay"; +}; + &ioport2 { status = "okay"; }; diff --git a/boards/renesas/ek_ra6m1/doc/index.rst b/boards/renesas/ek_ra6m1/doc/index.rst index 468296350209359..9436486539dad8e 100644 --- a/boards/renesas/ek_ra6m1/doc/index.rst +++ b/boards/renesas/ek_ra6m1/doc/index.rst @@ -96,6 +96,10 @@ The below features are currently supported on Zephyr OS for EK-RA6M1 board: +-----------+------------+----------------------+ | I2C | on-chip | i2c | +-----------+------------+----------------------+ +| SPI | on-chip | spi | ++-----------+------------+----------------------+ +| COUNTER | on-chip | counter | ++-----------+------------+----------------------+ Other hardware features are currently not supported by the port. diff --git a/boards/renesas/ek_ra6m1/ek_ra6m1-pinctrl.dtsi b/boards/renesas/ek_ra6m1/ek_ra6m1-pinctrl.dtsi index 6253efac01d1cca..cb5eb69d6b484bc 100644 --- a/boards/renesas/ek_ra6m1/ek_ra6m1-pinctrl.dtsi +++ b/boards/renesas/ek_ra6m1/ek_ra6m1-pinctrl.dtsi @@ -20,4 +20,14 @@ drive-strength = "medium"; }; }; + + spi0_default: spi0_default { + group1 { + /* MISO MOSI RSPCK SSL */ + psels = , + , + , + ; + }; + }; }; diff --git a/boards/renesas/ek_ra6m1/ek_ra6m1.dts b/boards/renesas/ek_ra6m1/ek_ra6m1.dts index 3289a2dd69bec4f..e21d57280f74865 100644 --- a/boards/renesas/ek_ra6m1/ek_ra6m1.dts +++ b/boards/renesas/ek_ra6m1/ek_ra6m1.dts @@ -55,6 +55,12 @@ pinctrl-names = "default"; }; +&spi0 { + pinctrl-0 = <&spi0_default>; + pinctrl-names = "default"; + status = "okay"; +}; + &ioport1 { status = "okay"; }; diff --git a/boards/renesas/ek_ra6m2/doc/index.rst b/boards/renesas/ek_ra6m2/doc/index.rst index 1324b155e9d7b36..59fb6c4d356a036 100644 --- a/boards/renesas/ek_ra6m2/doc/index.rst +++ b/boards/renesas/ek_ra6m2/doc/index.rst @@ -90,6 +90,10 @@ The below features are currently supported on Zephyr OS for EK-RA6M2 board: +-----------+------------+----------------------+ | I2C | on-chip | i2c | +-----------+------------+----------------------+ +| SPI | on-chip | spi | ++-----------+------------+----------------------+ +| COUNTER | on-chip | counter | ++-----------+------------+----------------------+ Other hardware features are currently not supported by the port. diff --git a/boards/renesas/ek_ra6m2/ek_ra6m2-pinctrl.dtsi b/boards/renesas/ek_ra6m2/ek_ra6m2-pinctrl.dtsi index 42958e5da30f362..45dd5625022e991 100644 --- a/boards/renesas/ek_ra6m2/ek_ra6m2-pinctrl.dtsi +++ b/boards/renesas/ek_ra6m2/ek_ra6m2-pinctrl.dtsi @@ -20,4 +20,14 @@ drive-strength = "medium"; }; }; + + spi0_default: spi0_default { + group1 { + /* MISO MOSI RSPCK SSL */ + psels = , + , + , + ; + }; + }; }; diff --git a/boards/renesas/ek_ra6m2/ek_ra6m2.dts b/boards/renesas/ek_ra6m2/ek_ra6m2.dts index 5f3d1bcd17918ff..d1fca9242e47374 100644 --- a/boards/renesas/ek_ra6m2/ek_ra6m2.dts +++ b/boards/renesas/ek_ra6m2/ek_ra6m2.dts @@ -55,6 +55,12 @@ pinctrl-names = "default"; }; +&spi0 { + pinctrl-0 = <&spi0_default>; + pinctrl-names = "default"; + status = "okay"; +}; + &ioport1 { status = "okay"; }; diff --git a/boards/renesas/ek_ra6m3/doc/index.rst b/boards/renesas/ek_ra6m3/doc/index.rst index 223314ac795acc7..fed1a53207dad7a 100644 --- a/boards/renesas/ek_ra6m3/doc/index.rst +++ b/boards/renesas/ek_ra6m3/doc/index.rst @@ -98,6 +98,10 @@ The below features are currently supported on Zephyr OS for EK-RA6M3 board: +-----------+------------+----------------------+ | I2C | on-chip | i2c | +-----------+------------+----------------------+ +| SPI | on-chip | spi | ++-----------+------------+----------------------+ +| COUNTER | on-chip | counter | ++-----------+------------+----------------------+ Other hardware features are currently not supported by the port. diff --git a/boards/renesas/ek_ra6m3/ek_ra6m3-pinctrl.dtsi b/boards/renesas/ek_ra6m3/ek_ra6m3-pinctrl.dtsi index 15881d04096394c..d1efcc91ba42735 100644 --- a/boards/renesas/ek_ra6m3/ek_ra6m3-pinctrl.dtsi +++ b/boards/renesas/ek_ra6m3/ek_ra6m3-pinctrl.dtsi @@ -20,4 +20,14 @@ drive-strength = "medium"; }; }; + + spi0_default: spi0_default { + group1 { + /* MISO MOSI RSPCK SSL */ + psels = , + , + , + ; + }; + }; }; diff --git a/boards/renesas/ek_ra6m3/ek_ra6m3.dts b/boards/renesas/ek_ra6m3/ek_ra6m3.dts index a1150cd3a668ca4..96b9bac56305edf 100644 --- a/boards/renesas/ek_ra6m3/ek_ra6m3.dts +++ b/boards/renesas/ek_ra6m3/ek_ra6m3.dts @@ -42,6 +42,12 @@ }; }; +&spi0 { + pinctrl-0 = <&spi0_default>; + pinctrl-names = "default"; + status = "okay"; +}; + &ioport1 { status = "okay"; }; diff --git a/boards/renesas/ek_ra6m4/doc/index.rst b/boards/renesas/ek_ra6m4/doc/index.rst index 0256eec806db024..1232b815e8709af 100644 --- a/boards/renesas/ek_ra6m4/doc/index.rst +++ b/boards/renesas/ek_ra6m4/doc/index.rst @@ -103,6 +103,10 @@ The below features are currently supported on Zephyr OS for EK-RA6M4 board: +-----------+------------+----------------------+ | I2C | on-chip | i2c | +-----------+------------+----------------------+ +| SPI | on-chip | spi | ++-----------+------------+----------------------+ +| COUNTER | on-chip | counter | ++-----------+------------+----------------------+ Other hardware features are currently not supported by the port. diff --git a/boards/renesas/ek_ra6m4/ek_ra6m4-pinctrl.dtsi b/boards/renesas/ek_ra6m4/ek_ra6m4-pinctrl.dtsi index e7501c7dcbcfdf5..5519f92f74f9db3 100644 --- a/boards/renesas/ek_ra6m4/ek_ra6m4-pinctrl.dtsi +++ b/boards/renesas/ek_ra6m4/ek_ra6m4-pinctrl.dtsi @@ -20,4 +20,14 @@ drive-strength = "medium"; }; }; + + spi0_default: spi0_default { + group1 { + /* MISO MOSI RSPCK SSL */ + psels = , + , + , + ; + }; + }; }; diff --git a/boards/renesas/ek_ra6m4/ek_ra6m4.dts b/boards/renesas/ek_ra6m4/ek_ra6m4.dts index 10ed42ab5eac7fd..2f3b9eb3acd2241 100644 --- a/boards/renesas/ek_ra6m4/ek_ra6m4.dts +++ b/boards/renesas/ek_ra6m4/ek_ra6m4.dts @@ -63,6 +63,12 @@ pinctrl-names = "default"; }; +&spi0 { + pinctrl-0 = <&spi0_default>; + pinctrl-names = "default"; + status = "okay"; +}; + &ioport4 { status = "okay"; }; diff --git a/boards/renesas/ek_ra6m5/doc/index.rst b/boards/renesas/ek_ra6m5/doc/index.rst index 45269bda8eef4e2..6c8a708dc09d41f 100644 --- a/boards/renesas/ek_ra6m5/doc/index.rst +++ b/boards/renesas/ek_ra6m5/doc/index.rst @@ -101,6 +101,10 @@ The below features are currently supported on Zephyr OS for EK-RA6M5 board: +-----------+------------+----------------------+ | I2C | on-chip | i2c | +-----------+------------+----------------------+ +| SPI | on-chip | spi | ++-----------+------------+----------------------+ +| COUNTER | on-chip | counter | ++-----------+------------+----------------------+ Other hardware features are currently not supported by the port. diff --git a/boards/renesas/ek_ra6m5/ek_ra6m5-pinctrl.dtsi b/boards/renesas/ek_ra6m5/ek_ra6m5-pinctrl.dtsi index e7501c7dcbcfdf5..5519f92f74f9db3 100644 --- a/boards/renesas/ek_ra6m5/ek_ra6m5-pinctrl.dtsi +++ b/boards/renesas/ek_ra6m5/ek_ra6m5-pinctrl.dtsi @@ -20,4 +20,14 @@ drive-strength = "medium"; }; }; + + spi0_default: spi0_default { + group1 { + /* MISO MOSI RSPCK SSL */ + psels = , + , + , + ; + }; + }; }; diff --git a/boards/renesas/ek_ra6m5/ek_ra6m5.dts b/boards/renesas/ek_ra6m5/ek_ra6m5.dts index bd8245701d6a0f0..7abc7292c0c6e65 100644 --- a/boards/renesas/ek_ra6m5/ek_ra6m5.dts +++ b/boards/renesas/ek_ra6m5/ek_ra6m5.dts @@ -63,6 +63,12 @@ pinctrl-names = "default"; }; +&spi0 { + pinctrl-0 = <&spi0_default>; + pinctrl-names = "default"; + status = "okay"; +}; + &ioport0 { status = "okay"; }; diff --git a/boards/renesas/ek_ra8m1/ek_ra8m1.dts b/boards/renesas/ek_ra8m1/ek_ra8m1.dts index 354e53298f8a1b8..3d587fb0e177721 100644 --- a/boards/renesas/ek_ra8m1/ek_ra8m1.dts +++ b/boards/renesas/ek_ra8m1/ek_ra8m1.dts @@ -246,6 +246,8 @@ mikrobus_serial: &uart3 {}; &spi1 { pinctrl-0 = <&spi1_default>; + pinctrl-names = "default"; + status = "okay"; }; &pwm7 { diff --git a/boards/renesas/fpb_ra6e1/doc/index.rst b/boards/renesas/fpb_ra6e1/doc/index.rst index 8f5849b6b1c979c..9d8e73b92195551 100644 --- a/boards/renesas/fpb_ra6e1/doc/index.rst +++ b/boards/renesas/fpb_ra6e1/doc/index.rst @@ -85,6 +85,10 @@ The below features are currently supported on Zephyr OS for FPB-RA6E1 board: +-----------+------------+----------------------+ | I2C | on-chip | i2c | +-----------+------------+----------------------+ +| SPI | on-chip | spi | ++-----------+------------+----------------------+ +| COUNTER | on-chip | counter | ++-----------+------------+----------------------+ Other hardware features are currently not supported by the port. diff --git a/boards/renesas/fpb_ra6e1/fpb_ra6e1-pinctrl.dtsi b/boards/renesas/fpb_ra6e1/fpb_ra6e1-pinctrl.dtsi index ee5bb639c5d4b3f..90253c6b4c463a2 100644 --- a/boards/renesas/fpb_ra6e1/fpb_ra6e1-pinctrl.dtsi +++ b/boards/renesas/fpb_ra6e1/fpb_ra6e1-pinctrl.dtsi @@ -20,4 +20,14 @@ drive-strength = "medium"; }; }; + + spi1_default: spi1_default { + group1 { + /* MISO MOSI RSPCK SSL */ + psels = , + , + , + ; + }; + }; }; diff --git a/boards/renesas/fpb_ra6e1/fpb_ra6e1.dts b/boards/renesas/fpb_ra6e1/fpb_ra6e1.dts index 8eb971a83864a30..fefb2651d078791 100644 --- a/boards/renesas/fpb_ra6e1/fpb_ra6e1.dts +++ b/boards/renesas/fpb_ra6e1/fpb_ra6e1.dts @@ -59,6 +59,12 @@ pinctrl-names = "default"; }; +&spi1 { + pinctrl-0 = <&spi1_default>; + pinctrl-names = "default"; + status = "okay"; +}; + &ioport4 { status = "okay"; }; diff --git a/boards/renesas/fpb_ra6e2/doc/index.rst b/boards/renesas/fpb_ra6e2/doc/index.rst index 178375e9593dfc4..e7aeb268852e28f 100644 --- a/boards/renesas/fpb_ra6e2/doc/index.rst +++ b/boards/renesas/fpb_ra6e2/doc/index.rst @@ -85,6 +85,8 @@ The below features are currently supported on Zephyr OS for FPB-RA6E2 board: +-----------+------------+----------------------+ | UART | on-chip | serial | +-----------+------------+----------------------+ +| SPI | on-chip | spi | ++-----------+------------+----------------------+ Other hardware features are currently not supported by the port. diff --git a/boards/renesas/fpb_ra6e2/fpb_ra6e2-pinctrl.dtsi b/boards/renesas/fpb_ra6e2/fpb_ra6e2-pinctrl.dtsi index 851d8543beea0c8..5c47dd207044d14 100644 --- a/boards/renesas/fpb_ra6e2/fpb_ra6e2-pinctrl.dtsi +++ b/boards/renesas/fpb_ra6e2/fpb_ra6e2-pinctrl.dtsi @@ -11,4 +11,14 @@ ; }; }; + + spi0_default: spi0_default { + group1 { + /* MISO MOSI RSPCK SSL */ + psels = , + , + , + ; + }; + }; }; diff --git a/boards/renesas/fpb_ra6e2/fpb_ra6e2.dts b/boards/renesas/fpb_ra6e2/fpb_ra6e2.dts index fbde0caf0139517..2ca322be8356547 100644 --- a/boards/renesas/fpb_ra6e2/fpb_ra6e2.dts +++ b/boards/renesas/fpb_ra6e2/fpb_ra6e2.dts @@ -49,6 +49,12 @@ }; }; +&spi0 { + pinctrl-0 = <&spi0_default>; + pinctrl-names = "default"; + status = "okay"; +}; + &ioport2 { status = "okay"; }; diff --git a/boards/renode/cortex_r8_virtual/cortex_r8_virtual.yaml b/boards/renode/cortex_r8_virtual/cortex_r8_virtual.yaml index 8d888e8806cf9c9..36a60b9ff9ab14e 100644 --- a/boards/renode/cortex_r8_virtual/cortex_r8_virtual.yaml +++ b/boards/renode/cortex_r8_virtual/cortex_r8_virtual.yaml @@ -5,8 +5,9 @@ arch: arm toolchain: - zephyr ram: 131072 -simulation: renode -simulation_exec: renode +simulation: + - name: renode + exec: renode testing: ignore_tags: - net diff --git a/boards/renode/riscv32_virtual/riscv32_virtual.yaml b/boards/renode/riscv32_virtual/riscv32_virtual.yaml index 64cab1f32ba5e9a..6b2f85d5f88184d 100644 --- a/boards/renode/riscv32_virtual/riscv32_virtual.yaml +++ b/boards/renode/riscv32_virtual/riscv32_virtual.yaml @@ -6,8 +6,9 @@ toolchain: - zephyr ram: 4096 flash: 4096 -simulation: renode -simulation_exec: renode +simulation: + - name: renode + exec: renode testing: ignore_tags: - net diff --git a/boards/seeed/xiao_esp32c3/xiao_esp32c3.dts b/boards/seeed/xiao_esp32c3/xiao_esp32c3.dts index 0be67a645c43424..5786e33c0ad68c3 100644 --- a/boards/seeed/xiao_esp32c3/xiao_esp32c3.dts +++ b/boards/seeed/xiao_esp32c3/xiao_esp32c3.dts @@ -7,9 +7,9 @@ /dts-v1/; #include -#include #include "xiao_esp32c3-pinctrl.dtsi" #include "seeed_xiao_connector.dtsi" +#include / { model = "Seeed XIAO ESP32C3"; diff --git a/boards/seeed/xiao_esp32s3/xiao_esp32s3_appcpu.dts b/boards/seeed/xiao_esp32s3/xiao_esp32s3_appcpu.dts index 0f678dc0ccaa144..851abb50b5ae52e 100644 --- a/boards/seeed/xiao_esp32s3/xiao_esp32s3_appcpu.dts +++ b/boards/seeed/xiao_esp32s3/xiao_esp32s3_appcpu.dts @@ -5,7 +5,7 @@ */ /dts-v1/; -#include +#include #include / { diff --git a/boards/seeed/xiao_esp32s3/xiao_esp32s3_procpu.dts b/boards/seeed/xiao_esp32s3/xiao_esp32s3_procpu.dts index cdf5801e362f31d..ca5d919e4fdd7ac 100644 --- a/boards/seeed/xiao_esp32s3/xiao_esp32s3_procpu.dts +++ b/boards/seeed/xiao_esp32s3/xiao_esp32s3_procpu.dts @@ -7,6 +7,8 @@ /dts-v1/; #include "xiao_esp32s3_procpu_common.dtsi" +#include "xiao_esp32s3-pinctrl.dtsi" +#include "seeed_xiao_connector.dtsi" #include / { diff --git a/boards/shields/adafruit_2_8_tft_touch_v2/boards/rd_rw612_bga.overlay b/boards/shields/adafruit_2_8_tft_touch_v2/boards/rd_rw612_bga.overlay index 8c44347e63f1dae..2e193a00d4ff56e 100644 --- a/boards/shields/adafruit_2_8_tft_touch_v2/boards/rd_rw612_bga.overlay +++ b/boards/shields/adafruit_2_8_tft_touch_v2/boards/rd_rw612_bga.overlay @@ -22,6 +22,8 @@ &lcdic { /* Byte swapping not supported for this display */ /delete-property/ nxp,swap-bytes; + /* Set timer0 ratio to enable longer resets */ + nxp,timer0-ratio = <15>; /* * Settings to connect this display: diff --git a/boards/shields/lcd_par_s035/boards/rd_rw612_bga.overlay b/boards/shields/lcd_par_s035/boards/rd_rw612_bga.overlay index be0ba1319ec9033..3633336931089b7 100644 --- a/boards/shields/lcd_par_s035/boards/rd_rw612_bga.overlay +++ b/boards/shields/lcd_par_s035/boards/rd_rw612_bga.overlay @@ -64,7 +64,7 @@ }; &st7796s { - mipi-mode = ; + mipi-mode = "MIPI_DBI_MODE_8080_BUS_8_BIT"; /* * Display supports minimum write cycle time of 66ns. This * means we can clock the LCDIC module at 30MHz, as @@ -92,4 +92,6 @@ /* Set pulse width for write active and write inactive to min value */ nxp,write-active-cycles = <1>; nxp,write-inactive-cycles = <1>; + /* Raise the timer0 ratio to enable longer reset delay */ + nxp,timer0-ratio = <15>; }; diff --git a/boards/shields/lcd_par_s035/lcd_par_s035_8080.overlay b/boards/shields/lcd_par_s035/lcd_par_s035_8080.overlay index 281bfa22f47505f..f47a66042f37f92 100644 --- a/boards/shields/lcd_par_s035/lcd_par_s035_8080.overlay +++ b/boards/shields/lcd_par_s035/lcd_par_s035_8080.overlay @@ -39,7 +39,7 @@ reg = <0>; /* Baud rate on each pin is 1MHz */ mipi-max-frequency = <10000000>; - mipi-mode = ; + mipi-mode = "MIPI_DBI_MODE_8080_BUS_16_BIT"; height = <320>; width = <480>; invert-mode = "1-dot"; diff --git a/boards/shields/st7735r/st7735r_ada_160x128.overlay b/boards/shields/st7735r/st7735r_ada_160x128.overlay index d769b9a1a4dd55d..1547c6fa281340d 100644 --- a/boards/shields/st7735r/st7735r_ada_160x128.overlay +++ b/boards/shields/st7735r/st7735r_ada_160x128.overlay @@ -22,7 +22,7 @@ st7735r_st7735r_ada_160x128: st7735r@0 { compatible = "sitronix,st7735r"; mipi-max-frequency = <20000000>; - mipi-mode = ; + mipi-mode = "MIPI_DBI_MODE_SPI_4WIRE"; reg = <0>; width = <160>; height = <128>; diff --git a/boards/shields/st7789v_generic/st7789v_tl019fqv01.overlay b/boards/shields/st7789v_generic/st7789v_tl019fqv01.overlay index 46c863b5ac896fa..059f9d565b6ddf3 100644 --- a/boards/shields/st7789v_generic/st7789v_tl019fqv01.overlay +++ b/boards/shields/st7789v_generic/st7789v_tl019fqv01.overlay @@ -42,7 +42,7 @@ nvgam-param = [D0 00 02 07 05 15 2D 44 44 1C 18 16 1C 1D]; ram-param = [00 F8]; rgb-param = [CD 08 14]; - mipi-mode = ; + mipi-mode = "MIPI_DBI_MODE_SPI_4WIRE"; }; }; }; diff --git a/boards/shields/st7789v_generic/st7789v_waveshare_240x240.overlay b/boards/shields/st7789v_generic/st7789v_waveshare_240x240.overlay index 0a92937a982fe0c..e4128572b446d8b 100644 --- a/boards/shields/st7789v_generic/st7789v_waveshare_240x240.overlay +++ b/boards/shields/st7789v_generic/st7789v_waveshare_240x240.overlay @@ -44,7 +44,7 @@ nvgam-param = [D0 04 0C 11 13 2C 3F 44 51 2F 1F 1F 20 23]; ram-param = [00 F0]; rgb-param = [CD 08 14]; - mipi-mode = ; + mipi-mode = "MIPI_DBI_MODE_SPI_4WIRE"; }; }; }; diff --git a/boards/sifive/hifive1/hifive1.yaml b/boards/sifive/hifive1/hifive1.yaml index 99463674324ba5b..bb575f695f3d47f 100644 --- a/boards/sifive/hifive1/hifive1.yaml +++ b/boards/sifive/hifive1/hifive1.yaml @@ -5,8 +5,9 @@ arch: riscv toolchain: - zephyr ram: 16 -simulation: renode -simulation_exec: renode +simulation: + - name: renode + exec: renode supported: - pwm - gpio diff --git a/boards/sifive/hifive_unleashed/hifive_unleashed_e51.yaml b/boards/sifive/hifive_unleashed/hifive_unleashed_e51.yaml index 74d01617336b4f8..28683410d528e18 100644 --- a/boards/sifive/hifive_unleashed/hifive_unleashed_e51.yaml +++ b/boards/sifive/hifive_unleashed/hifive_unleashed_e51.yaml @@ -5,8 +5,9 @@ arch: riscv toolchain: - zephyr ram: 3840 -simulation: renode -simulation_exec: renode +simulation: + - name: renode + exec: renode testing: timeout_multiplier: 6 ignore_tags: diff --git a/boards/sifive/hifive_unleashed/hifive_unleashed_u54.yaml b/boards/sifive/hifive_unleashed/hifive_unleashed_u54.yaml index 54b15bbd660be51..b0be2aedfc3663d 100644 --- a/boards/sifive/hifive_unleashed/hifive_unleashed_u54.yaml +++ b/boards/sifive/hifive_unleashed/hifive_unleashed_u54.yaml @@ -5,8 +5,9 @@ arch: riscv toolchain: - zephyr ram: 3840 -simulation: renode -simulation_exec: renode +simulation: + - name: renode + exec: renode testing: timeout_multiplier: 6 ignore_tags: diff --git a/boards/sifive/hifive_unmatched/hifive_unmatched_s7.yaml b/boards/sifive/hifive_unmatched/hifive_unmatched_s7.yaml index 171d8577d204991..18914290609838f 100644 --- a/boards/sifive/hifive_unmatched/hifive_unmatched_s7.yaml +++ b/boards/sifive/hifive_unmatched/hifive_unmatched_s7.yaml @@ -5,8 +5,9 @@ arch: riscv toolchain: - zephyr ram: 3840 -simulation: renode -simulation_exec: renode +simulation: + - name: renode + exec: renode testing: timeout_multiplier: 6 ignore_tags: diff --git a/boards/sifive/hifive_unmatched/hifive_unmatched_u74.yaml b/boards/sifive/hifive_unmatched/hifive_unmatched_u74.yaml index 09dd76d34c64064..9a7a5582b7e9a32 100644 --- a/boards/sifive/hifive_unmatched/hifive_unmatched_u74.yaml +++ b/boards/sifive/hifive_unmatched/hifive_unmatched_u74.yaml @@ -5,8 +5,9 @@ arch: riscv toolchain: - zephyr ram: 3840 -simulation: renode -simulation_exec: renode +simulation: + - name: renode + exec: renode testing: timeout_multiplier: 6 ignore_tags: diff --git a/boards/sipeed/longan_nano/longan_nano-common.dtsi b/boards/sipeed/longan_nano/longan_nano-common.dtsi index b5ec0c06a7ffa8d..e11ee37f8afb3df 100644 --- a/boards/sipeed/longan_nano/longan_nano-common.dtsi +++ b/boards/sipeed/longan_nano/longan_nano-common.dtsi @@ -106,7 +106,7 @@ caset = [00 01 00 a0]; raset = [00 1a 00 69]; - mipi-mode = ; + mipi-mode = "MIPI_DBI_MODE_SPI_4WIRE"; mipi-max-frequency = <4000000>; }; }; diff --git a/boards/snps/nsim/arc_classic/nsim_nsim_em.yaml b/boards/snps/nsim/arc_classic/nsim_nsim_em.yaml index 7fd973932eb046f..4ca8b66ab2cf8f8 100644 --- a/boards/snps/nsim/arc_classic/nsim_nsim_em.yaml +++ b/boards/snps/nsim/arc_classic/nsim_nsim_em.yaml @@ -1,8 +1,9 @@ identifier: nsim/nsim_em name: EM Nsim simulator type: sim -simulation: nsim -simulation_exec: nsimdrv +simulation: + - name: nsim + exec: nsimdrv arch: arc toolchain: - zephyr diff --git a/boards/snps/nsim/arc_classic/nsim_nsim_em11d.yaml b/boards/snps/nsim/arc_classic/nsim_nsim_em11d.yaml index e37aeb2f4425590..c69866d1752ba1c 100644 --- a/boards/snps/nsim/arc_classic/nsim_nsim_em11d.yaml +++ b/boards/snps/nsim/arc_classic/nsim_nsim_em11d.yaml @@ -1,8 +1,9 @@ identifier: nsim/nsim_em11d name: EM11D Nsim simulator type: sim -simulation: nsim -simulation_exec: nsimdrv +simulation: + - name: nsim + exec: nsimdrv arch: arc toolchain: - zephyr diff --git a/boards/snps/nsim/arc_classic/nsim_nsim_em7d_v22.yaml b/boards/snps/nsim/arc_classic/nsim_nsim_em7d_v22.yaml index c77c883ccc8d1a3..f23c4489749d9d7 100644 --- a/boards/snps/nsim/arc_classic/nsim_nsim_em7d_v22.yaml +++ b/boards/snps/nsim/arc_classic/nsim_nsim_em7d_v22.yaml @@ -1,8 +1,9 @@ identifier: nsim/nsim_em7d_v22 name: EM nSIM simulator (EM7D_v22) type: sim -simulation: nsim -simulation_exec: nsimdrv +simulation: + - name: nsim + exec: nsimdrv arch: arc toolchain: - zephyr diff --git a/boards/snps/nsim/arc_classic/nsim_nsim_hs.yaml b/boards/snps/nsim/arc_classic/nsim_nsim_hs.yaml index 2f02bf5c85a43fd..2a77407839cec07 100644 --- a/boards/snps/nsim/arc_classic/nsim_nsim_hs.yaml +++ b/boards/snps/nsim/arc_classic/nsim_nsim_hs.yaml @@ -1,8 +1,9 @@ identifier: nsim/nsim_hs name: HS nSIM simulator type: sim -simulation: nsim -simulation_exec: nsimdrv +simulation: + - name: nsim + exec: nsimdrv arch: arc toolchain: - zephyr diff --git a/boards/snps/nsim/arc_classic/nsim_nsim_hs5x.yaml b/boards/snps/nsim/arc_classic/nsim_nsim_hs5x.yaml index a20ad79a34a21e7..05c26d61f00f17d 100644 --- a/boards/snps/nsim/arc_classic/nsim_nsim_hs5x.yaml +++ b/boards/snps/nsim/arc_classic/nsim_nsim_hs5x.yaml @@ -1,8 +1,9 @@ identifier: nsim/nsim_hs5x name: HS5x nSIM simulator type: sim -simulation: nsim -simulation_exec: nsimdrv +simulation: + - name: nsim + exec: nsimdrv arch: arc toolchain: - zephyr diff --git a/boards/snps/nsim/arc_classic/nsim_nsim_hs5x_smp.yaml b/boards/snps/nsim/arc_classic/nsim_nsim_hs5x_smp.yaml index 09dcfd014efa25e..1d0e71868a4b719 100644 --- a/boards/snps/nsim/arc_classic/nsim_nsim_hs5x_smp.yaml +++ b/boards/snps/nsim/arc_classic/nsim_nsim_hs5x_smp.yaml @@ -1,8 +1,9 @@ identifier: nsim/nsim_hs5x/smp name: Multi-core HS5x nSIM simulator type: sim -simulation: mdb-nsim -simulation_exec: mdb +simulation: + - name: mdb-nsim + exec: mdb arch: arc toolchain: - zephyr diff --git a/boards/snps/nsim/arc_classic/nsim_nsim_hs5x_smp_12cores.yaml b/boards/snps/nsim/arc_classic/nsim_nsim_hs5x_smp_12cores.yaml index 63a60a3423aca62..e73c2f9216e939c 100644 --- a/boards/snps/nsim/arc_classic/nsim_nsim_hs5x_smp_12cores.yaml +++ b/boards/snps/nsim/arc_classic/nsim_nsim_hs5x_smp_12cores.yaml @@ -1,8 +1,9 @@ identifier: nsim/nsim_hs5x/smp/12cores name: Multi-core HS5x nSIM simulator (12 cores) type: sim -simulation: mdb-nsim -simulation_exec: mdb +simulation: + - name: mdb-nsim + exec: mdb arch: arc toolchain: - zephyr diff --git a/boards/snps/nsim/arc_classic/nsim_nsim_hs6x.yaml b/boards/snps/nsim/arc_classic/nsim_nsim_hs6x.yaml index 08d1fecc9c235a5..b175b1595097615 100644 --- a/boards/snps/nsim/arc_classic/nsim_nsim_hs6x.yaml +++ b/boards/snps/nsim/arc_classic/nsim_nsim_hs6x.yaml @@ -1,8 +1,9 @@ identifier: nsim/nsim_hs6x name: HS6x nSIM simulator type: sim -simulation: nsim -simulation_exec: nsimdrv +simulation: + - name: nsim + exec: nsimdrv arch: arc toolchain: - arcmwdt diff --git a/boards/snps/nsim/arc_classic/nsim_nsim_hs6x_smp.yaml b/boards/snps/nsim/arc_classic/nsim_nsim_hs6x_smp.yaml index 5db80b6afa1d120..4efcbf70f0d66cd 100644 --- a/boards/snps/nsim/arc_classic/nsim_nsim_hs6x_smp.yaml +++ b/boards/snps/nsim/arc_classic/nsim_nsim_hs6x_smp.yaml @@ -1,8 +1,9 @@ identifier: nsim/nsim_hs6x/smp name: Multi-core HS6x nSIM simulator type: sim -simulation: mdb-nsim -simulation_exec: mdb +simulation: + - name: mdb-nsim + exec: mdb arch: arc toolchain: - cross-compile diff --git a/boards/snps/nsim/arc_classic/nsim_nsim_hs6x_smp_12cores.yaml b/boards/snps/nsim/arc_classic/nsim_nsim_hs6x_smp_12cores.yaml index 085f4bb93d53deb..7b82325e64840a8 100644 --- a/boards/snps/nsim/arc_classic/nsim_nsim_hs6x_smp_12cores.yaml +++ b/boards/snps/nsim/arc_classic/nsim_nsim_hs6x_smp_12cores.yaml @@ -1,8 +1,9 @@ identifier: nsim/nsim_hs6x/smp/12cores name: Multi-core HS6x nSIM simulator (12 cores) type: sim -simulation: mdb-nsim -simulation_exec: mdb +simulation: + - name: mdb-nsim + exec: mdb arch: arc toolchain: - cross-compile diff --git a/boards/snps/nsim/arc_classic/nsim_nsim_hs_flash_xip.yaml b/boards/snps/nsim/arc_classic/nsim_nsim_hs_flash_xip.yaml index e39cfe00f9af055..9e54bba4b7a0cde 100644 --- a/boards/snps/nsim/arc_classic/nsim_nsim_hs_flash_xip.yaml +++ b/boards/snps/nsim/arc_classic/nsim_nsim_hs_flash_xip.yaml @@ -1,8 +1,9 @@ identifier: nsim/nsim_hs/flash_xip name: HS nSIM simulator (FLASH XIP) type: sim -simulation: nsim -simulation_exec: nsimdrv +simulation: + - name: nsim + exec: nsimdrv arch: arc toolchain: - zephyr diff --git a/boards/snps/nsim/arc_classic/nsim_nsim_hs_hostlink.yaml b/boards/snps/nsim/arc_classic/nsim_nsim_hs_hostlink.yaml index 6a2a224d2e69fb8..ccda2a5884ff63b 100644 --- a/boards/snps/nsim/arc_classic/nsim_nsim_hs_hostlink.yaml +++ b/boards/snps/nsim/arc_classic/nsim_nsim_hs_hostlink.yaml @@ -1,8 +1,9 @@ identifier: nsim/nsim_hs/hostlink name: HS3x nSIM simulator type: sim -simulation: nsim -simulation_exec: nsimdrv +simulation: + - name: nsim + exec: nsimdrv arch: arc toolchain: - zephyr diff --git a/boards/snps/nsim/arc_classic/nsim_nsim_hs_mpuv6.yaml b/boards/snps/nsim/arc_classic/nsim_nsim_hs_mpuv6.yaml index 03e5609e7033d81..e09e257cc32f439 100644 --- a/boards/snps/nsim/arc_classic/nsim_nsim_hs_mpuv6.yaml +++ b/boards/snps/nsim/arc_classic/nsim_nsim_hs_mpuv6.yaml @@ -1,8 +1,9 @@ identifier: nsim/nsim_hs/mpuv6 name: HS (with MPU v6) nSIM simulator type: sim -simulation: nsim -simulation_exec: nsimdrv +simulation: + - name: nsim + exec: nsimdrv arch: arc toolchain: - zephyr diff --git a/boards/snps/nsim/arc_classic/nsim_nsim_hs_smp.yaml b/boards/snps/nsim/arc_classic/nsim_nsim_hs_smp.yaml index 50f910e3f8cba2f..977a13826d08f07 100644 --- a/boards/snps/nsim/arc_classic/nsim_nsim_hs_smp.yaml +++ b/boards/snps/nsim/arc_classic/nsim_nsim_hs_smp.yaml @@ -1,8 +1,9 @@ identifier: nsim/nsim_hs/smp name: Multi-core HS nSIM simulator type: sim -simulation: mdb-nsim -simulation_exec: mdb +simulation: + - name: mdb-nsim + exec: mdb arch: arc toolchain: - zephyr diff --git a/boards/snps/nsim/arc_classic/nsim_nsim_hs_sram.yaml b/boards/snps/nsim/arc_classic/nsim_nsim_hs_sram.yaml index f2d8a0e8bd92551..10e7d6929a674fc 100644 --- a/boards/snps/nsim/arc_classic/nsim_nsim_hs_sram.yaml +++ b/boards/snps/nsim/arc_classic/nsim_nsim_hs_sram.yaml @@ -1,8 +1,9 @@ identifier: nsim/nsim_hs/sram name: HS nSIM simulator (SRAM) type: sim -simulation: nsim -simulation_exec: nsimdrv +simulation: + - name: nsim + exec: nsimdrv arch: arc toolchain: - zephyr diff --git a/boards/snps/nsim/arc_classic/nsim_nsim_sem.yaml b/boards/snps/nsim/arc_classic/nsim_nsim_sem.yaml index fadc0783f72eace..53631e7d5fbd224 100644 --- a/boards/snps/nsim/arc_classic/nsim_nsim_sem.yaml +++ b/boards/snps/nsim/arc_classic/nsim_nsim_sem.yaml @@ -2,8 +2,9 @@ identifier: nsim/nsim_sem name: SEM Nsim simulator type: sim arch: arc -simulation: nsim -simulation_exec: nsimdrv +simulation: + - name: nsim + exec: nsimdrv toolchain: - zephyr - cross-compile diff --git a/boards/snps/nsim/arc_classic/nsim_nsim_sem_mpu_stack_guard.yaml b/boards/snps/nsim/arc_classic/nsim_nsim_sem_mpu_stack_guard.yaml index 986345ab8e0dc80..7eb893a505e0b7e 100644 --- a/boards/snps/nsim/arc_classic/nsim_nsim_sem_mpu_stack_guard.yaml +++ b/boards/snps/nsim/arc_classic/nsim_nsim_sem_mpu_stack_guard.yaml @@ -2,8 +2,9 @@ identifier: nsim/nsim_sem/mpu_stack_guard name: SEM nSIM simulator (stack guard) type: sim arch: arc -simulation: nsim -simulation_exec: nsimdrv +simulation: + - name: nsim + exec: nsimdrv toolchain: - zephyr - cross-compile diff --git a/boards/snps/nsim/arc_classic/nsim_nsim_vpx5.yaml b/boards/snps/nsim/arc_classic/nsim_nsim_vpx5.yaml index b1169acd1117735..894288daa347574 100644 --- a/boards/snps/nsim/arc_classic/nsim_nsim_vpx5.yaml +++ b/boards/snps/nsim/arc_classic/nsim_nsim_vpx5.yaml @@ -1,8 +1,9 @@ identifier: nsim/nsim_vpx5 name: VPX5 nSIM simulator type: sim -simulation: nsim -simulation_exec: nsimdrv +simulation: + - name: nsim + exec: nsimdrv arch: arc toolchain: - arcmwdt diff --git a/boards/snps/nsim/arc_v/nsim_arc_v_rmx100.yaml b/boards/snps/nsim/arc_v/nsim_arc_v_rmx100.yaml index 3639ab453f8803e..6070498da81cafa 100644 --- a/boards/snps/nsim/arc_v/nsim_arc_v_rmx100.yaml +++ b/boards/snps/nsim/arc_v/nsim_arc_v_rmx100.yaml @@ -1,7 +1,8 @@ identifier: nsim_arc_v/rmx100 name: Synopsys rmx100 -simulation: nsim -simulation_exec: nsimdrv +simulation: + - name: nsim + exec: nsimdrv type: sim arch: riscv toolchain: diff --git a/boards/st/b_l4s5i_iot01a/b_l4s5i_iot01a.dts b/boards/st/b_l4s5i_iot01a/b_l4s5i_iot01a.dts index d41c75c44bf0d11..d7f5adab5bebcde 100644 --- a/boards/st/b_l4s5i_iot01a/b_l4s5i_iot01a.dts +++ b/boards/st/b_l4s5i_iot01a/b_l4s5i_iot01a.dts @@ -181,31 +181,23 @@ boot_partition: partition@0 { label = "mcuboot"; - reg = <0x00000000 DT_SIZE_K(64)>; + reg = <0x0 DT_SIZE_K(64)>; read-only; }; - /* - * The flash starting at offset 0x10000 and ending at - * offset 0x1ffff is reserved for use by the application. - */ - - slot0_partition: partition@20000 { + slot0_partition: partition@10000 { label = "image-0"; - reg = <0x00020000 DT_SIZE_K(432)>; + reg = <0x10000 DT_SIZE_K(976)>; }; - slot1_partition: partition@8c000 { + + slot1_partition: partition@104000 { label = "image-1"; - reg = <0x0008C000 DT_SIZE_K(432)>; - }; - scratch_partition: partition@f8000 { - label = "image-scratch"; - reg = <0x000F8000 DT_SIZE_K(16)>; + reg = <0x104000 DT_SIZE_K(976)>; }; - storage_partition: partition@fc000 { + storage_partition: partition@1f8000 { label = "storage"; - reg = <0x000fc000 DT_SIZE_K(16)>; + reg = <0x1f8000 DT_SIZE_K(32)>; }; }; }; diff --git a/boards/st/b_l4s5i_iot01a/b_l4s5i_iot01a.yaml b/boards/st/b_l4s5i_iot01a/b_l4s5i_iot01a.yaml index 63b445b80381260..d0928a8aa1dc2e4 100644 --- a/boards/st/b_l4s5i_iot01a/b_l4s5i_iot01a.yaml +++ b/boards/st/b_l4s5i_iot01a/b_l4s5i_iot01a.yaml @@ -6,7 +6,7 @@ toolchain: - zephyr - gnuarmemb - xtools -ram: 640 +ram: 192 flash: 2048 supported: - arduino_gpio diff --git a/boards/st/disco_l475_iot1/disco_l475_iot1.dts b/boards/st/disco_l475_iot1/disco_l475_iot1.dts index fbea236337d4e04..33e6d973cf89ce7 100644 --- a/boards/st/disco_l475_iot1/disco_l475_iot1.dts +++ b/boards/st/disco_l475_iot1/disco_l475_iot1.dts @@ -224,23 +224,18 @@ boot_partition: partition@0 { label = "mcuboot"; - reg = <0x00000000 DT_SIZE_K(64)>; + reg = <0x0 DT_SIZE_K(64)>; read-only; }; - /* - * The flash starting at offset 0x10000 and ending at - * offset 0x1ffff is reserved for use by the application. - */ - - slot0_partition: partition@20000 { + slot0_partition: partition@1000 { label = "image-0"; - reg = <0x00020000 DT_SIZE_K(864)>; + reg = <0x1000 DT_SIZE_K(928)>; }; - scratch_partition: partition@f8000 { - label = "image-scratch"; - reg = <0x000F8000 DT_SIZE_K(16)>; + storage_partition: partition@f8000 { + label = "storage"; + reg = <0xf8000 DT_SIZE_K(32)>; }; }; }; @@ -343,8 +338,8 @@ zephyr_udc0: &usbotg_fs { reg = <0x00000000 DT_SIZE_K(864)>; }; - storage_partition: partition@d8000 { - label = "storage"; + slot2_partition: partition@d8000 { + label = "image-3"; reg = <0x000d8000 DT_SIZE_M(7)>; }; }; diff --git a/boards/st/nucleo_f207zg/nucleo_f207zg.dts b/boards/st/nucleo_f207zg/nucleo_f207zg.dts index 0c8d36af39bd957..4f3e8cafde3aa31 100644 --- a/boards/st/nucleo_f207zg/nucleo_f207zg.dts +++ b/boards/st/nucleo_f207zg/nucleo_f207zg.dts @@ -197,12 +197,32 @@ zephyr_udc0: &usbotg_fs { #address-cells = <1>; #size-cells = <1>; - /* Last sector of size 128KB at the end of 1MB flash is set - * for storage. + boot_partition: partition@0 { + label = "mcuboot"; + reg = <0x0 DT_SIZE_K(32)>; + read-only; + }; + + /* + * nvs subsystem requires 2 sectors with a max total of 32K + * On F2 series, the only option is to use the following + * partition, which is compatible with mcuboot usage. + * Keep it commented in order it is not used by CI. + * + * storage_partition: partition@8000 { + * label = "storage"; + * reg = <0x8000 DT_SIZE_K(32)>; + * }; */ - storage_partition: partition@e0000 { - label = "storage"; - reg = <0x000e0000 DT_SIZE_K(128)>; + + slot0_partition: partition@20000 { + label = "image-0"; + reg = <0x20000 DT_SIZE_K(448)>; + }; + + slot1_partition: partition@90000 { + label = "image-1"; + reg = <0x90000 DT_SIZE_K(448)>; }; }; }; diff --git a/boards/st/nucleo_f429zi/nucleo_f429zi.dts b/boards/st/nucleo_f429zi/nucleo_f429zi.dts index 2e37e448655ac01..29a36b1155573a2 100644 --- a/boards/st/nucleo_f429zi/nucleo_f429zi.dts +++ b/boards/st/nucleo_f429zi/nucleo_f429zi.dts @@ -194,18 +194,24 @@ zephyr_udc0: &usbotg_fs { #address-cells = <1>; #size-cells = <1>; - /* 64KB for bootloader */ + /* 32KB for bootloader */ boot_partition: partition@0 { label = "mcuboot"; - reg = <0x00000000 DT_SIZE_K(64)>; + reg = <0x00000000 DT_SIZE_K(32)>; read-only; }; - /* storage: 64KB for settings */ - storage_partition: partition@10000 { - label = "storage"; - reg = <0x00010000 DT_SIZE_K(64)>; - }; + /* + * nvs subsystem requires 2 sectors with a max total of 32K + * On F4 series, the only option is to use the following + * partition, which is compatible with mcuboot usage. + * Keep it commented in order it is not used by CI. + * + * storage_partition: partition@8000 { + * label = "storage"; + * reg = <0x0008000 DT_SIZE_K(32)>; + * }; + */ /* application image slot: 256KB */ slot0_partition: partition@20000 { diff --git a/boards/st/nucleo_f429zi/nucleo_f429zi.yaml b/boards/st/nucleo_f429zi/nucleo_f429zi.yaml index 8674acc45c8319d..bec17951950bc9a 100644 --- a/boards/st/nucleo_f429zi/nucleo_f429zi.yaml +++ b/boards/st/nucleo_f429zi/nucleo_f429zi.yaml @@ -23,7 +23,6 @@ supported: - adc - dac - dma - - nvs - rtc - usbd vendor: st diff --git a/boards/st/nucleo_g070rb/nucleo_g070rb.dts b/boards/st/nucleo_g070rb/nucleo_g070rb.dts index 7e976c930594bc7..d0491570d1deeab 100644 --- a/boards/st/nucleo_g070rb/nucleo_g070rb.dts +++ b/boards/st/nucleo_g070rb/nucleo_g070rb.dts @@ -155,10 +155,10 @@ #address-cells = <1>; #size-cells = <1>; - /* Set 2KB of storage at the end of 128KB flash */ - storage_partition: partition@1f800 { + /* Set 4KB of storage at the end of 128KB flash */ + storage_partition: partition@1f000 { label = "storage"; - reg = <0x0001f800 DT_SIZE_K(2)>; + reg = <0x0001f000 DT_SIZE_K(4)>; }; }; }; diff --git a/boards/st/nucleo_g071rb/nucleo_g071rb.dts b/boards/st/nucleo_g071rb/nucleo_g071rb.dts index 6bfd17bd893989e..553feebd2e95965 100644 --- a/boards/st/nucleo_g071rb/nucleo_g071rb.dts +++ b/boards/st/nucleo_g071rb/nucleo_g071rb.dts @@ -169,10 +169,10 @@ #address-cells = <1>; #size-cells = <1>; - /* Set 2KB of storage at the end of 128KB flash */ - storage_partition: partition@1f800 { + /* Set 4KB of storage at the end of 128KB flash */ + storage_partition: partition@1f000 { label = "storage"; - reg = <0x0001f800 DT_SIZE_K(2)>; + reg = <0x0001f000 DT_SIZE_K(4)>; }; }; }; diff --git a/boards/st/nucleo_l152re/nucleo_l152re.dts b/boards/st/nucleo_l152re/nucleo_l152re.dts index fc308f5988fe38b..afcccc8dd01dbca 100644 --- a/boards/st/nucleo_l152re/nucleo_l152re.dts +++ b/boards/st/nucleo_l152re/nucleo_l152re.dts @@ -145,10 +145,10 @@ #address-cells = <1>; #size-cells = <1>; - /* Set 2KB of storage at the end of 512KB flash */ - storage_partition: partition@7f800 { + /* Set 8KB of storage at the end of 512KB flash */ + storage_partition: partition@7e000 { label = "storage"; - reg = <0x0007f800 DT_SIZE_K(2)>; + reg = <0x0007e000 DT_SIZE_K(8)>; }; }; }; diff --git a/boards/st/nucleo_l496zg/nucleo_l496zg.yaml b/boards/st/nucleo_l496zg/nucleo_l496zg.yaml index 0623f3c90017992..b9fba4e7853bf19 100644 --- a/boards/st/nucleo_l496zg/nucleo_l496zg.yaml +++ b/boards/st/nucleo_l496zg/nucleo_l496zg.yaml @@ -5,7 +5,7 @@ arch: arm toolchain: - zephyr - gnuarmemb -ram: 320 +ram: 256 flash: 1024 supported: - arduino_i2c diff --git a/boards/st/nucleo_l4a6zg/nucleo_l4a6zg.yaml b/boards/st/nucleo_l4a6zg/nucleo_l4a6zg.yaml index bdc87910a4fb470..09493d2b217ff2c 100644 --- a/boards/st/nucleo_l4a6zg/nucleo_l4a6zg.yaml +++ b/boards/st/nucleo_l4a6zg/nucleo_l4a6zg.yaml @@ -5,7 +5,7 @@ arch: arm toolchain: - zephyr - gnuarmemb -ram: 320 +ram: 256 flash: 1024 supported: - arduino_i2c diff --git a/boards/st/nucleo_l4r5zi/nucleo_l4r5zi.yaml b/boards/st/nucleo_l4r5zi/nucleo_l4r5zi.yaml index 5be0e1f69bed584..5bfd9f26be616b8 100644 --- a/boards/st/nucleo_l4r5zi/nucleo_l4r5zi.yaml +++ b/boards/st/nucleo_l4r5zi/nucleo_l4r5zi.yaml @@ -19,6 +19,6 @@ supported: - counter - adc - rtc -ram: 640 +ram: 192 flash: 2048 vendor: st diff --git a/boards/st/nucleo_wb05kz/nucleo_wb05kz.dts b/boards/st/nucleo_wb05kz/nucleo_wb05kz.dts index e846abf8ddaf0d9..88f37c00186e45e 100644 --- a/boards/st/nucleo_wb05kz/nucleo_wb05kz.dts +++ b/boards/st/nucleo_wb05kz/nucleo_wb05kz.dts @@ -23,6 +23,7 @@ zephyr,shell-uart = &usart1; zephyr,sram = &sram0; zephyr,flash = &flash0; + zephyr,bt-c2h-uart = &usart1; }; leds: leds { @@ -95,6 +96,10 @@ slow-clock = <&clk_lse>; }; +&bt_hci_wb0 { + status = "okay"; +}; + &usart1 { pinctrl-0 = <&usart1_tx_pa1 &usart1_rx_pb0>; pinctrl-names = "default"; @@ -116,3 +121,16 @@ clocks = <&rcc STM32_CLOCK_BUS_APB1 (1 << 14)>, <&rcc STM32_SRC_SYSCLK SPI3_I2S3_SEL(3)>; }; + +&flash0 { + partitions { + compatible = "fixed-partitions"; + #address-cells = <1>; + #size-cells = <1>; + /* Set 8KB of storage at the end of 192KB flash */ + storage_partition: partition@2e000 { + label = "storage"; + reg = <0x0002e000 DT_SIZE_K(8)>; + }; + }; +}; diff --git a/boards/st/nucleo_wb05kz/nucleo_wb05kz.yaml b/boards/st/nucleo_wb05kz/nucleo_wb05kz.yaml index bf602772d9daa95..cf931e9bd375676 100644 --- a/boards/st/nucleo_wb05kz/nucleo_wb05kz.yaml +++ b/boards/st/nucleo_wb05kz/nucleo_wb05kz.yaml @@ -16,4 +16,5 @@ supported: - gpio - i2c - spi + - bluetooth vendor: st diff --git a/boards/st/nucleo_wb09ke/nucleo_wb09ke.dts b/boards/st/nucleo_wb09ke/nucleo_wb09ke.dts index 1052c04dd94e0a3..1b8826ed8844227 100644 --- a/boards/st/nucleo_wb09ke/nucleo_wb09ke.dts +++ b/boards/st/nucleo_wb09ke/nucleo_wb09ke.dts @@ -23,6 +23,7 @@ zephyr,shell-uart = &usart1; zephyr,sram = &sram0; zephyr,flash = &flash0; + zephyr,bt-c2h-uart = &usart1; }; leds: leds { @@ -95,6 +96,10 @@ slow-clock = <&clk_lse>; }; +&bt_hci_wb0 { + status = "okay"; +}; + &usart1 { pinctrl-0 = <&usart1_tx_pa1 &usart1_rx_pb0>; pinctrl-names = "default"; @@ -116,3 +121,16 @@ clocks = <&rcc STM32_CLOCK_BUS_APB1 (1 << 14)>, <&rcc STM32_SRC_SYSCLK SPI3_I2S3_SEL(3)>; }; + +&flash0 { + partitions { + compatible = "fixed-partitions"; + #address-cells = <1>; + #size-cells = <1>; + /* Set 32KB of storage at the end of 512KB flash */ + storage_partition: partition@78000 { + label = "storage"; + reg = <0x00078000 DT_SIZE_K(32)>; + }; + }; +}; diff --git a/boards/st/nucleo_wb09ke/nucleo_wb09ke.yaml b/boards/st/nucleo_wb09ke/nucleo_wb09ke.yaml index a853e0e1d7fcab4..20c4a33cfec0b72 100644 --- a/boards/st/nucleo_wb09ke/nucleo_wb09ke.yaml +++ b/boards/st/nucleo_wb09ke/nucleo_wb09ke.yaml @@ -16,4 +16,5 @@ supported: - gpio - i2c - spi + - bluetooth vendor: st diff --git a/boards/st/stm32l496g_disco/stm32l496g_disco.yaml b/boards/st/stm32l496g_disco/stm32l496g_disco.yaml index 15301e002c7177a..e6b153cb0e49233 100644 --- a/boards/st/stm32l496g_disco/stm32l496g_disco.yaml +++ b/boards/st/stm32l496g_disco/stm32l496g_disco.yaml @@ -6,7 +6,7 @@ toolchain: - zephyr - gnuarmemb - xtools -ram: 320 +ram: 256 flash: 1024 supported: - arduino_i2c diff --git a/boards/st/stm32l4r9i_disco/stm32l4r9i_disco.yaml b/boards/st/stm32l4r9i_disco/stm32l4r9i_disco.yaml index 398518e7161d8f2..3b4ef674d84130d 100644 --- a/boards/st/stm32l4r9i_disco/stm32l4r9i_disco.yaml +++ b/boards/st/stm32l4r9i_disco/stm32l4r9i_disco.yaml @@ -6,7 +6,7 @@ toolchain: - zephyr - gnuarmemb - xtools -ram: 640 +ram: 192 flash: 2048 vendor: st supported: diff --git a/boards/st/stm32l562e_dk/stm32l562e_dk_common.dtsi b/boards/st/stm32l562e_dk/stm32l562e_dk_common.dtsi index f80159110e331f8..cf09783fc2322b9 100644 --- a/boards/st/stm32l562e_dk/stm32l562e_dk_common.dtsi +++ b/boards/st/stm32l562e_dk/stm32l562e_dk_common.dtsi @@ -87,7 +87,7 @@ st7789v: lcd-panel@0 { compatible = "sitronix,st7789v"; reg = <0>; - mipi-mode = ; + mipi-mode = "MIPI_DBI_MODE_8080_BUS_16_BIT"; /* A write cycle should be 68ns */ mipi-max-frequency = <14705882>; width = <240>; diff --git a/boards/vcc-gnd/yd_esp32/yd_esp32_appcpu.dts b/boards/vcc-gnd/yd_esp32/yd_esp32_appcpu.dts index 8501714220d4844..15f7a6a25d84f6d 100644 --- a/boards/vcc-gnd/yd_esp32/yd_esp32_appcpu.dts +++ b/boards/vcc-gnd/yd_esp32/yd_esp32_appcpu.dts @@ -6,6 +6,7 @@ /dts-v1/; #include +#include / { model = "VCC-GND Studio YD-ESP32 APPCPU"; @@ -25,42 +26,3 @@ &trng0 { status = "okay"; }; - -&flash0 { - status = "okay"; - partitions { - compatible = "fixed-partitions"; - #address-cells = <1>; - #size-cells = <1>; - - /* Reserve 60kB for the bootloader */ - boot_partition: partition@1000 { - label = "mcuboot"; - reg = <0x00001000 0x0000F000>; - read-only; - }; - - /* Reserve 1024kB for the application in slot 0 */ - slot0_partition: partition@10000 { - label = "image-0"; - reg = <0x00010000 0x00100000>; - }; - - /* Reserve 1024kB for the application in slot 1 */ - slot1_partition: partition@110000 { - label = "image-1"; - reg = <0x00110000 0x00100000>; - }; - - /* Reserve 256kB for the scratch partition */ - scratch_partition: partition@210000 { - label = "image-scratch"; - reg = <0x00210000 0x00040000>; - }; - - storage_partition: partition@250000 { - label = "storage"; - reg = <0x00250000 0x00006000>; - }; - }; -}; diff --git a/boards/vcc-gnd/yd_esp32/yd_esp32_procpu.dts b/boards/vcc-gnd/yd_esp32/yd_esp32_procpu.dts index a409ed6e90962fe..489580a3e25ea1a 100644 --- a/boards/vcc-gnd/yd_esp32/yd_esp32_procpu.dts +++ b/boards/vcc-gnd/yd_esp32/yd_esp32_procpu.dts @@ -7,6 +7,7 @@ #include #include "yd_esp32-pinctrl.dtsi" #include +#include / { model = "VCC-GND Studio YD-ESP32 PROCPU"; @@ -136,45 +137,6 @@ status = "okay"; }; -&flash0 { - status = "okay"; - partitions { - compatible = "fixed-partitions"; - #address-cells = <1>; - #size-cells = <1>; - - /* Reserve 60kB for the bootloader */ - boot_partition: partition@1000 { - label = "mcuboot"; - reg = <0x00001000 0x0000F000>; - read-only; - }; - - /* Reserve 1024kB for the application in slot 0 */ - slot0_partition: partition@10000 { - label = "image-0"; - reg = <0x00010000 0x00100000>; - }; - - /* Reserve 1024kB for the application in slot 1 */ - slot1_partition: partition@110000 { - label = "image-1"; - reg = <0x00110000 0x00100000>; - }; - - /* Reserve 256kB for the scratch partition */ - scratch_partition: partition@210000 { - label = "image-scratch"; - reg = <0x00210000 0x00040000>; - }; - - storage_partition: partition@250000 { - label = "storage"; - reg = <0x00250000 0x00006000>; - }; - }; -}; - &esp32_bt_hci { status = "okay"; }; diff --git a/boards/waveshare/esp32s3_touch_lcd_1_28/Kconfig.defconfig b/boards/waveshare/esp32s3_touch_lcd_1_28/Kconfig.defconfig index 75adffcd0b81b63..f7e7a7467989786 100644 --- a/boards/waveshare/esp32s3_touch_lcd_1_28/Kconfig.defconfig +++ b/boards/waveshare/esp32s3_touch_lcd_1_28/Kconfig.defconfig @@ -3,9 +3,6 @@ if BOARD_ESP32S3_TOUCH_LCD_1_28_ESP32S3_PROCPU -config ENTROPY_GENERATOR - default y - config KERNEL_MEM_POOL default y diff --git a/boards/waveshare/esp32s3_touch_lcd_1_28/esp32s3_touch_lcd_1_28_esp32s3_appcpu.dts b/boards/waveshare/esp32s3_touch_lcd_1_28/esp32s3_touch_lcd_1_28_esp32s3_appcpu.dts index 13562961dc84563..949f7a79a324416 100644 --- a/boards/waveshare/esp32s3_touch_lcd_1_28/esp32s3_touch_lcd_1_28_esp32s3_appcpu.dts +++ b/boards/waveshare/esp32s3_touch_lcd_1_28/esp32s3_touch_lcd_1_28_esp32s3_appcpu.dts @@ -4,7 +4,7 @@ */ /dts-v1/; -#include +#include #include / { @@ -20,6 +20,10 @@ }; }; +&flash0 { + reg = <0x0 DT_SIZE_M(16)>; +}; + &trng0 { status = "okay"; }; diff --git a/boards/waveshare/esp32s3_touch_lcd_1_28/esp32s3_touch_lcd_1_28_esp32s3_procpu.dts b/boards/waveshare/esp32s3_touch_lcd_1_28/esp32s3_touch_lcd_1_28_esp32s3_procpu.dts index ced705bb5f89ee4..18e8e900813acb9 100644 --- a/boards/waveshare/esp32s3_touch_lcd_1_28/esp32s3_touch_lcd_1_28_esp32s3_procpu.dts +++ b/boards/waveshare/esp32s3_touch_lcd_1_28/esp32s3_touch_lcd_1_28_esp32s3_procpu.dts @@ -9,6 +9,7 @@ #include #include #include +#include / { model = "ESP32-S3-Touch-LCD-1.28 PROCPU"; @@ -82,40 +83,7 @@ }; &flash0 { - status = "okay"; reg = <0x0 DT_SIZE_M(16)>; - - partitions { - compatible = "fixed-partitions"; - #address-cells = <1>; - #size-cells = <1>; - - boot_partition: partition@0 { - label = "mcuboot"; - reg = <0x00000000 0x0000F000>; - read-only; - }; - - slot0_partition: partition@10000 { - label = "image-0"; - reg = <0x00010000 0x00100000>; - }; - - slot1_partition: partition@110000 { - label = "image-1"; - reg = <0x00110000 0x00100000>; - }; - - scratch_partition: partition@210000 { - label = "image-scratch"; - reg = <0x00210000 0x00040000>; - }; - - storage_partition: partition@250000 { - label = "storage"; - reg = <0x00250000 0x00006000>; - }; - }; }; &gpio0 { diff --git a/boards/we/orthosie1ev/we_orthosie1ev.dts b/boards/we/orthosie1ev/we_orthosie1ev.dts index 4958bf4221c5a84..a0c27fc81bbf2c9 100644 --- a/boards/we/orthosie1ev/we_orthosie1ev.dts +++ b/boards/we/orthosie1ev/we_orthosie1ev.dts @@ -40,6 +40,10 @@ }; }; +&flash0 { + reg = <0x0 DT_SIZE_M(4)>; +}; + &uart0 { status = "okay"; current-speed = <115200>; diff --git a/boards/weact/mini_stm32h743/mini_stm32h743.dts b/boards/weact/mini_stm32h743/mini_stm32h743.dts index 00722f32ead304d..5a63ca0f5bede66 100644 --- a/boards/weact/mini_stm32h743/mini_stm32h743.dts +++ b/boards/weact/mini_stm32h743/mini_stm32h743.dts @@ -49,7 +49,7 @@ st7735r_160x80: st7735r@0 { compatible = "sitronix,st7735r"; mipi-max-frequency = <20000000>; - mipi-mode = ; + mipi-mode = "MIPI_DBI_MODE_SPI_4WIRE"; reg = <0>; width = <160>; height = <80>; diff --git a/boards/wemos/esp32s2_lolin_mini/Kconfig.defconfig b/boards/wemos/esp32s2_lolin_mini/Kconfig.defconfig deleted file mode 100644 index cb9fdebc22c3e94..000000000000000 --- a/boards/wemos/esp32s2_lolin_mini/Kconfig.defconfig +++ /dev/null @@ -1,7 +0,0 @@ -# ESP32S2 LOLIN S2 MINI board configuration - -# Copyright (c) 2023 Google, LLC -# SPDX-License-Identifier: Apache-2.0 - -config ENTROPY_GENERATOR - default y diff --git a/boards/wemos/esp32s2_lolin_mini/esp32s2_lolin_mini.dts b/boards/wemos/esp32s2_lolin_mini/esp32s2_lolin_mini.dts index 14d6fd4b1d807d3..66761886e55de5a 100644 --- a/boards/wemos/esp32s2_lolin_mini/esp32s2_lolin_mini.dts +++ b/boards/wemos/esp32s2_lolin_mini/esp32s2_lolin_mini.dts @@ -9,6 +9,7 @@ #include #include #include "esp32s2_lolin_mini-pinctrl.dtsi" +#include / { model = "Wemos ESP32S2-Lolin Mini"; @@ -46,6 +47,10 @@ }; }; +&flash0 { + reg = <0x0 DT_SIZE_M(4)>; +}; + &uart0 { status = "okay"; current-speed = <115200>; @@ -81,47 +86,6 @@ status = "okay"; }; -&flash0 { - reg = <0x0 DT_SIZE_M(4)>; - - status = "okay"; - partitions { - compatible = "fixed-partitions"; - #address-cells = <1>; - #size-cells = <1>; - - /* Reserve 60kB for the bootloader */ - boot_partition: partition@1000 { - label = "mcuboot"; - reg = <0x00001000 0x0000F000>; - read-only; - }; - - /* Reserve 1024kB for the application in slot 0 */ - slot0_partition: partition@10000 { - label = "image-0"; - reg = <0x00010000 0x00100000>; - }; - - /* Reserve 1024kB for the application in slot 1 */ - slot1_partition: partition@110000 { - label = "image-1"; - reg = <0x00110000 0x00100000>; - }; - - /* Reserve 256kB for the scratch partition */ - scratch_partition: partition@210000 { - label = "image-scratch"; - reg = <0x00210000 0x00040000>; - }; - - storage_partition: partition@250000 { - label = "storage"; - reg = <0x00250000 0x00006000>; - }; - }; -}; - &wdt0 { status = "okay"; }; diff --git a/doc/connectivity/bluetooth/api/hci_drivers.rst b/doc/connectivity/bluetooth/api/hci_drivers.rst index 9b01981d67a0d7a..fd70691f2a89bde 100644 --- a/doc/connectivity/bluetooth/api/hci_drivers.rst +++ b/doc/connectivity/bluetooth/api/hci_drivers.rst @@ -8,4 +8,4 @@ HCI Drivers API Reference ************* -.. doxygengroup:: bt_hci_driver +.. doxygengroup:: bt_hci_api diff --git a/doc/connectivity/bluetooth/bluetooth-le-host.rst b/doc/connectivity/bluetooth/bluetooth-le-host.rst index 567961bc6495df9..26665ada3c3128a 100644 --- a/doc/connectivity/bluetooth/bluetooth-le-host.rst +++ b/doc/connectivity/bluetooth/bluetooth-le-host.rst @@ -73,9 +73,7 @@ To initially discover a device to connect to the application will likely use the :c:func:`bt_le_scan_start` API, wait for an appropriate device to be found (using the scan callback), stop scanning using :c:func:`bt_le_scan_stop` and then connect to the device using -:c:func:`bt_conn_le_create`. If the central wants to keep -automatically reconnecting to the peripheral it should use the -:c:func:`bt_le_set_auto_conn` API. +:c:func:`bt_conn_le_create`. There are some sample applications for the central role available in the tree, such as :zephyr_file:`samples/bluetooth/central_hr`. diff --git a/doc/develop/getting_started/index.rst b/doc/develop/getting_started/index.rst index 06729428eaf0205..b82206b8edf6d7c 100644 --- a/doc/develop/getting_started/index.rst +++ b/doc/develop/getting_started/index.rst @@ -265,12 +265,12 @@ additional Python dependencies in a `Python virtual environment`_. west zephyr-export - #. Zephyr's ``scripts/requirements.txt`` file declares additional Python - dependencies. Install them with ``pip``. + #. The Zephyr west extension command, ``west packages`` can be used to install Python + dependencies. .. code-block:: bash - pip install -r ~/zephyrproject/zephyr/scripts/requirements.txt + west packages pip --install .. group-tab:: macOS @@ -317,12 +317,12 @@ additional Python dependencies in a `Python virtual environment`_. west zephyr-export - #. Zephyr's ``scripts/requirements.txt`` file declares additional Python - dependencies. Install them with ``pip``. + #. The Zephyr west extension command, ``west packages`` can be used to install Python + dependencies. .. code-block:: bash - pip install -r ~/zephyrproject/zephyr/scripts/requirements.txt + west packages pip --install .. group-tab:: Windows @@ -372,12 +372,12 @@ additional Python dependencies in a `Python virtual environment`_. west zephyr-export - #. Zephyr's ``scripts\requirements.txt`` file declares additional Python - dependencies. Install them with ``pip``. + #. The Zephyr west extension command, ``west packages`` can be used to install Python + dependencies. .. code-block:: bat - pip install -r %HOMEPATH%\zephyrproject\zephyr\scripts\requirements.txt + west packages pip --install Install the Zephyr SDK ********************** diff --git a/doc/develop/modules.rst b/doc/develop/modules.rst index 35fb8acaf2fbeb9..ff8f3781d45fb94 100644 --- a/doc/develop/modules.rst +++ b/doc/develop/modules.rst @@ -1021,6 +1021,35 @@ maps, each of which has the following entries: - ``doc-url``: A URL pointing to the location of the official documentation for this blob +Package manager dependencies +============================ + +Zephyr modules can describe dependencies available from package managers, +currently only ``pip`` is supported. + +A west extension command ``west packages `` is available to list +dependencies for Zephyr and present modules that leverage this feature in their +``module.yml`` file. +Run ``west help packages`` for more details. + +Python pip +---------- + +Calling ``west packages pip`` lists `requirement files`_ for Zephyr and modules. +Passing ``--install`` installs these if there's an active virtual environment. + +The following example demonstrates a ``zephyr/module.yml`` file with some +requirement files in the ``scripts`` directory of the module. + + +.. code-block:: yaml + + package-managers: + pip: + requirement-files: + - scripts/requirements-build.txt + - scripts/requirements-doc.txt + Module Inclusion ================ @@ -1200,3 +1229,4 @@ revision needs to be changed to the commit hash from the module repository. .. _CMake list: https://cmake.org/cmake/help/latest/manual/cmake-language.7.html#lists .. _add_subdirectory(): https://cmake.org/cmake/help/latest/command/add_subdirectory.html .. _GitHub issues: https://github.com/zephyrproject-rtos/zephyr/issues +.. _requirement files: https://pip.pypa.io/en/stable/reference/requirements-file-format/ diff --git a/doc/develop/test/figures/twister_test_project.svg b/doc/develop/test/figures/twister_test_project.svg index f21a45c2971ae19..75440d6bda601f9 100644 --- a/doc/develop/test/figures/twister_test_project.svg +++ b/doc/develop/test/figures/twister_test_project.svg @@ -1,4 +1,4 @@ -
Test Framework (ZTEST)
Test Framework (ZTEST)
Test Suite (ZTEST_SUITE)
Test Suite (ZTEST_SUITE)
+ suite_name = "foo_bar_feature_aspect"
+ suite_name = "foo_bar_feature_aspect"
Test (ZTEST*)
Test (ZTEST*)
+ test_name = "test_buzz_and_blink"
+ test_name = "test_buzz_and_blink"
Test Scenario
(name_section.name_subsection)
Test Scenario...

+ tags:
+ levels: 
+ filter:
+ required_*:
+ arch_*:
+ platform_*: 
+ extra_*:
+ harness:
+ harness_config:

+ tags:...
Test Scenario
(name_section.name_subsection)
Test Scenario...

+ tags:
+ levels: 
+ filter:
+ required_*:
+ arch_*:
+ platform_*: 
+ extra_*:
+ harness:
+ harness_config:

+ tags:...
tests:
tests:
Test Scenario
(name_section.name_subsection)
Test Scenario...

+ tags:
+ levels: 
+ filter:
+ required_*:
+ arch_*:
+ platform_*: 
+ extra_*:

+ harness:
+ harness_config:

+ tags:...
CMakeList.txt
CMakeList.txt
+ project(foo-bar-feature)

+ project(foo-bar-feature)
./src (Test Project Implementation)
./src (Test Project Implementation)
prj.conf
prj.conf
+ Kconfig:
+ Kconfig:
Test Application binary
Test Application binary
Twister
Twister
Test Instance
Test Instance
+ outdir
+ outdir
+ testsuite:
+ testsuite:
+ platform:
+ platform:
+ testcases: []
+ testcases: []
+ status:
+ status:
+ reason:
+ reason:
+ execution_time:
+ execution_time:
+ retries:
+ retries:
Test Suite (test specification)
Test Suite (test specification)
+ yamlfile
+ yamlfile
+ id
+ id
+ testcases: []
+ testcases: []
+ ztest_suite_names: []
+ ztest_suite_names: []
+ name
+ name
Test Case
Test Case
+ testsuite:
+ testsuite:
+ status:
+ status:
+ reason:
+ reason:
+ output:
+ output:
+ duration:
+ duration:
+ name:
+ name:
Legend:
Legend:
Test Instance (Test Application) 
Test Instance (Test Application) 
Execution time-specific Test properties
Execution time-specific Test properties
Elementary Test
Elementary Test
tests/foo/bar/feature/name_section.name_subsection
tests/foo/bar/feature/name_section.name_subsection
name_section.name_subsection.buzz_and_blink
name_section.name_subsection.buzz_and_blink
Zephyr Test Application Project (tests/foo/bar/feature)
Zephyr Test Application Project (tests/foo/bar/feature)
Test Configuration (testcase.yaml)
Test Configuration (testcase.yaml)
build & run
build & run
Twister parameters:

--arch
--platform
--level

... etc. 
Twister parameters...
select
select
ELF symbols and application log parsing
ELF symbols and application log parsingText is not SVG - cannot display \ No newline at end of file +
Zephyr Test Framework (Ztest)
Zephyr Test Framework (Ztest)
Ztest Test Suite (ZTEST_SUITE)
Ztest Test Suite (ZTEST_SUITE)
+ suite_name = "foo_bar_aspect"
+ suite_name = "foo_bar_aspect"
Ztest Test (ZTEST*)
Ztest Test (ZTEST*)
+ test_name = "test_buzz_and_blink"
+ test_name = "test_buzz_and_blink"
Test Scenario
(name_section.name_subsection)
Test Scenario...

+ tags:
+ levels: 
+ filter:
+ required_*:
+ arch_*:
+ platform_*: 
+ extra_*:
+ harness:
+ harness_config:

+ tags:...
Test Scenario
(name_section.name_subsection)
Test Scenario...

+ tags:
+ levels: 
+ filter:
+ required_*:
+ arch_*:
+ platform_*: 
+ extra_*:
+ harness:
+ harness_config:

+ tags:...
tests:
tests:
Test Scenario
(section_name.subsection_name)
Test Scenario...

+ tags:
+ levels: 
+ filter:
+ required_*:
+ arch_*:
+ platform_*: 
+ extra_*:

+ harness:
+ harness_config:

+ tags:...
CMakeList.txt
CMakeList.txt
+ project(foo-bar-feature)

+ project(foo-bar-feature)
./src (Test Project Implementation)
./src (Test Project Implementation)
prj.conf
prj.conf
+ Kconfig:
+ Kconfig:
Test Application binary
Test Application binary
Twister
Twister
Test Instance
Test Instance
+ outdir
+ outdir
+ testsuite:
+ testsuite:
+ platform:
+ platform:
+ testcases: []
+ testcases: []
+ status:
+ status:
+ reason:
+ reason:
+ execution_time:
+ execution_time:
+ retries:
+ retries:
Test Suite (test specification)
Test Suite (test specification)
+ yamlfile
+ yamlfile
+ testcases: []
+ testcases: []
+ id
+ id
+ name
+ name
+ ztest_suite_names: []
+ ztest_suite_names: []
Test Case
Test Case
+ testsuite:
+ testsuite:
+ status:
+ status:
+ reason:
+ reason:
+ output:
+ output:
+ duration:
+ duration:
+ name:
+ name:
Legend:
Legend:
Test Instance (Test Application) 
Test Instance (Test Application) 
Execution time-specific Test properties
Execution time-specific Test properties
Elementary Test
Elementary Test
tests/foo/bar/feature/section_name.subsection_name
tests/foo/bar/feature/section_name.subsection_name
section_name.subsection_name.foo_bar_aspect.buzz_and_blink
section_name.subsection_name.foo_bar_aspect.buzz_and_blink
Zephyr Test Application Project (tests/foo/bar/feature)
Zephyr Test Application Project (tests/foo/bar/feature)
Test Configuration (testcase.yaml)
Test Configuration (testcase.yaml)
build & run
build & run
Twister parameters:

--arch
--platform
--level

... etc. 
Twister parameters...
select
select
ELF symbols and application log parsing
ELF symbols and application log parsing
section_name.subsection_name
section_name.subsection_nameText is not SVG - cannot display \ No newline at end of file diff --git a/doc/develop/test/twister.rst b/doc/develop/test/twister.rst index 685c70ab886576f..a02f02391fa68b6 100644 --- a/doc/develop/test/twister.rst +++ b/doc/develop/test/twister.rst @@ -151,7 +151,23 @@ name: type: Type of the board or configuration, currently we support 2 types: mcu, qemu simulation: - Simulator used to simulate the platform, e.g. qemu. + Simulator(s) used to simulate the platform, e.g. qemu. + + .. code-block:: yaml + + simulation: + - name: qemu + - name: armfvp + exec: FVP_Some_Platform + - name: custom + exec: AnotherBinary + + By default, tests will be executed using the first entry in the simulation array. Another + simulation can be selected with ``--simulation ``. + The ``exec`` attribute is optional. If it is set but the required simulator is not available, the + tests will be built only. + If it is not set and the required simulator is not available the tests will fail to run. + The simulation name must match one of the element of ``SUPPORTED_EMU_PLATFORMS``. arch: Architecture of the board toolchain: @@ -223,57 +239,60 @@ Tests Tests are detected by the presence of a ``testcase.yaml`` or a ``sample.yaml`` files in the application's project directory. This test application -configuration file may contain one or more entries in the tests section each -identifying a test scenario. +configuration file may contain one or more entries in the ``tests:`` section each +identifying a Test Scenario. .. _twister_test_project_diagram: .. figure:: figures/twister_test_project.svg - :alt: Twister and a Test applications' project. + :alt: Twister and a Test application project. :figclass: align-center - Twister and a Test applications' project. + Twister and a Test application project. Test application configurations are written using the YAML syntax and share the same structure as samples. -A test scenario is a set of conditions or variables, defined in test scenario -entry, under which a set of test suites will be executed. Can be used -interchangeably with test scenario entry. +A Test Scenario is a set of conditions and variables defined in a Test Scenario +entry, under which a set of Test Suites will be built and executed. -A test suite is a collection of test cases that are intended to be used to test -a software program to ensure it meets certain requirements. The test cases in a -test suite are often related or meant to be executed together. +A Test Suite is a collection of Test Cases which are intended to be used to test +a software program to ensure it meets certain requirements. The Test Cases in a +Test Suite are either related or meant to be executed together. -The name of each test scenario needs to be unique in the context of the overall +The name of each Test Scenario needs to be unique in the context of the overall test application and has to follow basic rules: -#. The format of the test scenario identifier shall be a string without any spaces or +#. The format of the Test Scenario identifier shall be a string without any spaces or special characters (allowed characters: alphanumeric and [\_=]) consisting - of multiple sections delimited with a dot (.). + of multiple sections delimited with a dot (``.``). -#. Each test scenario identifier shall start with a section followed by a - subsection separated by a dot. For example, a test scenario that covers - semaphores in the kernel shall start with ``kernel.semaphore``. +#. Each Test Scenario identifier shall start with a section name followed by a + subsection names delimited with a dot (``.``). For example, a test scenario + that covers semaphores in the kernel shall start with ``kernel.semaphore``. -#. All test scenario identifiers within a ``testcase.yaml`` file need to be unique. For - example a ``testcase.yaml`` file covering semaphores in the kernel can have: +#. All Test Scenario identifiers within a ``testcase.yaml`` file need to be unique. + For example a ``testcase.yaml`` file covering semaphores in the kernel can have: * ``kernel.semaphore``: For general semaphore tests * ``kernel.semaphore.stress``: Stress testing semaphores in the kernel. -#. Depending on the nature of the test, an identifier can consist of at least - two sections: +#. The full canonical name of a Test Suite is: + ``/`` - * Ztest tests: The individual test cases in the ztest testsuite will be - concatenated by dot (``.``) to the identifier in the ``testcase.yaml`` file - generating unique identifiers for every test case in the suite. +#. Depending on the Test Suite implementation, its Test Case identifiers consist + of **at least three sections** delimited with a dot (``.``): - * Standalone tests and samples: This type of test should at least have 3 - sections concatnated by dot (``.``) in the test scenario identifier in the - ``testcase.yaml`` (or ``sample.yaml``) file. - The last section of the name shall signify the test case itself. + * **Ztest tests**: + a Test Scenario identifier from the corresponding ``testcase.yaml`` file, + a Ztest suite name, and a Ztest test name: + ``..`` + + * **Standalone tests and samples**: + a Test Scenario identifier from the corresponding ``testcase.yaml`` (or + ``sample.yaml``) file where the last section signifies the standalone + Test Case name, for example: ``debug.coredump.logging_backend``. The following is an example test configuration with a few options that are @@ -316,12 +335,10 @@ related to the sample and what is being demonstrated: tags: tests min_ram: 16 -The full canonical name for each test scenario is:``/`` - -A test scenario entry is a a block or entry starting with test scenario -identifier in the YAML files. +A Test Scenario entry in the ``tests:`` YAML dictionary has its Test Scenario +identifier as a key. -Each test scenario entry in the test application configuration can define the +Each Test Scenario entry in the Test Application configuration can define the following key/value pairs: .. _test_config_args: @@ -918,8 +935,9 @@ To use this type of simulation, add the following properties to .. code-block:: yaml - simulation: custom - simulation_exec: + simulation: + - name: custom + exec: This tells Twister that the board is using a custom emulator called ````, make sure this binary exists in the PATH. diff --git a/doc/kernel/iterable_sections/index.rst b/doc/kernel/iterable_sections/index.rst index 46ef4a3b68c5db9..17b7c76fab0a9b1 100644 --- a/doc/kernel/iterable_sections/index.rst +++ b/doc/kernel/iterable_sections/index.rst @@ -47,6 +47,7 @@ identifier, ``DATA_SECTIONS`` for RAM structures and ``SECTIONS`` for ROM ones. .. code-block:: c # iterables.ld + #include ITERABLE_SECTION_RAM(my_data, 4) The data can then be accessed using :c:macro:`STRUCT_SECTION_FOREACH`. diff --git a/doc/kernel/services/smp/smp.rst b/doc/kernel/services/smp/smp.rst index 615676494f822c6..e570958fce23e2c 100644 --- a/doc/kernel/services/smp/smp.rst +++ b/doc/kernel/services/smp/smp.rst @@ -276,7 +276,7 @@ Per-CPU data ============ Many elements of the core kernel data need to be implemented for each -CPU in SMP mode. For example, the ``_current`` thread pointer obviously +CPU in SMP mode. For example, the ``arch_current_thread()`` thread pointer obviously needs to reflect what is running locally, there are many threads running concurrently. Likewise a kernel-provided interrupt stack needs to be created and assigned for each physical CPU, as does the diff --git a/doc/releases/migration-guide-4.1.rst b/doc/releases/migration-guide-4.1.rst index 4319afe2080c4cb..75ebd3a761a7faf 100644 --- a/doc/releases/migration-guide-4.1.rst +++ b/doc/releases/migration-guide-4.1.rst @@ -36,6 +36,14 @@ Mbed TLS :kconfig:option:`CONFIG_MBEDTLS_PSA_CRYPTO_LEGACY_RNG`. This helps in reducing ROM/RAM footprint of the Mbed TLS library. +* The newly-added Kconfig option :kconfig:option:`CONFIG_MBEDTLS_PSA_KEY_SLOT_COUNT` + allows to specify the number of key slots available in the PSA Crypto core. + Previously this value was not explicitly set, so Mbed TLS's default value of + 32 was used. The new Kconfig option defaults to 16 instead in order to find + a reasonable compromise between RAM consumption and most common use cases. + It can be further trimmed down to reduce RAM consumption if the final + application doesn't need that many key slots simultaneously. + Trusted Firmware-M ================== @@ -55,6 +63,29 @@ Controller Area Network (CAN) Display ======= +* Displays using the MIPI DBI driver which set their MIPI DBI mode via the + ``mipi-mode`` property in devicetree should now use a string property of + the same name, like so: + + .. code-block:: devicetree + + /* Legacy display definition */ + + st7735r: st7735r@0 { + ... + mipi-mode = ; + ... + }; + + /* New display definition */ + + st7735r: st7735r@0 { + ... + mipi-mode = "MIPI_DBI_MODE_SPI_4WIRE"; + ... + }; + + Enhanced Serial Peripheral Interface (eSPI) =========================================== @@ -70,6 +101,12 @@ Interrupt Controller LED Strip ========= +Pin Control +=========== + + * Renamed the ``compatible`` from ``nxp,kinetis-pinctrl`` to :dtcompatible:`nxp,port-pinctrl`. + * Renamed the ``compatible`` from ``nxp,kinetis-pinmux`` to :dtcompatible:`nxp,port-pinmux`. + Sensors ======= @@ -139,6 +176,10 @@ Modem Architectures ************* +* Common + + * ``_current`` is deprecated, used :c:func:`arch_current_thread` instead. + * native/POSIX * :kconfig:option:`CONFIG_NATIVE_APPLICATION` has been deprecated. Out-of-tree boards using this diff --git a/doc/releases/release-notes-4.1.rst b/doc/releases/release-notes-4.1.rst index dff3f100c2c51d4..7dce81aa557c68e 100644 --- a/doc/releases/release-notes-4.1.rst +++ b/doc/releases/release-notes-4.1.rst @@ -27,12 +27,27 @@ API Changes Removed APIs in this release ============================ + * The deprecated Bluetooth HCI driver API has been removed. It has been replaced by a + :c:group:`new API` that follows the normal Zephyr driver model. + Deprecated in this release ========================== +* Deprecated the :c:func:`bt_le_set_auto_conn` API function. Application developers can achieve + the same functionality in their application code by reconnecting to the peer when the + :c:member:`bt_conn_cb.disconnected` callback is invoked. + Architectures ************* +* Common + + * Introduced :kconfig:option:`CONFIG_ARCH_HAS_CUSTOM_CURRENT_IMPL`, which can be selected when + an architecture implemented and enabled its own :c:func:`arch_current_thread` and + :c:func:`arch_current_thread_set` functions for faster retrieval of the current CPU's thread + pointer. When enabled, ``_current`` variable will be routed to the + :c:func:`arch_current_thread` (:github:`80716`). + * ARC * ARM @@ -41,6 +56,9 @@ Architectures * RISC-V + * Implements :c:func:`arch_current_thread_set` & :c:func:`arch_current_thread`, which can be enabled + by :kconfig:option:`CONFIG_RISCV_CURRENT_VIA_GP` (:github:`80716`). + * Xtensa * native/POSIX @@ -126,6 +144,9 @@ Drivers and Sensors * LED * Added a new set of devicetree based LED APIs, see :c:struct:`led_dt_spec`. + * lp5569: added use of auto-increment functionality. + * lp5569: implemented ``write_channels`` api. + * lp5569: demonstrate ``led_write_channels`` in the sample. * LED Strip @@ -250,6 +271,18 @@ Libraries / Subsystems * Crypto + * The Kconfig symbol :kconfig:option:`CONFIG_MBEDTLS_PSA_STATIC_KEY_SLOTS` was + added to allow Mbed TLS to use statically allocated buffers to store key material + in its PSA Crypto core instead of heap-allocated ones. This can help reduce + (or remove, if no other component makes use of it) heap memory requirements + from the final application. + + * The Kconfig symbol :kconfig:option:`CONFIG_MBEDTLS_PSA_KEY_SLOT_COUNT` was + added to allow selecting the number of key slots available in the Mbed TLS + implementation of the PSA Crypto core. It defaults to 16. Since each + slot consumes RAM memory even if unused, this value can be tweaked in order + to minimize RAM usage. + * CMSIS-NN * FPGA diff --git a/drivers/adc/Kconfig.rpi_pico b/drivers/adc/Kconfig.rpi_pico index 547bb9e99075879..bb57a37751d3688 100644 --- a/drivers/adc/Kconfig.rpi_pico +++ b/drivers/adc/Kconfig.rpi_pico @@ -6,4 +6,5 @@ config ADC_RPI_PICO default y depends on DT_HAS_RASPBERRYPI_PICO_ADC_ENABLED select PICOSDK_USE_ADC + select PINCTRL depends on RESET diff --git a/drivers/adc/adc_ad559x.c b/drivers/adc/adc_ad559x.c index b0e7bb95810870e..fdde4bb012403b0 100644 --- a/drivers/adc/adc_ad559x.c +++ b/drivers/adc/adc_ad559x.c @@ -29,6 +29,7 @@ LOG_MODULE_REGISTER(adc_ad559x, CONFIG_ADC_LOG_LEVEL); struct adc_ad559x_config { const struct device *mfd_dev; + bool double_input_range; }; struct adc_ad559x_data { @@ -240,11 +241,28 @@ static int adc_ad559x_init(const struct device *dev) struct adc_ad559x_data *data = dev->data; k_tid_t tid; int ret; + uint16_t reg_val; if (!device_is_ready(config->mfd_dev)) { return -ENODEV; } + ret = mfd_ad559x_read_reg(config->mfd_dev, AD559X_REG_GEN_CTRL, 0, ®_val); + if (ret < 0) { + return ret; + } + + if (config->double_input_range) { + reg_val |= AD559X_ADC_RANGE; + } else { + reg_val &= ~AD559X_ADC_RANGE; + } + + ret = mfd_ad559x_write_reg(config->mfd_dev, AD559X_REG_GEN_CTRL, reg_val); + if (ret < 0) { + return ret; + } + ret = mfd_ad559x_write_reg(config->mfd_dev, AD559X_REG_PD_REF_CTRL, AD559X_EN_REF); if (ret < 0) { return ret; @@ -272,24 +290,31 @@ static int adc_ad559x_init(const struct device *dev) return 0; } -static const struct adc_driver_api adc_ad559x_api = { - .channel_setup = adc_ad559x_channel_setup, - .read = adc_ad559x_read, #ifdef CONFIG_ADC_ASYNC - .read_async = adc_ad559x_read_async, +#define ADC_AD559X_ASYNC() .read_async = adc_ad559x_read_async, +#else +#define ADC_AD559X_ASYNC() #endif - .ref_internal = AD559X_ADC_VREF_MV, -}; + +#define ADC_AD559X_DRIVER_API(inst) \ + static const struct adc_driver_api adc_ad559x_api##inst = { \ + .channel_setup = adc_ad559x_channel_setup, \ + .read = adc_ad559x_read, \ + .ref_internal = AD559X_ADC_VREF_MV * (1 + DT_INST_PROP(inst, double_input_range)), \ + ADC_AD559X_ASYNC()} #define ADC_AD559X_DEFINE(inst) \ + ADC_AD559X_DRIVER_API(inst); \ + \ static const struct adc_ad559x_config adc_ad559x_config##inst = { \ .mfd_dev = DEVICE_DT_GET(DT_INST_PARENT(inst)), \ + .double_input_range = DT_INST_PROP(inst, double_input_range), \ }; \ \ static struct adc_ad559x_data adc_ad559x_data##inst; \ \ DEVICE_DT_INST_DEFINE(inst, adc_ad559x_init, NULL, &adc_ad559x_data##inst, \ &adc_ad559x_config##inst, POST_KERNEL, CONFIG_MFD_INIT_PRIORITY, \ - &adc_ad559x_api); + &adc_ad559x_api##inst); DT_INST_FOREACH_STATUS_OKAY(ADC_AD559X_DEFINE) diff --git a/drivers/audio/Kconfig.wm8904 b/drivers/audio/Kconfig.wm8904 index 35c7cd394b5ea5e..9f85af16ffb8928 100644 --- a/drivers/audio/Kconfig.wm8904 +++ b/drivers/audio/Kconfig.wm8904 @@ -3,6 +3,7 @@ config AUDIO_CODEC_WM8904 bool "Wolfson WM8904 codec support" + default y select I2C depends on DT_HAS_WOLFSON_WM8904_ENABLED help diff --git a/drivers/bluetooth/hci/CMakeLists.txt b/drivers/bluetooth/hci/CMakeLists.txt index b205fbc4e134a4a..48a46ead7397dc2 100644 --- a/drivers/bluetooth/hci/CMakeLists.txt +++ b/drivers/bluetooth/hci/CMakeLists.txt @@ -14,7 +14,8 @@ zephyr_library_sources_ifdef(CONFIG_BT_CYW208XX hci_ifx_cyw208xx.c) zephyr_library_sources_ifdef(CONFIG_BT_STM32_IPM ipm_stm32wb.c) zephyr_library_sources_ifdef(CONFIG_BT_STM32WBA hci_stm32wba.c) -if(CONFIG_DT_HAS_ST_HCI_STM32WBA_ENABLED) +zephyr_library_sources_ifdef(CONFIG_BT_STM32WB0 hci_stm32wb0.c) +if((CONFIG_DT_HAS_ST_HCI_STM32WBA_ENABLED) OR (CONFIG_DT_HAS_ST_HCI_STM32WB0_ENABLED)) zephyr_blobs_verify(MODULE hal_stm32 REQUIRED) endif() zephyr_library_sources_ifdef(CONFIG_BT_USERCHAN userchan.c) diff --git a/drivers/bluetooth/hci/Kconfig b/drivers/bluetooth/hci/Kconfig index d2a68ae37589132..52d6c6eea3c75a4 100644 --- a/drivers/bluetooth/hci/Kconfig +++ b/drivers/bluetooth/hci/Kconfig @@ -101,6 +101,20 @@ config BT_STM32WBA help ST STM32WBA HCI Bluetooth interface +config BT_STM32WB0 + bool "STM32WB0 HCI driver" + default y + depends on DT_HAS_ST_HCI_STM32WB0_ENABLED + depends on ZEPHYR_HAL_STM32_MODULE_BLOBS + select HAS_STM32LIB + select USE_STM32_HAL_PKA + select USE_STM32_HAL_CORTEX + select USE_STM32_HAL_GPIO + select USE_STM32_HAL_RADIO + select USE_STM32_HAL_RADIO_TIMER + help + ST STM32WB0 HCI Bluetooth interface + config BT_SILABS_EFR32 bool default y diff --git a/drivers/bluetooth/hci/h4_ifx_cyw43xxx.c b/drivers/bluetooth/hci/h4_ifx_cyw43xxx.c index 6c3b132ed30ecde..ae98a8e51e2d6df 100644 --- a/drivers/bluetooth/hci/h4_ifx_cyw43xxx.c +++ b/drivers/bluetooth/hci/h4_ifx_cyw43xxx.c @@ -15,7 +15,6 @@ #include #include #include -#include #include #include diff --git a/drivers/bluetooth/hci/hci_stm32wb0.c b/drivers/bluetooth/hci/hci_stm32wb0.c new file mode 100644 index 000000000000000..b47de037a2df3aa --- /dev/null +++ b/drivers/bluetooth/hci/hci_stm32wb0.c @@ -0,0 +1,503 @@ +/* hci_stm32wb0.c - HCI driver for stm32wb0x */ + +/* + * Copyright (c) 2024 STMicroelectronics + * + * SPDX-License-Identifier: Apache-2.0 + */ + +#include +#include +#include +#include +#include "bleplat_cntr.h" +#include "ble_stack.h" +#include "stm32wb0x_hal_radio_timer.h" +#include "miscutil.h" +#include "pka_manager.h" +#include "app_conf.h" +#include "dtm_cmd_db.h" +#include "dm_alloc.h" +#include "aci_adv_nwk.h" +#include "app_common.h" +#include "hw_rng.h" +#include "hw_aes.h" +#include "hw_pka.h" + +#define LOG_LEVEL CONFIG_BT_HCI_DRIVER_LOG_LEVEL +#include +LOG_MODULE_REGISTER(bt_driver); + +#define DT_DRV_COMPAT st_hci_stm32wb0 + +/* Max HS startup time expressed in system time (1953 us / 2.4414 us) */ +#define MAX_HS_STARTUP_TIME 320 +#define BLE_WKUP_PRIO 0 +#define BLE_WKUP_FLAGS 0 +#define BLE_TX_RX_PRIO 0 +#define BLE_TX_RX_FLAGS 0 +#define CPU_WKUP_PRIO 1 +#define CPU_WKUP_FLAGS 0 +#define BLE_ERROR_PRIO 3 +#define BLE_ERROR_FLAGS 0 +#define BLE_RXTX_SEQ_PRIO 3 +#define BLE_RXTX_SEQ_FLAGS 0 +#define PKA_PRIO 2 +#define PKA_FLAGS 0 + +#define MAX_EVENT_SIZE 259 +#define MAX_ISO_DATA_LOAD_LENGTH 512 + +#define PACKET_TYPE 0 +#define EVT_HEADER_TYPE 0 +#define EVT_HEADER_EVENT 1 +#define EVT_HEADER_SIZE 2 +#define EVT_LE_META_SUBEVENT 3 +#define EVT_VENDOR_CODE_LSB 3 +#define EVT_VENDOR_CODE_MSB 4 + +static uint32_t __noinit dyn_alloc_a[BLE_DYN_ALLOC_SIZE >> 2]; +static uint8_t buffer_out_mem[MAX_EVENT_SIZE]; +static struct k_work_delayable hal_radio_timer_work, ble_stack_work; + +static struct net_buf *get_rx(uint8_t *msg); +static PKA_HandleTypeDef hpka; + +#if CONFIG_BT_EXT_ADV +static uint32_t __noinit aci_adv_nwk_buffer[CFG_BLE_ADV_NWK_BUFFER_SIZE >> 2]; +#endif /* CONFIG_BT_EXT_ADV */ + +struct hci_data { + bt_hci_recv_t recv; +}; + +/* Dummy implementation */ +int BLEPLAT_NvmGet(void) +{ + return 0; +} + +static void blestack_process(struct k_work *work) +{ + BLE_STACK_Tick(); + if (BLE_STACK_SleepCheck() == 0) { + k_work_reschedule(&ble_stack_work, K_NO_WAIT); + } +} + +static void vtimer_process(struct k_work *work) +{ + HAL_RADIO_TIMER_Tick(); +} + +/* "If, since the last power-on or reset, the Host has ever issued a legacy + * advertising command and then issues an extended advertising command, or + * has ever issued an extended advertising command and then issues a legacy + * advertising command, the Controller shall return the error code Command + * Disallowed (0x0C)." + * This function returns 1 if an error has to be given. + */ +static uint8_t check_legacy_extended_call(uint16_t opcode, uint8_t *buffer_out) +{ + static bool legacy_cmd_issued, extended_cmd_issued; + bool allowed = true; + + if (IN_RANGE(opcode, BT_HCI_OP_LE_SET_ADV_PARAM, BT_HCI_OP_LE_CREATE_CONN)) { + if (extended_cmd_issued) { + allowed = false; /* Error */ + LOG_ERR("Extended not allowed"); + } else { + legacy_cmd_issued = true; + allowed = true; /* OK */ + } + } else if ((opcode >= BT_HCI_OP_LE_SET_EXT_ADV_PARAM) && + (opcode <= BT_HCI_OP_LE_READ_PER_ADV_LIST_SIZE)) { + if (legacy_cmd_issued) { + allowed = false; /* Error */ + LOG_ERR("Legacy not allowed"); + } else { + extended_cmd_issued = true; + allowed = true; /* OK */ + } + } + + if (!allowed) { + struct bt_hci_evt_hdr *evt_header = (struct bt_hci_evt_hdr *)(buffer_out + 1); + + *buffer_out = BT_HCI_H4_EVT; + if (opcode == BT_HCI_OP_LE_CREATE_CONN || opcode == BT_HCI_OP_LE_EXT_CREATE_CONN || + opcode == BT_HCI_OP_LE_PER_ADV_CREATE_SYNC) { + struct bt_hci_evt_cmd_status *params = + (struct bt_hci_evt_cmd_status *)(buffer_out + 3); + + evt_header->evt = BT_HCI_EVT_CMD_STATUS; + evt_header->len = 4; + params->status = BT_HCI_ERR_CMD_DISALLOWED; + params->ncmd = 1; + params->opcode = sys_cpu_to_le16(opcode); + } else { + struct bt_hci_evt_cmd_complete *params = + (struct bt_hci_evt_cmd_complete *)(buffer_out + 3); + + evt_header->evt = BT_HCI_EVT_CMD_COMPLETE; + evt_header->len = 4; + params->ncmd = 1; + params->opcode = sys_cpu_to_le16(opcode); + buffer_out[6] = BT_HCI_ERR_CMD_DISALLOWED; + } + return 7; + } + return 0; +} + +/* Process Commands */ +static uint16_t process_command(uint8_t *buffer, uint16_t buffer_in_length, uint8_t *buffer_out, + uint16_t buffer_out_max_length) +{ + uint32_t i; + uint16_t ret_val; + uint16_t op_code; + uint8_t *buffer_in = buffer + sizeof(struct bt_hci_cmd_hdr); + struct bt_hci_cmd_hdr *hdr = (struct bt_hci_cmd_hdr *)buffer; + + buffer_in_length -= sizeof(struct bt_hci_cmd_hdr); + op_code = hdr->opcode; + ret_val = check_legacy_extended_call(op_code, buffer_out); + if (ret_val != 0) { + LOG_ERR("ret_val: %d", ret_val); + return ret_val; + } + + for (i = 0; hci_command_table[i].opcode != 0; i++) { + if (op_code == hci_command_table[i].opcode) { + ret_val = hci_command_table[i].execute(buffer_in, buffer_in_length, + buffer_out, buffer_out_max_length); + /* add get crash handler */ + return ret_val; + } + } + + struct bt_hci_evt_hdr *evt_header = (struct bt_hci_evt_hdr *)(buffer_out + 1); + struct bt_hci_evt_cmd_status *params = (struct bt_hci_evt_cmd_status *)(buffer_out + 3); + + *buffer_out = BT_HCI_H4_EVT; + evt_header->evt = BT_HCI_EVT_CMD_STATUS; + evt_header->len = 4; + params->status = BT_HCI_ERR_UNKNOWN_CMD; + params->ncmd = 1; + params->opcode = sys_cpu_to_le16(op_code); + return 7; +} + +void send_event(uint8_t *buffer_out, uint16_t buffer_out_length, int8_t overflow_index) +{ + ARG_UNUSED(buffer_out_length); + ARG_UNUSED(overflow_index); + + const struct device *dev = DEVICE_DT_GET(DT_DRV_INST(0)); + struct hci_data *hci = dev->data; + /* Construct net_buf from event data */ + struct net_buf *buf = get_rx(buffer_out); + + if (buf) { + /* Handle the received HCI data */ + LOG_DBG("New event %p len %u type %u", buf, buf->len, bt_buf_get_type(buf)); + hci->recv(dev, buf); + } else { + LOG_ERR("Buf is null"); + } +} + +void HAL_RADIO_TIMER_TxRxWakeUpCallback(void) +{ + k_work_schedule(&hal_radio_timer_work, K_NO_WAIT); + k_work_schedule(&ble_stack_work, K_NO_WAIT); +} + +void HAL_RADIO_TIMER_CpuWakeUpCallback(void) +{ + k_work_schedule(&hal_radio_timer_work, K_NO_WAIT); + k_work_schedule(&ble_stack_work, K_NO_WAIT); +} + +void HAL_RADIO_TxRxCallback(uint32_t flags) +{ + BLE_STACK_RadioHandler(flags); + k_work_schedule(&ble_stack_work, K_NO_WAIT); + k_work_schedule(&hal_radio_timer_work, K_NO_WAIT); +} + +ISR_DIRECT_DECLARE(RADIO_TIMER_TXRX_WKUP_IRQHandler) +{ + HAL_RADIO_TIMER_TXRX_WKUP_IRQHandler(); + ISR_DIRECT_PM(); /* PM done after servicing interrupt for best latency */ + return 1; +} + +ISR_DIRECT_DECLARE(RADIO_TXRX_IRQHandler) +{ + HAL_RADIO_TXRX_IRQHandler(); + ISR_DIRECT_PM(); /* PM done after servicing interrupt for best latency */ + return 1; +} + +ISR_DIRECT_DECLARE(RADIO_TXRX_SEQ_IRQHandler) +{ + HAL_RADIO_TXRX_SEQ_IRQHandler(); + ISR_DIRECT_PM(); /* PM done after servicing interrupt for best latency */ + return 1; +} + +ISR_DIRECT_DECLARE(RADIO_TIMER_CPU_WKUP_IRQHandler) +{ + HAL_RADIO_TIMER_TimeoutCallback(); + HAL_RADIO_TIMER_CpuWakeUpCallback(); + ISR_DIRECT_PM(); /* PM done after servicing interrupt for best latency */ + return 1; +} + +ISR_DIRECT_DECLARE(RADIO_TIMER_ERROR_IRQHandler) +{ + volatile uint32_t debug_cmd; + + BLUE->DEBUGCMDREG |= 1; + /* If the device is configured with CLK_SYS = 64MHz + * and BLE clock = 16MHz, a register read is necessary + * to ensure interrupt register is properly cleared + * due to AHB down converter latency + */ + debug_cmd = BLUE->DEBUGCMDREG; + LOG_ERR("Timer error"); + ISR_DIRECT_PM(); /* PM done after servicing interrupt for best latency */ + return 1; +} + +/* Function called from PKA_IRQHandler() context. */ +void PKAMGR_IRQCallback(void) +{ + k_work_schedule(&ble_stack_work, K_NO_WAIT); +} + +static int _PKA_IRQHandler(void *args) +{ + ARG_UNUSED(args); + + HAL_PKA_IRQHandler(&hpka); + ISR_DIRECT_PM(); /* PM done after servicing interrupt for best latency */ + return 1; +} + +static void ble_isr_installer(void) +{ + IRQ_DIRECT_CONNECT(RADIO_TIMER_TXRX_WKUP_IRQn, BLE_WKUP_PRIO, + RADIO_TIMER_TXRX_WKUP_IRQHandler, BLE_WKUP_FLAGS); + IRQ_DIRECT_CONNECT(RADIO_TXRX_IRQn, BLE_TX_RX_PRIO, RADIO_TXRX_IRQHandler, BLE_TX_RX_FLAGS); + IRQ_DIRECT_CONNECT(RADIO_TIMER_CPU_WKUP_IRQn, CPU_WKUP_PRIO, + RADIO_TIMER_CPU_WKUP_IRQHandler, CPU_WKUP_FLAGS); + IRQ_DIRECT_CONNECT(RADIO_TXRX_SEQ_IRQn, BLE_RXTX_SEQ_PRIO, RADIO_TXRX_SEQ_IRQHandler, + BLE_RXTX_SEQ_FLAGS); + IRQ_DIRECT_CONNECT(RADIO_TIMER_ERROR_IRQn, BLE_ERROR_PRIO, RADIO_TIMER_ERROR_IRQHandler, + BLE_ERROR_FLAGS); + IRQ_CONNECT(PKA_IRQn, PKA_PRIO, _PKA_IRQHandler, NULL, PKA_FLAGS); +} + +static struct net_buf *get_rx(uint8_t *msg) +{ + bool discardable = false; + k_timeout_t timeout = K_FOREVER; + struct net_buf *buf; + int len; + + switch (msg[PACKET_TYPE]) { + case BT_HCI_H4_EVT: + if (msg[EVT_HEADER_EVENT] == BT_HCI_EVT_LE_META_EVENT && + (msg[EVT_LE_META_SUBEVENT] == BT_HCI_EVT_LE_ADVERTISING_REPORT)) { + discardable = true; + timeout = K_NO_WAIT; + } + buf = bt_buf_get_evt(msg[EVT_HEADER_EVENT], discardable, timeout); + if (!buf) { + LOG_DBG("Discard adv report due to insufficient buf"); + return NULL; + } + + len = sizeof(struct bt_hci_evt_hdr) + msg[EVT_HEADER_SIZE]; + if (len > net_buf_tailroom(buf)) { + LOG_ERR("Event too long: %d", len); + net_buf_unref(buf); + return NULL; + } + net_buf_add_mem(buf, &msg[1], len); + break; + case BT_HCI_H4_ACL: + struct bt_hci_acl_hdr acl_hdr; + + buf = bt_buf_get_rx(BT_BUF_ACL_IN, timeout); + memcpy(&acl_hdr, &msg[1], sizeof(acl_hdr)); + len = sizeof(acl_hdr) + sys_le16_to_cpu(acl_hdr.len); + if (len > net_buf_tailroom(buf)) { + LOG_ERR("ACL too long: %d", len); + net_buf_unref(buf); + return NULL; + } + net_buf_add_mem(buf, &msg[1], len); + break; + case BT_HCI_H4_ISO: + struct bt_hci_iso_hdr iso_hdr; + + buf = bt_buf_get_rx(BT_BUF_ISO_IN, timeout); + if (buf) { + memcpy(&iso_hdr, &msg[1], sizeof(iso_hdr)); + len = sizeof(iso_hdr) + sys_le16_to_cpu(iso_hdr.len); + } else { + LOG_ERR("No available ISO buffers!"); + return NULL; + } + if (len > net_buf_tailroom(buf)) { + LOG_ERR("ISO too long: %d", len); + net_buf_unref(buf); + return NULL; + } + net_buf_add_mem(buf, &msg[1], len); + break; + default: + LOG_ERR("Unknown BT buf type %d", msg[0]); + return NULL; + } + + return buf; +} + +static int bt_hci_stm32wb0_send(const struct device *dev, struct net_buf *buf) +{ + int ret = 0; + uint8_t *hci_buffer = buf->data; + + ARG_UNUSED(dev); + + switch (bt_buf_get_type(buf)) { + case BT_BUF_ACL_OUT: { + uint16_t connection_handle; + uint16_t data_len; + uint8_t *pdu; + uint8_t pb_flag; + uint8_t bc_flag; + + connection_handle = ((hci_buffer[1] & 0x0F) << 8) + hci_buffer[0]; + data_len = (hci_buffer[3] << 8) + hci_buffer[2]; + pdu = hci_buffer + 4; + pb_flag = (hci_buffer[1] >> 4) & 0x3; + bc_flag = (hci_buffer[1] >> 6) & 0x3; + hci_tx_acl_data(connection_handle, pb_flag, bc_flag, data_len, pdu); + break; + } +#if defined(CONFIG_BT_ISO) + case BT_BUF_ISO_OUT: { + uint16_t connection_handle; + uint16_t iso_data_load_len; + uint8_t *iso_data_load; + uint8_t pb_flag; + uint8_t ts_flag; + + connection_handle = sys_get_le16(hci_buffer) & 0x0FFF; + iso_data_load_len = sys_get_le16(hci_buffer + 2) & 0x3FFF; + pb_flag = (hci_buffer[1] >> 4) & 0x3; + ts_flag = (hci_buffer[1] >> 6) & 0x1; + iso_data_load = &hci_buffer[4]; + hci_tx_iso_data(connection_handle, pb_flag, ts_flag, iso_data_load_len, + iso_data_load); + break; + } +#endif /* CONFIG_BT_ISO */ + case BT_BUF_CMD: + process_command(hci_buffer, buf->len, buffer_out_mem, sizeof(buffer_out_mem)); + send_event(buffer_out_mem, 0, 0); + break; + default: + LOG_ERR("Unsupported type"); + return -EINVAL; + } + net_buf_unref(buf); + + return ret; +} + +static int bt_hci_stm32wb0_open(const struct device *dev, bt_hci_recv_t recv) +{ + struct hci_data *data = dev->data; + RADIO_TIMER_InitTypeDef VTIMER_InitStruct = {MAX_HS_STARTUP_TIME, 0, 0}; + RADIO_HandleTypeDef hradio = {0}; + BLE_STACK_InitTypeDef BLE_STACK_InitParams = { + .BLEStartRamAddress = (uint8_t *)dyn_alloc_a, + .TotalBufferSize = BLE_DYN_ALLOC_SIZE, + .NumAttrRecords = CFG_BLE_NUM_GATT_ATTRIBUTES, + .MaxNumOfClientProcs = CFG_BLE_NUM_OF_CONCURRENT_GATT_CLIENT_PROC, + .NumOfRadioTasks = CFG_BLE_NUM_RADIO_TASKS, + .NumOfEATTChannels = CFG_BLE_NUM_EATT_CHANNELS, + .NumBlockCount = CFG_BLE_MBLOCKS_COUNT, + .ATT_MTU = CFG_BLE_ATT_MTU_MAX, + .MaxConnEventLength = CFG_BLE_CONN_EVENT_LENGTH_MAX, + .SleepClockAccuracy = CFG_BLE_SLEEP_CLOCK_ACCURACY, + .NumOfAdvDataSet = CFG_BLE_NUM_ADV_SETS, + .NumOfSubeventsPAwR = CFG_BLE_NUM_PAWR_SUBEVENTS, + .MaxPAwRSubeventDataCount = CFG_BLE_PAWR_SUBEVENT_DATA_COUNT_MAX, + .NumOfAuxScanSlots = CFG_BLE_NUM_AUX_SCAN_SLOTS, + .FilterAcceptListSizeLog2 = CFG_BLE_FILTER_ACCEPT_LIST_SIZE_LOG2, + .L2CAP_MPS = CFG_BLE_COC_MPS_MAX, + .L2CAP_NumChannels = CFG_BLE_COC_NBR_MAX, + .NumOfSyncSlots = CFG_BLE_NUM_SYNC_SLOTS, + .CTE_MaxNumAntennaIDs = CFG_BLE_NUM_CTE_ANTENNA_IDS_MAX, + .CTE_MaxNumIQSamples = CFG_BLE_NUM_CTE_IQ_SAMPLES_MAX, + .NumOfSyncBIG = CFG_BLE_NUM_SYNC_BIG_MAX, + .NumOfBrcBIG = CFG_BLE_NUM_BRC_BIG_MAX, + .NumOfSyncBIS = CFG_BLE_NUM_SYNC_BIS_MAX, + .NumOfBrcBIS = CFG_BLE_NUM_BRC_BIS_MAX, + .NumOfCIG = CFG_BLE_NUM_CIG_MAX, + .NumOfCIS = CFG_BLE_NUM_CIS_MAX, + .isr0_fifo_size = CFG_BLE_ISR0_FIFO_SIZE, + .isr1_fifo_size = CFG_BLE_ISR1_FIFO_SIZE, + .user_fifo_size = CFG_BLE_USER_FIFO_SIZE + }; + + ble_isr_installer(); + hradio.Instance = RADIO; + HAL_RADIO_Init(&hradio); + HAL_RADIO_TIMER_Init(&VTIMER_InitStruct); + + HW_RNG_Init(); + HW_AES_Init(); + hpka.Instance = PKA; + HAL_PKA_Init(&hpka); + HW_PKA_Init(); + if (BLE_STACK_Init(&BLE_STACK_InitParams)) { + LOG_ERR("BLE Init Failed...."); + return -EIO; + } + +#if CONFIG_BT_EXT_ADV + dm_init(CFG_BLE_ADV_NWK_BUFFER_SIZE, aci_adv_nwk_buffer); +#endif /* CONFIG_BT_EXT_ADV */ + + aci_adv_nwk_init(); + + data->recv = recv; + k_work_init_delayable(&hal_radio_timer_work, vtimer_process); + k_work_init_delayable(&ble_stack_work, blestack_process); + k_work_schedule(&ble_stack_work, K_NO_WAIT); + + return 0; +} + +static const struct bt_hci_driver_api drv = { + .open = bt_hci_stm32wb0_open, + .send = bt_hci_stm32wb0_send, +}; + +#define HCI_DEVICE_INIT(inst) \ + static struct hci_data hci_data_##inst = { \ + }; \ + DEVICE_DT_INST_DEFINE(inst, NULL, NULL, &hci_data_##inst, NULL, \ + POST_KERNEL, CONFIG_KERNEL_INIT_PRIORITY_DEVICE, &drv) + +/* Only one instance supported */ +HCI_DEVICE_INIT(0) diff --git a/drivers/clock_control/Kconfig.rpi_pico b/drivers/clock_control/Kconfig.rpi_pico index 3c7c87121fda065..274f7c0eb2816d3 100644 --- a/drivers/clock_control/Kconfig.rpi_pico +++ b/drivers/clock_control/Kconfig.rpi_pico @@ -7,6 +7,7 @@ config CLOCK_CONTROL_RPI_PICO bool "Raspberry Pi Pico Clock Controller Driver" default y depends on DT_HAS_RASPBERRYPI_PICO_CLOCK_CONTROLLER_ENABLED + select PINCTRL if CLOCK_CONTROL_RPI_PICO diff --git a/drivers/clock_control/clock_control_mcux_ccm_rev2.c b/drivers/clock_control/clock_control_mcux_ccm_rev2.c index 703c9f1c7af5baa..f0059a962405ddc 100644 --- a/drivers/clock_control/clock_control_mcux_ccm_rev2.c +++ b/drivers/clock_control/clock_control_mcux_ccm_rev2.c @@ -111,10 +111,16 @@ static int mcux_ccm_get_subsys_rate(const struct device *dev, #endif #ifdef CONFIG_PWM_MCUX +#if defined(CONFIG_SOC_SERIES_IMXRT118X) + case IMX_CCM_PWM_CLK: + clock_root = kCLOCK_Root_Bus_Aon; + break; +#else case IMX_CCM_PWM_CLK: clock_root = kCLOCK_Root_Bus; break; -#endif +#endif /* CONFIG_SOC_SERIES_IMXRT118X */ +#endif /* CONFIG_PWM_MCUX */ #ifdef CONFIG_CAN_MCUX_FLEXCAN case IMX_CCM_CAN1_CLK: diff --git a/drivers/clock_control/clock_control_mcux_syscon.c b/drivers/clock_control/clock_control_mcux_syscon.c index ca772e2cdd4594d..3229c7a9ecc7ae5 100644 --- a/drivers/clock_control/clock_control_mcux_syscon.c +++ b/drivers/clock_control/clock_control_mcux_syscon.c @@ -44,7 +44,7 @@ static int mcux_lpc_syscon_clock_control_on(const struct device *dev, } #endif -#if defined(CONFIG_PINCTRL_NXP_KINETIS) +#if defined(CONFIG_PINCTRL_NXP_PORT) switch ((uint32_t)sub_system) { #if defined(CONFIG_SOC_SERIES_MCXA) case MCUX_PORT0_CLK: @@ -82,7 +82,7 @@ static int mcux_lpc_syscon_clock_control_on(const struct device *dev, default: break; } -#endif /* defined(CONFIG_PINCTRL_NXP_KINETIS) */ +#endif /* defined(CONFIG_PINCTRL_NXP_PORT) */ #ifdef CONFIG_ETH_NXP_ENET_QOS if ((uint32_t)sub_system == MCUX_ENET_QOS_CLK) { diff --git a/drivers/counter/counter_esp32_rtc.c b/drivers/counter/counter_esp32_rtc.c index c9c4ac9509b5dc4..71544ed8b7a3233 100644 --- a/drivers/counter/counter_esp32_rtc.c +++ b/drivers/counter/counter_esp32_rtc.c @@ -57,18 +57,17 @@ static int counter_esp32_init(const struct device *dev) { const struct counter_esp32_config *cfg = dev->config; struct counter_esp32_data *data = dev->data; + int ret, flags; /* RTC_SLOW_CLK is the default clk source */ clock_control_get_rate(cfg->clock_dev, (clock_control_subsys_t)ESP32_CLOCK_CONTROL_SUBSYS_RTC_SLOW, &data->clk_src_freq); - int ret = esp_intr_alloc(cfg->irq_source, - ESP_PRIO_TO_FLAGS(cfg->irq_priority) | - ESP_INT_FLAGS_CHECK(cfg->irq_flags), - (ESP32_COUNTER_RTC_ISR_HANDLER)counter_esp32_isr, - (void *)dev, - NULL); + flags = ESP_PRIO_TO_FLAGS(cfg->irq_priority) | ESP_INT_FLAGS_CHECK(cfg->irq_flags) | + ESP_INTR_FLAG_SHARED; + ret = esp_intr_alloc(cfg->irq_source, flags, + (ESP32_COUNTER_RTC_ISR_HANDLER)counter_esp32_isr, (void *)dev, NULL); if (ret != 0) { LOG_ERR("could not allocate interrupt (err %d)", ret); @@ -228,6 +227,11 @@ static void counter_esp32_isr(void *arg) const struct device *dev = (const struct device *)arg; struct counter_esp32_data *data = dev->data; uint32_t now; + uint32_t status = REG_READ(RTC_CNTL_INT_ST_REG); + + if (!(status & RTC_CNTL_MAIN_TIMER_INT_ST_M)) { + return; + } counter_esp32_cancel_alarm(dev, 0); counter_esp32_get_value(dev, &now); diff --git a/drivers/dac/dac_ad559x.c b/drivers/dac/dac_ad559x.c index e7cb90a9ac5ed61..b0b3d0ab761a12c 100644 --- a/drivers/dac/dac_ad559x.c +++ b/drivers/dac/dac_ad559x.c @@ -21,6 +21,7 @@ LOG_MODULE_REGISTER(dac_ad559x, CONFIG_DAC_LOG_LEVEL); struct dac_ad559x_config { const struct device *mfd_dev; + bool double_output_range; }; struct dac_ad559x_data { @@ -88,11 +89,28 @@ static int dac_ad559x_init(const struct device *dev) { const struct dac_ad559x_config *config = dev->config; int ret; + uint16_t reg_val; if (!device_is_ready(config->mfd_dev)) { return -ENODEV; } + ret = mfd_ad559x_read_reg(config->mfd_dev, AD559X_REG_GEN_CTRL, 0, ®_val); + if (ret < 0) { + return ret; + } + + if (config->double_output_range) { + reg_val |= AD559X_DAC_RANGE; + } else { + reg_val &= ~AD559X_DAC_RANGE; + } + + ret = mfd_ad559x_write_reg(config->mfd_dev, AD559X_REG_GEN_CTRL, reg_val); + if (ret < 0) { + return ret; + } + ret = mfd_ad559x_write_reg(config->mfd_dev, AD559X_REG_PD_REF_CTRL, AD559X_EN_REF); if (ret < 0) { return ret; @@ -104,6 +122,7 @@ static int dac_ad559x_init(const struct device *dev) #define DAC_AD559X_DEFINE(inst) \ static const struct dac_ad559x_config dac_ad559x_config##inst = { \ .mfd_dev = DEVICE_DT_GET(DT_INST_PARENT(inst)), \ + .double_output_range = DT_INST_PROP(inst, double_output_range), \ }; \ \ struct dac_ad559x_data dac_ad559x_data##inst; \ diff --git a/drivers/dai/intel/ssp/ssp.c b/drivers/dai/intel/ssp/ssp.c index f1b628cbf6dc384..0670003fff44f51 100644 --- a/drivers/dai/intel/ssp/ssp.c +++ b/drivers/dai/intel/ssp/ssp.c @@ -122,7 +122,7 @@ static void dai_ssp_update_bits(struct dai_intel_ssp *dp, uint32_t reg, uint32_t sys_write32((sys_read32(dest) & (~mask)) | (val & mask), dest); } -#if CONFIG_INTEL_MN +#if SSP_IP_VER == SSP_IP_VER_1_0 static int dai_ssp_gcd(int a, int b) { int aux; @@ -411,7 +411,7 @@ static void dai_ssp_mn_release_mclk(struct dai_intel_ssp *dp, uint32_t mclk_id) k_spin_unlock(&mp->lock, key); } -#if CONFIG_INTEL_MN +#if SSP_IP_VER == SSP_IP_VER_1_0 /** * \brief Finds valid M/(N * SCR) values for given frequencies. * \param[in] freq SSP clock frequency. @@ -1156,7 +1156,7 @@ static void dai_ssp_mclk_disable_unprepare(struct dai_intel_ssp *dp) static int dai_ssp_bclk_prepare_enable(struct dai_intel_ssp *dp) { -#if !(CONFIG_INTEL_MN) +#if SSP_IP_VER != SSP_IP_VER_1_0 struct dai_intel_ssp_freq_table *ft = dai_get_ftable(dp); #endif struct dai_intel_ssp_plat_data *ssp_plat_data = dai_get_plat_data(dp); @@ -1170,7 +1170,7 @@ static int dai_ssp_bclk_prepare_enable(struct dai_intel_ssp *dp) sscr0 = sys_read32(dai_base(dp) + SSCR0); -#if CONFIG_INTEL_MN +#if SSP_IP_VER == SSP_IP_VER_1_0 bool need_ecs = false; /* BCLK config */ ret = dai_ssp_mn_set_bclk(dp, dp->dai_index, ssp_plat_data->params.bclk_rate, @@ -1191,12 +1191,10 @@ static int dai_ssp_bclk_prepare_enable(struct dai_intel_ssp *dp) mdiv = ft[DAI_INTEL_SSP_DEFAULT_IDX].freq / ssp_plat_data->params.bclk_rate; #endif -#if SSP_IP_VER < CONFIG_SOC_INTEL_ACE30 -#if CONFIG_INTEL_MN +#if SSP_IP_VER == SSP_IP_VER_1_0 if (need_ecs) { sscr0 |= SSCR0_ECS; } -#endif #endif /* clock divisor is SCR + 1 */ @@ -1231,7 +1229,7 @@ static void dai_ssp_bclk_disable_unprepare(struct dai_intel_ssp *dp) if (!(ssp_plat_data->clk_active & SSP_CLK_BCLK_ACTIVE)) { return; } -#if CONFIG_INTEL_MN +#if SSP_IP_VER == SSP_IP_VER_1_0 dai_ssp_mn_release_bclk(dp, ssp_plat_data->ssp_index); #endif ssp_plat_data->clk_active &= ~SSP_CLK_BCLK_ACTIVE; @@ -2611,7 +2609,7 @@ static int dai_ssp_probe(struct dai_intel_ssp *dp) dp->state[DAI_DIR_PLAYBACK] = DAI_STATE_READY; dp->state[DAI_DIR_CAPTURE] = DAI_STATE_READY; -#if CONFIG_INTEL_MN +#if SSP_IP_VER == SSP_IP_VER_1_0 /* Reset M/N, power-gating functions need it */ dai_ssp_mn_reset_bclk_divider(dp, ssp_plat_data->ssp_index); #endif diff --git a/drivers/dai/intel/ssp/ssp.h b/drivers/dai/intel/ssp/ssp.h index baf4d02e2d61731..d85a95aa9a2f190 100644 --- a/drivers/dai/intel/ssp/ssp.h +++ b/drivers/dai/intel/ssp/ssp.h @@ -76,7 +76,7 @@ #error "Missing ssp definitions" #endif -#if CONFIG_INTEL_MN +#if SSP_IP_VER == SSP_IP_VER_1_0 /** \brief BCLKs can be driven by multiple sources - M/N or XTAL directly. * Even in the case of M/N, the actual clock source can be XTAL, * Audio cardinal clock (24.576) or 96 MHz PLL. @@ -104,7 +104,7 @@ struct dai_intel_ssp_mn { int mclk_rate[DAI_INTEL_SSP_NUM_MCLK]; int mclk_source_clock; -#if CONFIG_INTEL_MN +#if SSP_IP_VER == SSP_IP_VER_1_0 enum bclk_source bclk_sources[(CONFIG_DAI_INTEL_SSP_NUM_BASE + CONFIG_DAI_INTEL_SSP_NUM_EXT)]; int bclk_source_mn_clock; diff --git a/drivers/display/display_gc9x01x.c b/drivers/display/display_gc9x01x.c index 4ff5e990f07ea7f..7a3ca1ea12eb664 100644 --- a/drivers/display/display_gc9x01x.c +++ b/drivers/display/display_gc9x01x.c @@ -530,7 +530,7 @@ static int gc9x01x_write(const struct device *dev, const uint16_t x, const uint1 write_h = 1U; nbr_of_writes = desc->height; mipi_desc.height = 1; - mipi_desc.buf_size = desc->pitch * data->bytes_per_pixel; + mipi_desc.buf_size = desc->width * data->bytes_per_pixel; } else { write_h = desc->height; mipi_desc.height = desc->height; diff --git a/drivers/display/display_ili9xxx.c b/drivers/display/display_ili9xxx.c index 2cdd4d6cafb392b..b5bbc9733278f9e 100644 --- a/drivers/display/display_ili9xxx.c +++ b/drivers/display/display_ili9xxx.c @@ -521,7 +521,8 @@ static const struct ili9xxx_quirks ili9488_quirks = { .quirks = &ili##t##_quirks, \ .mipi_dev = DEVICE_DT_GET(DT_PARENT(INST_DT_ILI9XXX(n, t))), \ .dbi_config = { \ - .mode = DT_PROP_OR(INST_DT_ILI9XXX(n, t), \ + .mode = DT_STRING_UPPER_TOKEN_OR( \ + INST_DT_ILI9XXX(n, t), \ mipi_mode, MIPI_DBI_MODE_SPI_4WIRE), \ .config = MIPI_DBI_SPI_CONFIG_DT( \ INST_DT_ILI9XXX(n, t), \ diff --git a/drivers/display/display_st7735r.c b/drivers/display/display_st7735r.c index 1626cb5204b23e5..a12ddf3ecfbc44a 100644 --- a/drivers/display/display_st7735r.c +++ b/drivers/display/display_st7735r.c @@ -494,7 +494,7 @@ static const struct display_driver_api st7735r_api = { .mipi_dev = DEVICE_DT_GET(DT_INST_PARENT(inst)), \ .dbi_config = MIPI_DBI_CONFIG_DT_INST(inst, \ SPI_OP_MODE_MASTER | \ - ((DT_INST_PROP(inst, mipi_mode) == \ + ((DT_INST_STRING_UPPER_TOKEN(inst, mipi_mode) == \ MIPI_DBI_MODE_SPI_4WIRE) ? SPI_WORD_SET(8) : \ SPI_WORD_SET(9)) | \ SPI_HOLD_ON_CS | SPI_LOCK_ON, 0), \ diff --git a/drivers/display/display_st7789v.c b/drivers/display/display_st7789v.c index a98ecd573fc5d88..95fc6b5bda0cee3 100644 --- a/drivers/display/display_st7789v.c +++ b/drivers/display/display_st7789v.c @@ -370,7 +370,7 @@ static const struct display_driver_api st7789v_api = { }; #define ST7789V_WORD_SIZE(inst) \ - ((DT_INST_PROP(inst, mipi_mode) == MIPI_DBI_MODE_SPI_4WIRE) ? \ + ((DT_INST_STRING_UPPER_TOKEN(inst, mipi_mode) == MIPI_DBI_MODE_SPI_4WIRE) ? \ SPI_WORD_SET(8) : SPI_WORD_SET(9)) #define ST7789V_INIT(inst) \ static const struct st7789v_config st7789v_config_ ## inst = { \ diff --git a/drivers/display/display_st7796s.c b/drivers/display/display_st7796s.c index e491fde69961897..f7c31cde347d599 100644 --- a/drivers/display/display_st7796s.c +++ b/drivers/display/display_st7796s.c @@ -364,7 +364,7 @@ static const struct display_driver_api st7796s_api = { SPI_OP_MODE_MASTER | \ SPI_WORD_SET(8), \ 0), \ - .mode = DT_INST_PROP_OR(n, mipi_mode, \ + .mode = DT_INST_STRING_UPPER_TOKEN_OR(n, mipi_mode, \ MIPI_DBI_MODE_SPI_4WIRE), \ }, \ .width = DT_INST_PROP(n, width), \ diff --git a/drivers/display/display_stm32_ltdc.c b/drivers/display/display_stm32_ltdc.c index 3c6a2085def475c..068c9e9eb0c7b99 100644 --- a/drivers/display/display_stm32_ltdc.c +++ b/drivers/display/display_stm32_ltdc.c @@ -249,6 +249,13 @@ static int stm32_ltdc_read(const struct device *dev, const uint16_t x, return 0; } +static void *stm32_ltdc_get_framebuffer(const struct device *dev) +{ + struct display_stm32_ltdc_data *data = dev->data; + + return ((void *)data->front_buf); +} + static int stm32_ltdc_display_blanking_off(const struct device *dev) { const struct display_stm32_ltdc_config *config = dev->config; @@ -462,6 +469,7 @@ static int stm32_ltdc_pm_action(const struct device *dev, static const struct display_driver_api stm32_ltdc_display_api = { .write = stm32_ltdc_write, .read = stm32_ltdc_read, + .get_framebuffer = stm32_ltdc_get_framebuffer, .get_capabilities = stm32_ltdc_get_capabilities, .set_pixel_format = stm32_ltdc_set_pixel_format, .set_orientation = stm32_ltdc_set_orientation, diff --git a/drivers/ethernet/eth_enc28j60.c b/drivers/ethernet/eth_enc28j60.c index d6e2b3691982559..260626d0b722e10 100644 --- a/drivers/ethernet/eth_enc28j60.c +++ b/drivers/ethernet/eth_enc28j60.c @@ -71,7 +71,7 @@ static void eth_enc28j60_set_bank(const struct device *dev, uint16_t reg_addr) if (!spi_transceive_dt(&config->spi, &tx, &rx)) { buf[0] = ENC28J60_SPI_WCR | ENC28J60_REG_ECON1; - buf[1] = (buf[1] & 0xFC) | ((reg_addr >> 8) & 0x0F); + buf[1] = (buf[1] & 0xFC) | ((reg_addr >> 8) & 0x03); spi_write_dt(&config->spi, &tx); } else { diff --git a/drivers/ethernet/eth_enc28j60_priv.h b/drivers/ethernet/eth_enc28j60_priv.h index f47efd601c2304e..2f2eb4ffb5d6c7b 100644 --- a/drivers/ethernet/eth_enc28j60_priv.h +++ b/drivers/ethernet/eth_enc28j60_priv.h @@ -141,7 +141,6 @@ #define ENC28J60_BIT_MICMD_MIIRD (0x01) #define ENC28J60_BIT_MISTAT_BUSY (0x01) #define ENC28J60_BIT_ESTAT_CLKRDY (0x01) -#define ENC28J60_BIT_MACON1_MARXEN (0x01) #define ENC28J60_BIT_MACON1_RXPAUS (0x04) #define ENC28J60_BIT_MACON1_TXPAUS (0x08) #define ENC28J60_BIT_MACON1_MARXEN (0x01) @@ -151,7 +150,6 @@ #define ENC28J60_BIT_ECON1_TXRTS (0x08) #define ENC28J60_BIT_ECON1_RXEN (0x04) #define ENC28J60_BIT_ECON2_PKTDEC (0x40) -#define ENC28J60_BIT_EIR_PKTIF (0x40) #define ENC28J60_BIT_EIE_TXIE (0x08) #define ENC28J60_BIT_EIE_PKTIE (0x40) #define ENC28J60_BIT_EIE_LINKIE (0x10) @@ -166,7 +164,7 @@ #define ENC28J60_BIT_ESTAT_TXABRT (0x02) #define ENC28J60_BIT_ESTAT_LATECOL (0x10) #define ENC28J60_BIT_PHCON1_PDPXMD (0x0100) -#define ENC28J60_BIT_PHCON2_HDLDIS (0x0001) +#define ENC28J60_BIT_PHCON2_HDLDIS (0x0100) #define ENC28J60_BIT_PHSTAT2_LSTAT (0x0400) #define ENC28J60_BIT_PHIE_PGEIE (0x0002) #define ENC28J60_BIT_PHIE_PLNKIE (0x0010) diff --git a/drivers/ethernet/phy/phy_mii.c b/drivers/ethernet/phy/phy_mii.c index 6d51e9f94a2432c..f71e1d68c2ba864 100644 --- a/drivers/ethernet/phy/phy_mii.c +++ b/drivers/ethernet/phy/phy_mii.c @@ -44,7 +44,7 @@ struct phy_mii_dev_data { static int phy_mii_get_link_state(const struct device *dev, struct phy_link_state *state); -static inline int reg_read(const struct device *dev, uint16_t reg_addr, +static inline int phy_mii_reg_read(const struct device *dev, uint16_t reg_addr, uint16_t *value) { const struct phy_mii_dev_config *const cfg = dev->config; @@ -56,7 +56,7 @@ static inline int reg_read(const struct device *dev, uint16_t reg_addr, return mdio_read(cfg->mdio, cfg->phy_addr, reg_addr, value); } -static inline int reg_write(const struct device *dev, uint16_t reg_addr, +static inline int phy_mii_reg_write(const struct device *dev, uint16_t reg_addr, uint16_t value) { const struct phy_mii_dev_config *const cfg = dev->config; @@ -73,12 +73,12 @@ static bool is_gigabit_supported(const struct device *dev) uint16_t bmsr_reg; uint16_t estat_reg; - if (reg_read(dev, MII_BMSR, &bmsr_reg) < 0) { + if (phy_mii_reg_read(dev, MII_BMSR, &bmsr_reg) < 0) { return -EIO; } if (bmsr_reg & MII_BMSR_EXTEND_STATUS) { - if (reg_read(dev, MII_ESTAT, &estat_reg) < 0) { + if (phy_mii_reg_read(dev, MII_ESTAT, &estat_reg) < 0) { return -EIO; } @@ -97,7 +97,7 @@ static int reset(const struct device *dev) uint16_t value; /* Issue a soft reset */ - if (reg_write(dev, MII_BMCR, MII_BMCR_RESET) < 0) { + if (phy_mii_reg_write(dev, MII_BMCR, MII_BMCR_RESET) < 0) { return -EIO; } @@ -112,7 +112,7 @@ static int reset(const struct device *dev) k_sleep(K_MSEC(50)); - if (reg_read(dev, MII_BMCR, &value) < 0) { + if (phy_mii_reg_read(dev, MII_BMCR, &value) < 0) { return -EIO; } } while (value & MII_BMCR_RESET); @@ -124,13 +124,13 @@ static int get_id(const struct device *dev, uint32_t *phy_id) { uint16_t value; - if (reg_read(dev, MII_PHYID1R, &value) < 0) { + if (phy_mii_reg_read(dev, MII_PHYID1R, &value) < 0) { return -EIO; } *phy_id = value << 16; - if (reg_read(dev, MII_PHYID2R, &value) < 0) { + if (phy_mii_reg_read(dev, MII_PHYID2R, &value) < 0) { return -EIO; } @@ -153,7 +153,7 @@ static int update_link_state(const struct device *dev) uint16_t s1kt_reg = 0; uint32_t timeout = CONFIG_PHY_AUTONEG_TIMEOUT_MS / 100; - if (reg_read(dev, MII_BMSR, &bmsr_reg) < 0) { + if (phy_mii_reg_read(dev, MII_BMSR, &bmsr_reg) < 0) { return -EIO; } @@ -168,6 +168,7 @@ static int update_link_state(const struct device *dev) /* If link is down, there is nothing more to be done */ if (data->state.is_up == false) { + LOG_INF("PHY (%d) is down", cfg->phy_addr); return 0; } @@ -178,19 +179,19 @@ static int update_link_state(const struct device *dev) cfg->phy_addr); /* Read PHY default advertising parameters */ - if (reg_read(dev, MII_ANAR, &anar_reg) < 0) { + if (phy_mii_reg_read(dev, MII_ANAR, &anar_reg) < 0) { return -EIO; } /* Configure and start auto-negotiation process */ - if (reg_read(dev, MII_BMCR, &bmcr_reg) < 0) { + if (phy_mii_reg_read(dev, MII_BMCR, &bmcr_reg) < 0) { return -EIO; } bmcr_reg |= MII_BMCR_AUTONEG_ENABLE | MII_BMCR_AUTONEG_RESTART; bmcr_reg &= ~MII_BMCR_ISOLATE; /* Don't isolate the PHY */ - if (reg_write(dev, MII_BMCR, bmcr_reg) < 0) { + if (phy_mii_reg_write(dev, MII_BMCR, bmcr_reg) < 0) { return -EIO; } @@ -204,7 +205,7 @@ static int update_link_state(const struct device *dev) k_sleep(K_MSEC(100)); - if (reg_read(dev, MII_BMSR, &bmsr_reg) < 0) { + if (phy_mii_reg_read(dev, MII_BMSR, &bmsr_reg) < 0) { return -EIO; } } while (!(bmsr_reg & MII_BMSR_AUTONEG_COMPLETE)); @@ -213,15 +214,15 @@ static int update_link_state(const struct device *dev) cfg->phy_addr); /** Read peer device capability */ - if (reg_read(dev, MII_ANLPAR, &anlpar_reg) < 0) { + if (phy_mii_reg_read(dev, MII_ANLPAR, &anlpar_reg) < 0) { return -EIO; } if (data->gigabit_supported) { - if (reg_read(dev, MII_1KTCR, &c1kt_reg) < 0) { + if (phy_mii_reg_read(dev, MII_1KTCR, &c1kt_reg) < 0) { return -EIO; } - if (reg_read(dev, MII_1KSTSR, &s1kt_reg) < 0) { + if (phy_mii_reg_read(dev, MII_1KSTSR, &s1kt_reg) < 0) { return -EIO; } s1kt_reg = (uint16_t)(s1kt_reg >> MII_1KSTSR_OFFSET); @@ -293,13 +294,13 @@ static void monitor_work_handler(struct k_work *work) static int phy_mii_read(const struct device *dev, uint16_t reg_addr, uint32_t *data) { - return reg_read(dev, reg_addr, (uint16_t *)data); + return phy_mii_reg_read(dev, reg_addr, (uint16_t *)data); } static int phy_mii_write(const struct device *dev, uint16_t reg_addr, uint32_t data) { - return reg_write(dev, reg_addr, (uint16_t)data); + return phy_mii_reg_write(dev, reg_addr, (uint16_t)data); } static int phy_mii_cfg_link(const struct device *dev, @@ -310,16 +311,16 @@ static int phy_mii_cfg_link(const struct device *dev, uint16_t bmcr_reg; uint16_t c1kt_reg; - if (reg_read(dev, MII_ANAR, &anar_reg) < 0) { + if (phy_mii_reg_read(dev, MII_ANAR, &anar_reg) < 0) { return -EIO; } - if (reg_read(dev, MII_BMCR, &bmcr_reg) < 0) { + if (phy_mii_reg_read(dev, MII_BMCR, &bmcr_reg) < 0) { return -EIO; } if (data->gigabit_supported) { - if (reg_read(dev, MII_1KTCR, &c1kt_reg) < 0) { + if (phy_mii_reg_read(dev, MII_1KTCR, &c1kt_reg) < 0) { return -EIO; } } @@ -361,18 +362,18 @@ static int phy_mii_cfg_link(const struct device *dev, c1kt_reg &= ~MII_ADVERTISE_1000_HALF; } - if (reg_write(dev, MII_1KTCR, c1kt_reg) < 0) { + if (phy_mii_reg_write(dev, MII_1KTCR, c1kt_reg) < 0) { return -EIO; } } bmcr_reg |= MII_BMCR_AUTONEG_ENABLE; - if (reg_write(dev, MII_ANAR, anar_reg) < 0) { + if (phy_mii_reg_write(dev, MII_ANAR, anar_reg) < 0) { return -EIO; } - if (reg_write(dev, MII_BMCR, bmcr_reg) < 0) { + if (phy_mii_reg_write(dev, MII_BMCR, bmcr_reg) < 0) { return -EIO; } diff --git a/drivers/flash/flash_gecko.c b/drivers/flash/flash_gecko.c index aa3be96960f6c7b..114637800862f39 100644 --- a/drivers/flash/flash_gecko.c +++ b/drivers/flash/flash_gecko.c @@ -191,6 +191,15 @@ flash_gecko_get_parameters(const struct device *dev) return &flash_gecko_parameters; } +static int flash_gecko_get_size(const struct device *dev, uint64_t *size) +{ + ARG_UNUSED(dev); + + *size = (uint64_t)DT_REG_SIZE(SOC_NV_FLASH_NODE); + + return 0; +} + static int flash_gecko_init(const struct device *dev) { struct flash_gecko_data *const dev_data = dev->data; @@ -212,6 +221,7 @@ static const struct flash_driver_api flash_gecko_driver_api = { .write = flash_gecko_write, .erase = flash_gecko_erase, .get_parameters = flash_gecko_get_parameters, + .get_size = flash_gecko_get_size, #ifdef CONFIG_FLASH_PAGE_LAYOUT .page_layout = flash_gecko_page_layout, #endif diff --git a/drivers/flash/flash_handlers.c b/drivers/flash/flash_handlers.c index b560ea8ae4baaea..28355d1d37495cf 100644 --- a/drivers/flash/flash_handlers.c +++ b/drivers/flash/flash_handlers.c @@ -1,5 +1,6 @@ /* * Copyright (c) 2017 Intel Corporation + * Copyright (c) 2024 Nordic Semiconductor ASA * * SPDX-License-Identifier: Apache-2.0 */ @@ -36,6 +37,14 @@ static inline int z_vrfy_flash_erase(const struct device *dev, off_t offset, } #include +static inline int z_vrfy_flash_get_size(const struct device *dev, uint64_t *size) +{ + K_OOPS(K_SYSCALL_OBJ(dev, K_OBJ_DRIVER_FLASH)); + K_OOPS(K_SYSCALL_MEMORY_WRITE(size, sizeof(size))); + return z_impl_flash_get_size((const struct device *)dev, size); +} +#include + static inline size_t z_vrfy_flash_get_write_block_size(const struct device *dev) { K_OOPS(K_SYSCALL_OBJ(dev, K_OBJ_DRIVER_FLASH)); diff --git a/drivers/flash/flash_mcux_flexspi_mx25um51345g.c b/drivers/flash/flash_mcux_flexspi_mx25um51345g.c index b72da49d1540a21..9ec05ba2f003f44 100644 --- a/drivers/flash/flash_mcux_flexspi_mx25um51345g.c +++ b/drivers/flash/flash_mcux_flexspi_mx25um51345g.c @@ -67,6 +67,7 @@ struct flash_flexspi_nor_data { const struct device *controller; flexspi_device_config_t config; flexspi_port_t port; + uint64_t *size; struct flash_pages_layout layout; struct flash_parameters flash_parameters; }; @@ -497,6 +498,15 @@ static const struct flash_parameters *flash_flexspi_nor_get_parameters( return &data->flash_parameters; } +static int flash_flexspi_nor_get_size(const struct device *dev, uint64_t *size) +{ + const struct flash_flexspi_nor_config *config = dev->config; + + *size = config->size; + + return 0; +} + #if defined(CONFIG_FLASH_PAGE_LAYOUT) static void flash_flexspi_nor_pages_layout(const struct device *dev, const struct flash_pages_layout **layout, size_t *layout_size) @@ -552,6 +562,7 @@ static const struct flash_driver_api flash_flexspi_nor_api = { .write = flash_flexspi_nor_write, .read = flash_flexspi_nor_read, .get_parameters = flash_flexspi_nor_get_parameters, + .get_size = flash_flexspi_nor_get_size, #if defined(CONFIG_FLASH_PAGE_LAYOUT) .page_layout = flash_flexspi_nor_pages_layout, #endif @@ -595,6 +606,7 @@ static const struct flash_driver_api flash_flexspi_nor_api = { .controller = DEVICE_DT_GET(DT_INST_BUS(n)), \ .config = FLASH_FLEXSPI_DEVICE_CONFIG(n), \ .port = DT_INST_REG_ADDR(n), \ + .size = DT_INST_PROP(n, size) / 8, \ .layout = { \ .pages_count = DT_INST_PROP(n, size) / 8 \ / SPI_NOR_SECTOR_SIZE, \ diff --git a/drivers/flash/flash_mcux_flexspi_nor.c b/drivers/flash/flash_mcux_flexspi_nor.c index ac6fdac8223f6be..6231a240023e60b 100644 --- a/drivers/flash/flash_mcux_flexspi_nor.c +++ b/drivers/flash/flash_mcux_flexspi_nor.c @@ -75,6 +75,7 @@ struct flash_flexspi_nor_data { flexspi_device_config_t config; flexspi_port_t port; bool legacy_poll; + uint64_t size; struct flash_pages_layout layout; struct flash_parameters flash_parameters; }; @@ -456,6 +457,15 @@ static const struct flash_parameters *flash_flexspi_nor_get_parameters( return &data->flash_parameters; } +static int flash_flexspi_nor_get_size(const struct device *dev, uint64_t *size) +{ + struct flash_flexspi_nor_data *data = dev->data; + + *size = (uint64_t)data->size; + + return 0; +} + #if defined(CONFIG_FLASH_PAGE_LAYOUT) static void flash_flexspi_nor_pages_layout(const struct device *dev, const struct flash_pages_layout **layout, size_t *layout_size) @@ -1259,6 +1269,7 @@ static const struct flash_driver_api flash_flexspi_nor_api = { .write = flash_flexspi_nor_write, .read = flash_flexspi_nor_read, .get_parameters = flash_flexspi_nor_get_parameters, + .get_size = flash_flexspi_nor_get_size, #if defined(CONFIG_FLASH_PAGE_LAYOUT) .page_layout = flash_flexspi_nor_pages_layout, #endif @@ -1309,6 +1320,7 @@ static const struct flash_driver_api flash_flexspi_nor_api = { flash_flexspi_nor_data_##n = { \ .config = FLASH_FLEXSPI_DEVICE_CONFIG(n), \ .port = DT_INST_REG_ADDR(n), \ + .size = DT_INST_PROP(n, size) / 8, \ .layout = { \ .pages_count = DT_INST_PROP(n, size) / 8 \ / SPI_NOR_SECTOR_SIZE, \ diff --git a/drivers/flash/flash_sam0.c b/drivers/flash/flash_sam0.c index eb55c5d36a0ba31..883eeaf17088575 100644 --- a/drivers/flash/flash_sam0.c +++ b/drivers/flash/flash_sam0.c @@ -454,6 +454,13 @@ flash_sam0_get_parameters(const struct device *dev) return &flash_sam0_parameters; } +static int flash_sam0_get_size(const struct device *dev, uint64_t *size) +{ + *size = (uint64_t)CONFIG_FLASH_SIZE; + + return 0; +} + static int flash_sam0_init(const struct device *dev) { #if defined(CONFIG_MULTITHREADING) @@ -485,6 +492,7 @@ static const struct flash_driver_api flash_sam0_api = { .write = flash_sam0_write, .read = flash_sam0_read, .get_parameters = flash_sam0_get_parameters, + .get_size = flash_sam0_get_size, #ifdef CONFIG_FLASH_PAGE_LAYOUT .page_layout = flash_sam0_page_layout, #endif diff --git a/drivers/flash/flash_simulator.c b/drivers/flash/flash_simulator.c index d8ee0ce093506d8..d405de0be1997e1 100644 --- a/drivers/flash/flash_simulator.c +++ b/drivers/flash/flash_simulator.c @@ -1,5 +1,5 @@ /* - * Copyright (c) 2023 Nordic Semiconductor ASA + * Copyright (c) 2023-2024 Nordic Semiconductor ASA * * SPDX-License-Identifier: Apache-2.0 */ @@ -364,6 +364,14 @@ static void flash_sim_page_layout(const struct device *dev, } #endif +static int flash_sim_get_size(const struct device *dev, uint64_t *size) +{ + ARG_UNUSED(dev); + + *size = FLASH_SIMULATOR_FLASH_SIZE; + + return 0; +} static const struct flash_parameters * flash_sim_get_parameters(const struct device *dev) { @@ -377,6 +385,7 @@ static const struct flash_driver_api flash_sim_api = { .write = flash_sim_write, .erase = flash_sim_erase, .get_parameters = flash_sim_get_parameters, + .get_size = flash_sim_get_size, #ifdef CONFIG_FLASH_PAGE_LAYOUT .page_layout = flash_sim_page_layout, #endif diff --git a/drivers/flash/flash_stm32_qspi.c b/drivers/flash/flash_stm32_qspi.c index 3e63cb979c7279d..64d53d051f523a8 100644 --- a/drivers/flash/flash_stm32_qspi.c +++ b/drivers/flash/flash_stm32_qspi.c @@ -755,6 +755,15 @@ flash_stm32_qspi_get_parameters(const struct device *dev) return &flash_stm32_qspi_parameters; } +static int flash_stm32_qspi_get_size(const struct device *dev, uint64_t *size) +{ + const struct flash_stm32_qspi_config *dev_cfg = dev->config; + + *size = (uint64_t)dev_cfg->flash_size; + + return 0; +} + static void flash_stm32_qspi_isr(const struct device *dev) { struct flash_stm32_qspi_data *dev_data = dev->data; @@ -881,6 +890,7 @@ static const struct flash_driver_api flash_stm32_qspi_driver_api = { .write = flash_stm32_qspi_write, .erase = flash_stm32_qspi_erase, .get_parameters = flash_stm32_qspi_get_parameters, + .get_size = flash_stm32_qspi_get_size, #if defined(CONFIG_FLASH_PAGE_LAYOUT) .page_layout = flash_stm32_qspi_pages_layout, #endif diff --git a/drivers/flash/nrf_qspi_nor.c b/drivers/flash/nrf_qspi_nor.c index 73213a1ce301f17..d56eff76ea686fd 100644 --- a/drivers/flash/nrf_qspi_nor.c +++ b/drivers/flash/nrf_qspi_nor.c @@ -1,5 +1,5 @@ /* - * Copyright (c) 2019-2021, Nordic Semiconductor ASA + * Copyright (c) 2019-2024, Nordic Semiconductor ASA * * SPDX-License-Identifier: Apache-2.0 */ @@ -1176,11 +1176,21 @@ qspi_flash_get_parameters(const struct device *dev) return &qspi_flash_parameters; } +int qspi_nor_get_size(const struct device *dev, uint64_t *size) +{ + ARG_UNUSED(dev); + + *size = (uint64_t)(INST_0_BYTES); + + return 0; +} + static const struct flash_driver_api qspi_nor_api = { .read = qspi_nor_read, .write = qspi_nor_write, .erase = qspi_nor_erase, .get_parameters = qspi_flash_get_parameters, + .get_size = qspi_nor_get_size, #if defined(CONFIG_FLASH_PAGE_LAYOUT) .page_layout = qspi_nor_pages_layout, #endif diff --git a/drivers/flash/soc_flash_nrf.c b/drivers/flash/soc_flash_nrf.c index 5ed86b724ff693f..e5e8a55ed37474c 100644 --- a/drivers/flash/soc_flash_nrf.c +++ b/drivers/flash/soc_flash_nrf.c @@ -261,6 +261,15 @@ static int flash_nrf_erase(const struct device *dev, off_t addr, size_t size) return ret; } +static int flash_nrf_get_size(const struct device *dev, uint64_t *size) +{ + ARG_UNUSED(dev); + + *size = (uint64_t)nrfx_nvmc_flash_size_get(); + + return 0; +} + #if defined(CONFIG_FLASH_PAGE_LAYOUT) static struct flash_pages_layout dev_layout; @@ -286,6 +295,7 @@ static const struct flash_driver_api flash_nrf_api = { .write = flash_nrf_write, .erase = flash_nrf_erase, .get_parameters = flash_nrf_get_parameters, + .get_size = flash_nrf_get_size, #if defined(CONFIG_FLASH_PAGE_LAYOUT) .page_layout = flash_nrf_pages_layout, #endif diff --git a/drivers/flash/soc_flash_nrf_mram.c b/drivers/flash/soc_flash_nrf_mram.c index 5d8215f7af30b36..a57b9c582129d1e 100644 --- a/drivers/flash/soc_flash_nrf_mram.c +++ b/drivers/flash/soc_flash_nrf_mram.c @@ -135,6 +135,15 @@ static int nrf_mram_erase(const struct device *dev, off_t offset, size_t size) return 0; } +static int nrf_mram_get_size(const struct device *dev, uint64_t *size) +{ + ARG_UNUSED(dev); + + *size = MRAM_SIZE; + + return 0; +} + static const struct flash_parameters *nrf_mram_get_parameters(const struct device *dev) { ARG_UNUSED(dev); @@ -170,6 +179,7 @@ static const struct flash_driver_api nrf_mram_api = { .read = nrf_mram_read, .write = nrf_mram_write, .erase = nrf_mram_erase, + .get_size = nrf_mram_get_size, .get_parameters = nrf_mram_get_parameters, #if defined(CONFIG_FLASH_PAGE_LAYOUT) .page_layout = nrf_mram_page_layout, diff --git a/drivers/flash/soc_flash_nrf_rram.c b/drivers/flash/soc_flash_nrf_rram.c index 35a6c98862c699a..9bc32255a481de9 100644 --- a/drivers/flash/soc_flash_nrf_rram.c +++ b/drivers/flash/soc_flash_nrf_rram.c @@ -302,6 +302,15 @@ static int nrf_rram_erase(const struct device *dev, off_t addr, size_t len) return nrf_write(addr, NULL, len); } +int nrf_rram_get_size(const struct device *dev, uint64_t *size) +{ + ARG_UNUSED(dev); + + *size = RRAM_SIZE; + + return 0; +} + static const struct flash_parameters *nrf_rram_get_parameters(const struct device *dev) { ARG_UNUSED(dev); @@ -337,6 +346,7 @@ static const struct flash_driver_api nrf_rram_api = { .read = nrf_rram_read, .write = nrf_rram_write, .erase = nrf_rram_erase, + .get_size = nrf_rram_get_size, .get_parameters = nrf_rram_get_parameters, #if defined(CONFIG_FLASH_PAGE_LAYOUT) .page_layout = nrf_rram_page_layout, diff --git a/drivers/flash/spi_flash_at45.c b/drivers/flash/spi_flash_at45.c index ebdf522480e7d8a..3e8006a98055abd 100644 --- a/drivers/flash/spi_flash_at45.c +++ b/drivers/flash/spi_flash_at45.c @@ -1,5 +1,5 @@ /* - * Copyright (c) 2020 Nordic Semiconductor ASA + * Copyright (c) 2020-2024 Nordic Semiconductor ASA * * SPDX-License-Identifier: Apache-2.0 */ @@ -646,11 +646,21 @@ flash_at45_get_parameters(const struct device *dev) return &flash_at45_parameters; } +static int spi_flash_at45_get_size(const struct device *dev, uint64_t *size) +{ + const struct spi_flash_at45_config *cfg = dev->config; + + *size = (uint64_t)cfg->chip_size; + + return 0; +} + static const struct flash_driver_api spi_flash_at45_api = { .read = spi_flash_at45_read, .write = spi_flash_at45_write, .erase = spi_flash_at45_erase, .get_parameters = flash_at45_get_parameters, + .get_size = spi_flash_at45_get_size, #if defined(CONFIG_FLASH_PAGE_LAYOUT) .page_layout = spi_flash_at45_pages_layout, #endif diff --git a/drivers/flash/spi_nor.c b/drivers/flash/spi_nor.c index f064f4179de98c8..3e1b0c169b19b3c 100644 --- a/drivers/flash/spi_nor.c +++ b/drivers/flash/spi_nor.c @@ -1676,11 +1676,19 @@ flash_nor_get_parameters(const struct device *dev) return &flash_nor_parameters; } +static int flash_nor_get_size(const struct device *dev, uint64_t *size) +{ + *size = (uint64_t)dev_flash_size(dev); + + return 0; +} + static const struct flash_driver_api spi_nor_api = { .read = spi_nor_read, .write = spi_nor_write, .erase = spi_nor_erase, .get_parameters = flash_nor_get_parameters, + .get_size = flash_nor_get_size, #if defined(CONFIG_FLASH_PAGE_LAYOUT) .page_layout = spi_nor_pages_layout, #endif diff --git a/drivers/fpga/fpga_ice40.c b/drivers/fpga/fpga_ice40.c index 22eba12e002109d..bc251e5c3b1df1d 100644 --- a/drivers/fpga/fpga_ice40.c +++ b/drivers/fpga/fpga_ice40.c @@ -549,17 +549,13 @@ static int fpga_ice40_init(const struct device *dev) #define FPGA_ICE40_BUS_FREQ(inst) DT_INST_PROP(inst, spi_max_frequency) -#define FPGA_ICE40_CONFIG_DELAY_US(inst) \ - DT_INST_PROP_OR(inst, config_delay_us, FPGA_ICE40_CONFIG_DELAY_US_MIN) +#define FPGA_ICE40_CONFIG_DELAY_US(inst) DT_INST_PROP(inst, config_delay_us) -#define FPGA_ICE40_CRESET_DELAY_US(inst) \ - DT_INST_PROP_OR(inst, creset_delay_us, FPGA_ICE40_CRESET_DELAY_US_MIN) +#define FPGA_ICE40_CRESET_DELAY_US(inst) DT_INST_PROP(inst, creset_delay_us) -#define FPGA_ICE40_LEADING_CLOCKS(inst) \ - DT_INST_PROP_OR(inst, leading_clocks, FPGA_ICE40_LEADING_CLOCKS_MIN) +#define FPGA_ICE40_LEADING_CLOCKS(inst) DT_INST_PROP(inst, leading_clocks) -#define FPGA_ICE40_TRAILING_CLOCKS(inst) \ - DT_INST_PROP_OR(inst, trailing_clocks, FPGA_ICE40_TRAILING_CLOCKS_MIN) +#define FPGA_ICE40_TRAILING_CLOCKS(inst) DT_INST_PROP(inst, trailing_clocks) #define FPGA_ICE40_MHZ_DELAY_COUNT(inst) DT_INST_PROP_OR(inst, mhz_delay_count, 0) diff --git a/drivers/gpio/Kconfig.rpi_pico b/drivers/gpio/Kconfig.rpi_pico index 67680d44069c584..64370be497c078e 100644 --- a/drivers/gpio/Kconfig.rpi_pico +++ b/drivers/gpio/Kconfig.rpi_pico @@ -5,4 +5,5 @@ config GPIO_RPI_PICO default y depends on DT_HAS_RASPBERRYPI_PICO_GPIO_ENABLED select PICOSDK_USE_GPIO + select PINCTRL bool "Raspberry Pi Pico GPIO driver" diff --git a/drivers/gpio/gpio_nrfx.c b/drivers/gpio/gpio_nrfx.c index d9eb9129937bf97..ebf776450c31748 100644 --- a/drivers/gpio/gpio_nrfx.c +++ b/drivers/gpio/gpio_nrfx.c @@ -71,7 +71,7 @@ static int gpio_nrfx_gpd_retain_set(const struct device *port, uint32_t mask, gp int ret; if (flags & GPIO_OUTPUT) { - cfg->port->RETAINSET = mask; + nrf_gpio_port_retain_enable(cfg->port, mask); } ret = nrf_gpd_release(NRF_GPD_FAST_ACTIVE1); @@ -101,7 +101,7 @@ static int gpio_nrfx_gpd_retain_clear(const struct device *port, uint32_t mask) return ret; } - cfg->port->RETAINCLR = mask; + nrf_gpio_port_retain_disable(cfg->port, mask); } #else ARG_UNUSED(port); diff --git a/drivers/i2c/Kconfig.dw b/drivers/i2c/Kconfig.dw index b83324a01f84b4c..750798143779ae8 100644 --- a/drivers/i2c/Kconfig.dw +++ b/drivers/i2c/Kconfig.dw @@ -5,6 +5,7 @@ menuconfig I2C_DW bool "Design Ware I2C support" default y depends on DT_HAS_SNPS_DESIGNWARE_I2C_ENABLED + select PINCTRL if DT_HAS_RASPBERRYPI_PICO_I2C_ENABLED help Enable the Design Ware I2C driver diff --git a/drivers/i2c/Kconfig.tca954x b/drivers/i2c/Kconfig.tca954x index dcf5abcdfcfa9ec..42d96b587e2a7e9 100644 --- a/drivers/i2c/Kconfig.tca954x +++ b/drivers/i2c/Kconfig.tca954x @@ -4,7 +4,8 @@ menuconfig I2C_TCA954X bool "I2C addressable switch" default y - depends on DT_HAS_TI_TCA9546A_ENABLED || DT_HAS_TI_TCA9548A_ENABLED + depends on DT_HAS_TI_TCA9546A_ENABLED || DT_HAS_TI_TCA9548A_ENABLED \ + || DT_HAS_TI_TCA9544A_ENABLED help Enable TCA954x series I2C bus switch diff --git a/drivers/i2c/i2c_tca954x.c b/drivers/i2c/i2c_tca954x.c index 5f2572dac31a0f4..572b8daaf62e012 100644 --- a/drivers/i2c/i2c_tca954x.c +++ b/drivers/i2c/i2c_tca954x.c @@ -28,6 +28,7 @@ struct tca954x_root_data { struct tca954x_channel_config { const struct device *root; uint8_t chan_mask; + bool has_enable; }; static inline struct tca954x_root_data * @@ -143,7 +144,8 @@ static int tca954x_channel_init(const struct device *dev) return -ENODEV; } - if (chan_cfg->chan_mask >= BIT(root_cfg->nchans)) { + if ((chan_cfg->chan_mask >= BIT(root_cfg->nchans) && !chan_cfg->has_enable) || + (chan_cfg->chan_mask > (BIT(2) | (root_cfg->nchans - 1)) && chan_cfg->has_enable)) { LOG_ERR("Wrong DTS address provided for %s", dev->name); return -EINVAL; } @@ -162,11 +164,13 @@ static const struct i2c_driver_api tca954x_api_funcs = { BUILD_ASSERT(CONFIG_I2C_TCA954X_CHANNEL_INIT_PRIO > CONFIG_I2C_TCA954X_ROOT_INIT_PRIO, "I2C multiplexer channels must be initialized after their root"); -#define TCA954x_CHILD_DEFINE(node_id, n) \ +#define TCA954x_CHILD_DEFINE(node_id, n, has_enable_bit) \ static const struct tca954x_channel_config \ tca##n##a_down_config_##node_id = { \ - .chan_mask = BIT(DT_REG_ADDR(node_id)), \ + .chan_mask = has_enable_bit ? BIT(2) | DT_REG_ADDR(node_id) \ + : BIT(DT_REG_ADDR(node_id)), \ .root = DEVICE_DT_GET(DT_PARENT(node_id)), \ + .has_enable = has_enable_bit, \ }; \ DEVICE_DT_DEFINE(node_id, \ tca954x_channel_init, \ @@ -176,7 +180,7 @@ BUILD_ASSERT(CONFIG_I2C_TCA954X_CHANNEL_INIT_PRIO > CONFIG_I2C_TCA954X_ROOT_INIT POST_KERNEL, CONFIG_I2C_TCA954X_CHANNEL_INIT_PRIO, \ &tca954x_api_funcs); -#define TCA954x_ROOT_DEFINE(n, inst, ch) \ +#define TCA954x_ROOT_DEFINE(n, inst, ch, has_enable_bit) \ static const struct tca954x_root_config tca##n##a_cfg_##inst = { \ .i2c = I2C_DT_SPEC_INST_GET(inst), \ .nchans = ch, \ @@ -191,20 +195,29 @@ BUILD_ASSERT(CONFIG_I2C_TCA954X_CHANNEL_INIT_PRIO > CONFIG_I2C_TCA954X_ROOT_INIT &tca##n##a_data_##inst, &tca##n##a_cfg_##inst, \ POST_KERNEL, CONFIG_I2C_TCA954X_ROOT_INIT_PRIO, \ NULL); \ - DT_FOREACH_CHILD_VARGS(DT_INST(inst, ti_tca##n##a), TCA954x_CHILD_DEFINE, n); + DT_FOREACH_CHILD_VARGS(DT_INST(inst, ti_tca##n##a), TCA954x_CHILD_DEFINE, n, \ + has_enable_bit); /* - * TCA9546A: 4 channels + * TCA9544A: 4 channels mux */ -#define TCA9546A_INIT(n) TCA954x_ROOT_DEFINE(9546, n, 4) +#define TCA9544A_INIT(n) TCA954x_ROOT_DEFINE(9544, n, 4, true) +#undef DT_DRV_COMPAT +#define DT_DRV_COMPAT ti_tca9544a +DT_INST_FOREACH_STATUS_OKAY(TCA9544A_INIT) + +/* + * TCA9546A: 4 channels switch + */ +#define TCA9546A_INIT(n) TCA954x_ROOT_DEFINE(9546, n, 4, false) #undef DT_DRV_COMPAT #define DT_DRV_COMPAT ti_tca9546a DT_INST_FOREACH_STATUS_OKAY(TCA9546A_INIT) /* - * TCA9548A: 8 channels + * TCA9548A: 8 channels switch */ -#define TCA9548A_INIT(n) TCA954x_ROOT_DEFINE(9548, n, 8) +#define TCA9548A_INIT(n) TCA954x_ROOT_DEFINE(9548, n, 8, false) #undef DT_DRV_COMPAT #define DT_DRV_COMPAT ti_tca9548a DT_INST_FOREACH_STATUS_OKAY(TCA9548A_INIT) diff --git a/drivers/i2s/CMakeLists.txt b/drivers/i2s/CMakeLists.txt index 90b8d737a11ee13..7857b6e863b5a28 100644 --- a/drivers/i2s/CMakeLists.txt +++ b/drivers/i2s/CMakeLists.txt @@ -13,3 +13,4 @@ zephyr_library_sources_ifdef(CONFIG_I2S_MCUX_FLEXCOMM i2s_mcux_flexcomm.c) zephyr_library_sources_ifdef(CONFIG_I2S_NRFX i2s_nrfx.c) zephyr_library_sources_ifdef(CONFIG_I2S_MCUX_SAI i2s_mcux_sai.c) zephyr_library_sources_ifdef(CONFIG_I2S_ESP32 i2s_esp32.c) +zephyr_library_sources_ifdef(CONFIG_I2S_TEST i2s_test.c) diff --git a/drivers/i2s/Kconfig.test b/drivers/i2s/Kconfig.test new file mode 100644 index 000000000000000..d6140e3f89aacc3 --- /dev/null +++ b/drivers/i2s/Kconfig.test @@ -0,0 +1,6 @@ +# Copyright (c) 2024 TOKITA Hiroshi +# SPDX-License-Identifier: Apache-2.0 + +config I2S_TEST + def_bool DT_HAS_VND_I2S_ENABLED + depends on DT_HAS_VND_I2S_ENABLED diff --git a/drivers/i2s/i2s_test.c b/drivers/i2s/i2s_test.c new file mode 100644 index 000000000000000..9c5688b5b97c35e --- /dev/null +++ b/drivers/i2s/i2s_test.c @@ -0,0 +1,55 @@ +/* + * Copyright (c) 2024 TOKITA Hiroshi + * + * SPDX-License-Identifier: Apache-2.0 + */ + +#define DT_DRV_COMPAT vnd_i2s + +#include +#include + +static int vnd_i2s_configure(const struct device *dev, enum i2s_dir dir, + const struct i2s_config *i2s_cfg) +{ + return -ENOTSUP; +} + +static const struct i2s_config *vnd_i2s_config_get(const struct device *dev, enum i2s_dir dir) +{ + return NULL; +} + +static int vnd_i2s_trigger(const struct device *dev, enum i2s_dir dir, enum i2s_trigger_cmd cmd) +{ + return -ENOTSUP; +} + +static int vnd_i2s_read(const struct device *dev, void **mem_block, size_t *size) +{ + return -ENOTSUP; +} + +static int vnd_i2s_write(const struct device *dev, void *mem_block, size_t size) +{ + return -ENOTSUP; +} + +static const struct i2s_driver_api vnd_i2s_driver_api = { + .configure = vnd_i2s_configure, + .config_get = vnd_i2s_config_get, + .trigger = vnd_i2s_trigger, + .read = vnd_i2s_read, + .write = vnd_i2s_write, +}; + +static int vnd_i2s_init(const struct device *dev) +{ + return 0; +} + +#define VND_I2S_INIT(index) \ + DEVICE_DT_INST_DEFINE(index, &vnd_i2s_init, NULL, NULL, NULL, POST_KERNEL, \ + CONFIG_I2S_INIT_PRIORITY, &vnd_i2s_driver_api); + +DT_INST_FOREACH_STATUS_OKAY(VND_I2S_INIT) diff --git a/drivers/i3c/Kconfig b/drivers/i3c/Kconfig index a30b5ee801b99e1..33ecb653aa9f059 100644 --- a/drivers/i3c/Kconfig +++ b/drivers/i3c/Kconfig @@ -33,6 +33,11 @@ config I3C_USE_GROUP_ADDR Says Y if unsure. +config I3C_TARGET_BUFFER_MODE + bool "I3C target driver for buffer mode" + help + This is an option to enable buffer mode. + menuconfig I3C_USE_IBI bool "Use In-Band Interrupt (IBI)" default y diff --git a/drivers/i3c/Kconfig.npcx b/drivers/i3c/Kconfig.npcx index 0f2101a5fe1b5c1..94000776be13b71 100644 --- a/drivers/i3c/Kconfig.npcx +++ b/drivers/i3c/Kconfig.npcx @@ -31,6 +31,7 @@ config I3C_NPCX config I3C_NPCX_DMA bool "Nuvoton NPCX embedded controller (EC) serial driver DMA support" depends on I3C_NPCX && "$(dt_node_reg_addr_hex,$(DT_I3C_NPCX),1)" != 0 + select I3C_TARGET_BUFFER_MODE default y help Enable support for npcx I3C DMA mode. diff --git a/drivers/i3c/i3c_npcx.c b/drivers/i3c/i3c_npcx.c index ee7835dc4a9e55c..11b4c1efe9e0893 100644 --- a/drivers/i3c/i3c_npcx.c +++ b/drivers/i3c/i3c_npcx.c @@ -15,19 +15,20 @@ #include #include +#include #include #include #include LOG_MODULE_REGISTER(npcx_i3c, CONFIG_I3C_LOG_LEVEL); -/* MCONFIG options */ +/* MCONFIG register options */ #define MCONFIG_CTRENA_OFF 0x0 #define MCONFIG_CTRENA_ON 0x1 #define MCONFIG_CTRENA_CAPABLE 0x2 #define MCONFIG_HKEEP_EXT_SDA_SCL 0x3 -/* MCTRL options */ +/* MCTRL register options */ #define MCTRL_REQUEST_NONE 0 /* None */ #define MCTRL_REQUEST_EMITSTARTADDR 1 /* Emit a START */ #define MCTRL_REQUEST_EMITSTOP 2 /* Emit a STOP */ @@ -54,7 +55,7 @@ enum npcx_i3c_mctrl_type { #define MCTRL_TYPE_HDR_EXIT 0 #define MCTRL_TYPE_TGT_RESTART 2 -/* MSTATUS options */ +/* MSTATUS register options */ #define MSTATUS_STATE_IDLE 0x0 #define MSTATUS_STATE_TGTREQ 0x1 #define MSTATUS_STATE_NORMACT 0x3 /* SDR message mode */ @@ -67,11 +68,11 @@ enum npcx_i3c_mctrl_type { #define MSTATUS_IBITYPE_CR 0x2 #define MSTATUS_IBITYPE_HJ 0x3 -/* IBIRULES */ +/* IBIRULES register options */ #define IBIRULES_ADDR_MSK 0x3F #define IBIRULES_ADDR_SHIFT 0x6 -/* MDMACTRL options */ +/* MDMACTRL register options */ #define MDMA_DMAFB_DISABLE 0x0 #define MDMA_DMAFB_EN_ONE_FRAME 0x1 #define MDMA_DMAFB_EN_MANUAL 0x2 @@ -79,21 +80,22 @@ enum npcx_i3c_mctrl_type { #define MDMA_DMATB_EN_ONE_FRAME 0x1 #define MDMA_DMATB_EN_MANUAL 0x2 -/* CTRL options */ +/* CONFIG register options */ +#define CFG_HDRCMD_RD_FROM_FIFIO 0 + +/* CTRL register options */ #define CTRL_EVENT_NORMAL 0 #define CTRL_EVENT_IBI 1 #define CTRL_EVENT_CNTLR_REQ 2 #define CTRL_EVENT_HJ 3 -/* STATUS options */ +/* STATUS register options */ #define STATUS_EVDET_NONE 0 #define STATUS_EVDET_REQ_NOT_SENT 1 #define STATUS_EVDET_REQ_SENT_NACKED 2 #define STATUS_EVDET_REQ_SENT_ACKED 3 -/******************************************************************************* - * Local Constants Definition - ******************************************************************************/ +/* Local Constants Definition */ #define NPCX_I3C_CHK_TIMEOUT_US 10000 /* Timeout for checking register status */ #define I3C_SCL_PP_FREQ_MAX_MHZ 12500000 #define I3C_SCL_OD_FREQ_MAX_MHZ 4170000 @@ -104,31 +106,56 @@ enum npcx_i3c_mctrl_type { #define PPBAUD_DIV_MAX (BIT(GET_FIELD_SZ(NPCX_I3C_MCONFIG_PPBAUD)) - 1) /* PPBAUD divider max */ +#define I3C_BUS_I2C_BAUD_RATE_FAST_MODE 0x0D +#define I3C_BUS_I2C_BAUD_RATE_FAST_MODE_PLUS 0x03 + #define DAA_TGT_INFO_SZ 0x8 /* 8 bytes = PID(6) + BCR(1) + DCR(1) */ #define BAMATCH_DIV 0x4 /* BAMATCH = APB4_CLK divided by four */ /* Default maximum time we allow for an I3C transfer */ #define I3C_TRANS_TIMEOUT_MS K_MSEC(100) -#define MCLKD_FREQ_45_MHZ MHZ(45) +#define MCLKD_FREQ_MHZ(freq) MHZ(freq) #define I3C_STATUS_CLR_MASK \ (BIT(NPCX_I3C_MSTATUS_MCTRLDONE) | BIT(NPCX_I3C_MSTATUS_COMPLETE) | \ BIT(NPCX_I3C_MSTATUS_IBIWON) | BIT(NPCX_I3C_MSTATUS_NOWCNTLR)) +#define I3C_TGT_INTSET_MASK \ + (BIT(NPCX_I3C_INTSET_START) | BIT(NPCX_I3C_INTSET_MATCHED) | BIT(NPCX_I3C_INTSET_STOP) | \ + BIT(NPCX_I3C_INTSET_DACHG) | BIT(NPCX_I3C_INTSET_CCC) | BIT(NPCX_I3C_INTSET_ERRWARN) | \ + BIT(NPCX_I3C_INTSET_HDRMATCH) | BIT(NPCX_I3C_INTSET_CHANDLED) | \ + BIT(NPCX_I3C_INTSET_EVENT)) + #define HDR_DDR_CMD_AND_CRC_SZ_WORD 0x2 /* 2 words = Command(1 word) + CRC(1 word) */ #define HDR_RD_CMD 0x80 +/* I3C moudle and port parsing from instance_id */ +#define GET_MODULE_ID(inst_id) ((inst_id & 0xf0) >> 4) +#define GET_PORT_ID(inst_id) (inst_id & 0xf) + +/* I3C target PID parsing */ +#define GET_PID_VENDOR_ID(pid) (((uint64_t)pid >> 33) & 0x7fff) /* PID[47:33] */ +#define GET_PID_ID_TYP(pid) (((uint64_t)pid >> 32) & 0x1) /* PID[32] */ +#define GET_PID_PARTNO(pid) (pid & 0xffffffff) /* PID[31:0] */ + +#define I3C_TGT_WR_REQ_WAIT_US 10 /* I3C target write request MDMA completion after stop */ + /* Supported I3C MCLKD frequency */ enum npcx_i3c_speed { + NPCX_I3C_BUS_SPEED_40MHZ, NPCX_I3C_BUS_SPEED_45MHZ, + NPCX_I3C_BUS_SPEED_48MHZ, + NPCX_I3C_BUS_SPEED_50MHZ, }; /* Operation type */ enum npcx_i3c_oper_state { - NPCX_I3C_IDLE, - NPCX_I3C_WR, - NPCX_I3C_RD, + NPCX_I3C_OP_STATE_IDLE, + NPCX_I3C_OP_STATE_WR, + NPCX_I3C_OP_STATE_RD, + NPCX_I3C_OP_STATE_IBI, + NPCX_I3C_OP_STATE_MAX, }; /* I3C timing configuration for each i3c speed */ @@ -139,10 +166,13 @@ struct npcx_i3c_timing_cfg { uint8_t odbaud; /* Open-Drain low period */ }; -/* Recommended I3C timing values are based on MCLKD 45 MHz */ +/* Recommended I3C timing values are based on different MCLKD frequency */ static const struct npcx_i3c_timing_cfg npcx_def_speed_cfg[] = { /* PP = 12.5 mhz, OD = 4.17 Mhz */ + [NPCX_I3C_BUS_SPEED_40MHZ] = {.ppbaud = 1, .pplow = 0, .odhpp = 1, .odbaud = 3}, [NPCX_I3C_BUS_SPEED_45MHZ] = {.ppbaud = 1, .pplow = 0, .odhpp = 1, .odbaud = 4}, + [NPCX_I3C_BUS_SPEED_48MHZ] = {.ppbaud = 1, .pplow = 0, .odhpp = 1, .odbaud = 4}, + [NPCX_I3C_BUS_SPEED_50MHZ] = {.ppbaud = 1, .pplow = 0, .odhpp = 1, .odbaud = 4}, }; struct npcx_i3c_config { @@ -170,6 +200,9 @@ struct npcx_i3c_config { /* Interrupt configuration function. */ void (*irq_config_func)(const struct device *dev); + uint8_t instance_id; /* bit[8:4] module id, bit[3:0] port id */ + + /* I3C clock frequency configuration */ struct { uint32_t i3c_pp_scl_hz; /* I3C push pull clock frequency in Hz. */ uint32_t i3c_od_scl_hz; /* I3C open drain clock frequency in Hz. */ @@ -182,11 +215,24 @@ struct npcx_i3c_config { }; struct npcx_i3c_data { - struct i3c_driver_data common; /* Common i3c driver data */ - struct k_mutex lock_mutex; /* Mutex of i3c controller */ - struct k_sem sync_sem; /* Semaphore used for synchronization */ - struct k_sem ibi_lock_sem; /* Semaphore used for ibi */ - enum npcx_i3c_oper_state oper_state; /* controller operation state */ + /* Controller data */ + struct i3c_driver_data common; /* Common i3c driver data */ + struct k_mutex lock_mutex; /* Mutex of i3c controller */ + struct k_sem sync_sem; /* Semaphore used for synchronization */ + struct k_sem ibi_lock_sem; /* Semaphore used for ibi */ + + /* Target data */ + struct i3c_target_config *target_config; + /* Configuration parameters for I3C hardware to act as target device */ + struct i3c_config_target config_target; + struct k_sem target_lock_sem; /* Semaphore used for i3c target */ + struct k_sem target_event_lock_sem; /* Semaphore used for i3c target ibi_raise() */ + + enum npcx_i3c_oper_state oper_state; /* Operation state */ + +#ifdef CONFIG_I3C_NPCX_DMA + uint8_t mdma_rx_buf[4096]; +#endif /* End of CONFIG_I3C_NPCX_DMA */ #ifdef CONFIG_I3C_USE_IBI struct { @@ -252,6 +298,17 @@ static void set_oper_state(const struct device *dev, enum npcx_i3c_oper_state st data->oper_state = state; } +static uint8_t get_bus_available_match_val(uint32_t apb4_freq) +{ + uint8_t bamatch; + + bamatch = DIV_ROUND_UP(apb4_freq, MHZ(1)); + /* The clock of this counter is APB4_CLK divided by four */ + bamatch = DIV_ROUND_UP(bamatch, BAMATCH_DIV); + + return bamatch; +} + /* * brief: Wait for status bit done and clear the status * @@ -289,6 +346,29 @@ static inline void npcx_i3c_interrupt_enable(struct i3c_reg *inst, uint32_t mask inst->MINTSET = mask; } +static void npcx_i3c_enable_target_interrupt(const struct device *dev, bool enable) +{ + const struct npcx_i3c_config *config = dev->config; + struct i3c_reg *inst = config->base; + + /* Disable the target interrupt events */ + inst->INTCLR = inst->INTSET; + + /* Clear the target interrupt status */ + inst->STATUS = inst->STATUS; + + /* Enable the target interrupt events */ + if (enable) { + inst->INTSET = I3C_TGT_INTSET_MASK; + inst->MINTSET |= BIT(NPCX_I3C_MINTSET_NOWCNTLR); /* I3C target is now controller */ + +#ifndef CONFIG_I3C_NPCX_DMA + /* Receive buffer pending (FIFO mode) */ + inst->INTSET |= BIT(NPCX_I3C_INTSET_RXPEND); +#endif + } +} + static bool npcx_i3c_has_error(struct i3c_reg *inst) { if (IS_BIT_SET(inst->MSTATUS, NPCX_I3C_MSTATUS_ERRWARN)) { @@ -509,7 +589,7 @@ static inline int npcx_i3c_xfer_stop(struct i3c_reg *inst) case MSTATUS_STATE_NORMACT: /* SDR */ ret = npcx_i3c_request_emit_stop(inst); break; - case MSTATUS_STATE_MSGDDR: /* HDR-DDR */ + case MSTATUS_STATE_MSGDDR: /* HDR-DDR */ ret = npcx_i3c_request_hdr_exit(inst); break; default: @@ -598,6 +678,8 @@ static int npcx_i3c_recover_bus(const struct device *dev) /* Exhaust all target initiated IBI */ while (IS_BIT_SET(inst->MSTATUS, NPCX_I3C_MSTATUS_TGTSTART)) { + inst->MSTATUS = BIT(NPCX_I3C_MSTATUS_TGTSTART); /* W1C */ + /* Tell the controller to perform auto IBI. */ npcx_i3c_request_auto_ibi(inst); @@ -747,14 +829,14 @@ static int npcx_i3c_xfer_read_fifo(struct i3c_reg *inst, uint8_t *buf, uint8_t r * return Number of bytes read, or negative if error. * */ -static int npcx_i3c_xfer_write_fifo_dma(const struct device *dev, uint8_t *buf, uint8_t buf_sz) +static int npcx_i3c_xfer_write_fifo_dma(const struct device *dev, uint8_t *buf, uint32_t buf_sz) { const struct npcx_i3c_config *config = dev->config; struct i3c_reg *i3c_inst = config->base; struct mdma_reg *mdma_inst = config->mdma_base; int ret; - set_oper_state(dev, NPCX_I3C_WR); + set_oper_state(dev, NPCX_I3C_OP_STATE_WR); /* Enable I3C MDMA write for one frame */ SET_FIELD(i3c_inst->MDMACTRL, NPCX_I3C_MDMACTRL_DMATB, MDMA_DMATB_EN_ONE_FRAME); @@ -786,7 +868,7 @@ static int npcx_i3c_xfer_write_fifo_dma(const struct device *dev, uint8_t *buf, out_wr_fifo_dma: i3c_inst->MINTCLR |= BIT(NPCX_I3C_MINTCLR_COMPLETE); /* Disable I3C complete interrupt */ npcx_i3c_fifo_flush(i3c_inst); - set_oper_state(dev, NPCX_I3C_IDLE); + set_oper_state(dev, NPCX_I3C_OP_STATE_IDLE); return ret; } @@ -805,14 +887,14 @@ static int npcx_i3c_xfer_write_fifo_dma(const struct device *dev, uint8_t *buf, * return Number of bytes read, or negative if error. * */ -static int npcx_i3c_xfer_read_fifo_dma(const struct device *dev, uint8_t *buf, uint8_t buf_sz) +static int npcx_i3c_xfer_read_fifo_dma(const struct device *dev, uint8_t *buf, uint32_t buf_sz) { const struct npcx_i3c_config *config = dev->config; struct i3c_reg *i3c_inst = config->base; struct mdma_reg *mdma_inst = config->mdma_base; int ret; - set_oper_state(dev, NPCX_I3C_RD); + set_oper_state(dev, NPCX_I3C_OP_STATE_RD); /* Enable DMA until DMA is disabled by setting DMAFB to 00 */ SET_FIELD(i3c_inst->MDMACTRL, NPCX_I3C_MDMACTRL_DMAFB, MDMA_DMAFB_EN_MANUAL); @@ -836,7 +918,7 @@ static int npcx_i3c_xfer_read_fifo_dma(const struct device *dev, uint8_t *buf, u /* Disable I3C MDMA read */ SET_FIELD(i3c_inst->MDMACTRL, NPCX_I3C_MDMACTRL_DMAFB, MDMA_DMAFB_DISABLE); npcx_i3c_fifo_flush(i3c_inst); - set_oper_state(dev, NPCX_I3C_IDLE); + set_oper_state(dev, NPCX_I3C_OP_STATE_IDLE); return ret; } @@ -885,7 +967,7 @@ static int npcx_i3c_do_one_xfer_dma(const struct device *dev, uint8_t addr, if (is_hdr_ddr) { if (is_read) { /* The unit of rd_len is "word" in DDR mode */ - rd_len /= sizeof(uint16_t); /* byte to word */ + rd_len /= sizeof(uint16_t); /* Byte to word */ rd_len += HDR_DDR_CMD_AND_CRC_SZ_WORD; hdr_cmd |= HDR_RD_CMD; } else { @@ -1039,7 +1121,8 @@ static int npcx_i3c_transfer(const struct device *dev, struct i3c_device_desc *t struct i3c_reg *inst = config->base; struct npcx_i3c_data *data = dev->data; uint32_t intmask; - int xfered_len, ret = 0; + int xfered_len = 0; + int ret = 0; bool send_broadcast = true; bool is_xfer_done = true; enum npcx_i3c_mctrl_type op_type; @@ -1081,8 +1164,10 @@ static int npcx_i3c_transfer(const struct device *dev, struct i3c_device_desc *t * Emit start if this is the first message or that * the RESTART flag is set in message. */ +#ifdef CONFIG_I3C_NPCX_DMA bool emit_start = (i == 0) || ((msgs[i].flags & I3C_MSG_RESTART) == I3C_MSG_RESTART); +#endif bool emit_stop = (msgs[i].flags & I3C_MSG_STOP) == I3C_MSG_STOP; @@ -1151,7 +1236,8 @@ static int npcx_i3c_transfer(const struct device *dev, struct i3c_device_desc *t /* Check HDR-DDR moves data by words */ if ((msgs[i].len % 2) != 0x0) { LOG_ERR("HDR-DDR data length should be number of words , xfer " - "len=%d", msgs[i].num_xfer); + "len=%d", + msgs[i].num_xfer); ret = -EINVAL; break; } @@ -1730,7 +1816,8 @@ static int npcx_i3c_ibi_enable(const struct device *dev, struct i3c_device_desc (msb != data->ibi.msb)) { ret = -EINVAL; LOG_ERR("%s: New IBI does not have same mandatory byte or msb" - " as previous IBI", __func__); + " as previous IBI", + __func__); goto out_ibi_enable; } @@ -1835,57 +1922,361 @@ static int npcx_i3c_ibi_disable(const struct device *dev, struct i3c_device_desc } #endif /* CONFIG_I3C_USE_IBI */ -static void npcx_i3c_isr(const struct device *dev) +static int npcx_i3c_target_ibi_raise(const struct device *dev, struct i3c_ibi *request) { const struct npcx_i3c_config *config = dev->config; struct i3c_reg *inst = config->base; + struct npcx_i3c_data *data = dev->data; + int index; + + /* the request or the payload were not specific */ + if ((request == NULL) || ((request->payload_len) && (request->payload == NULL))) { + return -EINVAL; + } + + /* the I3C was not in target mode or the bus is in HDR mode now */ + if (!IS_BIT_SET(inst->CONFIG, NPCX_I3C_CONFIG_TGTENA) || + IS_BIT_SET(inst->STATUS, NPCX_I3C_STATUS_STHDR)) { + return -EINVAL; + } + + switch (request->ibi_type) { + case I3C_IBI_TARGET_INTR: + if (IS_BIT_SET(inst->STATUS, NPCX_I3C_STATUS_IBIDIS)) { + return -ENOTSUP; + } + + if (request->payload_len == 0) { + LOG_ERR("%s: IBI invalid payload_len, len: %#x", __func__, + request->payload_len); + return -EINVAL; + } + + k_sem_take(&data->target_event_lock_sem, K_FOREVER); + set_oper_state(dev, NPCX_I3C_OP_STATE_IBI); + + /* Mandatory data byte */ + SET_FIELD(inst->CTRL, NPCX_I3C_CTRL_IBIDATA, request->payload[0]); + + /* Extended data */ + if (request->payload_len > 1) { + if (request->payload_len <= 32) { + for (index = 1; index < (request->payload_len - 1); index++) { + inst->WDATAB = request->payload[index]; + } + + inst->WDATABE = request->payload[index]; + } else { + /* transfer data from MDMA */ + } + + SET_FIELD(inst->IBIEXT1, NPCX_I3C_IBIEXT1_CNT, 0); + inst->CTRL |= BIT(NPCX_I3C_CTRL_EXTDATA); + } + + SET_FIELD(inst->CTRL, NPCX_I3C_CTRL_EVENT, CTRL_EVENT_IBI); + break; + + case I3C_IBI_CONTROLLER_ROLE_REQUEST: + if (IS_BIT_SET(inst->STATUS, NPCX_I3C_STATUS_MRDIS)) { + return -ENOTSUP; + } + + /* The bus controller request was generate only a target with controller mode + * capabilities mode + */ + if (GET_FIELD(inst->MCONFIG, NPCX_I3C_MCONFIG_CTRENA) != MCONFIG_CTRENA_CAPABLE) { + return -ENOTSUP; + } + + k_sem_take(&data->target_event_lock_sem, K_FOREVER); + set_oper_state(dev, NPCX_I3C_OP_STATE_IBI); + + SET_FIELD(inst->CTRL, NPCX_I3C_CTRL_EVENT, CTRL_EVENT_CNTLR_REQ); + break; + + case I3C_IBI_HOTJOIN: + if (IS_BIT_SET(inst->STATUS, NPCX_I3C_STATUS_HJDIS)) { + return -ENOTSUP; + } + + k_sem_take(&data->target_event_lock_sem, K_FOREVER); + set_oper_state(dev, NPCX_I3C_OP_STATE_IBI); + + inst->CONFIG &= ~BIT(NPCX_I3C_CONFIG_TGTENA); + SET_FIELD(inst->CTRL, NPCX_I3C_CTRL_EVENT, CTRL_EVENT_HJ); + inst->CONFIG |= BIT(NPCX_I3C_CONFIG_TGTENA); + break; + + default: + return -EINVAL; + } + + return 0; +} #ifdef CONFIG_I3C_NPCX_DMA +static uint16_t npcx_i3c_target_get_mdmafb_count(const struct device *dev) +{ + const struct npcx_i3c_config *config = dev->config; struct mdma_reg *mdma_inst = config->mdma_base; - if (IS_BIT_SET(inst->MSTATUS, NPCX_I3C_MSTATUS_COMPLETE)) { - inst->MSTATUS = BIT(NPCX_I3C_MSTATUS_COMPLETE); /* W1C */ + if (mdma_inst->MDMA_CTCNT0 < mdma_inst->MDMA_TCNT0) { + return (mdma_inst->MDMA_TCNT0 - mdma_inst->MDMA_CTCNT0); + } else { + return 0; + } +} - /* MDMA write */ - if (get_oper_state(dev) == NPCX_I3C_WR) { - i3c_ctrl_notify(dev); - return; - } +static uint16_t npcx_i3c_target_get_mdmatb_count(const struct device *dev) +{ + const struct npcx_i3c_config *config = dev->config; + struct mdma_reg *mdma_inst = config->mdma_base; + + if (mdma_inst->MDMA_CTCNT1 < mdma_inst->MDMA_TCNT1) { + return (mdma_inst->MDMA_TCNT1 - mdma_inst->MDMA_CTCNT1); + } else { + return 0; } +} - if (IS_BIT_SET(mdma_inst->MDMA_CTL0, NPCX_MDMA_CTL_TC)) { - mdma_inst->MDMA_CTL0 &= ~BIT(NPCX_MDMA_CTL_TC); /* W0C */ +static void npcx_i3c_target_disable_mdmafb(const struct device *dev) +{ + const struct npcx_i3c_config *config = dev->config; + struct i3c_reg *i3c_inst = config->base; + struct mdma_reg *mdma_inst = config->mdma_base; - /* MDMA read */ - if (get_oper_state(dev) == NPCX_I3C_RD) { - i3c_ctrl_notify(dev); - return; - } + mdma_inst->MDMA_CTL0 &= ~BIT(NPCX_MDMA_CTL_MDMAEN); + mdma_inst->MDMA_CTL0 &= ~BIT(NPCX_MDMA_CTL_TC); /* W0C */ + mdma_inst->MDMA_CTL0 &= ~BIT(NPCX_MDMA_CTL_SIEN); + SET_FIELD(i3c_inst->DMACTRL, NPCX_I3C_DMACTRL_DMAFB, MDMA_DMAFB_DISABLE); + + /* Ignore DA and detect all START and STOP */ + i3c_inst->CONFIG &= ~BIT(NPCX_I3C_CONFIG_MATCHSS); + /* Flush the tx and rx FIFO */ + i3c_inst->DATACTRL |= BIT(NPCX_I3C_DATACTRL_FLUSHTB) | BIT(NPCX_I3C_DATACTRL_FLUSHFB); +} + +static void npcx_i3c_target_enable_mdmafb(const struct device *dev, uint8_t *buf, uint16_t len) +{ + const struct npcx_i3c_config *config = dev->config; + struct i3c_reg *i3c_inst = config->base; + struct mdma_reg *mdma_inst = config->mdma_base; + + /* Check MDMA disable */ + if (IS_BIT_SET(mdma_inst->MDMA_CTL0, NPCX_MDMA_CTL_MDMAEN) != 0) { + mdma_inst->MDMA_CTL0 &= ~BIT(NPCX_MDMA_CTL_MDMAEN); + LOG_DBG("MDMAFB_EN=1 before enable"); } -#endif /* CONFIG_I3C_NPCX_DMA */ -#ifdef CONFIG_I3C_USE_IBI - int ret; + /* Detect a START and STOP only if the transaction + * address matches the target address (STATUS.MATCHED=1). + */ + i3c_inst->CONFIG |= BIT(NPCX_I3C_CONFIG_MATCHSS); + /* Enable manual DMA control */ + SET_FIELD(i3c_inst->DMACTRL, NPCX_I3C_DMACTRL_DMAFB, MDMA_DMAFB_EN_MANUAL); - /* Target start detected */ - if (IS_BIT_SET(inst->MSTATUS, NPCX_I3C_MSTATUS_TGTSTART)) { - LOG_DBG("ISR TGTSTART !"); + /* Read Operation (MDMA CH_0) */ + mdma_inst->MDMA_TCNT0 = len; /* Set MDMA transfer count */ + mdma_inst->MDMA_DSTB0 = (uint32_t)buf; /* Set destination address */ + mdma_inst->MDMA_CTL0 &= ~BIT(NPCX_MDMA_CTL_TC); /* W0C */ + mdma_inst->MDMA_CTL0 |= BIT(NPCX_MDMA_CTL_SIEN); /* Enable stop interrupt */ + mdma_inst->MDMA_CTL0 |= BIT(NPCX_MDMA_CTL_MDMAEN); /* Start DMA transfer */ +} - /* Disable further target initiated IBI interrupt */ - inst->MINTCLR = BIT(NPCX_I3C_MINTCLR_TGTSTART); - /* Clear TGTSTART interrupt */ - inst->MSTATUS = BIT(NPCX_I3C_MSTATUS_TGTSTART); +static void npcx_i3c_target_disable_mdmatb(const struct device *dev) +{ + const struct npcx_i3c_config *config = dev->config; + struct i3c_reg *i3c_inst = config->base; + struct mdma_reg *mdma_inst = config->mdma_base; - /* Handle IBI in workqueue */ - ret = i3c_ibi_work_enqueue_cb(dev, npcx_i3c_ibi_work); - if (ret < 0) { - LOG_ERR("Enqueuing ibi work fail, ret %d", ret); - inst->MINTSET = BIT(NPCX_I3C_MINTSET_TGTSTART); + mdma_inst->MDMA_CTL1 &= ~BIT(NPCX_MDMA_CTL_MDMAEN); + mdma_inst->MDMA_CTL1 &= ~BIT(NPCX_MDMA_CTL_TC); /* W0C */ + mdma_inst->MDMA_CTL1 &= ~BIT(NPCX_MDMA_CTL_SIEN); + SET_FIELD(i3c_inst->DMACTRL, NPCX_I3C_DMACTRL_DMATB, MDMA_DMATB_DISABLE); + + /* Ignore DA and detect all START and STOP */ + i3c_inst->CONFIG &= ~BIT(NPCX_I3C_CONFIG_MATCHSS); + + /* Flush the tx and rx FIFO */ + i3c_inst->DATACTRL |= BIT(NPCX_I3C_DATACTRL_FLUSHTB) | BIT(NPCX_I3C_DATACTRL_FLUSHFB); +} + +static void npcx_i3c_target_enable_mdmatb(const struct device *dev, uint8_t *buf, uint16_t len) +{ + const struct npcx_i3c_config *config = dev->config; + struct i3c_reg *i3c_inst = config->base; + struct mdma_reg *mdma_inst = config->mdma_base; + + /* Check MDMA disable */ + if (IS_BIT_SET(mdma_inst->MDMA_CTL1, NPCX_MDMA_CTL_MDMAEN) != 0) { + mdma_inst->MDMA_CTL1 &= ~BIT(NPCX_MDMA_CTL_MDMAEN); + LOG_DBG("MDMATB_EN=1 before enable"); + } + + /* Detect a START and STOP only if the transaction address matches the target address */ + i3c_inst->CONFIG |= BIT(NPCX_I3C_CONFIG_MATCHSS); + + /* Enable DMA only for one frame. + * MATCHSS must be set to 1 before selecting '0x1' for DMATB field + * + * In SDR DMATB is automatically cleared if MATCHED bit is set to 1 and either STOP bit + * or START bit is set to 1. + * + * In HDR-DDR mode, DMATB is not automatically cleared. + */ + SET_FIELD(i3c_inst->DMACTRL, NPCX_I3C_DMACTRL_DMATB, MDMA_DMAFB_EN_ONE_FRAME); + + /* Write Operation (MDMA CH_1) */ + mdma_inst->MDMA_TCNT1 = len; /* Set MDMA transfer count */ + mdma_inst->MDMA_SRCB1 = (uint32_t)buf; /* Set source address */ + mdma_inst->MDMA_CTL1 &= ~BIT(NPCX_MDMA_CTL_TC); /* W0C */ + mdma_inst->MDMA_CTL1 |= BIT(NPCX_MDMA_CTL_MDMAEN); /* Start DMA transfer */ +} + +static void npcx_i3c_target_rx_read(const struct device *dev) +{ + struct npcx_i3c_data *data = dev->data; + struct i3c_config_target *config_tgt = &data->config_target; + + /* Enable the DMA from bus */ + npcx_i3c_target_enable_mdmafb(dev, data->mdma_rx_buf, config_tgt->max_read_len); +} + +/* brief: Handle the end of transfer (read request or write request). + * The ending signal might be either STOP or Sr. + * return: -EINVAL: + * 1. operation not read or write request. + * 2. start or stop flag is not set. + * -EBUSY: in write request, wait for mdma done. + * 0: success + */ +static int npcx_i3c_target_xfer_end_handle(const struct device *dev) +{ + struct npcx_i3c_data *data = dev->data; + const struct npcx_i3c_config *config = dev->config; + struct i3c_reg *inst = config->base; + struct mdma_reg *mdma_inst = config->mdma_base; + const struct i3c_target_callbacks *target_cb = data->target_config->callbacks; + bool is_i3c_start = IS_BIT_SET(inst->INTMASKED, NPCX_I3C_INTMASKED_START); + bool is_i3c_stop = IS_BIT_SET(inst->INTMASKED, NPCX_I3C_INTMASKED_STOP); + enum npcx_i3c_oper_state op_state = get_oper_state(dev); + uint32_t cur_xfer_cnt; + uint32_t timer = 0; + int ret = 0; + + if ((op_state != NPCX_I3C_OP_STATE_WR) && (op_state != NPCX_I3C_OP_STATE_RD)) { + LOG_ERR("%s: op_staste error :%d", __func__, op_state); + return -EINVAL; + } + + if ((is_i3c_start | is_i3c_stop) == 0) { + LOG_ERR("%s: not the end of xfer, is_start: %d, is_stop:%d", __func__, is_i3c_start, + is_i3c_stop); + return -EINVAL; + } + + /* Read request */ + if (get_oper_state(dev) == NPCX_I3C_OP_STATE_RD) { + npcx_i3c_target_disable_mdmatb(dev); + goto out_tgt_xfer_end_hdl; + } + + /* Write request */ + /* Check rx fifo count is 0 */ + if (WAIT_FOR((GET_FIELD(inst->DATACTRL, NPCX_I3C_DATACTRL_RXCOUNT) == 0), + I3C_TGT_WR_REQ_WAIT_US, NULL) == false) { + LOG_ERR("%s: target wr_req rxcnt timeout %d", __func__, + GET_FIELD(inst->DATACTRL, NPCX_I3C_DATACTRL_RXCOUNT)); + ret = -EIO; + npcx_i3c_target_disable_mdmafb(dev); + goto out_tgt_xfer_end_hdl; + } + + /* Check mdma rx transfer count stability */ + cur_xfer_cnt = mdma_inst->MDMA_CTCNT0; + while (timer < I3C_TGT_WR_REQ_WAIT_US) { + /* After the stop or Sr, the rx fifo is empty, and the last byte has been + * transferred. + */ + if (cur_xfer_cnt != mdma_inst->MDMA_CTCNT0) { + break; } + + /* Keep polling if the transferred count does not change */ + k_busy_wait(1); + timer++; + cur_xfer_cnt = mdma_inst->MDMA_CTCNT0; } -#endif /* CONFIG_I3C_USE_IBI */ + npcx_i3c_target_disable_mdmafb(dev); /* Disable mdma and check the final result */ + + if (cur_xfer_cnt == mdma_inst->MDMA_CTCNT0) { +#ifdef CONFIG_I3C_TARGET_BUFFER_MODE + if (target_cb && target_cb->buf_write_received_cb) { + target_cb->buf_write_received_cb(data->target_config, data->mdma_rx_buf, + npcx_i3c_target_get_mdmafb_count(dev)); + } +#endif + } else { + LOG_ERR("(%s) MDMA rx abnormal, force mdma stop, xfer cnt=%#x", + is_i3c_start ? "Sr" : "STOP", cur_xfer_cnt); + ret = -EBUSY; + } + +out_tgt_xfer_end_hdl: + /* Clear DA matched status and re-enable interrupt */ + inst->STATUS = BIT(NPCX_I3C_STATUS_MATCHED); + inst->INTSET = BIT(NPCX_I3C_INTSET_MATCHED); + + if (is_i3c_start) { + set_oper_state(dev, NPCX_I3C_OP_STATE_IDLE); + } + + return ret; +} +#endif /* End of CONFIG_I3C_NPCX_DMA */ + +static int npcx_i3c_target_tx_write(const struct device *dev, uint8_t *buf, uint16_t len, + uint8_t hdr_mode) +{ + if ((buf == NULL) || (len == 0)) { + LOG_ERR("%s: Data buffer configuration failed", __func__); + return -EINVAL; + } + + if (hdr_mode != 0) { + LOG_ERR("%s: HDR not supported", __func__); + return -ENOSYS; + } + +#ifdef CONFIG_I3C_NPCX_DMA + npcx_i3c_target_enable_mdmatb(dev, buf, len); + + return npcx_i3c_target_get_mdmatb_count(dev); /* Return total bytes written */ +#else + LOG_ERR("%s: Support dma mode only", __func__); + return -ENOSYS; +#endif +} + +static int npcx_i3c_target_register(const struct device *dev, struct i3c_target_config *cfg) +{ + struct npcx_i3c_data *data = dev->data; + + data->target_config = cfg; + + return 0; +} + +static int npcx_i3c_target_unregister(const struct device *dev, struct i3c_target_config *cfg) +{ + struct npcx_i3c_data *data = dev->data; + + data->target_config = NULL; + + return 0; } static int npcx_i3c_get_scl_config(struct npcx_i3c_timing_cfg *cfg, uint32_t i3c_src_clk, @@ -1988,9 +2379,18 @@ static int npcx_i3c_freq_init(const struct device *dev) /* MCLKD = MCLK / I3C_DIV(1 or 2) * MCLKD must between 40 mhz to 50 mhz. */ - if (mclkd == MCLKD_FREQ_45_MHZ) { + if (mclkd == MCLKD_FREQ_MHZ(40)) { + /* Set default I3C_SCL configuration */ + timing_cfg = npcx_def_speed_cfg[NPCX_I3C_BUS_SPEED_40MHZ]; + } else if (mclkd == MCLKD_FREQ_MHZ(45)) { /* Set default I3C_SCL configuration */ timing_cfg = npcx_def_speed_cfg[NPCX_I3C_BUS_SPEED_45MHZ]; + } else if (mclkd == MCLKD_FREQ_MHZ(48)) { + /* Set default I3C_SCL configuration */ + timing_cfg = npcx_def_speed_cfg[NPCX_I3C_BUS_SPEED_48MHZ]; + } else if (mclkd == MCLKD_FREQ_MHZ(50)) { + /* Set default I3C_SCL configuration */ + timing_cfg = npcx_def_speed_cfg[NPCX_I3C_BUS_SPEED_50MHZ]; } else { LOG_ERR("Unsupported MCLKD freq for %s.", dev->name); return -EINVAL; @@ -2011,26 +2411,29 @@ static int npcx_i3c_freq_init(const struct device *dev) } else { inst->MCONFIG &= ~BIT(NPCX_I3C_MCONFIG_ODHPP); } + SET_FIELD(inst->MCONFIG, NPCX_I3C_MCONFIG_I2CBAUD, I3C_BUS_I2C_BAUD_RATE_FAST_MODE); LOG_DBG("ppbaud: %d", GET_FIELD(inst->MCONFIG, NPCX_I3C_MCONFIG_PPBAUD)); LOG_DBG("odbaud: %d", GET_FIELD(inst->MCONFIG, NPCX_I3C_MCONFIG_ODBAUD)); LOG_DBG("pplow: %d", GET_FIELD(inst->MCONFIG, NPCX_I3C_MCONFIG_PPLOW)); LOG_DBG("odhpp: %d", IS_BIT_SET(inst->MCONFIG, NPCX_I3C_MCONFIG_ODHPP)); + LOG_DBG("i2cbaud: %d", GET_FIELD(inst->MCONFIG, NPCX_I3C_MCONFIG_I2CBAUD)); return 0; } -static int npcx_i3c_cntlr_init(const struct device *dev) +static int npcx_i3c_apply_cntlr_config(const struct device *dev) { const struct npcx_i3c_config *config = dev->config; struct i3c_reg *inst = config->base; const struct device *const clk_dev = config->clock_dev; + int idx_module = GET_MODULE_ID(config->instance_id); uint32_t apb4_rate; uint8_t bamatch; int ret; - /* Reset I3C module */ - reset_line_toggle_dt(&config->reset); + /* I3C module mdma cotroller or target mode select */ + npcx_i3c_target_sel(idx_module, false); /* Disable all interrupts */ npcx_i3c_interrupt_all_disable(inst); @@ -2040,8 +2443,6 @@ static int npcx_i3c_cntlr_init(const struct device *dev) return -EINVAL; } - /* Enable main controller mode */ - SET_FIELD(inst->MCONFIG, NPCX_I3C_MCONFIG_CTRENA, MCONFIG_CTRENA_ON); /* Enable external high-keeper */ SET_FIELD(inst->MCONFIG, NPCX_I3C_MCONFIG_HKEEP, MCONFIG_HKEEP_EXT_SDA_SCL); /* Enable open-drain stop */ @@ -2057,12 +2458,11 @@ static int npcx_i3c_cntlr_init(const struct device *dev) LOG_DBG("APB4_CLK: %d", apb4_rate); if (ret != 0x0) { - LOG_ERR("Get APb4 source clock fail %d", ret); + LOG_ERR("%s: Get APB4 source clock fail %d", __func__, ret); return -EINVAL; } - bamatch = DIV_ROUND_UP(apb4_rate, MHZ(1)); - bamatch = DIV_ROUND_UP(bamatch, BAMATCH_DIV); + bamatch = get_bus_available_match_val(apb4_rate); LOG_DBG("BAMATCH: %d", bamatch); SET_FIELD(inst->CONFIG, NPCX_I3C_CONFIG_BAMATCH, bamatch); @@ -2070,28 +2470,146 @@ static int npcx_i3c_cntlr_init(const struct device *dev) return 0; } +static int npcx_i3c_apply_target_config(const struct device *dev) +{ + const struct npcx_i3c_config *config = dev->config; + struct npcx_i3c_data *data = dev->data; + struct i3c_config_target *config_target = &data->config_target; + struct i3c_reg *inst = config->base; + const struct device *const clk_dev = config->clock_dev; + uint32_t apb4_rate; + uint8_t bamatch; + int idx_module = GET_MODULE_ID(config->instance_id); + int ret; + uint64_t pid; + + /* I3C module mdma cotroller or target mode select */ + npcx_i3c_target_sel(idx_module, true); + + /* Set bus available match value in target register */ + ret = clock_control_get_rate(clk_dev, (clock_control_subsys_t)&config->ref_clk_subsys, + &apb4_rate); + LOG_DBG("APB4_CLK: %d", apb4_rate); + + if (ret != 0x0) { + LOG_ERR("%s: Get APB4 source clock fail %d", __func__, ret); + return -EINVAL; + } + + bamatch = get_bus_available_match_val(apb4_rate); + LOG_DBG("BAMATCH: %d", bamatch); + SET_FIELD(inst->CONFIG, NPCX_I3C_CONFIG_BAMATCH, bamatch); + + /* Set Provisional ID */ + pid = config_target->pid; + + /* PID[47:33] MIPI manufacturer ID */ + SET_FIELD(inst->VENDORID, NPCX_I3C_VENDORID_VID, (uint32_t)GET_PID_VENDOR_ID(pid)); + + /* PID[32] Vendor fixed value(0) or random value(1) */ + if (config_target->pid_random) { + inst->CONFIG |= BIT(NPCX_I3C_CONFIG_IDRAND); + } else { + inst->CONFIG &= ~BIT(NPCX_I3C_CONFIG_IDRAND); + } + + /* PID[31:0] vendor fixed value */ + inst->PARTNO = (uint32_t)GET_PID_PARTNO(pid); + + LOG_DBG("pid: %#llx", pid); + LOG_DBG("vendro id: %#x", (uint32_t)GET_PID_VENDOR_ID(pid)); + LOG_DBG("id type: %d", (uint32_t)GET_PID_ID_TYP(pid)); + LOG_DBG("partno: %#x", (uint32_t)GET_PID_PARTNO(pid)); + + SET_FIELD(inst->IDEXT, NPCX_I3C_IDEXT_DCR, config_target->dcr); + SET_FIELD(inst->IDEXT, NPCX_I3C_IDEXT_BCR, config_target->bcr); + SET_FIELD(inst->CONFIG, NPCX_I3C_CONFIG_SADDR, config_target->static_addr); + SET_FIELD(inst->CONFIG, NPCX_I3C_CONFIG_HDRCMD, CFG_HDRCMD_RD_FROM_FIFIO); + SET_FIELD(inst->MAXLIMITS, NPCX_I3C_MAXLIMITS_MAXRD, (config_target->max_read_len) & 0xfff); + SET_FIELD(inst->MAXLIMITS, NPCX_I3C_MAXLIMITS_MAXWR, + (config_target->max_write_len) & 0xfff); + + /* Ignore DA and detect all START and STOP */ + inst->CONFIG &= ~BIT(NPCX_I3C_CONFIG_MATCHSS); + + /* Enable the target interrupt events */ + npcx_i3c_enable_target_interrupt(dev, true); + + return 0; +} + +static void npcx_i3c_dev_init(const struct device *dev) +{ + const struct npcx_i3c_config *config = dev->config; + struct npcx_i3c_data *data = dev->data; + struct i3c_reg *inst = config->base; + struct i3c_config_controller *config_cntlr = &data->common.ctrl_config; + struct i3c_config_target *config_target = &data->config_target; + int idx_module = GET_MODULE_ID(config->instance_id); + + /* Reset I3C module */ + reset_line_toggle_dt(&config->reset); + + if (I3C_BCR_DEVICE_ROLE(config_target->bcr) == I3C_BCR_DEVICE_ROLE_I3C_CONTROLLER_CAPABLE) { + npcx_i3c_apply_cntlr_config(dev); + npcx_i3c_apply_target_config(dev); + + if (config_cntlr->is_secondary) { + /* Secondary controller enable, so boot as a target */ + SET_FIELD(inst->MCONFIG, NPCX_I3C_MCONFIG_CTRENA, MCONFIG_CTRENA_CAPABLE); + inst->CONFIG |= BIT(NPCX_I3C_CONFIG_TGTENA); /* Target mode enable */ + } else { + npcx_i3c_target_sel(idx_module, false); /* Set mdma as controlelr */ + /* Primary Controller enable */ + SET_FIELD(inst->MCONFIG, NPCX_I3C_MCONFIG_CTRENA, MCONFIG_CTRENA_ON); + } + } else { + npcx_i3c_apply_target_config(dev); + SET_FIELD(inst->MCONFIG, NPCX_I3C_MCONFIG_CTRENA, + MCONFIG_CTRENA_OFF); /* Controller mode off */ + inst->CONFIG |= BIT(NPCX_I3C_CONFIG_TGTENA); /* Target mode enable */ + } +} + static int npcx_i3c_configure(const struct device *dev, enum i3c_config_type type, void *config) { struct npcx_i3c_data *dev_data = dev->data; - struct i3c_config_controller *cntlr_cfg = config; + struct i3c_config_controller *config_cntlr; + struct i3c_config_target *config_target; + + if (config == NULL) { + LOG_ERR("%s: config is NULL", __func__); + return -EINVAL; + } if (type == I3C_CONFIG_CONTROLLER) { + config_cntlr = config; /* * Check for valid configuration parameters. * Currently, must be the primary controller. */ - if ((cntlr_cfg->is_secondary) || (cntlr_cfg->scl.i3c == 0U)) { + if (config_cntlr->scl.i3c == 0U) { + LOG_ERR("%s: configure controller failed", __func__); return -EINVAL; } /* Save requested config to dev */ - (void)memcpy(&dev_data->common.ctrl_config, cntlr_cfg, sizeof(*cntlr_cfg)); + (void)memcpy(&dev_data->common.ctrl_config, config_cntlr, sizeof(*config_cntlr)); - /* Controller init */ - return npcx_i3c_cntlr_init(dev); + return npcx_i3c_apply_cntlr_config(dev); + } else if (type == I3C_CONFIG_TARGET) { + config_target = config; + + if (config_target->pid == 0) { + LOG_ERR("%s: configure target failed", __func__); + return -EINVAL; + } + + return npcx_i3c_apply_target_config(dev); } - LOG_ERR("Support controller mode only"); + LOG_ERR("Config type not supported, %d", type); + return -EINVAL; } @@ -2099,21 +2617,273 @@ static int npcx_i3c_config_get(const struct device *dev, enum i3c_config_type ty { struct npcx_i3c_data *data = dev->data; - if ((type != I3C_CONFIG_CONTROLLER) || (config == NULL)) { + if (config == NULL) { return -EINVAL; } - (void)memcpy(config, &data->common.ctrl_config, sizeof(data->common.ctrl_config)); + if (type == I3C_CONFIG_CONTROLLER) { + (void)memcpy(config, &data->common.ctrl_config, sizeof(data->common.ctrl_config)); + } else if (type == I3C_CONFIG_TARGET) { + (void)memcpy(config, &data->config_target, sizeof(data->config_target)); + } else { + return -EINVAL; + } return 0; } +static void npcx_i3c_target_isr(const struct device *dev) +{ + struct npcx_i3c_data *data = dev->data; + const struct npcx_i3c_config *config = dev->config; + struct i3c_config_target *config_tgt = &data->config_target; + struct i3c_target_config *target_config = data->target_config; + struct i3c_reg *inst = config->base; + const struct i3c_target_callbacks *target_cb = data->target_config->callbacks; + +#ifdef CONFIG_I3C_NPCX_DMA + struct mdma_reg *mdma_inst = config->mdma_base; + + /* Check mdma read end (for write request) */ + if (IS_BIT_SET(mdma_inst->MDMA_CTL0, NPCX_MDMA_CTL_TC)) { + /* Disable target read operation */ + npcx_i3c_target_disable_mdmafb(dev); + + /* End of mdma read (write request) */ + if (get_oper_state(dev) == NPCX_I3C_OP_STATE_WR) { +#ifdef CONFIG_I3C_TARGET_BUFFER_MODE + if ((target_cb != NULL) && (target_cb->buf_write_received_cb != NULL)) { + target_cb->buf_write_received_cb( + data->target_config, data->mdma_rx_buf, + npcx_i3c_target_get_mdmafb_count(dev)); + } +#endif + } else { + LOG_ERR("%s: write request TC=1, operation state error, %d", __func__, + data->oper_state); + } + + set_oper_state(dev, NPCX_I3C_OP_STATE_IDLE); + } +#endif /* CONFIG_I3C_NPCX_DMA */ + + while (inst->INTMASKED) { + /* Check STOP detected */ + if (IS_BIT_SET(inst->INTMASKED, NPCX_I3C_INTMASKED_STOP)) { + + if (IS_BIT_SET(inst->INTMASKED, NPCX_I3C_INTMASKED_START)) { + inst->STATUS = BIT(NPCX_I3C_STATUS_START); + } + +#ifdef CONFIG_I3C_NPCX_DMA + /* The end of xfer is a stop. + * For write request: check whether mdma TC is done or still busy. + * For read request: disable the mdma operation. + */ + if ((get_oper_state(dev) == NPCX_I3C_OP_STATE_WR) || + (get_oper_state(dev) == NPCX_I3C_OP_STATE_RD)) { + if (npcx_i3c_target_xfer_end_handle(dev) != 0) { + LOG_ERR("xfer end handle failed after stop, op state=%d", + get_oper_state(dev)); + } + } + + inst->STATUS = BIT(NPCX_I3C_STATUS_STOP); +#endif + + /* Notify upper layer a STOP condition received */ + if ((target_cb != NULL) && (target_cb->stop_cb != NULL)) { + target_cb->stop_cb(data->target_config); + } + + /* Clear DA matched status and re-enable interrupt */ + inst->STATUS = BIT(NPCX_I3C_STATUS_MATCHED); + inst->INTSET = BIT(NPCX_I3C_INTSET_MATCHED); + set_oper_state(dev, NPCX_I3C_OP_STATE_IDLE); + } + + /* Check START or Sr detected */ + if (IS_BIT_SET(inst->INTMASKED, NPCX_I3C_INTMASKED_START)) { + /* The end of xfer is a Sr */ + if ((get_oper_state(dev) == NPCX_I3C_OP_STATE_WR) || + (get_oper_state(dev) == NPCX_I3C_OP_STATE_RD)) { + if (-EBUSY == npcx_i3c_target_xfer_end_handle(dev)) { + return; + } + } + + inst->STATUS = BIT(NPCX_I3C_STATUS_START); + } + + if (IS_BIT_SET(inst->INTMASKED, NPCX_I3C_INTMASKED_TGTRST)) { + inst->STATUS = BIT(NPCX_I3C_STATUS_TGTRST); + } + + /* Check error or warning has occurred */ + if (IS_BIT_SET(inst->INTMASKED, NPCX_I3C_INTMASKED_ERRWARN)) { + LOG_ERR("%s: Error %#x", __func__, inst->ERRWARN); + inst->ERRWARN = inst->ERRWARN; + } + + /* Check incoming header matched target dynamic address */ + if (IS_BIT_SET(inst->INTMASKED, NPCX_I3C_INTMASKED_MATCHED)) { + if (get_oper_state(dev) != NPCX_I3C_OP_STATE_IBI) { + /* The current bus request is an SDR mode read or write */ + if (IS_BIT_SET(inst->STATUS, NPCX_I3C_STATUS_STREQRD)) { + /* SDR read request */ + set_oper_state(dev, NPCX_I3C_OP_STATE_RD); + + /* Emit read request callback */ +#if CONFIG_I3C_TARGET_BUFFER_MODE + /* It will be too late to enable mdma here, use + * target_tx_write() to write tx data into fifo before + * controller send read request. + */ + if ((target_cb != NULL) && + (target_cb->buf_read_requested_cb != NULL)) { + target_cb->buf_read_requested_cb( + data->target_config, NULL, NULL, NULL); + } +#endif + } else { + /* SDR write request */ + set_oper_state(dev, NPCX_I3C_OP_STATE_WR); + + /* Emit write request callback */ + if ((target_cb != NULL) && + (target_cb->write_requested_cb != NULL)) { + target_cb->write_requested_cb(data->target_config); + } + + npcx_i3c_target_rx_read(dev); + } + } + + /* If CONFIG.MATCHSS=1, MATCHED bit must remain 1 to detect next start + * or stop. + * + * Clear the status bit in STOP or START handler. + */ + if (IS_BIT_SET(inst->CONFIG, NPCX_I3C_CONFIG_MATCHSS)) { + inst->INTCLR = BIT(NPCX_I3C_INTCLR_MATCHED); + } else { + inst->STATUS = BIT(NPCX_I3C_STATUS_MATCHED); + } + } + + /* Check dynamic address changed */ + if (IS_BIT_SET(inst->INTMASKED, NPCX_I3C_INTMASKED_DACHG)) { + inst->STATUS = BIT(NPCX_I3C_STATUS_DACHG); + + if (IS_BIT_SET(inst->DYNADDR, NPCX_I3C_DYNADDR_DAVALID)) { + if (target_config != NULL) { + config_tgt->dynamic_addr = + GET_FIELD(inst->DYNADDR, NPCX_I3C_DYNADDR_DADDR); + } + } + } + + /* CCC 'not' automatically handled was received */ + if (IS_BIT_SET(inst->INTMASKED, NPCX_I3C_INTMASKED_CCC)) { + inst->STATUS = BIT(NPCX_I3C_STATUS_CCC); + } + + /* HDR command, address match */ + if (IS_BIT_SET(inst->INTMASKED, NPCX_I3C_INTMASKED_HDRMATCH)) { + inst->STATUS = BIT(NPCX_I3C_STATUS_HDRMATCH); + } + + /* CCC handled (handled by IP) */ + if (IS_BIT_SET(inst->INTMASKED, NPCX_I3C_INTMASKED_CHANDLED)) { + inst->STATUS = BIT(NPCX_I3C_STATUS_CHANDLED); + } + + /* Event requested. IBI, hot-join, bus control */ + if (IS_BIT_SET(inst->INTMASKED, NPCX_I3C_INTMASKED_EVENT)) { + inst->STATUS = BIT(NPCX_I3C_STATUS_EVENT); + + if (GET_FIELD(inst->STATUS, NPCX_I3C_STATUS_EVDET) == + STATUS_EVDET_REQ_SENT_ACKED) { + k_sem_give(&data->target_event_lock_sem); + } + } + } + + /* Secondary controller (Controller register). + * Check I3C now bus controller. + * Disable target mode if target switch to controller mode success. + */ + if (IS_BIT_SET(inst->MINTMASKED, NPCX_I3C_MINTMASKED_NOWCNTLR)) { + inst->MSTATUS = BIT(NPCX_I3C_MSTATUS_NOWCNTLR); /* W1C */ + inst->CONFIG &= ~BIT(NPCX_I3C_CONFIG_TGTENA); /* Disable target mode */ + } +} + +static void npcx_i3c_isr(const struct device *dev) +{ + const struct npcx_i3c_config *config = dev->config; + struct i3c_reg *inst = config->base; + + if (IS_BIT_SET(inst->CONFIG, NPCX_I3C_CONFIG_TGTENA)) { + npcx_i3c_target_isr(dev); + return; + } + +#ifdef CONFIG_I3C_NPCX_DMA + struct mdma_reg *mdma_inst = config->mdma_base; + + /* Controller write end */ + if (IS_BIT_SET(inst->MSTATUS, NPCX_I3C_MSTATUS_COMPLETE)) { + inst->MSTATUS = BIT(NPCX_I3C_MSTATUS_COMPLETE); /* W1C */ + + /* MDMA write */ + if (get_oper_state(dev) == NPCX_I3C_OP_STATE_WR) { + i3c_ctrl_notify(dev); + return; + } + } + + /* Controller read end */ + if (IS_BIT_SET(mdma_inst->MDMA_CTL0, NPCX_MDMA_CTL_TC)) { + mdma_inst->MDMA_CTL0 &= ~BIT(NPCX_MDMA_CTL_TC); /* W0C */ + + /* MDMA read */ + if (get_oper_state(dev) == NPCX_I3C_OP_STATE_RD) { + i3c_ctrl_notify(dev); + return; + } + } +#endif /* CONFIG_I3C_NPCX_DMA */ + +#ifdef CONFIG_I3C_USE_IBI + int ret; + + /* Target start detected */ + if (IS_BIT_SET(inst->MSTATUS, NPCX_I3C_MSTATUS_TGTSTART)) { + LOG_DBG("ISR TGTSTART !"); + + /* Disable further target initiated IBI interrupt */ + inst->MINTCLR = BIT(NPCX_I3C_MINTCLR_TGTSTART); + /* Clear TGTSTART interrupt */ + inst->MSTATUS = BIT(NPCX_I3C_MSTATUS_TGTSTART); + + /* Handle IBI in workqueue */ + ret = i3c_ibi_work_enqueue_cb(dev, npcx_i3c_ibi_work); + if (ret < 0) { + LOG_ERR("Enqueuing ibi work fail, ret %d", ret); + inst->MINTSET = BIT(NPCX_I3C_MINTSET_TGTSTART); + } + } +#endif /* CONFIG_I3C_USE_IBI */ +} + static int npcx_i3c_init(const struct device *dev) { const struct npcx_i3c_config *config = dev->config; struct npcx_i3c_data *data = dev->data; - struct i3c_config_controller *ctrl_config = &data->common.ctrl_config; + struct i3c_config_controller *config_cntlr = &data->common.ctrl_config; const struct device *const clk_dev = config->clock_dev; + struct i3c_reg *inst = config->base; int ret; /* Check clock device ready */ @@ -2144,9 +2914,12 @@ static int npcx_i3c_init(const struct device *dev) return ret; } + /* Lock initial */ k_mutex_init(&data->lock_mutex); k_sem_init(&data->sync_sem, 0, 1); k_sem_init(&data->ibi_lock_sem, 1, 1); + k_sem_init(&data->target_lock_sem, 1, 1); + k_sem_init(&data->target_event_lock_sem, 1, 1); ret = i3c_addr_slots_init(dev); if (ret != 0) { @@ -2154,31 +2927,31 @@ static int npcx_i3c_init(const struct device *dev) return ret; } - ctrl_config->is_secondary = false; /* Currently can only act as primary controller. */ - ctrl_config->supported_hdr = I3C_MSG_HDR_DDR; /* HDR-DDR mode is supported. */ - ctrl_config->scl.i3c = config->clocks.i3c_pp_scl_hz; /* Set I3C frequency */ + /* Set controller default configuration */ + config_cntlr->supported_hdr = I3C_MSG_HDR_DDR; /* HDR-DDR mode is supported. */ + config_cntlr->scl.i3c = config->clocks.i3c_pp_scl_hz; /* Set I3C frequency */ - ret = npcx_i3c_configure(dev, I3C_CONFIG_CONTROLLER, ctrl_config); - if (ret != 0) { - LOG_ERR("Apply i3c_configure() fail %d", ret); - return ret; - } + /* Initial I3C device as controller or target */ + npcx_i3c_dev_init(dev); - /* Just in case the bus is not in idle. */ - ret = npcx_i3c_recover_bus(dev); - if (ret != 0) { - LOG_ERR("Apply i3c_recover_bus() fail %d", ret); - return ret; + if (GET_FIELD(inst->MCONFIG, NPCX_I3C_MCONFIG_CTRENA) == MCONFIG_CTRENA_ON) { + /* Just in case the bus is not in idle. */ + ret = npcx_i3c_recover_bus(dev); + if (ret != 0) { + LOG_ERR("Apply i3c_recover_bus() fail %d", ret); + return ret; + } } /* Configure interrupt */ config->irq_config_func(dev); /* Initialize driver status machine */ - set_oper_state(dev, NPCX_I3C_IDLE); + set_oper_state(dev, NPCX_I3C_OP_STATE_IDLE); - /* Check I3C target device exist in device tree */ - if (config->common.dev_list.num_i3c > 0) { + /* Check I3C is controller mode and target device exist in device tree */ + if ((config->common.dev_list.num_i3c > 0) && + GET_FIELD(inst->MCONFIG, NPCX_I3C_MCONFIG_CTRENA) == MCONFIG_CTRENA_ON) { /* Perform bus initialization */ ret = i3c_bus_init(dev, &config->common.dev_list); if (ret != 0) { @@ -2203,12 +2976,24 @@ static const struct i3c_driver_api npcx_i3c_driver_api = { .i3c_xfers = npcx_i3c_transfer, + .target_tx_write = npcx_i3c_target_tx_write, + .target_register = npcx_i3c_target_register, + .target_unregister = npcx_i3c_target_unregister, + #ifdef CONFIG_I3C_USE_IBI .ibi_enable = npcx_i3c_ibi_enable, .ibi_disable = npcx_i3c_ibi_disable, + + .ibi_raise = npcx_i3c_target_ibi_raise, #endif }; +#define DT_INST_TGT_PID_PROP_OR(id, prop, idx) \ + COND_CODE_1(DT_INST_PROP_HAS_IDX(id, prop, idx), (DT_INST_PROP_BY_IDX(id, prop, idx)), (0)) +#define DT_INST_TGT_PID_RAND_PROP_OR(id, prop, idx) \ + COND_CODE_1(DT_INST_PROP_HAS_IDX(id, prop, idx), \ + IS_BIT_SET(DT_INST_PROP_BY_IDX(id, prop, 0), 0), (0)) + #define I3C_NPCX_DEVICE(id) \ PINCTRL_DT_INST_DEFINE(id); \ static void npcx_i3c_config_func_##id(const struct device *dev) \ @@ -2232,6 +3017,7 @@ static const struct i3c_driver_api npcx_i3c_driver_api = { .common.dev_list.i2c = npcx_i3c_i2c_device_array_##id, \ .common.dev_list.num_i2c = ARRAY_SIZE(npcx_i3c_i2c_device_array_##id), \ .pincfg = PINCTRL_DT_INST_DEV_CONFIG_GET(id), \ + .instance_id = DT_INST_PROP(id, instance_id), \ .clocks.i3c_pp_scl_hz = DT_INST_PROP_OR(id, i3c_scl_hz, 0), \ .clocks.i3c_od_scl_hz = DT_INST_PROP_OR(id, i3c_od_scl_hz, 0), \ IF_ENABLED(CONFIG_I3C_NPCX_DMA, ( \ @@ -2239,9 +3025,19 @@ static const struct i3c_driver_api npcx_i3c_driver_api = { )) \ IF_ENABLED(CONFIG_I3C_NPCX_DMA, ( \ .mdma_base = (struct mdma_reg *)DT_INST_REG_ADDR_BY_IDX(id, 1), \ - )) \ + )) }; \ + static struct npcx_i3c_data npcx_i3c_data_##id = { \ + .common.ctrl_config.is_secondary = DT_INST_PROP_OR(id, secondary, false), \ + .config_target.static_addr = DT_INST_PROP_OR(id, static_address, 0), \ + .config_target.pid = ((uint64_t)DT_INST_TGT_PID_PROP_OR(id, tgt_pid, 0) << 32) | \ + DT_INST_TGT_PID_PROP_OR(id, tgt_pid, 1), \ + .config_target.pid_random = DT_INST_TGT_PID_RAND_PROP_OR(id, tgt_pid, 0), \ + .config_target.bcr = DT_INST_PROP(id, bcr), \ + .config_target.dcr = DT_INST_PROP_OR(id, dcr, 0), \ + .config_target.max_read_len = DT_INST_PROP_OR(id, maximum_read, 0), \ + .config_target.max_write_len = DT_INST_PROP_OR(id, maximum_write, 0), \ + .config_target.supported_hdr = false, \ }; \ - static struct npcx_i3c_data npcx_i3c_data_##id; \ DEVICE_DT_INST_DEFINE(id, npcx_i3c_init, NULL, &npcx_i3c_data_##id, &npcx_i3c_config_##id, \ POST_KERNEL, CONFIG_I3C_CONTROLLER_INIT_PRIORITY, \ &npcx_i3c_driver_api); diff --git a/drivers/input/input_esp32_touch_sensor.c b/drivers/input/input_esp32_touch_sensor.c index e74bac0a6a4d4a8..c8595508107bffe 100644 --- a/drivers/input/input_esp32_touch_sensor.c +++ b/drivers/input/input_esp32_touch_sensor.c @@ -22,9 +22,6 @@ LOG_MODULE_REGISTER(espressif_esp32_touch, CONFIG_INPUT_LOG_LEVEL); -BUILD_ASSERT(!IS_ENABLED(CONFIG_COUNTER_RTC_ESP32), - "Conflict detected: COUNTER_RTC_ESP32 enabled"); - #define ESP32_SCAN_DONE_MAX_COUNT 5 #if defined(CONFIG_SOC_SERIES_ESP32) @@ -75,7 +72,6 @@ struct esp32_touch_sensor_channel_data { }; struct esp32_touch_sensor_data { - uint32_t rtc_intr_msk; }; static void esp32_touch_sensor_interrupt_cb(void *arg) @@ -140,36 +136,18 @@ static void esp32_touch_sensor_interrupt_cb(void *arg) } } -static void esp32_rtc_isr(void *arg) +static void esp32_touch_rtc_isr(void *arg) { uint32_t status = REG_READ(RTC_CNTL_INT_ST_REG); - if (arg != NULL) { - const struct device *dev = arg; - struct esp32_touch_sensor_data *dev_data = dev->data; - - if (dev_data->rtc_intr_msk & status) { - esp32_touch_sensor_interrupt_cb(arg); - } + if (!(status & ESP32_RTC_INTR_MSK)) { + return; } + esp32_touch_sensor_interrupt_cb(arg); REG_WRITE(RTC_CNTL_INT_CLR_REG, status); } -static esp_err_t esp32_rtc_isr_install(intr_handler_t intr_handler, const void *handler_arg) -{ - esp_err_t err; - - REG_WRITE(RTC_CNTL_INT_ENA_REG, 0); - REG_WRITE(RTC_CNTL_INT_CLR_REG, UINT32_MAX); - - err = esp_intr_alloc(DT_IRQ_BY_IDX(DT_NODELABEL(touch), 0, irq), - ESP_PRIO_TO_FLAGS(DT_IRQ_BY_IDX(DT_NODELABEL(touch), 0, priority)) | - ESP_INT_FLAGS_CHECK(DT_IRQ_BY_IDX(DT_NODELABEL(touch), 0, flags)), - intr_handler, (void *)handler_arg, NULL); - - return err; -} /** * Handle debounced touch sensor touch state. @@ -198,7 +176,8 @@ static void esp32_touch_sensor_change_deferred(struct k_work *work) static int esp32_touch_sensor_init(const struct device *dev) { - struct esp32_touch_sensor_data *dev_data = dev->data; + esp_err_t err, flags; + const struct esp32_touch_sensor_config *dev_cfg = dev->config; const int num_channels = dev_cfg->num_channels; @@ -293,8 +272,16 @@ static int esp32_touch_sensor_init(const struct device *dev) touch_hal_timeout_set_threshold(SOC_TOUCH_PAD_THRESHOLD_MAX); #endif /* defined(CONFIG_SOC_SERIES_ESP32) */ - dev_data->rtc_intr_msk = ESP32_RTC_INTR_MSK; - esp32_rtc_isr_install(&esp32_rtc_isr, dev); + flags = ESP_PRIO_TO_FLAGS(DT_IRQ_BY_IDX(DT_NODELABEL(touch), 0, priority)) | + ESP_INT_FLAGS_CHECK(DT_IRQ_BY_IDX(DT_NODELABEL(touch), 0, flags)) | + ESP_INTR_FLAG_SHARED; + err = esp_intr_alloc(DT_IRQ_BY_IDX(DT_NODELABEL(touch), 0, irq), flags, esp32_touch_rtc_isr, + (void *)dev, NULL); + if (err) { + LOG_ERR("Failed to register ISR\n"); + return -EFAULT; + } + #if defined(CONFIG_SOC_SERIES_ESP32) touch_hal_intr_enable(); #elif defined(CONFIG_SOC_SERIES_ESP32S2) || defined(CONFIG_SOC_SERIES_ESP32S3) diff --git a/drivers/led/lp5569.c b/drivers/led/lp5569.c index f7a9758c4ec2cf4..c87a574900dc116 100644 --- a/drivers/led/lp5569.c +++ b/drivers/led/lp5569.c @@ -31,6 +31,7 @@ LOG_MODULE_REGISTER(lp5569, CONFIG_LED_LOG_LEVEL); #define LP5569_MISC 0x2F #define LP5569_POWERSAVE_EN BIT(5) +#define LP5569_EN_AUTO_INCR BIT(6) #define LP5569_CP_MODE_SHIFT 3 /* PWM base Register for controlling the duty-cycle */ @@ -76,6 +77,23 @@ static inline int lp5569_led_off(const struct device *dev, uint32_t led) return lp5569_led_set_brightness(dev, led, 0); } +static int lp5569_write_channels(const struct device *dev, uint32_t start_channel, + uint32_t num_channels, const uint8_t *buf) +{ + const struct lp5569_config *config = dev->config; + uint32_t i2c_len = num_channels + 1; + uint8_t i2c_msg[LP5569_NUM_LEDS + 1]; + + if ((uint64_t)start_channel + num_channels > LP5569_NUM_LEDS) { + return -EINVAL; + } + + i2c_msg[0] = LP5569_LED0_PWM + start_channel; + memcpy(&i2c_msg[1], buf, num_channels); + + return i2c_write_dt(&config->bus, i2c_msg, i2c_len); +} + static int lp5569_enable(const struct device *dev) { const struct lp5569_config *config = dev->config; @@ -110,7 +128,7 @@ static int lp5569_enable(const struct device *dev) } ret = i2c_reg_write_byte_dt(&config->bus, LP5569_MISC, - LP5569_POWERSAVE_EN | + LP5569_POWERSAVE_EN | LP5569_EN_AUTO_INCR | (config->cp_mode << LP5569_CP_MODE_SHIFT)); if (ret < 0) { LOG_ERR("LED reg update failed"); @@ -169,6 +187,7 @@ static const struct led_driver_api lp5569_led_api = { .set_brightness = lp5569_led_set_brightness, .on = lp5569_led_on, .off = lp5569_led_off, + .write_channels = lp5569_write_channels, }; #define LP5569_DEFINE(id) \ diff --git a/drivers/mfd/mfd_ad559x_i2c.c b/drivers/mfd/mfd_ad559x_i2c.c index a18ecbc1423370d..9f2ecd8f280ed58 100644 --- a/drivers/mfd/mfd_ad559x_i2c.c +++ b/drivers/mfd/mfd_ad559x_i2c.c @@ -12,6 +12,8 @@ #include "mfd_ad559x.h" +#define AD559X_REG_RD_POINTER 0x70 + static int mfd_ad559x_i2c_read_raw(const struct device *dev, uint8_t *val, size_t len) { const struct mfd_ad559x_config *config = dev->config; @@ -35,7 +37,9 @@ static int mfd_ad559x_i2c_read_reg(const struct device *dev, uint8_t reg, uint8_ ARG_UNUSED(reg_data); - __ASSERT((reg & 0xf0) == 0, "reg bits [7:4] should be 0: 0x%x", reg); + if (reg >= AD559X_REG_SEQ_ADC || reg <= AD559X_REG_IO_TS_CONFIG) { + reg |= AD559X_REG_RD_POINTER; + } ret = i2c_write_read_dt(&config->i2c, ®, sizeof(reg), buf, sizeof(buf)); if (ret < 0) { diff --git a/drivers/mipi_dbi/mipi_dbi_nxp_lcdic.c b/drivers/mipi_dbi/mipi_dbi_nxp_lcdic.c index 827e1d3b2b48bc4..4c252a277feee74 100644 --- a/drivers/mipi_dbi/mipi_dbi_nxp_lcdic.c +++ b/drivers/mipi_dbi/mipi_dbi_nxp_lcdic.c @@ -38,6 +38,8 @@ enum lcdic_cmd_type { #define LCDIC_MAX_XFER 0x40000 /* Max reset width (in terms of Timer0_Period, see RST_CTRL register) */ #define LCDIC_MAX_RST_WIDTH 0x3F +/* Max reset pulse count */ +#define LCDIC_MAX_RST_PULSE_COUNT 0x7 /* Descriptor for LCDIC command */ union lcdic_trx_cmd { @@ -74,6 +76,8 @@ struct mipi_dbi_lcdic_config { bool swap_bytes; uint8_t write_active_min; uint8_t write_inactive_min; + uint8_t timer0_ratio; + uint8_t timer1_ratio; }; #ifdef CONFIG_MIPI_DBI_NXP_LCDIC_DMA @@ -125,12 +129,6 @@ struct mipi_dbi_lcdic_data { #define LCDIC_TX_FIFO_THRESH 0x3 #endif -/* Timer0 and Timer1 bases. We choose a longer timer0 base to enable - * long reset periods - */ -#define LCDIC_TIMER0_RATIO 0xF -#define LCDIC_TIMER1_RATIO 0x9 - /* After LCDIC is enabled or disabled, there should be a wait longer than * 5x the module clock before other registers are read */ @@ -584,7 +582,7 @@ static int mipi_dbi_lcdic_reset(const struct device *dev, k_timeout_t delay) LCDIC_Type *base = config->base; uint32_t lcdic_freq; uint32_t delay_ms = k_ticks_to_ms_ceil32(delay.ticks); - uint8_t rst_width, pulse_cnt; + uint32_t rst_width, pulse_cnt; /* Calculate delay based off timer0 ratio. Formula given * by RM is as follows: @@ -595,13 +593,19 @@ static int mipi_dbi_lcdic_reset(const struct device *dev, k_timeout_t delay) &lcdic_freq)) { return -EIO; } - rst_width = (delay_ms * (lcdic_freq)) / ((1 << LCDIC_TIMER0_RATIO) * MSEC_PER_SEC); + rst_width = (delay_ms * (lcdic_freq)) / ((1 << config->timer0_ratio) * MSEC_PER_SEC); /* If rst_width is larger than max value supported by hardware, * increase the pulse count (rounding up) */ pulse_cnt = ((rst_width + (LCDIC_MAX_RST_WIDTH - 1)) / LCDIC_MAX_RST_WIDTH); rst_width = MIN(LCDIC_MAX_RST_WIDTH, rst_width); + if ((pulse_cnt - 1) > LCDIC_MAX_RST_PULSE_COUNT) { + /* Still issue reset pulse, but warn user */ + LOG_WRN("Reset pulse is too long for configured timer0 ratio"); + pulse_cnt = LCDIC_MAX_RST_PULSE_COUNT + 1; + } + /* Start the reset signal */ base->RST_CTRL = LCDIC_RST_CTRL_RST_WIDTH(rst_width - 1) | LCDIC_RST_CTRL_RST_SEQ_NUM(pulse_cnt - 1) | @@ -664,8 +668,8 @@ static int mipi_dbi_lcdic_init(const struct device *dev) LCDIC_TO_CTRL_CMD_SHORT_TO_MASK); /* Ensure LCDIC timer ratios are at reset values */ - base->TIMER_CTRL = LCDIC_TIMER_CTRL_TIMER_RATIO1(LCDIC_TIMER1_RATIO) | - LCDIC_TIMER_CTRL_TIMER_RATIO0(LCDIC_TIMER0_RATIO); + base->TIMER_CTRL = LCDIC_TIMER_CTRL_TIMER_RATIO1(config->timer1_ratio) | + LCDIC_TIMER_CTRL_TIMER_RATIO0(config->timer0_ratio); #ifdef CONFIG_MIPI_DBI_NXP_LCDIC_DMA /* Attach the LCDIC DMA request signal to the DMA channel we will @@ -807,6 +811,8 @@ static void mipi_dbi_lcdic_isr(const struct device *dev) DT_INST_PROP(n, nxp_write_active_cycles), \ .write_inactive_min = \ DT_INST_PROP(n, nxp_write_inactive_cycles), \ + .timer0_ratio = DT_INST_PROP(n, nxp_timer0_ratio), \ + .timer1_ratio = DT_INST_PROP(n, nxp_timer1_ratio), \ }; \ static struct mipi_dbi_lcdic_data mipi_dbi_lcdic_data_##n = { \ LCDIC_DMA_CHANNELS(n) \ diff --git a/drivers/misc/pio_rpi_pico/Kconfig b/drivers/misc/pio_rpi_pico/Kconfig index ff312cb81ebef8d..718acc6bd1c1dec 100644 --- a/drivers/misc/pio_rpi_pico/Kconfig +++ b/drivers/misc/pio_rpi_pico/Kconfig @@ -7,3 +7,4 @@ config PIO_RPI_PICO depends on DT_HAS_RASPBERRYPI_PICO_PIO_ENABLED depends on RESET select PICOSDK_USE_PIO + select PINCTRL diff --git a/drivers/pinctrl/CMakeLists.txt b/drivers/pinctrl/CMakeLists.txt index 99cb8d6b9e5f97f..d83272acf1e2b3b 100644 --- a/drivers/pinctrl/CMakeLists.txt +++ b/drivers/pinctrl/CMakeLists.txt @@ -15,7 +15,7 @@ zephyr_library_sources_ifdef(CONFIG_PINCTRL_RPI_PICO pinctrl_rpi_pico.c) zephyr_library_sources_ifdef(CONFIG_PINCTRL_SAM pinctrl_sam.c) zephyr_library_sources_ifdef(CONFIG_PINCTRL_SAM0 pinctrl_sam0.c) zephyr_library_sources_ifdef(CONFIG_PINCTRL_STM32 pinctrl_stm32.c) -zephyr_library_sources_ifdef(CONFIG_PINCTRL_NXP_KINETIS pinctrl_kinetis.c) +zephyr_library_sources_ifdef(CONFIG_PINCTRL_NXP_PORT pinctrl_nxp_port.c) zephyr_library_sources_ifdef(CONFIG_PINCTRL_MCHP_XEC pinctrl_mchp_xec.c) zephyr_library_sources_ifdef(CONFIG_PINCTRL_IMX pinctrl_imx.c) zephyr_library_sources_ifdef(CONFIG_PINCTRL_SIFIVE pinctrl_sifive.c) diff --git a/drivers/pinctrl/Kconfig b/drivers/pinctrl/Kconfig index 511a8a22cb9ca25..5dcb9be4d734ad6 100644 --- a/drivers/pinctrl/Kconfig +++ b/drivers/pinctrl/Kconfig @@ -44,7 +44,7 @@ source "drivers/pinctrl/Kconfig.rpi_pico" source "drivers/pinctrl/Kconfig.sam" source "drivers/pinctrl/Kconfig.sam0" source "drivers/pinctrl/Kconfig.stm32" -source "drivers/pinctrl/Kconfig.kinetis" +source "drivers/pinctrl/Kconfig.nxp_port" source "drivers/pinctrl/Kconfig.xec" source "drivers/pinctrl/Kconfig.imx" source "drivers/pinctrl/Kconfig.sifive" diff --git a/drivers/pinctrl/Kconfig.kinetis b/drivers/pinctrl/Kconfig.kinetis deleted file mode 100644 index 04c2ee04df2391b..000000000000000 --- a/drivers/pinctrl/Kconfig.kinetis +++ /dev/null @@ -1,9 +0,0 @@ -# Copyright (c) 2022 NXP -# SPDX-License-Identifier: Apache-2.0 - -config PINCTRL_NXP_KINETIS - bool "Pin controller driver for NXP Kinetis MCUs" - default y - depends on DT_HAS_NXP_KINETIS_PINMUX_ENABLED - help - Enable pin controller driver for NXP Kinetis MCUs diff --git a/drivers/pinctrl/Kconfig.nxp_port b/drivers/pinctrl/Kconfig.nxp_port new file mode 100644 index 000000000000000..0aed599cf9438cf --- /dev/null +++ b/drivers/pinctrl/Kconfig.nxp_port @@ -0,0 +1,9 @@ +# Copyright 2022, 2024 NXP +# SPDX-License-Identifier: Apache-2.0 + +config PINCTRL_NXP_PORT + bool "Pin controller driver for NXP PORT peripheral" + default y + depends on DT_HAS_NXP_PORT_PINMUX_ENABLED + help + Enable pin controller driver for NXP PORT peripheral diff --git a/drivers/pinctrl/pinctrl_nrf.c b/drivers/pinctrl/pinctrl_nrf.c index 1e587d08b629b42..d3689a2796c2582 100644 --- a/drivers/pinctrl/pinctrl_nrf.c +++ b/drivers/pinctrl/pinctrl_nrf.c @@ -361,9 +361,6 @@ int pinctrl_configure_pins(const pinctrl_soc_pin_t *pins, uint8_t pin_cnt, #ifdef CONFIG_SOC_NRF54H20_GPD if (NRF_GET_GPD_FAST_ACTIVE1(pins[i]) == 1U) { - uint32_t d_pin = pin; - NRF_GPIO_Type *port = nrf_gpio_pin_port_decode(&d_pin); - if (!gpd_requested) { int ret; @@ -374,7 +371,7 @@ int pinctrl_configure_pins(const pinctrl_soc_pin_t *pins, uint8_t pin_cnt, gpd_requested = true; } - port->RETAINCLR = BIT(d_pin); + nrf_gpio_pin_retain_disable(pin); } #endif /* CONFIG_SOC_NRF54H20_GPD */ @@ -395,11 +392,7 @@ int pinctrl_configure_pins(const pinctrl_soc_pin_t *pins, uint8_t pin_cnt, #endif #ifdef CONFIG_SOC_NRF54H20_GPD if (NRF_GET_GPD_FAST_ACTIVE1(pins[i]) == 1U) { - uint32_t d_pin = pin; - NRF_GPIO_Type *port = nrf_gpio_pin_port_decode(&d_pin); - - port->RETAINSET = BIT(d_pin); - + nrf_gpio_pin_retain_enable(pin); } #endif /* CONFIG_SOC_NRF54H20_GPD */ } diff --git a/drivers/pinctrl/pinctrl_kinetis.c b/drivers/pinctrl/pinctrl_nxp_port.c similarity index 88% rename from drivers/pinctrl/pinctrl_kinetis.c rename to drivers/pinctrl/pinctrl_nxp_port.c index bc250d742cf3faf..4af6602703f43de 100644 --- a/drivers/pinctrl/pinctrl_kinetis.c +++ b/drivers/pinctrl/pinctrl_nxp_port.c @@ -5,14 +5,14 @@ */ -#define DT_DRV_COMPAT nxp_kinetis_pinmux +#define DT_DRV_COMPAT nxp_port_pinmux #include #include #include #include -LOG_MODULE_REGISTER(pinctrl_kinetis, CONFIG_PINCTRL_LOG_LEVEL); +LOG_MODULE_REGISTER(pinctrl_nxp_port, CONFIG_PINCTRL_LOG_LEVEL); /* Port register addresses. */ static PORT_Type *ports[] = { @@ -32,7 +32,7 @@ static PORT_Type *ports[] = { #define PIN(mux) (((mux) & 0xFC00000) >> 22) #define PORT(mux) (((mux) & 0xF0000000) >> 28) -#define PINCFG(mux) ((mux) & Z_PINCTRL_KINETIS_PCR_MASK) +#define PINCFG(mux) ((mux) & Z_PINCTRL_NXP_PORT_PCR_MASK) struct pinctrl_mcux_config { const struct device *clock_dev; @@ -47,15 +47,11 @@ int pinctrl_configure_pins(const pinctrl_soc_pin_t *pins, uint8_t pin_cnt, uint8_t pin = PIN(pins[i]); uint16_t mux = PINCFG(pins[i]); - base->PCR[pin] = (base->PCR[pin] & (~Z_PINCTRL_KINETIS_PCR_MASK)) | mux; + base->PCR[pin] = (base->PCR[pin] & (~Z_PINCTRL_NXP_PORT_PCR_MASK)) | mux; } return 0; } -/* Kinetis pinmux driver binds to the same DTS nodes, - * and handles clock init. Only bind to these nodes if pinmux driver - * is disabled. - */ static int pinctrl_mcux_init(const struct device *dev) { const struct pinctrl_mcux_config *config = dev->config; diff --git a/drivers/pwm/Kconfig.rcar b/drivers/pwm/Kconfig.rcar index bf8bd912b6af897..765d4fe2b112991 100644 --- a/drivers/pwm/Kconfig.rcar +++ b/drivers/pwm/Kconfig.rcar @@ -8,5 +8,6 @@ config PWM_RCAR default y depends on SOC_FAMILY_RENESAS_RCAR depends on DT_HAS_RENESAS_PWM_RCAR_ENABLED + select PINCTRL help Enable Renesas R-Car PWM Driver. diff --git a/drivers/pwm/Kconfig.rpi_pico b/drivers/pwm/Kconfig.rpi_pico index ed697eb9010b7e0..75f6787df3c4daa 100644 --- a/drivers/pwm/Kconfig.rpi_pico +++ b/drivers/pwm/Kconfig.rpi_pico @@ -7,5 +7,6 @@ config PWM_RPI_PICO depends on DT_HAS_RASPBERRYPI_PICO_PWM_ENABLED depends on RESET select PICOSDK_USE_PWM + select PINCTRL help Enable PWM driver for RPi Pico family of MCUs diff --git a/drivers/sdhc/Kconfig.rcar b/drivers/sdhc/Kconfig.rcar index f5d57a4bb03c33a..9f34e12bac0b7a7 100644 --- a/drivers/sdhc/Kconfig.rcar +++ b/drivers/sdhc/Kconfig.rcar @@ -8,6 +8,7 @@ config RCAR_MMC select SDHC_SUPPORTS_NATIVE_MODE select REGULATOR select GPIO + select PINCTRL select SDHC_SUPPORTS_UHS if SDMMC_STACK help Renesas Rcar MMC driver. diff --git a/drivers/sensor/adi/adxl367/CMakeLists.txt b/drivers/sensor/adi/adxl367/CMakeLists.txt index 1496eb11266d769..678d2236f8015e2 100644 --- a/drivers/sensor/adi/adxl367/CMakeLists.txt +++ b/drivers/sensor/adi/adxl367/CMakeLists.txt @@ -9,3 +9,5 @@ zephyr_library_sources(adxl367.c) zephyr_library_sources(adxl367_spi.c) zephyr_library_sources(adxl367_i2c.c) zephyr_library_sources_ifdef(CONFIG_ADXL367_TRIGGER adxl367_trigger.c) +zephyr_library_sources_ifdef(CONFIG_SENSOR_ASYNC_API adxl367_rtio.c adxl367_decoder.c) +zephyr_library_sources_ifdef(CONFIG_ADXL367_STREAM adxl367_stream.c adxl367_decoder.c) diff --git a/drivers/sensor/adi/adxl367/Kconfig b/drivers/sensor/adi/adxl367/Kconfig index f088854e0a224f9..542cf004d7c8061 100644 --- a/drivers/sensor/adi/adxl367/Kconfig +++ b/drivers/sensor/adi/adxl367/Kconfig @@ -115,6 +115,15 @@ config ADXL367_TRIGGER_OWN_THREAD endchoice +config ADXL367_STREAM + bool "Use FIFO to stream data" + select ADXL367_TRIGGER + default y + depends on SPI_RTIO + depends on SENSOR_ASYNC_API + help + Use this configuration option to enable streaming sensor data via RTIO. + config ADXL367_TRIGGER bool diff --git a/drivers/sensor/adi/adxl367/adxl367.c b/drivers/sensor/adi/adxl367/adxl367.c index 1679dca10a78e49..031f97f0c926bd1 100644 --- a/drivers/sensor/adi/adxl367/adxl367.c +++ b/drivers/sensor/adi/adxl367/adxl367.c @@ -108,8 +108,13 @@ static int adxl367_setup_inactivity_detection(const struct device *dev, * * @return 0 in case of success, negative error code otherwise. */ +#ifdef CONFIG_ADXL367_STREAM +int adxl367_set_op_mode(const struct device *dev, + enum adxl367_op_mode op_mode) +#else static int adxl367_set_op_mode(const struct device *dev, enum adxl367_op_mode op_mode) +#endif /* CONFIG_ADXL367_STREAM */ { struct adxl367_data *data = dev->data; int ret; @@ -126,6 +131,11 @@ static int adxl367_set_op_mode(const struct device *dev, k_sleep(K_MSEC(100)); } +#ifdef CONFIG_ADXL367_STREAM + data->pwr_reg &= ~ADXL367_POWER_CTL_MEASURE_MSK; + data->pwr_reg |= FIELD_PREP(ADXL367_POWER_CTL_MEASURE_MSK, op_mode); +#endif /* CONFIG_ADXL372_STREAM */ + return 0; } @@ -141,11 +151,21 @@ static int adxl367_set_op_mode(const struct device *dev, */ static int adxl367_set_autosleep(const struct device *dev, bool enable) { + int ret; struct adxl367_data *data = dev->data; - return data->hw_tf->write_reg_mask(dev, ADXL367_POWER_CTL, + ret = data->hw_tf->write_reg_mask(dev, ADXL367_POWER_CTL, ADXL367_POWER_CTL_AUTOSLEEP_MSK, FIELD_PREP(ADXL367_POWER_CTL_AUTOSLEEP_MSK, enable)); + +#ifdef CONFIG_ADXL367_STREAM + if (ret == 0) { + data->pwr_reg &= ~ADXL367_POWER_CTL_AUTOSLEEP_MSK; + data->pwr_reg |= FIELD_PREP(ADXL367_POWER_CTL_AUTOSLEEP_MSK, enable); + } +#endif /* CONFIG_ADXL372_STREAM */ + + return ret; } /** @@ -159,11 +179,21 @@ static int adxl367_set_autosleep(const struct device *dev, bool enable) */ static int adxl367_set_low_noise(const struct device *dev, bool enable) { + int ret; struct adxl367_data *data = dev->data; - return data->hw_tf->write_reg_mask(dev, ADXL367_POWER_CTL, + ret = data->hw_tf->write_reg_mask(dev, ADXL367_POWER_CTL, ADXL367_POWER_CTL_NOISE_MSK, FIELD_PREP(ADXL367_POWER_CTL_NOISE_MSK, enable)); + +#ifdef CONFIG_ADXL367_STREAM + if (ret == 0) { + data->pwr_reg &= ~ADXL367_POWER_CTL_NOISE_MSK; + data->pwr_reg |= FIELD_PREP(ADXL367_POWER_CTL_NOISE_MSK, enable); + } +#endif /* CONFIG_ADXL372_STREAM */ + + return ret; } /** @@ -203,11 +233,20 @@ static int adxl367_set_act_proc_mode(const struct device *dev, int adxl367_set_output_rate(const struct device *dev, enum adxl367_odr odr) { struct adxl367_data *data = dev->data; + int ret; - return data->hw_tf->write_reg_mask(dev, + ret = data->hw_tf->write_reg_mask(dev, ADXL367_FILTER_CTL, ADXL367_FILTER_CTL_ODR_MSK, FIELD_PREP(ADXL367_FILTER_CTL_ODR_MSK, odr)); + +#ifdef CONFIG_ADXL367_STREAM + if (ret == 0) { + data->odr = odr; + } +#endif /* CONFIG_ADXL367_STREAM */ + + return ret; } /** @@ -224,11 +263,20 @@ int adxl367_set_output_rate(const struct device *dev, enum adxl367_odr odr) int adxl367_set_range(const struct device *dev, enum adxl367_range range) { struct adxl367_data *data = dev->data; + int ret; - return data->hw_tf->write_reg_mask(dev, + ret = data->hw_tf->write_reg_mask(dev, ADXL367_FILTER_CTL, ADXL367_FILTER_CTL_RANGE_MSK, FIELD_PREP(ADXL367_FILTER_CTL_RANGE_MSK, range)); + +#ifdef CONFIG_ADXL367_STREAM + if (ret == 0) { + data->range = range; + } +#endif /* CONFIG_ADXL367_STREAM */ + + return ret; } /** @@ -594,7 +642,21 @@ int adxl367_fifo_setup(const struct device *dev, return ret; } - return adxl367_set_fifo_read_mode(dev, read_mode); + ret = adxl367_set_fifo_read_mode(dev, read_mode); + if (ret != 0) { + return ret; + } + +#ifdef CONFIG_ADXL367_STREAM + struct adxl367_data *data = (struct adxl367_data *)dev->data; + + data->fifo_config.fifo_mode = mode; + data->fifo_config.fifo_format = format; + data->fifo_config.fifo_samples = sets_nb; + data->fifo_config.fifo_read_mode = read_mode; +#endif /* CONFIG_ADXL367_STREAM */ + + return ret; } /** @@ -820,20 +882,26 @@ static int adxl367_sample_fetch(const struct device *dev, return adxl367_get_temp_data(dev, &data->temp_val); } - -static void adxl367_accel_convert(const struct device *dev, - struct sensor_value *val, int16_t value) +#ifdef CONFIG_SENSOR_ASYNC_API +void adxl367_accel_convert(struct sensor_value *val, int16_t value, + enum adxl367_range range) +#else +static void adxl367_accel_convert(struct sensor_value *val, int16_t value, + enum adxl367_range range) +#endif /*CONFIG_SENSOR_ASYNC_API*/ { - struct adxl367_data *data = dev->data; - int64_t micro_ms2 = value * (SENSOR_G * 250 / 10000 * - adxl367_scale_mul[data->range] / 1000); + adxl367_scale_mul[range] / 1000); val->val1 = micro_ms2 / 1000000; val->val2 = micro_ms2 % 1000000; } +#ifdef CONFIG_SENSOR_ASYNC_API +void adxl367_temp_convert(struct sensor_value *val, int16_t value) +#else static void adxl367_temp_convert(struct sensor_value *val, int16_t value) +#endif /*CONFIG_SENSOR_ASYNC_API*/ { int64_t temp_data = (value + ADXL367_TEMP_OFFSET) * ADXL367_TEMP_SCALE; @@ -849,18 +917,18 @@ static int adxl367_channel_get(const struct device *dev, switch (chan) { case SENSOR_CHAN_ACCEL_X: - adxl367_accel_convert(dev, val, data->sample.x); + adxl367_accel_convert(val, data->sample.x, data->range); break; case SENSOR_CHAN_ACCEL_Y: - adxl367_accel_convert(dev, val, data->sample.y); + adxl367_accel_convert(val, data->sample.y, data->range); break; case SENSOR_CHAN_ACCEL_Z: - adxl367_accel_convert(dev, val, data->sample.z); + adxl367_accel_convert(val, data->sample.z, data->range); break; case SENSOR_CHAN_ACCEL_XYZ: - adxl367_accel_convert(dev, val++, data->sample.x); - adxl367_accel_convert(dev, val++, data->sample.y); - adxl367_accel_convert(dev, val, data->sample.z); + adxl367_accel_convert(val++, data->sample.x, data->range); + adxl367_accel_convert(val++, data->sample.y, data->range); + adxl367_accel_convert(val, data->sample.z, data->range); break; case SENSOR_CHAN_DIE_TEMP: adxl367_temp_convert(val, data->temp_val); @@ -878,6 +946,10 @@ static const struct sensor_driver_api adxl367_api_funcs = { #ifdef CONFIG_ADXL367_TRIGGER .trigger_set = adxl367_trigger_set, #endif +#ifdef CONFIG_SENSOR_ASYNC_API + .submit = adxl367_submit, + .get_decoder = adxl367_get_decoder, +#endif /* CONFIG_SENSOR_ASYNC_API */ }; static int adxl367_probe(const struct device *dev) @@ -1055,19 +1127,28 @@ static int adxl367_init(const struct device *dev) /* * Instantiation macros used when a device is on a SPI bus. */ +#define ADXL367_SPI_CFG SPI_WORD_SET(8) | SPI_TRANSFER_MSB + +#define ADXL367_RTIO_DEFINE(inst) \ + SPI_DT_IODEV_DEFINE(adxl367_iodev_##inst, DT_DRV_INST(inst), \ + ADXL367_SPI_CFG, 0U); \ + RTIO_DEFINE(adxl367_rtio_ctx_##inst, 8, 8); #define ADXL367_CONFIG_SPI(inst) \ { \ .bus_init = adxl367_spi_init, \ - .spi = SPI_DT_SPEC_INST_GET(inst, SPI_WORD_SET(8) | \ - SPI_TRANSFER_MSB, 0), \ + .spi = SPI_DT_SPEC_INST_GET(inst, ADXL367_SPI_CFG, 0), \ ADXL367_CONFIG(inst) \ COND_CODE_1(DT_INST_NODE_HAS_PROP(inst, int1_gpios), \ (ADXL367_CFG_IRQ(inst)), ()) \ } #define ADXL367_DEFINE_SPI(inst) \ - static struct adxl367_data adxl367_data_##inst; \ + IF_ENABLED(CONFIG_ADXL367_STREAM, (ADXL367_RTIO_DEFINE(inst))); \ + static struct adxl367_data adxl367_data_##inst = { \ + IF_ENABLED(CONFIG_ADXL367_STREAM, (.rtio_ctx = &adxl367_rtio_ctx_##inst, \ + .iodev = &adxl367_iodev_##inst,)) \ + }; \ static const struct adxl367_dev_config adxl367_config_##inst = \ ADXL367_CONFIG_SPI(inst); \ ADXL367_DEVICE_INIT(inst) diff --git a/drivers/sensor/adi/adxl367/adxl367.h b/drivers/sensor/adi/adxl367/adxl367.h index 8cef47420bbd82c..20cece0012fe60e 100644 --- a/drivers/sensor/adi/adxl367/adxl367.h +++ b/drivers/sensor/adi/adxl367/adxl367.h @@ -14,6 +14,8 @@ #include #include +#define DT_DRV_COMPAT adi_adxl367 + #if DT_ANY_INST_ON_BUS_STATUS_OKAY(spi) #include #endif /* DT_ANY_INST_ON_BUS_STATUS_OKAY(spi) */ @@ -102,6 +104,7 @@ #define ADXL367_TO_REG(x) ((x) >> 1) #define ADXL367_SPI_WRITE_REG 0x0Au #define ADXL367_SPI_READ_REG 0x0Bu +#define ADXL367_SPI_READ_FIFO 0x0Du #define ADXL367_ABSOLUTE 0x00 #define ADXL367_REFERENCED 0x01 @@ -201,10 +204,19 @@ /* Max change = 270mg. Sensitivity = 4LSB / mg */ #define ADXL367_SELF_TEST_MAX (270 * 100 / 25) +/* ADXL367 get fifo sample header */ +#define ADXL367_FIFO_HDR_GET_ACCEL_AXIS(x) (((x) & 0xC000) >> 14) +#define ADXL367_FIFO_HDR_CHECK_TEMP(x) ((((x) & 0xC000) >> 14) == 0x3) + +/* ADXL362 scale factors from specifications */ +#define ADXL367_ACCEL_2G_LSB_PER_G 4000 +#define ADXL367_ACCEL_4G_LSB_PER_G 2000 +#define ADXL367_ACCEL_8G_LSB_PER_G 1000 + enum adxl367_axis { - ADXL367_X_AXIS, - ADXL367_Y_AXIS, - ADXL367_Z_AXIS + ADXL367_X_AXIS = 0x0, + ADXL367_Y_AXIS = 0x1, + ADXL367_Z_AXIS = 0x2 }; enum adxl367_op_mode { @@ -279,6 +291,16 @@ struct adxl367_xyz_accel_data { int16_t x; int16_t y; int16_t z; + enum adxl367_range range; +}; + +struct adxl367_sample_data { +#ifdef CONFIG_ADXL367_STREAM + uint8_t is_fifo: 1; + uint8_t res: 7; +#endif /*CONFIG_ADXL367_STREAM*/ + struct adxl367_xyz_accel_data xyz; + int16_t raw_temp; }; struct adxl367_transfer_function { @@ -316,6 +338,20 @@ struct adxl367_data { struct k_work work; #endif #endif /* CONFIG_ADXL367_TRIGGER */ +#ifdef CONFIG_ADXL367_STREAM + uint8_t status; + uint8_t fifo_ent[2]; + struct rtio_iodev_sqe *sqe; + struct rtio *rtio_ctx; + struct rtio_iodev *iodev; + uint64_t timestamp; + struct rtio *r_cb; + uint8_t fifo_full_irq: 1; + uint8_t fifo_wmark_irq: 1; + uint8_t res: 6; + enum adxl367_odr odr; + uint8_t pwr_reg; +#endif /* CONFIG_ADXL367_STREAM */ }; struct adxl367_dev_config { @@ -349,6 +385,27 @@ struct adxl367_dev_config { uint8_t activity_time; }; +struct adxl367_fifo_data { + uint8_t is_fifo: 1; + uint8_t res: 7; + uint8_t packet_size; + uint8_t fifo_read_mode; + uint8_t has_tmp: 1; + uint8_t has_adc: 1; + uint8_t has_x: 1; + uint8_t has_y: 1; + uint8_t has_z: 1; + uint8_t res1: 3; + uint8_t int_status; + uint8_t accel_odr: 4; + uint8_t range: 4; + uint16_t fifo_byte_count; + uint64_t timestamp; +} __attribute__((__packed__)); + +BUILD_ASSERT(sizeof(struct adxl367_fifo_data) % 4 == 0, + "adxl367_fifo_data struct should be word aligned"); + int adxl367_spi_init(const struct device *dev); int adxl367_i2c_init(const struct device *dev); int adxl367_trigger_set(const struct device *dev, @@ -356,5 +413,29 @@ int adxl367_trigger_set(const struct device *dev, sensor_trigger_handler_t handler); int adxl367_init_interrupt(const struct device *dev); +void adxl367_submit_stream(const struct device *dev, struct rtio_iodev_sqe *iodev_sqe); +void adxl367_stream_irq_handler(const struct device *dev); + +#ifdef CONFIG_SENSOR_ASYNC_API +void adxl367_submit(const struct device *dev, struct rtio_iodev_sqe *iodev_sqe); +int adxl367_get_decoder(const struct device *dev, const struct sensor_decoder_api **decoder); +int adxl367_get_accel_data(const struct device *dev, + struct adxl367_xyz_accel_data *accel_data); +int adxl367_get_temp_data(const struct device *dev, int16_t *raw_temp); +void adxl367_accel_convert(struct sensor_value *val, int16_t value, + enum adxl367_range range); +void adxl367_temp_convert(struct sensor_value *val, int16_t value); +#endif /* CONFIG_SENSOR_ASYNC_API */ + +#ifdef CONFIG_ADXL367_STREAM +int adxl367_fifo_setup(const struct device *dev, + enum adxl367_fifo_mode mode, + enum adxl367_fifo_format format, + enum adxl367_fifo_read_mode read_mode, + uint8_t sets_nb); +int adxl367_set_op_mode(const struct device *dev, + enum adxl367_op_mode op_mode); +size_t adxl367_get_packet_size(const struct adxl367_dev_config *cfg); +#endif /* CONFIG_ADXL367_STREAM */ #endif /* ZEPHYR_DRIVERS_SENSOR_ADXL367_ADXL367_H_ */ diff --git a/drivers/sensor/adi/adxl367/adxl367_decoder.c b/drivers/sensor/adi/adxl367/adxl367_decoder.c new file mode 100644 index 000000000000000..85c3f466b8993c6 --- /dev/null +++ b/drivers/sensor/adi/adxl367/adxl367_decoder.c @@ -0,0 +1,767 @@ +/* + * Copyright (c) 2024 Analog Devices Inc. + * + * SPDX-License-Identifier: Apache-2.0 + */ + +#include "adxl367.h" +#include + +#ifdef CONFIG_ADXL367_STREAM + +#define ADXL367_COMPLEMENT 0xC000 +/* Scale factor is the same for all ranges. */ +/* (1.0 / sensor sensitivity) * (2^31 / 2^sensor shift ) * SENSOR_G / 1000000 */ +#define SENSOR_QSCALE_FACTOR UINT32_C(164584) + +/* (2^31 / 2^8(shift) */ +#define ADXL367_TEMP_QSCALE 8388608 +#define ADXL367_TEMP_SENSITIVITY 54 /* LSB/C */ +#define ADXL367_TEMP_BIAS_TEST_CONDITION 25 /*C*/ + +static const uint32_t accel_period_ns[] = { + [ADXL367_ODR_12P5HZ] = UINT32_C(10000000000) / 125, + [ADXL367_ODR_25HZ] = UINT32_C(1000000000) / 25, + [ADXL367_ODR_50HZ] = UINT32_C(1000000000) / 50, + [ADXL367_ODR_100HZ] = UINT32_C(1000000000) / 100, + [ADXL367_ODR_200HZ] = UINT32_C(1000000000) / 200, + [ADXL367_ODR_400HZ] = UINT32_C(1000000000) / 400, +}; + +static const uint32_t range_to_shift[] = { + [ADXL367_2G_RANGE] = 5, + [ADXL367_4G_RANGE] = 6, + [ADXL367_8G_RANGE] = 7, +}; + +enum adxl367_12b_packet_start { + ADXL367_12B_PACKET_ALIGNED = 0, + ADXL367_12B_PACKET_NOT_ALIGNED = 1, +}; + +static inline void adxl367_temp_convert_q31(q31_t *out, const uint8_t *buff, + const enum adxl367_fifo_read_mode read_mode, uint8_t sample_aligned) +{ + int16_t data_in; + unsigned int convert_value = 0; + + switch (read_mode) { + case ADXL367_8B: + /* Because full resolution is 14b and this is 8 MSB bits. */ + data_in = ((*((int8_t *)buff)) << 6) & 0x3FC0; + convert_value = 1; + break; + + case ADXL367_12B: + /* Sample starts from the bit 4 of a first byte in buff. */ + if (sample_aligned == 0) { + data_in = ((int16_t)(*buff & 0x0F) << 8) | *(buff + 1); + } else { + data_in = ((int16_t)(*buff) << 4) | (*(buff + 1) >> 4); + } + /* Because full resolution is 14b and this is 12 MSB bits. */ + data_in = (data_in << 2) & 0x3FFC; + convert_value = 1; + break; + + case ADXL367_12B_CHID: + data_in = sys_le16_to_cpu(*((int16_t *)(buff))); + if (ADXL367_FIFO_HDR_CHECK_TEMP(data_in)) { + /* Remove channel ID. */ + data_in &= 0x3FFF; + /* Because full resolution is 14b and this is 12 MSB bits. */ + data_in = (data_in << 2) & 0x3FFC; + convert_value = 1; + } + break; + + case ADXL367_14B_CHID: + uint16_t *tmp_buf = (uint16_t *)buff; + + data_in = (int16_t)(((*tmp_buf >> 8) & 0xFF) | ((*tmp_buf << 8) & 0xFF00)); + if (ADXL367_FIFO_HDR_CHECK_TEMP(data_in)) { + /* Remove channel ID. */ + data_in &= 0x3FFF; + convert_value = 1; + } + break; + + default: + break; + } + + if (convert_value) { + if (data_in & BIT(13)) { + data_in |= ADXL367_COMPLEMENT; + } + + *out = ((data_in - ADXL367_TEMP_25C) / ADXL367_TEMP_SENSITIVITY + + ADXL367_TEMP_BIAS_TEST_CONDITION) * ADXL367_TEMP_QSCALE; + } +} + +static inline void adxl367_accel_convert_q31(q31_t *out, const uint8_t *buff, + const enum adxl367_fifo_read_mode read_mode, uint8_t axis, uint8_t sample_aligned) +{ + int16_t data_in; + unsigned int convert_value = 0; + + switch (read_mode) { + case ADXL367_8B: + /* Because full resolution is 14b and this is 8 MSB bits. */ + data_in = ((*((int8_t *)buff)) << 6) & 0x3FC0; + convert_value = 1; + break; + + case ADXL367_12B: + /* Sample starts from the bit 4 of a first byte in buff. */ + if (sample_aligned == 0) { + data_in = ((int16_t)(*buff & 0x0F) << 8) | *(buff + 1); + } else { + data_in = ((int16_t)(*buff) << 4) | (*(buff + 1) >> 4); + } + /* Because full resolution is 14b and this is 12 MSB bits. */ + data_in = (data_in << 2) & 0x3FFC; + convert_value = 1; + break; + + case ADXL367_12B_CHID: + data_in = sys_le16_to_cpu(*((int16_t *)(buff))); + if (ADXL367_FIFO_HDR_GET_ACCEL_AXIS(data_in) == axis) { + /* Remove channel ID. */ + data_in &= 0x3FFF; + /* Because full resolution is 14b and this is 12 MSB bits. */ + data_in = (data_in << 2) & 0x3FFC; + convert_value = 1; + } + break; + + case ADXL367_14B_CHID: + uint16_t *tmp_buf = (uint16_t *)buff; + + data_in = (int16_t)(((*tmp_buf >> 8) & 0xFF) | ((*tmp_buf << 8) & 0xFF00)); + if (ADXL367_FIFO_HDR_GET_ACCEL_AXIS(data_in) == axis) { + /* Remove channel ID. */ + data_in &= 0x3FFF; + convert_value = 1; + } + break; + + default: + break; + } + + if (convert_value) { + if (data_in & BIT(13)) { + data_in |= ADXL367_COMPLEMENT; + } + + *out = data_in * SENSOR_QSCALE_FACTOR; + } +} + +static int adxl367_get_accel(const struct adxl367_fifo_data *enc_data, + struct sensor_three_axis_data *data, const uint8_t *buffer, int count, + uint8_t sample_size, struct sensor_chan_spec chan_spec, + uint64_t period_ns, uint8_t sample_num) +{ + int ret = 0; + + switch (chan_spec.chan_type) { + case SENSOR_CHAN_ACCEL_X: + if (enc_data->has_x) { + data->readings[count].timestamp_delta = + sample_num * period_ns; + adxl367_accel_convert_q31(&data->readings[count].x, + buffer, enc_data->fifo_read_mode, + ADXL367_X_AXIS, 1); + } + break; + case SENSOR_CHAN_ACCEL_Y: + if (enc_data->has_y) { + uint8_t buff_offset = 0; + + /* If packet has X channel, then Y channel has offset. */ + if (enc_data->has_x) { + buff_offset = sample_size; + } + data->readings[count].timestamp_delta = sample_num * period_ns; + adxl367_accel_convert_q31(&data->readings[count].y, + (buffer + buff_offset), enc_data->fifo_read_mode, + ADXL367_Y_AXIS, 1); + } + break; + case SENSOR_CHAN_ACCEL_Z: + if (enc_data->has_z) { + uint8_t buff_offset = 0; + + /* If packet has X channel and/or Y channel, + * then Z channel has offset. + */ + + if (enc_data->has_x) { + buff_offset = sample_size; + } + + if (enc_data->has_y) { + buff_offset += sample_size; + } + data->readings[count].timestamp_delta = + sample_num * period_ns; + adxl367_accel_convert_q31(&data->readings[count].z, + (buffer + buff_offset), enc_data->fifo_read_mode, + ADXL367_Z_AXIS, 1); + } + break; + case SENSOR_CHAN_ACCEL_XYZ: + data->readings[count].timestamp_delta = + sample_num * period_ns; + uint8_t buff_offset = 0; + + if (enc_data->has_x) { + adxl367_accel_convert_q31(&data->readings[count].x, + buffer, enc_data->fifo_read_mode, + ADXL367_X_AXIS, 1); + buff_offset = sample_size; + } + + if (enc_data->has_y) { + adxl367_accel_convert_q31(&data->readings[count].y, + (buffer + buff_offset), enc_data->fifo_read_mode, + ADXL367_Y_AXIS, 1); + + buff_offset += sample_size; + } + + if (enc_data->has_z) { + adxl367_accel_convert_q31(&data->readings[count].z, + (buffer + buff_offset), enc_data->fifo_read_mode, + ADXL367_Z_AXIS, 1); + } + break; + + default: + ret = -ENOTSUP; + break; + } + + return ret; +} + +static int adxl367_get_12b_accel(const struct adxl367_fifo_data *enc_data, + struct sensor_three_axis_data *data, const uint8_t *buffer, int count, + uint8_t packet_size, struct sensor_chan_spec chan_spec, uint8_t packet_alignment, + uint64_t period_ns, uint8_t sample_num) +{ + int ret = 0; + uint8_t sample_aligned = 1; + uint8_t buff_offset = 0; + uint8_t samples_before = 0; + + switch (chan_spec.chan_type) { + case SENSOR_CHAN_ACCEL_X: + if (enc_data->has_x) { + if (packet_alignment == ADXL367_12B_PACKET_NOT_ALIGNED) { + sample_aligned = 0; + } + + data->readings[count].timestamp_delta = sample_num * period_ns; + adxl367_accel_convert_q31(&data->readings[count].x, + buffer, enc_data->fifo_read_mode, + ADXL367_X_AXIS, sample_aligned); + } + break; + case SENSOR_CHAN_ACCEL_Y: + if (enc_data->has_y) { + buff_offset = 0; + + /* If packet has X channel, + * then Y channel has offset. + */ + if (enc_data->has_x) { + buff_offset = 2; + if (packet_alignment == ADXL367_12B_PACKET_ALIGNED) { + sample_aligned = 0; + buff_offset = 1; + } + } + data->readings[count].timestamp_delta = sample_num * period_ns; + adxl367_accel_convert_q31(&data->readings[count].y, + (buffer + buff_offset), enc_data->fifo_read_mode, + ADXL367_Y_AXIS, sample_aligned); + } + break; + case SENSOR_CHAN_ACCEL_Z: + if (enc_data->has_z) { + buff_offset = 0; + samples_before = 0; + + /* If packet has X channel and/or Y channel, + * then Z channel has offset. + */ + if (enc_data->has_x) { + samples_before++; + } + + if (enc_data->has_y) { + samples_before++; + } + + if (samples_before == 0) { + if (packet_alignment == ADXL367_12B_PACKET_NOT_ALIGNED) { + sample_aligned = 0; + } + } else { + buff_offset = (samples_before * 12) / 8; + if (samples_before == 1) { + if (packet_alignment == ADXL367_12B_PACKET_ALIGNED) { + sample_aligned = 0; + } else { + buff_offset++; + } + } else { + if (packet_alignment == ADXL367_12B_PACKET_NOT_ALIGNED) { + sample_aligned = 0; + } + } + } + data->readings[count].timestamp_delta = sample_num * period_ns; + adxl367_accel_convert_q31(&data->readings[count].z, + (buffer + buff_offset), enc_data->fifo_read_mode, + ADXL367_Z_AXIS, sample_aligned); + } + break; + case SENSOR_CHAN_ACCEL_XYZ: + data->readings[count].timestamp_delta = sample_num * period_ns; + buff_offset = 0; + samples_before = 0; + + if (enc_data->has_x) { + if (packet_alignment == ADXL367_12B_PACKET_NOT_ALIGNED) { + sample_aligned = 0; + } + samples_before++; + + adxl367_accel_convert_q31(&data->readings[count].x, + buffer, enc_data->fifo_read_mode, ADXL367_X_AXIS, + sample_aligned); + } + + if (enc_data->has_y) { + if (samples_before) { + if (packet_alignment == ADXL367_12B_PACKET_ALIGNED) { + buff_offset = 1; + sample_aligned = 0; + } else { + buff_offset = 2; + sample_aligned = 1; + } + } else { + if (packet_alignment == ADXL367_12B_PACKET_NOT_ALIGNED) { + sample_aligned = 0; + buff_offset = 0; + } + } + samples_before++; + + adxl367_accel_convert_q31(&data->readings[count].y, + (buffer + buff_offset), enc_data->fifo_read_mode, + ADXL367_Y_AXIS, sample_aligned); + } + + if (enc_data->has_z) { + /* Z can have 2 samples in the packet before it or 0. */ + if (samples_before) { + if (packet_alignment == ADXL367_12B_PACKET_ALIGNED) { + sample_aligned = 1; + } else { + sample_aligned = 0; + } + buff_offset = 3; + } else { + if (packet_alignment == ADXL367_12B_PACKET_NOT_ALIGNED) { + sample_aligned = 0; + buff_offset = 0; + } + } + + adxl367_accel_convert_q31(&data->readings[count].z, + (buffer + buff_offset), enc_data->fifo_read_mode, + ADXL367_Z_AXIS, sample_aligned); + } + break; + + default: + ret = -ENOTSUP; + break; + } + + return ret; +} + +static void adxl367_get_12b_temp(const struct adxl367_fifo_data *enc_data, + struct sensor_q31_data *data, const uint8_t *buffer, int count, uint8_t packet_size) +{ + if (enc_data->has_tmp) { + uint8_t offset = ((packet_size - 1) * 12) / 8; + uint8_t start_offset = ((packet_size - 1) * 12) % 8; + uint8_t sample_aligned = 1; + + if (start_offset) { + sample_aligned = 0; + } + + adxl367_temp_convert_q31(&data->readings[count].temperature, + (buffer + offset), enc_data->fifo_read_mode, + sample_aligned); + } +} + +static int adxl367_decode_12b_stream(const uint8_t *buffer, struct sensor_chan_spec chan_spec, + uint32_t *fit, uint16_t max_count, void *data_out, + const struct adxl367_fifo_data *enc_data) +{ + const uint8_t *buffer_end = + buffer + sizeof(struct adxl367_fifo_data) + enc_data->fifo_byte_count; + uint8_t packet_size = enc_data->packet_size; + uint64_t period_ns = accel_period_ns[enc_data->accel_odr]; + uint8_t sample_num = 0; + int count = 0; + uint8_t packet_alignment = ADXL367_12B_PACKET_ALIGNED; + + while (count < max_count && buffer < buffer_end) { + const uint8_t *sample_end = buffer; + + /* For ADXL367_12B mode packet_size is number of samples in one + * packet. If packet size is not aligned, sample_end will be on + * the byte that contains part of a last sample. + */ + if (packet_alignment == ADXL367_12B_PACKET_ALIGNED) { + sample_end += (packet_size * 12) / 8; + } else { + sample_end += (packet_size * 12) / 8 + 1; + } + + /* If fit is larger than buffer this frame was already decoded, + * move on to the next frame. + */ + if ((uintptr_t)buffer < *fit) { + /* If number of samples in one packet is odd number, + * alignment changes for each packet. + */ + if (enc_data->packet_size % 2) { + if (packet_alignment == ADXL367_12B_PACKET_ALIGNED) { + packet_alignment = ADXL367_12B_PACKET_NOT_ALIGNED; + } else { + packet_alignment = ADXL367_12B_PACKET_ALIGNED; + } + } + + buffer = sample_end; + + sample_num++; + continue; + } + + if (chan_spec.chan_type == SENSOR_CHAN_DIE_TEMP) { + struct sensor_q31_data *data = (struct sensor_q31_data *)data_out; + + memset(data, 0, sizeof(struct sensor_three_axis_data)); + data->header.base_timestamp_ns = enc_data->timestamp; + data->header.reading_count = 1; + data->shift = 8; + + data->readings[count].timestamp_delta = + period_ns * sample_num; + + adxl367_get_12b_temp(enc_data, data, buffer, count, packet_size); + } else { + struct sensor_three_axis_data *data = + (struct sensor_three_axis_data *)data_out; + + memset(data, 0, sizeof(struct sensor_three_axis_data)); + data->header.base_timestamp_ns = enc_data->timestamp; + data->header.reading_count = 1; + data->shift = range_to_shift[enc_data->range]; + + int ret = adxl367_get_12b_accel(enc_data, data, buffer, count, packet_size, + chan_spec, packet_alignment, period_ns, sample_num); + + if (ret != 0) { + return ret; + } + } + + buffer = sample_end; + *fit = (uintptr_t)sample_end; + count++; + } + + return count; +} + +static int adxl367_decode_stream(const uint8_t *buffer, struct sensor_chan_spec chan_spec, + uint32_t *fit, uint16_t max_count, void *data_out) +{ + const struct adxl367_fifo_data *enc_data = (const struct adxl367_fifo_data *)buffer; + const uint8_t *buffer_end = + buffer + sizeof(struct adxl367_fifo_data) + enc_data->fifo_byte_count; + int count = 0; + uint8_t sample_num = 0; + + if ((uintptr_t)buffer_end <= *fit || chan_spec.chan_idx != 0) { + return 0; + } + + buffer += sizeof(struct adxl367_fifo_data); + + uint8_t packet_size = enc_data->packet_size; + uint64_t period_ns = accel_period_ns[enc_data->accel_odr]; + uint8_t sample_size = 2; + + if (enc_data->fifo_read_mode == ADXL367_8B) { + sample_size = 1; + } + + if (enc_data->fifo_read_mode == ADXL367_12B) { + count = adxl367_decode_12b_stream(buffer, chan_spec, fit, max_count, + data_out, enc_data); + } else { + /* Calculate which sample is decoded. */ + if ((uint8_t *)*fit >= buffer) { + sample_num = ((uint8_t *)*fit - buffer) / packet_size; + } + + while (count < max_count && buffer < buffer_end) { + const uint8_t *sample_end = buffer; + + sample_end += packet_size; + + if ((uintptr_t)buffer < *fit) { + /* This frame was already decoded, move on to the next frame */ + buffer = sample_end; + continue; + } + + if (chan_spec.chan_type == SENSOR_CHAN_DIE_TEMP) { + struct sensor_q31_data *data = (struct sensor_q31_data *)data_out; + + memset(data, 0, sizeof(struct sensor_three_axis_data)); + data->header.base_timestamp_ns = enc_data->timestamp; + data->header.reading_count = 1; + data->shift = 8; + + data->readings[count].timestamp_delta = + period_ns * sample_num; + + if (enc_data->has_tmp) { + uint8_t offset = (packet_size - 1) * sample_size; + + adxl367_temp_convert_q31(&data->readings[count].temperature, + (buffer + offset), enc_data->fifo_read_mode, 1); + } + } else { + struct sensor_three_axis_data *data = + (struct sensor_three_axis_data *)data_out; + + memset(data, 0, sizeof(struct sensor_three_axis_data)); + data->header.base_timestamp_ns = enc_data->timestamp; + data->header.reading_count = 1; + data->shift = range_to_shift[enc_data->range]; + + int ret = adxl367_get_accel(enc_data, data, buffer, count, + sample_size, chan_spec, + period_ns, sample_num); + + if (ret != 0) { + return ret; + } + } + + buffer = sample_end; + *fit = (uintptr_t)sample_end; + count++; + } + } + + return count; +} + +uint16_t adxl367_get_frame_count(const struct adxl367_fifo_data *data) +{ + uint16_t frame_count = 0; + + if (data->fifo_read_mode == ADXL367_12B) { + frame_count = data->fifo_byte_count * 8 / (data->packet_size * 12); + } else { + frame_count = data->fifo_byte_count / data->packet_size; + } + + return frame_count; +} + +#endif /* CONFIG_ADXL367_STREAM */ + +static int adxl367_decoder_get_frame_count(const uint8_t *buffer, + struct sensor_chan_spec chan_spec, + uint16_t *frame_count) +{ + int32_t ret = -ENOTSUP; + + if (chan_spec.chan_idx != 0) { + return ret; + } + +#ifdef CONFIG_ADXL367_STREAM + const struct adxl367_fifo_data *data = (const struct adxl367_fifo_data *)buffer; + + if (!data->is_fifo) { +#endif /* CONFIG_ADXL367_STREAM */ + switch (chan_spec.chan_type) { + case SENSOR_CHAN_ACCEL_X: + case SENSOR_CHAN_ACCEL_Y: + case SENSOR_CHAN_ACCEL_Z: + case SENSOR_CHAN_ACCEL_XYZ: + *frame_count = 1; + ret = 0; + break; + + default: + break; + } +#ifdef CONFIG_ADXL367_STREAM + } else { + if (data->fifo_byte_count == 0) { + *frame_count = 0; + ret = 0; + } else { + switch (chan_spec.chan_type) { + case SENSOR_CHAN_ACCEL_X: + if (data->has_x) { + *frame_count = adxl367_get_frame_count(data); + ret = 0; + } + break; + + case SENSOR_CHAN_ACCEL_Y: + if (data->has_y) { + *frame_count = adxl367_get_frame_count(data); + ret = 0; + } + break; + + case SENSOR_CHAN_ACCEL_Z: + if (data->has_z) { + *frame_count = adxl367_get_frame_count(data); + ret = 0; + } + break; + + case SENSOR_CHAN_ACCEL_XYZ: + if (data->has_x || data->has_y || data->has_z) { + *frame_count = adxl367_get_frame_count(data); + ret = 0; + } + break; + + case SENSOR_CHAN_DIE_TEMP: + if (data->has_tmp) { + *frame_count = adxl367_get_frame_count(data); + ret = 0; + break; + } + break; + + default: + break; + } + } + } +#endif /* CONFIG_ADXL367_STREAM */ + + return ret; +} + +static int adxl367_decode_sample(const struct adxl367_sample_data *data, + struct sensor_chan_spec chan_spec, uint32_t *fit, uint16_t max_count, void *data_out) +{ + struct sensor_value *out = (struct sensor_value *) data_out; + + if (*fit > 0) { + return -ENOTSUP; + } + + switch (chan_spec.chan_type) { + case SENSOR_CHAN_ACCEL_X: /* Acceleration on the X axis, in m/s^2. */ + adxl367_accel_convert(out, data->xyz.x, data->xyz.range); + break; + case SENSOR_CHAN_ACCEL_Y: /* Acceleration on the Y axis, in m/s^2. */ + adxl367_accel_convert(out, data->xyz.y, data->xyz.range); + break; + case SENSOR_CHAN_ACCEL_Z: /* Acceleration on the Z axis, in m/s^2. */ + adxl367_accel_convert(out, data->xyz.z, data->xyz.range); + break; + case SENSOR_CHAN_ACCEL_XYZ: /* Acceleration on the XYZ axis, in m/s^2. */ + adxl367_accel_convert(out++, data->xyz.x, data->xyz.range); + adxl367_accel_convert(out++, data->xyz.y, data->xyz.range); + adxl367_accel_convert(out, data->xyz.z, data->xyz.range); + break; + case SENSOR_CHAN_DIE_TEMP: /* Temperature in degrees Celsius. */ + adxl367_temp_convert(out, data->raw_temp); + break; + default: + return -ENOTSUP; + } + + *fit = 1; + + return 0; +} + +static int adxl367_decoder_decode(const uint8_t *buffer, struct sensor_chan_spec chan_spec, + uint32_t *fit, uint16_t max_count, void *data_out) +{ + const struct adxl367_sample_data *data = (const struct adxl367_sample_data *)buffer; + +#ifdef CONFIG_ADXL367_STREAM + if (data->is_fifo) { + return adxl367_decode_stream(buffer, chan_spec, fit, max_count, data_out); + } +#endif /* CONFIG_ADXL367_STREAM */ + + return adxl367_decode_sample(data, chan_spec, fit, max_count, data_out); +} + +static bool adxl367_decoder_has_trigger(const uint8_t *buffer, enum sensor_trigger_type trigger) +{ + const struct adxl367_fifo_data *data = (const struct adxl367_fifo_data *)buffer; + + if (!data->is_fifo) { + return false; + } + + switch (trigger) { + case SENSOR_TRIG_DATA_READY: + return (ADXL367_STATUS_DATA_RDY & data->int_status); + case SENSOR_TRIG_FIFO_WATERMARK: + return (ADXL367_STATUS_FIFO_WATERMARK & data->int_status); + case SENSOR_TRIG_FIFO_FULL: + return (ADXL367_STATUS_FIFO_WATERMARK & data->int_status); + default: + return false; + } +} + +SENSOR_DECODER_API_DT_DEFINE() = { + .get_frame_count = adxl367_decoder_get_frame_count, + .decode = adxl367_decoder_decode, + .has_trigger = adxl367_decoder_has_trigger, +}; + +int adxl367_get_decoder(const struct device *dev, const struct sensor_decoder_api **decoder) +{ + ARG_UNUSED(dev); + *decoder = &SENSOR_DECODER_NAME(); + + return 0; +} diff --git a/drivers/sensor/adi/adxl367/adxl367_rtio.c b/drivers/sensor/adi/adxl367/adxl367_rtio.c new file mode 100644 index 000000000000000..b19ec800ca9a559 --- /dev/null +++ b/drivers/sensor/adi/adxl367/adxl367_rtio.c @@ -0,0 +1,74 @@ +/* + * Copyright (c) 2024 Analog Devices Inc. + * + * SPDX-License-Identifier: Apache-2.0 + */ + +#include +#include +#include + +#include "adxl367.h" + +LOG_MODULE_DECLARE(ADXL367, CONFIG_SENSOR_LOG_LEVEL); + +static void adxl367_submit_fetch(struct rtio_iodev_sqe *iodev_sqe) +{ + const struct sensor_read_config *cfg = + (const struct sensor_read_config *) iodev_sqe->sqe.iodev->data; + const struct device *dev = cfg->sensor; + struct adxl367_data *data = dev->data; + int rc; + uint32_t min_buffer_len = sizeof(struct adxl367_sample_data); + uint8_t *buffer; + uint32_t buffer_len; + + rc = rtio_sqe_rx_buf(iodev_sqe, min_buffer_len, min_buffer_len, &buffer, &buffer_len); + if (rc != 0) { + LOG_ERR("Failed to get a read buffer of size %u bytes", min_buffer_len); + rtio_iodev_sqe_err(iodev_sqe, rc); + return; + } + + struct adxl367_sample_data *enc_data = (struct adxl367_sample_data *)buffer; + +#ifdef CONFIG_ADXL367_STREAM + enc_data->is_fifo = 0; +#endif /*CONFIG_ADXL367_STREAM*/ + + rc = adxl367_get_accel_data(dev, &enc_data->xyz); + if (rc != 0) { + LOG_ERR("Failed to fetch xyz samples"); + rtio_iodev_sqe_err(iodev_sqe, rc); + return; + } + + enc_data->xyz.range = data->range; + + rc = adxl367_get_temp_data(dev, &enc_data->raw_temp); + if (rc != 0) { + LOG_ERR("Failed to fetch temp samples"); + rtio_iodev_sqe_err(iodev_sqe, rc); + return; + } + + rtio_iodev_sqe_ok(iodev_sqe, 0); +} + +void adxl367_submit(const struct device *dev, struct rtio_iodev_sqe *iodev_sqe) +{ + const struct sensor_read_config *cfg = + (const struct sensor_read_config *) iodev_sqe->sqe.iodev->data; + + if (!cfg->is_streaming) { + struct rtio_work_req *req = rtio_work_req_alloc(); + + __ASSERT_NO_MSG(req); + + rtio_work_req_submit(req, iodev_sqe, adxl367_submit_fetch); + } else if (IS_ENABLED(CONFIG_ADXL367_STREAM)) { + adxl367_submit_stream(dev, iodev_sqe); + } else { + rtio_iodev_sqe_err(iodev_sqe, -ENOTSUP); + } +} diff --git a/drivers/sensor/adi/adxl367/adxl367_stream.c b/drivers/sensor/adi/adxl367/adxl367_stream.c new file mode 100644 index 000000000000000..5826ed8d6cc2f4d --- /dev/null +++ b/drivers/sensor/adi/adxl367/adxl367_stream.c @@ -0,0 +1,558 @@ +/* + * Copyright (c) 2024 Analog Devices Inc. + * + * SPDX-License-Identifier: Apache-2.0 + */ + +#include +#include + +#include "adxl367.h" + +LOG_MODULE_DECLARE(ADXL362, CONFIG_SENSOR_LOG_LEVEL); + +static void adxl367_sqe_done(const struct adxl367_dev_config *cfg, + struct rtio_iodev_sqe *iodev_sqe, int res) +{ + if (res < 0) { + rtio_iodev_sqe_err(iodev_sqe, res); + } else { + rtio_iodev_sqe_ok(iodev_sqe, res); + } + + gpio_pin_interrupt_configure_dt(&cfg->interrupt, GPIO_INT_EDGE_TO_ACTIVE); +} + +static void adxl367_irq_en_cb(struct rtio *r, const struct rtio_sqe *sqr, void *arg) +{ + const struct device *dev = (const struct device *)arg; + const struct adxl367_dev_config *cfg = dev->config; + + gpio_pin_interrupt_configure_dt(&cfg->interrupt, GPIO_INT_EDGE_TO_ACTIVE); +} + +static void adxl367_fifo_flush_rtio(const struct device *dev) +{ + struct adxl367_data *data = dev->data; + uint8_t pow_reg = data->pwr_reg; + + pow_reg &= ~ADXL367_POWER_CTL_MEASURE_MSK; + pow_reg |= FIELD_PREP(ADXL367_POWER_CTL_MEASURE_MSK, ADXL367_STANDBY); + + struct rtio_sqe *sqe = rtio_sqe_acquire(data->rtio_ctx); + const uint8_t reg_addr_w[3] = {ADXL367_SPI_WRITE_REG, ADXL367_POWER_CTL, pow_reg}; + + rtio_sqe_prep_tiny_write(sqe, data->iodev, RTIO_PRIO_NORM, reg_addr_w, 3, NULL); + + sqe = rtio_sqe_acquire(data->rtio_ctx); + const uint8_t reg_addr_w2[3] = {ADXL367_SPI_WRITE_REG, ADXL367_FIFO_CONTROL, + FIELD_PREP(ADXL367_FIFO_CONTROL_FIFO_MODE_MSK, ADXL367_FIFO_DISABLED)}; + + rtio_sqe_prep_tiny_write(sqe, data->iodev, RTIO_PRIO_NORM, reg_addr_w2, 3, NULL); + + sqe = rtio_sqe_acquire(data->rtio_ctx); + const uint8_t reg_addr_w3[3] = {ADXL367_SPI_WRITE_REG, ADXL367_FIFO_CONTROL, + FIELD_PREP(ADXL367_FIFO_CONTROL_FIFO_MODE_MSK, data->fifo_config.fifo_mode)}; + + rtio_sqe_prep_tiny_write(sqe, data->iodev, RTIO_PRIO_NORM, reg_addr_w3, 3, NULL); + + pow_reg = data->pwr_reg; + + pow_reg &= ~ADXL367_POWER_CTL_MEASURE_MSK; + pow_reg |= FIELD_PREP(ADXL367_POWER_CTL_MEASURE_MSK, ADXL367_MEASURE); + + sqe = rtio_sqe_acquire(data->rtio_ctx); + struct rtio_sqe *complete_op = rtio_sqe_acquire(data->rtio_ctx); + const uint8_t reg_addr_w4[3] = {ADXL367_SPI_WRITE_REG, ADXL367_POWER_CTL, pow_reg}; + + rtio_sqe_prep_tiny_write(sqe, data->iodev, RTIO_PRIO_NORM, reg_addr_w4, 3, NULL); + sqe->flags |= RTIO_SQE_CHAINED; + rtio_sqe_prep_callback(complete_op, adxl367_irq_en_cb, (void *)dev, NULL); + rtio_submit(data->rtio_ctx, 0); +} + +void adxl367_submit_stream(const struct device *dev, struct rtio_iodev_sqe *iodev_sqe) +{ + const struct sensor_read_config *cfg = + (const struct sensor_read_config *)iodev_sqe->sqe.iodev->data; + struct adxl367_data *data = (struct adxl367_data *)dev->data; + const struct adxl367_dev_config *cfg_367 = dev->config; + uint8_t int_mask = 0; + uint8_t int_value = 0; + uint8_t fifo_wmark_irq = 0; + uint8_t fifo_full_irq = 0; + + int rc = gpio_pin_interrupt_configure_dt(&cfg_367->interrupt, + GPIO_INT_DISABLE); + if (rc < 0) { + return; + } + + for (size_t i = 0; i < cfg->count; i++) { + if (cfg->triggers[i].trigger == SENSOR_TRIG_FIFO_WATERMARK) { + int_mask |= ADXL367_FIFO_WATERMARK; + int_value |= ADXL367_FIFO_WATERMARK; + fifo_wmark_irq = 1; + } + + if (cfg->triggers[i].trigger == SENSOR_TRIG_FIFO_FULL) { + int_mask |= ADXL367_FIFO_OVERRUN; + int_value |= ADXL367_FIFO_OVERRUN; + fifo_full_irq = 1; + } + } + + if (data->fifo_wmark_irq && (fifo_wmark_irq == 0)) { + int_mask |= ADXL367_FIFO_WATERMARK; + } + + if (data->fifo_full_irq && (fifo_full_irq == 0)) { + int_mask |= ADXL367_FIFO_OVERRUN; + } + + /* Do not flush the FIFO if interrupts are already enabled. */ + if ((fifo_wmark_irq != data->fifo_wmark_irq) || (fifo_full_irq != data->fifo_full_irq)) { + data->fifo_wmark_irq = fifo_wmark_irq; + data->fifo_full_irq = fifo_full_irq; + + rc = data->hw_tf->write_reg_mask(dev, ADXL367_INTMAP1_LOWER, int_mask, int_value); + if (rc < 0) { + return; + } + + /* Flush the FIFO by disabling it. Save current mode for after the reset. */ + enum adxl367_fifo_mode current_fifo_mode = data->fifo_config.fifo_mode; + + if (current_fifo_mode == ADXL367_FIFO_DISABLED) { + LOG_ERR("ERROR: FIFO DISABLED"); + return; + } + + adxl367_set_op_mode(dev, ADXL367_STANDBY); + + adxl367_fifo_setup(dev, ADXL367_FIFO_DISABLED, data->fifo_config.fifo_format, + data->fifo_config.fifo_read_mode, data->fifo_config.fifo_samples); + + adxl367_fifo_setup(dev, current_fifo_mode, data->fifo_config.fifo_format, + data->fifo_config.fifo_read_mode, data->fifo_config.fifo_samples); + + adxl367_set_op_mode(dev, cfg_367->op_mode); + } + + rc = gpio_pin_interrupt_configure_dt(&cfg_367->interrupt, + GPIO_INT_EDGE_TO_ACTIVE); + if (rc < 0) { + return; + } + + data->sqe = iodev_sqe; +} + +static void adxl367_fifo_read_cb(struct rtio *rtio_ctx, const struct rtio_sqe *sqe, void *arg) +{ + const struct device *dev = (const struct device *)arg; + const struct adxl367_dev_config *cfg = (const struct adxl367_dev_config *)dev->config; + struct rtio_iodev_sqe *iodev_sqe = sqe->userdata; + + adxl367_sqe_done(cfg, iodev_sqe, 0); +} + +size_t adxl367_get_numb_of_samp_in_pkt(const struct adxl367_data *data) +{ + size_t sample_numb; + + switch (data->fifo_config.fifo_format) { + case ADXL367_FIFO_FORMAT_X: + case ADXL367_FIFO_FORMAT_Y: + case ADXL367_FIFO_FORMAT_Z: + sample_numb = 1; + break; + + case ADXL367_FIFO_FORMAT_XT: + case ADXL367_FIFO_FORMAT_YT: + case ADXL367_FIFO_FORMAT_ZT: + case ADXL367_FIFO_FORMAT_XA: + case ADXL367_FIFO_FORMAT_YA: + case ADXL367_FIFO_FORMAT_ZA: + sample_numb = 2; + break; + + case ADXL367_FIFO_FORMAT_XYZT: + case ADXL367_FIFO_FORMAT_XYZA: + sample_numb = 4; + break; + + default: + sample_numb = 3; + break; + } + + return sample_numb; +} + +static void adxl367_process_fifo_samples_cb(struct rtio *r, const struct rtio_sqe *sqr, void *arg) +{ + const struct device *dev = (const struct device *)arg; + struct adxl367_data *data = (struct adxl367_data *)dev->data; + const struct adxl367_dev_config *cfg = (const struct adxl367_dev_config *)dev->config; + struct rtio_iodev_sqe *current_sqe = data->sqe; + uint16_t fifo_samples = ((data->fifo_ent[0]) | ((data->fifo_ent[1] & 0x3) << 8)); + size_t sample_numb = adxl367_get_numb_of_samp_in_pkt(data); + size_t packet_size = sample_numb; + uint16_t fifo_packet_cnt = fifo_samples / sample_numb; + uint16_t fifo_bytes = 0; + + switch (data->fifo_config.fifo_read_mode) { + case ADXL367_8B: + fifo_bytes = fifo_packet_cnt; + break; + case ADXL367_12B: + unsigned int fifo_bits = fifo_packet_cnt * sample_numb * 12; + + if (fifo_bits % 8 == 0) { + fifo_bytes = fifo_bits / 8; + } else { + while (fifo_bits % 8) { + if (fifo_bits >= sample_numb * 12) { + fifo_bits -= sample_numb * 12; + } else { + fifo_bits = 0; + break; + } + } + + if (fifo_bits) { + fifo_bytes = fifo_bits / 8; + } else { + LOG_ERR("fifo_bytes error: %d", fifo_bytes); + adxl367_sqe_done(cfg, current_sqe, -1); + return; + } + } + + packet_size = packet_size * 12 / 8; + if ((sample_numb * 12) % 8) { + packet_size++; + } + break; + + default: + fifo_bytes = fifo_packet_cnt * 2; + packet_size *= 2; + break; + } + + data->sqe = NULL; + + /* Not inherently an underrun/overrun as we may have a buffer to fill next time */ + if (current_sqe == NULL) { + LOG_ERR("No pending SQE"); + gpio_pin_interrupt_configure_dt(&cfg->interrupt, GPIO_INT_EDGE_TO_ACTIVE); + return; + } + + const size_t min_read_size = sizeof(struct adxl367_fifo_data) + packet_size; + const size_t ideal_read_size = sizeof(struct adxl367_fifo_data) + fifo_bytes; + + uint8_t *buf; + uint32_t buf_len; + + if (rtio_sqe_rx_buf(current_sqe, min_read_size, ideal_read_size, &buf, &buf_len) != 0) { + LOG_ERR("Failed to get buffer"); + adxl367_sqe_done(cfg, current_sqe, -ENOMEM); + return; + } + + LOG_DBG("Requesting buffer [%u, %u] got %u", (unsigned int)min_read_size, + (unsigned int)ideal_read_size, buf_len); + + /* Read FIFO and call back to rtio with rtio_sqe completion */ + struct adxl367_fifo_data *hdr = (struct adxl367_fifo_data *)buf; + + hdr->is_fifo = 1; + hdr->timestamp = data->timestamp; + hdr->int_status = data->status; + hdr->accel_odr = data->odr; + hdr->range = data->range; + hdr->fifo_read_mode = data->fifo_config.fifo_read_mode; + + if (data->fifo_config.fifo_read_mode == ADXL367_12B) { + hdr->packet_size = sample_numb; + } else { + hdr->packet_size = packet_size; + } + + if ((data->fifo_config.fifo_format == ADXL367_FIFO_FORMAT_X) || + (data->fifo_config.fifo_format == ADXL367_FIFO_FORMAT_XT) || + (data->fifo_config.fifo_format == ADXL367_FIFO_FORMAT_XA) || + (data->fifo_config.fifo_format == ADXL367_FIFO_FORMAT_XYZ) || + (data->fifo_config.fifo_format == ADXL367_FIFO_FORMAT_XYZA) || + (data->fifo_config.fifo_format == ADXL367_FIFO_FORMAT_XYZT)) { + hdr->has_x = 1; + } + + if ((data->fifo_config.fifo_format == ADXL367_FIFO_FORMAT_Y) || + (data->fifo_config.fifo_format == ADXL367_FIFO_FORMAT_YT) || + (data->fifo_config.fifo_format == ADXL367_FIFO_FORMAT_YA) || + (data->fifo_config.fifo_format == ADXL367_FIFO_FORMAT_XYZ) || + (data->fifo_config.fifo_format == ADXL367_FIFO_FORMAT_XYZA) || + (data->fifo_config.fifo_format == ADXL367_FIFO_FORMAT_XYZT)) { + hdr->has_y = 1; + } + + if ((data->fifo_config.fifo_format == ADXL367_FIFO_FORMAT_Z) || + (data->fifo_config.fifo_format == ADXL367_FIFO_FORMAT_ZT) || + (data->fifo_config.fifo_format == ADXL367_FIFO_FORMAT_ZA) || + (data->fifo_config.fifo_format == ADXL367_FIFO_FORMAT_XYZ) || + (data->fifo_config.fifo_format == ADXL367_FIFO_FORMAT_XYZA) || + (data->fifo_config.fifo_format == ADXL367_FIFO_FORMAT_XYZT)) { + hdr->has_z = 1; + } + + if ((data->fifo_config.fifo_format == ADXL367_FIFO_FORMAT_XT) || + (data->fifo_config.fifo_format == ADXL367_FIFO_FORMAT_YT) || + (data->fifo_config.fifo_format == ADXL367_FIFO_FORMAT_ZT) || + (data->fifo_config.fifo_format == ADXL367_FIFO_FORMAT_XYZT)) { + hdr->has_tmp = 1; + } + + if ((data->fifo_config.fifo_format == ADXL367_FIFO_FORMAT_XA) || + (data->fifo_config.fifo_format == ADXL367_FIFO_FORMAT_YA) || + (data->fifo_config.fifo_format == ADXL367_FIFO_FORMAT_ZA) || + (data->fifo_config.fifo_format == ADXL367_FIFO_FORMAT_XYZA)) { + hdr->has_adc = 1; + } + + uint32_t buf_avail = buf_len; + + buf_avail -= sizeof(*hdr); + + uint32_t read_len = MIN(fifo_bytes, buf_avail); + + if (data->fifo_config.fifo_read_mode == ADXL367_12B) { + unsigned int read_bits = read_len * 8; + unsigned int packet_size_bits = sample_numb * 12; + unsigned int read_packet_num = read_bits / packet_size_bits; + unsigned int read_len_bits = read_packet_num * sample_numb * 12; + + if (read_len_bits % 8 == 0) { + read_len = read_len_bits / 8; + } else { + while (read_len_bits % 8) { + if (read_len_bits >= sample_numb * 12) { + read_len_bits -= sample_numb * 12; + } else { + read_len_bits = 0; + break; + } + } + + if (read_len_bits) { + read_len = read_len_bits / 8; + } else { + LOG_ERR("read_len error"); + adxl367_sqe_done(cfg, current_sqe, -ENOMEM); + return; + } + } + } else { + uint32_t pkts = read_len / packet_size; + + read_len = pkts * packet_size; + } + + ((struct adxl367_fifo_data *)buf)->fifo_byte_count = read_len; + + __ASSERT_NO_MSG(read_len % pkt_size == 0); + + uint8_t *read_buf = buf + sizeof(*hdr); + + /* Flush completions */ + struct rtio_cqe *cqe; + int res = 0; + + do { + cqe = rtio_cqe_consume(data->rtio_ctx); + if (cqe != NULL) { + if ((cqe->result < 0 && res == 0)) { + LOG_ERR("Bus error: %d", cqe->result); + res = cqe->result; + } + rtio_cqe_release(data->rtio_ctx, cqe); + } + } while (cqe != NULL); + + /* Bail/cancel attempt to read sensor on any error */ + if (res != 0) { + adxl367_sqe_done(cfg, current_sqe, res); + return; + } + + /* Setup new rtio chain to read the fifo data and report then check the + * result + */ + struct rtio_sqe *write_fifo_addr = rtio_sqe_acquire(data->rtio_ctx); + struct rtio_sqe *read_fifo_data = rtio_sqe_acquire(data->rtio_ctx); + struct rtio_sqe *complete_op = rtio_sqe_acquire(data->rtio_ctx); + const uint8_t reg_addr = ADXL367_SPI_READ_FIFO; + + rtio_sqe_prep_tiny_write(write_fifo_addr, data->iodev, RTIO_PRIO_NORM, ®_addr, 1, NULL); + write_fifo_addr->flags = RTIO_SQE_TRANSACTION; + rtio_sqe_prep_read(read_fifo_data, data->iodev, RTIO_PRIO_NORM, read_buf, read_len, + current_sqe); + read_fifo_data->flags = RTIO_SQE_CHAINED; + rtio_sqe_prep_callback(complete_op, adxl367_fifo_read_cb, (void *)dev, current_sqe); + + rtio_submit(data->rtio_ctx, 0); +} + +static void adxl367_process_status_cb(struct rtio *r, const struct rtio_sqe *sqr, void *arg) +{ + const struct device *dev = (const struct device *)arg; + struct adxl367_data *data = (struct adxl367_data *) dev->data; + const struct adxl367_dev_config *cfg = (const struct adxl367_dev_config *) dev->config; + struct rtio_iodev_sqe *current_sqe = data->sqe; + struct sensor_read_config *read_config; + uint8_t status = data->status; + + __ASSERT(data->sqe != NULL, "%s data->sqe = NULL", __func__); + + read_config = (struct sensor_read_config *)data->sqe->sqe.iodev->data; + + __ASSERT(read_config != NULL, "%s read_config = NULL", __func__); + + __ASSERT(read_config->is_streaming != false, + "%s read_config->is_streaming = false", __func__); + + gpio_pin_interrupt_configure_dt(&cfg->interrupt, GPIO_INT_DISABLE); + + struct sensor_stream_trigger *fifo_wmark_cfg = NULL; + struct sensor_stream_trigger *fifo_full_cfg = NULL; + + for (int i = 0; i < read_config->count; ++i) { + if (read_config->triggers[i].trigger == SENSOR_TRIG_FIFO_WATERMARK) { + fifo_wmark_cfg = &read_config->triggers[i]; + continue; + } + + if (read_config->triggers[i].trigger == SENSOR_TRIG_FIFO_FULL) { + fifo_full_cfg = &read_config->triggers[i]; + continue; + } + } + + bool fifo_full_irq = false; + bool fifo_wmark_irq = false; + + if ((fifo_wmark_cfg != NULL) && FIELD_GET(ADXL367_STATUS_FIFO_WATERMARK, status)) { + fifo_wmark_irq = true; + } + + if ((fifo_full_cfg != NULL) && FIELD_GET(ADXL367_STATUS_FIFO_OVERRUN, status)) { + fifo_full_irq = true; + } + + if (!fifo_full_irq && !fifo_wmark_irq) { + gpio_pin_interrupt_configure_dt(&cfg->interrupt, GPIO_INT_EDGE_TO_ACTIVE); + return; + } + + /* Flush completions */ + struct rtio_cqe *cqe; + int res = 0; + + do { + cqe = rtio_cqe_consume(data->rtio_ctx); + if (cqe != NULL) { + if ((cqe->result < 0 && res == 0)) { + LOG_ERR("Bus error: %d", cqe->result); + res = cqe->result; + } + rtio_cqe_release(data->rtio_ctx, cqe); + } + } while (cqe != NULL); + + /* Bail/cancel attempt to read sensor on any error */ + if (res != 0) { + adxl367_sqe_done(cfg, current_sqe, res); + return; + } + + enum sensor_stream_data_opt data_opt; + + if ((fifo_wmark_cfg != NULL) && (fifo_full_cfg == NULL)) { + data_opt = fifo_wmark_cfg->opt; + } else if ((fifo_wmark_cfg == NULL) && (fifo_full_cfg != NULL)) { + data_opt = fifo_full_cfg->opt; + } else { + data_opt = MIN(fifo_wmark_cfg->opt, fifo_full_cfg->opt); + } + + if (data_opt == SENSOR_STREAM_DATA_NOP || data_opt == SENSOR_STREAM_DATA_DROP) { + uint8_t *buf; + uint32_t buf_len; + + /* Clear streaming_sqe since we're done with the call */ + data->sqe = NULL; + if (rtio_sqe_rx_buf(current_sqe, sizeof(struct adxl367_fifo_data), + sizeof(struct adxl367_fifo_data), &buf, &buf_len) != 0) { + adxl367_sqe_done(cfg, current_sqe, -ENOMEM); + return; + } + + struct adxl367_fifo_data *rx_data = (struct adxl367_fifo_data *)buf; + + memset(buf, 0, buf_len); + rx_data->is_fifo = 1; + rx_data->timestamp = data->timestamp; + rx_data->int_status = status; + rx_data->fifo_byte_count = 0; + + if (data_opt == SENSOR_STREAM_DATA_DROP) { + /* Flush the FIFO by disabling it. Save current mode for after the reset. */ + adxl367_fifo_flush_rtio(dev); + return; + } + + adxl367_sqe_done(cfg, current_sqe, 0); + return; + } + + struct rtio_sqe *write_fifo_addr = rtio_sqe_acquire(data->rtio_ctx); + struct rtio_sqe *read_fifo_data = rtio_sqe_acquire(data->rtio_ctx); + struct rtio_sqe *complete_op = rtio_sqe_acquire(data->rtio_ctx); + const uint8_t reg[2] = {ADXL367_SPI_READ_REG, ADXL367_FIFO_ENTRIES_L}; + + rtio_sqe_prep_tiny_write(write_fifo_addr, data->iodev, RTIO_PRIO_NORM, reg, 2, NULL); + write_fifo_addr->flags = RTIO_SQE_TRANSACTION; + rtio_sqe_prep_read(read_fifo_data, data->iodev, RTIO_PRIO_NORM, data->fifo_ent, 2, + current_sqe); + read_fifo_data->flags = RTIO_SQE_CHAINED; + rtio_sqe_prep_callback(complete_op, adxl367_process_fifo_samples_cb, (void *)dev, + current_sqe); + + rtio_submit(data->rtio_ctx, 0); +} + +void adxl367_stream_irq_handler(const struct device *dev) +{ + struct adxl367_data *data = (struct adxl367_data *) dev->data; + + if (data->sqe == NULL) { + return; + } + + data->timestamp = k_ticks_to_ns_floor64(k_uptime_ticks()); + + struct rtio_sqe *write_status_addr = rtio_sqe_acquire(data->rtio_ctx); + struct rtio_sqe *read_status_reg = rtio_sqe_acquire(data->rtio_ctx); + struct rtio_sqe *check_status_reg = rtio_sqe_acquire(data->rtio_ctx); + const uint8_t reg[2] = {ADXL367_SPI_READ_REG, ADXL367_STATUS}; + + rtio_sqe_prep_tiny_write(write_status_addr, data->iodev, RTIO_PRIO_NORM, reg, 2, NULL); + write_status_addr->flags = RTIO_SQE_TRANSACTION; + rtio_sqe_prep_read(read_status_reg, data->iodev, RTIO_PRIO_NORM, &data->status, 1, NULL); + read_status_reg->flags = RTIO_SQE_CHAINED; + rtio_sqe_prep_callback(check_status_reg, adxl367_process_status_cb, (void *)dev, NULL); + rtio_submit(data->rtio_ctx, 0); +} diff --git a/drivers/sensor/adi/adxl367/adxl367_trigger.c b/drivers/sensor/adi/adxl367/adxl367_trigger.c index 3c466f5087fa441..d33fbbb5659cb59 100644 --- a/drivers/sensor/adi/adxl367/adxl367_trigger.c +++ b/drivers/sensor/adi/adxl367/adxl367_trigger.c @@ -16,6 +16,7 @@ #include LOG_MODULE_DECLARE(ADXL367, CONFIG_SENSOR_LOG_LEVEL); +#if defined(CONFIG_ADXL367_TRIGGER_OWN_THREAD) || defined(CONFIG_ADXL367_TRIGGER_GLOBAL_THREAD) static void adxl367_thread_cb(const struct device *dev) { const struct adxl367_dev_config *cfg = dev->config; @@ -45,6 +46,7 @@ static void adxl367_thread_cb(const struct device *dev) GPIO_INT_EDGE_TO_ACTIVE); __ASSERT(ret == 0, "Interrupt configuration failed"); } +#endif /* CONFIG_ADXL367_TRIGGER_OWN_THREAD || CONFIG_ADXL367_TRIGGER_GLOBAL_THREAD */ static void adxl367_gpio_callback(const struct device *dev, struct gpio_callback *cb, uint32_t pins) @@ -55,6 +57,10 @@ static void adxl367_gpio_callback(const struct device *dev, gpio_pin_interrupt_configure_dt(&cfg->interrupt, GPIO_INT_DISABLE); + if (IS_ENABLED(CONFIG_ADXL367_STREAM)) { + adxl367_stream_irq_handler(drv_data->dev); + } + #if defined(CONFIG_ADXL367_TRIGGER_OWN_THREAD) k_sem_give(&drv_data->gpio_sem); #elif defined(CONFIG_ADXL367_TRIGGER_GLOBAL_THREAD) diff --git a/drivers/sensor/bosch/bme280/bme280.c b/drivers/sensor/bosch/bme280/bme280.c index 909b62a0d5d0dd1..acbb48152c2d616 100644 --- a/drivers/sensor/bosch/bme280/bme280.c +++ b/drivers/sensor/bosch/bme280/bme280.c @@ -26,6 +26,13 @@ LOG_MODULE_REGISTER(BME280, CONFIG_SENSOR_LOG_LEVEL); #warning "BME280 driver enabled without any devices" #endif +/* Maximum oversampling rate on each channel is 16x. + * Maximum measurement time is given by (Datasheet appendix B 9.1): + * 1.25 + [2.3 * T_over] + [2.3 * P_over + 0.575] + [2.3 * H_over + 0.575] + * = 112.8 ms + */ +#define BME280_MEASUREMENT_TIMEOUT_MS 150 + struct bme280_config { union bme280_bus bus; const struct bme280_bus_io *bus_io; @@ -116,8 +123,9 @@ static uint32_t bme280_compensate_humidity(struct bme280_data *data, return (uint32_t)(h >> 12); } -static int bme280_wait_until_ready(const struct device *dev) +static int bme280_wait_until_ready(const struct device *dev, k_timeout_t timeout) { + k_timepoint_t end = sys_timepoint_calc(timeout); uint8_t status; int ret; @@ -130,6 +138,10 @@ static int bme280_wait_until_ready(const struct device *dev) if (!(status & (BME280_STATUS_MEASURING | BME280_STATUS_IM_UPDATE))) { break; } + /* Check if waiting has timed out */ + if (sys_timepoint_expired(end)) { + return -EAGAIN; + } k_sleep(K_MSEC(3)); } @@ -163,7 +175,7 @@ int bme280_sample_fetch_helper(const struct device *dev, } #endif - ret = bme280_wait_until_ready(dev); + ret = bme280_wait_until_ready(dev, K_MSEC(BME280_MEASUREMENT_TIMEOUT_MS)); if (ret < 0) { return ret; } @@ -336,7 +348,8 @@ static int bme280_chip_init(const struct device *dev) LOG_DBG("Soft-reset failed: %d", err); } - err = bme280_wait_until_ready(dev); + /* The only mention of a soft reset duration is 2ms from the self test timeouts */ + err = bme280_wait_until_ready(dev, K_MSEC(100)); if (err < 0) { return err; } diff --git a/drivers/serial/Kconfig.rcar b/drivers/serial/Kconfig.rcar index 8f2c0c2b9abfd89..f318cd30f5f03c6 100644 --- a/drivers/serial/Kconfig.rcar +++ b/drivers/serial/Kconfig.rcar @@ -9,5 +9,6 @@ config UART_RCAR depends on DT_HAS_RENESAS_RCAR_SCIF_ENABLED || DT_HAS_RENESAS_RCAR_HSCIF_ENABLED select SERIAL_HAS_DRIVER select SERIAL_SUPPORT_INTERRUPT + select PINCTRL help Enable Renesas R-Car UART Driver. diff --git a/drivers/serial/Kconfig.rpi_pico b/drivers/serial/Kconfig.rpi_pico index e0549eeaff6d52e..a4a1c7cc5cc0880 100644 --- a/drivers/serial/Kconfig.rpi_pico +++ b/drivers/serial/Kconfig.rpi_pico @@ -8,4 +8,5 @@ config UART_RPI_PICO_PIO select SERIAL_HAS_DRIVER select PICOSDK_USE_PIO select PICOSDK_USE_CLAIM + select PINCTRL depends on RESET diff --git a/drivers/serial/uart_nrfx_uarte.c b/drivers/serial/uart_nrfx_uarte.c index 6acb6e44fbd88ba..91f3430e8b6dd74 100644 --- a/drivers/serial/uart_nrfx_uarte.c +++ b/drivers/serial/uart_nrfx_uarte.c @@ -353,16 +353,16 @@ static void uarte_nrfx_isr_int(const void *arg) if (txstopped && (IS_ENABLED(CONFIG_PM_DEVICE_RUNTIME) || LOW_POWER_ENABLED(config))) { unsigned int key = irq_lock(); - if (IS_ENABLED(CONFIG_PM_DEVICE_RUNTIME) && - (data->flags & UARTE_FLAG_POLL_OUT)) { - data->flags &= ~UARTE_FLAG_POLL_OUT; - pm_device_runtime_put(dev); + if (IS_ENABLED(CONFIG_PM_DEVICE_RUNTIME)) { + if (data->flags & UARTE_FLAG_POLL_OUT) { + data->flags &= ~UARTE_FLAG_POLL_OUT; + pm_device_runtime_put_async(dev, K_NO_WAIT); + } } else { nrf_uarte_disable(uarte); } - #ifdef UARTE_INTERRUPT_DRIVEN - if (!data->int_driven || data->int_driven->fifo_fill_lock == 0) + if (!data->int_driven) #endif { nrf_uarte_int_disable(uarte, NRF_UARTE_INT_TXSTOPPED_MASK); @@ -378,16 +378,20 @@ static void uarte_nrfx_isr_int(const void *arg) if (txstopped) { data->int_driven->fifo_fill_lock = 0; + if (!data->int_driven->tx_irq_enabled) { + + nrf_uarte_int_disable(uarte, NRF_UARTE_INT_TXSTOPPED_MASK); + } + if (data->int_driven->disable_tx_irq) { - nrf_uarte_int_disable(uarte, - NRF_UARTE_INT_TXSTOPPED_MASK); data->int_driven->disable_tx_irq = false; + if (IS_ENABLED(CONFIG_PM_DEVICE_RUNTIME)) { + pm_device_runtime_put_async(dev, K_NO_WAIT); + } return; } - } - if (nrf_uarte_event_check(uarte, NRF_UARTE_EVENT_ERROR)) { nrf_uarte_event_clear(uarte, NRF_UARTE_EVENT_ERROR); } @@ -1900,6 +1904,11 @@ static void uarte_nrfx_irq_tx_enable(const struct device *dev) { NRF_UARTE_Type *uarte = get_uarte_instance(dev); struct uarte_nrfx_data *data = dev->data; + + if (IS_ENABLED(CONFIG_PM_DEVICE_RUNTIME)) { + pm_device_runtime_get(dev); + } + unsigned int key = irq_lock(); data->int_driven->disable_tx_irq = false; diff --git a/drivers/spi/CMakeLists.txt b/drivers/spi/CMakeLists.txt index 36c21ba530a64cf..f6adb64ecd3663f 100644 --- a/drivers/spi/CMakeLists.txt +++ b/drivers/spi/CMakeLists.txt @@ -52,6 +52,7 @@ zephyr_library_sources_ifdef(CONFIG_SPI_AMBIQ_BLEIF spi_ambiq_bleif.c) zephyr_library_sources_ifdef(CONFIG_SPI_RPI_PICO_PIO spi_rpi_pico_pio.c) zephyr_library_sources_ifdef(CONFIG_SPI_MCHP_MSS spi_mchp_mss.c) zephyr_library_sources_ifdef(CONFIG_SPI_RENESAS_RA8 spi_b_renesas_ra8.c) +zephyr_library_sources_ifdef(CONFIG_SPI_RENESAS_RA spi_renesas_ra.c) zephyr_library_sources_ifdef(CONFIG_SPI_RTIO spi_rtio.c) zephyr_library_sources_ifdef(CONFIG_SPI_ASYNC spi_signal.c) zephyr_library_sources_ifdef(CONFIG_SPI_ITE_IT8XXX2 spi_it8xxx2.c) diff --git a/drivers/spi/Kconfig b/drivers/spi/Kconfig index 18345365b25e76a..e718e93f6534eea 100644 --- a/drivers/spi/Kconfig +++ b/drivers/spi/Kconfig @@ -165,4 +165,6 @@ source "drivers/spi/Kconfig.renesas_ra8" source "drivers/spi/Kconfig.it8xxx2" +source "drivers/spi/Kconfig.renesas_ra" + endif # SPI diff --git a/drivers/spi/Kconfig.pl022 b/drivers/spi/Kconfig.pl022 index fa4cd4b0fd7b498..65a0d0aedc3a8d0 100644 --- a/drivers/spi/Kconfig.pl022 +++ b/drivers/spi/Kconfig.pl022 @@ -4,6 +4,7 @@ config SPI_PL022 default y depends on DT_HAS_ARM_PL022_ENABLED + select PINCTRL if DT_HAS_RASPBERRYPI_PICO_SPI_ENABLED bool "ARM PL022 SPI driver" if SPI_PL022 diff --git a/drivers/spi/Kconfig.renesas_ra b/drivers/spi/Kconfig.renesas_ra new file mode 100644 index 000000000000000..f0e012d98ecbf1a --- /dev/null +++ b/drivers/spi/Kconfig.renesas_ra @@ -0,0 +1,35 @@ +# Renesas RA Family + +# Copyright (c) 2024 Renesas Electronics Corporation +# SPDX-License-Identifier: Apache-2.0 + +config SPI_RENESAS_RA + bool "Renesas RA SPI" + default y + depends on DT_HAS_RENESAS_RA_SPI_ENABLED + select USE_RA_FSP_SPI + select PINCTRL + help + Enable Renesas RA SPI Driver. + +if SPI_RENESAS_RA + +config SPI_INTERRUPT + bool "RA MCU SPI Interrupt Support" + help + Enable Interrupt support for the SPI Driver of RA family. + +config SPI_RA_DTC + bool "RA MCU SPI DTC Support" + select USE_RA_FSP_DTC + help + Enable the SPI DTC mode for SPI instances + +config SPI_USE_HW_SS + bool "RA MCU SPI Hardware Slave Select support" + default y + depends on !SOC_SERIES_RA2A1 + help + Use Slave Select pin instead of software Slave Select. + +endif # SPI_RENESAS_RA diff --git a/drivers/spi/Kconfig.rpi_pico b/drivers/spi/Kconfig.rpi_pico index eab5fb7bd8fe147..70bd45f19ecadac 100644 --- a/drivers/spi/Kconfig.rpi_pico +++ b/drivers/spi/Kconfig.rpi_pico @@ -7,5 +7,6 @@ config SPI_RPI_PICO_PIO depends on DT_HAS_RASPBERRYPI_PICO_SPI_PIO_ENABLED select PICOSDK_USE_PIO select PICOSDK_USE_CLAIM + select PINCTRL help Enable driving SPI via PIO on the PICO diff --git a/drivers/spi/spi_b_renesas_ra8.c b/drivers/spi/spi_b_renesas_ra8.c index 17b0c3c586b38fc..3fa55fafcb0ce8c 100644 --- a/drivers/spi/spi_b_renesas_ra8.c +++ b/drivers/spi/spi_b_renesas_ra8.c @@ -92,7 +92,9 @@ static int ra_spi_b_configure(const struct device *dev, const struct spi_config return 0; } - fsp_err = R_SPI_B_Close(&data->spi); + if (data->spi.open != 0) { + R_SPI_B_Close(&data->spi); + } if ((config->operation & SPI_FRAME_FORMAT_TI) == SPI_FRAME_FORMAT_TI) { return -ENOTSUP; diff --git a/drivers/spi/spi_renesas_ra.c b/drivers/spi/spi_renesas_ra.c new file mode 100644 index 000000000000000..75d830c737ca5b7 --- /dev/null +++ b/drivers/spi/spi_renesas_ra.c @@ -0,0 +1,826 @@ +/* + * Copyright (c) 2024 Renesas Electronics Corporation + * SPDX-License-Identifier: Apache-2.0 + */ + +#define DT_DRV_COMPAT renesas_ra_spi + +#include +#include +#include +#include +#include +#include + +#include +LOG_MODULE_REGISTER(ra_spi); + +#include "spi_context.h" + +#if defined(CONFIG_SPI_INTERRUPT) +void spi_rxi_isr(void); +void spi_txi_isr(void); +void spi_tei_isr(void); +void spi_eri_isr(void); +#endif + +struct ra_spi_config { + const struct pinctrl_dev_config *pcfg; +}; + +struct ra_spi_data { + struct spi_context ctx; + uint8_t dfs; + struct st_spi_instance_ctrl spi; + struct st_spi_cfg fsp_config; + struct st_spi_extended_cfg fsp_config_extend; +#if CONFIG_SPI_INTERRUPT + uint32_t data_len; +#endif +#if defined(CONFIG_SPI_RA_DTC) + /* RX */ + struct st_transfer_instance rx_transfer; + struct st_dtc_instance_ctrl rx_transfer_ctrl; + struct st_transfer_info rx_transfer_info; + struct st_transfer_cfg rx_transfer_cfg; + struct st_dtc_extended_cfg rx_transfer_cfg_extend; + + /* TX */ + struct st_transfer_instance tx_transfer; + struct st_dtc_instance_ctrl tx_transfer_ctrl; + struct st_transfer_info tx_transfer_info; + struct st_transfer_cfg tx_transfer_cfg; + struct st_dtc_extended_cfg tx_transfer_cfg_extend; +#endif +}; + +static void spi_cb(spi_callback_args_t *p_args) +{ + struct device *dev = (struct device *)p_args->p_context; + struct ra_spi_data *data = dev->data; + + switch (p_args->event) { + case SPI_EVENT_TRANSFER_COMPLETE: + spi_context_cs_control(&data->ctx, false); + spi_context_complete(&data->ctx, dev, 0); + break; + case SPI_EVENT_ERR_MODE_FAULT: /* Mode fault error */ + case SPI_EVENT_ERR_READ_OVERFLOW: /* Read overflow error */ + case SPI_EVENT_ERR_PARITY: /* Parity error */ + case SPI_EVENT_ERR_OVERRUN: /* Overrun error */ + case SPI_EVENT_ERR_FRAMING: /* Framing error */ + case SPI_EVENT_ERR_MODE_UNDERRUN: /* Underrun error */ + spi_context_cs_control(&data->ctx, false); + spi_context_complete(&data->ctx, dev, -EIO); + break; + default: + break; + } +} + +static int ra_spi_configure(const struct device *dev, const struct spi_config *config) +{ + struct ra_spi_data *data = dev->data; + fsp_err_t fsp_err; + + if (spi_context_configured(&data->ctx, config)) { + /* Nothing to do */ + return 0; + } + + if (data->spi.open != 0) { + R_SPI_Close(&data->spi); + } + + if ((config->operation & SPI_FRAME_FORMAT_TI) == SPI_FRAME_FORMAT_TI) { + return -ENOTSUP; + } + + if (config->operation & SPI_OP_MODE_SLAVE) { + data->fsp_config.operating_mode = SPI_MODE_SLAVE; + } else { + data->fsp_config.operating_mode = SPI_MODE_MASTER; + } + + if (SPI_MODE_GET(config->operation) & SPI_MODE_CPOL) { + data->fsp_config.clk_polarity = SPI_CLK_POLARITY_HIGH; + } else { + data->fsp_config.clk_polarity = SPI_CLK_POLARITY_LOW; + } + + if (SPI_MODE_GET(config->operation) & SPI_MODE_CPHA) { + data->fsp_config.clk_phase = SPI_CLK_PHASE_EDGE_EVEN; + } else { + if (data->fsp_config.operating_mode == SPI_MODE_MASTER) { + data->fsp_config.clk_phase = SPI_CLK_PHASE_EDGE_ODD; + } else { + LOG_ERR("Invalid clock phase"); + return -EINVAL; + } + } + + if (config->operation & SPI_TRANSFER_LSB) { + data->fsp_config.bit_order = SPI_BIT_ORDER_LSB_FIRST; + } else { + data->fsp_config.bit_order = SPI_BIT_ORDER_MSB_FIRST; + } + + if (config->operation & SPI_CS_ACTIVE_HIGH) { + data->fsp_config_extend.ssl_polarity = SPI_SSLP_HIGH; + } else { + data->fsp_config_extend.ssl_polarity = SPI_SSLP_LOW; + } + + if (!(config->operation & SPI_OP_MODE_SLAVE)) { + LOG_INF("frequency: %d", config->frequency); + fsp_err = R_SPI_CalculateBitrate(config->frequency, + &data->fsp_config_extend.spck_div); + if (fsp_err != FSP_SUCCESS) { + LOG_ERR("spi frequency calculate error %d", fsp_err); + return -EIO; + } + } + + data->fsp_config_extend.spi_comm = SPI_COMMUNICATION_FULL_DUPLEX; + if (spi_cs_is_gpio(config) || !IS_ENABLED(CONFIG_SPI_USE_HW_SS)) { + data->fsp_config_extend.spi_clksyn = SPI_SSL_MODE_CLK_SYN; + } else { + data->fsp_config_extend.spi_clksyn = SPI_SSL_MODE_SPI; + data->fsp_config_extend.ssl_select = SPI_SSL_SELECT_SSL0; + } + + data->fsp_config.p_extend = &data->fsp_config_extend; + + data->fsp_config.p_callback = spi_cb; + data->fsp_config.p_context = dev; + fsp_err = R_SPI_Open(&data->spi, &data->fsp_config); + if (fsp_err != FSP_SUCCESS) { + LOG_ERR("R_SPI_Open error: %d", fsp_err); + return -EIO; + } + data->ctx.config = config; + + return 0; +} + +static bool ra_spi_transfer_ongoing(struct ra_spi_data *data) +{ +#if defined(CONFIG_SPI_INTERRUPT) + return (spi_context_tx_on(&data->ctx) || spi_context_rx_on(&data->ctx)); +#else + if (spi_context_total_tx_len(&data->ctx) < spi_context_total_rx_len(&data->ctx)) { + return (spi_context_tx_on(&data->ctx) || spi_context_rx_on(&data->ctx)); + } else { + return (spi_context_tx_on(&data->ctx) && spi_context_rx_on(&data->ctx)); + } +#endif +} + +#ifndef CONFIG_SPI_INTERRUPT +static int ra_spi_transceive_slave(struct ra_spi_data *data) +{ + R_SPI0_Type *p_spi_reg = data->spi.p_regs; + spi_bit_width_t spi_width = + (spi_bit_width_t)(SPI_WORD_SIZE_GET(data->ctx.config->operation) - 1); + + if (p_spi_reg->SPSR_b.SPTEF && spi_context_tx_buf_on(&data->ctx)) { + uint32_t tx; + + if (data->ctx.tx_buf != NULL) { + if (data->dfs > 2) { + tx = *(uint32_t *)(data->ctx.tx_buf); + } else if (data->dfs > 1) { + tx = *(uint16_t *)(data->ctx.tx_buf); + } else { + tx = *(uint8_t *)(data->ctx.tx_buf); + } + } else { + tx = 0; + } + + /* Update data register */ + if (SPI_BIT_WIDTH_16_BITS < spi_width) { + p_spi_reg->SPDR = (uint32_t)tx; + } else if (SPI_BIT_WIDTH_8_BITS >= spi_width) { + p_spi_reg->SPDR_BY = (uint8_t)tx; + } else { + p_spi_reg->SPDR_HA = (uint16_t)tx; + } + + spi_context_update_tx(&data->ctx, data->dfs, 1); + } else { + p_spi_reg->SPCR_b.SPTIE = 0; + } + + if (p_spi_reg->SPSR_b.SPRF && spi_context_rx_buf_on(&data->ctx)) { + uint32_t rx; + + /* Update RX data */ + if (SPI_BIT_WIDTH_16_BITS < spi_width) { + rx = (uint32_t)p_spi_reg->SPDR; + } else if (SPI_BIT_WIDTH_8_BITS >= spi_width) { + rx = (uint8_t)p_spi_reg->SPDR_BY; + } else { + rx = (uint16_t)p_spi_reg->SPDR_HA; + } + + if (data->dfs > 2) { + UNALIGNED_PUT(rx, (uint32_t *)data->ctx.rx_buf); + } else if (data->dfs > 1) { + UNALIGNED_PUT(rx, (uint16_t *)data->ctx.rx_buf); + } else { + UNALIGNED_PUT(rx, (uint8_t *)data->ctx.rx_buf); + } + spi_context_update_rx(&data->ctx, data->dfs, 1); + } + + return 0; +} + +static int ra_spi_transceive_master(struct ra_spi_data *data) +{ + R_SPI0_Type *p_spi_reg = data->spi.p_regs; + spi_bit_width_t spi_width = + (spi_bit_width_t)(SPI_WORD_SIZE_GET(data->ctx.config->operation) - 1); + uint32_t tx; + uint32_t rx; + + /* Tx transfer */ + if (spi_context_tx_buf_on(&data->ctx)) { + if (data->dfs > 2) { + tx = *(uint32_t *)(data->ctx.tx_buf); + } else if (data->dfs > 1) { + tx = *(uint16_t *)(data->ctx.tx_buf); + } else { + tx = *(uint8_t *)(data->ctx.tx_buf); + } + } else { + tx = 0U; + } + + while (!p_spi_reg->SPSR_b.SPTEF) { + } + + /* Update data register */ + if (SPI_BIT_WIDTH_16_BITS < spi_width) { + p_spi_reg->SPDR = (uint32_t)tx; + } else if (SPI_BIT_WIDTH_8_BITS >= spi_width) { + p_spi_reg->SPDR_BY = (uint8_t)tx; + } else { + p_spi_reg->SPDR_HA = (uint16_t)tx; + } + + spi_context_update_tx(&data->ctx, data->dfs, 1); + + if (p_spi_reg->SPCR_b.TXMD == 0x0) { + while (!p_spi_reg->SPSR_b.SPRF) { + } + + /* Update RX data */ + if (SPI_BIT_WIDTH_16_BITS < spi_width) { + rx = (uint32_t)p_spi_reg->SPDR; + } else if (SPI_BIT_WIDTH_8_BITS >= spi_width) { + rx = (uint8_t)p_spi_reg->SPDR_BY; + } else { + rx = (uint16_t)p_spi_reg->SPDR_HA; + } + + if (spi_context_rx_buf_on(&data->ctx)) { + if (data->dfs > 2) { + UNALIGNED_PUT(rx, (uint32_t *)data->ctx.rx_buf); + } else if (data->dfs > 1) { + UNALIGNED_PUT(rx, (uint16_t *)data->ctx.rx_buf); + } else { + UNALIGNED_PUT(rx, (uint8_t *)data->ctx.rx_buf); + } + } + spi_context_update_rx(&data->ctx, data->dfs, 1); + } + + return 0; +} + +static int ra_spi_transceive_data(struct ra_spi_data *data) +{ + + uint16_t operation = data->ctx.config->operation; + + if (SPI_OP_MODE_GET(operation) == SPI_OP_MODE_MASTER) { + ra_spi_transceive_master(data); + } else { + ra_spi_transceive_slave(data); + } + + return 0; +} +#endif + +static int transceive(const struct device *dev, const struct spi_config *config, + const struct spi_buf_set *tx_bufs, const struct spi_buf_set *rx_bufs, + bool asynchronous, spi_callback_t cb, void *userdata) +{ + struct ra_spi_data *data = dev->data; + R_SPI0_Type *p_spi_reg; + int ret = 0; + + if (!tx_bufs && !rx_bufs) { + return 0; + } + +#ifndef CONFIG_SPI_INTERRUPT + if (asynchronous) { + return -ENOTSUP; + } +#endif + + spi_context_lock(&data->ctx, asynchronous, cb, userdata, config); + + ret = ra_spi_configure(dev, config); + if (ret) { + goto end; + } + data->dfs = ((SPI_WORD_SIZE_GET(config->operation) - 1) / 8) + 1; + p_spi_reg = data->spi.p_regs; + spi_bit_width_t spi_width = + (spi_bit_width_t)(SPI_WORD_SIZE_GET(data->ctx.config->operation) - 1); + /* Set buffers info */ + spi_context_buffers_setup(&data->ctx, tx_bufs, rx_bufs, data->dfs); + + spi_context_cs_control(&data->ctx, true); + +#ifdef CONFIG_SPI_INTERRUPT + if (data->ctx.rx_len == 0) { + data->data_len = spi_context_is_slave(&data->ctx) + ? spi_context_total_tx_len(&data->ctx) + : data->ctx.tx_len; + } else if (data->ctx.tx_len == 0) { + data->data_len = spi_context_is_slave(&data->ctx) + ? spi_context_total_rx_len(&data->ctx) + : data->ctx.rx_len; + } else { + data->data_len = spi_context_is_slave(&data->ctx) + ? MAX(spi_context_total_tx_len(&data->ctx), + spi_context_total_rx_len(&data->ctx)) + : MIN(data->ctx.tx_len, data->ctx.rx_len); + } + + if (data->ctx.rx_buf == NULL) { + R_SPI_Write(&data->spi, data->ctx.tx_buf, data->data_len, spi_width); + } else if (data->ctx.tx_buf == NULL) { + R_SPI_Read(&data->spi, data->ctx.rx_buf, data->data_len, spi_width); + } else { + R_SPI_WriteRead(&data->spi, data->ctx.tx_buf, data->ctx.rx_buf, data->data_len, + spi_width); + } + + ret = spi_context_wait_for_completion(&data->ctx); + +#else + p_spi_reg->SPCR_b.TXMD = (0x0); + if (!spi_context_tx_on(&data->ctx)) { + p_spi_reg->SPCR_b.TXMD = 0x0; + } + if (!spi_context_rx_on(&data->ctx)) { + p_spi_reg->SPCR_b.TXMD = 0x1; /* tx only */ + } + + uint32_t spdcr = p_spi_reg->SPDCR; + + if (SPI_BIT_WIDTH_16_BITS < spi_width) { + /* Configure Word access to data register. */ + spdcr &= ~R_SPI0_SPDCR_SPBYT_Msk; + spdcr |= R_SPI0_SPDCR_SPLW_Msk; + } else if (SPI_BIT_WIDTH_8_BITS >= spi_width) { + /* Set SPBYT so 8bit transfer works with the DTC/DMAC. */ + spdcr |= R_SPI0_SPDCR_SPBYT_Msk; + } else { + /* Configure Half-Word access to data register. */ + spdcr &= ~(R_SPI0_SPDCR_SPBYT_Msk | R_SPI0_SPDCR_SPLW_Msk); + } + + /* Configure data length based on the selected bit width . */ + uint32_t bit_width = spi_width; + + if (bit_width > SPI_BIT_WIDTH_16_BITS) { + bit_width = ((bit_width + 1) >> 2) - 5; + } + p_spi_reg->SPDCR = (uint8_t)spdcr; + p_spi_reg->SPCMD[0] |= bit_width << 8; + + /* Enable the SPI Transfer. */ + p_spi_reg->SPCR |= R_SPI0_SPCR_SPE_Msk; + + do { + ra_spi_transceive_data(data); + } while (ra_spi_transfer_ongoing(data)); + + /* Wait for transmision complete */ + while (p_spi_reg->SPSR_b.IDLNF) { + } + /* Disable the SPI Transfer. */ + p_spi_reg->SPCR_b.SPE = 0; + + spi_context_cs_control(&data->ctx, false); + spi_context_complete(&data->ctx, dev, 0); +#endif +#ifdef CONFIG_SPI_SLAVE + if (spi_context_is_slave(&data->ctx) && !ret) { + ret = data->ctx.recv_frames; + } +#endif /* CONFIG_SPI_SLAVE */ + +end: + spi_context_release(&data->ctx, ret); + + return ret; +} + +static int ra_spi_transceive(const struct device *dev, const struct spi_config *config, + const struct spi_buf_set *tx_bufs, const struct spi_buf_set *rx_bufs) +{ + return transceive(dev, config, tx_bufs, rx_bufs, false, NULL, NULL); +} + +#ifdef CONFIG_SPI_ASYNC +static int ra_spi_transceive_async(const struct device *dev, const struct spi_config *config, + const struct spi_buf_set *tx_bufs, + const struct spi_buf_set *rx_bufs, spi_callback_t cb, + void *userdata) +{ + return transceive(dev, config, tx_bufs, rx_bufs, true, cb, userdata); +} +#endif /* CONFIG_SPI_ASYNC */ + +static int ra_spi_release(const struct device *dev, const struct spi_config *config) +{ + struct ra_spi_data *data = dev->data; + + spi_context_unlock_unconditionally(&data->ctx); + + return 0; +} + +static const struct spi_driver_api ra_spi_driver_api = {.transceive = ra_spi_transceive, +#ifdef CONFIG_SPI_ASYNC + .transceive_async = ra_spi_transceive_async, +#endif /* CONFIG_SPI_ASYNC */ + .release = ra_spi_release}; + +static int spi_ra_init(const struct device *dev) +{ + const struct ra_spi_config *config = dev->config; + struct ra_spi_data *data = dev->data; + int ret; + + /* Configure dt provided device signals when available */ + ret = pinctrl_apply_state(config->pcfg, PINCTRL_STATE_DEFAULT); + if (ret < 0) { + return ret; + } + + ret = spi_context_cs_configure_all(&data->ctx); + if (ret < 0) { + return ret; + } + + spi_context_unlock_unconditionally(&data->ctx); + + return 0; +} + +#if defined(CONFIG_SPI_INTERRUPT) + +static void ra_spi_retransmit(struct ra_spi_data *data) +{ + spi_bit_width_t spi_width = + (spi_bit_width_t)(SPI_WORD_SIZE_GET(data->ctx.config->operation) - 1); + + if (data->ctx.rx_len == 0) { + data->data_len = data->ctx.tx_len; + data->spi.p_tx_data = data->ctx.tx_buf; + data->spi.p_rx_data = NULL; + } else if (data->ctx.tx_len == 0) { + data->data_len = data->ctx.rx_len; + data->spi.p_tx_data = NULL; + data->spi.p_rx_data = data->ctx.rx_buf; + } else { + data->data_len = MIN(data->ctx.tx_len, data->ctx.rx_len); + data->spi.p_tx_data = data->ctx.tx_buf; + data->spi.p_rx_data = data->ctx.rx_buf; + } + + data->spi.bit_width = spi_width; + data->spi.rx_count = 0; + data->spi.tx_count = 0; + data->spi.count = data->data_len; + +#ifdef CONFIG_SPI_RA_DTC + /* Determine DTC transfer size */ + transfer_size_t size; + + if (SPI_BIT_WIDTH_16_BITS < spi_width) { + size = TRANSFER_SIZE_4_BYTE; + } else if (SPI_BIT_WIDTH_8_BITS >= spi_width) { + size = TRANSFER_SIZE_1_BYTE; + } else { + size = TRANSFER_SIZE_2_BYTE; + } + + if (data->spi.p_cfg->p_transfer_rx) { + /* When the rxi interrupt is called, all transfers will be finished. */ + data->spi.rx_count = data->data_len; + + transfer_instance_t *p_transfer_rx = + (transfer_instance_t *)data->spi.p_cfg->p_transfer_rx; + transfer_info_t *p_info = p_transfer_rx->p_cfg->p_info; + + /* Configure the receive DMA instance. */ + p_info->transfer_settings_word_b.size = size; + p_info->length = (uint16_t)data->data_len; + p_info->transfer_settings_word_b.dest_addr_mode = TRANSFER_ADDR_MODE_INCREMENTED; + p_info->p_dest = data->ctx.rx_buf; + + if (NULL == data->ctx.rx_buf) { + static uint32_t dummy_rx; + + p_info->transfer_settings_word_b.dest_addr_mode = TRANSFER_ADDR_MODE_FIXED; + p_info->p_dest = &dummy_rx; + } + + p_transfer_rx->p_api->reconfigure(p_transfer_rx->p_ctrl, p_info); + } + + if (data->spi.p_cfg->p_transfer_tx) { + /* When the txi interrupt is called, all transfers will be finished. */ + data->spi.tx_count = data->data_len; + + transfer_instance_t *p_transfer_tx = + (transfer_instance_t *)data->spi.p_cfg->p_transfer_tx; + transfer_info_t *p_info = p_transfer_tx->p_cfg->p_info; + + /* Configure the transmit DMA instance. */ + p_info->transfer_settings_word_b.size = size; + p_info->length = (uint16_t)data->data_len; + p_info->transfer_settings_word_b.src_addr_mode = TRANSFER_ADDR_MODE_INCREMENTED; + p_info->p_src = data->ctx.tx_buf; + + if (NULL == data->ctx.tx_buf) { + static uint32_t dummy_tx; + + p_info->transfer_settings_word_b.src_addr_mode = TRANSFER_ADDR_MODE_FIXED; + p_info->p_src = &dummy_tx; + } + R_SPI0_Type *p_spi_reg = data->spi.p_regs; + + p_transfer_tx->p_api->reconfigure(p_transfer_tx->p_ctrl, p_info); + + /* Enable the SPI Transfer */ + p_spi_reg->SPCR |= R_SPI0_SPCR_SPE_Msk; + } + +#endif +} + +static void ra_spi_rxi_isr(const struct device *dev) +{ +#ifndef CONFIG_SPI_SLAVE + ARG_UNUSED(dev); + spi_rxi_isr(); +#else + struct ra_spi_data *data = dev->data; + + spi_rxi_isr(); + + if (spi_context_is_slave(&data->ctx) && data->spi.rx_count == data->spi.count) { + if (data->ctx.rx_buf != NULL && data->ctx.tx_buf != NULL) { + data->ctx.recv_frames = MIN(spi_context_total_tx_len(&data->ctx), + spi_context_total_rx_len(&data->ctx)); + } else if (data->ctx.tx_buf == NULL) { + data->ctx.recv_frames = data->data_len; + } + R_BSP_IrqDisable(data->fsp_config.tei_irq); + + /* Writing 0 to SPE generatates a TXI IRQ. Disable the TXI IRQ. + * (See Section 38.2.1 SPI Control Register in the RA6T2 manual R01UH0886EJ0100). + */ + R_BSP_IrqDisable(data->fsp_config.txi_irq); + + /* Disable the SPI Transfer. */ + data->spi.p_regs->SPCR_b.SPE = 0; + + /* Re-enable the TXI IRQ and clear the pending IRQ. */ + R_BSP_IrqEnable(data->fsp_config.txi_irq); + + spi_context_cs_control(&data->ctx, false); + spi_context_complete(&data->ctx, dev, 0); + } + +#endif +} + +static void ra_spi_txi_isr(const struct device *dev) +{ + ARG_UNUSED(dev); + spi_txi_isr(); +} + +static void ra_spi_tei_isr(const struct device *dev) +{ + struct ra_spi_data *data = dev->data; + R_SPI0_Type *p_spi_reg = data->spi.p_regs; + + if (data->spi.rx_count == data->spi.count) { + spi_context_update_rx(&data->ctx, 1, data->data_len); + } + if (data->spi.tx_count == data->spi.count) { + spi_context_update_tx(&data->ctx, 1, data->data_len); + } + + if (ra_spi_transfer_ongoing(data)) { + R_BSP_IrqDisable(data->spi.p_cfg->txi_irq); + /* Disable the SPI Transfer. */ + p_spi_reg->SPCR_b.SPE = 0U; + /* Clear the status register. */ + p_spi_reg->SPSR; + p_spi_reg->SPSR = 0; + R_BSP_IrqEnable(data->spi.p_cfg->txi_irq); + +#ifndef CONFIG_SPI_RA_DTC + /* Enable the SPI Transfer */ + p_spi_reg->SPCR |= R_SPI0_SPCR_SPE_Msk; +#endif + + R_ICU->IELSR_b[data->fsp_config.tei_irq].IR = 0U; + ra_spi_retransmit(data); + } else { + spi_tei_isr(); + } +} + +static void ra_spi_eri_isr(const struct device *dev) +{ + ARG_UNUSED(dev); + spi_eri_isr(); +} +#endif + +#define _ELC_EVENT_SPI_RXI(channel) ELC_EVENT_SPI##channel##_RXI +#define _ELC_EVENT_SPI_TXI(channel) ELC_EVENT_SPI##channel##_TXI +#define _ELC_EVENT_SPI_TEI(channel) ELC_EVENT_SPI##channel##_TEI +#define _ELC_EVENT_SPI_ERI(channel) ELC_EVENT_SPI##channel##_ERI + +#define ELC_EVENT_SPI_RXI(channel) _ELC_EVENT_SPI_RXI(channel) +#define ELC_EVENT_SPI_TXI(channel) _ELC_EVENT_SPI_TXI(channel) +#define ELC_EVENT_SPI_TEI(channel) _ELC_EVENT_SPI_TEI(channel) +#define ELC_EVENT_SPI_ERI(channel) _ELC_EVENT_SPI_ERI(channel) + +#if defined(CONFIG_SPI_INTERRUPT) + +#define RA_SPI_IRQ_CONFIG_INIT(index) \ + do { \ + ARG_UNUSED(dev); \ + \ + R_ICU->IELSR[DT_INST_IRQ_BY_NAME(index, rxi, irq)] = \ + ELC_EVENT_SPI_RXI(DT_INST_PROP(index, channel)); \ + R_ICU->IELSR[DT_INST_IRQ_BY_NAME(index, txi, irq)] = \ + ELC_EVENT_SPI_TXI(DT_INST_PROP(index, channel)); \ + R_ICU->IELSR[DT_INST_IRQ_BY_NAME(index, tei, irq)] = \ + ELC_EVENT_SPI_TEI(DT_INST_PROP(index, channel)); \ + R_ICU->IELSR[DT_INST_IRQ_BY_NAME(index, eri, irq)] = \ + ELC_EVENT_SPI_ERI(DT_INST_PROP(index, channel)); \ + \ + IRQ_CONNECT(DT_INST_IRQ_BY_NAME(index, rxi, irq), \ + DT_INST_IRQ_BY_NAME(index, rxi, priority), ra_spi_rxi_isr, \ + DEVICE_DT_INST_GET(index), 0); \ + IRQ_CONNECT(DT_INST_IRQ_BY_NAME(index, txi, irq), \ + DT_INST_IRQ_BY_NAME(index, txi, priority), ra_spi_txi_isr, \ + DEVICE_DT_INST_GET(index), 0); \ + IRQ_CONNECT(DT_INST_IRQ_BY_NAME(index, tei, irq), \ + DT_INST_IRQ_BY_NAME(index, tei, priority), ra_spi_tei_isr, \ + DEVICE_DT_INST_GET(index), 0); \ + IRQ_CONNECT(DT_INST_IRQ_BY_NAME(index, eri, irq), \ + DT_INST_IRQ_BY_NAME(index, eri, priority), ra_spi_eri_isr, \ + DEVICE_DT_INST_GET(index), 0); \ + \ + irq_enable(DT_INST_IRQ_BY_NAME(index, rxi, irq)); \ + irq_enable(DT_INST_IRQ_BY_NAME(index, txi, irq)); \ + irq_enable(DT_INST_IRQ_BY_NAME(index, eri, irq)); \ + } while (0) + +#else + +#define RA_SPI_IRQ_CONFIG_INIT(index) + +#endif + +#ifndef CONFIG_SPI_RA_DTC +#define RA_SPI_DTC_STRUCT_INIT(index) +#define RA_SPI_DTC_INIT(index) +#else +#define RA_SPI_DTC_INIT(index) \ + do { \ + if (DT_INST_PROP_OR(index, rx_dtc, false)) { \ + ra_spi_data_##index.fsp_config.p_transfer_rx = \ + &ra_spi_data_##index.rx_transfer; \ + } \ + if (DT_INST_PROP_OR(index, tx_dtc, false)) { \ + ra_spi_data_##index.fsp_config.p_transfer_tx = \ + &ra_spi_data_##index.tx_transfer; \ + } \ + } while (0) +#define RA_SPI_DTC_STRUCT_INIT(index) \ + .rx_transfer_info = \ + { \ + .transfer_settings_word_b.dest_addr_mode = TRANSFER_ADDR_MODE_INCREMENTED, \ + .transfer_settings_word_b.repeat_area = TRANSFER_REPEAT_AREA_DESTINATION, \ + .transfer_settings_word_b.irq = TRANSFER_IRQ_END, \ + .transfer_settings_word_b.chain_mode = TRANSFER_CHAIN_MODE_DISABLED, \ + .transfer_settings_word_b.src_addr_mode = TRANSFER_ADDR_MODE_FIXED, \ + .transfer_settings_word_b.size = TRANSFER_SIZE_1_BYTE, \ + .transfer_settings_word_b.mode = TRANSFER_MODE_NORMAL, \ + .p_dest = (void *)NULL, \ + .p_src = (void const *)NULL, \ + .num_blocks = 0, \ + .length = 0, \ + }, \ + .rx_transfer_cfg_extend = {.activation_source = DT_INST_IRQ_BY_NAME(index, rxi, irq)}, \ + .rx_transfer_cfg = \ + { \ + .p_info = &ra_spi_data_##index.rx_transfer_info, \ + .p_extend = &ra_spi_data_##index.rx_transfer_cfg_extend, \ + }, \ + .rx_transfer = \ + { \ + .p_ctrl = &ra_spi_data_##index.rx_transfer_ctrl, \ + .p_cfg = &ra_spi_data_##index.rx_transfer_cfg, \ + .p_api = &g_transfer_on_dtc, \ + }, \ + .tx_transfer_info = \ + { \ + .transfer_settings_word_b.dest_addr_mode = TRANSFER_ADDR_MODE_FIXED, \ + .transfer_settings_word_b.repeat_area = TRANSFER_REPEAT_AREA_SOURCE, \ + .transfer_settings_word_b.irq = TRANSFER_IRQ_END, \ + .transfer_settings_word_b.chain_mode = TRANSFER_CHAIN_MODE_DISABLED, \ + .transfer_settings_word_b.src_addr_mode = TRANSFER_ADDR_MODE_INCREMENTED, \ + .transfer_settings_word_b.size = TRANSFER_SIZE_1_BYTE, \ + .transfer_settings_word_b.mode = TRANSFER_MODE_NORMAL, \ + .p_dest = (void *)NULL, \ + .p_src = (void const *)NULL, \ + .num_blocks = 0, \ + .length = 0, \ + }, \ + .tx_transfer_cfg_extend = {.activation_source = DT_INST_IRQ_BY_NAME(index, txi, irq)}, \ + .tx_transfer_cfg = \ + { \ + .p_info = &ra_spi_data_##index.tx_transfer_info, \ + .p_extend = &ra_spi_data_##index.tx_transfer_cfg_extend, \ + }, \ + .tx_transfer = { \ + .p_ctrl = &ra_spi_data_##index.tx_transfer_ctrl, \ + .p_cfg = &ra_spi_data_##index.tx_transfer_cfg, \ + .p_api = &g_transfer_on_dtc, \ + }, +#endif + +#define RA_SPI_INIT(index) \ + \ + PINCTRL_DT_INST_DEFINE(index); \ + \ + static const struct ra_spi_config ra_spi_config_##index = { \ + .pcfg = PINCTRL_DT_INST_DEV_CONFIG_GET(index), \ + }; \ + \ + static struct ra_spi_data ra_spi_data_##index = { \ + SPI_CONTEXT_CS_GPIOS_INITIALIZE(DT_DRV_INST(index), ctx) \ + SPI_CONTEXT_INIT_LOCK(ra_spi_data_##index, ctx), \ + SPI_CONTEXT_INIT_SYNC(ra_spi_data_##index, ctx), \ + .fsp_config = \ + { \ + .channel = DT_INST_PROP(index, channel), \ + .rxi_ipl = DT_INST_IRQ_BY_NAME(index, rxi, priority), \ + .rxi_irq = DT_INST_IRQ_BY_NAME(index, rxi, irq), \ + .txi_ipl = DT_INST_IRQ_BY_NAME(index, txi, priority), \ + .txi_irq = DT_INST_IRQ_BY_NAME(index, txi, irq), \ + .tei_ipl = DT_INST_IRQ_BY_NAME(index, tei, priority), \ + .tei_irq = DT_INST_IRQ_BY_NAME(index, tei, irq), \ + .eri_ipl = DT_INST_IRQ_BY_NAME(index, eri, priority), \ + .eri_irq = DT_INST_IRQ_BY_NAME(index, eri, irq), \ + }, \ + RA_SPI_DTC_STRUCT_INIT(index)}; \ + \ + static int spi_ra_init##index(const struct device *dev) \ + { \ + RA_SPI_DTC_INIT(index); \ + int err = spi_ra_init(dev); \ + if (err != 0) { \ + return err; \ + } \ + RA_SPI_IRQ_CONFIG_INIT(index); \ + return 0; \ + } \ + \ + DEVICE_DT_INST_DEFINE(index, spi_ra_init##index, PM_DEVICE_DT_INST_GET(index), \ + &ra_spi_data_##index, &ra_spi_config_##index, PRE_KERNEL_1, \ + CONFIG_SPI_INIT_PRIORITY, &ra_spi_driver_api); + +DT_INST_FOREACH_STATUS_OKAY(RA_SPI_INIT) diff --git a/drivers/stepper/adi_tmc/adi_tmc5041_stepper_controller.c b/drivers/stepper/adi_tmc/adi_tmc5041_stepper_controller.c index 0fa7ab19e6d69af..68d943fff9da59d 100644 --- a/drivers/stepper/adi_tmc/adi_tmc5041_stepper_controller.c +++ b/drivers/stepper/adi_tmc/adi_tmc5041_stepper_controller.c @@ -191,8 +191,13 @@ static void rampstat_work_handler(struct k_work *work) uint32_t drv_status; int err; - tmc5041_read(stepper_config->controller, TMC5041_DRVSTATUS(stepper_config->index), - &drv_status); + err = tmc5041_read(stepper_config->controller, TMC5041_DRVSTATUS(stepper_config->index), + &drv_status); + if (err != 0) { + LOG_ERR("%s: Failed to read DRVSTATUS register", stepper_data->stepper->name); + return; + } + if (FIELD_GET(TMC5XXX_DRV_STATUS_SG_STATUS_MASK, drv_status) == 1U) { LOG_INF("%s: Stall detected", stepper_data->stepper->name); err = tmc5041_write(stepper_config->controller, @@ -453,7 +458,10 @@ static int tmc5041_stepper_set_target_position(const struct device *dev, const i if (err != 0) { return -EIO; } - tmc5041_write(config->controller, TMC5041_XTARGET(config->index), position); + err = tmc5041_write(config->controller, TMC5041_XTARGET(config->index), position); + if (err != 0) { + return -EIO; + } if (config->is_sg_enabled) { k_work_reschedule(&data->stallguard_dwork, diff --git a/drivers/stepper/fake_stepper_controller.c b/drivers/stepper/fake_stepper_controller.c index b469cf67a2d12c4..09af68b9c5cd272 100644 --- a/drivers/stepper/fake_stepper_controller.c +++ b/drivers/stepper/fake_stepper_controller.c @@ -19,28 +19,28 @@ struct fake_stepper_data { int32_t actual_position; }; -DEFINE_FAKE_VALUE_FUNC(int, fake_stepper_enable, const struct device *, const bool); +DEFINE_FAKE_VALUE_FUNC(int, fake_stepper_enable, const struct device *, bool); DEFINE_FAKE_VALUE_FUNC(int, fake_stepper_is_moving, const struct device *, bool *); -DEFINE_FAKE_VALUE_FUNC(int, fake_stepper_move, const struct device *, const int32_t); +DEFINE_FAKE_VALUE_FUNC(int, fake_stepper_move, const struct device *, int32_t); -DEFINE_FAKE_VALUE_FUNC(int, fake_stepper_set_max_velocity, const struct device *, const uint32_t); +DEFINE_FAKE_VALUE_FUNC(int, fake_stepper_set_max_velocity, const struct device *, uint32_t); DEFINE_FAKE_VALUE_FUNC(int, fake_stepper_set_micro_step_res, const struct device *, - const enum stepper_micro_step_resolution); + enum stepper_micro_step_resolution); DEFINE_FAKE_VALUE_FUNC(int, fake_stepper_get_micro_step_res, const struct device *, enum stepper_micro_step_resolution *); -DEFINE_FAKE_VALUE_FUNC(int, fake_stepper_set_actual_position, const struct device *, const int32_t); +DEFINE_FAKE_VALUE_FUNC(int, fake_stepper_set_actual_position, const struct device *, int32_t); DEFINE_FAKE_VALUE_FUNC(int, fake_stepper_get_actual_position, const struct device *, int32_t *); -DEFINE_FAKE_VALUE_FUNC(int, fake_stepper_set_target_position, const struct device *, const int32_t); +DEFINE_FAKE_VALUE_FUNC(int, fake_stepper_set_target_position, const struct device *, int32_t); DEFINE_FAKE_VALUE_FUNC(int, fake_stepper_enable_constant_velocity_mode, const struct device *, - const enum stepper_direction, const uint32_t); + enum stepper_direction, uint32_t); DEFINE_FAKE_VALUE_FUNC(int, fake_stepper_set_event_callback, const struct device *, stepper_event_callback_t, void *); diff --git a/drivers/usb/device/Kconfig b/drivers/usb/device/Kconfig index 346bdd3cc6d16d1..c286fa39cf2af23 100644 --- a/drivers/usb/device/Kconfig +++ b/drivers/usb/device/Kconfig @@ -37,6 +37,7 @@ config USB_DC_RPI_PICO bool "USB device controller driver for Raspberry Pi Pico devices" default y depends on DT_HAS_RASPBERRYPI_PICO_USBD_ENABLED + select PINCTRL help Enable USB support on the RP2 family of processors. diff --git a/drivers/usb_c/ppc/shell.c b/drivers/usb_c/ppc/shell.c index a69db474ce88a3d..09763e488f7f9e8 100644 --- a/drivers/usb_c/ppc/shell.c +++ b/drivers/usb_c/ppc/shell.c @@ -123,7 +123,7 @@ SHELL_STATIC_SUBCMD_SET_CREATE(sub_ppc_cmds, cmd_ppc_dump, 1, 1), SHELL_CMD_ARG(status, &list_device_names, "Write PPC power status\n" - "Usage: ppc statuc []", + "Usage: ppc status []", cmd_ppc_status, 1, 1), SHELL_CMD_ARG(exitdb, &list_device_names, "Exit from the dead battery mode\n" diff --git a/drivers/video/Kconfig.sw_generator b/drivers/video/Kconfig.sw_generator index f258a00e1a2f56d..7675908b4bc1998 100644 --- a/drivers/video/Kconfig.sw_generator +++ b/drivers/video/Kconfig.sw_generator @@ -3,7 +3,10 @@ # Copyright (c) 2016 Linaro Limited # SPDX-License-Identifier: Apache-2.0 +DT_CHOSEN_ZEPHYR_CAMERA := zephyr,camera + config VIDEO_SW_GENERATOR bool "Video Software Generator" + depends on !$(dt_chosen_enabled,$(DT_CHOSEN_ZEPHYR_CAMERA)) help Enable video pattern generator (for testing purposes). diff --git a/drivers/video/gc2145.c b/drivers/video/gc2145.c index 97be1955de3823e..e68db0346bd007a 100644 --- a/drivers/video/gc2145.c +++ b/drivers/video/gc2145.c @@ -1039,7 +1039,7 @@ static int gc2145_set_fmt(const struct device *dev, enum video_endpoint_id ep, } /* Check if camera is capable of handling given format */ - for (int i = 0; i == ARRAY_SIZE(fmts); i++) { + for (int i = 0; i < RESOLUTIONS_MAX; i++) { if (fmts[i].width_min == fmt->width && fmts[i].height_min == fmt->height && fmts[i].pixelformat == fmt->pixelformat) { res = (enum resolutions)i; diff --git a/drivers/watchdog/wdt_esp32.c b/drivers/watchdog/wdt_esp32.c index 1c7ee61ee64cc58..fff42d651e63bf8 100644 --- a/drivers/watchdog/wdt_esp32.c +++ b/drivers/watchdog/wdt_esp32.c @@ -158,6 +158,7 @@ static int wdt_esp32_init(const struct device *dev) { const struct wdt_esp32_config *const config = dev->config; struct wdt_esp32_data *data = dev->data; + int ret, flags; if (!device_is_ready(config->clock_dev)) { LOG_ERR("clock control device not ready"); @@ -168,12 +169,10 @@ static int wdt_esp32_init(const struct device *dev) wdt_hal_init(&data->hal, config->wdt_inst, MWDT_TICK_PRESCALER, true); - int ret = esp_intr_alloc(config->irq_source, - ESP_PRIO_TO_FLAGS(config->irq_priority) | - ESP_INT_FLAGS_CHECK(config->irq_flags), - (ISR_HANDLER)wdt_esp32_isr, - (void *)dev, - NULL); + flags = ESP_PRIO_TO_FLAGS(config->irq_priority) | ESP_INT_FLAGS_CHECK(config->irq_flags) | + ESP_INTR_FLAG_SHARED; + ret = esp_intr_alloc(config->irq_source, flags, (ISR_HANDLER)wdt_esp32_isr, (void *)dev, + NULL); if (ret != 0) { LOG_ERR("could not allocate interrupt (err %d)", ret); @@ -217,6 +216,11 @@ static void wdt_esp32_isr(void *arg) { const struct device *dev = (const struct device *)arg; struct wdt_esp32_data *data = dev->data; + uint32_t status = REG_READ(RTC_CNTL_INT_ST_REG); + + if (!(status & RTC_CNTL_WDT_INT_ST)) { + return; + } if (data->callback) { data->callback(dev, 0); diff --git a/drivers/watchdog/xt_wdt_esp32.c b/drivers/watchdog/xt_wdt_esp32.c index ae902c6131f1afe..3c76b03ba3575f8 100644 --- a/drivers/watchdog/xt_wdt_esp32.c +++ b/drivers/watchdog/xt_wdt_esp32.c @@ -103,6 +103,10 @@ static void esp32_xt_wdt_isr(void *arg) struct esp32_clock_config clk_cfg = {0}; uint32_t status = REG_READ(RTC_CNTL_INT_ST_REG); + if (!(status & RTC_CNTL_XTAL32K_DEAD_INT_ST)) { + return; + } + REG_WRITE(RTC_CNTL_INT_CLR_REG, status); clk_cfg.rtc.rtc_slow_clock_src = ESP32_RTC_SLOW_CLK_SRC_RC_SLOW; @@ -123,16 +127,15 @@ static int esp32_xt_wdt_init(const struct device *dev) xt_wdt_hal_config_t xt_wdt_hal_config = { .timeout = ESP32_XT_WDT_MAX_TIMEOUT, }; + int err, flags = 0; xt_wdt_hal_init(&data->hal, &xt_wdt_hal_config); - xt_wdt_hal_enable_backup_clk(&data->hal, - ESP32_RTC_SLOW_CLK_SRC_RC_SLOW_FREQ/1000); - - int err = esp_intr_alloc(cfg->irq_source, - ESP_PRIO_TO_FLAGS(cfg->irq_priority) | - ESP_INT_FLAGS_CHECK(cfg->irq_flags), - (ISR_HANDLER)esp32_xt_wdt_isr, (void *)dev, NULL); + xt_wdt_hal_enable_backup_clk(&data->hal, ESP32_RTC_SLOW_CLK_SRC_RC_SLOW_FREQ/1000); + flags = ESP_PRIO_TO_FLAGS(cfg->irq_priority) | ESP_INT_FLAGS_CHECK(cfg->irq_flags) | + ESP_INTR_FLAG_SHARED; + err = esp_intr_alloc(cfg->irq_source, flags, (ISR_HANDLER)esp32_xt_wdt_isr, (void *)dev, + NULL); if (err) { LOG_ERR("Failed to register ISR\n"); return -EFAULT; diff --git a/drivers/wifi/CMakeLists.txt b/drivers/wifi/CMakeLists.txt index 42af72edce84f6b..94038b0c3e9ea9f 100644 --- a/drivers/wifi/CMakeLists.txt +++ b/drivers/wifi/CMakeLists.txt @@ -13,4 +13,4 @@ add_subdirectory_ifdef(CONFIG_WIFI_SIMPLELINK simplelink) add_subdirectory_ifdef(CONFIG_WIFI_WINC1500 winc1500) add_subdirectory_ifdef(CONFIG_WIFI_NXP nxp) add_subdirectory_ifdef(CONFIG_WIFI_AIROC infineon) -add_subdirectory_ifdef(CONFIG_WIFI_NRF70 nrfwifi) +add_subdirectory_ifdef(CONFIG_WIFI_NRF70 nrf_wifi) diff --git a/drivers/wifi/Kconfig b/drivers/wifi/Kconfig index 7ad7b530c745dc7..55b2a943ff2e974 100644 --- a/drivers/wifi/Kconfig +++ b/drivers/wifi/Kconfig @@ -42,6 +42,6 @@ source "drivers/wifi/esp_at/Kconfig.esp_at" source "drivers/wifi/esp32/Kconfig.esp32" source "drivers/wifi/nxp/Kconfig.nxp" source "drivers/wifi/infineon/Kconfig.airoc" -source "drivers/wifi/nrfwifi/Kconfig.nrfwifi" +source "drivers/wifi/nrf_wifi/Kconfig.nrfwifi" endif # WIFI diff --git a/drivers/wifi/eswifi/eswifi.h b/drivers/wifi/eswifi/eswifi.h index 54bf00f0f78960d..0bf4fddb2066a45 100644 --- a/drivers/wifi/eswifi/eswifi.h +++ b/drivers/wifi/eswifi/eswifi.h @@ -92,9 +92,9 @@ static inline int eswifi_request(struct eswifi_dev *eswifi, char *cmd, static inline void eswifi_lock(struct eswifi_dev *eswifi) { /* Nested locking */ - if (atomic_get(&eswifi->mutex_owner) != (atomic_t)(uintptr_t)_current) { + if (atomic_get(&eswifi->mutex_owner) != (atomic_t)(uintptr_t)arch_current_thread()) { k_mutex_lock(&eswifi->mutex, K_FOREVER); - atomic_set(&eswifi->mutex_owner, (atomic_t)(uintptr_t)_current); + atomic_set(&eswifi->mutex_owner, (atomic_t)(uintptr_t)arch_current_thread()); eswifi->mutex_depth = 1; } else { eswifi->mutex_depth++; diff --git a/drivers/wifi/nrf_wifi/CMakeLists.txt b/drivers/wifi/nrf_wifi/CMakeLists.txt new file mode 100644 index 000000000000000..e631e930e07fc5b --- /dev/null +++ b/drivers/wifi/nrf_wifi/CMakeLists.txt @@ -0,0 +1,124 @@ +# +# Copyright (c) 2024 Nordic Semiconductor ASA +# +# SPDX-License-Identifier: Apache-2.0 +# + +zephyr_library_named(nrf_wifi) + +set(OS_AGNOSTIC_BASE ${ZEPHYR_NRF_WIFI_MODULE_DIR}) +set(FW_BINS_BASE ${ZEPHYR_NRF_WIFI_MODULE_DIR}/zephyr/blobs/wifi_fw_bins) + +zephyr_include_directories( + inc + src/qspi/inc + # for net_sprint_ll_addr + ${ZEPHYR_BASE}/subsys/net/ip +) + +zephyr_include_directories_ifdef(CONFIG_NRF70_OFFLOADED_RAW_TX + off_raw_tx/inc +) + +zephyr_library_sources_ifdef(CONFIG_NRF70_SR_COEX + src/coex.c +) + +zephyr_library_sources( + src/qspi/src/device.c + src/qspi/src/rpu_hw_if.c + src/qspi/src/ficr_prog.c +) + +zephyr_library_sources_ifndef(CONFIG_NRF70_OFFLOADED_RAW_TX + src/fmac_main.c +) + +zephyr_library_sources_ifdef(CONFIG_NRF_WIFI_PATCHES_BUILTIN + src/fw_load.c +) + +if(NOT CONFIG_NRF70_RADIO_TEST AND NOT CONFIG_NRF70_OFFLOADED_RAW_TX) + zephyr_library_sources( + src/net_if.c +) +endif() + +zephyr_library_sources_ifdef(CONFIG_NET_L2_WIFI_MGMT + src/wifi_mgmt_scan.c +) + +zephyr_library_sources_ifdef(CONFIG_NRF70_SYSTEM_MODE_COMMON + src/wifi_mgmt.c +) + +zephyr_library_sources_ifdef(CONFIG_NRF70_OFFLOADED_RAW_TX + off_raw_tx/src/off_raw_tx_api.c +) + +zephyr_library_sources_ifdef(CONFIG_NRF70_STA_MODE + src/wpa_supp_if.c + src/wifi_mgmt.c +) + +# Without WPA supplicant we only support scan +zephyr_library_sources_ifdef(CONFIG_NRF70_STA_MODE + src/wpa_supp_if.c) + +zephyr_library_sources_ifdef(CONFIG_NRF70_ON_QSPI + src/qspi/src/qspi_if.c +) + +zephyr_library_sources_ifdef(CONFIG_NRF70_ON_SPI + src/qspi/src/spi_if.c +) + +zephyr_library_sources_ifdef(CONFIG_NRF70_UTIL + src/wifi_util.c +) + +zephyr_compile_definitions_ifdef(CONFIG_NRF70_ON_QSPI +# These are XIP related anomalies and aren't applicable for nRF7002 and cause +# throughput issues. + -DNRF53_ERRATA_43_ENABLE_WORKAROUND=0 + -DNRF52_ERRATA_215_ENABLE_WORKAROUND=0 +# nRF70 QSPI doesn't use 192MHz clock and most samples use 128MHz, this can cause anomaly 159 +# but as its rare and not seen in most cases, we can disable it. +# Alternative is 128MHz CPU should be disabled that impacts Wi-Fi performance. + -DNRF53_ERRATA_159_ENABLE_WORKAROUND=0 +) + +if (CONFIG_NRF_WIFI_BUILD_ONLY_MODE) + message(WARNING " + ------------------------------------------------------------------------ + Building only the nRF70 driver, skipping firmware patch. + This is only for building (CI) purposes and will not work on a real device. + ------------------------------------------------------------------------ + ") +elseif(CONFIG_NRF_WIFI_PATCHES_BUILTIN) + zephyr_blobs_verify(MODULE nrf_wifi REQUIRED) + # RPU FW patch binaries based on the selected configuration + if(CONFIG_NRF70_SYSTEM_MODE) + set(NRF70_PATCH ${FW_BINS_BASE}/default/nrf70.bin) + elseif(CONFIG_NRF70_RADIO_TEST) + set(NRF70_PATCH ${FW_BINS_BASE}/radio_test/nrf70.bin) + elseif(CONFIG_NRF70_SCAN_ONLY) + set(NRF70_PATCH ${FW_BINS_BASE}/scan_only/nrf70.bin) + elseif (CONFIG_NRF70_SYSTEM_WITH_RAW_MODES) + set(NRF70_PATCH ${FW_BINS_BASE}/system_with_raw/nrf70.bin) + elseif(CONFIG_NRF70_OFFLOADED_RAW_TX) + set(NRF70_PATCH ${FW_BINS_BASE}/offloaded_raw_tx/nrf70.bin) + else() + # Error + message(FATAL_ERROR "Unsupported nRF70 patch configuration") + endif() + + set(gen_inc_dir ${ZEPHYR_BINARY_DIR}/misc/generated) + zephyr_include_directories(${gen_inc_dir}) + set(gen_dir ${gen_inc_dir}/nrf70_fw_patch) + generate_inc_file_for_target( + nrf_wifi + ${NRF70_PATCH} + ${gen_dir}/nrf70.bin.inc + ) +endif() diff --git a/drivers/wifi/nrfwifi/Kconfig.nrfwifi b/drivers/wifi/nrf_wifi/Kconfig.nrfwifi similarity index 100% rename from drivers/wifi/nrfwifi/Kconfig.nrfwifi rename to drivers/wifi/nrf_wifi/Kconfig.nrfwifi diff --git a/drivers/wifi/nrfwifi/inc/coex.h b/drivers/wifi/nrf_wifi/inc/coex.h similarity index 100% rename from drivers/wifi/nrfwifi/inc/coex.h rename to drivers/wifi/nrf_wifi/inc/coex.h diff --git a/drivers/wifi/nrfwifi/inc/coex_struct.h b/drivers/wifi/nrf_wifi/inc/coex_struct.h similarity index 100% rename from drivers/wifi/nrfwifi/inc/coex_struct.h rename to drivers/wifi/nrf_wifi/inc/coex_struct.h diff --git a/drivers/wifi/nrfwifi/inc/fmac_main.h b/drivers/wifi/nrf_wifi/inc/fmac_main.h similarity index 100% rename from drivers/wifi/nrfwifi/inc/fmac_main.h rename to drivers/wifi/nrf_wifi/inc/fmac_main.h diff --git a/drivers/wifi/nrfwifi/inc/net_if.h b/drivers/wifi/nrf_wifi/inc/net_if.h similarity index 100% rename from drivers/wifi/nrfwifi/inc/net_if.h rename to drivers/wifi/nrf_wifi/inc/net_if.h diff --git a/drivers/wifi/nrfwifi/inc/wifi_mgmt.h b/drivers/wifi/nrf_wifi/inc/wifi_mgmt.h similarity index 100% rename from drivers/wifi/nrfwifi/inc/wifi_mgmt.h rename to drivers/wifi/nrf_wifi/inc/wifi_mgmt.h diff --git a/drivers/wifi/nrfwifi/inc/wifi_mgmt_scan.h b/drivers/wifi/nrf_wifi/inc/wifi_mgmt_scan.h similarity index 100% rename from drivers/wifi/nrfwifi/inc/wifi_mgmt_scan.h rename to drivers/wifi/nrf_wifi/inc/wifi_mgmt_scan.h diff --git a/drivers/wifi/nrfwifi/inc/wpa_supp_if.h b/drivers/wifi/nrf_wifi/inc/wpa_supp_if.h similarity index 100% rename from drivers/wifi/nrfwifi/inc/wpa_supp_if.h rename to drivers/wifi/nrf_wifi/inc/wpa_supp_if.h diff --git a/drivers/wifi/nrfwifi/off_raw_tx/inc/off_raw_tx.h b/drivers/wifi/nrf_wifi/off_raw_tx/inc/off_raw_tx.h similarity index 100% rename from drivers/wifi/nrfwifi/off_raw_tx/inc/off_raw_tx.h rename to drivers/wifi/nrf_wifi/off_raw_tx/inc/off_raw_tx.h diff --git a/drivers/wifi/nrfwifi/off_raw_tx/src/off_raw_tx_api.c b/drivers/wifi/nrf_wifi/off_raw_tx/src/off_raw_tx_api.c similarity index 99% rename from drivers/wifi/nrfwifi/off_raw_tx/src/off_raw_tx_api.c rename to drivers/wifi/nrf_wifi/off_raw_tx/src/off_raw_tx_api.c index 520814865d68b63..16bad4d50cf803e 100644 --- a/drivers/wifi/nrfwifi/off_raw_tx/src/off_raw_tx_api.c +++ b/drivers/wifi/nrf_wifi/off_raw_tx/src/off_raw_tx_api.c @@ -12,7 +12,7 @@ #include #include #include -#include +#include #include #include diff --git a/drivers/wifi/nrfwifi/src/coex.c b/drivers/wifi/nrf_wifi/src/coex.c similarity index 100% rename from drivers/wifi/nrfwifi/src/coex.c rename to drivers/wifi/nrf_wifi/src/coex.c diff --git a/drivers/wifi/nrfwifi/src/fmac_main.c b/drivers/wifi/nrf_wifi/src/fmac_main.c similarity index 100% rename from drivers/wifi/nrfwifi/src/fmac_main.c rename to drivers/wifi/nrf_wifi/src/fmac_main.c diff --git a/drivers/wifi/nrfwifi/src/fw_load.c b/drivers/wifi/nrf_wifi/src/fw_load.c similarity index 100% rename from drivers/wifi/nrfwifi/src/fw_load.c rename to drivers/wifi/nrf_wifi/src/fw_load.c diff --git a/drivers/wifi/nrfwifi/src/net_if.c b/drivers/wifi/nrf_wifi/src/net_if.c similarity index 100% rename from drivers/wifi/nrfwifi/src/net_if.c rename to drivers/wifi/nrf_wifi/src/net_if.c diff --git a/drivers/wifi/nrfwifi/src/qspi/inc/ficr_prog.h b/drivers/wifi/nrf_wifi/src/qspi/inc/ficr_prog.h similarity index 100% rename from drivers/wifi/nrfwifi/src/qspi/inc/ficr_prog.h rename to drivers/wifi/nrf_wifi/src/qspi/inc/ficr_prog.h diff --git a/drivers/wifi/nrfwifi/src/qspi/inc/qspi_if.h b/drivers/wifi/nrf_wifi/src/qspi/inc/qspi_if.h similarity index 100% rename from drivers/wifi/nrfwifi/src/qspi/inc/qspi_if.h rename to drivers/wifi/nrf_wifi/src/qspi/inc/qspi_if.h diff --git a/drivers/wifi/nrfwifi/src/qspi/inc/rpu_hw_if.h b/drivers/wifi/nrf_wifi/src/qspi/inc/rpu_hw_if.h similarity index 100% rename from drivers/wifi/nrfwifi/src/qspi/inc/rpu_hw_if.h rename to drivers/wifi/nrf_wifi/src/qspi/inc/rpu_hw_if.h diff --git a/drivers/wifi/nrfwifi/src/qspi/inc/spi_if.h b/drivers/wifi/nrf_wifi/src/qspi/inc/spi_if.h similarity index 100% rename from drivers/wifi/nrfwifi/src/qspi/inc/spi_if.h rename to drivers/wifi/nrf_wifi/src/qspi/inc/spi_if.h diff --git a/drivers/wifi/nrfwifi/src/qspi/inc/spi_nor.h b/drivers/wifi/nrf_wifi/src/qspi/inc/spi_nor.h similarity index 100% rename from drivers/wifi/nrfwifi/src/qspi/inc/spi_nor.h rename to drivers/wifi/nrf_wifi/src/qspi/inc/spi_nor.h diff --git a/drivers/wifi/nrfwifi/src/qspi/src/device.c b/drivers/wifi/nrf_wifi/src/qspi/src/device.c similarity index 100% rename from drivers/wifi/nrfwifi/src/qspi/src/device.c rename to drivers/wifi/nrf_wifi/src/qspi/src/device.c diff --git a/drivers/wifi/nrfwifi/src/qspi/src/ficr_prog.c b/drivers/wifi/nrf_wifi/src/qspi/src/ficr_prog.c similarity index 100% rename from drivers/wifi/nrfwifi/src/qspi/src/ficr_prog.c rename to drivers/wifi/nrf_wifi/src/qspi/src/ficr_prog.c diff --git a/drivers/wifi/nrfwifi/src/qspi/src/qspi_if.c b/drivers/wifi/nrf_wifi/src/qspi/src/qspi_if.c similarity index 100% rename from drivers/wifi/nrfwifi/src/qspi/src/qspi_if.c rename to drivers/wifi/nrf_wifi/src/qspi/src/qspi_if.c diff --git a/drivers/wifi/nrfwifi/src/qspi/src/rpu_hw_if.c b/drivers/wifi/nrf_wifi/src/qspi/src/rpu_hw_if.c similarity index 100% rename from drivers/wifi/nrfwifi/src/qspi/src/rpu_hw_if.c rename to drivers/wifi/nrf_wifi/src/qspi/src/rpu_hw_if.c diff --git a/drivers/wifi/nrfwifi/src/qspi/src/spi_if.c b/drivers/wifi/nrf_wifi/src/qspi/src/spi_if.c similarity index 100% rename from drivers/wifi/nrfwifi/src/qspi/src/spi_if.c rename to drivers/wifi/nrf_wifi/src/qspi/src/spi_if.c diff --git a/drivers/wifi/nrfwifi/src/wifi_mgmt.c b/drivers/wifi/nrf_wifi/src/wifi_mgmt.c similarity index 100% rename from drivers/wifi/nrfwifi/src/wifi_mgmt.c rename to drivers/wifi/nrf_wifi/src/wifi_mgmt.c diff --git a/drivers/wifi/nrfwifi/src/wifi_mgmt_scan.c b/drivers/wifi/nrf_wifi/src/wifi_mgmt_scan.c similarity index 100% rename from drivers/wifi/nrfwifi/src/wifi_mgmt_scan.c rename to drivers/wifi/nrf_wifi/src/wifi_mgmt_scan.c diff --git a/drivers/wifi/nrfwifi/src/wifi_util.c b/drivers/wifi/nrf_wifi/src/wifi_util.c similarity index 100% rename from drivers/wifi/nrfwifi/src/wifi_util.c rename to drivers/wifi/nrf_wifi/src/wifi_util.c diff --git a/drivers/wifi/nrfwifi/src/wifi_util.h b/drivers/wifi/nrf_wifi/src/wifi_util.h similarity index 100% rename from drivers/wifi/nrfwifi/src/wifi_util.h rename to drivers/wifi/nrf_wifi/src/wifi_util.h diff --git a/drivers/wifi/nrfwifi/src/wpa_supp_if.c b/drivers/wifi/nrf_wifi/src/wpa_supp_if.c similarity index 100% rename from drivers/wifi/nrfwifi/src/wpa_supp_if.c rename to drivers/wifi/nrf_wifi/src/wpa_supp_if.c diff --git a/drivers/wifi/nrfwifi/CMakeLists.txt b/drivers/wifi/nrfwifi/CMakeLists.txt deleted file mode 100644 index 439263ec6151e02..000000000000000 --- a/drivers/wifi/nrfwifi/CMakeLists.txt +++ /dev/null @@ -1,358 +0,0 @@ -# -# Copyright (c) 2024 Nordic Semiconductor ASA -# -# SPDX-License-Identifier: Apache-2.0 -# - -zephyr_library_named(nrfwifi) - -set(OS_AGNOSTIC_BASE ${ZEPHYR_HAL_NORDIC_MODULE_DIR}/drivers/nrf_wifi) -set(FW_BINS_BASE ${ZEPHYR_HAL_NORDIC_MODULE_DIR}/zephyr/blobs/wifi_fw_bins) - -zephyr_include_directories( - inc - ${OS_AGNOSTIC_BASE}/utils/inc - ${OS_AGNOSTIC_BASE}/os_if/inc - ${OS_AGNOSTIC_BASE}/bus_if/bus/qspi/inc - ${OS_AGNOSTIC_BASE}/bus_if/bal/inc - ${OS_AGNOSTIC_BASE}/fw_if/umac_if/inc - ${OS_AGNOSTIC_BASE}/fw_load/mips/fw/inc - ${OS_AGNOSTIC_BASE}/hw_if/hal/inc - src/qspi/inc - # for net_sprint_ll_addr - ${ZEPHYR_BASE}/subsys/net/ip - ${OS_AGNOSTIC_BASE}/hw_if/hal/inc/fw - ${OS_AGNOSTIC_BASE}/fw_if/umac_if/inc/fw -) - -zephyr_include_directories_ifdef(CONFIG_NRF70_RADIO_TEST - ${OS_AGNOSTIC_BASE}/fw_if/umac_if/inc/radio_test -) - -zephyr_include_directories_ifdef(CONFIG_NRF70_OFFLOADED_RAW_TX - ${OS_AGNOSTIC_BASE}/fw_if/umac_if/inc/offload_raw_tx - off_raw_tx/inc -) - -if(NOT CONFIG_NRF70_RADIO_TEST AND NOT CONFIG_NRF70_OFFLOADED_RAW_TX) - zephyr_include_directories(${OS_AGNOSTIC_BASE}/fw_if/umac_if/inc/default) -endif() - -zephyr_library_sources_ifdef(CONFIG_NRF70_SR_COEX - src/coex.c -) - -zephyr_library_sources( - ${OS_AGNOSTIC_BASE}/os_if/src/osal.c - ${OS_AGNOSTIC_BASE}/utils/src/list.c - ${OS_AGNOSTIC_BASE}/utils/src/queue.c - ${OS_AGNOSTIC_BASE}/utils/src/util.c - ${OS_AGNOSTIC_BASE}/hw_if/hal/src/hal_api.c - ${OS_AGNOSTIC_BASE}/hw_if/hal/src/hal_fw_patch_loader.c - ${OS_AGNOSTIC_BASE}/hw_if/hal/src/hal_interrupt.c - ${OS_AGNOSTIC_BASE}/hw_if/hal/src/hal_mem.c - ${OS_AGNOSTIC_BASE}/hw_if/hal/src/hal_reg.c - ${OS_AGNOSTIC_BASE}/hw_if/hal/src/hpqm.c - ${OS_AGNOSTIC_BASE}/hw_if/hal/src/pal.c - ${OS_AGNOSTIC_BASE}/bus_if/bal/src/bal.c - ${OS_AGNOSTIC_BASE}/bus_if/bus/qspi/src/qspi.c - ${OS_AGNOSTIC_BASE}/fw_if/umac_if/src/cmd.c - ${OS_AGNOSTIC_BASE}/fw_if/umac_if/src/event.c - ${OS_AGNOSTIC_BASE}/fw_if/umac_if/src/fmac_api_common.c - src/shim.c - src/work.c - src/timer.c - src/qspi/src/device.c - src/qspi/src/rpu_hw_if.c - src/qspi/src/ficr_prog.c -) - -zephyr_library_sources_ifndef(CONFIG_NRF70_OFFLOADED_RAW_TX - src/fmac_main.c -) - -zephyr_library_sources_ifdef(CONFIG_NRF_WIFI_PATCHES_BUILTIN - src/fw_load.c -) - -if(NOT CONFIG_NRF70_RADIO_TEST AND NOT CONFIG_NRF70_OFFLOADED_RAW_TX) - zephyr_library_sources( - ${OS_AGNOSTIC_BASE}/fw_if/umac_if/src/rx.c - ${OS_AGNOSTIC_BASE}/fw_if/umac_if/src/fmac_vif.c - ${OS_AGNOSTIC_BASE}/fw_if/umac_if/src/fmac_util.c - src/net_if.c - ${OS_AGNOSTIC_BASE}/fw_if/umac_if/src/default/fmac_api.c -) -endif() - -zephyr_library_sources_ifdef(CONFIG_NET_L2_WIFI_MGMT - src/wifi_mgmt_scan.c -) - -zephyr_library_sources_ifdef(CONFIG_NRF70_SYSTEM_MODE_COMMON - src/wifi_mgmt.c -) - -zephyr_library_sources_ifdef(CONFIG_NRF70_RADIO_TEST - ${OS_AGNOSTIC_BASE}/fw_if/umac_if/src/radio_test/fmac_api.c - ${OS_AGNOSTIC_BASE}/fw_if/umac_if/src/fmac_util.c -) - -zephyr_library_sources_ifdef(CONFIG_NRF70_OFFLOADED_RAW_TX - ${OS_AGNOSTIC_BASE}/fw_if/umac_if/src/offload_raw_tx/fmac_api.c - ${OS_AGNOSTIC_BASE}/fw_if/umac_if/src/fmac_util.c - off_raw_tx/src/off_raw_tx_api.c -) - -zephyr_library_sources_ifdef(CONFIG_NRF70_DATA_TX - ${OS_AGNOSTIC_BASE}/fw_if/umac_if/src/tx.c - ${OS_AGNOSTIC_BASE}/fw_if/umac_if/src/fmac_peer.c -) - -zephyr_library_sources_ifdef(CONFIG_NRF70_STA_MODE - src/wpa_supp_if.c - src/wifi_mgmt.c - ${OS_AGNOSTIC_BASE}/fw_if/umac_if/src/fmac_peer.c - ${OS_AGNOSTIC_BASE}/fw_if/umac_if/src/fmac_util.c -) - -zephyr_library_sources_ifdef(CONFIG_NRF70_AP_MODE - ${OS_AGNOSTIC_BASE}/fw_if/umac_if/src/fmac_ap.c -) - - -# Without WPA supplicant we only support scan -zephyr_library_sources_ifdef(CONFIG_NRF70_STA_MODE - src/wpa_supp_if.c - ${OS_AGNOSTIC_BASE}/fw_if/umac_if/src/fmac_peer.c - ${OS_AGNOSTIC_BASE}/fw_if/umac_if/src/fmac_util.c -) - -zephyr_library_sources_ifdef(CONFIG_NRF70_PROMISC_DATA_RX - ${OS_AGNOSTIC_BASE}/fw_if/umac_if/src/fmac_promisc.c -) - -zephyr_library_sources_ifdef(CONFIG_NRF70_ON_QSPI - src/qspi/src/qspi_if.c -) - -zephyr_library_sources_ifdef(CONFIG_NRF70_ON_SPI - src/qspi/src/spi_if.c -) - -zephyr_library_sources_ifdef(CONFIG_NRF70_UTIL - src/wifi_util.c -) - -zephyr_compile_definitions_ifdef(CONFIG_NRF70_ON_QSPI -# These are XIP related anomalies and aren't applicable for nRF7002 and cause -# throughput issues. - -DNRF53_ERRATA_43_ENABLE_WORKAROUND=0 - -DNRF52_ERRATA_215_ENABLE_WORKAROUND=0 -# nRF70 QSPI doesn't use 192MHz clock and most samples use 128MHz, this can cause anomaly 159 -# but as its rare and not seen in most cases, we can disable it. -# Alternative is 128MHz CPU should be disabled that impacts Wi-Fi performance. - -DNRF53_ERRATA_159_ENABLE_WORKAROUND=0 -) - -if (CONFIG_NRF_WIFI_BUILD_ONLY_MODE) - message(WARNING " - ------------------------------------------------------------------------ - Building only the nRF70 driver, skipping firmware patch. - This is only for building (CI) purposes and will not work on a real device. - ------------------------------------------------------------------------ - ") -elseif(CONFIG_NRF_WIFI_PATCHES_BUILTIN) - # RPU FW patch binaries based on the selected configuration - if(CONFIG_NRF70_SYSTEM_MODE) - set(NRF70_PATCH ${FW_BINS_BASE}/default/nrf70.bin) - elseif(CONFIG_NRF70_RADIO_TEST) - set(NRF70_PATCH ${FW_BINS_BASE}/radio_test/nrf70.bin) - elseif(CONFIG_NRF70_SCAN_ONLY) - set(NRF70_PATCH ${FW_BINS_BASE}/scan_only/nrf70.bin) - elseif (CONFIG_NRF70_SYSTEM_WITH_RAW_MODES) - set(NRF70_PATCH ${FW_BINS_BASE}/system_with_raw/nrf70.bin) - elseif(CONFIG_NRF70_OFFLOADED_RAW_TX) - set(NRF70_PATCH ${FW_BINS_BASE}/offloaded_raw_tx/nrf70.bin) - else() - # Error - message(FATAL_ERROR "Unsupported nRF70 patch configuration") - endif() - - if(NOT EXISTS ${NRF70_PATCH}) - message(FATAL_ERROR " - ------------------------------------------------------------------------ - Missing blobs for nRF70 device driver, please install by running: - $ west update - $ west blobs fetch hal_nordic - ------------------------------------------------------------------------") - endif() - - set(gen_inc_dir ${ZEPHYR_BINARY_DIR}/misc/generated) - zephyr_include_directories(${gen_inc_dir}) - set(gen_dir ${gen_inc_dir}/nrf70_fw_patch) - generate_inc_file_for_target( - nrfwifi - ${NRF70_PATCH} - ${gen_dir}/nrf70.bin.inc - ) -endif() - - - -# Translate the configuration to the OS agnostic code -zephyr_compile_definitions_ifdef(CONFIG_NRF_WIFI_LOW_POWER - -DNRF_WIFI_LOW_POWER -) - -zephyr_compile_definitions_ifdef(CONFIG_NRF_WIFI_RPU_RECOVERY - -DNRF_WIFI_RPU_RECOVERY -) - -zephyr_compile_definitions_ifdef(CONFIG_NRF_WIFI_AP_DEAD_DETECT_TIMEOUT - -DNRF_WIFI_AP_DEAD_DETECT_TIMEOUT=${CONFIG_NRF_WIFI_AP_DEAD_DETECT_TIMEOUT} -) - -zephyr_compile_definitions_ifdef(CONFIG_NRF_WIFI_IFACE_MTU - -DNRF_WIFI_IFACE_MTU=${CONFIG_NRF_WIFI_IFACE_MTU} -) - -zephyr_compile_definitions_ifdef(CONFIG_NRF70_STA_MODE - -DNRF70_STA_MODE -) - -zephyr_compile_definitions_ifdef(CONFIG_NRF70_DATA_TX - -DNRF70_DATA_TX -) - -zephyr_compile_definitions_ifdef(CONFIG_NRF70_RAW_DATA_TX - -DNRF70_RAW_DATA_TX -) - -zephyr_compile_definitions_ifdef(CONFIG_NRF70_RAW_DATA_RX - -DNRF70_RAW_DATA_RX -) - -zephyr_compile_definitions_ifdef(CONFIG_NRF70_PROMISC_DATA_RX - -DNRF70_PROMISC_DATA_RX -) - -zephyr_compile_definitions_ifdef(CONFIG_NRF70_TX_DONE_WQ_ENABLED - -DNRF70_TX_DONE_WQ_ENABLED -) - -zephyr_compile_definitions_ifdef(CONFIG_NRF70_RX_WQ_ENABLED - -DNRF70_RX_WQ_ENABLED -) - -zephyr_compile_definitions_ifdef(CONFIG_NRF70_UTIL - -DNRF70_UTIL -) - -zephyr_compile_definitions_ifdef(CONFIG_NRF70_RADIO_TEST - -DNRF70_RADIO_TEST -) - -zephyr_compile_definitions_ifdef(CONFIG_NRF70_OFFLOADED_RAW_TX - -DNRF70_OFFLOADED_RAW_TX -) - -zephyr_compile_definitions_ifdef(CONFIG_NRF70_TCP_IP_CHECKSUM_OFFLOAD - -DNRF70_TCP_IP_CHECKSUM_OFFLOAD -) - -zephyr_compile_definitions_ifdef(CONFIG_NRF70_RPU_EXTEND_TWT_SP - -DNRF70_RPU_EXTEND_TWT_SP -) - -zephyr_compile_definitions_ifdef(CONFIG_NRF70_SYSTEM_WITH_RAW_MODES - -DNRF70_SYSTEM_WITH_RAW_MODES -) - -zephyr_compile_definitions_ifdef(CONFIG_NRF70_SCAN_ONLY - -DNRF70_SCAN_ONLY -) - -zephyr_compile_definitions_ifdef(CONFIG_NRF70_SYSTEM_MODE - -DNRF70_SYSTEM_MODE -) - -zephyr_compile_definitions_ifdef(CONFIG_NRF70_2_4G_ONLY - -DNRF70_2_4G_ONLY -) - -zephyr_compile_definitions_ifdef(CONFIG_NRF70_LOG_VERBOSE - -DNRF70_LOG_VERBOSE -) - -zephyr_compile_definitions_ifdef(CONFIG_NRF70_AP_MODE - -DNRF70_AP_MODE -) - -zephyr_compile_definitions_ifdef(CONFIG_NRF_WIFI_MGMT_BUFF_OFFLOAD - -DNRF_WIFI_MGMT_BUFF_OFFLOAD -) - -zephyr_compile_definitions_ifdef(CONFIG_NRF_WIFI_FEAT_KEEPALIVE - -DNRF_WIFI_FEAT_KEEPALIVE -) - -zephyr_compile_definitions_ifdef(CONFIG_NRF_WIFI_FEAT_KEEPALIVE - -DNRF_WIFI_KEEPALIVE_PERIOD_S=${CONFIG_NRF_WIFI_KEEPALIVE_PERIOD_S} -) - -zephyr_compile_definitions_ifdef(CONFIG_WIFI_MGMT_RAW_SCAN_RESULTS - -DWIFI_MGMT_RAW_SCAN_RESULTS=${CONFIG_WIFI_MGMT_RAW_SCAN_RESULTS} -) - -zephyr_compile_definitions_ifdef(CONFIG_NRF70_OFFLOADED_RAW_TX - -DNRF_NRF70_OFFLOADED_RAW_TX -) - -zephyr_compile_definitions_ifdef(CONFIG_NRF70_PASSIVE_SCAN_ONLY - -DNRF70_PASSIVE_SCAN_ONLY -) - -zephyr_compile_definitions( - -DNRF70_RX_NUM_BUFS=${CONFIG_NRF70_RX_NUM_BUFS} - -DNRF70_MAX_TX_TOKENS=${CONFIG_NRF70_MAX_TX_TOKENS} - -DNRF70_RX_MAX_DATA_SIZE=${CONFIG_NRF70_RX_MAX_DATA_SIZE} - -DNRF70_MAX_TX_PENDING_QLEN=${CONFIG_NRF70_MAX_TX_PENDING_QLEN} - -DNRF70_RPU_PS_IDLE_TIMEOUT_MS=${CONFIG_NRF70_RPU_PS_IDLE_TIMEOUT_MS} - -DNRF70_BAND_2G_LOWER_EDGE_BACKOFF_DSSS=${CONFIG_NRF70_BAND_2G_LOWER_EDGE_BACKOFF_DSSS} - -DNRF70_BAND_2G_LOWER_EDGE_BACKOFF_HT=${CONFIG_NRF70_BAND_2G_LOWER_EDGE_BACKOFF_HT} - -DNRF70_BAND_2G_LOWER_EDGE_BACKOFF_HE=${CONFIG_NRF70_BAND_2G_LOWER_EDGE_BACKOFF_HE} - -DNRF70_BAND_2G_UPPER_EDGE_BACKOFF_DSSS=${CONFIG_NRF70_BAND_2G_UPPER_EDGE_BACKOFF_DSSS} - -DNRF70_BAND_2G_UPPER_EDGE_BACKOFF_HT=${CONFIG_NRF70_BAND_2G_UPPER_EDGE_BACKOFF_HT} - -DNRF70_BAND_2G_UPPER_EDGE_BACKOFF_HE=${CONFIG_NRF70_BAND_2G_UPPER_EDGE_BACKOFF_HE} - -DNRF70_BAND_UNII_1_LOWER_EDGE_BACKOFF_HT=${CONFIG_NRF70_BAND_UNII_1_LOWER_EDGE_BACKOFF_HT} - -DNRF70_BAND_UNII_1_LOWER_EDGE_BACKOFF_HE=${CONFIG_NRF70_BAND_UNII_1_LOWER_EDGE_BACKOFF_HE} - -DNRF70_BAND_UNII_1_UPPER_EDGE_BACKOFF_HT=${CONFIG_NRF70_BAND_UNII_1_UPPER_EDGE_BACKOFF_HT} - -DNRF70_BAND_UNII_1_UPPER_EDGE_BACKOFF_HE=${CONFIG_NRF70_BAND_UNII_1_UPPER_EDGE_BACKOFF_HE} - -DNRF70_BAND_UNII_2A_LOWER_EDGE_BACKOFF_HT=${CONFIG_NRF70_BAND_UNII_2A_LOWER_EDGE_BACKOFF_HT} - -DNRF70_BAND_UNII_2A_LOWER_EDGE_BACKOFF_HE=${CONFIG_NRF70_BAND_UNII_2A_LOWER_EDGE_BACKOFF_HE} - -DNRF70_BAND_UNII_2A_UPPER_EDGE_BACKOFF_HT=${CONFIG_NRF70_BAND_UNII_2A_UPPER_EDGE_BACKOFF_HT} - -DNRF70_BAND_UNII_2A_UPPER_EDGE_BACKOFF_HE=${CONFIG_NRF70_BAND_UNII_2A_UPPER_EDGE_BACKOFF_HE} - -DNRF70_BAND_UNII_2C_LOWER_EDGE_BACKOFF_HT=${CONFIG_NRF70_BAND_UNII_2C_LOWER_EDGE_BACKOFF_HT} - -DNRF70_BAND_UNII_2C_LOWER_EDGE_BACKOFF_HE=${CONFIG_NRF70_BAND_UNII_2C_LOWER_EDGE_BACKOFF_HE} - -DNRF70_BAND_UNII_2C_UPPER_EDGE_BACKOFF_HT=${CONFIG_NRF70_BAND_UNII_2C_UPPER_EDGE_BACKOFF_HT} - -DNRF70_BAND_UNII_2C_UPPER_EDGE_BACKOFF_HE=${CONFIG_NRF70_BAND_UNII_2C_UPPER_EDGE_BACKOFF_HE} - -DNRF70_BAND_UNII_3_LOWER_EDGE_BACKOFF_HT=${CONFIG_NRF70_BAND_UNII_3_LOWER_EDGE_BACKOFF_HT} - -DNRF70_BAND_UNII_3_LOWER_EDGE_BACKOFF_HE=${CONFIG_NRF70_BAND_UNII_3_LOWER_EDGE_BACKOFF_HE} - -DNRF70_BAND_UNII_3_UPPER_EDGE_BACKOFF_HT=${CONFIG_NRF70_BAND_UNII_3_UPPER_EDGE_BACKOFF_HT} - -DNRF70_BAND_UNII_3_UPPER_EDGE_BACKOFF_HE=${CONFIG_NRF70_BAND_UNII_3_UPPER_EDGE_BACKOFF_HE} - -DNRF70_BAND_UNII_4_LOWER_EDGE_BACKOFF_HT=${CONFIG_NRF70_BAND_UNII_4_LOWER_EDGE_BACKOFF_HT} - -DNRF70_BAND_UNII_4_LOWER_EDGE_BACKOFF_HE=${CONFIG_NRF70_BAND_UNII_4_LOWER_EDGE_BACKOFF_HE} - -DNRF70_BAND_UNII_4_UPPER_EDGE_BACKOFF_HT=${CONFIG_NRF70_BAND_UNII_4_UPPER_EDGE_BACKOFF_HT} - -DNRF70_BAND_UNII_4_UPPER_EDGE_BACKOFF_HE=${CONFIG_NRF70_BAND_UNII_4_UPPER_EDGE_BACKOFF_HE} - -DNRF70_PCB_LOSS_2G=${CONFIG_NRF70_PCB_LOSS_2G} - -DNRF70_PCB_LOSS_5G_BAND1=${CONFIG_NRF70_PCB_LOSS_5G_BAND1} - -DNRF70_PCB_LOSS_5G_BAND2=${CONFIG_NRF70_PCB_LOSS_5G_BAND2} - -DNRF70_PCB_LOSS_5G_BAND3=${CONFIG_NRF70_PCB_LOSS_5G_BAND3} - -DNRF70_ANT_GAIN_2G=${CONFIG_NRF70_ANT_GAIN_2G} - -DNRF70_ANT_GAIN_5G_BAND1=${CONFIG_NRF70_ANT_GAIN_5G_BAND1} - -DNRF70_ANT_GAIN_5G_BAND2=${CONFIG_NRF70_ANT_GAIN_5G_BAND2} - -DNRF70_ANT_GAIN_5G_BAND3=${CONFIG_NRF70_ANT_GAIN_5G_BAND3} - -DNRF_WIFI_PS_INT_PS=${CONFIG_NRF_WIFI_PS_INT_PS} - -DNRF_WIFI_RPU_RECOVERY_PS_ACTIVE_TIMEOUT_MS=${CONFIG_NRF_WIFI_RPU_RECOVERY_PS_ACTIVE_TIMEOUT_MS} -) diff --git a/drivers/wifi/nxp/Kconfig.nxp b/drivers/wifi/nxp/Kconfig.nxp index 8832688700e8032..3b5ecdc8603e6d2 100644 --- a/drivers/wifi/nxp/Kconfig.nxp +++ b/drivers/wifi/nxp/Kconfig.nxp @@ -486,7 +486,7 @@ config NXP_WIFI_MAX_PRIO config NXP_WIFI_SOFTAP_SUPPORT bool "Wi-Fi SoftAP Support" select NET_DHCPV4_SERVER - select WIFI_NM_WPA_SUPPLICANT_AP if WIFI_NM_WPA_SUPPLICANT + select WIFI_NM_HOSTAPD_AP if WIFI_NM_WPA_SUPPLICANT default y help Option to enable Wi-Fi SoftAP functions in the Wi-Fi driver. diff --git a/dts/arm/nuvoton/npcx/npcx4.dtsi b/dts/arm/nuvoton/npcx/npcx4.dtsi index 3c976cf28b923bc..6bc44daae1d256d 100644 --- a/dts/arm/nuvoton/npcx/npcx4.dtsi +++ b/dts/arm/nuvoton/npcx/npcx4.dtsi @@ -388,6 +388,7 @@ status = "disabled"; #address-cells = <3>; #size-cells = <0>; + instance-id = <0x00>; }; i3c1: i3c@400f2000 { @@ -413,6 +414,7 @@ status = "disabled"; #address-cells = <3>; #size-cells = <0>; + instance-id = <0x10>; }; i3c2: i3c@400f4000 { @@ -438,6 +440,7 @@ status = "disabled"; #address-cells = <3>; #size-cells = <0>; + instance-id = <0x20>; }; }; diff --git a/dts/arm/nxp/nxp_k2x.dtsi b/dts/arm/nxp/nxp_k2x.dtsi index 147ccffde0bb05e..82f594e84e12654 100644 --- a/dts/arm/nxp/nxp_k2x.dtsi +++ b/dts/arm/nxp/nxp_k2x.dtsi @@ -55,7 +55,7 @@ /* Dummy pinctrl node, filled with pin mux options at board level */ pinctrl: pinctrl { - compatible = "nxp,kinetis-pinctrl"; + compatible = "nxp,port-pinctrl"; status = "okay"; }; @@ -194,31 +194,31 @@ }; porta: pinmux@40049000 { - compatible = "nxp,kinetis-pinmux"; + compatible = "nxp,port-pinmux"; reg = <0x40049000 0xd0>; clocks = <&sim KINETIS_SIM_BUS_CLK 0x1038 9>; }; portb: pinmux@4004a000 { - compatible = "nxp,kinetis-pinmux"; + compatible = "nxp,port-pinmux"; reg = <0x4004a000 0xd0>; clocks = <&sim KINETIS_SIM_BUS_CLK 0x1038 10>; }; portc: pinmux@4004b000 { - compatible = "nxp,kinetis-pinmux"; + compatible = "nxp,port-pinmux"; reg = <0x4004b000 0xd0>; clocks = <&sim KINETIS_SIM_BUS_CLK 0x1038 11>; }; portd: pinmux@4004c000 { - compatible = "nxp,kinetis-pinmux"; + compatible = "nxp,port-pinmux"; reg = <0x4004c000 0xd0>; clocks = <&sim KINETIS_SIM_BUS_CLK 0x1038 12>; }; porte: pinmux@4004d000 { - compatible = "nxp,kinetis-pinmux"; + compatible = "nxp,port-pinmux"; reg = <0x4004d000 0xd0>; clocks = <&sim KINETIS_SIM_BUS_CLK 0x1038 13>; }; diff --git a/dts/arm/nxp/nxp_k6x.dtsi b/dts/arm/nxp/nxp_k6x.dtsi index 38c8dfe0517a002..f478e1eb1a82808 100644 --- a/dts/arm/nxp/nxp_k6x.dtsi +++ b/dts/arm/nxp/nxp_k6x.dtsi @@ -74,7 +74,7 @@ /* Dummy pinctrl node, filled with pin mux options at board level */ pinctrl: pinctrl { - compatible = "nxp,kinetis-pinctrl"; + compatible = "nxp,port-pinctrl"; status = "okay"; }; @@ -255,31 +255,31 @@ }; porta: pinmux@40049000 { - compatible = "nxp,kinetis-pinmux"; + compatible = "nxp,port-pinmux"; reg = <0x40049000 0xd0>; clocks = <&sim KINETIS_SIM_BUS_CLK 0x1038 9>; }; portb: pinmux@4004a000 { - compatible = "nxp,kinetis-pinmux"; + compatible = "nxp,port-pinmux"; reg = <0x4004a000 0xd0>; clocks = <&sim KINETIS_SIM_BUS_CLK 0x1038 10>; }; portc: pinmux@4004b000 { - compatible = "nxp,kinetis-pinmux"; + compatible = "nxp,port-pinmux"; reg = <0x4004b000 0xd0>; clocks = <&sim KINETIS_SIM_BUS_CLK 0x1038 11>; }; portd: pinmux@4004c000 { - compatible = "nxp,kinetis-pinmux"; + compatible = "nxp,port-pinmux"; reg = <0x4004c000 0xd0>; clocks = <&sim KINETIS_SIM_BUS_CLK 0x1038 12>; }; porte: pinmux@4004d000 { - compatible = "nxp,kinetis-pinmux"; + compatible = "nxp,port-pinmux"; reg = <0x4004d000 0xd0>; clocks = <&sim KINETIS_SIM_BUS_CLK 0x1038 13>; }; diff --git a/dts/arm/nxp/nxp_k8x.dtsi b/dts/arm/nxp/nxp_k8x.dtsi index aeb747add09c571..7270656fd069378 100644 --- a/dts/arm/nxp/nxp_k8x.dtsi +++ b/dts/arm/nxp/nxp_k8x.dtsi @@ -34,7 +34,7 @@ /* Dummy pinctrl node, filled with pin mux options at board level */ pinctrl: pinctrl { - compatible = "nxp,kinetis-pinctrl"; + compatible = "nxp,port-pinctrl"; status = "okay"; }; @@ -260,31 +260,31 @@ }; porta: pinmux@40049000 { - compatible = "nxp,kinetis-pinmux"; + compatible = "nxp,port-pinmux"; reg = <0x40049000 0x1000>; clocks = <&sim KINETIS_SIM_BUS_CLK 0x1038 9>; }; portb: pinmux@4004a000 { - compatible = "nxp,kinetis-pinmux"; + compatible = "nxp,port-pinmux"; reg = <0x4004a000 0x1000>; clocks = <&sim KINETIS_SIM_BUS_CLK 0x1038 10>; }; portc: pinmux@4004b000 { - compatible = "nxp,kinetis-pinmux"; + compatible = "nxp,port-pinmux"; reg = <0x4004b000 0x1000>; clocks = <&sim KINETIS_SIM_BUS_CLK 0x1038 11>; }; portd: pinmux@4004c000 { - compatible = "nxp,kinetis-pinmux"; + compatible = "nxp,port-pinmux"; reg = <0x4004c000 0x1000>; clocks = <&sim KINETIS_SIM_BUS_CLK 0x1038 12>; }; porte: pinmux@4004d000 { - compatible = "nxp,kinetis-pinmux"; + compatible = "nxp,port-pinmux"; reg = <0x4004d000 0x1000>; clocks = <&sim KINETIS_SIM_BUS_CLK 0x1038 13>; }; diff --git a/dts/arm/nxp/nxp_ke1xf.dtsi b/dts/arm/nxp/nxp_ke1xf.dtsi index c6280351ca36f47..e43ce5942785f17 100644 --- a/dts/arm/nxp/nxp_ke1xf.dtsi +++ b/dts/arm/nxp/nxp_ke1xf.dtsi @@ -92,7 +92,7 @@ /* Dummy pinctrl node, filled with pin mux options at board level */ pinctrl: pinctrl { - compatible = "nxp,kinetis-pinctrl"; + compatible = "nxp,port-pinctrl"; status = "okay"; }; @@ -422,31 +422,31 @@ }; porta: pinmux@40049000 { - compatible = "nxp,kinetis-pinmux"; + compatible = "nxp,port-pinmux"; reg = <0x40049000 0x1000>; clocks = <&pcc 0x124 KINETIS_PCC_SRC_NONE_OR_EXT>; }; portb: pinmux@4004a000 { - compatible = "nxp,kinetis-pinmux"; + compatible = "nxp,port-pinmux"; reg = <0x4004a000 0x1000>; clocks = <&pcc 0x128 KINETIS_PCC_SRC_NONE_OR_EXT>; }; portc: pinmux@4004b000 { - compatible = "nxp,kinetis-pinmux"; + compatible = "nxp,port-pinmux"; reg = <0x4004b000 0x1000>; clocks = <&pcc 0x12c KINETIS_PCC_SRC_NONE_OR_EXT>; }; portd: pinmux@4004c000 { - compatible = "nxp,kinetis-pinmux"; + compatible = "nxp,port-pinmux"; reg = <0x4004c000 0x1000>; clocks = <&pcc 0x130 KINETIS_PCC_SRC_NONE_OR_EXT>; }; porte: pinmux@4004d000 { - compatible = "nxp,kinetis-pinmux"; + compatible = "nxp,port-pinmux"; reg = <0x4004d000 0x1000>; clocks = <&pcc 0x134 KINETIS_PCC_SRC_NONE_OR_EXT>; }; diff --git a/dts/arm/nxp/nxp_ke1xz.dtsi b/dts/arm/nxp/nxp_ke1xz.dtsi index 6268ffb9aa464ea..7c40a9adbc26b3a 100644 --- a/dts/arm/nxp/nxp_ke1xz.dtsi +++ b/dts/arm/nxp/nxp_ke1xz.dtsi @@ -67,7 +67,7 @@ }; pinctrl: pinctrl { - compatible = "nxp,kinetis-pinctrl"; + compatible = "nxp,port-pinctrl"; }; soc { @@ -187,31 +187,31 @@ }; porta: pinmux@40049000 { - compatible = "nxp,kinetis-pinmux"; + compatible = "nxp,port-pinmux"; reg = <0x40049000 0x1000>; clocks = <&pcc 0x124 KINETIS_PCC_SRC_NONE_OR_EXT>; }; portb: pinmux@4004a000 { - compatible = "nxp,kinetis-pinmux"; + compatible = "nxp,port-pinmux"; reg = <0x4004a000 0x1000>; clocks = <&pcc 0x128 KINETIS_PCC_SRC_NONE_OR_EXT>; }; portc: pinmux@4004b000 { - compatible = "nxp,kinetis-pinmux"; + compatible = "nxp,port-pinmux"; reg = <0x4004b000 0x1000>; clocks = <&pcc 0x12c KINETIS_PCC_SRC_NONE_OR_EXT>; }; portd: pinmux@4004c000 { - compatible = "nxp,kinetis-pinmux"; + compatible = "nxp,port-pinmux"; reg = <0x4004c000 0x1000>; clocks = <&pcc 0x130 KINETIS_PCC_SRC_NONE_OR_EXT>; }; porte: pinmux@4004d000 { - compatible = "nxp,kinetis-pinmux"; + compatible = "nxp,port-pinmux"; reg = <0x4004d000 0x1000>; clocks = <&pcc 0x134 KINETIS_PCC_SRC_NONE_OR_EXT>; }; diff --git a/dts/arm/nxp/nxp_kl25z.dtsi b/dts/arm/nxp/nxp_kl25z.dtsi index bd1e30a98191d1c..c41820d63fdc921 100644 --- a/dts/arm/nxp/nxp_kl25z.dtsi +++ b/dts/arm/nxp/nxp_kl25z.dtsi @@ -31,7 +31,7 @@ /* Dummy pinctrl node, filled with pin mux options at board level */ pinctrl: pinctrl { - compatible = "nxp,kinetis-pinctrl"; + compatible = "nxp,port-pinctrl"; status = "okay"; }; @@ -119,31 +119,31 @@ }; porta: pinmux@40049000 { - compatible = "nxp,kinetis-pinmux"; + compatible = "nxp,port-pinmux"; reg = <0x40049000 0xd0>; clocks = <&sim KINETIS_SIM_BUS_CLK 0x1038 9>; }; portb: pinmux@4004a000 { - compatible = "nxp,kinetis-pinmux"; + compatible = "nxp,port-pinmux"; reg = <0x4004a000 0xd0>; clocks = <&sim KINETIS_SIM_BUS_CLK 0x1038 10>; }; portc: pinmux@4004b000 { - compatible = "nxp,kinetis-pinmux"; + compatible = "nxp,port-pinmux"; reg = <0x4004b000 0xd0>; clocks = <&sim KINETIS_SIM_BUS_CLK 0x1038 11>; }; portd: pinmux@4004c000 { - compatible = "nxp,kinetis-pinmux"; + compatible = "nxp,port-pinmux"; reg = <0x4004c000 0xd0>; clocks = <&sim KINETIS_SIM_BUS_CLK 0x1038 12>; }; porte: pinmux@4004d000 { - compatible = "nxp,kinetis-pinmux"; + compatible = "nxp,port-pinmux"; reg = <0x4004d000 0xd0>; clocks = <&sim KINETIS_SIM_BUS_CLK 0x1038 13>; }; diff --git a/dts/arm/nxp/nxp_kv5x.dtsi b/dts/arm/nxp/nxp_kv5x.dtsi index 6569d57b431702f..230e0dccf62f625 100644 --- a/dts/arm/nxp/nxp_kv5x.dtsi +++ b/dts/arm/nxp/nxp_kv5x.dtsi @@ -29,7 +29,7 @@ /* Dummy pinctrl node, filled with pin mux options at board level */ pinctrl: pinctrl { - compatible = "nxp,kinetis-pinctrl"; + compatible = "nxp,port-pinctrl"; status = "okay"; }; @@ -177,31 +177,31 @@ }; porta: pinmux@40049000 { - compatible = "nxp,kinetis-pinmux"; + compatible = "nxp,port-pinmux"; reg = <0x40049000 0x1000>; clocks = <&sim KINETIS_SIM_BUS_CLK 0x1038 9>; }; portb: pinmux@4004a000 { - compatible = "nxp,kinetis-pinmux"; + compatible = "nxp,port-pinmux"; reg = <0x4004a000 0x1000>; clocks = <&sim KINETIS_SIM_BUS_CLK 0x1038 10>; }; portc: pinmux@4004b000 { - compatible = "nxp,kinetis-pinmux"; + compatible = "nxp,port-pinmux"; reg = <0x4004b000 0x1000>; clocks = <&sim KINETIS_SIM_BUS_CLK 0x1038 11>; }; portd: pinmux@4004c000 { - compatible = "nxp,kinetis-pinmux"; + compatible = "nxp,port-pinmux"; reg = <0x4004c000 0x1000>; clocks = <&sim KINETIS_SIM_BUS_CLK 0x1038 12>; }; porte: pinmux@4004d000 { - compatible = "nxp,kinetis-pinmux"; + compatible = "nxp,port-pinmux"; reg = <0x4004d000 0x1000>; clocks = <&sim KINETIS_SIM_BUS_CLK 0x1038 13>; }; diff --git a/dts/arm/nxp/nxp_kw2xd.dtsi b/dts/arm/nxp/nxp_kw2xd.dtsi index b0fd41ba9a335d6..e394885aa8a503f 100644 --- a/dts/arm/nxp/nxp_kw2xd.dtsi +++ b/dts/arm/nxp/nxp_kw2xd.dtsi @@ -34,7 +34,7 @@ /* Dummy pinctrl node, filled with pin mux options at board level */ pinctrl: pinctrl { - compatible = "nxp,kinetis-pinctrl"; + compatible = "nxp,port-pinctrl"; status = "okay"; /* * KW2XD is a system in package part, so the SPI1 controller is @@ -176,31 +176,31 @@ }; porta: pinmux@40049000 { - compatible = "nxp,kinetis-pinmux"; + compatible = "nxp,port-pinmux"; reg = <0x40049000 0xd0>; clocks = <&sim KINETIS_SIM_BUS_CLK 0x1038 9>; }; portb: pinmux@4004a000 { - compatible = "nxp,kinetis-pinmux"; + compatible = "nxp,port-pinmux"; reg = <0x4004a000 0xd0>; clocks = <&sim KINETIS_SIM_BUS_CLK 0x1038 10>; }; portc: pinmux@4004b000 { - compatible = "nxp,kinetis-pinmux"; + compatible = "nxp,port-pinmux"; reg = <0x4004b000 0xd0>; clocks = <&sim KINETIS_SIM_BUS_CLK 0x1038 11>; }; portd: pinmux@4004c000 { - compatible = "nxp,kinetis-pinmux"; + compatible = "nxp,port-pinmux"; reg = <0x4004c000 0xd0>; clocks = <&sim KINETIS_SIM_BUS_CLK 0x1038 12>; }; porte: pinmux@4004d000 { - compatible = "nxp,kinetis-pinmux"; + compatible = "nxp,port-pinmux"; reg = <0x4004d000 0xd0>; clocks = <&sim KINETIS_SIM_BUS_CLK 0x1038 13>; }; diff --git a/dts/arm/nxp/nxp_kw40z.dtsi b/dts/arm/nxp/nxp_kw40z.dtsi index 06df329b44eb43f..9046fe56a880da3 100644 --- a/dts/arm/nxp/nxp_kw40z.dtsi +++ b/dts/arm/nxp/nxp_kw40z.dtsi @@ -32,7 +32,7 @@ /* Dummy pinctrl node, filled with pin mux options at board level */ pinctrl: pinctrl { - compatible = "nxp,kinetis-pinctrl"; + compatible = "nxp,port-pinctrl"; status = "okay"; }; @@ -124,19 +124,19 @@ }; porta: pinmux@40049000 { - compatible = "nxp,kinetis-pinmux"; + compatible = "nxp,port-pinmux"; reg = <0x40049000 0xa4>; clocks = <&sim KINETIS_SIM_BUS_CLK 0x1038 9>; }; portb: pinmux@4004a000 { - compatible = "nxp,kinetis-pinmux"; + compatible = "nxp,port-pinmux"; reg = <0x4004a000 0xa4>; clocks = <&sim KINETIS_SIM_BUS_CLK 0x1038 10>; }; portc: pinmux@4004b000 { - compatible = "nxp,kinetis-pinmux"; + compatible = "nxp,port-pinmux"; reg = <0x4004b000 0xa4>; clocks = <&sim KINETIS_SIM_BUS_CLK 0x1038 11>; }; diff --git a/dts/arm/nxp/nxp_kw41z.dtsi b/dts/arm/nxp/nxp_kw41z.dtsi index 87c69d17f5e4dcf..a3e61d11e76910e 100644 --- a/dts/arm/nxp/nxp_kw41z.dtsi +++ b/dts/arm/nxp/nxp_kw41z.dtsi @@ -37,7 +37,7 @@ /* Dummy pinctrl node, filled with pin mux options at board level */ pinctrl: pinctrl { - compatible = "nxp,kinetis-pinctrl"; + compatible = "nxp,port-pinctrl"; status = "okay"; }; @@ -131,19 +131,19 @@ }; porta: pinmux@40049000 { - compatible = "nxp,kinetis-pinmux"; + compatible = "nxp,port-pinmux"; reg = <0x40049000 0xa4>; clocks = <&sim KINETIS_SIM_BUS_CLK 0x1038 9>; }; portb: pinmux@4004a000 { - compatible = "nxp,kinetis-pinmux"; + compatible = "nxp,port-pinmux"; reg = <0x4004a000 0xa4>; clocks = <&sim KINETIS_SIM_BUS_CLK 0x1038 10>; }; portc: pinmux@4004b000 { - compatible = "nxp,kinetis-pinmux"; + compatible = "nxp,port-pinmux"; reg = <0x4004b000 0xa4>; clocks = <&sim KINETIS_SIM_BUS_CLK 0x1038 11>; }; diff --git a/dts/arm/nxp/nxp_mcxa156.dtsi b/dts/arm/nxp/nxp_mcxa156.dtsi index 3397861dc63925b..900b18b81099078 100644 --- a/dts/arm/nxp/nxp_mcxa156.dtsi +++ b/dts/arm/nxp/nxp_mcxa156.dtsi @@ -24,7 +24,7 @@ /* Dummy pinctrl node, filled with pin mux options at board level */ pinctrl: pinctrl { - compatible = "nxp,kinetis-pinctrl"; + compatible = "nxp,port-pinctrl"; status = "okay"; }; @@ -50,31 +50,31 @@ }; porta: pinmux@400bc000 { - compatible = "nxp,kinetis-pinmux"; + compatible = "nxp,port-pinmux"; reg = <0x400bc000 0x1000>; clocks = <&syscon MCUX_PORT0_CLK>; }; portb: pinmux@400bd000 { - compatible = "nxp,kinetis-pinmux"; + compatible = "nxp,port-pinmux"; reg = <0x400bd000 0x1000>; clocks = <&syscon MCUX_PORT1_CLK>; }; portc: pinmux@400be000 { - compatible = "nxp,kinetis-pinmux"; + compatible = "nxp,port-pinmux"; reg = <0x400be000 0x1000>; clocks = <&syscon MCUX_PORT2_CLK>; }; portd: pinmux@400bf000 { - compatible = "nxp,kinetis-pinmux"; + compatible = "nxp,port-pinmux"; reg = <0x400bf000 0x1000>; clocks = <&syscon MCUX_PORT3_CLK>; }; porte: pinmux@400c0000 { - compatible = "nxp,kinetis-pinmux"; + compatible = "nxp,port-pinmux"; reg = <0x400c0000 0x1000>; clocks = <&syscon MCUX_PORT4_CLK>; }; diff --git a/dts/arm/nxp/nxp_mcxc_common.dtsi b/dts/arm/nxp/nxp_mcxc_common.dtsi index ef0b7f807e1e5c4..07c867ce1263da0 100644 --- a/dts/arm/nxp/nxp_mcxc_common.dtsi +++ b/dts/arm/nxp/nxp_mcxc_common.dtsi @@ -35,7 +35,7 @@ /* Dummy pinctrl node, filled with pin mux options at board level */ pinctrl: pinctrl { - compatible = "nxp,kinetis-pinctrl"; + compatible = "nxp,port-pinctrl"; status = "okay"; }; @@ -107,31 +107,31 @@ }; porta: pinmux@40049000 { - compatible = "nxp,kinetis-pinmux"; + compatible = "nxp,port-pinmux"; reg = <0x40049000 0xd0>; clocks = <&sim KINETIS_SIM_BUS_CLK 0x1038 9>; }; portb: pinmux@4004a000 { - compatible = "nxp,kinetis-pinmux"; + compatible = "nxp,port-pinmux"; reg = <0x4004a000 0xd0>; clocks = <&sim KINETIS_SIM_BUS_CLK 0x1038 10>; }; portc: pinmux@4004b000 { - compatible = "nxp,kinetis-pinmux"; + compatible = "nxp,port-pinmux"; reg = <0x4004b000 0xd0>; clocks = <&sim KINETIS_SIM_BUS_CLK 0x1038 11>; }; portd: pinmux@4004c000 { - compatible = "nxp,kinetis-pinmux"; + compatible = "nxp,port-pinmux"; reg = <0x4004c000 0xd0>; clocks = <&sim KINETIS_SIM_BUS_CLK 0x1038 12>; }; porte: pinmux@4004d000 { - compatible = "nxp,kinetis-pinmux"; + compatible = "nxp,port-pinmux"; reg = <0x4004d000 0xd0>; clocks = <&sim KINETIS_SIM_BUS_CLK 0x1038 13>; }; diff --git a/dts/arm/nxp/nxp_mcxn23x_common.dtsi b/dts/arm/nxp/nxp_mcxn23x_common.dtsi index 3857b30af8dc9ad..d44324ac6f8367f 100644 --- a/dts/arm/nxp/nxp_mcxn23x_common.dtsi +++ b/dts/arm/nxp/nxp_mcxn23x_common.dtsi @@ -30,7 +30,7 @@ }; pinctrl: pinctrl { - compatible = "nxp,kinetis-pinctrl"; + compatible = "nxp,port-pinctrl"; status = "okay"; }; }; @@ -74,37 +74,37 @@ }; porta: pinmux@116000 { - compatible = "nxp,kinetis-pinmux"; + compatible = "nxp,port-pinmux"; reg = <0x116000 0x1000>; clocks = <&syscon MCUX_PORT0_CLK>; }; portb: pinmux@117000 { - compatible = "nxp,kinetis-pinmux"; + compatible = "nxp,port-pinmux"; reg = <0x117000 0x1000>; clocks = <&syscon MCUX_PORT1_CLK>; }; portc: pinmux@118000 { - compatible = "nxp,kinetis-pinmux"; + compatible = "nxp,port-pinmux"; reg = <0x118000 0x1000>; clocks = <&syscon MCUX_PORT2_CLK>; }; portd: pinmux@119000 { - compatible = "nxp,kinetis-pinmux"; + compatible = "nxp,port-pinmux"; reg = <0x119000 0x1000>; clocks = <&syscon MCUX_PORT3_CLK>; }; porte: pinmux@11a000 { - compatible = "nxp,kinetis-pinmux"; + compatible = "nxp,port-pinmux"; reg = <0x11a000 0x1000>; clocks = <&syscon MCUX_PORT4_CLK>; }; portf: pinmux@42000 { - compatible = "nxp,kinetis-pinmux"; + compatible = "nxp,port-pinmux"; reg = <0x42000 0x1000>; clocks = <&syscon MCUX_PORT5_CLK>; }; diff --git a/dts/arm/nxp/nxp_mcxn94x_common.dtsi b/dts/arm/nxp/nxp_mcxn94x_common.dtsi index fd36a4c2aef088a..859916a094a2a7a 100644 --- a/dts/arm/nxp/nxp_mcxn94x_common.dtsi +++ b/dts/arm/nxp/nxp_mcxn94x_common.dtsi @@ -35,7 +35,7 @@ /* Dummy pinctrl node, filled with pin mux options at board level */ pinctrl: pinctrl { - compatible = "nxp,kinetis-pinctrl"; + compatible = "nxp,port-pinctrl"; status = "okay"; }; }; @@ -80,37 +80,37 @@ }; porta: pinmux@116000 { - compatible = "nxp,kinetis-pinmux"; + compatible = "nxp,port-pinmux"; reg = <0x116000 0x1000>; clocks = <&syscon MCUX_PORT0_CLK>; }; portb: pinmux@117000 { - compatible = "nxp,kinetis-pinmux"; + compatible = "nxp,port-pinmux"; reg = <0x117000 0x1000>; clocks = <&syscon MCUX_PORT1_CLK>; }; portc: pinmux@118000 { - compatible = "nxp,kinetis-pinmux"; + compatible = "nxp,port-pinmux"; reg = <0x118000 0x1000>; clocks = <&syscon MCUX_PORT2_CLK>; }; portd: pinmux@119000 { - compatible = "nxp,kinetis-pinmux"; + compatible = "nxp,port-pinmux"; reg = <0x119000 0x1000>; clocks = <&syscon MCUX_PORT3_CLK>; }; porte: pinmux@11a000 { - compatible = "nxp,kinetis-pinmux"; + compatible = "nxp,port-pinmux"; reg = <0x11a000 0x1000>; clocks = <&syscon MCUX_PORT4_CLK>; }; portf: pinmux@42000 { - compatible = "nxp,kinetis-pinmux"; + compatible = "nxp,port-pinmux"; reg = <0x42000 0x1000>; clocks = <&syscon MCUX_PORT5_CLK>; }; diff --git a/dts/arm/nxp/nxp_mcxw71.dtsi b/dts/arm/nxp/nxp_mcxw71.dtsi index e17ae42ea5f8a73..695c0fd65bb5467 100644 --- a/dts/arm/nxp/nxp_mcxw71.dtsi +++ b/dts/arm/nxp/nxp_mcxw71.dtsi @@ -116,7 +116,7 @@ }; pinctrl: pinctrl { - compatible = "nxp,kinetis-pinctrl"; + compatible = "nxp,port-pinctrl"; }; }; @@ -147,25 +147,25 @@ }; porta: pinctrl@42000 { - compatible = "nxp,kinetis-pinmux"; + compatible = "nxp,port-pinmux"; reg = <0x42000 0xe0>; clocks = <&scg SCG_K4_SLOW_CLK 0x108>; }; portb: pinctrl@43000 { - compatible = "nxp,kinetis-pinmux"; + compatible = "nxp,port-pinmux"; reg = <0x43000 0xe0>; clocks = <&scg SCG_K4_SLOW_CLK 0x10c>; }; portc: pinctrl@44000 { - compatible = "nxp,kinetis-pinmux"; + compatible = "nxp,port-pinmux"; reg = <0x44000 0xe0>; clocks = <&scg SCG_K4_SLOW_CLK 0x110>; }; portd: pinctrl@45000 { - compatible = "nxp,kinetis-pinmux"; + compatible = "nxp,port-pinmux"; reg = <0x45000 0xe0>; clocks = <&scg SCG_K4_SLOW_CLK 0>; }; diff --git a/dts/arm/nxp/nxp_rt118x.dtsi b/dts/arm/nxp/nxp_rt118x.dtsi index 0e511bac5dee95b..db58d532d182ad0 100644 --- a/dts/arm/nxp/nxp_rt118x.dtsi +++ b/dts/arm/nxp/nxp_rt118x.dtsi @@ -8,6 +8,7 @@ #include #include #include +#include / { cpus { @@ -663,6 +664,190 @@ resolution = <32>; status = "disabled"; }; + + flexpwm1: flexpwm@2650000 { + compatible = "nxp,flexpwm"; + reg = <0x2650000 0x4000>; + interrupts = <23 0>; + + flexpwm1_pwm0: flexpwm1_pwm0 { + compatible = "nxp,imx-pwm"; + index = <0>; + interrupts = <24 0>; + #pwm-cells = <3>; + clocks = <&ccm IMX_CCM_PWM_CLK 0 0>; + nxp,prescaler = <128>; + status = "disabled"; + }; + + flexpwm1_pwm1: flexpwm1_pwm1 { + compatible = "nxp,imx-pwm"; + index = <1>; + interrupts = <25 0>; + #pwm-cells = <3>; + clocks = <&ccm IMX_CCM_PWM_CLK 0 0>; + nxp,prescaler = <128>; + status = "disabled"; + }; + + flexpwm1_pwm2: flexpwm1_pwm2 { + compatible = "nxp,imx-pwm"; + index = <2>; + interrupts = <26 0>; + #pwm-cells = <3>; + clocks = <&ccm IMX_CCM_PWM_CLK 0 0>; + nxp,prescaler = <128>; + status = "disabled"; + }; + + flexpwm1_pwm3: flexpwm1_pwm3 { + compatible = "nxp,imx-pwm"; + index = <3>; + interrupts = <27 0>; + #pwm-cells = <3>; + clocks = <&ccm IMX_CCM_PWM_CLK 0 0>; + nxp,prescaler = <128>; + status = "disabled"; + }; + }; + + flexpwm2: flexpwm@2660000 { + compatible = "nxp,flexpwm"; + reg = <0x2660000 0x4000>; + interrupts = <170 0>; + + flexpwm2_pwm0: flexpwm2_pwm0 { + compatible = "nxp,imx-pwm"; + index = <0>; + interrupts = <171 0>; + #pwm-cells = <3>; + clocks = <&ccm IMX_CCM_PWM_CLK 0 0>; + nxp,prescaler = <128>; + status = "disabled"; + }; + + flexpwm2_pwm1: flexpwm2_pwm1 { + compatible = "nxp,imx-pwm"; + index = <1>; + interrupts = <172 0>; + #pwm-cells = <3>; + clocks = <&ccm IMX_CCM_PWM_CLK 0 0>; + nxp,prescaler = <128>; + status = "disabled"; + }; + + flexpwm2_pwm2: flexpwm2_pwm2 { + compatible = "nxp,imx-pwm"; + index = <2>; + interrupts = <173 0>; + #pwm-cells = <3>; + clocks = <&ccm IMX_CCM_PWM_CLK 0 0>; + nxp,prescaler = <128>; + status = "disabled"; + }; + + flexpwm2_pwm3: flexpwm2_pwm3 { + compatible = "nxp,imx-pwm"; + index = <3>; + interrupts = <174 0>; + #pwm-cells = <3>; + clocks = <&ccm IMX_CCM_PWM_CLK 0 0>; + nxp,prescaler = <128>; + status = "disabled"; + }; + }; + + flexpwm3: flexpwm@2670000 { + compatible = "nxp,flexpwm"; + reg = <0x2670000 0x4000>; + interrupts = <175 0>; + + flexpwm3_pwm0: flexpwm3_pwm0 { + compatible = "nxp,imx-pwm"; + index = <0>; + interrupts = <176 0>; + #pwm-cells = <3>; + clocks = <&ccm IMX_CCM_PWM_CLK 0 0>; + nxp,prescaler = <128>; + status = "disabled"; + }; + + flexpwm3_pwm1: flexpwm3_pwm1 { + compatible = "nxp,imx-pwm"; + index = <1>; + interrupts = <177 0>; + #pwm-cells = <3>; + clocks = <&ccm IMX_CCM_PWM_CLK 0 0>; + nxp,prescaler = <128>; + status = "disabled"; + }; + + flexpwm3_pwm2: flexpwm3_pwm2 { + compatible = "nxp,imx-pwm"; + index = <2>; + interrupts = <178 0>; + #pwm-cells = <3>; + clocks = <&ccm IMX_CCM_PWM_CLK 0 0>; + nxp,prescaler = <128>; + status = "disabled"; + }; + + flexpwm3_pwm3: flexpwm3_pwm3 { + compatible = "nxp,imx-pwm"; + index = <3>; + interrupts = <179 0>; + #pwm-cells = <3>; + clocks = <&ccm IMX_CCM_PWM_CLK 0 0>; + nxp,prescaler = <128>; + status = "disabled"; + }; + }; + + flexpwm4: flexpwm@2680000 { + compatible = "nxp,flexpwm"; + reg = <0x2680000 0x4000>; + interrupts = <180 0>; + + flexpwm4_pwm0: flexpwm4_pwm0 { + compatible = "nxp,imx-pwm"; + index = <0>; + interrupts = <181 0>; + #pwm-cells = <3>; + clocks = <&ccm IMX_CCM_PWM_CLK 0 0>; + nxp,prescaler = <128>; + status = "disabled"; + }; + + flexpwm4_pwm1: flexpwm4_pwm1 { + compatible = "nxp,imx-pwm"; + index = <1>; + interrupts = <182 0>; + #pwm-cells = <3>; + clocks = <&ccm IMX_CCM_PWM_CLK 0 0>; + nxp,prescaler = <128>; + status = "disabled"; + }; + + flexpwm4_pwm2: flexpwm4_pwm2 { + compatible = "nxp,imx-pwm"; + index = <2>; + interrupts = <183 0>; + #pwm-cells = <3>; + clocks = <&ccm IMX_CCM_PWM_CLK 0 0>; + nxp,prescaler = <128>; + status = "disabled"; + }; + + flexpwm4_pwm3: flexpwm4_pwm3 { + compatible = "nxp,imx-pwm"; + index = <3>; + interrupts = <184 0>; + #pwm-cells = <3>; + clocks = <&ccm IMX_CCM_PWM_CLK 0 0>; + nxp,prescaler = <128>; + status = "disabled"; + }; + }; }; &flexspi { diff --git a/dts/arm/nxp/nxp_s32k1xx.dtsi b/dts/arm/nxp/nxp_s32k1xx.dtsi index db200638781a276..8668b3aed201221 100644 --- a/dts/arm/nxp/nxp_s32k1xx.dtsi +++ b/dts/arm/nxp/nxp_s32k1xx.dtsi @@ -25,7 +25,7 @@ /* Dummy pinctrl node, filled with pin mux options at board level */ pinctrl: pinctrl { - compatible = "nxp,kinetis-pinctrl"; + compatible = "nxp,port-pinctrl"; status = "okay"; }; @@ -99,31 +99,31 @@ }; porta: pinmux@40049000 { - compatible = "nxp,kinetis-pinmux"; + compatible = "nxp,port-pinmux"; reg = <0x40049000 0x1000>; clocks = <&clock NXP_S32_PORTA_CLK>; }; portb: pinmux@4004a000 { - compatible = "nxp,kinetis-pinmux"; + compatible = "nxp,port-pinmux"; reg = <0x4004a000 0x1000>; clocks = <&clock NXP_S32_PORTB_CLK>; }; portc: pinmux@4004b000 { - compatible = "nxp,kinetis-pinmux"; + compatible = "nxp,port-pinmux"; reg = <0x4004b000 0x1000>; clocks = <&clock NXP_S32_PORTC_CLK>; }; portd: pinmux@4004c000 { - compatible = "nxp,kinetis-pinmux"; + compatible = "nxp,port-pinmux"; reg = <0x4004c000 0x1000>; clocks = <&clock NXP_S32_PORTD_CLK>; }; porte: pinmux@4004d000 { - compatible = "nxp,kinetis-pinmux"; + compatible = "nxp,port-pinmux"; reg = <0x4004d000 0x1000>; clocks = <&clock NXP_S32_PORTE_CLK>; }; diff --git a/dts/arm/renesas/ra/ra2/r7fa2a1xh.dtsi b/dts/arm/renesas/ra/ra2/r7fa2a1xh.dtsi index 8c60af4b83d8751..fc6c4d20f1e41bf 100644 --- a/dts/arm/renesas/ra/ra2/r7fa2a1xh.dtsi +++ b/dts/arm/renesas/ra/ra2/r7fa2a1xh.dtsi @@ -19,6 +19,12 @@ compatible = "mmio-sram"; reg = <0x20000000 DT_SIZE_K(32)>; }; + + spi1: spi@40072100 { + compatible = "renesas,ra-spi"; + interrupts = <16 1>, <17 1>, <18 1>, <19 1>; + interrupt-names = "rxi", "txi", "tei", "eri"; + }; }; clocks: clocks { diff --git a/dts/arm/renesas/ra/ra2/ra2xx.dtsi b/dts/arm/renesas/ra/ra2/ra2xx.dtsi index 5839795b2be236d..523e370c9a283e6 100644 --- a/dts/arm/renesas/ra/ra2/ra2xx.dtsi +++ b/dts/arm/renesas/ra/ra2/ra2xx.dtsi @@ -205,12 +205,62 @@ }; }; + spi0: spi@40072000 { + compatible = "renesas,ra-spi"; + #address-cells = <1>; + #size-cells = <0>; + channel = <0>; + reg = <0x40072000 0x100>; + status = "disabled"; + }; + + spi1: spi@40072100 { + compatible = "renesas,ra-spi"; + #address-cells = <1>; + #size-cells = <0>; + channel = <1>; + interrupts = <32 1>, <33 1>, <34 1>, <35 1>; + interrupt-names = "rxi", "txi", "tei", "eri"; + reg = <0x40072100 0x100>; + status = "disabled"; + }; + flash-controller@407e0000 { reg = <0x407e0000 0x10000>; #address-cells = <1>; #size-cells = <1>; }; + agt0: agt@40084000 { + compatible = "renesas,ra-agt"; + channel = <0>; + reg = <0x40084000 0x100>; + renesas,count-source = "AGT_CLOCK_LOCO"; + renesas,prescaler = <0>; + renesas,resolution = <16>; + status = "disabled"; + + counter { + compatible = "renesas,ra-agt-counter"; + status = "disabled"; + }; + }; + + agt1: agt@40084100 { + compatible = "renesas,ra-agt"; + channel = <1>; + reg = <0x40084100 0x100>; + renesas,count-source = "AGT_CLOCK_LOCO"; + renesas,prescaler = <0>; + renesas,resolution = <16>; + status = "disabled"; + + counter { + compatible = "renesas,ra-agt-counter"; + status = "disabled"; + }; + }; + id_code: id_code@1010018 { compatible = "zephyr,memory-region"; reg = <0x01010018 0x20>; diff --git a/dts/arm/renesas/ra/ra4/r7fa4e2b93cfm.dtsi b/dts/arm/renesas/ra/ra4/r7fa4e2b93cfm.dtsi index 3f403525ada59c9..e52347b1db6e30b 100644 --- a/dts/arm/renesas/ra/ra4/r7fa4e2b93cfm.dtsi +++ b/dts/arm/renesas/ra/ra4/r7fa4e2b93cfm.dtsi @@ -7,6 +7,13 @@ #include #include +/delete-node/ &agt0; +/delete-node/ &agt1; +/delete-node/ &agt2; +/delete-node/ &agt3; +/delete-node/ &agt4; +/delete-node/ &agt5; + / { soc { sram0: memory@20000000 { diff --git a/dts/arm/renesas/ra/ra4/r7fa4m2ax.dtsi b/dts/arm/renesas/ra/ra4/r7fa4m2ax.dtsi index 6abfa96b0c85b6f..2adf6ee2484327b 100644 --- a/dts/arm/renesas/ra/ra4/r7fa4m2ax.dtsi +++ b/dts/arm/renesas/ra/ra4/r7fa4m2ax.dtsi @@ -7,6 +7,8 @@ #include #include +/delete-node/ &spi1; + / { soc { sram0: memory@20000000 { diff --git a/dts/arm/renesas/ra/ra4/r7fa4m3ax.dtsi b/dts/arm/renesas/ra/ra4/r7fa4m3ax.dtsi index fbfe3b5e36c5bc6..7cb371f9157e9e5 100644 --- a/dts/arm/renesas/ra/ra4/r7fa4m3ax.dtsi +++ b/dts/arm/renesas/ra/ra4/r7fa4m3ax.dtsi @@ -7,6 +7,8 @@ #include #include +/delete-node/ &spi1; + / { soc { sram0: memory@20000000 { diff --git a/dts/arm/renesas/ra/ra4/r7fa4w1ad2cng.dtsi b/dts/arm/renesas/ra/ra4/r7fa4w1ad2cng.dtsi index 4603b53044d22ed..cc6d4dbe9009b91 100644 --- a/dts/arm/renesas/ra/ra4/r7fa4w1ad2cng.dtsi +++ b/dts/arm/renesas/ra/ra4/r7fa4w1ad2cng.dtsi @@ -34,6 +34,12 @@ status = "disabled"; }; }; + + spi1: spi@40072100 { + compatible = "renesas,ra-spi"; + interrupts = <28 1>, <29 1>, <30 1>, <31 1>; + interrupt-names = "rxi", "txi", "tei", "eri"; + }; }; clocks: clocks { diff --git a/dts/arm/renesas/ra/ra4/ra4-cm33-common.dtsi b/dts/arm/renesas/ra/ra4/ra4-cm33-common.dtsi index f7959fc898d9e32..32e30013960ae97 100644 --- a/dts/arm/renesas/ra/ra4/ra4-cm33-common.dtsi +++ b/dts/arm/renesas/ra/ra4/ra4-cm33-common.dtsi @@ -137,6 +137,116 @@ }; }; + spi0: spi@4011a000 { + compatible = "renesas,ra-spi"; + #address-cells = <1>; + #size-cells = <0>; + channel = <0>; + interrupts = <28 1>, <29 1>, <30 1>, <31 1>; + interrupt-names = "rxi", "txi", "tei", "eri"; + reg = <0x4011a000 0x100>; + status = "disabled"; + }; + + spi1: spi@4011a100 { + compatible = "renesas,ra-spi"; + #address-cells = <1>; + #size-cells = <0>; + channel = <1>; + reg = <0x4011a100 0x100>; + status = "disabled"; + }; + + agt0: agt@400e8000 { + compatible = "renesas,ra-agt"; + channel = <0>; + reg = <0x400e8000 0x100>; + renesas,count-source = "AGT_CLOCK_LOCO"; + renesas,prescaler = <0>; + renesas,resolution = <16>; + status = "disabled"; + + counter { + compatible = "renesas,ra-agt-counter"; + status = "disabled"; + }; + }; + + agt1: agt@400e8100 { + compatible = "renesas,ra-agt"; + channel = <1>; + reg = <0x400e8100 0x100>; + renesas,count-source = "AGT_CLOCK_LOCO"; + renesas,prescaler = <0>; + renesas,resolution = <16>; + status = "disabled"; + + counter { + compatible = "renesas,ra-agt-counter"; + status = "disabled"; + }; + }; + + agt2: agt@400e8200 { + compatible = "renesas,ra-agt"; + channel = <2>; + reg = <0x400e8200 0x100>; + renesas,count-source = "AGT_CLOCK_LOCO"; + renesas,prescaler = <0>; + renesas,resolution = <16>; + status = "disabled"; + + counter { + compatible = "renesas,ra-agt-counter"; + status = "disabled"; + }; + }; + + agt3: agt@400e8300 { + compatible = "renesas,ra-agt"; + channel = <3>; + reg = <0x400e8300 0x100>; + renesas,count-source = "AGT_CLOCK_LOCO"; + renesas,prescaler = <0>; + renesas,resolution = <16>; + status = "disabled"; + + counter { + compatible = "renesas,ra-agt-counter"; + status = "disabled"; + }; + }; + + agt4: agt@400e8400 { + compatible = "renesas,ra-agt"; + channel = <4>; + reg = <0x400e8400 0x100>; + renesas,count-source = "AGT_CLOCK_LOCO"; + renesas,prescaler = <0>; + renesas,resolution = <16>; + status = "disabled"; + + counter { + compatible = "renesas,ra-agt-counter"; + status = "disabled"; + }; + }; + + agt5: agt@400e8500 { + compatible = "renesas,ra-agt"; + channel = <5>; + reg = <0x400e8500 0x100>; + renesas,count-source = "AGT_CLOCK_LOCO"; + renesas,prescaler = <0>; + renesas,resolution = <16>; + status = "disabled"; + + counter { + compatible = "renesas,ra-agt-counter"; + status = "disabled"; + }; + }; + option_setting_ofs: option_setting_ofs@100a100 { compatible = "zephyr,memory-region"; reg = <0x0100a100 0x18>; diff --git a/dts/arm/renesas/ra/ra4/ra4-cm4-common.dtsi b/dts/arm/renesas/ra/ra4/ra4-cm4-common.dtsi index 69a90813f1e5309..ab52b5d6e95cc14 100644 --- a/dts/arm/renesas/ra/ra4/ra4-cm4-common.dtsi +++ b/dts/arm/renesas/ra/ra4/ra4-cm4-common.dtsi @@ -160,6 +160,56 @@ }; }; + spi0: spi@40072000 { + compatible = "renesas,ra-spi"; + #address-cells = <1>; + #size-cells = <0>; + channel = <0>; + reg = <0x40072000 0x100>; + status = "disabled"; + }; + + spi1: spi@40072100 { + compatible = "renesas,ra-spi"; + #address-cells = <1>; + #size-cells = <0>; + channel = <1>; + interrupts = <32 1>, <33 1>, <34 1>, <35 1>; + interrupt-names = "rxi", "txi", "tei", "eri"; + reg = <0x40072100 0x100>; + status = "disabled"; + }; + + agt0: agt@40084000 { + compatible = "renesas,ra-agt"; + channel = <0>; + reg = <0x40084000 0x100>; + renesas,count-source = "AGT_CLOCK_LOCO"; + renesas,prescaler = <0>; + renesas,resolution = <16>; + status = "disabled"; + + counter { + compatible = "renesas,ra-agt-counter"; + status = "disabled"; + }; + }; + + agt1: agt@40084100 { + compatible = "renesas,ra-agt"; + channel = <1>; + reg = <0x40084100 0x100>; + renesas,count-source = "AGT_CLOCK_LOCO"; + renesas,prescaler = <0>; + renesas,resolution = <16>; + status = "disabled"; + + counter { + compatible = "renesas,ra-agt-counter"; + status = "disabled"; + }; + }; + id_code: id_code@1010018 { compatible = "zephyr,memory-region"; reg = <0x01010018 0x20>; diff --git a/dts/arm/renesas/ra/ra6/r7fa6e2bx.dtsi b/dts/arm/renesas/ra/ra6/r7fa6e2bx.dtsi index d1d9bfad58d261d..d61096eb2aca023 100644 --- a/dts/arm/renesas/ra/ra6/r7fa6e2bx.dtsi +++ b/dts/arm/renesas/ra/ra6/r7fa6e2bx.dtsi @@ -7,6 +7,13 @@ #include #include +/delete-node/ &agt0; +/delete-node/ &agt1; +/delete-node/ &agt2; +/delete-node/ &agt3; +/delete-node/ &agt4; +/delete-node/ &agt5; + / { soc { sram0: memory@20000000 { diff --git a/dts/arm/renesas/ra/ra6/ra6-cm33-common.dtsi b/dts/arm/renesas/ra/ra6/ra6-cm33-common.dtsi index cef49abbb2f05af..2b94dcb4ff93dc1 100644 --- a/dts/arm/renesas/ra/ra6/ra6-cm33-common.dtsi +++ b/dts/arm/renesas/ra/ra6/ra6-cm33-common.dtsi @@ -146,6 +146,118 @@ status = "disabled"; }; + spi0: spi@4011a000 { + compatible = "renesas,ra-spi"; + #address-cells = <1>; + #size-cells = <0>; + channel = <0>; + interrupts = <28 1>, <29 1>, <30 1>, <31 1>; + interrupt-names = "rxi", "txi", "tei", "eri"; + reg = <0x4011a000 0x100>; + status = "disabled"; + }; + + spi1: spi@4011a100 { + compatible = "renesas,ra-spi"; + #address-cells = <1>; + #size-cells = <0>; + channel = <1>; + interrupts = <32 1>, <33 1>, <34 1>, <35 1>; + interrupt-names = "rxi", "txi", "tei", "eri"; + reg = <0x4011a100 0x100>; + status = "disabled"; + }; + + agt0: agt@400e8000 { + compatible = "renesas,ra-agt"; + channel = <0>; + reg = <0x400e8000 0x100>; + renesas,count-source = "AGT_CLOCK_LOCO"; + renesas,prescaler = <0>; + renesas,resolution = <16>; + status = "disabled"; + + counter { + compatible = "renesas,ra-agt-counter"; + status = "disabled"; + }; + }; + + agt1: agt@400e8100 { + compatible = "renesas,ra-agt"; + channel = <1>; + reg = <0x400e8100 0x100>; + renesas,count-source = "AGT_CLOCK_LOCO"; + renesas,prescaler = <0>; + renesas,resolution = <16>; + status = "disabled"; + + counter { + compatible = "renesas,ra-agt-counter"; + status = "disabled"; + }; + }; + + agt2: agt@400e8200 { + compatible = "renesas,ra-agt"; + channel = <2>; + reg = <0x400e8200 0x100>; + renesas,count-source = "AGT_CLOCK_LOCO"; + renesas,prescaler = <0>; + renesas,resolution = <16>; + status = "disabled"; + + counter { + compatible = "renesas,ra-agt-counter"; + status = "disabled"; + }; + }; + + agt3: agt@400e8300 { + compatible = "renesas,ra-agt"; + channel = <3>; + reg = <0x400e8300 0x100>; + renesas,count-source = "AGT_CLOCK_LOCO"; + renesas,prescaler = <0>; + renesas,resolution = <16>; + status = "disabled"; + + counter { + compatible = "renesas,ra-agt-counter"; + status = "disabled"; + }; + }; + + agt4: agt@400e8400 { + compatible = "renesas,ra-agt"; + channel = <4>; + reg = <0x400e8400 0x100>; + renesas,count-source = "AGT_CLOCK_LOCO"; + renesas,prescaler = <0>; + renesas,resolution = <16>; + status = "disabled"; + + counter { + compatible = "renesas,ra-agt-counter"; + status = "disabled"; + }; + }; + + agt5: agt@400e8500 { + compatible = "renesas,ra-agt"; + channel = <5>; + reg = <0x400e8500 0x100>; + renesas,count-source = "AGT_CLOCK_LOCO"; + renesas,prescaler = <0>; + renesas,resolution = <16>; + status = "disabled"; + + counter { + compatible = "renesas,ra-agt-counter"; + status = "disabled"; + }; + }; + option_setting_ofs: option_setting_ofs@100a100 { compatible = "zephyr,memory-region"; reg = <0x0100a100 0x18>; diff --git a/dts/arm/renesas/ra/ra6/ra6-cm4-common.dtsi b/dts/arm/renesas/ra/ra6/ra6-cm4-common.dtsi index 6b90846268e4b94..c671f77a536b992 100644 --- a/dts/arm/renesas/ra/ra6/ra6-cm4-common.dtsi +++ b/dts/arm/renesas/ra/ra6/ra6-cm4-common.dtsi @@ -235,6 +235,58 @@ status = "disabled"; }; + spi0: spi@40072000 { + compatible = "renesas,ra-spi"; + #address-cells = <1>; + #size-cells = <0>; + channel = <0>; + interrupts = <40 1>, <41 1>, <42 1>, <43 1>; + interrupt-names = "rxi", "txi", "tei", "eri"; + reg = <0x40072000 0x100>; + status = "disabled"; + }; + + spi1: spi@40072100 { + compatible = "renesas,ra-spi"; + #address-cells = <1>; + #size-cells = <0>; + channel = <1>; + interrupts = <44 1>, <45 1>, <46 1>, <47 1>; + interrupt-names = "rxi", "txi", "tei", "eri"; + reg = <0x40072100 0x100>; + status = "disabled"; + }; + + agt0: agt@40084000 { + compatible = "renesas,ra-agt"; + channel = <0>; + reg = <0x40084000 0x100>; + renesas,count-source = "AGT_CLOCK_LOCO"; + renesas,prescaler = <0>; + renesas,resolution = <16>; + status = "disabled"; + + counter { + compatible = "renesas,ra-agt-counter"; + status = "disabled"; + }; + }; + + agt1: agt@40084100 { + compatible = "renesas,ra-agt"; + channel = <1>; + reg = <0x40084100 0x100>; + renesas,count-source = "AGT_CLOCK_LOCO"; + renesas,prescaler = <0>; + renesas,resolution = <16>; + status = "disabled"; + + counter { + compatible = "renesas,ra-agt-counter"; + status = "disabled"; + }; + }; + id_code: id_code@100a150 { compatible = "zephyr,memory-region"; reg = <0x0100a150 0x10>; diff --git a/dts/arm/st/l4/stm32l471Xg.dtsi b/dts/arm/st/l4/stm32l471Xg.dtsi index 383e93e7e733967..5d38f21c04c7b7f 100644 --- a/dts/arm/st/l4/stm32l471Xg.dtsi +++ b/dts/arm/st/l4/stm32l471Xg.dtsi @@ -14,6 +14,7 @@ sram1: memory@10000000 { reg = <0x10000000 DT_SIZE_K(32)>; }; + soc { flash-controller@40022000 { flash0: flash@8000000 { diff --git a/dts/arm/st/l4/stm32l475Xg.dtsi b/dts/arm/st/l4/stm32l475Xg.dtsi index 98af4e36119122a..fda820474d44b52 100644 --- a/dts/arm/st/l4/stm32l475Xg.dtsi +++ b/dts/arm/st/l4/stm32l475Xg.dtsi @@ -10,6 +10,9 @@ sram0: memory@20000000 { reg = <0x20000000 DT_SIZE_K(96)>; }; + sram1: memory@10000000 { + reg = <0x10000000 DT_SIZE_K(32)>; + }; soc { flash-controller@40022000 { diff --git a/dts/arm/st/l4/stm32l476Xg.dtsi b/dts/arm/st/l4/stm32l476Xg.dtsi index af29a4636fdb1f8..1d29a88990ea6b7 100644 --- a/dts/arm/st/l4/stm32l476Xg.dtsi +++ b/dts/arm/st/l4/stm32l476Xg.dtsi @@ -10,6 +10,9 @@ sram0: memory@20000000 { reg = <0x20000000 DT_SIZE_K(96)>; }; + sram1: memory@10000000 { + reg = <0x10000000 DT_SIZE_K(32)>; + }; soc { flash-controller@40022000 { diff --git a/dts/arm/st/l4/stm32l486Xg.dtsi b/dts/arm/st/l4/stm32l486Xg.dtsi index 073ea99bb54d6fc..d8b030bbfa8dd99 100644 --- a/dts/arm/st/l4/stm32l486Xg.dtsi +++ b/dts/arm/st/l4/stm32l486Xg.dtsi @@ -9,7 +9,10 @@ / { sram0: memory@20000000 { - reg = <0x20000000 DT_SIZE_K(128)>; + reg = <0x20000000 DT_SIZE_K(96)>; + }; + sram1: memory@10000000 { + reg = <0x10000000 DT_SIZE_K(32)>; }; soc { diff --git a/dts/arm/st/l4/stm32l496Xe.dtsi b/dts/arm/st/l4/stm32l496Xe.dtsi index 8c3c3fc3258ad61..841dd81b7b05a99 100644 --- a/dts/arm/st/l4/stm32l496Xe.dtsi +++ b/dts/arm/st/l4/stm32l496Xe.dtsi @@ -10,6 +10,9 @@ sram0: memory@20000000 { reg = <0x20000000 DT_SIZE_K(256)>; }; + sram1: memory@10000000 { + reg = <0x10000000 DT_SIZE_K(64)>; + }; soc { flash-controller@40022000 { diff --git a/dts/arm/st/l4/stm32l496Xg.dtsi b/dts/arm/st/l4/stm32l496Xg.dtsi index 76c9d482bdab4cc..348438829ea7b42 100644 --- a/dts/arm/st/l4/stm32l496Xg.dtsi +++ b/dts/arm/st/l4/stm32l496Xg.dtsi @@ -8,7 +8,10 @@ / { sram0: memory@20000000 { - reg = <0x20000000 DT_SIZE_K(320)>; + reg = <0x20000000 DT_SIZE_K(256)>; + }; + sram1: memory@10000000 { + reg = <0x10000000 DT_SIZE_K(64)>; }; soc { diff --git a/dts/arm/st/l4/stm32l4a6Xg.dtsi b/dts/arm/st/l4/stm32l4a6Xg.dtsi index b8deb86dce0f01f..50f4764e2e714b7 100644 --- a/dts/arm/st/l4/stm32l4a6Xg.dtsi +++ b/dts/arm/st/l4/stm32l4a6Xg.dtsi @@ -9,7 +9,10 @@ / { sram0: memory@20000000 { - reg = <0x20000000 DT_SIZE_K(320)>; + reg = <0x20000000 DT_SIZE_K(256)>; + }; + sram1: memory@10000000 { + reg = <0x10000000 DT_SIZE_K(64)>; }; soc { diff --git a/dts/arm/st/l4/stm32l4p5.dtsi b/dts/arm/st/l4/stm32l4p5.dtsi index 2fae89a6a1ef1f9..3746f46eceb6890 100644 --- a/dts/arm/st/l4/stm32l4p5.dtsi +++ b/dts/arm/st/l4/stm32l4p5.dtsi @@ -11,8 +11,15 @@ /delete-node/ &quadspi; / { + /* total SRAM 320KB for the stm32L4P5x and stm32L4Q5x */ sram0: memory@20000000 { - reg = <0x20000000 DT_SIZE_K(320)>; + reg = <0x20000000 DT_SIZE_K(128)>; + }; + sram1: memory@10000000 { + reg = <0x10000000 DT_SIZE_K(64)>; + }; + sram2: memory@20030000 { + reg = <0x20030000 DT_SIZE_K(128)>; }; clocks { diff --git a/dts/arm/st/l4/stm32l4r5.dtsi b/dts/arm/st/l4/stm32l4r5.dtsi index 737f44fa5f436c5..39758bcd66ccb42 100644 --- a/dts/arm/st/l4/stm32l4r5.dtsi +++ b/dts/arm/st/l4/stm32l4r5.dtsi @@ -8,10 +8,18 @@ #include /delete-node/ &sdmmc2; +/delete-node/ &sram2; /* different memory address */ / { + /* total SRAM 640KB for the stm32L4R5x and stm32L4S5x */ sram0: memory@20000000 { - reg = <0x20000000 DT_SIZE_K(640)>; + reg = <0x20000000 DT_SIZE_K(192)>; + }; + sram1: memory@10000000 { + reg = <0x10000000 DT_SIZE_K(64)>; + }; + sram2: memory@20040000 { + reg = <0x20040000 DT_SIZE_K(384)>; }; soc { diff --git a/dts/arm/st/wb0/stm32wb0.dtsi b/dts/arm/st/wb0/stm32wb0.dtsi index c6a43b37f23538a..c1dcd6ef68c1884 100644 --- a/dts/arm/st/wb0/stm32wb0.dtsi +++ b/dts/arm/st/wb0/stm32wb0.dtsi @@ -23,6 +23,7 @@ / { chosen { zephyr,flash-controller = &flash; + zephyr,bt-hci = &bt_hci_wb0; }; cpus { @@ -259,6 +260,11 @@ status = "disabled"; }; }; + + bt_hci_wb0: bt_hci_wb0 { + compatible = "st,hci-stm32wb0"; + status = "disabled"; + }; }; &nvic { diff --git a/dts/bindings/adc/adi,ad559x-adc.yaml b/dts/bindings/adc/adi,ad559x-adc.yaml index 6dc71d8598ffb89..474c7c2b01693b6 100644 --- a/dts/bindings/adc/adi,ad559x-adc.yaml +++ b/dts/bindings/adc/adi,ad559x-adc.yaml @@ -11,5 +11,12 @@ properties: "#io-channel-cells": const: 1 + double-input-range: + type: boolean + description: | + Default ADC input range is 0V to Vref. + This option increases the range from 0V to 2 x Vref. Note that this + requires VDD >= 2 x Vref. + io-channel-cells: - input diff --git a/dts/bindings/bluetooth/st,hci-stm32wb0.yaml b/dts/bindings/bluetooth/st,hci-stm32wb0.yaml new file mode 100644 index 000000000000000..c069dcab380f041 --- /dev/null +++ b/dts/bindings/bluetooth/st,hci-stm32wb0.yaml @@ -0,0 +1,13 @@ +description: Bluetooth HCI driver for ST STM32WB0 series + +compatible: "st,hci-stm32wb0" + +include: bt-hci.yaml + +properties: + bt-hci-name: + default: "HCI over RAM" + bt-hci-bus: + default: "virtual" + bt-hci-quirks: + default: ["no-reset"] diff --git a/dts/bindings/dac/adi,ad559x-dac.yaml b/dts/bindings/dac/adi,ad559x-dac.yaml index 43cb0aed29db04b..86a1313e711394e 100644 --- a/dts/bindings/dac/adi,ad559x-dac.yaml +++ b/dts/bindings/dac/adi,ad559x-dac.yaml @@ -11,5 +11,12 @@ properties: "#io-channel-cells": const: 1 + double-output-range: + type: boolean + description: | + Default DAC output range is 0V to Vref. + This option increases the range from 0V to 2 x Vref. Note that this + requires VDD >= 2 x Vref. + io-channel-cells: - output diff --git a/dts/bindings/fpga/lattice,ice40-fpga.yaml b/dts/bindings/fpga/lattice,ice40-fpga.yaml index 2e8cb010d271c06..6355092f600902c 100644 --- a/dts/bindings/fpga/lattice,ice40-fpga.yaml +++ b/dts/bindings/fpga/lattice,ice40-fpga.yaml @@ -69,25 +69,26 @@ properties: mhz-delay-count = <0>; creset-delay-us: type: int + default: 1 description: | Delay (in microseconds) between asserting CRESET_B and releasing CRESET_B. - Example usage / default: - creset-delay-us = <1>; + The datasheet specifies a minimum of 200ns, therefore the default is set + to 1us. config-delay-us: type: int + default: 1200 description: | Delay (in microseconds) after releasing CRESET_B to clear internal configuration memory. - Example usage / default: - config-delay-us = <1200>; + The datasheet specifies a minimum of 1200us, which is the default. leading-clocks: type: int + default: 8 description: | Prior to sending the bitstream, issue this number of leading clocks with SPI_CS pulled high. - Example usage / default: - leading-clocks = <8>; + The datasheet specifies 8 dummy cycles, which is the default. trailing-clocks: type: int + default: 49 description: | After sending the bitstream, issue this number of trailing clocks with SPI_CS pulled high. - Example usage / default: - trailing-clocks = <49>; + The datasheet specifies 49 dummy cycles, which is the default. diff --git a/dts/bindings/i2c/ti,tca9544a.yaml b/dts/bindings/i2c/ti,tca9544a.yaml new file mode 100644 index 000000000000000..16c00b907846234 --- /dev/null +++ b/dts/bindings/i2c/ti,tca9544a.yaml @@ -0,0 +1,10 @@ +# Binding for TI TCA9544A, compatible with NXP PCA9544A + +description: Texas Instruments TCA9544A binding + +compatible: "ti,tca9544a" + +include: ti,tca954x-base.yaml + +child-binding: + compatible: "ti,tca9544a-channel" diff --git a/dts/bindings/i3c/nuvoton,npcx-i3c.yaml b/dts/bindings/i3c/nuvoton,npcx-i3c.yaml index 0633da8e92a9ebe..158ebb37c0dbee1 100644 --- a/dts/bindings/i3c/nuvoton,npcx-i3c.yaml +++ b/dts/bindings/i3c/nuvoton,npcx-i3c.yaml @@ -29,6 +29,8 @@ description: | */ i3c-scl-hz = <12500000>; i3c-od-scl-hz = <4170000>; + + bcr = <0x67>; /* Set for controller mode */ }; compatible: "nuvoton,npcx-i3c" @@ -50,3 +52,54 @@ properties: description: | Open Drain Frequency for the I3C controller. When undefined, use the controller default or as specified by the I3C specification. + + instance-id: + required: true + type: int + description: | + Instance ID of the device, used to specify port number. + Bit[7:4] module id. + Bit[3:0] port id. + + secondary: + type: boolean + description: Initialized as a secondary controller. + + static-address: + type: int + description: | + Target static address. + + tgt-pid: + type: array + description: | + Target 48-bit Provisioned ID. + array[0]: PID[47:33] MIPI manufacturer ID. + PID[32] ID type selector (i'b1 ramdom value, 1'b0 vendor fixed). + array[1]: PID[31:0] Random value or vendor fixed value. + + bcr: + required: true + type: int + description: | + Bus Characteristics Register, used for bus enumeration with ENTDAA and + determine device role and capabilities of the device on the bus. + + dcr: + type: int + description: | + Device Characteristics Register, used for bus enumeration with ENTDAA. + + maximum-write: + type: int + default: 4095 + description: | + Maximum number of bytes that I3C controller may write to I3C target per message. + Range: 8 to 4095. + + maximum-read: + type: int + default: 4095 + description: | + Maximum number of bytes that I3C controller may read from to I3C target per message. + Range: 8 to 4095. diff --git a/dts/bindings/mipi-dbi/mipi-dbi-device.yaml b/dts/bindings/mipi-dbi/mipi-dbi-device.yaml index 2cadb4d3a425cfd..c7e11745d837f79 100644 --- a/dts/bindings/mipi-dbi/mipi-dbi-device.yaml +++ b/dts/bindings/mipi-dbi/mipi-dbi-device.yaml @@ -1,4 +1,4 @@ -# Copyright 2023 NXP +# Copyright 2023-2024 NXP # SPDX-License-Identifier: Apache-2.0 # # Common fields for MIPI-DBI devices @@ -13,24 +13,16 @@ properties: description: Maximum clock frequency of device's MIPI interface in Hz mipi-mode: - type: int + type: string description: | - MIPI DBI mode in use. Use the macros, not the actual enum value. Here is - the concordance list (see dt-bindings/mipi_dbi/mipi_dbi.h) - 1 MIPI_DBI_MODE_SPI_3WIRE - 2 MIPI_DBI_MODE_SPI_4WIRE - 3 MIPI_DBI_MODE_6800_BUS_16_BIT - 4 MIPI_DBI_MODE_6800_BUS_9_BIT - 5 MIPI_DBI_MODE_6800_BUS_8_BIT - 6 MIPI_DBI_MODE_8080_BUS_16_BIT - 7 MIPI_DBI_MODE_8080_BUS_9_BIT - 8 MIPI_DBI_MODE_8080_BUS_8_BIT + MIPI DBI mode in use. These definitions should match those in + dt-bindings/mipi_dbi/mipi_dbi.h enum: - - 1 - - 2 - - 3 - - 4 - - 5 - - 6 - - 7 - - 8 + - "MIPI_DBI_MODE_SPI_3WIRE" + - "MIPI_DBI_MODE_SPI_4WIRE" + - "MIPI_DBI_MODE_6800_BUS_16_BIT" + - "MIPI_DBI_MODE_6800_BUS_9_BIT" + - "MIPI_DBI_MODE_6800_BUS_8_BIT" + - "MIPI_DBI_MODE_8080_BUS_16_BIT" + - "MIPI_DBI_MODE_8080_BUS_9_BIT" + - "MIPI_DBI_MODE_8080_BUS_8_BIT" diff --git a/dts/bindings/mipi-dbi/nxp,lcdic.yaml b/dts/bindings/mipi-dbi/nxp,lcdic.yaml index 4ce3f392a7c92ff..3dfc168c6f5b2a8 100644 --- a/dts/bindings/mipi-dbi/nxp,lcdic.yaml +++ b/dts/bindings/mipi-dbi/nxp,lcdic.yaml @@ -46,3 +46,21 @@ properties: Set minimum count of write active cycles, as a multiple of the module clock frequency. This controls the length of the active period of the WRX signal. Default is IP reset value. Only valid in 8080 mode. + + nxp,timer0-ratio: + type: int + default: 8 + description: | + Ratio for timer0, used for setting timer0 period (which is used for reset + and TX/RX short command timeout). Formula is: + timer0_period = (2 ^ timer0_ratio) / lcdic_freq + Default is IP reset value + + nxp,timer1-ratio: + type: int + default: 9 + description: | + Ratio for timer1, used for setting timer1 period (which is used for TE + wait time, timeout, and long command timeout). Formula is: + timer1_period = (2 ^ timer1_ratio) * timer0_period + Default is IP reset value diff --git a/dts/bindings/pinctrl/nxp,kinetis-pinctrl.yaml b/dts/bindings/pinctrl/nxp,port-pinctrl.yaml similarity index 73% rename from dts/bindings/pinctrl/nxp,kinetis-pinctrl.yaml rename to dts/bindings/pinctrl/nxp,port-pinctrl.yaml index 819ab7e2ab7507a..ec0968022503c04 100644 --- a/dts/bindings/pinctrl/nxp,kinetis-pinctrl.yaml +++ b/dts/bindings/pinctrl/nxp,port-pinctrl.yaml @@ -2,13 +2,14 @@ # SPDX-License-Identifier: Apache-2.0 description: | - Kinetis pinctrl node. This node will define pin configurations in pin groups, - and has the 'pinctrl' node identifier in the SOC's devicetree. Each group - within the pin configuration defines the pin configuration for a peripheral, - and each numbered subgroup in the pin group defines all the pins for that - peripheral with the same configuration properties. The 'pins' property in - a group selects the pins to be configured, and the remaining properties set - configuration values for those pins. Here is an example group for UART0 pins: + NXP PORT pinctrl node. This node will define pin configurations in pin + groups, and has the 'pinctrl' node identifier in the SOC's devicetree. Each + group within the pin configuration defines the pin configuration for a + peripheral, and each numbered subgroup in the pin group defines all the pins + for that peripheral with the same configuration properties. The 'pins' + property in a group selects the pins to be configured, and the remaining + properties set configuration values for those pins. Here is an example + group for UART0 pins: uart0_default: uart0_default { group0 { @@ -28,15 +29,15 @@ description: | PCR_DSE=, PCR_PFE=0 -compatible: "nxp,kinetis-pinctrl" +compatible: "nxp,port-pinctrl" include: base.yaml child-binding: - description: Kinetis pin controller pin group + description: NXP PORT pin controller pin group child-binding: description: | - Kinetis pin controller pin configuration node + NXP PORT pin controller pin configuration node include: - name: pincfg-node.yaml diff --git a/dts/bindings/pinctrl/nxp,kinetis-pinmux.yaml b/dts/bindings/pinctrl/nxp,port-pinmux.yaml similarity index 67% rename from dts/bindings/pinctrl/nxp,kinetis-pinmux.yaml rename to dts/bindings/pinctrl/nxp,port-pinmux.yaml index d81e5a4ad8791f8..7bdb56b2b5ec627 100644 --- a/dts/bindings/pinctrl/nxp,kinetis-pinmux.yaml +++ b/dts/bindings/pinctrl/nxp,port-pinmux.yaml @@ -1,6 +1,6 @@ -description: Kinetis pinmux node +description: NXP PORT pinmux node -compatible: "nxp,kinetis-pinmux" +compatible: "nxp,port-pinmux" include: base.yaml diff --git a/dts/bindings/spi/renesas,ra-spi.yaml b/dts/bindings/spi/renesas,ra-spi.yaml new file mode 100644 index 000000000000000..b5ac343e972847d --- /dev/null +++ b/dts/bindings/spi/renesas,ra-spi.yaml @@ -0,0 +1,34 @@ +# Copyright (c) 2024 Renesas Electronics Corporation +# SPDX-License-Identifier: Apache-2.0 + +description: Renesas RA SPI controller + +compatible: "renesas,ra-spi" + +include: [spi-controller.yaml, pinctrl-device.yaml] + +properties: + channel: + type: int + required: true + + reg: + required: true + + tx-dtc: + type: boolean + + rx-dtc: + type: boolean + + pinctrl-0: + required: true + + pinctrl-names: + required: true + + interrupts: + required: true + + interrupt-names: + required: true diff --git a/dts/bindings/test/vnd,i2s.yaml b/dts/bindings/test/vnd,i2s.yaml new file mode 100644 index 000000000000000..bacb81c403b5e3a --- /dev/null +++ b/dts/bindings/test/vnd,i2s.yaml @@ -0,0 +1,8 @@ +# Copyright (c) 2024 TOKITA Hiroshi +# SPDX-License-Identifier: Apache-2.0 + +description: Test I2S Controller node + +compatible: "vnd,i2s" + +include: i2s-controller.yaml diff --git a/dts/common/espressif/partitions_0x0_amp_16M.dtsi b/dts/common/espressif/partitions_0x0_amp_16M.dtsi new file mode 100644 index 000000000000000..86088c3f5fe74bb --- /dev/null +++ b/dts/common/espressif/partitions_0x0_amp_16M.dtsi @@ -0,0 +1,54 @@ +/* + * Copyright (c) 2024 Espressif Systems (Shanghai) Co., Ltd. + * + * SPDX-License-Identifier: Apache-2.0 + */ + + /* 16MB flash partition table */ +&flash0 { + partitions { + compatible = "fixed-partitions"; + #address-cells = <1>; + #size-cells = <1>; + + boot_partition: partition@0 { + label = "mcuboot"; + reg = <0x0 DT_SIZE_K(64)>; + }; + + slot0_partition: partition@20000 { + label = "image-0"; + reg = <0x20000 DT_SIZE_K(6080)>; + }; + + slot0_appcpu_partition: partition@610000 { + label = "image-0-appcpu"; + reg = <0x610000 DT_SIZE_K(1920)>; + }; + + slot1_partition: partition@7F0000 { + label = "image-1"; + reg = <0x7F0000 DT_SIZE_K(6080)>; + }; + + slot1_appcpu_partition: partition@DE0000 { + label = "image-1-appcpu"; + reg = <0xDE0000 DT_SIZE_K(1920)>; + }; + + storage_partition: partition@FC0000 { + label = "storage"; + reg = <0xFC0000 DT_SIZE_K(128)>; + }; + + scratch_partition: partition@FE0000 { + label = "image-scratch"; + reg = <0xFE0000 DT_SIZE_K(64)>; + }; + + coredump_partition: partition@FF0000 { + label = "coredump-partition"; + reg = <0xFF0000 DT_SIZE_K(4)>; + }; + }; +}; diff --git a/dts/common/espressif/partitions_0x0_amp_32M.dtsi b/dts/common/espressif/partitions_0x0_amp_32M.dtsi new file mode 100644 index 000000000000000..e5a95fc3bec0b37 --- /dev/null +++ b/dts/common/espressif/partitions_0x0_amp_32M.dtsi @@ -0,0 +1,54 @@ +/* + * Copyright (c) 2024 Espressif Systems (Shanghai) Co., Ltd. + * + * SPDX-License-Identifier: Apache-2.0 + */ + + /* 32MB flash partition table */ +&flash0 { + partitions { + compatible = "fixed-partitions"; + #address-cells = <1>; + #size-cells = <1>; + + boot_partition: partition@0 { + label = "mcuboot"; + reg = <0x0 DT_SIZE_K(64)>; + }; + + slot0_partition: partition@20000 { + label = "image-0"; + reg = <0x20000 DT_SIZE_K(12352)>; + }; + + slot0_appcpu_partition: partition@C30000 { + label = "image-0-appcpu"; + reg = <0xC30000 DT_SIZE_K(3840)>; + }; + + slot1_partition: partition@FF0000 { + label = "image-1"; + reg = <0xFF0000 DT_SIZE_K(12352)>; + }; + + slot1_appcpu_partition: partition@1C00000 { + label = "image-1-appcpu"; + reg = <0x1C00000 DT_SIZE_K(3840)>; + }; + + storage_partition: partition@1FC0000 { + label = "storage"; + reg = <0x1FC0000 DT_SIZE_K(128)>; + }; + + scratch_partition: partition@1FE0000 { + label = "image-scratch"; + reg = <0x1FE0000 DT_SIZE_K(64)>; + }; + + coredump_partition: partition@1FF0000 { + label = "coredump-partition"; + reg = <0x1FF0000 DT_SIZE_K(4)>; + }; + }; +}; diff --git a/dts/common/espressif/partitions_0x0_default_16M.dtsi b/dts/common/espressif/partitions_0x0_default_16M.dtsi new file mode 100644 index 000000000000000..d4b01753d0bd133 --- /dev/null +++ b/dts/common/espressif/partitions_0x0_default_16M.dtsi @@ -0,0 +1,44 @@ +/* + * Copyright (c) 2024 Espressif Systems (Shanghai) Co., Ltd. + * + * SPDX-License-Identifier: Apache-2.0 + */ + + /* 16MB flash partition table */ +&flash0 { + partitions { + compatible = "fixed-partitions"; + #address-cells = <1>; + #size-cells = <1>; + + boot_partition: partition@0 { + label = "mcuboot"; + reg = <0x0 DT_SIZE_K(64)>; + }; + + slot0_partition: partition@20000 { + label = "image-0"; + reg = <0x20000 DT_SIZE_K(8000)>; + }; + + slot1_partition: partition@7F0000 { + label = "image-1"; + reg = <0x7F0000 DT_SIZE_K(8000)>; + }; + + storage_partition: partition@FC0000 { + label = "storage"; + reg = <0xFC0000 DT_SIZE_K(128)>; + }; + + scratch_partition: partition@FE0000 { + label = "image-scratch"; + reg = <0xFE0000 DT_SIZE_K(64)>; + }; + + coredump_partition: partition@FF0000 { + label = "coredump-partition"; + reg = <0xFF0000 DT_SIZE_K(4)>; + }; + }; +}; diff --git a/dts/common/espressif/partitions_0x0_default_32M.dtsi b/dts/common/espressif/partitions_0x0_default_32M.dtsi new file mode 100644 index 000000000000000..710ea747eb91b96 --- /dev/null +++ b/dts/common/espressif/partitions_0x0_default_32M.dtsi @@ -0,0 +1,44 @@ +/* + * Copyright (c) 2024 Espressif Systems (Shanghai) Co., Ltd. + * + * SPDX-License-Identifier: Apache-2.0 + */ + + /* 32MB flash partition table */ +&flash0 { + partitions { + compatible = "fixed-partitions"; + #address-cells = <1>; + #size-cells = <1>; + + boot_partition: partition@0 { + label = "mcuboot"; + reg = <0x0 DT_SIZE_K(64)>; + }; + + slot0_partition: partition@20000 { + label = "image-0"; + reg = <0x20000 DT_SIZE_K(16192)>; + }; + + slot1_partition: partition@FF0000 { + label = "image-1"; + reg = <0xFF0000 DT_SIZE_K(16192)>; + }; + + storage_partition: partition@1FC0000 { + label = "storage"; + reg = <0x1FC0000 DT_SIZE_K(128)>; + }; + + scratch_partition: partition@1FE0000 { + label = "image-scratch"; + reg = <0x1FE0000 DT_SIZE_K(64)>; + }; + + coredump_partition: partition@1FF0000 { + label = "coredump-partition"; + reg = <0x1FF0000 DT_SIZE_K(4)>; + }; + }; +}; diff --git a/dts/common/espressif/partitions_0x1000_amp_16M.dtsi b/dts/common/espressif/partitions_0x1000_amp_16M.dtsi new file mode 100644 index 000000000000000..c994ddd762a6708 --- /dev/null +++ b/dts/common/espressif/partitions_0x1000_amp_16M.dtsi @@ -0,0 +1,54 @@ +/* + * Copyright (c) 2024 Espressif Systems (Shanghai) Co., Ltd. + * + * SPDX-License-Identifier: Apache-2.0 + */ + + /* 16MB flash partition table */ +&flash0 { + partitions { + compatible = "fixed-partitions"; + #address-cells = <1>; + #size-cells = <1>; + + boot_partition: partition@1000 { + label = "mcuboot"; + reg = <0x1000 DT_SIZE_K(60)>; + }; + + slot0_partition: partition@20000 { + label = "image-0"; + reg = <0x20000 DT_SIZE_K(6080)>; + }; + + slot0_appcpu_partition: partition@610000 { + label = "image-0-appcpu"; + reg = <0x610000 DT_SIZE_K(1920)>; + }; + + slot1_partition: partition@7F0000 { + label = "image-1"; + reg = <0x7F0000 DT_SIZE_K(6080)>; + }; + + slot1_appcpu_partition: partition@DE0000 { + label = "image-1-appcpu"; + reg = <0xDE0000 DT_SIZE_K(1920)>; + }; + + storage_partition: partition@FC0000 { + label = "storage"; + reg = <0xFC0000 DT_SIZE_K(128)>; + }; + + scratch_partition: partition@FE0000 { + label = "image-scratch"; + reg = <0xFE0000 DT_SIZE_K(64)>; + }; + + coredump_partition: partition@FF0000 { + label = "coredump-partition"; + reg = <0xFF0000 DT_SIZE_K(4)>; + }; + }; +}; diff --git a/dts/common/espressif/partitions_0x1000_amp_32M.dtsi b/dts/common/espressif/partitions_0x1000_amp_32M.dtsi new file mode 100644 index 000000000000000..7006269f994f27b --- /dev/null +++ b/dts/common/espressif/partitions_0x1000_amp_32M.dtsi @@ -0,0 +1,54 @@ +/* + * Copyright (c) 2024 Espressif Systems (Shanghai) Co., Ltd. + * + * SPDX-License-Identifier: Apache-2.0 + */ + + /* 32MB flash partition table */ +&flash0 { + partitions { + compatible = "fixed-partitions"; + #address-cells = <1>; + #size-cells = <1>; + + boot_partition: partition@1000 { + label = "mcuboot"; + reg = <0x1000 DT_SIZE_K(60)>; + }; + + slot0_partition: partition@20000 { + label = "image-0"; + reg = <0x20000 DT_SIZE_K(12352)>; + }; + + slot0_appcpu_partition: partition@C30000 { + label = "image-0-appcpu"; + reg = <0xC24000 DT_SIZE_K(3840)>; + }; + + slot1_partition: partition@FF0000 { + label = "image-1"; + reg = <0xFF0000 DT_SIZE_K(12352)>; + }; + + slot1_appcpu_partition: partition@1C00000 { + label = "image-1-appcpu"; + reg = <0x1C00000 DT_SIZE_K(3840)>; + }; + + storage_partition: partition@1FC0000 { + label = "storage"; + reg = <0x1FC0000 DT_SIZE_K(128)>; + }; + + scratch_partition: partition@1FE0000 { + label = "image-scratch"; + reg = <0x1FE0000 DT_SIZE_K(64)>; + }; + + coredump_partition: partition@1FF0000 { + label = "coredump-partition"; + reg = <0x1FF0000 DT_SIZE_K(4)>; + }; + }; +}; diff --git a/dts/common/espressif/partitions_0x1000_default_16M.dtsi b/dts/common/espressif/partitions_0x1000_default_16M.dtsi new file mode 100644 index 000000000000000..84663ecafd18731 --- /dev/null +++ b/dts/common/espressif/partitions_0x1000_default_16M.dtsi @@ -0,0 +1,44 @@ +/* + * Copyright (c) 2024 Espressif Systems (Shanghai) Co., Ltd. + * + * SPDX-License-Identifier: Apache-2.0 + */ + + /* 16MB flash partition table */ +&flash0 { + partitions { + compatible = "fixed-partitions"; + #address-cells = <1>; + #size-cells = <1>; + + boot_partition: partition@1000 { + label = "mcuboot"; + reg = <0x1000 DT_SIZE_K(60)>; + }; + + slot0_partition: partition@20000 { + label = "image-0"; + reg = <0x20000 DT_SIZE_K(8000)>; + }; + + slot1_partition: partition@7F0000 { + label = "image-1"; + reg = <0x7F0000 DT_SIZE_K(8000)>; + }; + + storage_partition: partition@FC0000 { + label = "storage"; + reg = <0xFC0000 DT_SIZE_K(128)>; + }; + + scratch_partition: partition@FE0000 { + label = "image-scratch"; + reg = <0xFE0000 DT_SIZE_K(64)>; + }; + + coredump_partition: partition@FF0000 { + label = "coredump-partition"; + reg = <0xFF0000 DT_SIZE_K(4)>; + }; + }; +}; diff --git a/dts/common/espressif/partitions_0x1000_default_32M.dtsi b/dts/common/espressif/partitions_0x1000_default_32M.dtsi new file mode 100644 index 000000000000000..4e7cc4511bb965c --- /dev/null +++ b/dts/common/espressif/partitions_0x1000_default_32M.dtsi @@ -0,0 +1,44 @@ +/* + * Copyright (c) 2024 Espressif Systems (Shanghai) Co., Ltd. + * + * SPDX-License-Identifier: Apache-2.0 + */ + + /* 32MB flash partition table */ +&flash0 { + partitions { + compatible = "fixed-partitions"; + #address-cells = <1>; + #size-cells = <1>; + + boot_partition: partition@1000 { + label = "mcuboot"; + reg = <0x1000 DT_SIZE_K(60)>; + }; + + slot0_partition: partition@20000 { + label = "image-0"; + reg = <0x20000 DT_SIZE_K(16192)>; + }; + + slot1_partition: partition@FF0000 { + label = "image-1"; + reg = <0xFF0000 DT_SIZE_K(16192)>; + }; + + storage_partition: partition@1FC0000 { + label = "storage"; + reg = <0x1FC0000 DT_SIZE_K(128)>; + }; + + scratch_partition: partition@1FE0000 { + label = "image-scratch"; + reg = <0x1FE0000 DT_SIZE_K(64)>; + }; + + coredump_partition: partition@1FF0000 { + label = "coredump-partition"; + reg = <0x1FF0000 DT_SIZE_K(4)>; + }; + }; +}; diff --git a/dts/riscv/espressif/esp32c2/esp32c2_common.dtsi b/dts/riscv/espressif/esp32c2/esp32c2_common.dtsi index 891166ec5a4c139..479e230a1817d5e 100644 --- a/dts/riscv/espressif/esp32c2/esp32c2_common.dtsi +++ b/dts/riscv/espressif/esp32c2/esp32c2_common.dtsi @@ -105,9 +105,9 @@ flash0: flash@0 { compatible = "soc-nv-flash"; - reg = <0 0x400000>; erase-block-size = <4096>; write-block-size = <4>; + /* Flash size is specified in SOC/SIP dtsi */ }; }; diff --git a/dts/riscv/espressif/esp32c3/esp32c3_common.dtsi b/dts/riscv/espressif/esp32c3/esp32c3_common.dtsi index 112cecdbac89cab..35ac7d58cc2f1f7 100644 --- a/dts/riscv/espressif/esp32c3/esp32c3_common.dtsi +++ b/dts/riscv/espressif/esp32c3/esp32c3_common.dtsi @@ -138,9 +138,9 @@ flash0: flash@0 { compatible = "soc-nv-flash"; - reg = <0 0x400000>; erase-block-size = <4096>; write-block-size = <4>; + /* Flash size is specified in SOC/SIP dtsi */ }; }; diff --git a/dts/riscv/espressif/esp32c6/esp32c6_common.dtsi b/dts/riscv/espressif/esp32c6/esp32c6_common.dtsi index c0b9872d9356f1e..c8ae394fbf95bd0 100644 --- a/dts/riscv/espressif/esp32c6/esp32c6_common.dtsi +++ b/dts/riscv/espressif/esp32c6/esp32c6_common.dtsi @@ -154,6 +154,7 @@ compatible = "soc-nv-flash"; erase-block-size = <4096>; write-block-size = <4>; + /* Flash size is specified in SOC/SIP dtsi */ }; }; diff --git a/dts/xtensa/espressif/esp32s3/esp32s3_common.dtsi b/dts/xtensa/espressif/esp32s3/esp32s3_common.dtsi index 777f7959f34f485..ceee864451c897b 100644 --- a/dts/xtensa/espressif/esp32s3/esp32s3_common.dtsi +++ b/dts/xtensa/espressif/esp32s3/esp32s3_common.dtsi @@ -169,7 +169,6 @@ flash0: flash@0 { compatible = "soc-nv-flash"; - reg = <0 0x800000>; erase-block-size = <4096>; write-block-size = <4>; /* Flash size is specified in SOC/SIP dtsi */ diff --git a/include/zephyr/arch/arch_inlines.h b/include/zephyr/arch/arch_inlines.h index 0f32159e2f1bf7c..04c4a649f1e1491 100644 --- a/include/zephyr/arch/arch_inlines.h +++ b/include/zephyr/arch/arch_inlines.h @@ -34,4 +34,6 @@ #include #endif +#include + #endif /* ZEPHYR_INCLUDE_ARCH_INLINES_H_ */ diff --git a/include/zephyr/arch/arch_interface.h b/include/zephyr/arch/arch_interface.h index 6721cec1171714d..0f081d06adafa99 100644 --- a/include/zephyr/arch/arch_interface.h +++ b/include/zephyr/arch/arch_interface.h @@ -1289,7 +1289,7 @@ typedef bool (*stack_trace_callback_fn)(void *cookie, unsigned long addr); * ============ ======= ============================================ * thread esf * ============ ======= ============================================ - * thread NULL Stack trace from thread (can be _current) + * thread NULL Stack trace from thread (can be arch_current_thread()) * thread esf Stack trace starting on esf * ============ ======= ============================================ */ diff --git a/include/zephyr/arch/common/arch_inlines.h b/include/zephyr/arch/common/arch_inlines.h new file mode 100644 index 000000000000000..8c0ba3343ad9f68 --- /dev/null +++ b/include/zephyr/arch/common/arch_inlines.h @@ -0,0 +1,45 @@ +/* + * Copyright (c) 2024 Meta Platforms. + * + * SPDX-License-Identifier: Apache-2.0 + */ + +#ifndef ZEPHYR_INCLUDE_ZEPHYR_ARCH_COMMON_ARCH_INLINES_H_ +#define ZEPHYR_INCLUDE_ZEPHYR_ARCH_COMMON_ARCH_INLINES_H_ + +#ifndef ZEPHYR_INCLUDE_ARCH_INLINES_H_ +#error "This header shouldn't be included directly" +#endif /* ZEPHYR_INCLUDE_ARCH_INLINES_H_ */ + +#ifndef _ASMLANGUAGE + +#include + +#ifndef CONFIG_ARCH_HAS_CUSTOM_CURRENT_IMPL +static ALWAYS_INLINE struct k_thread *arch_current_thread(void) +{ +#ifdef CONFIG_SMP + /* In SMP, arch_current_thread() is a field read from _current_cpu, which + * can race with preemption before it is read. We must lock + * local interrupts when reading it. + */ + unsigned int k = arch_irq_lock(); + + struct k_thread *ret = _current_cpu->current; + + arch_irq_unlock(k); +#else + struct k_thread *ret = _kernel.cpus[0].current; +#endif /* CONFIG_SMP */ + return ret; +} + +static ALWAYS_INLINE void arch_current_thread_set(struct k_thread *thread) +{ + _current_cpu->current = thread; +} +#endif /* CONFIG_ARCH_HAS_CUSTOM_CURRENT_IMPL */ + +#endif /* _ASMLANGUAGE */ + +#endif /* ZEPHYR_INCLUDE_ZEPHYR_ARCH_COMMON_ARCH_INLINES_H_ */ diff --git a/include/zephyr/arch/riscv/arch_inlines.h b/include/zephyr/arch/riscv/arch_inlines.h index 36dc2e640f97dbd..b779ebf3ace3431 100644 --- a/include/zephyr/arch/riscv/arch_inlines.h +++ b/include/zephyr/arch/riscv/arch_inlines.h @@ -11,6 +11,7 @@ #include #include "csr.h" +#include "reg.h" static ALWAYS_INLINE uint32_t arch_proc_id(void) { @@ -26,6 +27,17 @@ static ALWAYS_INLINE _cpu_t *arch_curr_cpu(void) #endif } +#ifdef CONFIG_RISCV_CURRENT_VIA_GP +register struct k_thread *__arch_current_thread __asm__("gp"); + +#define arch_current_thread() __arch_current_thread +#define arch_current_thread_set(thread) \ + { \ + _current_cpu->current = thread; \ + __arch_current_thread = (thread); \ + } +#endif /* CONFIG_RISCV_CURRENT_VIA_GP */ + static ALWAYS_INLINE unsigned int arch_num_cpus(void) { return CONFIG_MP_MAX_NUM_CPUS; diff --git a/include/zephyr/arch/riscv/reg.h b/include/zephyr/arch/riscv/reg.h index 6d3b2d88b1755bb..2c0650f0498f187 100644 --- a/include/zephyr/arch/riscv/reg.h +++ b/include/zephyr/arch/riscv/reg.h @@ -7,6 +7,8 @@ #ifndef ZEPHYR_INCLUDE_ZEPHYR_ARCH_RISCV_REG_H_ #define ZEPHYR_INCLUDE_ZEPHYR_ARCH_RISCV_REG_H_ +#include + #define reg_read(reg) \ ({ \ register unsigned long __rv; \ diff --git a/include/zephyr/arch/x86/ia32/arch.h b/include/zephyr/arch/x86/ia32/arch.h index b82e0db0f1733e9..e2f961c817e25af 100644 --- a/include/zephyr/arch/x86/ia32/arch.h +++ b/include/zephyr/arch/x86/ia32/arch.h @@ -305,7 +305,7 @@ static inline void arch_isr_direct_footer(int swap) * 3) Next thread to run in the ready queue is not this thread */ if (swap != 0 && _kernel.cpus[0].nested == 0 && - _kernel.ready_q.cache != _current) { + _kernel.ready_q.cache != arch_current_thread()) { unsigned int flags; /* Fetch EFLAGS argument to z_swap() */ diff --git a/include/zephyr/bluetooth/audio/audio.h b/include/zephyr/bluetooth/audio/audio.h index ed44924fc52ce6c..6459e3c445dd933 100644 --- a/include/zephyr/bluetooth/audio/audio.h +++ b/include/zephyr/bluetooth/audio/audio.h @@ -1199,7 +1199,7 @@ int bt_audio_codec_cfg_meta_set_program_info(struct bt_audio_codec_cfg *codec_cf * @param[in] codec_cfg The codec data to search in. * @param[out] lang Pointer to the language bytes (of length BT_AUDIO_LANG_SIZE) * - * @retval The language if positive or 0 + * @retval 0 Success * @retval -EINVAL if arguments are invalid * @retval -ENODATA if not found * @retval -EBADMSG if found value has invalid size diff --git a/include/zephyr/bluetooth/audio/cap.h b/include/zephyr/bluetooth/audio/cap.h index ee50a978aa9a0a9..34b5b0f3e1cc0e6 100644 --- a/include/zephyr/bluetooth/audio/cap.h +++ b/include/zephyr/bluetooth/audio/cap.h @@ -820,6 +820,17 @@ struct bt_cap_commander_cb { * by bt_cap_commander_cancel(). */ void (*broadcast_reception_stop)(struct bt_conn *conn, int err); + /** + * @brief Callback for bt_cap_commander_distribute_broadcast_code(). + * + * @param conn Pointer to the connection where the error + * occurred. NULL if @p err is 0 or if cancelled by + * bt_cap_commander_cancel() + * @param err 0 on success, BT_GATT_ERR() with a + * specific ATT (BT_ATT_ERR_*) error code or -ECANCELED if cancelled + * by bt_cap_commander_cancel(). + */ + void (*distribute_broadcast_code)(struct bt_conn *conn, int err); #endif /* CONFIG_BT_BAP_BROADCAST_ASSISTANT */ }; diff --git a/include/zephyr/bluetooth/conn.h b/include/zephyr/bluetooth/conn.h index 83b87588c08b4f8..dbcdeb0d56e123e 100644 --- a/include/zephyr/bluetooth/conn.h +++ b/include/zephyr/bluetooth/conn.h @@ -1432,8 +1432,8 @@ int bt_conn_create_auto_stop(void); * * @return Zero on success or error code otherwise. */ -int bt_le_set_auto_conn(const bt_addr_le_t *addr, - const struct bt_le_conn_param *param); +__deprecated int bt_le_set_auto_conn(const bt_addr_le_t *addr, + const struct bt_le_conn_param *param); /** @brief Set security level for a connection. * diff --git a/include/zephyr/drivers/bluetooth/hci_driver.h b/include/zephyr/drivers/bluetooth/hci_driver.h deleted file mode 100644 index c2eae9d90cb93df..000000000000000 --- a/include/zephyr/drivers/bluetooth/hci_driver.h +++ /dev/null @@ -1,242 +0,0 @@ -/** @file - * @brief Bluetooth HCI driver API. - */ - -/* - * Copyright (c) 2015-2016 Intel Corporation - * - * SPDX-License-Identifier: Apache-2.0 - */ -#ifndef ZEPHYR_INCLUDE_DRIVERS_BLUETOOTH_HCI_DRIVER_H_ -#define ZEPHYR_INCLUDE_DRIVERS_BLUETOOTH_HCI_DRIVER_H_ - -/** - * @brief HCI drivers - * - * @deprecated This is the old HCI driver API. Drivers should use @ref bt_hci_api instead. - * - * @defgroup bt_hci_driver HCI drivers - * @ingroup bluetooth - * @{ - */ - -#include -#include -#include -#include -#include - -#ifdef __cplusplus -extern "C" { -#endif - -enum { - /* The host should never send HCI_Reset */ - BT_QUIRK_NO_RESET = BIT(0), - /* The controller does not auto-initiate a DLE procedure when the - * initial connection data length parameters are not equal to the - * default data length parameters. Therefore the host should initiate - * the DLE procedure after connection establishment. */ - BT_QUIRK_NO_AUTO_DLE = BIT(1), -}; - -/** - * @brief Receive data from the controller/HCI driver. - * - * This is the main function through which the HCI driver provides the - * host with data from the controller. The buffer needs to have its type - * set with the help of bt_buf_set_type() before calling this API. - * - * @param buf Network buffer containing data from the controller. - * - * @return 0 on success or negative error number on failure. - * - * @deprecated Use the new HCI driver interface instead: @ref bt_hci_api - */ -__deprecated int bt_recv(struct net_buf *buf); - -/** Possible values for the 'bus' member of the bt_hci_driver struct */ -enum bt_hci_driver_bus { - BT_HCI_DRIVER_BUS_VIRTUAL = 0, - BT_HCI_DRIVER_BUS_USB = 1, - BT_HCI_DRIVER_BUS_PCCARD = 2, - BT_HCI_DRIVER_BUS_UART = 3, - BT_HCI_DRIVER_BUS_RS232 = 4, - BT_HCI_DRIVER_BUS_PCI = 5, - BT_HCI_DRIVER_BUS_SDIO = 6, - BT_HCI_DRIVER_BUS_SPI = 7, - BT_HCI_DRIVER_BUS_I2C = 8, - BT_HCI_DRIVER_BUS_IPM = 9, -}; - -#if defined(CONFIG_BT_HCI_SETUP) || defined(__DOXYGEN__) -struct bt_hci_setup_params { - /** The public identity address to give to the controller. This field is used when the - * driver selects @kconfig{CONFIG_BT_HCI_SET_PUBLIC_ADDR} to indicate that it supports - * setting the controller's public address. - */ - bt_addr_t public_addr; -}; -#endif - -/** - * @brief Abstraction which represents the HCI transport to the controller. - * - * This struct is used to represent the HCI transport to the Bluetooth - * controller. - */ -struct bt_hci_driver { - /** Name of the driver */ - const char *name; - - /** Bus of the transport (BT_HCI_DRIVER_BUS_*) */ - enum bt_hci_driver_bus bus; - - /** Specific controller quirks. These are set by the HCI driver - * and acted upon by the host. They can either be statically - * set at buildtime, or set at runtime before the HCI driver's - * open() callback returns. - */ - uint32_t quirks; - - /** - * @brief Open the HCI transport. - * - * Opens the HCI transport for operation. This function must not - * return until the transport is ready for operation, meaning it - * is safe to start calling the send() handler. - * - * @return 0 on success or negative error number on failure. - */ - int (*open)(void); - - /** - * @brief Close the HCI transport. - * - * Closes the HCI transport. This function must not return until the - * transport is closed. - * - * @return 0 on success or negative error number on failure. - */ - int (*close)(void); - - /** - * @brief Send HCI buffer to controller. - * - * Send an HCI command or ACL data to the controller. The exact - * type of the data can be checked with the help of bt_buf_get_type(). - * - * @note This function must only be called from a cooperative thread. - * - * @param buf Buffer containing data to be sent to the controller. - * - * @return 0 on success or negative error number on failure. - */ - int (*send)(struct net_buf *buf); - -#if defined(CONFIG_BT_HCI_SETUP) || defined(__DOXYGEN__) - /** - * @brief HCI vendor-specific setup - * - * Executes vendor-specific commands sequence to initialize - * BT Controller before BT Host executes Reset sequence. - * - * @note @kconfig{CONFIG_BT_HCI_SETUP} must be selected for this - * field to be available. - * - * @return 0 on success or negative error number on failure. - */ - int (*setup)(const struct bt_hci_setup_params *params); -#endif /* defined(CONFIG_BT_HCI_SETUP) || defined(__DOXYGEN__)*/ -}; - -/** - * @brief Register a new HCI driver to the Bluetooth stack. - * - * This needs to be called before any application code runs. The bt_enable() - * API will fail if there is no driver registered. - * - * @param drv A bt_hci_driver struct representing the driver. - * - * @return 0 on success or negative error number on failure. - * - * @deprecated Use the new HCI driver interface instead: @ref bt_hci_api - */ -__deprecated int bt_hci_driver_register(const struct bt_hci_driver *drv); - -/** - * @brief Setup the HCI transport, which usually means to reset the - * Bluetooth IC. - * - * @note A weak version of this function is included in the H4 driver, so - * defining it is optional per board. - * - * @param dev The device structure for the bus connecting to the IC - * - * @return 0 on success, negative error value on failure - */ -int bt_hci_transport_setup(const struct device *dev); - -/** - * @brief Teardown the HCI transport. - * - * @note A weak version of this function is included in the IPC driver, so - * defining it is optional. NRF5340 includes support to put network core - * in reset state. - * - * @param dev The device structure for the bus connecting to the IC - * - * @return 0 on success, negative error value on failure - */ -int bt_hci_transport_teardown(const struct device *dev); - -/** Allocate an HCI event buffer. - * - * This function allocates a new buffer for an HCI event. It is given the - * event code and the total length of the parameters. Upon successful return - * the buffer is ready to have the parameters encoded into it. - * - * @param evt Event OpCode. - * @param len Length of event parameters. - * - * @return Newly allocated buffer. - */ -struct net_buf *bt_hci_evt_create(uint8_t evt, uint8_t len); - -/** Allocate an HCI Command Complete event buffer. - * - * This function allocates a new buffer for HCI Command Complete event. - * It is given the OpCode (encoded e.g. using the BT_OP macro) and the total - * length of the parameters. Upon successful return the buffer is ready to have - * the parameters encoded into it. - * - * @param op Command OpCode. - * @param plen Length of command parameters. - * - * @return Newly allocated buffer. - */ -struct net_buf *bt_hci_cmd_complete_create(uint16_t op, uint8_t plen); - -/** Allocate an HCI Command Status event buffer. - * - * This function allocates a new buffer for HCI Command Status event. - * It is given the OpCode (encoded e.g. using the BT_OP macro) and the status - * code. Upon successful return the buffer is ready to have the parameters - * encoded into it. - * - * @param op Command OpCode. - * @param status Status code. - * - * @return Newly allocated buffer. - */ -struct net_buf *bt_hci_cmd_status_create(uint16_t op, uint8_t status); - -#ifdef __cplusplus -} -#endif - -/** - * @} - */ - -#endif /* ZEPHYR_INCLUDE_DRIVERS_BLUETOOTH_HCI_DRIVER_H_ */ diff --git a/include/zephyr/drivers/flash.h b/include/zephyr/drivers/flash.h index a3f1437b18d96a5..b72e551eafa1f68 100644 --- a/include/zephyr/drivers/flash.h +++ b/include/zephyr/drivers/flash.h @@ -155,6 +155,18 @@ typedef int (*flash_api_write)(const struct device *dev, off_t offset, typedef int (*flash_api_erase)(const struct device *dev, off_t offset, size_t size); +/** + * @brief Get device size in bytes. + * + * Returns total logical device size in bytes. + * + * @param[in] dev flash device. + * @param[out] size device size in bytes. + * + * @return 0 on success, negative errno code on error. + */ +typedef int (*flash_api_get_size)(const struct device *dev, uint64_t *size); + typedef const struct flash_parameters* (*flash_api_get_parameters)(const struct device *dev); #if defined(CONFIG_FLASH_PAGE_LAYOUT) @@ -195,6 +207,7 @@ __subsystem struct flash_driver_api { flash_api_write write; flash_api_erase erase; flash_api_get_parameters get_parameters; + flash_api_get_size get_size; #if defined(CONFIG_FLASH_PAGE_LAYOUT) flash_api_pages_layout page_layout; #endif /* CONFIG_FLASH_PAGE_LAYOUT */ @@ -321,6 +334,33 @@ static inline int z_impl_flash_erase(const struct device *dev, off_t offset, return rc; } +/** + * @brief Get device size in bytes. + * + * Returns total logical device size in bytes. Not all devices may support + * returning size, specifically those with non uniform page layouts or banked, + * in which case the function will return -ENOTSUP, and user has to rely + * on Flash page layout functions enabled by CONFIG_FLASH_PAGE_LAYOUT. + * + * @param[in] dev flash device. + * @param[out] size device size in bytes. + * + * @return 0 on success, negative errno code on error. + */ +__syscall int flash_get_size(const struct device *dev, uint64_t *size); + +static inline int z_impl_flash_get_size(const struct device *dev, uint64_t *size) +{ + int rc = -ENOSYS; + const struct flash_driver_api *api = (const struct flash_driver_api *)dev->api; + + if (api->get_size != NULL) { + rc = api->get_size(dev, size); + } + + return rc; +} + /** * @brief Fill selected range of device with specified value * diff --git a/include/zephyr/drivers/gpio.h b/include/zephyr/drivers/gpio.h index 4473b49eab6fc54..fc12fbafb023c02 100644 --- a/include/zephyr/drivers/gpio.h +++ b/include/zephyr/drivers/gpio.h @@ -845,6 +845,8 @@ static inline bool gpio_is_ready_dt(const struct gpio_dt_spec *spec) * not controlled directly by the GPIO module. That is, pins which are * routed to other modules such as I2C, SPI, UART. * + * @funcprops \isr_ok + * * @param port Pointer to device structure for the driver instance. * @param pin Pin number. * @param flags Interrupt configuration flags as defined by GPIO_INT_*. @@ -927,6 +929,8 @@ static inline int z_impl_gpio_pin_interrupt_configure(const struct device *port, /** * @brief Configure pin interrupts from a @p gpio_dt_spec. * + * @funcprops \isr_ok + * * This is equivalent to: * * gpio_pin_interrupt_configure(spec->port, spec->pin, flags); diff --git a/include/zephyr/drivers/i3c/i3c_npcx.h b/include/zephyr/drivers/i3c/i3c_npcx.h deleted file mode 100644 index 2bd546e8e5d08f0..000000000000000 --- a/include/zephyr/drivers/i3c/i3c_npcx.h +++ /dev/null @@ -1,55 +0,0 @@ -/* - * Copyright (c) 2020 Nuvoton Technology Corporation. - * - * SPDX-License-Identifier: Apache-2.0 - */ - -#ifndef ZEPHYR_DRIVERS_I3C_I3C_NPCX_H_ -#define ZEPHYR_DRIVERS_I3C_I3C_NPCX_H_ - -#include - -#ifdef __cplusplus -extern "C" { -#endif - -#ifdef CONFIG_I3C_NPCX_DMA - -/** - * @brief Configures the application's buffer for use in MDMA mode. - * - * @param dev Pointer to the device structure for the driver instance. - * @param mdma_rd_buf Pointer to storage for read data - * @param mdma_rd_buf_size Length of the buffer to storage for read data - * @param mdma_wr_buf Pointer to the data to be written - * @param mdma_wr_buf_size Length of the buffer to be written - */ -void npcx_i3c_target_set_mdma_buff(const struct device *dev, uint8_t *mdma_rd_buf, - uint16_t mdma_rd_buf_size, uint8_t *mdma_wr_buf, - uint16_t mdma_wr_buf_size); - -/** - * @brief Retrieves the count of data received via MDMA. - * - * @param dev Pointer to the device structure for the driver instance. - * - * @return The number of data bytes read from the bus. - */ -uint16_t npcx_i3c_target_get_mdmafb_count(const struct device *dev); - -/** - * @brief Retrieves the count of data written to the bus via MDMA. - * - * @param dev Pointer to the device structure for the driver instance. - * - * @return The number of data bytes written to the bus. - */ -uint16_t npcx_i3c_target_get_mdmatb_count(const struct device *dev); - -#endif - -#ifdef __cplusplus -} -#endif - -#endif /* ZEPHYR_DRIVERS_I3C_I3C_NPCX_H_ */ diff --git a/include/zephyr/drivers/i3c/target_device.h b/include/zephyr/drivers/i3c/target_device.h index 73f016dc463ee59..7d85e03b001e639 100644 --- a/include/zephyr/drivers/i3c/target_device.h +++ b/include/zephyr/drivers/i3c/target_device.h @@ -202,6 +202,49 @@ struct i3c_target_callbacks { int (*read_processed_cb)(struct i3c_target_config *config, uint8_t *val); +#ifdef CONFIG_I3C_TARGET_BUFFER_MODE + /** @brief Function called when a write to the device is completed. + * + * This function is invoked by the controller when it completes + * reception of data from the source buffer to the destination + * buffer in an ongoing write operation to the device. + * + * @param config Configuration structure associated with the + * device to which the operation is addressed. + * + * @param ptr pointer to the buffer that contains the data to be transferred. + * + * @param len the length of the data to be transferred. + */ + void (*buf_write_received_cb)(struct i3c_target_config *config, uint8_t *ptr, uint32_t len); + + /** @brief Function called when a read from the device is initiated. + * + * This function is invoked by the controller when the bus is ready to + * provide additional data by buffer for a read operation from the address + * associated with the device. + * + * The value returned in @p **ptr and @p *len will be transmitted. A success + * return shall cause the controller to react to additional read operations. + * An error return shall cause the controller to ignore bus operations until + * a new start condition is received. + * + * @param config the configuration structure associated with the + * device to which the operation is addressed. + * + * @param ptr pointer to storage for the address of data buffer to return + * for the read request. + * + * @param len pointer to storage for the length of the data to be transferred + * for the read request. + * + * @param hdr_mode HDR mode + * + * @return 0 if data has been provided, or a negative error code. + */ + int (*buf_read_requested_cb)(struct i3c_target_config *config, uint8_t **ptr, uint32_t *len, + uint8_t *hdr_mode); +#endif /** * @brief Function called when a stop condition is observed after a * start condition addressed to a particular device. diff --git a/include/zephyr/drivers/mfd/ad559x.h b/include/zephyr/drivers/mfd/ad559x.h index 095cdd3e62213a7..60c86431747e756 100644 --- a/include/zephyr/drivers/mfd/ad559x.h +++ b/include/zephyr/drivers/mfd/ad559x.h @@ -13,6 +13,7 @@ extern "C" { #include #define AD559X_REG_SEQ_ADC 0x02U +#define AD559X_REG_GEN_CTRL 0x03U #define AD559X_REG_ADC_CONFIG 0x04U #define AD559X_REG_LDAC_EN 0x05U #define AD559X_REG_GPIO_PULLDOWN 0x06U @@ -21,8 +22,11 @@ extern "C" { #define AD559X_REG_GPIO_SET 0x09U #define AD559X_REG_GPIO_INPUT_EN 0x0AU #define AD559X_REG_PD_REF_CTRL 0x0BU +#define AD559X_REG_IO_TS_CONFIG 0x0DU -#define AD559X_EN_REF BIT(9) +#define AD559X_DAC_RANGE BIT(4) +#define AD559X_ADC_RANGE BIT(5) +#define AD559X_EN_REF BIT(9) #define AD559X_PIN_MAX 8U diff --git a/include/zephyr/drivers/mipi_dbi.h b/include/zephyr/drivers/mipi_dbi.h index 5dbbfce90aa48ed..79f26d3d71fd86a 100644 --- a/include/zephyr/drivers/mipi_dbi.h +++ b/include/zephyr/drivers/mipi_dbi.h @@ -96,7 +96,7 @@ extern "C" { */ #define MIPI_DBI_CONFIG_DT(node_id, operation_, delay_) \ { \ - .mode = DT_PROP(node_id, mipi_mode), \ + .mode = DT_STRING_UPPER_TOKEN(node_id, mipi_mode), \ .config = MIPI_DBI_SPI_CONFIG_DT(node_id, operation_, delay_), \ } diff --git a/include/zephyr/drivers/pinctrl/pinctrl_soc_kinetis_common.h b/include/zephyr/drivers/pinctrl/pinctrl_nxp_port_common.h similarity index 57% rename from include/zephyr/drivers/pinctrl/pinctrl_soc_kinetis_common.h rename to include/zephyr/drivers/pinctrl/pinctrl_nxp_port_common.h index 2d9f9ff1ed49940..e7976b5c6ed1d96 100644 --- a/include/zephyr/drivers/pinctrl/pinctrl_soc_kinetis_common.h +++ b/include/zephyr/drivers/pinctrl/pinctrl_nxp_port_common.h @@ -6,50 +6,49 @@ /* * @file - * NXP Kinetis SOC specific helpers for pinctrl driver + * NXP PORT SOC specific helpers for pinctrl driver */ -#ifndef ZEPHYR_SOC_ARM_NXP_KINETIS_COMMON_PINCTRL_SOC_H_ -#define ZEPHYR_SOC_ARM_NXP_KINETIS_COMMON_PINCTRL_SOC_H_ +#ifndef ZEPHYR_INCLUDE_DRIVERS_PINCTRL_PINCTRL_NXP_PORT_COMMON_H_ +#define ZEPHYR_INCLUDE_DRIVERS_PINCTRL_PINCTRL_NXP_PORT_COMMON_H_ /** @cond INTERNAL_HIDDEN */ #include #include +/* Include SOC headers, so we get definitions for PCR bitmasks */ +#include + #ifdef __cplusplus extern "C" { #endif - -typedef uint32_t pinctrl_soc_pin_t; - -/* Kinetis KW/KL/KE series does not support open drain. Define macros to have no effect - * Note: KW22 and KW24 do support open drain, rest of KW series does not +/* + * Some PORT IP instantiations lack certain features, include input buffers, + * open drain, and slew rate. If masks aren't defined for these bitfields, + * define them to have no effect */ -/* clang-format off */ -#if (defined(CONFIG_SOC_SERIES_KINETIS_KWX) && \ - !(defined(CONFIG_SOC_MKW24D5) || defined(CONFIG_SOC_MKW22D5))) || \ - defined(CONFIG_SOC_SERIES_KINETIS_KL2X) || defined(CONFIG_SOC_SERIES_KINETIS_KE1XF) || \ - defined(CONFIG_SOC_SERIES_KE1XZ) -#define PORT_PCR_ODE(x) 0x0 -#define PORT_PCR_ODE_MASK 0x0 +#ifndef PORT_PCR_IBE_MASK /* Input buffer enable */ +#define PORT_PCR_IBE_MASK 0x0 +#define PORT_PCR_IBE(x) 0x0 #endif -/* clang-format on */ -/* Kinetis KE series does not support slew rate. Define macros to have no effect */ -#if defined(CONFIG_SOC_SERIES_KINETIS_KE1XF) || defined(CONFIG_SOC_SERIES_KE1XZ) -#define PORT_PCR_SRE(x) 0x0 +#ifndef PORT_PCR_SRE_MASK /* Slew rate */ #define PORT_PCR_SRE_MASK 0x0 +#define PORT_PCR_SRE(x) 0x0 #endif -#if !(defined(CONFIG_SOC_SERIES_MCXA)) -#define PORT_PCR_IBE(x) 0x0 -#define PORT_PCR_IBE_MASK 0x0 +#ifndef PORT_PCR_ODE_MASK /* Open drain */ +#define PORT_PCR_ODE_MASK 0x0 +#define PORT_PCR_ODE(x) 0x0 #endif -#define Z_PINCTRL_KINETIS_PINCFG(node_id) \ + +typedef uint32_t pinctrl_soc_pin_t; + +#define Z_PINCTRL_NXP_PORT_PINCFG(node_id) \ (PORT_PCR_DSE(DT_ENUM_IDX(node_id, drive_strength)) | \ PORT_PCR_PS(DT_PROP(node_id, bias_pull_up)) | \ PORT_PCR_PE(DT_PROP(node_id, bias_pull_up)) | \ @@ -59,12 +58,12 @@ typedef uint32_t pinctrl_soc_pin_t; PORT_PCR_IBE(DT_PROP(node_id, input_enable)) | \ PORT_PCR_PFE(DT_PROP(node_id, nxp_passive_filter))) -#define Z_PINCTRL_KINETIS_PCR_MASK \ +#define Z_PINCTRL_NXP_PORT_PCR_MASK \ (PORT_PCR_MUX_MASK | PORT_PCR_DSE_MASK | PORT_PCR_ODE_MASK | PORT_PCR_PFE_MASK | \ PORT_PCR_IBE_MASK | PORT_PCR_SRE_MASK | PORT_PCR_PE_MASK | PORT_PCR_PS_MASK) #define Z_PINCTRL_STATE_PIN_INIT(group, pin_prop, idx) \ - DT_PROP_BY_IDX(group, pin_prop, idx) | Z_PINCTRL_KINETIS_PINCFG(group), + DT_PROP_BY_IDX(group, pin_prop, idx) | Z_PINCTRL_NXP_PORT_PINCFG(group), #define Z_PINCTRL_STATE_PINS_INIT(node_id, prop) \ {DT_FOREACH_CHILD_VARGS(DT_PHANDLE(node_id, prop), DT_FOREACH_PROP_ELEM, pinmux, \ @@ -76,4 +75,4 @@ typedef uint32_t pinctrl_soc_pin_t; /** @endcond */ -#endif /* ZEPHYR_SOC_ARM_NXP_KINETIS_COMMON_PINCTRL_SOC_H_ */ +#endif /* ZEPHYR_INCLUDE_DRIVERS_PINCTRL_PINCTRL_NXP_PORT_COMMON_H_ */ diff --git a/include/zephyr/drivers/stepper/stepper_fake.h b/include/zephyr/drivers/stepper/stepper_fake.h index 52e18f71d956350..4f1679ff201f879 100644 --- a/include/zephyr/drivers/stepper/stepper_fake.h +++ b/include/zephyr/drivers/stepper/stepper_fake.h @@ -14,30 +14,28 @@ extern "C" { #endif -DECLARE_FAKE_VALUE_FUNC(int, fake_stepper_enable, const struct device *, const bool); +DECLARE_FAKE_VALUE_FUNC(int, fake_stepper_enable, const struct device *, bool); -DECLARE_FAKE_VALUE_FUNC(int, fake_stepper_move, const struct device *, const int32_t); +DECLARE_FAKE_VALUE_FUNC(int, fake_stepper_move, const struct device *, int32_t); -DECLARE_FAKE_VALUE_FUNC(int, fake_stepper_set_max_velocity, const struct device *, const uint32_t); +DECLARE_FAKE_VALUE_FUNC(int, fake_stepper_set_max_velocity, const struct device *, uint32_t); DECLARE_FAKE_VALUE_FUNC(int, fake_stepper_set_micro_step_res, const struct device *, - const enum stepper_micro_step_resolution); + enum stepper_micro_step_resolution); DECLARE_FAKE_VALUE_FUNC(int, fake_stepper_get_micro_step_res, const struct device *, enum stepper_micro_step_resolution *); -DECLARE_FAKE_VALUE_FUNC(int, fake_stepper_set_actual_position, const struct device *, - const int32_t); +DECLARE_FAKE_VALUE_FUNC(int, fake_stepper_set_actual_position, const struct device *, int32_t); DECLARE_FAKE_VALUE_FUNC(int, fake_stepper_get_actual_position, const struct device *, int32_t *); -DECLARE_FAKE_VALUE_FUNC(int, fake_stepper_set_target_position, const struct device *, - const int32_t); +DECLARE_FAKE_VALUE_FUNC(int, fake_stepper_set_target_position, const struct device *, int32_t); DECLARE_FAKE_VALUE_FUNC(int, fake_stepper_is_moving, const struct device *, bool *); DECLARE_FAKE_VALUE_FUNC(int, fake_stepper_enable_constant_velocity_mode, const struct device *, - const enum stepper_direction, const uint32_t); + enum stepper_direction, uint32_t); DECLARE_FAKE_VALUE_FUNC(int, fake_stepper_set_event_callback, const struct device *, stepper_event_callback_t, void *); diff --git a/include/zephyr/drivers/wifi/nrfwifi/off_raw_tx/off_raw_tx_api.h b/include/zephyr/drivers/wifi/nrf_wifi/off_raw_tx/off_raw_tx_api.h similarity index 100% rename from include/zephyr/drivers/wifi/nrfwifi/off_raw_tx/off_raw_tx_api.h rename to include/zephyr/drivers/wifi/nrf_wifi/off_raw_tx/off_raw_tx_api.h diff --git a/include/zephyr/dt-bindings/misc/nordic-domain-id-nrf54h20.h b/include/zephyr/dt-bindings/misc/nordic-domain-id-nrf54h20.h index a5fd23fd34b23ae..60bd120fbbc9bb2 100644 --- a/include/zephyr/dt-bindings/misc/nordic-domain-id-nrf54h20.h +++ b/include/zephyr/dt-bindings/misc/nordic-domain-id-nrf54h20.h @@ -4,6 +4,7 @@ */ #ifndef ZEPHYR_INCLUDE_DT_BINDINGS_MISC_NORDIC_DOMAIN_ID_NRF54H20_H_ +#define ZEPHYR_INCLUDE_DT_BINDINGS_MISC_NORDIC_DOMAIN_ID_NRF54H20_H_ #define NRF_DOMAIN_ID_APPLICATION 2 #define NRF_DOMAIN_ID_RADIOCORE 3 diff --git a/include/zephyr/dt-bindings/misc/nordic-owner-id-nrf54h20.h b/include/zephyr/dt-bindings/misc/nordic-owner-id-nrf54h20.h index 080b4e048e22a02..74761bf008633e8 100644 --- a/include/zephyr/dt-bindings/misc/nordic-owner-id-nrf54h20.h +++ b/include/zephyr/dt-bindings/misc/nordic-owner-id-nrf54h20.h @@ -4,6 +4,7 @@ */ #ifndef ZEPHYR_INCLUDE_DT_BINDINGS_MISC_NORDIC_OWNER_ID_NRF54H20_H_ +#define ZEPHYR_INCLUDE_DT_BINDINGS_MISC_NORDIC_OWNER_ID_NRF54H20_H_ #define NRF_OWNER_ID_NONE 0 #define NRF_OWNER_ID_APPLICATION 2 diff --git a/include/zephyr/dt-bindings/misc/nordic-tddconf.h b/include/zephyr/dt-bindings/misc/nordic-tddconf.h index b1b45b99252901b..44bc74e491c0236 100644 --- a/include/zephyr/dt-bindings/misc/nordic-tddconf.h +++ b/include/zephyr/dt-bindings/misc/nordic-tddconf.h @@ -4,6 +4,7 @@ */ #ifndef ZEPHYR_INCLUDE_DT_BINDINGS_MISC_NORDIC_TDDCONF_H_ +#define ZEPHYR_INCLUDE_DT_BINDINGS_MISC_NORDIC_TDDCONF_H_ #define NRF_TDDCONF_SOURCE_STMMAINCORE BIT(0) #define NRF_TDDCONF_SOURCE_ETMMAINCORE BIT(1) diff --git a/include/zephyr/internal/syscall_handler.h b/include/zephyr/internal/syscall_handler.h index b48070fad6b46fa..a1264d6c287334a 100644 --- a/include/zephyr/internal/syscall_handler.h +++ b/include/zephyr/internal/syscall_handler.h @@ -62,7 +62,7 @@ static inline bool k_is_in_user_syscall(void) * calls from supervisor mode bypass everything directly to * the implementation function. */ - return !k_is_in_isr() && (_current->syscall_frame != NULL); + return !k_is_in_isr() && (arch_current_thread()->syscall_frame != NULL); } /** @@ -350,7 +350,7 @@ int k_usermode_string_copy(char *dst, const char *src, size_t maxlen); #define K_OOPS(expr) \ do { \ if (expr) { \ - arch_syscall_oops(_current->syscall_frame); \ + arch_syscall_oops(arch_current_thread()->syscall_frame); \ } \ } while (false) diff --git a/include/zephyr/kernel.h b/include/zephyr/kernel.h index e5f790abfe67adb..9f8a8171a944387 100644 --- a/include/zephyr/kernel.h +++ b/include/zephyr/kernel.h @@ -3321,12 +3321,12 @@ static inline unsigned int z_impl_k_sem_count_get(struct k_sem *sem) * @param initial_count Initial semaphore count. * @param count_limit Maximum permitted semaphore count. */ -#define K_SEM_DEFINE(name, initial_count, count_limit) \ - STRUCT_SECTION_ITERABLE(k_sem, name) = \ - Z_SEM_INITIALIZER(name, initial_count, count_limit); \ - BUILD_ASSERT(((count_limit) != 0) && \ - ((initial_count) <= (count_limit)) && \ - ((count_limit) <= K_SEM_MAX_LIMIT)); +#define K_SEM_DEFINE(name, initial_count, count_limit) \ + STRUCT_SECTION_ITERABLE(k_sem, name) = \ + Z_SEM_INITIALIZER(name, initial_count, count_limit); \ + BUILD_ASSERT(((count_limit) != 0) && \ + (((initial_count) < (count_limit)) || ((initial_count) == (count_limit))) && \ + ((count_limit) <= K_SEM_MAX_LIMIT)); /** @} */ diff --git a/include/zephyr/kernel_structs.h b/include/zephyr/kernel_structs.h index cf7daff9a6cf79a..175e0a6c6dd5429 100644 --- a/include/zephyr/kernel_structs.h +++ b/include/zephyr/kernel_structs.h @@ -171,7 +171,7 @@ struct _cpu { #endif #ifdef CONFIG_SMP - /* True when _current is allowed to context switch */ + /* True when arch_current_thread() is allowed to context switch */ uint8_t swap_ok; #endif @@ -260,12 +260,12 @@ bool z_smp_cpu_mobile(void); #define _current_cpu ({ __ASSERT_NO_MSG(!z_smp_cpu_mobile()); \ arch_curr_cpu(); }) -#define _current k_sched_current_thread_query() #else #define _current_cpu (&_kernel.cpus[0]) -#define _current _kernel.cpus[0].current -#endif +#endif /* CONFIG_SMP */ + +#define _current arch_current_thread() __DEPRECATED_MACRO /* kernel wait queue record */ #ifdef CONFIG_WAITQ_SCALABLE diff --git a/include/zephyr/net/net_context.h b/include/zephyr/net/net_context.h index 275496d91b20f81..80d84426789ecd6 100644 --- a/include/zephyr/net/net_context.h +++ b/include/zephyr/net/net_context.h @@ -316,6 +316,20 @@ __net_socket struct net_context { socklen_t addrlen; } proxy; #endif +#if defined(CONFIG_NET_CONTEXT_CLAMP_PORT_RANGE) + /** Restrict local port range between these values. + * The option takes an uint32_t value with the high 16 bits + * set to the upper range bound, and the low 16 bits set to + * the lower range bound. Range bounds are inclusive. The + * 16-bit values should be in host byte order. + * The lower bound has to be less than the upper bound when + * both bounds are not zero. Otherwise, setting the option + * fails with EINVAL. + * If either bound is outside of the global local port range, + * or is zero, then that bound has no effect. + */ + uint32_t port_range; +#endif #if defined(CONFIG_NET_CONTEXT_RCVTIMEO) /** Receive timeout */ k_timeout_t rcvtimeo; @@ -1310,6 +1324,7 @@ enum net_context_option { NET_OPT_TIMESTAMPING = 18, /**< Packet timestamping */ NET_OPT_MCAST_IFINDEX = 19, /**< IPv6 multicast output network interface index */ NET_OPT_MTU = 20, /**< IPv4 socket path MTU */ + NET_OPT_LOCAL_PORT_RANGE = 21, /**< Clamp local port range */ }; /** diff --git a/include/zephyr/net/socket.h b/include/zephyr/net/socket.h index c5282fdde3792c5..9112c95fdc4186d 100644 --- a/include/zephyr/net/socket.h +++ b/include/zephyr/net/socket.h @@ -1222,6 +1222,9 @@ struct ip_mreq { struct in_addr imr_interface; /**< IP address of local interface */ }; +/** Clamp down the global port range for a given socket */ +#define IP_LOCAL_PORT_RANGE 51 + /** @} */ /** diff --git a/include/zephyr/net/wifi_mgmt.h b/include/zephyr/net/wifi_mgmt.h index 772aac1105c604f..2195b685a0e5c8b 100644 --- a/include/zephyr/net/wifi_mgmt.h +++ b/include/zephyr/net/wifi_mgmt.h @@ -51,6 +51,12 @@ extern "C" { #define WIFI_MGMT_SCAN_CHAN_MAX_MANUAL 1 #endif /* CONFIG_WIFI_MGMT_SCAN_CHAN_MAX_MANUAL */ +#ifdef CONFIG_WIFI_ENT_IDENTITY_MAX_USERS +#define WIFI_ENT_IDENTITY_MAX_USERS CONFIG_WIFI_ENT_IDENTITY_MAX_USERS +#else +#define WIFI_ENT_IDENTITY_MAX_USERS 1 +#endif /* CONFIG_WIFI_ENT_IDENTITY_MAX_USERS */ + #define WIFI_MGMT_BAND_STR_SIZE_MAX 8 #define WIFI_MGMT_SCAN_MAX_BSS_CNT 65535 @@ -123,6 +129,8 @@ enum net_request_wifi_cmd { NET_REQUEST_WIFI_CMD_NEIGHBOR_REP_COMPLETE, /** Specific scan */ NET_REQUEST_WIFI_CMD_CANDIDATE_SCAN, + /** AP WPS config */ + NET_REQUEST_WIFI_CMD_AP_WPS_CONFIG, /** @cond INTERNAL_HIDDEN */ NET_REQUEST_WIFI_CMD_MAX /** @endcond */ @@ -533,7 +541,7 @@ struct wifi_connect_req_params { /** suiteb or suiteb-192 */ uint8_t suiteb_type; /** eap version */ - uint8_t eap_ver; + int eap_ver; /** Identity for EAP */ const uint8_t *eap_identity; /** eap identity length, max 64 */ @@ -544,6 +552,14 @@ struct wifi_connect_req_params { uint8_t eap_passwd_length; /** Fast BSS Transition used */ bool ft_used; + /** Number of EAP users */ + int nusers; + /** Number of EAP passwds */ + uint8_t passwds; + /** User Identities */ + const uint8_t *identities[WIFI_ENT_IDENTITY_MAX_USERS]; + /** User Passwords */ + const uint8_t *passwords[WIFI_ENT_IDENTITY_MAX_USERS]; }; /** @brief Wi-Fi connect result codes. To be overlaid on top of \ref wifi_status @@ -795,6 +811,18 @@ struct wifi_enterprise_creds_params { uint8_t *client_key2; /** Phase2 Client key length */ uint32_t client_key2_len; + /** Server certification */ + uint8_t *server_cert; + /** Server certification length */ + uint32_t server_cert_len; + /** Server key */ + uint8_t *server_key; + /** Server key length */ + uint32_t server_key_len; + /** Diffie–Hellman parameter */ + uint8_t *dh_param; + /** Diffie–Hellman parameter length */ + uint32_t dh_param_len; }; /** @brief Wi-Fi power save configuration */ diff --git a/include/zephyr/posix/posix_types.h b/include/zephyr/posix/posix_types.h index ca8023be831166e..e65a398cdcc9c4b 100644 --- a/include/zephyr/posix/posix_types.h +++ b/include/zephyr/posix/posix_types.h @@ -84,11 +84,6 @@ typedef unsigned long useconds_t; #endif /* time related attributes */ -#if !defined(CONFIG_NEWLIB_LIBC) && !defined(CONFIG_ARCMWDT_LIBC) -#if !defined(__clockid_t_defined) && !defined(_CLOCKID_T_DECLARED) -typedef uint32_t clockid_t; -#endif -#endif /* !CONFIG_NEWLIB_LIBC && !CONFIG_ARCMWDT_LIBC */ #if !defined(__timer_t_defined) && !defined(_TIMER_T_DECLARED) typedef unsigned long timer_t; #endif diff --git a/include/zephyr/toolchain/mwdt.h b/include/zephyr/toolchain/mwdt.h index 48ce1b69c7d6d6b..715c34bd8143b58 100644 --- a/include/zephyr/toolchain/mwdt.h +++ b/include/zephyr/toolchain/mwdt.h @@ -114,16 +114,6 @@ #else /* defined(_ASMLANGUAGE) */ -/* MWDT toolchain misses ssize_t definition which is used by Zephyr */ -#ifndef _SSIZE_T_DEFINED -#define _SSIZE_T_DEFINED -#ifdef CONFIG_64BIT - typedef long ssize_t; -#else - typedef int ssize_t; -#endif -#endif /* _SSIZE_T_DEFINED */ - #ifdef CONFIG_NEWLIB_LIBC #error "ARC MWDT doesn't support building with CONFIG_NEWLIB_LIBC as it doesn't have newlib" #endif /* CONFIG_NEWLIB_LIBC */ diff --git a/kernel/Kconfig b/kernel/Kconfig index 0553161eca1ee77..62713a5c9bb65bf 100644 --- a/kernel/Kconfig +++ b/kernel/Kconfig @@ -211,7 +211,7 @@ config THREAD_ABORT_NEED_CLEANUP bool help This option enables the bits to clean up the current thread if - k_thread_abort(_current) is called, as the cleanup cannot be + k_thread_abort(arch_current_thread()) is called, as the cleanup cannot be running in the current thread stack. config THREAD_CUSTOM_DATA diff --git a/kernel/errno.c b/kernel/errno.c index bbbd6f87bfd0397..2535e00e336cb00 100644 --- a/kernel/errno.c +++ b/kernel/errno.c @@ -36,7 +36,7 @@ int *z_impl_z_errno(void) /* Initialized to the lowest address in the stack so the thread can * directly read/write it */ - return &_current->userspace_local_data->errno_var; + return &arch_current_thread()->userspace_local_data->errno_var; } static inline int *z_vrfy_z_errno(void) @@ -48,7 +48,7 @@ static inline int *z_vrfy_z_errno(void) #else int *z_impl_z_errno(void) { - return &_current->errno_var; + return &arch_current_thread()->errno_var; } #endif /* CONFIG_USERSPACE */ diff --git a/kernel/fatal.c b/kernel/fatal.c index 3cf3114364da873..a5682e7cd7f4178 100644 --- a/kernel/fatal.c +++ b/kernel/fatal.c @@ -90,7 +90,7 @@ void z_fatal_error(unsigned int reason, const struct arch_esf *esf) */ unsigned int key = arch_irq_lock(); struct k_thread *thread = IS_ENABLED(CONFIG_MULTITHREADING) ? - _current : NULL; + arch_current_thread() : NULL; /* twister looks for the "ZEPHYR FATAL ERROR" string, don't * change it without also updating twister diff --git a/kernel/idle.c b/kernel/idle.c index 62ff84e4c88dc91..4d095c8f27b3ab9 100644 --- a/kernel/idle.c +++ b/kernel/idle.c @@ -24,7 +24,7 @@ void idle(void *unused1, void *unused2, void *unused3) ARG_UNUSED(unused2); ARG_UNUSED(unused3); - __ASSERT_NO_MSG(_current->base.prio >= 0); + __ASSERT_NO_MSG(arch_current_thread()->base.prio >= 0); while (true) { /* SMP systems without a working IPI can't actual @@ -85,7 +85,7 @@ void idle(void *unused1, void *unused2, void *unused3) * explicitly yield in the idle thread otherwise * nothing else will run once it starts. */ - if (_kernel.ready_q.cache != _current) { + if (_kernel.ready_q.cache != arch_current_thread()) { z_swap_unlocked(); } # endif /* !defined(CONFIG_USE_SWITCH) || defined(CONFIG_SPARC) */ diff --git a/kernel/include/kernel_internal.h b/kernel/include/kernel_internal.h index 94f90ce94624c38..cb13aacf6007a6b 100644 --- a/kernel/include/kernel_internal.h +++ b/kernel/include/kernel_internal.h @@ -286,7 +286,7 @@ int z_kernel_stats_query(struct k_obj_core *obj_core, void *stats); * where these steps require that the thread is no longer running. * If the target thread is not the current running thread, the cleanup * steps will be performed immediately. However, if the target thread is - * the current running thread (e.g. k_thread_abort(_current)), it defers + * the current running thread (e.g. k_thread_abort(arch_current_thread())), it defers * the cleanup steps to later when the work will be finished in another * context. * diff --git a/kernel/include/ksched.h b/kernel/include/ksched.h index a2fd3287fd6a6d5..ff529d06fca036c 100644 --- a/kernel/include/ksched.h +++ b/kernel/include/ksched.h @@ -143,9 +143,9 @@ static inline bool _is_valid_prio(int prio, void *entry_point) static inline void z_sched_lock(void) { __ASSERT(!arch_is_in_isr(), ""); - __ASSERT(_current->base.sched_locked != 1U, ""); + __ASSERT(arch_current_thread()->base.sched_locked != 1U, ""); - --_current->base.sched_locked; + --arch_current_thread()->base.sched_locked; compiler_barrier(); } diff --git a/kernel/include/kswap.h b/kernel/include/kswap.h index d3638b6179a57b4..66d7b431d3876d2 100644 --- a/kernel/include/kswap.h +++ b/kernel/include/kswap.h @@ -97,12 +97,12 @@ static ALWAYS_INLINE unsigned int do_swap(unsigned int key, */ # ifndef CONFIG_ARM64 __ASSERT(arch_irq_unlocked(key) || - _current->base.thread_state & (_THREAD_DUMMY | _THREAD_DEAD), + arch_current_thread()->base.thread_state & (_THREAD_DUMMY | _THREAD_DEAD), "Context switching while holding lock!"); # endif /* CONFIG_ARM64 */ #endif /* CONFIG_SPIN_VALIDATE */ - old_thread = _current; + old_thread = arch_current_thread(); z_check_stack_sentinel(); @@ -134,7 +134,7 @@ static ALWAYS_INLINE unsigned int do_swap(unsigned int key, #endif /* CONFIG_SMP */ z_thread_mark_switched_out(); z_sched_switch_spin(new_thread); - _current_cpu->current = new_thread; + arch_current_thread_set(new_thread); #ifdef CONFIG_TIMESLICING z_reset_time_slice(new_thread); @@ -147,7 +147,7 @@ static ALWAYS_INLINE unsigned int do_swap(unsigned int key, arch_cohere_stacks(old_thread, NULL, new_thread); #ifdef CONFIG_SMP - /* Now add _current back to the run queue, once we are + /* Now add arch_current_thread() back to the run queue, once we are * guaranteed to reach the context switch in finite * time. See z_sched_switch_spin(). */ @@ -175,7 +175,7 @@ static ALWAYS_INLINE unsigned int do_swap(unsigned int key, irq_unlock(key); } - return _current->swap_retval; + return arch_current_thread()->swap_retval; } static inline int z_swap_irqlock(unsigned int key) @@ -260,6 +260,6 @@ static inline void z_dummy_thread_init(struct k_thread *dummy_thread) dummy_thread->base.slice_ticks = 0; #endif /* CONFIG_TIMESLICE_PER_THREAD */ - _current_cpu->current = dummy_thread; + arch_current_thread_set(dummy_thread); } #endif /* ZEPHYR_KERNEL_INCLUDE_KSWAP_H_ */ diff --git a/kernel/include/kthread.h b/kernel/include/kthread.h index e2505f65b3b96b1..512636c49c588be 100644 --- a/kernel/include/kthread.h +++ b/kernel/include/kthread.h @@ -197,17 +197,17 @@ static ALWAYS_INLINE bool should_preempt(struct k_thread *thread, return true; } - __ASSERT(_current != NULL, ""); + __ASSERT(arch_current_thread() != NULL, ""); /* Or if we're pended/suspended/dummy (duh) */ - if (z_is_thread_prevented_from_running(_current)) { + if (z_is_thread_prevented_from_running(arch_current_thread())) { return true; } /* Otherwise we have to be running a preemptible thread or * switching to a metairq */ - if (thread_is_preemptible(_current) || thread_is_metairq(thread)) { + if (thread_is_preemptible(arch_current_thread()) || thread_is_metairq(thread)) { return true; } diff --git a/kernel/ipi.c b/kernel/ipi.c index ee01c4594251ca4..59c2eba669867e4 100644 --- a/kernel/ipi.c +++ b/kernel/ipi.c @@ -101,7 +101,7 @@ void z_sched_ipi(void) #endif /* CONFIG_TRACE_SCHED_IPI */ #ifdef CONFIG_TIMESLICING - if (thread_is_sliceable(_current)) { + if (thread_is_sliceable(arch_current_thread())) { z_time_slice(); } #endif /* CONFIG_TIMESLICING */ diff --git a/kernel/mailbox.c b/kernel/mailbox.c index d7da8e3c8e49ae0..17ebfb2ea035120 100644 --- a/kernel/mailbox.c +++ b/kernel/mailbox.c @@ -216,7 +216,7 @@ static int mbox_message_put(struct k_mbox *mbox, struct k_mbox_msg *tx_msg, k_spinlock_key_t key; /* save sender id so it can be used during message matching */ - tx_msg->rx_source_thread = _current; + tx_msg->rx_source_thread = arch_current_thread(); /* finish readying sending thread (actual or dummy) for send */ sending_thread = tx_msg->_syncing_thread; @@ -296,7 +296,7 @@ int k_mbox_put(struct k_mbox *mbox, struct k_mbox_msg *tx_msg, k_timeout_t timeout) { /* configure things for a synchronous send, then send the message */ - tx_msg->_syncing_thread = _current; + tx_msg->_syncing_thread = arch_current_thread(); SYS_PORT_TRACING_OBJ_FUNC_ENTER(k_mbox, put, mbox, timeout); @@ -321,7 +321,7 @@ void k_mbox_async_put(struct k_mbox *mbox, struct k_mbox_msg *tx_msg, */ mbox_async_alloc(&async); - async->thread.prio = _current->base.prio; + async->thread.prio = arch_current_thread()->base.prio; async->tx_msg = *tx_msg; async->tx_msg._syncing_thread = (struct k_thread *)&async->thread; @@ -388,7 +388,7 @@ int k_mbox_get(struct k_mbox *mbox, struct k_mbox_msg *rx_msg, void *buffer, int result; /* save receiver id so it can be used during message matching */ - rx_msg->tx_target_thread = _current; + rx_msg->tx_target_thread = arch_current_thread(); /* search mailbox's tx queue for a compatible sender */ key = k_spin_lock(&mbox->lock); @@ -425,7 +425,7 @@ int k_mbox_get(struct k_mbox *mbox, struct k_mbox_msg *rx_msg, void *buffer, SYS_PORT_TRACING_OBJ_FUNC_BLOCKING(k_mbox, get, mbox, timeout); /* wait until a matching sender appears or a timeout occurs */ - _current->base.swap_data = rx_msg; + arch_current_thread()->base.swap_data = rx_msg; result = z_pend_curr(&mbox->lock, key, &mbox->rx_msg_queue, timeout); /* consume message data immediately, if needed */ diff --git a/kernel/mem_domain.c b/kernel/mem_domain.c index 16b337acf011df4..1fc8a36a94de290 100644 --- a/kernel/mem_domain.c +++ b/kernel/mem_domain.c @@ -299,7 +299,7 @@ void z_mem_domain_init_thread(struct k_thread *thread) k_spinlock_key_t key = k_spin_lock(&z_mem_domain_lock); /* New threads inherit memory domain configuration from parent */ - ret = add_thread_locked(_current->mem_domain_info.mem_domain, thread); + ret = add_thread_locked(arch_current_thread()->mem_domain_info.mem_domain, thread); __ASSERT_NO_MSG(ret == 0); ARG_UNUSED(ret); diff --git a/kernel/mem_slab.c b/kernel/mem_slab.c index e64359174c5ab3f..45ba08e27cbe2e9 100644 --- a/kernel/mem_slab.c +++ b/kernel/mem_slab.c @@ -248,7 +248,7 @@ int k_mem_slab_alloc(struct k_mem_slab *slab, void **mem, k_timeout_t timeout) /* wait for a free block or timeout */ result = z_pend_curr(&slab->lock, key, &slab->wait_q, timeout); if (result == 0) { - *mem = _current->base.swap_data; + *mem = arch_current_thread()->base.swap_data; } SYS_PORT_TRACING_OBJ_FUNC_EXIT(k_mem_slab, alloc, slab, timeout, result); diff --git a/kernel/mempool.c b/kernel/mempool.c index d8926c63ed94078..7e9a7677f71ab8d 100644 --- a/kernel/mempool.c +++ b/kernel/mempool.c @@ -165,7 +165,7 @@ void *z_thread_aligned_alloc(size_t align, size_t size) if (k_is_in_isr()) { heap = _SYSTEM_HEAP; } else { - heap = _current->resource_pool; + heap = arch_current_thread()->resource_pool; } if (heap != NULL) { diff --git a/kernel/mmu.c b/kernel/mmu.c index 788f30ff730ef43..fc55096d44b53f2 100644 --- a/kernel/mmu.c +++ b/kernel/mmu.c @@ -1674,7 +1674,7 @@ static bool do_page_fault(void *addr, bool pin) #endif /* CONFIG_DEMAND_PAGING_ALLOW_IRQ */ key = k_spin_lock(&z_mm_lock); - faulting_thread = _current_cpu->current; + faulting_thread = arch_current_thread(); status = arch_page_location_get(addr, &page_in_location); if (status == ARCH_PAGE_LOCATION_BAD) { diff --git a/kernel/msg_q.c b/kernel/msg_q.c index 9adfd9ae34f29c8..190b8c4e78e3231 100644 --- a/kernel/msg_q.c +++ b/kernel/msg_q.c @@ -169,7 +169,7 @@ int z_impl_k_msgq_put(struct k_msgq *msgq, const void *data, k_timeout_t timeout SYS_PORT_TRACING_OBJ_FUNC_BLOCKING(k_msgq, put, msgq, timeout); /* wait for put message success, failure, or timeout */ - _current->base.swap_data = (void *) data; + arch_current_thread()->base.swap_data = (void *) data; result = z_pend_curr(&msgq->lock, key, &msgq->wait_q, timeout); SYS_PORT_TRACING_OBJ_FUNC_EXIT(k_msgq, put, msgq, timeout, result); @@ -267,7 +267,7 @@ int z_impl_k_msgq_get(struct k_msgq *msgq, void *data, k_timeout_t timeout) SYS_PORT_TRACING_OBJ_FUNC_BLOCKING(k_msgq, get, msgq, timeout); /* wait for get message success or timeout */ - _current->base.swap_data = data; + arch_current_thread()->base.swap_data = data; result = z_pend_curr(&msgq->lock, key, &msgq->wait_q, timeout); SYS_PORT_TRACING_OBJ_FUNC_EXIT(k_msgq, get, msgq, timeout, result); diff --git a/kernel/mutex.c b/kernel/mutex.c index ce76e5a2af545a3..2fbede19e2caf33 100644 --- a/kernel/mutex.c +++ b/kernel/mutex.c @@ -114,17 +114,17 @@ int z_impl_k_mutex_lock(struct k_mutex *mutex, k_timeout_t timeout) key = k_spin_lock(&lock); - if (likely((mutex->lock_count == 0U) || (mutex->owner == _current))) { + if (likely((mutex->lock_count == 0U) || (mutex->owner == arch_current_thread()))) { mutex->owner_orig_prio = (mutex->lock_count == 0U) ? - _current->base.prio : + arch_current_thread()->base.prio : mutex->owner_orig_prio; mutex->lock_count++; - mutex->owner = _current; + mutex->owner = arch_current_thread(); LOG_DBG("%p took mutex %p, count: %d, orig prio: %d", - _current, mutex, mutex->lock_count, + arch_current_thread(), mutex, mutex->lock_count, mutex->owner_orig_prio); k_spin_unlock(&lock, key); @@ -144,7 +144,7 @@ int z_impl_k_mutex_lock(struct k_mutex *mutex, k_timeout_t timeout) SYS_PORT_TRACING_OBJ_FUNC_BLOCKING(k_mutex, lock, mutex, timeout); - new_prio = new_prio_for_inheritance(_current->base.prio, + new_prio = new_prio_for_inheritance(arch_current_thread()->base.prio, mutex->owner->base.prio); LOG_DBG("adjusting prio up on mutex %p", mutex); @@ -157,7 +157,7 @@ int z_impl_k_mutex_lock(struct k_mutex *mutex, k_timeout_t timeout) LOG_DBG("on mutex %p got_mutex value: %d", mutex, got_mutex); - LOG_DBG("%p got mutex %p (y/n): %c", _current, mutex, + LOG_DBG("%p got mutex %p (y/n): %c", arch_current_thread(), mutex, got_mutex ? 'y' : 'n'); if (got_mutex == 0) { @@ -167,7 +167,7 @@ int z_impl_k_mutex_lock(struct k_mutex *mutex, k_timeout_t timeout) /* timed out */ - LOG_DBG("%p timeout on mutex %p", _current, mutex); + LOG_DBG("%p timeout on mutex %p", arch_current_thread(), mutex); key = k_spin_lock(&lock); @@ -224,7 +224,7 @@ int z_impl_k_mutex_unlock(struct k_mutex *mutex) /* * The current thread does not own the mutex. */ - CHECKIF(mutex->owner != _current) { + CHECKIF(mutex->owner != arch_current_thread()) { SYS_PORT_TRACING_OBJ_FUNC_EXIT(k_mutex, unlock, mutex, -EPERM); return -EPERM; diff --git a/kernel/pipes.c b/kernel/pipes.c index a81393c508d1c58..a9eef5a4f368cb2 100644 --- a/kernel/pipes.c +++ b/kernel/pipes.c @@ -443,11 +443,11 @@ int z_impl_k_pipe_put(struct k_pipe *pipe, const void *data, * invoked from within an ISR as that is not safe to do. */ - src_desc = k_is_in_isr() ? &isr_desc : &_current->pipe_desc; + src_desc = k_is_in_isr() ? &isr_desc : &arch_current_thread()->pipe_desc; src_desc->buffer = (unsigned char *)data; src_desc->bytes_to_xfer = bytes_to_write; - src_desc->thread = _current; + src_desc->thread = arch_current_thread(); sys_dlist_append(&src_list, &src_desc->node); *bytes_written = pipe_write(pipe, &src_list, @@ -488,7 +488,7 @@ int z_impl_k_pipe_put(struct k_pipe *pipe, const void *data, SYS_PORT_TRACING_OBJ_FUNC_BLOCKING(k_pipe, put, pipe, timeout); - _current->base.swap_data = src_desc; + arch_current_thread()->base.swap_data = src_desc; z_sched_wait(&pipe->lock, key, &pipe->wait_q.writers, timeout, NULL); @@ -581,11 +581,11 @@ static int pipe_get_internal(k_spinlock_key_t key, struct k_pipe *pipe, * invoked from within an ISR as that is not safe to do. */ - dest_desc = k_is_in_isr() ? &isr_desc : &_current->pipe_desc; + dest_desc = k_is_in_isr() ? &isr_desc : &arch_current_thread()->pipe_desc; dest_desc->buffer = data; dest_desc->bytes_to_xfer = bytes_to_read; - dest_desc->thread = _current; + dest_desc->thread = arch_current_thread(); src_desc = (struct _pipe_desc *)sys_dlist_get(&src_list); while (src_desc != NULL) { @@ -674,7 +674,7 @@ static int pipe_get_internal(k_spinlock_key_t key, struct k_pipe *pipe, SYS_PORT_TRACING_OBJ_FUNC_BLOCKING(k_pipe, get, pipe, timeout); - _current->base.swap_data = dest_desc; + arch_current_thread()->base.swap_data = dest_desc; z_sched_wait(&pipe->lock, key, &pipe->wait_q.readers, timeout, NULL); diff --git a/kernel/poll.c b/kernel/poll.c index 502e97537b9b607..05e9fe10c3e0665 100644 --- a/kernel/poll.c +++ b/kernel/poll.c @@ -290,7 +290,7 @@ int z_impl_k_poll(struct k_poll_event *events, int num_events, { int events_registered; k_spinlock_key_t key; - struct z_poller *poller = &_current->poller; + struct z_poller *poller = &arch_current_thread()->poller; poller->is_polling = true; poller->mode = MODE_POLL; diff --git a/kernel/queue.c b/kernel/queue.c index 4b00deeb1e757d8..09b224c9c944944 100644 --- a/kernel/queue.c +++ b/kernel/queue.c @@ -346,9 +346,9 @@ void *z_impl_k_queue_get(struct k_queue *queue, k_timeout_t timeout) int ret = z_pend_curr(&queue->lock, key, &queue->wait_q, timeout); SYS_PORT_TRACING_OBJ_FUNC_EXIT(k_queue, get, queue, timeout, - (ret != 0) ? NULL : _current->base.swap_data); + (ret != 0) ? NULL : arch_current_thread()->base.swap_data); - return (ret != 0) ? NULL : _current->base.swap_data; + return (ret != 0) ? NULL : arch_current_thread()->base.swap_data; } bool k_queue_remove(struct k_queue *queue, void *data) diff --git a/kernel/sched.c b/kernel/sched.c index eda1a3e0908ffd4..61e5b5dedbdb4f9 100644 --- a/kernel/sched.c +++ b/kernel/sched.c @@ -31,7 +31,7 @@ extern struct k_thread *pending_current; struct k_spinlock _sched_spinlock; /* Storage to "complete" the context switch from an invalid/incomplete thread - * context (ex: exiting an ISR that aborted _current) + * context (ex: exiting an ISR that aborted arch_current_thread()) */ __incoherent struct k_thread _thread_dummy; @@ -135,12 +135,12 @@ static ALWAYS_INLINE struct k_thread *runq_best(void) return _priq_run_best(curr_cpu_runq()); } -/* _current is never in the run queue until context switch on +/* arch_current_thread() is never in the run queue until context switch on * SMP configurations, see z_requeue_current() */ static inline bool should_queue_thread(struct k_thread *thread) { - return !IS_ENABLED(CONFIG_SMP) || (thread != _current); + return !IS_ENABLED(CONFIG_SMP) || (thread != arch_current_thread()); } static ALWAYS_INLINE void queue_thread(struct k_thread *thread) @@ -150,7 +150,7 @@ static ALWAYS_INLINE void queue_thread(struct k_thread *thread) runq_add(thread); } #ifdef CONFIG_SMP - if (thread == _current) { + if (thread == arch_current_thread()) { /* add current to end of queue means "yield" */ _current_cpu->swap_ok = true; } @@ -202,8 +202,8 @@ static inline void clear_halting(struct k_thread *thread) static ALWAYS_INLINE struct k_thread *next_up(void) { #ifdef CONFIG_SMP - if (is_halting(_current)) { - halt_thread(_current, is_aborting(_current) ? + if (is_halting(arch_current_thread())) { + halt_thread(arch_current_thread(), is_aborting(arch_current_thread()) ? _THREAD_DEAD : _THREAD_SUSPENDED); } #endif /* CONFIG_SMP */ @@ -242,42 +242,42 @@ static ALWAYS_INLINE struct k_thread *next_up(void) #else /* Under SMP, the "cache" mechanism for selecting the next * thread doesn't work, so we have more work to do to test - * _current against the best choice from the queue. Here, the + * arch_current_thread() against the best choice from the queue. Here, the * thread selected above represents "the best thread that is * not current". * - * Subtle note on "queued": in SMP mode, _current does not + * Subtle note on "queued": in SMP mode, arch_current_thread() does not * live in the queue, so this isn't exactly the same thing as - * "ready", it means "is _current already added back to the + * "ready", it means "is arch_current_thread() already added back to the * queue such that we don't want to re-add it". */ - bool queued = z_is_thread_queued(_current); - bool active = !z_is_thread_prevented_from_running(_current); + bool queued = z_is_thread_queued(arch_current_thread()); + bool active = !z_is_thread_prevented_from_running(arch_current_thread()); if (thread == NULL) { thread = _current_cpu->idle_thread; } if (active) { - int32_t cmp = z_sched_prio_cmp(_current, thread); + int32_t cmp = z_sched_prio_cmp(arch_current_thread(), thread); /* Ties only switch if state says we yielded */ if ((cmp > 0) || ((cmp == 0) && !_current_cpu->swap_ok)) { - thread = _current; + thread = arch_current_thread(); } if (!should_preempt(thread, _current_cpu->swap_ok)) { - thread = _current; + thread = arch_current_thread(); } } - /* Put _current back into the queue */ - if ((thread != _current) && active && - !z_is_idle_thread_object(_current) && !queued) { - queue_thread(_current); + /* Put arch_current_thread() back into the queue */ + if ((thread != arch_current_thread()) && active && + !z_is_idle_thread_object(arch_current_thread()) && !queued) { + queue_thread(arch_current_thread()); } - /* Take the new _current out of the queue */ + /* Take the new arch_current_thread() out of the queue */ if (z_is_thread_queued(thread)) { dequeue_thread(thread); } @@ -293,7 +293,7 @@ void move_thread_to_end_of_prio_q(struct k_thread *thread) dequeue_thread(thread); } queue_thread(thread); - update_cache(thread == _current); + update_cache(thread == arch_current_thread()); } /* Track cooperative threads preempted by metairqs so we can return to @@ -304,10 +304,10 @@ static void update_metairq_preempt(struct k_thread *thread) { #if (CONFIG_NUM_METAIRQ_PRIORITIES > 0) && \ (CONFIG_NUM_COOP_PRIORITIES > CONFIG_NUM_METAIRQ_PRIORITIES) - if (thread_is_metairq(thread) && !thread_is_metairq(_current) && - !thread_is_preemptible(_current)) { + if (thread_is_metairq(thread) && !thread_is_metairq(arch_current_thread()) && + !thread_is_preemptible(arch_current_thread())) { /* Record new preemption */ - _current_cpu->metairq_preempted = _current; + _current_cpu->metairq_preempted = arch_current_thread(); } else if (!thread_is_metairq(thread) && !z_is_idle_thread_object(thread)) { /* Returning from existing preemption */ _current_cpu->metairq_preempted = NULL; @@ -327,14 +327,14 @@ static ALWAYS_INLINE void update_cache(int preempt_ok) if (should_preempt(thread, preempt_ok)) { #ifdef CONFIG_TIMESLICING - if (thread != _current) { + if (thread != arch_current_thread()) { z_reset_time_slice(thread); } #endif /* CONFIG_TIMESLICING */ update_metairq_preempt(thread); _kernel.ready_q.cache = thread; } else { - _kernel.ready_q.cache = _current; + _kernel.ready_q.cache = arch_current_thread(); } #else @@ -427,9 +427,9 @@ void z_sched_start(struct k_thread *thread) */ static void thread_halt_spin(struct k_thread *thread, k_spinlock_key_t key) { - if (is_halting(_current)) { - halt_thread(_current, - is_aborting(_current) ? _THREAD_DEAD : _THREAD_SUSPENDED); + if (is_halting(arch_current_thread())) { + halt_thread(arch_current_thread(), + is_aborting(arch_current_thread()) ? _THREAD_DEAD : _THREAD_SUSPENDED); } k_spin_unlock(&_sched_spinlock, key); while (is_halting(thread)) { @@ -443,7 +443,7 @@ static void thread_halt_spin(struct k_thread *thread, k_spinlock_key_t key) /* Shared handler for k_thread_{suspend,abort}(). Called with the * scheduler lock held and the key passed (which it may * release/reacquire!) which will be released before a possible return - * (aborting _current will not return, obviously), which may be after + * (aborting arch_current_thread() will not return, obviously), which may be after * a context switch. */ static void z_thread_halt(struct k_thread *thread, k_spinlock_key_t key, @@ -476,14 +476,14 @@ static void z_thread_halt(struct k_thread *thread, k_spinlock_key_t key, if (arch_is_in_isr()) { thread_halt_spin(thread, key); } else { - add_to_waitq_locked(_current, wq); + add_to_waitq_locked(arch_current_thread(), wq); z_swap(&_sched_spinlock, key); } } else { halt_thread(thread, terminate ? _THREAD_DEAD : _THREAD_SUSPENDED); - if ((thread == _current) && !arch_is_in_isr()) { + if ((thread == arch_current_thread()) && !arch_is_in_isr()) { z_swap(&_sched_spinlock, key); - __ASSERT(!terminate, "aborted _current back from dead"); + __ASSERT(!terminate, "aborted arch_current_thread() back from dead"); } else { k_spin_unlock(&_sched_spinlock, key); } @@ -499,6 +499,19 @@ void z_impl_k_thread_suspend(k_tid_t thread) { SYS_PORT_TRACING_OBJ_FUNC_ENTER(k_thread, suspend, thread); + /* Special case "suspend the current thread" as it doesn't + * need the async complexity below. + */ + if (thread == arch_current_thread() && !arch_is_in_isr() && !IS_ENABLED(CONFIG_SMP)) { + k_spinlock_key_t key = k_spin_lock(&_sched_spinlock); + + z_mark_thread_as_suspended(thread); + dequeue_thread(thread); + update_cache(1); + z_swap(&_sched_spinlock, key); + return; + } + (void)z_abort_thread_timeout(thread); k_spinlock_key_t key = k_spin_lock(&_sched_spinlock); @@ -559,7 +572,7 @@ static void unready_thread(struct k_thread *thread) if (z_is_thread_queued(thread)) { dequeue_thread(thread); } - update_cache(thread == _current); + update_cache(thread == arch_current_thread()); } /* _sched_spinlock must be held */ @@ -596,7 +609,7 @@ static void pend_locked(struct k_thread *thread, _wait_q_t *wait_q, void z_pend_thread(struct k_thread *thread, _wait_q_t *wait_q, k_timeout_t timeout) { - __ASSERT_NO_MSG(thread == _current || is_thread_dummy(thread)); + __ASSERT_NO_MSG(thread == arch_current_thread() || is_thread_dummy(thread)); K_SPINLOCK(&_sched_spinlock) { pend_locked(thread, wait_q, timeout); } @@ -657,7 +670,7 @@ int z_pend_curr(struct k_spinlock *lock, k_spinlock_key_t key, _wait_q_t *wait_q, k_timeout_t timeout) { #if defined(CONFIG_TIMESLICING) && defined(CONFIG_SWAP_NONATOMIC) - pending_current = _current; + pending_current = arch_current_thread(); #endif /* CONFIG_TIMESLICING && CONFIG_SWAP_NONATOMIC */ __ASSERT_NO_MSG(sizeof(_sched_spinlock) == 0 || lock != &_sched_spinlock); @@ -670,7 +683,7 @@ int z_pend_curr(struct k_spinlock *lock, k_spinlock_key_t key, * held. */ (void) k_spin_lock(&_sched_spinlock); - pend_locked(_current, wait_q, timeout); + pend_locked(arch_current_thread(), wait_q, timeout); k_spin_release(lock); return z_swap(&_sched_spinlock, key); } @@ -768,7 +781,7 @@ static inline bool need_swap(void) /* Check if the next ready thread is the same as the current thread */ new_thread = _kernel.ready_q.cache; - return new_thread != _current; + return new_thread != arch_current_thread(); #endif /* CONFIG_SMP */ } @@ -804,15 +817,15 @@ void k_sched_lock(void) void k_sched_unlock(void) { K_SPINLOCK(&_sched_spinlock) { - __ASSERT(_current->base.sched_locked != 0U, ""); + __ASSERT(arch_current_thread()->base.sched_locked != 0U, ""); __ASSERT(!arch_is_in_isr(), ""); - ++_current->base.sched_locked; + ++arch_current_thread()->base.sched_locked; update_cache(0); } LOG_DBG("scheduler unlocked (%p:%d)", - _current, _current->base.sched_locked); + arch_current_thread(), arch_current_thread()->base.sched_locked); SYS_PORT_TRACING_FUNC(k_thread, sched_unlock); @@ -824,10 +837,10 @@ struct k_thread *z_swap_next_thread(void) #ifdef CONFIG_SMP struct k_thread *ret = next_up(); - if (ret == _current) { + if (ret == arch_current_thread()) { /* When not swapping, have to signal IPIs here. In * the context switch case it must happen later, after - * _current gets requeued. + * arch_current_thread() gets requeued. */ signal_pending_ipi(); } @@ -838,11 +851,11 @@ struct k_thread *z_swap_next_thread(void) } #ifdef CONFIG_USE_SWITCH -/* Just a wrapper around _current = xxx with tracing */ +/* Just a wrapper around arch_current_thread_set(xxx) with tracing */ static inline void set_current(struct k_thread *new_thread) { z_thread_mark_switched_out(); - _current_cpu->current = new_thread; + arch_current_thread_set(new_thread); } /** @@ -868,7 +881,7 @@ static inline void set_current(struct k_thread *new_thread) * function. * * @warning - * The _current value may have changed after this call and not refer + * The arch_current_thread() value may have changed after this call and not refer * to the interrupted thread anymore. It might be necessary to make a local * copy before calling this function. * @@ -884,7 +897,7 @@ void *z_get_next_switch_handle(void *interrupted) void *ret = NULL; K_SPINLOCK(&_sched_spinlock) { - struct k_thread *old_thread = _current, *new_thread; + struct k_thread *old_thread = arch_current_thread(), *new_thread; if (IS_ENABLED(CONFIG_SMP)) { old_thread->switch_handle = NULL; @@ -910,7 +923,7 @@ void *z_get_next_switch_handle(void *interrupted) #endif /* CONFIG_TIMESLICING */ #ifdef CONFIG_SPIN_VALIDATE - /* Changed _current! Update the spinlock + /* Changed arch_current_thread()! Update the spinlock * bookkeeping so the validation doesn't get * confused when the "wrong" thread tries to * release the lock. @@ -945,9 +958,9 @@ void *z_get_next_switch_handle(void *interrupted) return ret; #else z_sched_usage_switch(_kernel.ready_q.cache); - _current->switch_handle = interrupted; + arch_current_thread()->switch_handle = interrupted; set_current(_kernel.ready_q.cache); - return _current->switch_handle; + return arch_current_thread()->switch_handle; #endif /* CONFIG_SMP */ } #endif /* CONFIG_USE_SWITCH */ @@ -993,7 +1006,7 @@ void z_impl_k_thread_priority_set(k_tid_t thread, int prio) bool need_sched = z_thread_prio_set((struct k_thread *)thread, prio); if ((need_sched) && (IS_ENABLED(CONFIG_SMP) || - (_current->base.sched_locked == 0U))) { + (arch_current_thread()->base.sched_locked == 0U))) { z_reschedule_unlocked(); } } @@ -1059,7 +1072,7 @@ static inline void z_vrfy_k_thread_deadline_set(k_tid_t tid, int deadline) bool k_can_yield(void) { return !(k_is_pre_kernel() || k_is_in_isr() || - z_is_idle_thread_object(_current)); + z_is_idle_thread_object(arch_current_thread())); } void z_impl_k_yield(void) @@ -1071,10 +1084,10 @@ void z_impl_k_yield(void) k_spinlock_key_t key = k_spin_lock(&_sched_spinlock); if (!IS_ENABLED(CONFIG_SMP) || - z_is_thread_queued(_current)) { - dequeue_thread(_current); + z_is_thread_queued(arch_current_thread())) { + dequeue_thread(arch_current_thread()); } - queue_thread(_current); + queue_thread(arch_current_thread()); update_cache(1); z_swap(&_sched_spinlock, key); } @@ -1093,7 +1106,7 @@ static int32_t z_tick_sleep(k_ticks_t ticks) __ASSERT(!arch_is_in_isr(), ""); - LOG_DBG("thread %p for %lu ticks", _current, (unsigned long)ticks); + LOG_DBG("thread %p for %lu ticks", arch_current_thread(), (unsigned long)ticks); /* wait of 0 ms is treated as a 'yield' */ if (ticks == 0) { @@ -1111,15 +1124,15 @@ static int32_t z_tick_sleep(k_ticks_t ticks) k_spinlock_key_t key = k_spin_lock(&_sched_spinlock); #if defined(CONFIG_TIMESLICING) && defined(CONFIG_SWAP_NONATOMIC) - pending_current = _current; + pending_current = arch_current_thread(); #endif /* CONFIG_TIMESLICING && CONFIG_SWAP_NONATOMIC */ - unready_thread(_current); - z_add_thread_timeout(_current, timeout); - z_mark_thread_as_suspended(_current); + unready_thread(arch_current_thread()); + z_add_thread_timeout(arch_current_thread(), timeout); + z_mark_thread_as_suspended(arch_current_thread()); (void)z_swap(&_sched_spinlock, key); - __ASSERT(!z_is_thread_state_set(_current, _THREAD_SUSPENDED), ""); + __ASSERT(!z_is_thread_state_set(arch_current_thread(), _THREAD_SUSPENDED), ""); ticks = (k_ticks_t)expected_wakeup_ticks - sys_clock_tick_get_32(); if (ticks > 0) { @@ -1140,7 +1153,7 @@ int32_t z_impl_k_sleep(k_timeout_t timeout) /* in case of K_FOREVER, we suspend */ if (K_TIMEOUT_EQ(timeout, K_FOREVER)) { - k_thread_suspend(_current); + k_thread_suspend(arch_current_thread()); SYS_PORT_TRACING_FUNC_EXIT(k_thread, sleep, timeout, (int32_t) K_TICKS_FOREVER); return (int32_t) K_TICKS_FOREVER; @@ -1230,20 +1243,7 @@ static inline void z_vrfy_k_wakeup(k_tid_t thread) k_tid_t z_impl_k_sched_current_thread_query(void) { -#ifdef CONFIG_SMP - /* In SMP, _current is a field read from _current_cpu, which - * can race with preemption before it is read. We must lock - * local interrupts when reading it. - */ - unsigned int k = arch_irq_lock(); -#endif /* CONFIG_SMP */ - - k_tid_t ret = _current_cpu->current; - -#ifdef CONFIG_SMP - arch_irq_unlock(k); -#endif /* CONFIG_SMP */ - return ret; + return arch_current_thread(); } #ifdef CONFIG_USERSPACE @@ -1298,13 +1298,13 @@ static void halt_thread(struct k_thread *thread, uint8_t new_state) (void)z_abort_thread_timeout(thread); unpend_all(&thread->join_queue); - /* Edge case: aborting _current from within an + /* Edge case: aborting arch_current_thread() from within an * ISR that preempted it requires clearing the - * _current pointer so the upcoming context + * arch_current_thread() pointer so the upcoming context * switch doesn't clobber the now-freed * memory */ - if (thread == _current && arch_is_in_isr()) { + if (thread == arch_current_thread() && arch_is_in_isr()) { dummify = true; } } @@ -1347,10 +1347,10 @@ static void halt_thread(struct k_thread *thread, uint8_t new_state) k_thread_abort_cleanup(thread); #endif /* CONFIG_THREAD_ABORT_NEED_CLEANUP */ - /* Do this "set _current to dummy" step last so that - * subsystems above can rely on _current being + /* Do this "set arch_current_thread() to dummy" step last so that + * subsystems above can rely on arch_current_thread() being * unchanged. Disabled for posix as that arch - * continues to use the _current pointer in its swap + * continues to use the arch_current_thread() pointer in its swap * code. Note that we must leave a non-null switch * handle for any threads spinning in join() (this can * never be used, as our thread is flagged dead, but @@ -1358,7 +1358,7 @@ static void halt_thread(struct k_thread *thread, uint8_t new_state) */ if (dummify && !IS_ENABLED(CONFIG_ARCH_POSIX)) { #ifdef CONFIG_USE_SWITCH - _current->switch_handle = _current; + arch_current_thread()->switch_handle = arch_current_thread(); #endif z_dummy_thread_init(&_thread_dummy); @@ -1416,13 +1416,13 @@ int z_impl_k_thread_join(struct k_thread *thread, k_timeout_t timeout) ret = 0; } else if (K_TIMEOUT_EQ(timeout, K_NO_WAIT)) { ret = -EBUSY; - } else if ((thread == _current) || - (thread->base.pended_on == &_current->join_queue)) { + } else if ((thread == arch_current_thread()) || + (thread->base.pended_on == &arch_current_thread()->join_queue)) { ret = -EDEADLK; } else { __ASSERT(!arch_is_in_isr(), "cannot join in ISR"); - add_to_waitq_locked(_current, &thread->join_queue); - add_thread_timeout(_current, timeout); + add_to_waitq_locked(arch_current_thread(), &thread->join_queue); + add_thread_timeout(arch_current_thread(), timeout); SYS_PORT_TRACING_OBJ_FUNC_BLOCKING(k_thread, join, thread, timeout); ret = z_swap(&_sched_spinlock, key); @@ -1521,7 +1521,7 @@ int z_sched_wait(struct k_spinlock *lock, k_spinlock_key_t key, int ret = z_pend_curr(lock, key, wait_q, timeout); if (data != NULL) { - *data = _current->base.swap_data; + *data = arch_current_thread()->base.swap_data; } return ret; } diff --git a/kernel/smp.c b/kernel/smp.c index a56595252789a99..b0eefb35e414494 100644 --- a/kernel/smp.c +++ b/kernel/smp.c @@ -58,23 +58,23 @@ unsigned int z_smp_global_lock(void) { unsigned int key = arch_irq_lock(); - if (!_current->base.global_lock_count) { + if (!arch_current_thread()->base.global_lock_count) { while (!atomic_cas(&global_lock, 0, 1)) { arch_spin_relax(); } } - _current->base.global_lock_count++; + arch_current_thread()->base.global_lock_count++; return key; } void z_smp_global_unlock(unsigned int key) { - if (_current->base.global_lock_count != 0U) { - _current->base.global_lock_count--; + if (arch_current_thread()->base.global_lock_count != 0U) { + arch_current_thread()->base.global_lock_count--; - if (!_current->base.global_lock_count) { + if (!arch_current_thread()->base.global_lock_count) { (void)atomic_clear(&global_lock); } } diff --git a/kernel/spinlock_validate.c b/kernel/spinlock_validate.c index cb7ff5a3e7ff7a5..c2a97356d9cec06 100644 --- a/kernel/spinlock_validate.c +++ b/kernel/spinlock_validate.c @@ -24,11 +24,11 @@ bool z_spin_unlock_valid(struct k_spinlock *l) l->thread_cpu = 0; - if (arch_is_in_isr() && _current->base.thread_state & _THREAD_DUMMY) { - /* Edge case where an ISR aborted _current */ + if (arch_is_in_isr() && arch_current_thread()->base.thread_state & _THREAD_DUMMY) { + /* Edge case where an ISR aborted arch_current_thread() */ return true; } - if (tcpu != (_current_cpu->id | (uintptr_t)_current)) { + if (tcpu != (_current_cpu->id | (uintptr_t)arch_current_thread())) { return false; } return true; @@ -36,7 +36,7 @@ bool z_spin_unlock_valid(struct k_spinlock *l) void z_spin_lock_set_owner(struct k_spinlock *l) { - l->thread_cpu = _current_cpu->id | (uintptr_t)_current; + l->thread_cpu = _current_cpu->id | (uintptr_t)arch_current_thread(); } #ifdef CONFIG_KERNEL_COHERENCE diff --git a/kernel/stack.c b/kernel/stack.c index 5add38b9c2318ec..b3ea624b1625e73 100644 --- a/kernel/stack.c +++ b/kernel/stack.c @@ -182,7 +182,7 @@ int z_impl_k_stack_pop(struct k_stack *stack, stack_data_t *data, return -EAGAIN; } - *data = (stack_data_t)_current->base.swap_data; + *data = (stack_data_t)arch_current_thread()->base.swap_data; SYS_PORT_TRACING_OBJ_FUNC_EXIT(k_stack, pop, stack, timeout, 0); diff --git a/kernel/thread.c b/kernel/thread.c index 69728a403d91fc2..60bc39e40dc4da2 100644 --- a/kernel/thread.c +++ b/kernel/thread.c @@ -82,7 +82,7 @@ EXPORT_SYMBOL(k_is_in_isr); #ifdef CONFIG_THREAD_CUSTOM_DATA void z_impl_k_thread_custom_data_set(void *value) { - _current->custom_data = value; + arch_current_thread()->custom_data = value; } #ifdef CONFIG_USERSPACE @@ -95,7 +95,7 @@ static inline void z_vrfy_k_thread_custom_data_set(void *data) void *z_impl_k_thread_custom_data_get(void) { - return _current->custom_data; + return arch_current_thread()->custom_data; } #ifdef CONFIG_USERSPACE @@ -110,7 +110,7 @@ static inline void *z_vrfy_k_thread_custom_data_get(void) int z_impl_k_is_preempt_thread(void) { - return !arch_is_in_isr() && thread_is_preemptible(_current); + return !arch_is_in_isr() && thread_is_preemptible(arch_current_thread()); } #ifdef CONFIG_USERSPACE @@ -139,7 +139,7 @@ int z_impl_k_thread_name_set(k_tid_t thread, const char *str) { #ifdef CONFIG_THREAD_NAME if (thread == NULL) { - thread = _current; + thread = arch_current_thread(); } strncpy(thread->name, str, CONFIG_THREAD_MAX_NAME_LEN - 1); @@ -331,11 +331,11 @@ void z_check_stack_sentinel(void) { uint32_t *stack; - if ((_current->base.thread_state & _THREAD_DUMMY) != 0) { + if ((arch_current_thread()->base.thread_state & _THREAD_DUMMY) != 0) { return; } - stack = (uint32_t *)_current->stack_info.start; + stack = (uint32_t *)arch_current_thread()->stack_info.start; if (*stack != STACK_SENTINEL) { /* Restore it so further checks don't trigger this same error */ *stack = STACK_SENTINEL; @@ -627,8 +627,8 @@ char *z_setup_new_thread(struct k_thread *new_thread, } #endif /* CONFIG_SCHED_CPU_MASK */ #ifdef CONFIG_ARCH_HAS_CUSTOM_SWAP_TO_MAIN - /* _current may be null if the dummy thread is not used */ - if (!_current) { + /* arch_current_thread() may be null if the dummy thread is not used */ + if (!arch_current_thread()) { new_thread->resource_pool = NULL; return stack_ptr; } @@ -637,13 +637,13 @@ char *z_setup_new_thread(struct k_thread *new_thread, z_mem_domain_init_thread(new_thread); if ((options & K_INHERIT_PERMS) != 0U) { - k_thread_perms_inherit(_current, new_thread); + k_thread_perms_inherit(arch_current_thread(), new_thread); } #endif /* CONFIG_USERSPACE */ #ifdef CONFIG_SCHED_DEADLINE new_thread->base.prio_deadline = 0; #endif /* CONFIG_SCHED_DEADLINE */ - new_thread->resource_pool = _current->resource_pool; + new_thread->resource_pool = arch_current_thread()->resource_pool; #ifdef CONFIG_SMP z_waitq_init(&new_thread->halt_queue); @@ -738,7 +738,7 @@ k_tid_t z_vrfy_k_thread_create(struct k_thread *new_thread, */ K_OOPS(K_SYSCALL_VERIFY(_is_valid_prio(prio, NULL))); K_OOPS(K_SYSCALL_VERIFY(z_is_prio_lower_or_equal(prio, - _current->base.prio))); + arch_current_thread()->base.prio))); z_setup_new_thread(new_thread, stack, stack_size, entry, p1, p2, p3, prio, options, NULL); @@ -783,25 +783,25 @@ FUNC_NORETURN void k_thread_user_mode_enter(k_thread_entry_t entry, { SYS_PORT_TRACING_FUNC(k_thread, user_mode_enter); - _current->base.user_options |= K_USER; - z_thread_essential_clear(_current); + arch_current_thread()->base.user_options |= K_USER; + z_thread_essential_clear(arch_current_thread()); #ifdef CONFIG_THREAD_MONITOR - _current->entry.pEntry = entry; - _current->entry.parameter1 = p1; - _current->entry.parameter2 = p2; - _current->entry.parameter3 = p3; + arch_current_thread()->entry.pEntry = entry; + arch_current_thread()->entry.parameter1 = p1; + arch_current_thread()->entry.parameter2 = p2; + arch_current_thread()->entry.parameter3 = p3; #endif /* CONFIG_THREAD_MONITOR */ #ifdef CONFIG_USERSPACE - __ASSERT(z_stack_is_user_capable(_current->stack_obj), + __ASSERT(z_stack_is_user_capable(arch_current_thread()->stack_obj), "dropping to user mode with kernel-only stack object"); #ifdef CONFIG_THREAD_USERSPACE_LOCAL_DATA - memset(_current->userspace_local_data, 0, + memset(arch_current_thread()->userspace_local_data, 0, sizeof(struct _thread_userspace_local_data)); #endif /* CONFIG_THREAD_USERSPACE_LOCAL_DATA */ #ifdef CONFIG_THREAD_LOCAL_STORAGE - arch_tls_stack_setup(_current, - (char *)(_current->stack_info.start + - _current->stack_info.size)); + arch_tls_stack_setup(arch_current_thread(), + (char *)(arch_current_thread()->stack_info.start + + arch_current_thread()->stack_info.size)); #endif /* CONFIG_THREAD_LOCAL_STORAGE */ arch_user_mode_enter(entry, p1, p2, p3); #else @@ -929,7 +929,7 @@ static inline k_ticks_t z_vrfy_k_thread_timeout_expires_ticks( void z_thread_mark_switched_in(void) { #if defined(CONFIG_SCHED_THREAD_USAGE) && !defined(CONFIG_USE_SWITCH) - z_sched_usage_start(_current); + z_sched_usage_start(arch_current_thread()); #endif /* CONFIG_SCHED_THREAD_USAGE && !CONFIG_USE_SWITCH */ #ifdef CONFIG_TRACING @@ -946,8 +946,8 @@ void z_thread_mark_switched_out(void) #ifdef CONFIG_TRACING #ifdef CONFIG_THREAD_LOCAL_STORAGE /* Dummy thread won't have TLS set up to run arbitrary code */ - if (!_current_cpu->current || - (_current_cpu->current->base.thread_state & _THREAD_DUMMY) != 0) + if (!arch_current_thread() || + (arch_current_thread()->base.thread_state & _THREAD_DUMMY) != 0) return; #endif /* CONFIG_THREAD_LOCAL_STORAGE */ SYS_PORT_TRACING_FUNC(k_thread, switched_out); @@ -1097,7 +1097,7 @@ void k_thread_abort_cleanup(struct k_thread *thread) thread_to_cleanup = NULL; } - if (thread == _current) { + if (thread == arch_current_thread()) { /* Need to defer for current running thread as the cleanup * might result in exception. Actual cleanup will be done * at the next time k_thread_abort() is called, or at thread diff --git a/kernel/timeslicing.c b/kernel/timeslicing.c index be91d9606f51e2d..0410d42b91fe3f7 100644 --- a/kernel/timeslicing.c +++ b/kernel/timeslicing.c @@ -15,7 +15,7 @@ static bool slice_expired[CONFIG_MP_MAX_NUM_CPUS]; #ifdef CONFIG_SWAP_NONATOMIC /* If z_swap() isn't atomic, then it's possible for a timer interrupt - * to try to timeslice away _current after it has already pended + * to try to timeslice away arch_current_thread() after it has already pended * itself but before the corresponding context switch. Treat that as * a noop condition in z_time_slice(). */ @@ -82,7 +82,7 @@ void k_sched_time_slice_set(int32_t slice, int prio) K_SPINLOCK(&_sched_spinlock) { slice_ticks = k_ms_to_ticks_ceil32(slice); slice_max_prio = prio; - z_reset_time_slice(_current); + z_reset_time_slice(arch_current_thread()); } } @@ -103,7 +103,7 @@ void k_thread_time_slice_set(struct k_thread *thread, int32_t thread_slice_ticks void z_time_slice(void) { k_spinlock_key_t key = k_spin_lock(&_sched_spinlock); - struct k_thread *curr = _current; + struct k_thread *curr = arch_current_thread(); #ifdef CONFIG_SWAP_NONATOMIC if (pending_current == curr) { diff --git a/kernel/userspace.c b/kernel/userspace.c index 7a66513c03e5a9b..5aeafe221c72a0f 100644 --- a/kernel/userspace.c +++ b/kernel/userspace.c @@ -437,7 +437,7 @@ static void *z_object_alloc(enum k_objects otype, size_t size) /* The allocating thread implicitly gets permission on kernel objects * that it allocates */ - k_thread_perms_set(zo, _current); + k_thread_perms_set(zo, arch_current_thread()); /* Activates reference counting logic for automatic disposal when * all permissions have been revoked @@ -654,7 +654,7 @@ static int thread_perms_test(struct k_object *ko) return 1; } - index = thread_index_get(_current); + index = thread_index_get(arch_current_thread()); if (index != -1) { return sys_bitfield_test_bit((mem_addr_t)&ko->perms, index); } @@ -663,9 +663,9 @@ static int thread_perms_test(struct k_object *ko) static void dump_permission_error(struct k_object *ko) { - int index = thread_index_get(_current); + int index = thread_index_get(arch_current_thread()); LOG_ERR("thread %p (%d) does not have permission on %s %p", - _current, index, + arch_current_thread(), index, otype_to_str(ko->type), ko->name); LOG_HEXDUMP_ERR(ko->perms, sizeof(ko->perms), "permission bitmap"); } @@ -718,7 +718,7 @@ void k_object_access_revoke(const void *object, struct k_thread *thread) void z_impl_k_object_release(const void *object) { - k_object_access_revoke(object, _current); + k_object_access_revoke(object, arch_current_thread()); } void k_object_access_all_grant(const void *object) @@ -794,7 +794,7 @@ void k_object_recycle(const void *obj) if (ko != NULL) { (void)memset(ko->perms, 0, sizeof(ko->perms)); - k_thread_perms_set(ko, _current); + k_thread_perms_set(ko, arch_current_thread()); ko->flags |= K_OBJ_FLAG_INITIALIZED; } } diff --git a/kernel/userspace_handler.c b/kernel/userspace_handler.c index ab6e4f0623c7f28..38e778713bafc2a 100644 --- a/kernel/userspace_handler.c +++ b/kernel/userspace_handler.c @@ -72,7 +72,7 @@ static inline void z_vrfy_k_object_release(const void *object) ko = validate_any_object(object); K_OOPS(K_SYSCALL_VERIFY_MSG(ko != NULL, "object %p access denied", object)); - k_thread_perms_clear(ko, _current); + k_thread_perms_clear(ko, arch_current_thread()); } #include diff --git a/kernel/work.c b/kernel/work.c index 0871fad0eb92ba8..5e46576770724a5 100644 --- a/kernel/work.c +++ b/kernel/work.c @@ -262,7 +262,7 @@ static inline int queue_submit_locked(struct k_work_q *queue, } int ret; - bool chained = (_current == &queue->thread) && !k_is_in_isr(); + bool chained = (arch_current_thread() == &queue->thread) && !k_is_in_isr(); bool draining = flag_test(&queue->flags, K_WORK_QUEUE_DRAIN_BIT); bool plugged = flag_test(&queue->flags, K_WORK_QUEUE_PLUGGED_BIT); diff --git a/lib/libc/arcmwdt/include/stdio.h b/lib/libc/arcmwdt/include/stdio.h new file mode 100644 index 000000000000000..c062637d3b25fa1 --- /dev/null +++ b/lib/libc/arcmwdt/include/stdio.h @@ -0,0 +1,26 @@ +/* + * Copyright (c) 2024 Synopsys + * + * SPDX-License-Identifier: Apache-2.0 + */ + +#ifndef LIB_LIBC_ARCMWDT_INCLUDE_STDIO_H_ +#define LIB_LIBC_ARCMWDT_INCLUDE_STDIO_H_ + +#include_next + +#ifdef fileno +#undef fileno +#endif + +#ifdef __cplusplus +extern "C" { +#endif + +extern int fileno(FILE *file); + +#ifdef __cplusplus +} +#endif + +#endif /* LIB_LIBC_ARCMWDT_INCLUDE_STDIO_H_ */ diff --git a/lib/libc/arcmwdt/include/sys/types.h b/lib/libc/arcmwdt/include/sys/types.h index 1024f22834c9173..1c76cf1f9daa0a5 100644 --- a/lib/libc/arcmwdt/include/sys/types.h +++ b/lib/libc/arcmwdt/include/sys/types.h @@ -9,10 +9,22 @@ #include_next "sys/types.h" +#define _CLOCK_T_DECLARED +#define _CLOCKID_T_DECLARED + #define _DEV_T_DECLARED #define _INO_T_DECLARED #define _NLINK_T_DECLARED #define _UID_T_DECLARED #define _GID_T_DECLARED +#ifndef _SSIZE_T_DEFINED +#define _SSIZE_T_DEFINED +#ifdef CONFIG_64BIT +typedef long ssize_t; +#else /* CONFIG_64BIT */ +typedef int ssize_t; +#endif /* CONFIG_64BIT */ +#endif /* _SSIZE_T_DEFINED */ + #endif /* LIB_LIBC_ARCMWDT_INCLUDE_SYS_TYPES_H_ */ diff --git a/lib/libc/arcmwdt/include/time.h b/lib/libc/arcmwdt/include/time.h new file mode 100644 index 000000000000000..245bd3a77d23698 --- /dev/null +++ b/lib/libc/arcmwdt/include/time.h @@ -0,0 +1,25 @@ +/* + * Copyright (c) 2024 Synopsys + * + * SPDX-License-Identifier: Apache-2.0 + */ + +#ifndef LIB_LIBC_ARCMWDT_INCLUDE_TIME_H_ +#define LIB_LIBC_ARCMWDT_INCLUDE_TIME_H_ + +#include_next + +#ifdef __cplusplus +extern "C" { +#endif + +extern char *asctime_r(const struct tm *tp, char *buf); +extern char *ctime_r(const time_t *clock, char *buf); +extern struct tm *gmtime_r(const time_t *timep, struct tm *result); +extern struct tm *localtime_r(const time_t *timer, struct tm *result); + +#ifdef __cplusplus +} +#endif + +#endif /* LIB_LIBC_ARCMWDT_INCLUDE_TIME_H_ */ diff --git a/lib/libc/arcmwdt/libc-hooks.c b/lib/libc/arcmwdt/libc-hooks.c index 8e094d25975f065..60ff32fb7441330 100644 --- a/lib/libc/arcmwdt/libc-hooks.c +++ b/lib/libc/arcmwdt/libc-hooks.c @@ -71,6 +71,13 @@ int _write(int fd, const char *buf, unsigned int nbytes) } #endif +#ifndef CONFIG_POSIX_DEVICE_IO +__weak int fileno(FILE *file) +{ + return _fileno(file); +} +#endif + /* * It's require to implement _isatty to have STDIN/STDOUT/STDERR buffered * properly. diff --git a/lib/libc/armstdc/src/libc-hooks.c b/lib/libc/armstdc/src/libc-hooks.c index afce534eddfd615..f9fe9d1c4200cfe 100644 --- a/lib/libc/armstdc/src/libc-hooks.c +++ b/lib/libc/armstdc/src/libc-hooks.c @@ -23,7 +23,7 @@ void __stdout_hook_install(int (*hook)(int)) volatile int *__aeabi_errno_addr(void) { - return &_current->errno_var; + return &arch_current_thread()->errno_var; } int fputc(int c, FILE *f) diff --git a/lib/os/p4wq.c b/lib/os/p4wq.c index d95de01d2f7676f..339de4939443551 100644 --- a/lib/os/p4wq.c +++ b/lib/os/p4wq.c @@ -87,10 +87,10 @@ static FUNC_NORETURN void p4wq_loop(void *p0, void *p1, void *p2) = CONTAINER_OF(r, struct k_p4wq_work, rbnode); rb_remove(&queue->queue, r); - w->thread = _current; + w->thread = arch_current_thread(); sys_dlist_append(&queue->active, &w->dlnode); - set_prio(_current, w); - thread_clear_requeued(_current); + set_prio(arch_current_thread(), w); + thread_clear_requeued(arch_current_thread()); k_spin_unlock(&queue->lock, k); @@ -101,7 +101,7 @@ static FUNC_NORETURN void p4wq_loop(void *p0, void *p1, void *p2) /* Remove from the active list only if it * wasn't resubmitted already */ - if (!thread_was_requeued(_current)) { + if (!thread_was_requeued(arch_current_thread())) { sys_dlist_remove(&w->dlnode); w->thread = NULL; k_sem_give(&w->done_sem); @@ -228,9 +228,9 @@ void k_p4wq_submit(struct k_p4wq *queue, struct k_p4wq_work *item) item->deadline += k_cycle_get_32(); /* Resubmission from within handler? Remove from active list */ - if (item->thread == _current) { + if (item->thread == arch_current_thread()) { sys_dlist_remove(&item->dlnode); - thread_set_requeued(_current); + thread_set_requeued(arch_current_thread()); item->thread = NULL; } else { k_sem_init(&item->done_sem, 0, 1); diff --git a/lib/posix/options/key.c b/lib/posix/options/key.c index f49198d173c81b3..aba457e944eda1b 100644 --- a/lib/posix/options/key.c +++ b/lib/posix/options/key.c @@ -13,14 +13,9 @@ #include #include -struct pthread_key_data { - sys_snode_t node; - pthread_thread_data thread_data; -}; - LOG_MODULE_REGISTER(pthread_key, CONFIG_PTHREAD_KEY_LOG_LEVEL); -static SYS_SEM_DEFINE(pthread_key_lock, 1, 1); +SYS_SEM_DEFINE(pthread_key_lock, 1, 1); /* This is non-standard (i.e. an implementation detail) */ #define PTHREAD_KEY_INITIALIZER (-1) diff --git a/lib/posix/options/posix_internal.h b/lib/posix/options/posix_internal.h index 06cc8d05a1f8f11..24bfb83e14b7e31 100644 --- a/lib/posix/options/posix_internal.h +++ b/lib/posix/options/posix_internal.h @@ -84,6 +84,11 @@ typedef struct pthread_thread_data { void *spec_data; } pthread_thread_data; +struct pthread_key_data { + sys_snode_t node; + pthread_thread_data thread_data; +}; + static inline bool is_pthread_obj_initialized(uint32_t obj) { return (obj & PTHREAD_OBJ_MASK_INIT) != 0; diff --git a/lib/posix/options/pthread.c b/lib/posix/options/pthread.c index e3f8ebf0910d1cf..4ee2851dcdbff2d 100644 --- a/lib/posix/options/pthread.c +++ b/lib/posix/options/pthread.c @@ -458,19 +458,42 @@ static void posix_thread_recycle_work_handler(struct k_work *work) } static K_WORK_DELAYABLE_DEFINE(posix_thread_recycle_work, posix_thread_recycle_work_handler); +extern struct sys_sem pthread_key_lock; + static void posix_thread_finalize(struct posix_thread *t, void *retval) { - sys_snode_t *node_l; + sys_snode_t *node_l, *node_s; pthread_key_obj *key_obj; pthread_thread_data *thread_spec_data; + sys_snode_t *node_key_data, *node_key_data_s, *node_key_data_prev = NULL; + struct pthread_key_data *key_data; - SYS_SLIST_FOR_EACH_NODE(&t->key_list, node_l) { + SYS_SLIST_FOR_EACH_NODE_SAFE(&t->key_list, node_l, node_s) { thread_spec_data = (pthread_thread_data *)node_l; if (thread_spec_data != NULL) { key_obj = thread_spec_data->key; if (key_obj->destructor != NULL) { (key_obj->destructor)(thread_spec_data->spec_data); } + + SYS_SEM_LOCK(&pthread_key_lock) { + SYS_SLIST_FOR_EACH_NODE_SAFE( + &key_obj->key_data_l, + node_key_data, + node_key_data_s) { + key_data = (struct pthread_key_data *)node_key_data; + if (&key_data->thread_data == thread_spec_data) { + sys_slist_remove( + &key_obj->key_data_l, + node_key_data_prev, + node_key_data + ); + k_free(key_data); + break; + } + node_key_data_prev = node_key_data; + } + } } } diff --git a/modules/Kconfig.renesas_fsp b/modules/Kconfig.renesas_fsp index 9e8de7afed86f3b..9a1f796938551b9 100644 --- a/modules/Kconfig.renesas_fsp +++ b/modules/Kconfig.renesas_fsp @@ -15,6 +15,11 @@ config USE_RA_FSP_SCI_B_UART help Enable RA FSP SCI-B UART driver +config USE_RA_FSP_SPI + bool + help + Enable RA FSP SPI driver + config USE_RA_FSP_DTC bool help diff --git a/modules/cmsis-dsp/CMakeLists.txt b/modules/cmsis-dsp/CMakeLists.txt index b4f2b8edd00d770..e5ebbfcf172da18 100644 --- a/modules/cmsis-dsp/CMakeLists.txt +++ b/modules/cmsis-dsp/CMakeLists.txt @@ -730,7 +730,7 @@ if(CONFIG_CMSIS_DSP) ${CMSIS_DSP_DIR}/Source/SupportFunctions/arm_selection_sort_f32.c ${CMSIS_DSP_DIR}/Source/SupportFunctions/arm_sort_f32.c ${CMSIS_DSP_DIR}/Source/SupportFunctions/arm_sort_init_f32.c - ${CMSIS_DSP_DIR}/Source/SupportFunctions/arm_weighted_sum_f32.c + ${CMSIS_DSP_DIR}/Source/SupportFunctions/arm_weighted_average_f32.c ) if ((NOT ARMAC5) AND (NOT DISABLEFLOAT16)) @@ -740,7 +740,7 @@ if(CONFIG_CMSIS_DSP) zephyr_library_sources(${CMSIS_DSP_DIR}/Source/SupportFunctions/arm_q15_to_f16.c) zephyr_library_sources(${CMSIS_DSP_DIR}/Source/SupportFunctions/arm_float_to_f16.c) zephyr_library_sources(${CMSIS_DSP_DIR}/Source/SupportFunctions/arm_f16_to_float.c) - zephyr_library_sources(${CMSIS_DSP_DIR}/Source/SupportFunctions/arm_weighted_sum_f16.c) + zephyr_library_sources(${CMSIS_DSP_DIR}/Source/SupportFunctions/arm_weighted_average_f16.c) zephyr_library_sources(${CMSIS_DSP_DIR}/Source/SupportFunctions/arm_barycenter_f16.c) zephyr_library_sources(${CMSIS_DSP_DIR}/Source/SupportFunctions/arm_f16_to_f64.c) zephyr_library_sources(${CMSIS_DSP_DIR}/Source/SupportFunctions/arm_f64_to_f16.c) diff --git a/modules/hostap/CMakeLists.txt b/modules/hostap/CMakeLists.txt index 56298b5bcd152ad..861746be57a2fc3 100644 --- a/modules/hostap/CMakeLists.txt +++ b/modules/hostap/CMakeLists.txt @@ -17,503 +17,516 @@ set(CMAKE_EXE_LINKER_FLAGS "--specs=nosys.specs -lnosys") set(CMAKE_C_FLAGS "${CMAKE_C_FLAGS} -DMISSING_SYSCALL_NAMES") zephyr_include_directories( - src/ - ${HOSTAP_BASE}/ - ${WIFI_NM_WPA_SUPPLICANT_BASE}/ - ${HOSTAP_SRC_BASE}/ - ${HOSTAP_SRC_BASE}/common/ - ${HOSTAP_SRC_BASE}/eap_common - ${HOSTAP_SRC_BASE}/eap_server - ${HOSTAP_SRC_BASE}/radius - ${HOSTAP_SRC_BASE}/crypto/ - ${HOSTAP_SRC_BASE}/ap/ - ${HOSTAP_SRC_BASE}/drivers/ - ${HOSTAP_SRC_BASE}/rsn_supp + src/ + ${HOSTAP_BASE}/ + ${WIFI_NM_WPA_SUPPLICANT_BASE}/ + ${HOSTAP_SRC_BASE}/ + ${HOSTAP_SRC_BASE}/common/ + ${HOSTAP_SRC_BASE}/eap_common + ${HOSTAP_SRC_BASE}/eap_server + ${HOSTAP_SRC_BASE}/radius + ${HOSTAP_SRC_BASE}/crypto/ + ${HOSTAP_SRC_BASE}/ap/ + ${HOSTAP_SRC_BASE}/drivers/ + ${HOSTAP_SRC_BASE}/rsn_supp ) target_include_directories(hostap INTERFACE - ${HOSTAP_SRC_BASE}/utils/ + ${HOSTAP_SRC_BASE}/utils/ ) zephyr_library_compile_definitions( - TLS_DEFAULT_CIPHERS=\""DEFAULT:!EXP:!LOW"\" - CONFIG_SME - CONFIG_NO_CONFIG_WRITE - CONFIG_CTRL_IFACE - CONFIG_NO_RANDOM_POOL - CONFIG_SHA256 - CONFIG_SHA384 - CONFIG_SHA512 - CONFIG_CTRL_IFACE_ZEPHYR - CONFIG_SUITEB192 - CONFIG_SUITEB + TLS_DEFAULT_CIPHERS=\""DEFAULT:!EXP:!LOW"\" + CONFIG_SME + CONFIG_NO_CONFIG_WRITE + CONFIG_CTRL_IFACE + CONFIG_NO_RANDOM_POOL + CONFIG_SHA256 + CONFIG_SHA384 + CONFIG_SHA512 + CONFIG_CTRL_IFACE_ZEPHYR + CONFIG_SUITEB192 + CONFIG_SUITEB ) zephyr_library_compile_definitions_ifdef(CONFIG_WIFI_NM_WPA_SUPPLICANT_CRYPTO_NONE - CONFIG_NO_PBKDF2 + CONFIG_NO_PBKDF2 ) zephyr_library_compile_definitions_ifdef(CONFIG_WIFI_NM_WPA_SUPPLICANT_NO_DEBUG - CONFIG_NO_STDOUT_DEBUG + CONFIG_NO_STDOUT_DEBUG ) zephyr_library_compile_definitions_ifdef(CONFIG_WIFI_NM_WPA_SUPPLICANT_ROBUST_AV - CONFIG_ROBUST_AV + CONFIG_ROBUST_AV ) zephyr_library_compile_definitions_ifdef(CONFIG_WIFI_NM_WPA_SUPPLICANT_WMM_AC - CONFIG_WMM_AC + CONFIG_WMM_AC ) zephyr_library_compile_definitions_ifdef(CONFIG_WIFI_NM_WPA_SUPPLICANT_RRM - CONFIG_RRM + CONFIG_RRM ) zephyr_library_compile_definitions_ifdef(CONFIG_WIFI_NM_WPA_SUPPLICANT_ROBUST_AV - CONFIG_ROBUST_AV + CONFIG_ROBUST_AV ) zephyr_library_compile_definitions_ifdef(CONFIG_WIFI_NM_WPA_SUPPLICANT_MBO - CONFIG_MBO + CONFIG_MBO ) zephyr_library_compile_definitions_ifdef(CONFIG_WIFI_NM_WPA_SUPPLICANT_WNM - CONFIG_WNM + CONFIG_WNM ) zephyr_library_include_directories( - ${CMAKE_CURRENT_SOURCE_DIR}/src - ${HOSTAP_BASE}/ - ${HOSTAP_SRC_BASE}/utils - ${HOSTAP_SRC_BASE}/drivers - ${HOSTAP_BASE}/src - ${ZEPHYR_BASE}/include - ${ZEPHYR_BASE}/include/net - ) + ${CMAKE_CURRENT_SOURCE_DIR}/src + ${HOSTAP_BASE}/ + ${HOSTAP_SRC_BASE}/utils + ${HOSTAP_SRC_BASE}/drivers + ${HOSTAP_BASE}/src + ${ZEPHYR_BASE}/include + ${ZEPHYR_BASE}/include/net + ) zephyr_library_compile_definitions_ifdef(CONFIG_WIFI_NM_WPA_SUPPLICANT_NO_DEBUG - CONFIG_NO_STDOUT_DEBUG + CONFIG_NO_STDOUT_DEBUG ) zephyr_library_sources( - ${HOSTAP_SRC_BASE}/common/wpa_common.c - ${HOSTAP_SRC_BASE}/common/ieee802_11_common.c - ${HOSTAP_SRC_BASE}/common/hw_features_common.c - ${HOSTAP_SRC_BASE}/common/wpa_ctrl.c - ${HOSTAP_SRC_BASE}/common/cli.c - - ${HOSTAP_SRC_BASE}/drivers/driver_common.c - ${HOSTAP_SRC_BASE}/drivers/drivers.c - ${HOSTAP_SRC_BASE}/utils/crc32.c - ${HOSTAP_SRC_BASE}/utils/base64.c - ${HOSTAP_SRC_BASE}/utils/common.c - ${HOSTAP_SRC_BASE}/utils/wpabuf.c - ${HOSTAP_SRC_BASE}/utils/bitfield.c - ${HOSTAP_SRC_BASE}/utils/eloop.c - ${HOSTAP_SRC_BASE}/utils/os_zephyr.c - ${HOSTAP_SRC_BASE}/utils/wpa_debug_zephyr.c - ${HOSTAP_SRC_BASE}/l2_packet/l2_packet_zephyr.c - ${HOSTAP_SRC_BASE}/drivers/driver_zephyr.c - - ${WIFI_NM_WPA_SUPPLICANT_BASE}/config.c - ${WIFI_NM_WPA_SUPPLICANT_BASE}/notify.c - ${WIFI_NM_WPA_SUPPLICANT_BASE}/eap_register.c - ${WIFI_NM_WPA_SUPPLICANT_BASE}/config_none.c - ${WIFI_NM_WPA_SUPPLICANT_BASE}/bssid_ignore.c - ${WIFI_NM_WPA_SUPPLICANT_BASE}/wpas_glue.c - ${WIFI_NM_WPA_SUPPLICANT_BASE}/scan.c - ${WIFI_NM_WPA_SUPPLICANT_BASE}/ctrl_iface.c - - ${WIFI_NM_WPA_SUPPLICANT_BASE}/bss.c - ${WIFI_NM_WPA_SUPPLICANT_BASE}/sme.c - ${WIFI_NM_WPA_SUPPLICANT_BASE}/wpa_supplicant.c - ${WIFI_NM_WPA_SUPPLICANT_BASE}/events.c - ${WIFI_NM_WPA_SUPPLICANT_BASE}/wpa_cli_cmds.c - ${WIFI_NM_WPA_SUPPLICANT_BASE}/ctrl_iface_zephyr.c - ${WIFI_NM_WPA_SUPPLICANT_BASE}/wpa_cli_zephyr.c - - # Zephyr specific files (glue code) - src/supp_main.c - src/supp_api.c - src/supp_events.c + ${HOSTAP_SRC_BASE}/common/wpa_common.c + ${HOSTAP_SRC_BASE}/common/ieee802_11_common.c + ${HOSTAP_SRC_BASE}/common/hw_features_common.c + ${HOSTAP_SRC_BASE}/common/wpa_ctrl.c + ${HOSTAP_SRC_BASE}/common/cli.c + + ${HOSTAP_SRC_BASE}/drivers/driver_common.c + ${HOSTAP_SRC_BASE}/drivers/drivers.c + ${HOSTAP_SRC_BASE}/utils/crc32.c + ${HOSTAP_SRC_BASE}/utils/base64.c + ${HOSTAP_SRC_BASE}/utils/common.c + ${HOSTAP_SRC_BASE}/utils/wpabuf.c + ${HOSTAP_SRC_BASE}/utils/bitfield.c + ${HOSTAP_SRC_BASE}/utils/eloop.c + ${HOSTAP_SRC_BASE}/utils/os_zephyr.c + ${HOSTAP_SRC_BASE}/utils/wpa_debug_zephyr.c + ${HOSTAP_SRC_BASE}/l2_packet/l2_packet_zephyr.c + ${HOSTAP_SRC_BASE}/drivers/driver_zephyr.c + + ${WIFI_NM_WPA_SUPPLICANT_BASE}/config.c + ${WIFI_NM_WPA_SUPPLICANT_BASE}/notify.c + ${WIFI_NM_WPA_SUPPLICANT_BASE}/eap_register.c + ${WIFI_NM_WPA_SUPPLICANT_BASE}/config_none.c + ${WIFI_NM_WPA_SUPPLICANT_BASE}/bssid_ignore.c + ${WIFI_NM_WPA_SUPPLICANT_BASE}/wpas_glue.c + ${WIFI_NM_WPA_SUPPLICANT_BASE}/scan.c + ${WIFI_NM_WPA_SUPPLICANT_BASE}/ctrl_iface.c + + ${WIFI_NM_WPA_SUPPLICANT_BASE}/bss.c + ${WIFI_NM_WPA_SUPPLICANT_BASE}/sme.c + ${WIFI_NM_WPA_SUPPLICANT_BASE}/wpa_supplicant.c + ${WIFI_NM_WPA_SUPPLICANT_BASE}/events.c + ${WIFI_NM_WPA_SUPPLICANT_BASE}/wpa_cli_cmds.c + ${WIFI_NM_WPA_SUPPLICANT_BASE}/ctrl_iface_zephyr.c + ${WIFI_NM_WPA_SUPPLICANT_BASE}/wpa_cli_zephyr.c + + # Zephyr specific files (glue code) + src/supp_main.c + src/supp_api.c + src/supp_events.c ) # Advanced features zephyr_library_sources_ifdef(CONFIG_WIFI_NM_WPA_SUPPLICANT_RRM - ${WIFI_NM_WPA_SUPPLICANT_BASE}/op_classes.c - ${WIFI_NM_WPA_SUPPLICANT_BASE}/rrm.c + ${WIFI_NM_WPA_SUPPLICANT_BASE}/op_classes.c + ${WIFI_NM_WPA_SUPPLICANT_BASE}/rrm.c ) zephyr_library_sources_ifdef(CONFIG_WIFI_NM_WPA_SUPPLICANT_WMM_AC - ${WIFI_NM_WPA_SUPPLICANT_BASE}/wmm_ac.c + ${WIFI_NM_WPA_SUPPLICANT_BASE}/wmm_ac.c ) zephyr_library_sources_ifdef(CONFIG_WIFI_NM_WPA_SUPPLICANT_ROBUST_AV - ${WIFI_NM_WPA_SUPPLICANT_BASE}/robust_av.c + ${WIFI_NM_WPA_SUPPLICANT_BASE}/robust_av.c ) zephyr_library_sources_ifdef(CONFIG_WIFI_NM_WPA_SUPPLICANT_MBO - ${WIFI_NM_WPA_SUPPLICANT_BASE}/mbo.c + ${WIFI_NM_WPA_SUPPLICANT_BASE}/mbo.c ) zephyr_library_sources_ifdef(CONFIG_WIFI_NM_WPA_SUPPLICANT_WNM - ${WIFI_NM_WPA_SUPPLICANT_BASE}/wnm_sta.c + ${WIFI_NM_WPA_SUPPLICANT_BASE}/wnm_sta.c ) zephyr_library_sources_ifdef(CONFIG_WPA_CLI - src/wpa_cli.c + src/wpa_cli.c ) zephyr_library_sources_ifdef(CONFIG_IEEE80211R - ${HOSTAP_SRC_BASE}/rsn_supp/wpa_ft.c - ${HOSTAP_SRC_BASE}/ap/wpa_auth_ft.c -) - -zephyr_library_sources_ifdef(CONFIG_WIFI_NM_WPA_SUPPLICANT_AP - ${WIFI_NM_WPA_SUPPLICANT_BASE}/ap.c - ${HOSTAP_SRC_BASE}/ap/ap_config.c - ${HOSTAP_SRC_BASE}/ap/ap_drv_ops.c - ${HOSTAP_SRC_BASE}/ap/ap_list.c - ${HOSTAP_SRC_BASE}/ap/ap_mlme.c - ${HOSTAP_SRC_BASE}/ap/authsrv.c - ${HOSTAP_SRC_BASE}/ap/beacon.c - ${HOSTAP_SRC_BASE}/ap/bss_load.c - ${HOSTAP_SRC_BASE}/ap/dfs.c - ${HOSTAP_SRC_BASE}/ap/drv_callbacks.c - ${HOSTAP_SRC_BASE}/ap/ctrl_iface_ap.c - ${HOSTAP_SRC_BASE}/ap/eap_user_db.c - ${HOSTAP_SRC_BASE}/ap/hostapd.c - ${HOSTAP_SRC_BASE}/ap/hw_features.c - ${HOSTAP_SRC_BASE}/ap/ieee802_11_auth.c - ${HOSTAP_SRC_BASE}/ap/ieee802_11.c - ${HOSTAP_SRC_BASE}/ap/ieee802_11_ht.c - ${HOSTAP_SRC_BASE}/ap/ieee802_11_shared.c - ${HOSTAP_SRC_BASE}/ap/ieee802_11_vht.c - ${HOSTAP_SRC_BASE}/ap/ieee802_1x.c - ${HOSTAP_SRC_BASE}/ap/neighbor_db.c - ${HOSTAP_SRC_BASE}/ap/p2p_hostapd.c - ${HOSTAP_SRC_BASE}/ap/pmksa_cache_auth.c - ${HOSTAP_SRC_BASE}/ap/preauth_auth.c - ${HOSTAP_SRC_BASE}/ap/rrm.c - ${HOSTAP_SRC_BASE}/ap/sta_info.c - ${HOSTAP_SRC_BASE}/ap/tkip_countermeasures.c - ${HOSTAP_SRC_BASE}/ap/utils.c - ${HOSTAP_SRC_BASE}/ap/wmm.c - - ${HOSTAP_SRC_BASE}/ap/wpa_auth.c - ${HOSTAP_SRC_BASE}/ap/wpa_auth_ie.c - ${HOSTAP_SRC_BASE}/ap/wpa_auth_ft.c - ${HOSTAP_SRC_BASE}/ap/wpa_auth_glue.c - - ${HOSTAP_SRC_BASE}/eap_common/eap_common.c - ${HOSTAP_SRC_BASE}/eap_server/eap_server.c - ${HOSTAP_SRC_BASE}/eap_server/eap_server_identity.c - ${HOSTAP_SRC_BASE}/eap_server/eap_server_methods.c - ${HOSTAP_SRC_BASE}/eapol_auth/eapol_auth_sm.c - ${HOSTAP_SRC_BASE}/ap/mbo_ap.c - ${HOSTAP_SRC_BASE}/ap/ctrl_iface_ap.c - ${HOSTAP_SRC_BASE}/utils/crc32.c - ${HOSTAP_SRC_BASE}/utils/ip_addr.c + ${HOSTAP_SRC_BASE}/rsn_supp/wpa_ft.c + ${HOSTAP_SRC_BASE}/ap/wpa_auth_ft.c +) + +if(CONFIG_WIFI_NM_WPA_SUPPLICANT_AP OR CONFIG_WIFI_NM_HOSTAPD_AP) +zephyr_library_sources( + ${WIFI_NM_WPA_SUPPLICANT_BASE}/ap.c + ${HOSTAP_SRC_BASE}/ap/ap_config.c + ${HOSTAP_SRC_BASE}/ap/ap_drv_ops.c + ${HOSTAP_SRC_BASE}/ap/ap_list.c + ${HOSTAP_SRC_BASE}/ap/ap_mlme.c + ${HOSTAP_SRC_BASE}/ap/authsrv.c + ${HOSTAP_SRC_BASE}/ap/beacon.c + ${HOSTAP_SRC_BASE}/ap/bss_load.c + ${HOSTAP_SRC_BASE}/ap/dfs.c + ${HOSTAP_SRC_BASE}/ap/drv_callbacks.c + ${HOSTAP_SRC_BASE}/ap/ctrl_iface_ap.c + ${HOSTAP_SRC_BASE}/ap/eap_user_db.c + ${HOSTAP_SRC_BASE}/ap/hostapd.c + ${HOSTAP_SRC_BASE}/ap/hw_features.c + ${HOSTAP_SRC_BASE}/ap/ieee802_11_auth.c + ${HOSTAP_SRC_BASE}/ap/ieee802_11.c + ${HOSTAP_SRC_BASE}/ap/ieee802_11_ht.c + ${HOSTAP_SRC_BASE}/ap/ieee802_11_shared.c + ${HOSTAP_SRC_BASE}/ap/ieee802_11_vht.c + ${HOSTAP_SRC_BASE}/ap/ieee802_1x.c + ${HOSTAP_SRC_BASE}/ap/neighbor_db.c + ${HOSTAP_SRC_BASE}/ap/p2p_hostapd.c + ${HOSTAP_SRC_BASE}/ap/pmksa_cache_auth.c + ${HOSTAP_SRC_BASE}/ap/preauth_auth.c + ${HOSTAP_SRC_BASE}/ap/rrm.c + ${HOSTAP_SRC_BASE}/ap/sta_info.c + ${HOSTAP_SRC_BASE}/ap/tkip_countermeasures.c + ${HOSTAP_SRC_BASE}/ap/utils.c + ${HOSTAP_SRC_BASE}/ap/wmm.c + + ${HOSTAP_SRC_BASE}/ap/wpa_auth.c + ${HOSTAP_SRC_BASE}/ap/wpa_auth_ie.c + ${HOSTAP_SRC_BASE}/ap/wpa_auth_ft.c + ${HOSTAP_SRC_BASE}/ap/wpa_auth_glue.c + + ${HOSTAP_SRC_BASE}/eap_common/eap_common.c + ${HOSTAP_SRC_BASE}/eap_server/eap_server.c + ${HOSTAP_SRC_BASE}/eap_server/eap_server_identity.c + ${HOSTAP_SRC_BASE}/eap_server/eap_server_methods.c + ${HOSTAP_SRC_BASE}/eapol_auth/eapol_auth_sm.c + ${HOSTAP_SRC_BASE}/ap/mbo_ap.c + ${HOSTAP_SRC_BASE}/ap/ctrl_iface_ap.c + ${HOSTAP_SRC_BASE}/utils/crc32.c + ${HOSTAP_SRC_BASE}/utils/ip_addr.c ) zephyr_library_sources_ifdef(CONFIG_WIFI_NM_WPA_SUPPLICANT_11AX - ${HOSTAP_SRC_BASE}/ap/ieee802_11_he.c + ${HOSTAP_SRC_BASE}/ap/ieee802_11_he.c ) -zephyr_library_compile_definitions_ifdef(CONFIG_WIFI_NM_WPA_SUPPLICANT_AP - CONFIG_AP - CONFIG_NO_RADIUS - CONFIG_NO_VLAN - CONFIG_NO_ACCOUNTING - NEED_AP_MLME - CONFIG_IEEE80211AC - CONFIG_EAP_SERVER - CONFIG_EAP_SERVER_IDENTITY +zephyr_library_compile_definitions( + CONFIG_AP + CONFIG_NO_RADIUS + CONFIG_NO_VLAN + CONFIG_NO_ACCOUNTING + NEED_AP_MLME + CONFIG_IEEE80211AC + EAP_SERVER + EAP_SERVER_IDENTITY ) zephyr_library_compile_definitions_ifdef(CONFIG_WIFI_NM_WPA_SUPPLICANT_11AX - CONFIG_IEEE80211AX + CONFIG_IEEE80211AX ) +endif() zephyr_include_directories_ifdef(CONFIG_WIFI_NM_HOSTAPD_AP - ${WIFI_NM_HOSTAPD_BASE}/ + ${WIFI_NM_HOSTAPD_BASE}/ ) zephyr_library_sources_ifdef(CONFIG_WIFI_NM_HOSTAPD_AP - ${HOSTAP_SRC_BASE}/ap/acs.c - ${WIFI_NM_HOSTAPD_BASE}/config_file.c - ${WIFI_NM_HOSTAPD_BASE}/ctrl_iface.c - ${WIFI_NM_HOSTAPD_BASE}/ctrl_iface_zephyr.c - ${WIFI_NM_HOSTAPD_BASE}/eap_register.c - ${WIFI_NM_HOSTAPD_BASE}/hostapd_cli_cmds.c - ${WIFI_NM_HOSTAPD_BASE}/hostapd_cli_zephyr.c + ${HOSTAP_SRC_BASE}/ap/acs.c + ${WIFI_NM_HOSTAPD_BASE}/config_file.c + ${WIFI_NM_HOSTAPD_BASE}/ctrl_iface.c + ${WIFI_NM_HOSTAPD_BASE}/ctrl_iface_zephyr.c + ${WIFI_NM_HOSTAPD_BASE}/eap_register.c + ${WIFI_NM_HOSTAPD_BASE}/hostapd_cli_cmds.c + ${WIFI_NM_HOSTAPD_BASE}/hostapd_cli_zephyr.c ) zephyr_library_compile_definitions_ifdef(CONFIG_WIFI_NM_HOSTAPD_AP - HOSTAPD - CONFIG_ACS + HOSTAPD + CONFIG_ACS ) zephyr_library_sources_ifdef(CONFIG_WIFI_NM_WPA_SUPPLICANT_CRYPTO_NONE - ${HOSTAP_SRC_BASE}/crypto/crypto_none.c - ${HOSTAP_SRC_BASE}/crypto/tls_none.c - - # FIXME: why do we need these when crypto is not selected? - ${HOSTAP_SRC_BASE}/crypto/aes-wrap.c - ${HOSTAP_SRC_BASE}/crypto/aes-unwrap.c - ${HOSTAP_SRC_BASE}/crypto/aes-internal.c - ${HOSTAP_SRC_BASE}/crypto/aes-internal-enc.c - ${HOSTAP_SRC_BASE}/crypto/aes-internal-dec.c - ${HOSTAP_SRC_BASE}/crypto/aes-omac1.c - ${HOSTAP_SRC_BASE}/crypto/md5.c - ${HOSTAP_SRC_BASE}/crypto/md5-internal.c - ${HOSTAP_SRC_BASE}/crypto/sha1.c - ${HOSTAP_SRC_BASE}/crypto/sha1-internal.c - ${HOSTAP_SRC_BASE}/crypto/sha1-pbkdf2.c - ${HOSTAP_SRC_BASE}/crypto/sha1-prf.c - ${HOSTAP_SRC_BASE}/crypto/sha256.c - ${HOSTAP_SRC_BASE}/crypto/sha256-internal.c - ${HOSTAP_SRC_BASE}/crypto/sha256-prf.c - ${HOSTAP_SRC_BASE}/crypto/sha384.c - ${HOSTAP_SRC_BASE}/crypto/sha384-internal.c - ${HOSTAP_SRC_BASE}/crypto/sha384-prf.c - ${HOSTAP_SRC_BASE}/crypto/sha512.c - ${HOSTAP_SRC_BASE}/crypto/sha512-internal.c - ${HOSTAP_SRC_BASE}/crypto/rc4.c + ${HOSTAP_SRC_BASE}/crypto/crypto_none.c + + # FIXME: why do we need these when crypto is not selected? + ${HOSTAP_SRC_BASE}/crypto/aes-wrap.c + ${HOSTAP_SRC_BASE}/crypto/aes-unwrap.c + ${HOSTAP_SRC_BASE}/crypto/aes-internal.c + ${HOSTAP_SRC_BASE}/crypto/aes-internal-enc.c + ${HOSTAP_SRC_BASE}/crypto/aes-internal-dec.c + ${HOSTAP_SRC_BASE}/crypto/aes-omac1.c + ${HOSTAP_SRC_BASE}/crypto/md5.c + ${HOSTAP_SRC_BASE}/crypto/md5-internal.c + ${HOSTAP_SRC_BASE}/crypto/sha1.c + ${HOSTAP_SRC_BASE}/crypto/sha1-internal.c + ${HOSTAP_SRC_BASE}/crypto/sha1-pbkdf2.c + ${HOSTAP_SRC_BASE}/crypto/sha1-prf.c + ${HOSTAP_SRC_BASE}/crypto/sha256.c + ${HOSTAP_SRC_BASE}/crypto/sha256-internal.c + ${HOSTAP_SRC_BASE}/crypto/sha256-prf.c + ${HOSTAP_SRC_BASE}/crypto/sha384.c + ${HOSTAP_SRC_BASE}/crypto/sha384-internal.c + ${HOSTAP_SRC_BASE}/crypto/sha384-prf.c + ${HOSTAP_SRC_BASE}/crypto/sha512.c + ${HOSTAP_SRC_BASE}/crypto/sha512-internal.c + ${HOSTAP_SRC_BASE}/crypto/rc4.c ) zephyr_library_compile_definitions_ifdef(CONFIG_WIFI_NM_WPA_SUPPLICANT_CRYPTO_NONE - CONFIG_NO_WPA - CONFIG_CRYPTO_INTERNAL + CONFIG_NO_WPA + CONFIG_CRYPTO_INTERNAL ) zephyr_library_compile_definitions_ifdef(CONFIG_WIFI_NM_WPA_SUPPLICANT_WEP - CONFIG_WEP + CONFIG_WEP +) + +zephyr_library_sources_ifndef(CONFIG_WIFI_NM_WPA_SUPPLICANT_CRYPTO_ENTERPRISE + ${HOSTAP_SRC_BASE}/crypto/tls_none.c ) zephyr_library_sources_ifndef(CONFIG_WIFI_NM_WPA_SUPPLICANT_CRYPTO_NONE - ${HOSTAP_SRC_BASE}/common/wpa_common.c - ${HOSTAP_SRC_BASE}/rsn_supp/wpa.c - ${HOSTAP_SRC_BASE}/rsn_supp/preauth.c - ${HOSTAP_SRC_BASE}/rsn_supp/wpa_ie.c + ${HOSTAP_SRC_BASE}/common/wpa_common.c + ${HOSTAP_SRC_BASE}/rsn_supp/wpa.c + ${HOSTAP_SRC_BASE}/rsn_supp/preauth.c + ${HOSTAP_SRC_BASE}/rsn_supp/wpa_ie.c ) zephyr_library_sources_ifdef(CONFIG_WIFI_NM_WPA_SUPPLICANT_WPA3 - ${HOSTAP_SRC_BASE}/common/sae.c - ${HOSTAP_SRC_BASE}/common/dragonfly.c + ${HOSTAP_SRC_BASE}/common/sae.c + ${HOSTAP_SRC_BASE}/common/dragonfly.c - ${HOSTAP_SRC_BASE}/crypto/dh_groups.c + ${HOSTAP_SRC_BASE}/crypto/dh_groups.c ) zephyr_library_compile_definitions_ifdef(CONFIG_WIFI_NM_WPA_SUPPLICANT_WPA3 - CONFIG_SAE - CONFIG_ECC + CONFIG_SAE + CONFIG_ECC ) zephyr_library_include_directories_ifndef(CONFIG_WIFI_NM_WPA_SUPPLICANT_CRYPTO_NONE - ${CMAKE_SOURCE_DIR} + ${CMAKE_SOURCE_DIR} ) zephyr_library_sources_ifdef(CONFIG_WIFI_NM_WPA_SUPPLICANT_P2P - ${WIFI_NM_WPA_SUPPLICANT_BASE}/p2p_supplicant.c - ${WIFI_NM_WPA_SUPPLICANT_BASE}/p2p_supplicant_sd.c - ${HOSTAP_SRC_BASE}/p2p/p2p.c - ${HOSTAP_SRC_BASE}/p2p/p2p_utils.c - ${HOSTAP_SRC_BASE}/p2p/p2p_parse.c - ${HOSTAP_SRC_BASE}/p2p/p2p_build.c - ${HOSTAP_SRC_BASE}/p2p/p2p_go_neg.c - ${HOSTAP_SRC_BASE}/p2p/p2p_sd.c - ${HOSTAP_SRC_BASE}/p2p/p2p_pd.c - ${HOSTAP_SRC_BASE}/p2p/p2p_invitation.c - ${HOSTAP_SRC_BASE}/p2p/p2p_dev_disc.c - ${HOSTAP_SRC_BASE}/p2p/p2p_group.c - ${HOSTAP_SRC_BASE}/ap/p2p_hostapd.c - ${HOSTAP_SRC_BASE}/common/gas.c - ${WIFI_NM_WPA_SUPPLICANT_BASE}/gas_query.c - ${WIFI_NM_WPA_SUPPLICANT_BASE}/offchannel.c + ${WIFI_NM_WPA_SUPPLICANT_BASE}/p2p_supplicant.c + ${WIFI_NM_WPA_SUPPLICANT_BASE}/p2p_supplicant_sd.c + ${HOSTAP_SRC_BASE}/p2p/p2p.c + ${HOSTAP_SRC_BASE}/p2p/p2p_utils.c + ${HOSTAP_SRC_BASE}/p2p/p2p_parse.c + ${HOSTAP_SRC_BASE}/p2p/p2p_build.c + ${HOSTAP_SRC_BASE}/p2p/p2p_go_neg.c + ${HOSTAP_SRC_BASE}/p2p/p2p_sd.c + ${HOSTAP_SRC_BASE}/p2p/p2p_pd.c + ${HOSTAP_SRC_BASE}/p2p/p2p_invitation.c + ${HOSTAP_SRC_BASE}/p2p/p2p_dev_disc.c + ${HOSTAP_SRC_BASE}/p2p/p2p_group.c + ${HOSTAP_SRC_BASE}/ap/p2p_hostapd.c + ${HOSTAP_SRC_BASE}/common/gas.c + ${WIFI_NM_WPA_SUPPLICANT_BASE}/gas_query.c + ${WIFI_NM_WPA_SUPPLICANT_BASE}/offchannel.c ) zephyr_library_sources_ifdef(CONFIG_WIFI_NM_WPA_SUPPLICANT_WPS - ${WIFI_NM_WPA_SUPPLICANT_BASE}/wps_supplicant.c - ${HOSTAP_SRC_BASE}/utils/uuid.c - ${HOSTAP_SRC_BASE}/eap_peer/eap_wsc.c - ${HOSTAP_SRC_BASE}/eap_common/eap_wsc_common.c - ${HOSTAP_SRC_BASE}/wps/wps.c - ${HOSTAP_SRC_BASE}/ap/wps_hostapd.c - ${HOSTAP_SRC_BASE}/wps/wps_common.c - ${HOSTAP_SRC_BASE}/wps/wps_attr_parse.c - ${HOSTAP_SRC_BASE}/wps/wps_attr_build.c - ${HOSTAP_SRC_BASE}/wps/wps_attr_process.c - ${HOSTAP_SRC_BASE}/wps/wps_dev_attr.c - ${HOSTAP_SRC_BASE}/wps/wps_enrollee.c - ${HOSTAP_SRC_BASE}/wps/wps_registrar.c - ${HOSTAP_SRC_BASE}/crypto/dh_groups.c + ${WIFI_NM_WPA_SUPPLICANT_BASE}/wps_supplicant.c + ${HOSTAP_SRC_BASE}/utils/uuid.c + ${HOSTAP_SRC_BASE}/eap_peer/eap_wsc.c + ${HOSTAP_SRC_BASE}/eap_common/eap_wsc_common.c + ${HOSTAP_SRC_BASE}/wps/wps.c + ${HOSTAP_SRC_BASE}/ap/wps_hostapd.c + ${HOSTAP_SRC_BASE}/wps/wps_common.c + ${HOSTAP_SRC_BASE}/wps/wps_attr_parse.c + ${HOSTAP_SRC_BASE}/wps/wps_attr_build.c + ${HOSTAP_SRC_BASE}/wps/wps_attr_process.c + ${HOSTAP_SRC_BASE}/wps/wps_dev_attr.c + ${HOSTAP_SRC_BASE}/wps/wps_enrollee.c + ${HOSTAP_SRC_BASE}/wps/wps_registrar.c + ${HOSTAP_SRC_BASE}/crypto/dh_groups.c ) if(NOT CONFIG_WIFI_NM_WPA_SUPPLICANT_CRYPTO_ALT) # dh_group5 is only needed if we are not using mbedtls, as mbedtls provides # its own definition zephyr_library_sources_ifdef(CONFIG_WIFI_NM_WPA_SUPPLICANT_WPS - ${HOSTAP_SRC_BASE}/crypto/dh_group5.c + ${HOSTAP_SRC_BASE}/crypto/dh_group5.c ) endif() zephyr_library_compile_definitions_ifdef(CONFIG_WIFI_NM_WPA_SUPPLICANT_P2P - CONFIG_P2P - CONFIG_GAS - CONFIG_OFFCHANNEL + CONFIG_P2P + CONFIG_GAS + CONFIG_OFFCHANNEL ) zephyr_library_compile_definitions_ifdef(CONFIG_WIFI_NM_WPA_SUPPLICANT_WPS - CONFIG_WPS - EAP_WSC + CONFIG_WPS + EAP_WSC +) + +zephyr_library_sources_ifdef(CONFIG_WIFI_NM_HOSTAPD_WPS + ${HOSTAP_SRC_BASE}/eap_server/eap_server_wsc.c +) + +zephyr_library_compile_definitions_ifdef(CONFIG_WIFI_NM_HOSTAPD_WPS + EAP_SERVER_WSC ) zephyr_library_sources_ifdef(CONFIG_WIFI_NM_WPA_SUPPLICANT_CRYPTO_ENTERPRISE - ${HOSTAP_SRC_BASE}/eap_common/eap_common.c + ${HOSTAP_SRC_BASE}/eap_common/eap_common.c ) zephyr_library_compile_definitions_ifdef(CONFIG_WIFI_NM_WPA_SUPPLICANT_CRYPTO_ENTERPRISE - IEEE8021X_EAPOL - EAP_IKEv2 + IEEE8021X_EAPOL + EAP_IKEv2 ) zephyr_library_sources_ifdef(CONFIG_EAP_TLS - ${HOSTAP_SRC_BASE}/eap_peer/eap_tls.c - ${HOSTAP_SRC_BASE}/eap_peer/eap_tls_common.c + ${HOSTAP_SRC_BASE}/eap_peer/eap_tls.c + ${HOSTAP_SRC_BASE}/eap_peer/eap_tls_common.c ) zephyr_library_compile_definitions_ifdef(CONFIG_EAP_TLS - EAP_TLS + EAP_TLS ) zephyr_library_sources_ifdef(CONFIG_EAP_TTLS - ${HOSTAP_SRC_BASE}/eap_peer/eap_ttls.c + ${HOSTAP_SRC_BASE}/eap_peer/eap_ttls.c ) zephyr_library_compile_definitions_ifdef(CONFIG_EAP_TTLS - EAP_TTLS + EAP_TTLS ) zephyr_library_sources_ifdef(CONFIG_EAP_PEAP - ${HOSTAP_SRC_BASE}/eap_peer/eap_peap.c - ${HOSTAP_SRC_BASE}/eap_common/eap_peap_common.c + ${HOSTAP_SRC_BASE}/eap_peer/eap_peap.c + ${HOSTAP_SRC_BASE}/eap_common/eap_peap_common.c ) zephyr_library_compile_definitions_ifdef(CONFIG_EAP_PEAP - EAP_PEAP + EAP_PEAP ) zephyr_library_sources_ifdef(CONFIG_EAP_MD5 - ${HOSTAP_SRC_BASE}/eap_peer/eap_md5.c + ${HOSTAP_SRC_BASE}/eap_peer/eap_md5.c ) zephyr_library_compile_definitions_ifdef(CONFIG_EAP_MD5 - EAP_MD5 + EAP_MD5 ) zephyr_library_sources_ifdef(CONFIG_EAP_GTC - ${HOSTAP_SRC_BASE}/eap_peer/eap_gtc.c + ${HOSTAP_SRC_BASE}/eap_peer/eap_gtc.c ) zephyr_library_compile_definitions_ifdef(CONFIG_EAP_GTC - EAP_GTC + EAP_GTC ) zephyr_library_sources_ifdef(CONFIG_EAP_MSCHAPV2 - ${HOSTAP_SRC_BASE}/eap_peer/eap_mschapv2.c - ${HOSTAP_SRC_BASE}/eap_peer/mschapv2.c - ${HOSTAP_SRC_BASE}/eap_common/chap.c + ${HOSTAP_SRC_BASE}/eap_peer/eap_mschapv2.c + ${HOSTAP_SRC_BASE}/eap_peer/mschapv2.c + ${HOSTAP_SRC_BASE}/eap_common/chap.c ) zephyr_library_compile_definitions_ifdef(CONFIG_EAP_MSCHAPV2 - EAP_MSCHAPv2 + EAP_MSCHAPv2 ) zephyr_library_sources_ifdef(CONFIG_EAP_LEAP - ${HOSTAP_SRC_BASE}/eap_peer/eap_leap.c + ${HOSTAP_SRC_BASE}/eap_peer/eap_leap.c ) zephyr_library_compile_definitions_ifdef(CONFIG_EAP_LEAP - EAP_LEAP + EAP_LEAP ) zephyr_library_sources_ifdef(CONFIG_EAP_PSK - ${HOSTAP_SRC_BASE}/eap_peer/eap_psk.c - ${HOSTAP_SRC_BASE}/eap_common/eap_psk_common.c + ${HOSTAP_SRC_BASE}/eap_peer/eap_psk.c + ${HOSTAP_SRC_BASE}/eap_common/eap_psk_common.c ) zephyr_library_compile_definitions_ifdef(CONFIG_EAP_PSK - EAP_PSK + EAP_PSK ) zephyr_library_sources_ifdef(CONFIG_EAP_PAX - ${HOSTAP_SRC_BASE}/eap_peer/eap_pax.c - ${HOSTAP_SRC_BASE}/eap_common/eap_pax_common.c + ${HOSTAP_SRC_BASE}/eap_peer/eap_pax.c + ${HOSTAP_SRC_BASE}/eap_common/eap_pax_common.c ) zephyr_library_compile_definitions_ifdef(CONFIG_EAP_PAX - EAP_PAX + EAP_PAX ) zephyr_library_sources_ifdef(CONFIG_EAP_SAKE - ${HOSTAP_SRC_BASE}/eap_peer/eap_sake.c - ${HOSTAP_SRC_BASE}/eap_common/eap_sake_common.c + ${HOSTAP_SRC_BASE}/eap_peer/eap_sake.c + ${HOSTAP_SRC_BASE}/eap_common/eap_sake_common.c ) zephyr_library_compile_definitions_ifdef(CONFIG_EAP_SAKE - EAP_SAKE + EAP_SAKE ) zephyr_library_sources_ifdef(CONFIG_EAP_GPSK - ${HOSTAP_SRC_BASE}/eap_peer/eap_gpsk.c - ${HOSTAP_SRC_BASE}/eap_common/eap_gpsk_common.c + ${HOSTAP_SRC_BASE}/eap_peer/eap_gpsk.c + ${HOSTAP_SRC_BASE}/eap_common/eap_gpsk_common.c ) zephyr_library_compile_definitions_ifdef(CONFIG_EAP_GPSK - EAP_GPSK + EAP_GPSK ) zephyr_library_sources_ifdef(CONFIG_EAP_PWD - ${HOSTAP_SRC_BASE}/eap_peer/eap_pwd.c - ${HOSTAP_SRC_BASE}/eap_common/eap_pwd_common.c + ${HOSTAP_SRC_BASE}/eap_peer/eap_pwd.c + ${HOSTAP_SRC_BASE}/eap_common/eap_pwd_common.c ) zephyr_library_compile_definitions_ifdef(CONFIG_EAP_PWD - EAP_PWD + EAP_PWD ) zephyr_library_sources_ifdef(CONFIG_EAP_EKE - ${HOSTAP_SRC_BASE}/eap_peer/eap_eke.c - ${HOSTAP_SRC_BASE}/eap_common/eap_eke_common.c + ${HOSTAP_SRC_BASE}/eap_peer/eap_eke.c + ${HOSTAP_SRC_BASE}/eap_common/eap_eke_common.c ) zephyr_library_compile_definitions_ifdef(CONFIG_EAP_EKE - EAP_EKE + EAP_EKE ) zephyr_library_sources_ifdef(CONFIG_EAP_IKEV2 - ${HOSTAP_SRC_BASE}/eap_peer/eap_ikev2.c - ${HOSTAP_SRC_BASE}/eap_peer/ikev2.c - ${HOSTAP_SRC_BASE}/eap_common/eap_ikev2_common.c - ${HOSTAP_SRC_BASE}/eap_common/ikev2_common.c + ${HOSTAP_SRC_BASE}/eap_peer/eap_ikev2.c + ${HOSTAP_SRC_BASE}/eap_peer/ikev2.c + ${HOSTAP_SRC_BASE}/eap_common/eap_ikev2_common.c + ${HOSTAP_SRC_BASE}/eap_common/ikev2_common.c ) zephyr_library_compile_definitions_ifdef(CONFIG_EAP_IKEV2 - EAP_IKEV2 + EAP_IKEV2 ) zephyr_library_sources_ifdef(CONFIG_EAP_SIM - ${HOSTAP_SRC_BASE}/eap_peer/eap_sim.c - ${HOSTAP_SRC_BASE}/eap_common/eap_sim_common.c + ${HOSTAP_SRC_BASE}/eap_peer/eap_sim.c + ${HOSTAP_SRC_BASE}/eap_common/eap_sim_common.c ) zephyr_library_compile_definitions_ifdef(CONFIG_EAP_SIM - EAP_SIM + EAP_SIM ) zephyr_library_sources_ifdef(CONFIG_EAP_AKA - ${HOSTAP_SRC_BASE}/eap_peer/eap_aka.c + ${HOSTAP_SRC_BASE}/eap_peer/eap_aka.c ) zephyr_library_compile_definitions_ifdef(CONFIG_EAP_AKA - EAP_AKA + EAP_AKA ) # Needs TLS1.3 and SESSION_TICKETS @@ -539,137 +552,200 @@ zephyr_library_compile_definitions_ifdef(CONFIG_EAP_FAST ) zephyr_library_compile_definitions_ifndef(CONFIG_WIFI_NM_WPA_SUPPLICANT_CRYPTO_ENTERPRISE - CONFIG_NO_CONFIG_BLOBS + CONFIG_NO_CONFIG_BLOBS ) zephyr_library_sources_ifdef(CONFIG_WIFI_NM_WPA_SUPPLICANT_EAPOL - ${HOSTAP_SRC_BASE}/eapol_supp/eapol_supp_sm.c - ${HOSTAP_SRC_BASE}/eap_peer/eap.c - ${HOSTAP_SRC_BASE}/eap_peer/eap_methods.c - ${HOSTAP_SRC_BASE}/eap_common/eap_common.c - ${HOSTAP_SRC_BASE}/rsn_supp/pmksa_cache.c + ${HOSTAP_SRC_BASE}/eapol_supp/eapol_supp_sm.c + ${HOSTAP_SRC_BASE}/eap_peer/eap.c + ${HOSTAP_SRC_BASE}/eap_peer/eap_methods.c + ${HOSTAP_SRC_BASE}/eap_common/eap_common.c + ${HOSTAP_SRC_BASE}/rsn_supp/pmksa_cache.c ) zephyr_library_compile_definitions_ifdef(CONFIG_WIFI_NM_WPA_SUPPLICANT_EAPOL - IEEE8021X_EAPOL + IEEE8021X_EAPOL ) zephyr_library_compile_definitions_ifdef(CONFIG_WIFI_NM_WPA_SUPPLICANT_NW_SEL_RELIABILITY - CONFIG_NW_SEL_RELIABILITY + CONFIG_NW_SEL_RELIABILITY ) zephyr_library_sources_ifdef(CONFIG_WIFI_NM_WPA_SUPPLICANT_DPP - ${WIFI_NM_WPA_SUPPLICANT_BASE}/dpp_supplicant.c - ${WIFI_NM_WPA_SUPPLICANT_BASE}/offchannel.c - ${WIFI_NM_WPA_SUPPLICANT_BASE}/gas_query.c + ${WIFI_NM_WPA_SUPPLICANT_BASE}/dpp_supplicant.c + ${WIFI_NM_WPA_SUPPLICANT_BASE}/offchannel.c + ${WIFI_NM_WPA_SUPPLICANT_BASE}/gas_query.c + + ${HOSTAP_SRC_BASE}/ap/dpp_hostapd.c + ${HOSTAP_SRC_BASE}/ap/gas_query_ap.c + ${HOSTAP_SRC_BASE}/ap/gas_serv.c + + ${HOSTAP_SRC_BASE}/common/dpp_tcp.c + ${HOSTAP_SRC_BASE}/common/dpp.c + ${HOSTAP_SRC_BASE}/common/dpp_pkex.c + ${HOSTAP_SRC_BASE}/common/dpp_crypto.c + ${HOSTAP_SRC_BASE}/common/dpp_auth.c + ${HOSTAP_SRC_BASE}/common/dpp_reconfig.c + ${HOSTAP_SRC_BASE}/common/gas_server.c + ${HOSTAP_SRC_BASE}/common/gas.c + ${HOSTAP_SRC_BASE}/common/dpp_backup.c + + ${HOSTAP_SRC_BASE}/crypto/aes-siv.c + + ${HOSTAP_SRC_BASE}/utils/json.c + ${HOSTAP_SRC_BASE}/utils/ip_addr.c + + ${HOSTAP_SRC_BASE}/tls/asn1.c +) + +zephyr_library_sources_ifdef(CONFIG_WIFI_NM_HOSTAPD_CRYPTO_ENTERPRISE + ${HOSTAP_SRC_BASE}/eap_server/eap_server_tls_common.c +) + +zephyr_library_compile_definitions_ifdef(CONFIG_WIFI_NM_HOSTAPD_CRYPTO_ENTERPRISE + WIFI_NM_HOSTAPD_CRYPTO_ENTERPRISE + EAP_TLS_FUNCS + EAP_SERVER +) + +zephyr_library_sources_ifdef(CONFIG_EAP_SERVER_IDENTITY + ${HOSTAP_SRC_BASE}/eap_server/eap_server_identity.c +) - ${HOSTAP_SRC_BASE}/ap/dpp_hostapd.c - ${HOSTAP_SRC_BASE}/ap/gas_query_ap.c - ${HOSTAP_SRC_BASE}/ap/gas_serv.c +zephyr_library_compile_definitions_ifdef(CONFIG_EAP_SERVER_IDENTITY + EAP_SERVER_IDENTITY +) + + +zephyr_library_sources_ifdef(CONFIG_EAP_SERVER_TLS + ${HOSTAP_SRC_BASE}/eap_server/eap_server_tls.c +) + +zephyr_library_compile_definitions_ifdef(CONFIG_EAP_SERVER_TLS + EAP_SERVER_TLS +) + +zephyr_library_sources_ifdef(CONFIG_EAP_SERVER_MD5 + ${HOSTAP_SRC_BASE}/eap_server/eap_server_md5.c +) + +zephyr_library_compile_definitions_ifdef(CONFIG_EAP_SERVER_MD5 + EAP_SERVER_MD5 +) + +zephyr_library_sources_ifdef(CONFIG_EAP_SERVER_MSCHAPV2 + ${HOSTAP_SRC_BASE}/eap_server/eap_server_mschapv2.c +) - ${HOSTAP_SRC_BASE}/common/dpp_tcp.c - ${HOSTAP_SRC_BASE}/common/dpp.c - ${HOSTAP_SRC_BASE}/common/dpp_pkex.c - ${HOSTAP_SRC_BASE}/common/dpp_crypto.c - ${HOSTAP_SRC_BASE}/common/dpp_auth.c - ${HOSTAP_SRC_BASE}/common/dpp_reconfig.c - ${HOSTAP_SRC_BASE}/common/gas_server.c - ${HOSTAP_SRC_BASE}/common/gas.c - ${HOSTAP_SRC_BASE}/common/dpp_backup.c +zephyr_library_compile_definitions_ifdef(CONFIG_EAP_SERVER_MSCHAPV2 + EAP_SERVER_MSCHAPV2 +) + +zephyr_library_sources_ifdef(CONFIG_EAP_SERVER_PEAP + ${HOSTAP_SRC_BASE}/eap_server/eap_server_peap.c +) + +zephyr_library_compile_definitions_ifdef(CONFIG_EAP_SERVER_PEAP + EAP_SERVER_PEAP +) + +zephyr_library_sources_ifdef(CONFIG_EAP_SERVER_GTC + ${HOSTAP_SRC_BASE}/eap_server/eap_server_gtc.c +) - ${HOSTAP_SRC_BASE}/crypto/aes-siv.c +zephyr_library_compile_definitions_ifdef(CONFIG_EAP_SERVER_GTC + EAP_SERVER_GTC +) - ${HOSTAP_SRC_BASE}/utils/json.c - ${HOSTAP_SRC_BASE}/utils/ip_addr.c +zephyr_library_sources_ifdef(CONFIG_EAP_SERVER_TTLS + ${HOSTAP_SRC_BASE}/eap_server/eap_server_ttls.c +) - ${HOSTAP_SRC_BASE}/tls/asn1.c +zephyr_library_compile_definitions_ifdef(CONFIGEAP_SERVER_TTLS + EAP_SERVER_TTLS ) # crypto mbedtls related if(CONFIG_WIFI_NM_WPA_SUPPLICANT_CRYPTO) zephyr_library_sources( - ${HOSTAP_SRC_BASE}/crypto/crypto_mbedtls-bignum.c - ${HOSTAP_SRC_BASE}/crypto/crypto_mbedtls-ec.c - ${HOSTAP_SRC_BASE}/crypto/crypto_mbedtls.c - ${HOSTAP_SRC_BASE}/crypto/aes-internal.c - ${HOSTAP_SRC_BASE}/crypto/aes-wrap.c - ${HOSTAP_SRC_BASE}/crypto/aes-unwrap.c - ${HOSTAP_SRC_BASE}/crypto/rc4.c - ${HOSTAP_SRC_BASE}/crypto/sha1-internal.c - ${HOSTAP_SRC_BASE}/crypto/sha1-prf.c - ${HOSTAP_SRC_BASE}/crypto/sha1-tlsprf.c - ${HOSTAP_SRC_BASE}/crypto/sha256-prf.c - ${HOSTAP_SRC_BASE}/crypto/sha256-kdf.c - ${HOSTAP_SRC_BASE}/crypto/sha384-prf.c - ${HOSTAP_SRC_BASE}/crypto/sha384-kdf.c - ${HOSTAP_SRC_BASE}/crypto/sha512-internal.c - ${HOSTAP_SRC_BASE}/crypto/sha512.c - ${HOSTAP_SRC_BASE}/crypto/sha512-prf.c - ${HOSTAP_SRC_BASE}/crypto/sha512-kdf.c + ${HOSTAP_SRC_BASE}/crypto/crypto_mbedtls-bignum.c + ${HOSTAP_SRC_BASE}/crypto/crypto_mbedtls-ec.c + ${HOSTAP_SRC_BASE}/crypto/crypto_mbedtls.c + ${HOSTAP_SRC_BASE}/crypto/aes-internal.c + ${HOSTAP_SRC_BASE}/crypto/aes-wrap.c + ${HOSTAP_SRC_BASE}/crypto/aes-unwrap.c + ${HOSTAP_SRC_BASE}/crypto/rc4.c + ${HOSTAP_SRC_BASE}/crypto/sha1-internal.c + ${HOSTAP_SRC_BASE}/crypto/sha1-prf.c + ${HOSTAP_SRC_BASE}/crypto/sha1-tlsprf.c + ${HOSTAP_SRC_BASE}/crypto/sha256-prf.c + ${HOSTAP_SRC_BASE}/crypto/sha256-kdf.c + ${HOSTAP_SRC_BASE}/crypto/sha384-prf.c + ${HOSTAP_SRC_BASE}/crypto/sha384-kdf.c + ${HOSTAP_SRC_BASE}/crypto/sha512-internal.c + ${HOSTAP_SRC_BASE}/crypto/sha512.c + ${HOSTAP_SRC_BASE}/crypto/sha512-prf.c + ${HOSTAP_SRC_BASE}/crypto/sha512-kdf.c ) zephyr_library_sources_ifdef(CONFIG_WIFI_NM_WPA_SUPPLICANT_WPA3 - ${HOSTAP_SRC_BASE}/crypto/sha256-kdf.c -) - -zephyr_library_sources_ifndef(CONFIG_WIFI_NM_WPA_SUPPLICANT_CRYPTO_ENTERPRISE - ${HOSTAP_SRC_BASE}/crypto/tls_none.c + ${HOSTAP_SRC_BASE}/crypto/sha256-kdf.c ) zephyr_library_sources_ifdef(CONFIG_WIFI_NM_WPA_SUPPLICANT_CRYPTO_ENTERPRISE - # common - ${HOSTAP_SRC_BASE}/crypto/sha384-tlsprf.c - ${HOSTAP_SRC_BASE}/crypto/sha256-tlsprf.c - ${HOSTAP_SRC_BASE}/crypto/sha1-tlsprf.c - ${HOSTAP_SRC_BASE}/crypto/sha1-tprf.c - ${HOSTAP_SRC_BASE}/crypto/ms_funcs.c - ${HOSTAP_SRC_BASE}/crypto/aes-eax.c - # MD4 removed from MbedTLS - ${HOSTAP_SRC_BASE}/crypto/md4-internal.c - ${HOSTAP_SRC_BASE}/crypto/aes-encblock.c - ${HOSTAP_SRC_BASE}/crypto/tls_mbedtls.c + # common + ${HOSTAP_SRC_BASE}/crypto/sha384-tlsprf.c + ${HOSTAP_SRC_BASE}/crypto/sha256-tlsprf.c + ${HOSTAP_SRC_BASE}/crypto/sha1-tlsprf.c + ${HOSTAP_SRC_BASE}/crypto/sha1-tprf.c + ${HOSTAP_SRC_BASE}/crypto/ms_funcs.c + ${HOSTAP_SRC_BASE}/crypto/aes-eax.c + # MD4 removed from MbedTLS + ${HOSTAP_SRC_BASE}/crypto/md4-internal.c + ${HOSTAP_SRC_BASE}/crypto/aes-encblock.c + ${HOSTAP_SRC_BASE}/crypto/tls_mbedtls.c ) endif() if(CONFIG_WIFI_NM_WPA_SUPPLICANT_CRYPTO_ALT) zephyr_include_directories( - ${HOSTAP_BASE}/port/mbedtls + ${HOSTAP_BASE}/port/mbedtls ) zephyr_library_sources( - ${HOSTAP_SRC_BASE}/crypto/crypto_mbedtls_alt.c - ${HOSTAP_SRC_BASE}/crypto/tls_mbedtls_alt.c - ${HOSTAP_SRC_BASE}/crypto/rc4.c + ${HOSTAP_SRC_BASE}/crypto/crypto_mbedtls_alt.c + ${HOSTAP_SRC_BASE}/crypto/rc4.c ) zephyr_library_sources_ifdef(CONFIG_WIFI_NM_WPA_SUPPLICANT_CRYPTO_MBEDTLS_PSA - ${HOSTAP_BASE}/port/mbedtls/supp_psa_api.c + ${HOSTAP_BASE}/port/mbedtls/supp_psa_api.c ) zephyr_library_sources_ifdef(CONFIG_WIFI_NM_WPA_SUPPLICANT_CRYPTO_ENTERPRISE - ${HOSTAP_SRC_BASE}/crypto/ms_funcs.c - ${HOSTAP_SRC_BASE}/crypto/aes-eax.c - ${HOSTAP_SRC_BASE}/crypto/md4-internal.c - ${HOSTAP_SRC_BASE}/crypto/sha1-internal.c - ${HOSTAP_SRC_BASE}/crypto/fips_prf_internal.c - ${HOSTAP_SRC_BASE}/crypto/milenage.c + ${HOSTAP_SRC_BASE}/crypto/ms_funcs.c + ${HOSTAP_SRC_BASE}/crypto/aes-eax.c + ${HOSTAP_SRC_BASE}/crypto/md4-internal.c + ${HOSTAP_SRC_BASE}/crypto/sha1-internal.c + ${HOSTAP_SRC_BASE}/crypto/fips_prf_internal.c + ${HOSTAP_SRC_BASE}/crypto/milenage.c + ${HOSTAP_SRC_BASE}/crypto/tls_mbedtls_alt.c ) zephyr_library_sources_ifdef(CONFIG_WIFI_NM_WPA_SUPPLICANT_CRYPTO_TEST - ${HOSTAP_SRC_BASE}/crypto/crypto_module_tests.c - ${HOSTAP_SRC_BASE}/crypto/fips_prf_internal.c - ${HOSTAP_SRC_BASE}/crypto/sha1-internal.c - ${HOSTAP_SRC_BASE}/crypto/sha1-tlsprf.c + ${HOSTAP_SRC_BASE}/crypto/crypto_module_tests.c + ${HOSTAP_SRC_BASE}/crypto/fips_prf_internal.c + ${HOSTAP_SRC_BASE}/crypto/sha1-internal.c + ${HOSTAP_SRC_BASE}/crypto/sha1-tlsprf.c ) endif() zephyr_library_link_libraries_ifndef(CONFIG_WIFI_NM_WPA_SUPPLICANT_CRYPTO_NONE - mbedTLS) + mbedTLS) if(CONFIG_SAE_PWE_EARLY_EXIT) - message(WARNING "CONFIG_SAE_PWE_EARLY_EXIT is enabled, " - "this is not secure and is a workaround for low resource systems, " - "please use it carefully and do not use it production.") + message(WARNING "CONFIG_SAE_PWE_EARLY_EXIT is enabled, " + "this is not secure and is a workaround for low resource systems, " + "please use it carefully and do not use it production.") endif() endif() diff --git a/modules/hostap/Kconfig b/modules/hostap/Kconfig index 5a29c454010775d..6470c5134abd061 100644 --- a/modules/hostap/Kconfig +++ b/modules/hostap/Kconfig @@ -25,7 +25,7 @@ if WIFI_NM_WPA_SUPPLICANT config HEAP_MEM_POOL_ADD_SIZE_HOSTAP def_int 85000 if WIFI_NM_WPA_SUPPLICANT_CRYPTO_ENTERPRISE && !MBEDTLS_ENABLE_HEAP - def_int 40000 if WIFI_NM_WPA_SUPPLICANT_AP + def_int 40000 if WIFI_NM_WPA_SUPPLICANT_AP || WIFI_NM_HOSTAPD_AP # 8192 for MbedTLS heap def_int 21808 if MBEDTLS_ENABLE_HEAP # 30K is mandatory, but might need more for long duration use cases @@ -159,9 +159,6 @@ config WIFI_NM_WPA_SUPPLICANT_CRYPTO_ALT select MBEDTLS_NIST_KW_C select MBEDTLS_DHM_C select MBEDTLS_HKDF_C - select MBEDTLS_SERVER_NAME_INDICATION - select MBEDTLS_X509_CRL_PARSE_C - select MBEDTLS_TLS_VERSION_1_2 config WIFI_NM_WPA_SUPPLICANT_CRYPTO_NONE bool "No Crypto support for WiFi" @@ -184,6 +181,9 @@ config WIFI_NM_WPA_SUPPLICANT_CRYPTO_MBEDTLS_PSA config WIFI_NM_WPA_SUPPLICANT_CRYPTO_ENTERPRISE bool "Enterprise Crypto support for WiFi" select MBEDTLS_PEM_CERTIFICATE_FORMAT + select MBEDTLS_SERVER_NAME_INDICATION + select MBEDTLS_X509_CRL_PARSE_C + select MBEDTLS_TLS_VERSION_1_2 depends on !WIFI_NM_WPA_SUPPLICANT_CRYPTO_NONE config EAP_TLS @@ -251,6 +251,11 @@ config WIFI_NM_WPA_SUPPLICANT_WPS bool "WPS support" depends on !WIFI_NM_WPA_SUPPLICANT_CRYPTO_NONE +config WIFI_NM_HOSTAPD_WPS + bool "WPS hostapd support" + depends on !WIFI_NM_WPA_SUPPLICANT_CRYPTO_NONE + depends on WIFI_NM_HOSTAPD_AP + config WIFI_NM_WPA_SUPPLICANT_P2P bool "P2P mode support" select WIFI_NM_WPA_SUPPLICANT_AP @@ -273,6 +278,35 @@ config WIFI_NM_HOSTAPD_AP bool "FullAP mode support based on Hostapd" depends on !WIFI_NM_WPA_SUPPLICANT_INF_MON +config WIFI_NM_HOSTAPD_CRYPTO_ENTERPRISE + bool "Hostapd crypto enterprise support" + +config EAP_SERVER_TLS + bool "EAP-TLS server support" + +config EAP_SERVER_IDENTITY + bool "EAP-IDENTITY server support" + +config EAP_SERVER_MD5 + bool "EAP-MD5 server support" + +config EAP_SERVER_MSCHAPV2 + bool "EAP-MSCHAPV2 server support" + +config EAP_SERVER_PEAP + bool "EAP-PEAP server support" + +config EAP_SERVER_GTC + bool "EAP-GTC server support" + +config EAP_SERVER_TTLS + bool "EAP-TTLS server support" + +config EAP_SERVER_ALL + bool "All EAP methods support" + select EAP_SERVER_TLS + default y if WIFI_NM_HOSTAPD_CRYPTO_ENTERPRISE + config WIFI_NM_WPA_SUPPLICANT_BSS_MAX_IDLE_TIME int "BSS max idle timeout in seconds" range 0 64000 @@ -383,8 +417,8 @@ config TESTING_OPTIONS config AP bool - depends on WIFI_NM_WPA_SUPPLICANT_AP - default y if WIFI_NM_WPA_SUPPLICANT_AP + depends on WIFI_NM_WPA_SUPPLICANT_AP || WIFI_NM_HOSTAPD_AP + default y if WIFI_NM_WPA_SUPPLICANT_AP || WIFI_NM_HOSTAPD_AP config NO_RADIUS bool diff --git a/modules/hostap/src/supp_api.c b/modules/hostap/src/supp_api.c index e8209b8cd089ea1..13155af5cf3b228 100644 --- a/modules/hostap/src/supp_api.c +++ b/modules/hostap/src/supp_api.c @@ -394,24 +394,6 @@ static inline enum wifi_security_type wpas_key_mgmt_to_zephyr(int key_mgmt, int } #ifdef CONFIG_WIFI_NM_WPA_SUPPLICANT_CRYPTO_ENTERPRISE -int supplicant_add_enterprise_creds(const struct device *dev, - struct wifi_enterprise_creds_params *creds) -{ - int ret = 0; - - if (!creds) { - ret = -1; - wpa_printf(MSG_ERROR, "enterprise creds is NULL"); - goto out; - } - - memcpy((void *)&enterprise_creds, (void *)creds, - sizeof(struct wifi_enterprise_creds_params)); - -out: - return ret; -} - static int wpas_config_process_blob(struct wpa_config *config, char *name, uint8_t *data, uint32_t data_len) { @@ -446,6 +428,27 @@ static int wpas_config_process_blob(struct wpa_config *config, char *name, uint8 return 0; } +#endif + +#if defined CONFIG_WIFI_NM_WPA_SUPPLICANT_CRYPTO_ENTERPRISE || \ + defined CONFIG_WIFI_NM_HOSTAPD_CRYPTO_ENTERPRISE +int supplicant_add_enterprise_creds(const struct device *dev, + struct wifi_enterprise_creds_params *creds) +{ + int ret = 0; + + if (!creds) { + ret = -1; + wpa_printf(MSG_ERROR, "enterprise creds is NULL"); + goto out; + } + + memcpy((void *)&enterprise_creds, (void *)creds, + sizeof(struct wifi_enterprise_creds_params)); + +out: + return ret; +} static const struct wifi_cipher_desc ciphers[] = { {WPA_CAPA_ENC_GCMP_256, "GCMP-256"}, @@ -550,6 +553,276 @@ static int is_eap_valid_security(int security) } #endif +#ifdef CONFIG_WIFI_NM_HOSTAPD_CRYPTO_ENTERPRISE +static int hapd_process_cert_data(struct hostapd_bss_config *conf, + char *type, uint8_t *data, uint32_t data_len) +{ + if (os_strcmp(type, "ca_cert_blob") == 0) { + conf->ca_cert_blob = data; + conf->ca_cert_blob_len = data_len; + } else if (os_strcmp(type, "server_cert_blob") == 0) { + conf->server_cert_blob = data; + conf->server_cert_blob_len = data_len; + } else if (os_strcmp(type, "private_key_blob") == 0) { + conf->private_key_blob = data; + conf->private_key_blob_len = data_len; + } else if (os_strcmp(type, "dh_blob") == 0) { + conf->dh_blob = data; + conf->dh_blob_len = data_len; + } else { + wpa_printf(MSG_ERROR, "input type error"); + return -ENOTSUP; + } + + return 0; +} + +static int hapd_get_eap_config(struct wifi_connect_req_params *params, + struct wifi_eap_config *eap_cfg) +{ + unsigned int index = 0; + + for (index = 0; index < ARRAY_SIZE(eap_config); index++) { + if (params->security == eap_config[index].type) { + memcpy(eap_cfg, &eap_config[index], sizeof(struct wifi_eap_config)); + break; + } + } + + if (index == ARRAY_SIZE(eap_config)) { + wpa_printf(MSG_ERROR, "Get eap method type with security type: %d", + params->security); + return -ENOTSUP; + } + + return 0; +} + +static struct hostapd_eap_user *hostapd_process_eap_user_phase1( + struct wifi_connect_req_params *params, struct hostapd_eap_user **pnew_user) +{ + struct hostapd_eap_user *user = NULL, *tail = NULL, *new_user = NULL; + struct wifi_eap_config eap_cfg; + + user = os_zalloc(sizeof(*user)); + if (user == NULL) { + wpa_printf(MSG_ERROR, "EAP user allocation failed"); + goto failed; + } + + user->force_version = -1; + if (params->eap_ver >= 0) { + user->force_version = params->eap_ver; + } + + if (hapd_get_eap_config(params, &eap_cfg)) { + goto failed; + } + + user->methods[0].method = eap_cfg.eap_type_phase1; + user->methods[0].vendor = 0; + + if (tail == NULL) { + tail = new_user = user; + } else { + tail->next = user; + tail = user; + } + + *pnew_user = new_user; + + return tail; + +failed: + if (user) { + hostapd_config_free_eap_user(user); + } + + return NULL; +} + +static int hostapd_process_eap_user(struct wifi_connect_req_params *params, + struct hostapd_bss_config *conf) +{ + struct hostapd_eap_user *user = NULL, *tail = NULL, *user_list = NULL; + int i, nusers = params->nusers; + const char *identity, *password; + struct wifi_eap_config eap_cfg; + int ret = 0; + + if (hapd_get_eap_config(params, &eap_cfg)) { + goto failed; + } + + if (eap_cfg.phase2 != NULL) { + tail = hostapd_process_eap_user_phase1(params, &user_list); + } + + if (eap_cfg.phase2 != NULL && !nusers) { + wpa_printf(MSG_ERROR, "EAP users not found."); + goto failed; + } + + for (i = 0; i < nusers; i++) { + user = os_zalloc(sizeof(*user)); + if (user == NULL) { + wpa_printf(MSG_ERROR, "EAP user allocation failed"); + goto failed; + } + + user->force_version = -1; + if (params->eap_ver >= 0) { + user->force_version = params->eap_ver; + } + + identity = params->identities[i]; + password = params->passwords[i]; + + user->identity = os_memdup(identity, os_strlen(identity)); + if (user->identity == NULL) { + wpa_printf(MSG_ERROR, + "Failed to allocate " + "memory for EAP identity"); + goto failed; + } + user->identity_len = os_strlen(identity); + + user->methods[0].method = eap_cfg.eap_type_phase1; + user->methods[0].vendor = 0; + + if (eap_cfg.phase2 != NULL) { + user->methods[0].method = eap_cfg.eap_type_phase2; + user->password = os_memdup(password, os_strlen(password)); + if (user->password == NULL) { + wpa_printf(MSG_ERROR, + "Failed to allocate " + "memory for EAP password"); + goto failed; + } + user->password_len = os_strlen(password); + + user->phase2 = 1; + } + + if (params->security == WIFI_SECURITY_TYPE_EAP_TTLS_MSCHAPV2) { + user->ttls_auth |= 0x1E; + } + + if (tail == NULL) { + tail = user_list = user; + } else { + tail->next = user; + tail = user; + } + + continue; + +failed: + if (user) { + hostapd_config_free_eap_user(user); + } + + ret = -1; + break; + } + + if (ret == 0) { + hostapd_config_free_eap_users(conf->eap_user); + conf->eap_user = user_list; + } else { + hostapd_config_free_eap_users(user_list); + } + + return ret; +} + +int hapd_process_enterprise_config(struct hostapd_iface *iface, + struct wifi_connect_req_params *params) +{ + struct wifi_eap_cipher_config cipher_config = { + NULL, "DEFAULT:!EXP:!LOW", "CCMP", "CCMP", "AES-128-CMAC", NULL}; + int ret = 0; + + if (process_cipher_config(params, &cipher_config)) { + goto out; + } + + if (!hostapd_cli_cmd_v("set wpa %d", WPA_PROTO_RSN)) { + goto out; + } + + if (!hostapd_cli_cmd_v("set wpa_key_mgmt %s", cipher_config.key_mgmt)) { + goto out; + } + + if (!hostapd_cli_cmd_v("set rsn_pairwise %s", cipher_config.pairwise_cipher)) { + goto out; + } + + if (!hostapd_cli_cmd_v("set wpa_pairwise %s", cipher_config.pairwise_cipher)) { + goto out; + } + + if (!hostapd_cli_cmd_v("set group_cipher %s", cipher_config.group_cipher)) { + goto out; + } + + if (!hostapd_cli_cmd_v("set group_mgmt_cipher %s", cipher_config.group_mgmt_cipher)) { + goto out; + } + + if (cipher_config.tls_flags != NULL) { + if (!hostapd_cli_cmd_v("set tls_flags %s", cipher_config.tls_flags)) { + goto out; + } + } + + if (!hostapd_cli_cmd_v("set ieee8021x %d", 1)) { + goto out; + } + + if (!hostapd_cli_cmd_v("set eapol_version %d", 2)) { + goto out; + } + + if (!hostapd_cli_cmd_v("set eap_server %d", 1)) { + goto out; + } + + if (hapd_process_cert_data(iface->bss[0]->conf, "ca_cert_blob", + enterprise_creds.ca_cert, enterprise_creds.ca_cert_len)) { + goto out; + } + + if (hapd_process_cert_data(iface->bss[0]->conf, "server_cert_blob", + enterprise_creds.server_cert, enterprise_creds.server_cert_len)) { + goto out; + } + + if (hapd_process_cert_data(iface->bss[0]->conf, "private_key_blob", + enterprise_creds.server_key, enterprise_creds.server_key_len)) { + goto out; + } + + if (hapd_process_cert_data(iface->bss[0]->conf, "dh_blob", + enterprise_creds.dh_param, enterprise_creds.dh_param_len)) { + goto out; + } + + if (!hostapd_cli_cmd_v("set private_key_passwd %s", params->key_passwd)) { + goto out; + } + + if (hostapd_process_eap_user(params, iface->bss[0]->conf)) { + goto out; + } + + return ret; +out: + return -1; +} +#endif + static int wpas_add_and_config_network(struct wpa_supplicant *wpa_s, struct wifi_connect_req_params *params, bool mode_ap) @@ -564,7 +837,7 @@ static int wpas_add_and_config_network(struct wpa_supplicant *wpa_s, #ifdef CONFIG_WIFI_NM_WPA_SUPPLICANT_CRYPTO_ENTERPRISE struct wifi_eap_cipher_config cipher_config = {NULL, "DEFAULT:!EXP:!LOW", "CCMP", "CCMP", "AES-128-CMAC", NULL}; - char *method; + char *method = NULL; char phase1[128] = {0}; char *phase2 = NULL; unsigned int index; @@ -802,8 +1075,11 @@ static int wpas_add_and_config_network(struct wpa_supplicant *wpa_s, goto out; } - if (!wpa_cli_cmd_v("set_network %d eap %s", resp.network_id, method)) { - goto out; + if (method != NULL) { + if (!wpa_cli_cmd_v("set_network %d eap %s", resp.network_id, + method)) { + goto out; + } } if (params->security == WIFI_SECURITY_TYPE_EAP_PEAP_MSCHAPV2 || @@ -1945,6 +2221,12 @@ int hapd_config_network(struct hostapd_iface *iface, if (!hostapd_cli_cmd_v("set dpp_configurator_connectivity 1")) { goto out; } +#ifdef CONFIG_WIFI_NM_HOSTAPD_CRYPTO_ENTERPRISE + } else if (is_eap_valid_security(params->security)) { + if (hapd_process_enterprise_config(iface, params)) { + goto out; + } +#endif } } else { if (!hostapd_cli_cmd_v("set wpa 0")) { @@ -1956,8 +2238,10 @@ int hapd_config_network(struct hostapd_iface *iface, if (!hostapd_cli_cmd_v("set ieee80211w %d", params->mfp)) { goto out; } -out: + return ret; +out: + return -1; } int supplicant_ap_config_params(const struct device *dev, struct wifi_ap_config_params *params) @@ -2086,6 +2370,106 @@ int supplicant_ap_status(const struct device *dev, struct wifi_iface_status *sta } #endif /* CONFIG_WIFI_NM_HOSTAPD_AP */ +#ifdef CONFIG_WIFI_NM_HOSTAPD_WPS +int supplicant_ap_wps_pbc(const struct device *dev) +{ + struct hostapd_iface *iface; + int ret = -1; + + k_mutex_lock(&wpa_supplicant_mutex, K_FOREVER); + + iface = get_hostapd_handle(dev); + if (!iface) { + ret = -1; + wpa_printf(MSG_ERROR, "Interface %s not found", dev->name); + goto out; + } + + if (iface->state != HAPD_IFACE_ENABLED) { + ret = -EBUSY; + wpa_printf(MSG_ERROR, "Interface %s is not in enable state", dev->name); + goto out; + } + + if (!hostapd_cli_cmd_v("wps_pbc")) { + goto out; + } + + wpas_api_ctrl.dev = dev; + wpas_api_ctrl.requested_op = WPS_PBC; + + ret = 0; + +out: + k_mutex_unlock(&wpa_supplicant_mutex); + + return ret; +} + +int supplicant_ap_wps_pin(const struct device *dev, struct wifi_wps_config_params *params) +{ + struct hostapd_iface *iface; + char *get_pin_cmd = "WPS_AP_PIN random"; + int ret = 0; + + k_mutex_lock(&wpa_supplicant_mutex, K_FOREVER); + + iface = get_hostapd_handle(dev); + if (!iface) { + ret = -1; + wpa_printf(MSG_ERROR, "Interface %s not found", dev->name); + goto out; + } + + if (iface->state != HAPD_IFACE_ENABLED) { + ret = -EBUSY; + wpa_printf(MSG_ERROR, "Interface %s is not in enable state", dev->name); + goto out; + } + + if (params->oper == WIFI_WPS_PIN_GET) { + if (zephyr_hostapd_cli_cmd_resp(get_pin_cmd, params->pin)) { + goto out; + } + } else if (params->oper == WIFI_WPS_PIN_SET) { + if (!hostapd_cli_cmd_v("wps_check_pin %s", params->pin)) { + goto out; + } + + if (!hostapd_cli_cmd_v("wps_pin any %s", params->pin)) { + goto out; + } + + wpas_api_ctrl.dev = dev; + wpas_api_ctrl.requested_op = WPS_PIN; + } else { + wpa_printf(MSG_ERROR, "Error wps pin operation : %d", params->oper); + goto out; + } + + ret = 0; + +out: + k_mutex_unlock(&wpa_supplicant_mutex); + + return ret; +} + + +int supplicant_ap_wps_config(const struct device *dev, struct wifi_wps_config_params *params) +{ + int ret = 0; + + if (params->oper == WIFI_WPS_PBC) { + ret = supplicant_ap_wps_pbc(dev); + } else if (params->oper == WIFI_WPS_PIN_GET || params->oper == WIFI_WPS_PIN_SET) { + ret = supplicant_ap_wps_pin(dev, params); + } + + return ret; +} +#endif + int supplicant_ap_enable(const struct device *dev, struct wifi_connect_req_params *params) { diff --git a/modules/hostap/src/supp_api.h b/modules/hostap/src/supp_api.h index 46a1381a28dd4b2..ab1e6c014eb1c5a 100644 --- a/modules/hostap/src/supp_api.h +++ b/modules/hostap/src/supp_api.h @@ -183,7 +183,8 @@ int supplicant_reg_domain(const struct device *dev, struct wifi_reg_domain *reg_ */ int supplicant_mode(const struct device *dev, struct wifi_mode_info *mode); -#ifdef CONFIG_WIFI_NM_WPA_SUPPLICANT_CRYPTO_ENTERPRISE +#if defined CONFIG_WIFI_NM_WPA_SUPPLICANT_CRYPTO_ENTERPRISE || \ + defined CONFIG_WIFI_NM_HOSTAPD_CRYPTO_ENTERPRISE /** Set Wi-Fi enterprise mode CA/client Cert and key * * @param dev Pointer to the device structure for the driver instance @@ -287,6 +288,17 @@ static inline int hapd_state(const struct device *dev, int *state) } #endif +#ifdef CONFIG_WIFI_NM_HOSTAPD_WPS +/** Start AP WPS PBC/PIN + * + * @param dev Pointer to the device structure for the driver instance + * @param params wps operarion parameters + * + * @return 0 if ok, < 0 if error + */ +int supplicant_ap_wps_config(const struct device *dev, struct wifi_wps_config_params *params); +#endif + /** * @brief Get Wi-Fi SAP status * diff --git a/modules/hostap/src/supp_main.c b/modules/hostap/src/supp_main.c index 7840525c3b91588..5ac548034693ed5 100644 --- a/modules/hostap/src/supp_main.c +++ b/modules/hostap/src/supp_main.c @@ -104,10 +104,16 @@ static const struct wifi_mgmt_ops mgmt_ap_ops = { .ap_disable = supplicant_ap_disable, .ap_sta_disconnect = supplicant_ap_sta_disconnect, .iface_status = supplicant_ap_status, +#ifdef CONFIG_WIFI_NM_HOSTAPD_WPS + .wps_config = supplicant_ap_wps_config, +#endif #ifdef CONFIG_WIFI_NM_WPA_SUPPLICANT_DPP .dpp_dispatch = hapd_dpp_dispatch, #endif /* CONFIG_WIFI_NM_WPA_SUPPLICANT_DPP */ .ap_config_params = supplicant_ap_config_params, +#ifdef CONFIG_WIFI_NM_HOSTAPD_CRYPTO_ENTERPRISE + .enterprise_creds = supplicant_add_enterprise_creds, +#endif }; DEFINE_WIFI_NM_INSTANCE(hostapd, &mgmt_ap_ops); diff --git a/modules/lz4/CMakeLists.txt b/modules/lz4/CMakeLists.txt index 9b9a56976ebd1bd..530a601f309c03e 100644 --- a/modules/lz4/CMakeLists.txt +++ b/modules/lz4/CMakeLists.txt @@ -2,15 +2,45 @@ # SPDX-License-Identifier: Apache-2.0 if(CONFIG_LZ4) - set(LZ4_DIR ${ZEPHYR_CURRENT_MODULE_DIR}) zephyr_library() zephyr_include_directories(${LZ4_DIR}/lib) + zephyr_library_compile_definitions_ifdef(CONFIG_LZ4_HEAPMODE_STACK + LZ4_HEAPMODE=0 + ) + + zephyr_library_compile_definitions_ifdef(CONFIG_LZ4_DISABLE_DYNAMIC_MEMORY_ALLOCATION + LZ4_STATIC_LINKING_ONLY_DISABLE_MEMORY_ALLOCATION + ) + + zephyr_library_compile_definitions( + LZ4_MEMORY_USAGE=${CONFIG_LZ4_MEMORY_USAGE} + ) + zephyr_library_sources( ${LZ4_DIR}/lib/lz4.c ) + zephyr_library_sources_ifdef(CONFIG_LZ4_HIGH_COMPRESSION_VARIANT + ${LZ4_DIR}/lib/lz4hc.c + ) + + zephyr_library_compile_definitions_ifdef(CONFIG_LZ4HC_HEAPMODE_STACK + LZ4HC_HEAPMODE=0 + ) + + zephyr_library_sources_ifdef(CONFIG_LZ4_XX_HASH + ${LZ4_DIR}/lib/xxhash.c + ) + + zephyr_library_sources_ifdef(CONFIG_LZ4_FRAME_SUPPORT + ${LZ4_DIR}/lib/lz4frame.c + ) + + zephyr_library_compile_definitions_ifdef(CONFIG_LZ4F_HEAPMODE_HEAP + LZ4F_HEAPMODE=1 + ) endif() diff --git a/modules/lz4/Kconfig b/modules/lz4/Kconfig index a741b3cd14507ed..11507bd46c3bb19 100644 --- a/modules/lz4/Kconfig +++ b/modules/lz4/Kconfig @@ -4,8 +4,99 @@ config ZEPHYR_LZ4_MODULE bool -config LZ4 +menuconfig LZ4 bool "Lz4 data compression and decompression" help This option enables lz4 compression & decompression library support. +if LZ4 + +config LZ4_MEMORY_USAGE + int "Lz4 memory usage" + range 10 20 + default 14 + help + Increasing memory usage improves compression ratio, but usually at the + cost of speed, due to cache locality. Memory usage 2^value (10 -> 1KB, + 12 -> 4KB, 20 -> 1MB). + +config LZ4_DISABLE_DYNAMIC_MEMORY_ALLOCATION + bool "Disable dynamic memory allocation" + help + Disable lz4 functions that use dynamic memory allocation functions. + +choice LZ4_HEAPMODE + prompt "How stateless compression functions allocate memory for their hash table" + default LZ4_HEAPMODE_HEAP + +config LZ4_HEAPMODE_STACK + bool "in memory stack" + help + Allocate memory from stack (fastest). + +config LZ4_HEAPMODE_HEAP + bool "in memory heap" + depends on !LZ4_DISABLE_DYNAMIC_MEMORY_ALLOCATION + help + Allocate memory from heap (requires malloc()). +endchoice + +config LZ4_HIGH_COMPRESSION_VARIANT + bool "Lz4 high compression variant" + help + For more compression ratio at the cost of compression speed, + the High Compression variant called lz4hc is available. This variant + also compresses data using the lz4 block format. + +if LZ4_HIGH_COMPRESSION_VARIANT +choice LZ4HC_HEAPMODE + prompt "How stateless HC compression functions allocate memory for their workspace" + default LZ4HC_HEAPMODE_HEAP + +config LZ4HC_HEAPMODE_STACK + bool "in memory stack" + help + Allocate memory from stack (fastest). + +config LZ4HC_HEAPMODE_HEAP + bool "in memory heap" + depends on !LZ4_DISABLE_DYNAMIC_MEMORY_ALLOCATION + help + Allocate memory from heap (requires malloc()). +endchoice +endif + +config LZ4_XX_HASH + bool "xxHash hashing algorithm" + help + Build xxHash library included in lz4 sources. + +config LZ4_FRAME_SUPPORT + bool "LZ4 frame support" + select LZ4_XX_HASH + select LZ4_HIGH_COMPRESSION_VARIANT + help + In order to produce compressed data compatible with lz4 command line + utility, it's necessary to use the official interoperable frame format. + This format is generated and decoded automatically by the lz4frame library. + Its public API is described in lib/lz4frame.h. + +if LZ4_FRAME_SUPPORT +choice LZ4F_HEAPMODE + prompt "Control how LZ4F_compressFrame() allocates the Compression State" + default LZ4F_HEAPMODE_STACK + +config LZ4F_HEAPMODE_STACK + bool "in memory stack" + help + Allocate memory from stack (fastest). + +config LZ4F_HEAPMODE_HEAP + bool "in memory heap" + depends on !LZ4_DISABLE_DYNAMIC_MEMORY_ALLOCATION + help + Allocate memory from heap (requires malloc()). +endchoice +endif + +endif diff --git a/modules/mbedtls/Kconfig.tls-generic b/modules/mbedtls/Kconfig.tls-generic index 779d3b356f82683..5c8ac8b569b15d7 100644 --- a/modules/mbedtls/Kconfig.tls-generic +++ b/modules/mbedtls/Kconfig.tls-generic @@ -554,9 +554,10 @@ config MBEDTLS_LMS depends on MBEDTLS_SHA256 select PSA_WANT_ALG_SHA_256 +if MBEDTLS_PSA_CRYPTO_C + config MBEDTLS_PSA_P256M_DRIVER_ENABLED bool "P256-M driver" - depends on MBEDTLS_PSA_CRYPTO_C imply PSA_WANT_ALG_SHA_256 help Enable support for the optimized sofware implementation of the secp256r1 @@ -570,6 +571,35 @@ config MBEDTLS_PSA_P256M_DRIVER_RAW Warning: Usage of this Kconfig option is prohibited in Zephyr's codebase. Users can enable it in case of very memory-constrained devices, but be aware that the p256-m interface is absolutely not guaranted to remain stable over time. +config MBEDTLS_PSA_STATIC_KEY_SLOTS + bool "Use statically allocated key buffers to store key material" + default y if !MBEDTLS_ENABLE_HEAP + help + By default Mbed TLS's PSA Crypto core uses heap memory to store the + key material for each key slot. This might impose an undesired + requirement to support heap memory and its management code, affecting + RAM and ROM footprints at the same time. + Enabling this symbol causes Mbed TLS to pre-allocate all the key slot + buffers that are used to store the key material at build time, thus + removing the need for heap memory. Each buffer will be sized to + contain the largest asymmetric/symmetric key type enabled in the build + through PSA_WANT symbols. + +config MBEDTLS_PSA_KEY_SLOT_COUNT + int "Number of key slots in PSA Crypto core" + default 16 + help + Set the number of key slots that are available in the PSA Crypto core. + Be aware that each slot, even if unused, increases RAM consumption + by ~40 bytes plus: + * the length of the largest asymmetric/symmetric key type enabled in + the build through PSA_WANT symbols, if MBEDTLS_PSA_STATIC_KEY_SLOTS + is set. (This is all defined statically at build time). + * the heap-allocated memory to store the key material of a given slot, + if it is used and MBEDTLS_PSA_STATIC_KEY_SLOTS is not set. + +endif # MBEDTLS_PSA_CRYPTO_C + config MBEDTLS_SSL_DTLS_CONNECTION_ID bool "DTLS Connection ID extension" depends on MBEDTLS_DTLS diff --git a/modules/mbedtls/configs/config-tls-generic.h b/modules/mbedtls/configs/config-tls-generic.h index aff59f9e17e7630..989d0ad70f2cd51 100644 --- a/modules/mbedtls/configs/config-tls-generic.h +++ b/modules/mbedtls/configs/config-tls-generic.h @@ -483,7 +483,6 @@ #endif #if defined(CONFIG_ARCH_POSIX) && !defined(CONFIG_PICOLIBC) -#define MBEDTLS_PSA_KEY_SLOT_COUNT 64 /* for BLE Mesh tests */ #define MBEDTLS_PSA_ITS_FILE_C #define MBEDTLS_FS_IO #endif @@ -494,6 +493,14 @@ #endif /* CONFIG_MBEDTLS_PSA_CRYPTO_C */ +#if defined(CONFIG_MBEDTLS_PSA_STATIC_KEY_SLOTS) +#define MBEDTLS_PSA_STATIC_KEY_SLOTS +#endif + +#if defined(CONFIG_MBEDTLS_PSA_KEY_SLOT_COUNT) +#define MBEDTLS_PSA_KEY_SLOT_COUNT CONFIG_MBEDTLS_PSA_KEY_SLOT_COUNT +#endif + #if defined(CONFIG_MBEDTLS_USE_PSA_CRYPTO) #define MBEDTLS_USE_PSA_CRYPTO #endif diff --git a/modules/nrf_wifi/CMakeLists.txt b/modules/nrf_wifi/CMakeLists.txt new file mode 100644 index 000000000000000..ad04414b511cbf3 --- /dev/null +++ b/modules/nrf_wifi/CMakeLists.txt @@ -0,0 +1,176 @@ +# Copyright (c) 2024 Nordic Semiconductor ASA +# SPDX-License-Identifier: Apache-2.0 + +if(NOT CONFIG_WIFI_NRF70) + return() +endif() +zephyr_interface_library_named(nrf-wifi-interface) +zephyr_library() + +set(NRF_WIFI_DIR ${ZEPHYR_CURRENT_MODULE_DIR}) + +# Translate the configuration to the OS agnostic code +target_compile_definitions( + nrf-wifi-interface + INTERFACE + $<$:NRF_WIFI_LOW_POWER> + $<$:NRF_WIFI_RPU_RECOVERY> + $<$:NRF_WIFI_AP_DEAD_DETECT_TIMEOUT=${CONFIG_NRF_WIFI_AP_DEAD_DETECT_TIMEOUT}> + $<$:NRF_WIFI_IFACE_MTU=${CONFIG_NRF_WIFI_IFACE_MTU}> + $<$:NRF70_STA_MODE> + $<$:NRF70_DATA_TX> + $<$:NRF70_RAW_DATA_TX> + $<$:NRF70_RAW_DATA_RX> + $<$:NRF70_PROMISC_DATA_RX> + $<$:NRF70_TX_DONE_WQ_ENABLED> + $<$:NRF70_RX_WQ_ENABLED> + $<$:NRF70_UTIL> + $<$:NRF70_RADIO_TEST> + $<$:NRF70_OFFLOADED_RAW_TX> + $<$:NRF70_TCP_IP_CHECKSUM_OFFLOAD> + $<$:NRF70_RPU_EXTEND_TWT_SP> + $<$:NRF70_SYSTEM_WITH_RAW_MODES> + $<$:NRF70_SCAN_ONLY> + $<$:NRF70_SYSTEM_MODE> + $<$:NRF70_2_4G_ONLY> + $<$:NRF70_LOG_VERBOSE> + $<$:NRF70_AP_MODE> + $<$:NRF_WIFI_MGMT_BUFF_OFFLOAD> + $<$:NRF_WIFI_FEAT_KEEPALIVE> + $<$:NRF_WIFI_KEEPALIVE_PERIOD_S=${CONFIG_NRF_WIFI_KEEPALIVE_PERIOD_S}> + NRF70_RX_NUM_BUFS=${CONFIG_NRF70_RX_NUM_BUFS} + NRF70_MAX_TX_TOKENS=${CONFIG_NRF70_MAX_TX_TOKENS} + NRF70_RX_MAX_DATA_SIZE=${CONFIG_NRF70_RX_MAX_DATA_SIZE} + NRF70_MAX_TX_PENDING_QLEN=${CONFIG_NRF70_MAX_TX_PENDING_QLEN} + NRF70_RPU_PS_IDLE_TIMEOUT_MS=${CONFIG_NRF70_RPU_PS_IDLE_TIMEOUT_MS} + NRF70_REG_DOMAIN=${CONFIG_NRF70_REG_DOMAIN} + NRF70_BAND_2G_LOWER_EDGE_BACKOFF_DSSS=${CONFIG_NRF70_BAND_2G_LOWER_EDGE_BACKOFF_DSSS} + NRF70_BAND_2G_LOWER_EDGE_BACKOFF_HT=${CONFIG_NRF70_BAND_2G_LOWER_EDGE_BACKOFF_HT} + NRF70_BAND_2G_LOWER_EDGE_BACKOFF_HE=${CONFIG_NRF70_BAND_2G_LOWER_EDGE_BACKOFF_HE} + NRF70_BAND_2G_UPPER_EDGE_BACKOFF_DSSS=${CONFIG_NRF70_BAND_2G_UPPER_EDGE_BACKOFF_DSSS} + NRF70_BAND_2G_UPPER_EDGE_BACKOFF_HT=${CONFIG_NRF70_BAND_2G_UPPER_EDGE_BACKOFF_HT} + NRF70_BAND_2G_UPPER_EDGE_BACKOFF_HE=${CONFIG_NRF70_BAND_2G_UPPER_EDGE_BACKOFF_HE} + NRF70_BAND_UNII_1_LOWER_EDGE_BACKOFF_HT=${CONFIG_NRF70_BAND_UNII_1_LOWER_EDGE_BACKOFF_HT} + NRF70_BAND_UNII_1_LOWER_EDGE_BACKOFF_HE=${CONFIG_NRF70_BAND_UNII_1_LOWER_EDGE_BACKOFF_HE} + NRF70_BAND_UNII_1_UPPER_EDGE_BACKOFF_HT=${CONFIG_NRF70_BAND_UNII_1_UPPER_EDGE_BACKOFF_HT} + NRF70_BAND_UNII_1_UPPER_EDGE_BACKOFF_HE=${CONFIG_NRF70_BAND_UNII_1_UPPER_EDGE_BACKOFF_HE} + NRF70_BAND_UNII_2A_LOWER_EDGE_BACKOFF_HT=${CONFIG_NRF70_BAND_UNII_2A_LOWER_EDGE_BACKOFF_HT} + NRF70_BAND_UNII_2A_LOWER_EDGE_BACKOFF_HE=${CONFIG_NRF70_BAND_UNII_2A_LOWER_EDGE_BACKOFF_HE} + NRF70_BAND_UNII_2A_UPPER_EDGE_BACKOFF_HT=${CONFIG_NRF70_BAND_UNII_2A_UPPER_EDGE_BACKOFF_HT} + NRF70_BAND_UNII_2A_UPPER_EDGE_BACKOFF_HE=${CONFIG_NRF70_BAND_UNII_2A_UPPER_EDGE_BACKOFF_HE} + NRF70_BAND_UNII_2C_LOWER_EDGE_BACKOFF_HT=${CONFIG_NRF70_BAND_UNII_2C_LOWER_EDGE_BACKOFF_HT} + NRF70_BAND_UNII_2C_LOWER_EDGE_BACKOFF_HE=${CONFIG_NRF70_BAND_UNII_2C_LOWER_EDGE_BACKOFF_HE} + NRF70_BAND_UNII_2C_UPPER_EDGE_BACKOFF_HT=${CONFIG_NRF70_BAND_UNII_2C_UPPER_EDGE_BACKOFF_HT} + NRF70_BAND_UNII_2C_UPPER_EDGE_BACKOFF_HE=${CONFIG_NRF70_BAND_UNII_2C_UPPER_EDGE_BACKOFF_HE} + NRF70_BAND_UNII_3_LOWER_EDGE_BACKOFF_HT=${CONFIG_NRF70_BAND_UNII_3_LOWER_EDGE_BACKOFF_HT} + NRF70_BAND_UNII_3_LOWER_EDGE_BACKOFF_HE=${CONFIG_NRF70_BAND_UNII_3_LOWER_EDGE_BACKOFF_HE} + NRF70_BAND_UNII_3_UPPER_EDGE_BACKOFF_HT=${CONFIG_NRF70_BAND_UNII_3_UPPER_EDGE_BACKOFF_HT} + NRF70_BAND_UNII_3_UPPER_EDGE_BACKOFF_HE=${CONFIG_NRF70_BAND_UNII_3_UPPER_EDGE_BACKOFF_HE} + NRF70_BAND_UNII_4_LOWER_EDGE_BACKOFF_HT=${CONFIG_NRF70_BAND_UNII_4_LOWER_EDGE_BACKOFF_HT} + NRF70_BAND_UNII_4_LOWER_EDGE_BACKOFF_HE=${CONFIG_NRF70_BAND_UNII_4_LOWER_EDGE_BACKOFF_HE} + NRF70_BAND_UNII_4_UPPER_EDGE_BACKOFF_HT=${CONFIG_NRF70_BAND_UNII_4_UPPER_EDGE_BACKOFF_HT} + NRF70_BAND_UNII_4_UPPER_EDGE_BACKOFF_HE=${CONFIG_NRF70_BAND_UNII_4_UPPER_EDGE_BACKOFF_HE} + NRF70_PCB_LOSS_2G=${CONFIG_NRF70_PCB_LOSS_2G} + NRF70_PCB_LOSS_5G_BAND1=${CONFIG_NRF70_PCB_LOSS_5G_BAND1} + NRF70_PCB_LOSS_5G_BAND2=${CONFIG_NRF70_PCB_LOSS_5G_BAND2} + NRF70_PCB_LOSS_5G_BAND3=${CONFIG_NRF70_PCB_LOSS_5G_BAND3} + NRF70_ANT_GAIN_2G=${CONFIG_NRF70_ANT_GAIN_2G} + NRF70_ANT_GAIN_5G_BAND1=${CONFIG_NRF70_ANT_GAIN_5G_BAND1} + NRF70_ANT_GAIN_5G_BAND2=${CONFIG_NRF70_ANT_GAIN_5G_BAND2} + NRF70_ANT_GAIN_5G_BAND3=${CONFIG_NRF70_ANT_GAIN_5G_BAND3} + NRF_WIFI_PS_INT_PS=${CONFIG_NRF_WIFI_PS_INT_PS} + NRF_WIFI_RPU_RECOVERY_PS_ACTIVE_TIMEOUT_MS=${CONFIG_NRF_WIFI_RPU_RECOVERY_PS_ACTIVE_TIMEOUT_MS} +) + +target_include_directories( + nrf-wifi-interface + INTERFACE + ${CMAKE_CURRENT_LIST_DIR} + ${NRF_WIFI_DIR}/utils/inc + ${NRF_WIFI_DIR}/os_if/inc + ${NRF_WIFI_DIR}/bus_if/bus/qspi/inc + ${NRF_WIFI_DIR}/bus_if/bal/inc + ${NRF_WIFI_DIR}/fw_if/umac_if/inc + ${NRF_WIFI_DIR}/fw_load/mips/fw/inc + ${NRF_WIFI_DIR}/hw_if/hal/inc + ${NRF_WIFI_DIR}/hw_if/hal/inc/fw + ${NRF_WIFI_DIR}/fw_if/umac_if/inc/fw +) + +if(CONFIG_NRF70_RADIO_TEST) + target_include_directories(nrf-wifi-interface INTERFACE + ${NRF_WIFI_DIR}/fw_if/umac_if/inc/radio_test + ) +elseif(CONFIG_NRF70_OFFLOADED_RAW_TX) + target_include_directories(nrf-wifi-interface INTERFACE + ${NRF_WIFI_DIR}/fw_if/umac_if/inc/offload_raw_tx + off_raw_tx/inc + ) +else() + target_include_directories(nrf-wifi-interface INTERFACE + ${NRF_WIFI_DIR}/fw_if/umac_if/inc/default + ) +endif() + +zephyr_library_sources( + ${NRF_WIFI_DIR}/os_if/src/osal.c + ${NRF_WIFI_DIR}/utils/src/list.c + ${NRF_WIFI_DIR}/utils/src/queue.c + ${NRF_WIFI_DIR}/utils/src/util.c + ${NRF_WIFI_DIR}/hw_if/hal/src/hal_api.c + ${NRF_WIFI_DIR}/hw_if/hal/src/hal_fw_patch_loader.c + ${NRF_WIFI_DIR}/hw_if/hal/src/hal_interrupt.c + ${NRF_WIFI_DIR}/hw_if/hal/src/hal_mem.c + ${NRF_WIFI_DIR}/hw_if/hal/src/hal_reg.c + ${NRF_WIFI_DIR}/hw_if/hal/src/hpqm.c + ${NRF_WIFI_DIR}/hw_if/hal/src/pal.c + ${NRF_WIFI_DIR}/bus_if/bal/src/bal.c + ${NRF_WIFI_DIR}/bus_if/bus/qspi/src/qspi.c + ${NRF_WIFI_DIR}/fw_if/umac_if/src/cmd.c + ${NRF_WIFI_DIR}/fw_if/umac_if/src/event.c + ${NRF_WIFI_DIR}/fw_if/umac_if/src/fmac_api_common.c +) + +zephyr_library_sources_ifndef(CONFIG_NRF70_RADIO_TEST + ${NRF_WIFI_DIR}/fw_if/umac_if/src/rx.c + ${NRF_WIFI_DIR}/fw_if/umac_if/src/fmac_vif.c + ${NRF_WIFI_DIR}/fw_if/umac_if/src/fmac_util.c + ${NRF_WIFI_DIR}/fw_if/umac_if/src/default/fmac_api.c +) + +zephyr_library_sources_ifdef(CONFIG_NRF70_RADIO_TEST + ${NRF_WIFI_DIR}/fw_if/umac_if/src/radio_test/fmac_api.c + ${NRF_WIFI_DIR}/fw_if/umac_if/src/fmac_util.c +) + +zephyr_library_sources_ifdef(CONFIG_NRF70_DATA_TX + ${NRF_WIFI_DIR}/fw_if/umac_if/src/tx.c + ${NRF_WIFI_DIR}/fw_if/umac_if/src/fmac_peer.c +) + +zephyr_library_sources_ifdef(CONFIG_NRF70_STA_MODE + ${NRF_WIFI_DIR}/fw_if/umac_if/src/fmac_peer.c + ${NRF_WIFI_DIR}/fw_if/umac_if/src/fmac_util.c +) + +zephyr_library_sources_ifdef(CONFIG_NRF70_PROMISC_DATA_RX + ${OS_AGNOSTIC_BASE}/fw_if/umac_if/src/fmac_promisc.c +) + +zephyr_library_sources_ifdef(CONFIG_NRF70_AP_MODE + ${NRF_WIFI_DIR}/fw_if/umac_if/src/fmac_ap.c +) + +# Without WPA supplicant we only support scan +zephyr_library_sources_ifdef(CONFIG_NRF70_STA_MODE + ${NRF_WIFI_DIR}/fw_if/umac_if/src/fmac_peer.c + ${NRF_WIFI_DIR}/fw_if/umac_if/src/fmac_util.c +) + +zephyr_library_sources( + shim.c + timer.c + work.c +) + +target_link_libraries(zephyr_interface INTERFACE nrf-wifi-interface) diff --git a/modules/nrf_wifi/Kconfig b/modules/nrf_wifi/Kconfig new file mode 100644 index 000000000000000..9fe8172c68dfa9e --- /dev/null +++ b/modules/nrf_wifi/Kconfig @@ -0,0 +1,5 @@ +# Copyright (c) 2024 Nordic Semiconductor ASA +# SPDX-License-Identifier: Apache-2.0 + +config ZEPHYR_NRF_WIFI_MODULE + bool diff --git a/drivers/wifi/nrfwifi/src/shim.c b/modules/nrf_wifi/shim.c similarity index 100% rename from drivers/wifi/nrfwifi/src/shim.c rename to modules/nrf_wifi/shim.c diff --git a/drivers/wifi/nrfwifi/src/shim.h b/modules/nrf_wifi/shim.h similarity index 100% rename from drivers/wifi/nrfwifi/src/shim.h rename to modules/nrf_wifi/shim.h diff --git a/drivers/wifi/nrfwifi/src/timer.c b/modules/nrf_wifi/timer.c similarity index 100% rename from drivers/wifi/nrfwifi/src/timer.c rename to modules/nrf_wifi/timer.c diff --git a/drivers/wifi/nrfwifi/src/timer.h b/modules/nrf_wifi/timer.h similarity index 100% rename from drivers/wifi/nrfwifi/src/timer.h rename to modules/nrf_wifi/timer.h diff --git a/drivers/wifi/nrfwifi/src/work.c b/modules/nrf_wifi/work.c similarity index 100% rename from drivers/wifi/nrfwifi/src/work.c rename to modules/nrf_wifi/work.c diff --git a/drivers/wifi/nrfwifi/src/work.h b/modules/nrf_wifi/work.h similarity index 100% rename from drivers/wifi/nrfwifi/src/work.h rename to modules/nrf_wifi/work.h diff --git a/samples/basic/minimal/sample.yaml b/samples/basic/minimal/sample.yaml index 54e0d718bdc4616..5665dd7faced831 100644 --- a/samples/basic/minimal/sample.yaml +++ b/samples/basic/minimal/sample.yaml @@ -13,7 +13,6 @@ tests: extra_args: CONF_FILE='common.conf;mt.conf;arm.conf' build_only: true platform_allow: - - reel_board - frdm_k64f - mps2/an385 - nrf51dk/nrf51822 @@ -25,42 +24,46 @@ tests: extra_args: CONF_FILE='common.conf;mt.conf;no-preempt.conf;arm.conf' build_only: true platform_allow: - - reel_board - frdm_k64f - mps2/an385 - nrf51dk/nrf51822 - nucleo_f429zi - disco_l475_iot1 + integration_platforms: + - frdm_k64f sample.minimal.mt-no-preempt-no-timers.arm: extra_args: CONF_FILE='common.conf;mt.conf;no-preempt.conf;no-timers.conf;arm.conf' build_only: true platform_allow: - - reel_board - frdm_k64f - mps2/an385 - nrf51dk/nrf51822 - nucleo_f429zi - disco_l475_iot1 + integration_platforms: + - frdm_k64f sample.minimal.no-mt.arm: extra_args: CONF_FILE='common.conf;no-mt.conf;arm.conf' build_only: true platform_allow: - - reel_board - frdm_k64f - mps2/an385 - nrf51dk/nrf51822 - nucleo_f429zi - disco_l475_iot1 + integration_platforms: + - frdm_k64f sample.minimal.no-mt-no-timers.arm: extra_args: CONF_FILE='common.conf;no-mt.conf;no-timers.conf;arm.conf' build_only: true platform_allow: - - reel_board - frdm_k64f - mps2/an385 - nrf51dk/nrf51822 - nucleo_f429zi - disco_l475_iot1 + integration_platforms: + - frdm_k64f sample.minimal.mt.x86: extra_args: CONF_FILE='common.conf;mt.conf;x86.conf' build_only: true diff --git a/samples/bluetooth/hci_ipc/nrf5340_cpunet_bis-bt_ll_sw_split.conf b/samples/bluetooth/hci_ipc/nrf5340_cpunet_bis-bt_ll_sw_split.conf index a7487118694a01a..f58d44035a74dbb 100644 --- a/samples/bluetooth/hci_ipc/nrf5340_cpunet_bis-bt_ll_sw_split.conf +++ b/samples/bluetooth/hci_ipc/nrf5340_cpunet_bis-bt_ll_sw_split.conf @@ -5,7 +5,7 @@ CONFIG_ISR_STACK_SIZE=1024 CONFIG_IDLE_STACK_SIZE=256 CONFIG_MAIN_STACK_SIZE=512 CONFIG_SYSTEM_WORKQUEUE_STACK_SIZE=512 -CONFIG_HEAP_MEM_POOL_SIZE=8192 +CONFIG_HEAP_MEM_POOL_SIZE=4096 CONFIG_BT=y CONFIG_BT_HCI_RAW=y @@ -40,7 +40,11 @@ CONFIG_BT_ISO_PERIPHERAL=n # ISO Streams CONFIG_BT_ISO_MAX_CHAN=4 -CONFIG_BT_ISO_TX_BUF_COUNT=1 +# In theory, CONFIG_BT_ISO_TX_BUF_COUNT=1, should be sufficient but this count +# is used in the context of IPC which falls into a "Newton's Cradle" effect +# where probably (CONFIG_BT_CTLR_ISO_TX_BUFFERS - CONFIG_BT_ISO_TX_BUF_COUNT) +# buffers get throttled. Hence, always have the value equal or greater. +CONFIG_BT_ISO_TX_BUF_COUNT=12 CONFIG_BT_ISO_RX_BUF_COUNT=1 # Controller diff --git a/samples/bluetooth/hci_ipc/nrf5340_cpunet_bt_mesh-bt_ll_sw_split.conf b/samples/bluetooth/hci_ipc/nrf5340_cpunet_bt_mesh-bt_ll_sw_split.conf index 0d78cf862eedb63..8a031231c5a90ed 100644 --- a/samples/bluetooth/hci_ipc/nrf5340_cpunet_bt_mesh-bt_ll_sw_split.conf +++ b/samples/bluetooth/hci_ipc/nrf5340_cpunet_bt_mesh-bt_ll_sw_split.conf @@ -1,7 +1,7 @@ CONFIG_IPC_SERVICE=y CONFIG_MBOX=y -CONFIG_HEAP_MEM_POOL_SIZE=8192 +CONFIG_HEAP_MEM_POOL_SIZE=4096 CONFIG_MAIN_STACK_SIZE=512 CONFIG_SYSTEM_WORKQUEUE_STACK_SIZE=512 diff --git a/samples/bluetooth/hci_ipc/nrf5340_cpunet_cis-bt_ll_sw_split.conf b/samples/bluetooth/hci_ipc/nrf5340_cpunet_cis-bt_ll_sw_split.conf index f7e1f8fc6737d2a..db4705c7b1e24cc 100644 --- a/samples/bluetooth/hci_ipc/nrf5340_cpunet_cis-bt_ll_sw_split.conf +++ b/samples/bluetooth/hci_ipc/nrf5340_cpunet_cis-bt_ll_sw_split.conf @@ -5,7 +5,7 @@ CONFIG_ISR_STACK_SIZE=1024 CONFIG_IDLE_STACK_SIZE=256 CONFIG_MAIN_STACK_SIZE=512 CONFIG_SYSTEM_WORKQUEUE_STACK_SIZE=512 -CONFIG_HEAP_MEM_POOL_SIZE=8192 +CONFIG_HEAP_MEM_POOL_SIZE=4096 CONFIG_BT=y CONFIG_BT_HCI_RAW=y @@ -39,7 +39,11 @@ CONFIG_BT_ISO_PERIPHERAL=y # ISO Streams CONFIG_BT_ISO_MAX_CHAN=4 -CONFIG_BT_ISO_TX_BUF_COUNT=1 +# In theory, CONFIG_BT_ISO_TX_BUF_COUNT=1, should be sufficient but this count +# is used in the context of IPC which falls into a "Newton's Cradle" effect +# where probably (CONFIG_BT_CTLR_ISO_TX_BUFFERS - CONFIG_BT_ISO_TX_BUF_COUNT) +# buffers get throttled. Hence, always have the value equal or greater. +CONFIG_BT_ISO_TX_BUF_COUNT=12 CONFIG_BT_ISO_RX_BUF_COUNT=1 # Controller @@ -82,8 +86,8 @@ CONFIG_BT_CTLR_LLCP_LOCAL_PROC_CTX_BUF_NUM=6 # ISO Connection Oriented CONFIG_BT_CTLR_CENTRAL_ISO=y CONFIG_BT_CTLR_PERIPHERAL_ISO=y -CONFIG_BT_CTLR_CONN_ISO_STREAMS=2 CONFIG_BT_CTLR_CONN_ISO_GROUPS=1 +CONFIG_BT_CTLR_CONN_ISO_STREAMS=2 CONFIG_BT_CTLR_CONN_ISO_STREAMS_PER_GROUP=2 CONFIG_BT_CTLR_CONN_ISO_SDU_LEN_MAX=247 CONFIG_BT_CTLR_CONN_ISO_PDU_LEN_MAX=251 diff --git a/samples/bluetooth/hci_ipc/nrf5340_cpunet_df-bt_ll_sw_split.conf b/samples/bluetooth/hci_ipc/nrf5340_cpunet_df-bt_ll_sw_split.conf index b183a4c9825fc83..19adc889598ccab 100644 --- a/samples/bluetooth/hci_ipc/nrf5340_cpunet_df-bt_ll_sw_split.conf +++ b/samples/bluetooth/hci_ipc/nrf5340_cpunet_df-bt_ll_sw_split.conf @@ -5,7 +5,7 @@ CONFIG_ISR_STACK_SIZE=1024 CONFIG_IDLE_STACK_SIZE=256 CONFIG_MAIN_STACK_SIZE=512 CONFIG_SYSTEM_WORKQUEUE_STACK_SIZE=512 -CONFIG_HEAP_MEM_POOL_SIZE=8192 +CONFIG_HEAP_MEM_POOL_SIZE=4096 CONFIG_BT=y CONFIG_BT_HCI_RAW=y diff --git a/samples/bluetooth/hci_ipc/nrf5340_cpunet_iso-bt_ll_sw_split.conf b/samples/bluetooth/hci_ipc/nrf5340_cpunet_iso-bt_ll_sw_split.conf index 925eac8e34e63b8..0ef1d134e6f9c1b 100644 --- a/samples/bluetooth/hci_ipc/nrf5340_cpunet_iso-bt_ll_sw_split.conf +++ b/samples/bluetooth/hci_ipc/nrf5340_cpunet_iso-bt_ll_sw_split.conf @@ -5,7 +5,7 @@ CONFIG_ISR_STACK_SIZE=1024 CONFIG_IDLE_STACK_SIZE=256 CONFIG_MAIN_STACK_SIZE=512 CONFIG_SYSTEM_WORKQUEUE_STACK_SIZE=512 -CONFIG_HEAP_MEM_POOL_SIZE=8192 +CONFIG_HEAP_MEM_POOL_SIZE=4096 CONFIG_CBPRINTF_REDUCED_INTEGRAL=y CONFIG_ISR_TABLES_LOCAL_DECLARATION=y @@ -46,7 +46,11 @@ CONFIG_BT_ISO_PERIPHERAL=y CONFIG_BT_ISO_TX_MTU=310 CONFIG_BT_ISO_RX_MTU=310 CONFIG_BT_ISO_MAX_CHAN=4 -CONFIG_BT_ISO_TX_BUF_COUNT=1 +# In theory, CONFIG_BT_ISO_TX_BUF_COUNT=1, should be sufficient but this count +# is used in the context of IPC which falls into a "Newton's Cradle" effect +# where probably (CONFIG_BT_CTLR_ISO_TX_BUFFERS - CONFIG_BT_ISO_TX_BUF_COUNT) +# buffers get throttled. Hence, always have the value equal or greater. +CONFIG_BT_ISO_TX_BUF_COUNT=8 CONFIG_BT_ISO_RX_BUF_COUNT=1 # Controller @@ -100,8 +104,8 @@ CONFIG_BT_CTLR_ADV_EXT=y CONFIG_BT_CTLR_ADV_PERIODIC=y CONFIG_BT_CTLR_SYNC_TRANSFER_SENDER=y CONFIG_BT_CTLR_ADV_ISO=y -CONFIG_BT_CTLR_ADV_ISO_SET=2 -CONFIG_BT_CTLR_ADV_ISO_STREAM_COUNT=4 +CONFIG_BT_CTLR_ADV_ISO_SET=1 +CONFIG_BT_CTLR_ADV_ISO_STREAM_COUNT=2 CONFIG_BT_CTLR_ADV_ISO_STREAM_MAX=2 CONFIG_BT_CTLR_ADV_ISO_PDU_LEN_MAX=247 @@ -118,16 +122,16 @@ CONFIG_BT_CTLR_SYNC_ISO_PDU_LEN_MAX=251 # ISO Connection Oriented CONFIG_BT_CTLR_CENTRAL_ISO=y CONFIG_BT_CTLR_PERIPHERAL_ISO=y -CONFIG_BT_CTLR_CONN_ISO_STREAMS=2 CONFIG_BT_CTLR_CONN_ISO_GROUPS=1 +CONFIG_BT_CTLR_CONN_ISO_STREAMS=2 CONFIG_BT_CTLR_CONN_ISO_STREAMS_PER_GROUP=2 CONFIG_BT_CTLR_CONN_ISO_SDU_LEN_MAX=247 CONFIG_BT_CTLR_CONN_ISO_PDU_LEN_MAX=251 CONFIG_BT_CTLR_CONN_ISO_LOW_LATENCY_POLICY=y # ISO Transmissions -CONFIG_BT_CTLR_ISOAL_SOURCES=4 -CONFIG_BT_CTLR_ISO_TX_BUFFERS=12 +CONFIG_BT_CTLR_ISOAL_SOURCES=2 +CONFIG_BT_CTLR_ISO_TX_BUFFERS=8 CONFIG_BT_CTLR_ISO_TX_BUFFER_SIZE=255 # ISO Receptions diff --git a/samples/bluetooth/hci_ipc/nrf5340_cpunet_iso_broadcast-bt_ll_sw_split.conf b/samples/bluetooth/hci_ipc/nrf5340_cpunet_iso_broadcast-bt_ll_sw_split.conf index 67c5854c9c0c716..0fec7c0d82423fc 100644 --- a/samples/bluetooth/hci_ipc/nrf5340_cpunet_iso_broadcast-bt_ll_sw_split.conf +++ b/samples/bluetooth/hci_ipc/nrf5340_cpunet_iso_broadcast-bt_ll_sw_split.conf @@ -5,7 +5,7 @@ CONFIG_ISR_STACK_SIZE=1024 CONFIG_IDLE_STACK_SIZE=256 CONFIG_MAIN_STACK_SIZE=512 CONFIG_SYSTEM_WORKQUEUE_STACK_SIZE=512 -CONFIG_HEAP_MEM_POOL_SIZE=8192 +CONFIG_HEAP_MEM_POOL_SIZE=4096 CONFIG_BT=y CONFIG_BT_HCI_RAW=y @@ -20,11 +20,18 @@ CONFIG_BT_OBSERVER=n CONFIG_BT_EXT_ADV=y CONFIG_BT_PER_ADV=y CONFIG_BT_ISO_BROADCASTER=y -CONFIG_BT_ISO_MAX_CHAN=4 -CONFIG_BT_ISO_TX_BUF_COUNT=1 CONFIG_BT_CENTRAL=n CONFIG_BT_PERIPHERAL=n +# ISO Streams +CONFIG_BT_ISO_MAX_CHAN=4 +# In theory, CONFIG_BT_ISO_TX_BUF_COUNT=1, should be sufficient but this count +# is used in the context of IPC which falls into a "Newton's Cradle" effect +# where probably (CONFIG_BT_CTLR_ISO_TX_BUFFERS - CONFIG_BT_ISO_TX_BUF_COUNT) +# buffers get throttled. Hence, always have the value equal or greater. +CONFIG_BT_ISO_TX_BUF_COUNT=12 +CONFIG_BT_ISO_RX_BUF_COUNT=1 + # ISO Broadcast Controller CONFIG_BT_LL_SW_SPLIT=y CONFIG_BT_CTLR_ADV_PERIODIC=y diff --git a/samples/bluetooth/hci_ipc/nrf5340_cpunet_iso_central-bt_ll_sw_split.conf b/samples/bluetooth/hci_ipc/nrf5340_cpunet_iso_central-bt_ll_sw_split.conf index 505b9d352ba0e3d..58469a0309bd9f7 100644 --- a/samples/bluetooth/hci_ipc/nrf5340_cpunet_iso_central-bt_ll_sw_split.conf +++ b/samples/bluetooth/hci_ipc/nrf5340_cpunet_iso_central-bt_ll_sw_split.conf @@ -5,7 +5,7 @@ CONFIG_ISR_STACK_SIZE=1024 CONFIG_IDLE_STACK_SIZE=256 CONFIG_MAIN_STACK_SIZE=512 CONFIG_SYSTEM_WORKQUEUE_STACK_SIZE=512 -CONFIG_HEAP_MEM_POOL_SIZE=8192 +CONFIG_HEAP_MEM_POOL_SIZE=4096 CONFIG_BT=y CONFIG_BT_HCI_RAW=y @@ -35,7 +35,11 @@ CONFIG_BT_ISO_PERIPHERAL=n # ISO Streams CONFIG_BT_ISO_MAX_CHAN=2 -CONFIG_BT_ISO_TX_BUF_COUNT=1 +# In theory, CONFIG_BT_ISO_TX_BUF_COUNT=1, should be sufficient but this count +# is used in the context of IPC which falls into a "Newton's Cradle" effect +# where probably (CONFIG_BT_CTLR_ISO_TX_BUFFERS - CONFIG_BT_ISO_TX_BUF_COUNT) +# buffers get throttled. Hence, always have the value equal or greater. +CONFIG_BT_ISO_TX_BUF_COUNT=12 CONFIG_BT_ISO_RX_BUF_COUNT=1 # Controller @@ -46,8 +50,8 @@ CONFIG_BT_CTLR_SCAN_DATA_LEN_MAX=191 # ISO Connection Oriented CONFIG_BT_CTLR_CENTRAL_ISO=y CONFIG_BT_CTLR_PERIPHERAL_ISO=n -CONFIG_BT_CTLR_CONN_ISO_STREAMS=2 CONFIG_BT_CTLR_CONN_ISO_GROUPS=1 +CONFIG_BT_CTLR_CONN_ISO_STREAMS=2 CONFIG_BT_CTLR_CONN_ISO_STREAMS_PER_GROUP=2 CONFIG_BT_CTLR_CONN_ISO_SDU_LEN_MAX=247 CONFIG_BT_CTLR_CONN_ISO_PDU_LEN_MAX=251 diff --git a/samples/bluetooth/hci_ipc/nrf5340_cpunet_iso_peripheral-bt_ll_sw_split.conf b/samples/bluetooth/hci_ipc/nrf5340_cpunet_iso_peripheral-bt_ll_sw_split.conf index 05c9a9d39033e0c..1ff7ad685cfd901 100644 --- a/samples/bluetooth/hci_ipc/nrf5340_cpunet_iso_peripheral-bt_ll_sw_split.conf +++ b/samples/bluetooth/hci_ipc/nrf5340_cpunet_iso_peripheral-bt_ll_sw_split.conf @@ -5,7 +5,7 @@ CONFIG_ISR_STACK_SIZE=1024 CONFIG_IDLE_STACK_SIZE=256 CONFIG_MAIN_STACK_SIZE=512 CONFIG_SYSTEM_WORKQUEUE_STACK_SIZE=512 -CONFIG_HEAP_MEM_POOL_SIZE=8192 +CONFIG_HEAP_MEM_POOL_SIZE=4096 CONFIG_BT=y CONFIG_BT_HCI_RAW=y @@ -35,7 +35,11 @@ CONFIG_BT_ISO_PERIPHERAL=y # ISO Streams CONFIG_BT_ISO_MAX_CHAN=2 -CONFIG_BT_ISO_TX_BUF_COUNT=1 +# In theory, CONFIG_BT_ISO_TX_BUF_COUNT=1, should be sufficient but this count +# is used in the context of IPC which falls into a "Newton's Cradle" effect +# where probably (CONFIG_BT_CTLR_ISO_TX_BUFFERS - CONFIG_BT_ISO_TX_BUF_COUNT) +# buffers get throttled. Hence, always have the value equal or greater. +CONFIG_BT_ISO_TX_BUF_COUNT=12 CONFIG_BT_ISO_RX_BUF_COUNT=1 # Controller @@ -46,8 +50,8 @@ CONFIG_BT_CTLR_ADV_DATA_LEN_MAX=191 # ISO Connection Oriented CONFIG_BT_CTLR_CENTRAL_ISO=n CONFIG_BT_CTLR_PERIPHERAL_ISO=y -CONFIG_BT_CTLR_CONN_ISO_STREAMS=2 CONFIG_BT_CTLR_CONN_ISO_GROUPS=1 +CONFIG_BT_CTLR_CONN_ISO_STREAMS=2 CONFIG_BT_CTLR_CONN_ISO_STREAMS_PER_GROUP=2 CONFIG_BT_CTLR_CONN_ISO_SDU_LEN_MAX=247 CONFIG_BT_CTLR_CONN_ISO_PDU_LEN_MAX=251 diff --git a/samples/bluetooth/hci_ipc/nrf5340_cpunet_iso_receive-bt_ll_sw_split.conf b/samples/bluetooth/hci_ipc/nrf5340_cpunet_iso_receive-bt_ll_sw_split.conf index 51ca53e83f2336e..0375097d0918179 100644 --- a/samples/bluetooth/hci_ipc/nrf5340_cpunet_iso_receive-bt_ll_sw_split.conf +++ b/samples/bluetooth/hci_ipc/nrf5340_cpunet_iso_receive-bt_ll_sw_split.conf @@ -5,7 +5,7 @@ CONFIG_ISR_STACK_SIZE=1024 CONFIG_IDLE_STACK_SIZE=256 CONFIG_MAIN_STACK_SIZE=512 CONFIG_SYSTEM_WORKQUEUE_STACK_SIZE=512 -CONFIG_HEAP_MEM_POOL_SIZE=8192 +CONFIG_HEAP_MEM_POOL_SIZE=4096 CONFIG_BT=y CONFIG_BT_HCI_RAW=y diff --git a/samples/bluetooth/hci_ipc/overlay-nrf5340_cpunet_iso_nrf21540_ek-bt_ll_sw_split.conf b/samples/bluetooth/hci_ipc/overlay-nrf5340_cpunet_iso_nrf21540_ek-bt_ll_sw_split.conf new file mode 100644 index 000000000000000..12ab4e53eb93565 --- /dev/null +++ b/samples/bluetooth/hci_ipc/overlay-nrf5340_cpunet_iso_nrf21540_ek-bt_ll_sw_split.conf @@ -0,0 +1,6 @@ +# Reduce from 310 bytes, in nrf5340_cpunet_iso-bt_ll_sw_split.conf +# to be able to fit in 64KB RAM, in case needed in the future. + +# Example: +# CONFIG_BT_ISO_TX_MTU=247 +# CONFIG_BT_ISO_RX_MTU=251 diff --git a/samples/bluetooth/hci_ipc/prj.conf b/samples/bluetooth/hci_ipc/prj.conf index 39c20b23caba141..08b1aed9e7f6028 100644 --- a/samples/bluetooth/hci_ipc/prj.conf +++ b/samples/bluetooth/hci_ipc/prj.conf @@ -1,7 +1,7 @@ CONFIG_IPC_SERVICE=y CONFIG_MBOX=y -CONFIG_HEAP_MEM_POOL_SIZE=8192 +CONFIG_HEAP_MEM_POOL_SIZE=4096 CONFIG_MAIN_STACK_SIZE=512 CONFIG_SYSTEM_WORKQUEUE_STACK_SIZE=512 diff --git a/samples/bluetooth/hci_ipc/sample.yaml b/samples/bluetooth/hci_ipc/sample.yaml index dd9edc4e9eeb700..b758b2547688099 100644 --- a/samples/bluetooth/hci_ipc/sample.yaml +++ b/samples/bluetooth/hci_ipc/sample.yaml @@ -87,6 +87,7 @@ tests: tags: bluetooth extra_args: - CONF_FILE="nrf5340_cpunet_iso-bt_ll_sw_split.conf" + - EXTRA_CONF_FILE="overlay-nrf5340_cpunet_iso_nrf21540_ek-bt_ll_sw_split.conf" - DTC_OVERLAY_FILE="./boards/nrf5340_audio_dk_nrf5340_cpunet_nrf21540_ek.overlay" platform_allow: - nrf5340_audio_dk/nrf5340/cpunet diff --git a/samples/bluetooth/hci_uart_3wire/src/main.c b/samples/bluetooth/hci_uart_3wire/src/main.c index ce0e993dab04a19..5454b0cd9c7c609 100644 --- a/samples/bluetooth/hci_uart_3wire/src/main.c +++ b/samples/bluetooth/hci_uart_3wire/src/main.c @@ -28,7 +28,6 @@ #include #include #include -#include #define LOG_MODULE_NAME hci_uart_3wire LOG_MODULE_REGISTER(LOG_MODULE_NAME); diff --git a/samples/bluetooth/hci_uart_async/src/hci_uart_async.c b/samples/bluetooth/hci_uart_async/src/hci_uart_async.c index 011d9206622468d..936c47f76d7f36e 100644 --- a/samples/bluetooth/hci_uart_async/src/hci_uart_async.c +++ b/samples/bluetooth/hci_uart_async/src/hci_uart_async.c @@ -6,7 +6,6 @@ #include #include #include -#include #include #include #include diff --git a/samples/bluetooth/iso_broadcast/src/main.c b/samples/bluetooth/iso_broadcast/src/main.c index 0086a9786de7c2c..da06a9c417df71d 100644 --- a/samples/bluetooth/iso_broadcast/src/main.c +++ b/samples/bluetooth/iso_broadcast/src/main.c @@ -1,10 +1,13 @@ /* - * Copyright (c) 2021 Nordic Semiconductor ASA + * Copyright (c) 2021-2024 Nordic Semiconductor ASA * * SPDX-License-Identifier: Apache-2.0 */ +#include +#include #include +#include #include #include @@ -88,6 +91,20 @@ static const struct bt_data ad[] = { int main(void) { + /* Some controllers work best while Extended Advertising interval to be a multiple + * of the ISO Interval minus 10 ms (max. advertising random delay). This is + * required to place the AUX_ADV_IND PDUs in a non-overlapping interval with the + * Broadcast ISO radio events. + * For 10ms SDU interval a extended advertising interval of 60 - 10 = 50 is suitable + */ + const uint16_t adv_interval_ms = 60U; + const uint16_t ext_adv_interval_ms = adv_interval_ms - 10U; + const struct bt_le_adv_param *ext_adv_param = BT_LE_ADV_PARAM( + BT_LE_ADV_OPT_EXT_ADV, BT_GAP_MS_TO_ADV_INTERVAL(ext_adv_interval_ms), + BT_GAP_MS_TO_ADV_INTERVAL(ext_adv_interval_ms), NULL); + const struct bt_le_per_adv_param *per_adv_param = BT_LE_PER_ADV_PARAM( + BT_GAP_MS_TO_PER_ADV_INTERVAL(adv_interval_ms), + BT_GAP_MS_TO_PER_ADV_INTERVAL(adv_interval_ms), BT_LE_PER_ADV_OPT_NONE); uint32_t timeout_counter = INITIAL_TIMEOUT_COUNTER; struct bt_le_ext_adv *adv; struct bt_iso_big *big; @@ -106,7 +123,7 @@ int main(void) } /* Create a non-connectable advertising set */ - err = bt_le_ext_adv_create(BT_LE_EXT_ADV_NCONN, NULL, &adv); + err = bt_le_ext_adv_create(ext_adv_param, NULL, &adv); if (err) { printk("Failed to create advertising set (err %d)\n", err); return 0; @@ -120,7 +137,7 @@ int main(void) } /* Set periodic advertising parameters */ - err = bt_le_per_adv_set_param(adv, BT_LE_PER_ADV_DEFAULT); + err = bt_le_per_adv_set_param(adv, per_adv_param); if (err) { printk("Failed to set periodic advertising parameters" " (err %d)\n", err); diff --git a/samples/bluetooth/iso_broadcast_benchmark/src/broadcaster.c b/samples/bluetooth/iso_broadcast_benchmark/src/broadcaster.c index 32d5e86ca5f57a0..2f03528093fb6e5 100644 --- a/samples/bluetooth/iso_broadcast_benchmark/src/broadcaster.c +++ b/samples/bluetooth/iso_broadcast_benchmark/src/broadcaster.c @@ -1,17 +1,22 @@ /* - * Copyright (c) 2021 Nordic Semiconductor ASA + * Copyright (c) 2021-2024 Nordic Semiconductor ASA * * SPDX-License-Identifier: Apache-2.0 */ #include #include +#include + +#include #include #include #include #include #include +#include +#include LOG_MODULE_REGISTER(iso_broadcast_broadcaster, LOG_LEVEL_DBG); #define DEFAULT_BIS_RTN 2 @@ -613,13 +618,60 @@ static void iso_timer_timeout(struct k_work *work) seq_num++; } +static uint16_t calc_adv_interval(uint32_t sdu_interval_us) +{ + /* Default to 6 times the SDU interval and then reduce until we reach a reasonable maximum + * advertising interval (BT_GAP_PER_ADV_SLOW_INT_MAX) + * sdu_interval_us can never be larger than 1048ms (BT_ISO_SDU_INTERVAL_MAX) + * so a multiple of it will always be possible to keep under BT_GAP_PER_ADV_SLOW_INT_MAX + * (1200ms) + */ + + /* Convert from microseconds to advertising interval units (0.625ms)*/ + const uint32_t interval = BT_GAP_US_TO_ADV_INTERVAL(sdu_interval_us); + uint32_t adv_interval = interval * 6U; + + /* Ensure that the adv interval is between BT_GAP_PER_ADV_FAST_INT_MIN_1 and + * BT_GAP_PER_ADV_SLOW_INT_MAX for the sake of interopability + */ + while (adv_interval < BT_GAP_PER_ADV_FAST_INT_MIN_1) { + adv_interval += interval; + } + + while (adv_interval > BT_GAP_PER_ADV_SLOW_INT_MAX) { + adv_interval -= interval; + } + + /* If we cannot convert back then it's not a lossless conversion */ + if (big_create_param.framing == BT_ISO_FRAMING_UNFRAMED && + BT_GAP_ADV_INTERVAL_TO_US(interval) != sdu_interval_us) { + LOG_INF("Advertising interval of 0x04%x is not a multiple of the advertising " + "interval unit (0.625 ms) and may be subpar. Suggest to adjust SDU " + "interval %u to be a multiple of 0.625 ms", + adv_interval, sdu_interval_us); + } + + return adv_interval; +} + static int create_big(struct bt_le_ext_adv **adv, struct bt_iso_big **big) { + /* Some controllers work best when Extended Advertising interval is a multiple + * of the ISO Interval minus 10 ms (max. advertising random delay). This is + * required to place the AUX_ADV_IND PDUs in a non-overlapping interval with the + * Broadcast ISO radio events. + */ + const uint16_t adv_interval = calc_adv_interval(big_create_param.interval); + const uint16_t ext_adv_interval = adv_interval - BT_GAP_MS_TO_ADV_INTERVAL(10U); + const struct bt_le_adv_param *ext_adv_param = + BT_LE_ADV_PARAM(BT_LE_ADV_OPT_EXT_ADV, ext_adv_interval, ext_adv_interval, NULL); + const struct bt_le_per_adv_param *per_adv_param = + BT_LE_PER_ADV_PARAM(adv_interval, adv_interval, BT_LE_PER_ADV_OPT_NONE); int err; /* Create a non-connectable advertising set */ LOG_INF("Creating Extended Advertising set"); - err = bt_le_ext_adv_create(BT_LE_EXT_ADV_NCONN, NULL, adv); + err = bt_le_ext_adv_create(ext_adv_param, NULL, adv); if (err != 0) { LOG_ERR("Failed to create advertising set (err %d)", err); return err; @@ -634,7 +686,7 @@ static int create_big(struct bt_le_ext_adv **adv, struct bt_iso_big **big) LOG_INF("Setting Periodic Advertising parameters"); /* Set periodic advertising parameters */ - err = bt_le_per_adv_set_param(*adv, BT_LE_PER_ADV_DEFAULT); + err = bt_le_per_adv_set_param(*adv, per_adv_param); if (err != 0) { LOG_ERR("Failed to set periodic advertising parameters (err %d)", err); diff --git a/samples/bluetooth/iso_central/src/main.c b/samples/bluetooth/iso_central/src/main.c index 65d1abb4914f7ac..a9352363714c878 100644 --- a/samples/bluetooth/iso_central/src/main.c +++ b/samples/bluetooth/iso_central/src/main.c @@ -1,9 +1,10 @@ /* - * Copyright (c) 2021 2021 Nordic Semiconductor ASA + * Copyright (c) 2021-2024 Nordic Semiconductor ASA * * SPDX-License-Identifier: Apache-2.0 */ +#include #include #include #include @@ -90,6 +91,9 @@ static void iso_timer_timeout(struct k_work *work) static void device_found(const bt_addr_le_t *addr, int8_t rssi, uint8_t type, struct net_buf_simple *ad) { + const struct bt_le_conn_param *conn_param = + BT_LE_CONN_PARAM(BT_GAP_MS_TO_CONN_INTERVAL(60), BT_GAP_MS_TO_CONN_INTERVAL(60), 0, + BT_GAP_MS_TO_CONN_TIMEOUT(4000)); char addr_str[BT_ADDR_LE_STR_LEN]; int err; @@ -115,8 +119,7 @@ static void device_found(const bt_addr_le_t *addr, int8_t rssi, uint8_t type, return; } - err = bt_conn_le_create(addr, BT_CONN_LE_CREATE_CONN, BT_LE_CONN_PARAM_DEFAULT, - &default_conn); + err = bt_conn_le_create(addr, BT_CONN_LE_CREATE_CONN, conn_param, &default_conn); if (err) { printk("Create conn to %s failed (%u)\n", addr_str, err); start_scan(); diff --git a/samples/bluetooth/iso_connected_benchmark/src/main.c b/samples/bluetooth/iso_connected_benchmark/src/main.c index e4c1f7935f2ef14..1933033f8442bbe 100644 --- a/samples/bluetooth/iso_connected_benchmark/src/main.c +++ b/samples/bluetooth/iso_connected_benchmark/src/main.c @@ -5,9 +5,14 @@ */ #include +#include +#include #include #include +#include #include +#include +#include #include @@ -1046,6 +1051,12 @@ static int change_central_settings(void) static int central_create_connection(void) { + /* Give the controller a large range of intervals to pick from. In this benchmark sample we + * want to prioritize ISO over ACL, but will leave the actual choice up to the controller. + */ + const struct bt_le_conn_param *conn_param = + BT_LE_CONN_PARAM(BT_GAP_INIT_CONN_INT_MIN, BT_GAP_MS_TO_CONN_INTERVAL(500U), 0, + BT_GAP_MS_TO_CONN_TIMEOUT(4000)); int err; advertiser_found = false; @@ -1071,8 +1082,7 @@ static int central_create_connection(void) } LOG_INF("Connecting"); - err = bt_conn_le_create(&adv_addr, BT_CONN_LE_CREATE_CONN, - BT_LE_CONN_PARAM_DEFAULT, &default_conn); + err = bt_conn_le_create(&adv_addr, BT_CONN_LE_CREATE_CONN, conn_param, &default_conn); if (err != 0) { LOG_ERR("Create connection failed: %d", err); return err; @@ -1089,7 +1099,6 @@ static int central_create_connection(void) static int central_create_cig(void) { - struct bt_iso_connect_param connect_param[CONFIG_BT_ISO_MAX_CHAN]; int err; iso_conn_start_time = 0; @@ -1102,6 +1111,16 @@ static int central_create_cig(void) return err; } + return 0; +} + +static int central_connect_cis(void) +{ + struct bt_iso_connect_param connect_param[CONFIG_BT_ISO_MAX_CHAN]; + int err; + + iso_conn_start_time = 0; + LOG_INF("Connecting ISO channels"); for (int i = 0; i < cig_create_param.num_cis; i++) { @@ -1205,15 +1224,26 @@ static int run_central(void) } } + /* Creating the CIG before connecting verified that it's possible before establishing a + * connection, while also providing the controller information about our use case before + * creating the connection, which should provide additional information to the controller + * about which connection interval to use + */ + err = central_create_cig(); + if (err != 0) { + LOG_ERR("Failed to create CIG: %d", err); + return err; + } + err = central_create_connection(); if (err != 0) { LOG_ERR("Failed to create connection: %d", err); return err; } - err = central_create_cig(); + err = central_connect_cis(); if (err != 0) { - LOG_ERR("Failed to create CIG or connect CISes: %d", err); + LOG_ERR("Failed to connect CISes: %d", err); return err; } diff --git a/samples/boards/nordic/system_off/boards/nrf54l15dk_nrf54l05_cpuapp_retained_mem.overlay b/samples/boards/nordic/system_off/boards/nrf54l15dk_nrf54l05_cpuapp_retained_mem.overlay new file mode 100644 index 000000000000000..6f4a9be80f9bc04 --- /dev/null +++ b/samples/boards/nordic/system_off/boards/nrf54l15dk_nrf54l05_cpuapp_retained_mem.overlay @@ -0,0 +1,25 @@ +/ { + cpuapp_sram@20017000 { + compatible = "zephyr,memory-region", "mmio-sram"; + reg = <0x20017000 DT_SIZE_K(4)>; + zephyr,memory-region = "RetainedMem"; + status = "okay"; + + retainedmem0: retainedmem { + compatible = "zephyr,retained-ram"; + status = "okay"; + }; + }; + + aliases { + retainedmemdevice = &retainedmem0; + }; +}; + +&cpuapp_sram { + /* Shrink SRAM size to avoid overlap with retained memory region: + * 96 - 4 = 92KB = 0x17000 + */ + reg = <0x20000000 0x17000>; + ranges = <0x0 0x20000000 0x17000>; +}; diff --git a/samples/boards/nordic/system_off/boards/nrf54l15dk_nrf54l10_cpuapp_retained_mem.overlay b/samples/boards/nordic/system_off/boards/nrf54l15dk_nrf54l10_cpuapp_retained_mem.overlay new file mode 100644 index 000000000000000..9705cf335a7fbd3 --- /dev/null +++ b/samples/boards/nordic/system_off/boards/nrf54l15dk_nrf54l10_cpuapp_retained_mem.overlay @@ -0,0 +1,25 @@ +/ { + cpuapp_sram@2002f000 { + compatible = "zephyr,memory-region", "mmio-sram"; + reg = <0x2002f000 DT_SIZE_K(4)>; + zephyr,memory-region = "RetainedMem"; + status = "okay"; + + retainedmem0: retainedmem { + compatible = "zephyr,retained-ram"; + status = "okay"; + }; + }; + + aliases { + retainedmemdevice = &retainedmem0; + }; +}; + +&cpuapp_sram { + /* Shrink SRAM size to avoid overlap with retained memory region: + * 192 - 4 = 188KB = 0x2f000 + */ + reg = <0x20000000 0x2f000>; + ranges = <0x0 0x20000000 0x2f000>; +}; diff --git a/samples/boards/nordic/system_off/sample.yaml b/samples/boards/nordic/system_off/sample.yaml index ab6a12aeb16de93..32ce78c1c9e6508 100644 --- a/samples/boards/nordic/system_off/sample.yaml +++ b/samples/boards/nordic/system_off/sample.yaml @@ -8,6 +8,8 @@ tests: integration_platforms: - nrf52840dk/nrf52840 platform_allow: + - nrf54l15dk/nrf54l05/cpuapp + - nrf54l15dk/nrf54l10/cpuapp - nrf54l15dk/nrf54l15/cpuapp - nrf52840dk/nrf52840 - nrf52dk/nrf52832 diff --git a/samples/boards/st/power_mgmt/wkup_pins/sample.yaml b/samples/boards/st/power_mgmt/wkup_pins/sample.yaml index 1fb3ead82e72934..2924e8694c02274 100644 --- a/samples/boards/st/power_mgmt/wkup_pins/sample.yaml +++ b/samples/boards/st/power_mgmt/wkup_pins/sample.yaml @@ -10,3 +10,5 @@ tests: - nucleo_u575zi_q - nucleo_u5a5zj_q - nucleo_wl55jc + integration_platforms: + - nucleo_l4r5zi diff --git a/samples/drivers/counter/alarm/boards/ek_ra2a1.overlay b/samples/drivers/counter/alarm/boards/ek_ra2a1.overlay new file mode 100644 index 000000000000000..06bb88711ca5f47 --- /dev/null +++ b/samples/drivers/counter/alarm/boards/ek_ra2a1.overlay @@ -0,0 +1,15 @@ +/* + * Copyright (c) 2024 Renesas Electronics Corporation + * + * SPDX-License-Identifier: Apache-2.0 + */ + +&agt0 { + status = "okay"; + interrupts = <21 1>, <22 1>; + interrupt-names = "agti", "agtcmai"; + renesas,prescaler = <4>; + counter0: counter { + status = "okay"; + }; +}; diff --git a/samples/drivers/counter/alarm/boards/ek_ra4m2.overlay b/samples/drivers/counter/alarm/boards/ek_ra4m2.overlay new file mode 100644 index 000000000000000..fd9126b0a969a5a --- /dev/null +++ b/samples/drivers/counter/alarm/boards/ek_ra4m2.overlay @@ -0,0 +1,15 @@ +/* + * Copyright (c) 2024 Renesas Electronics Corporation + * + * SPDX-License-Identifier: Apache-2.0 + */ + +&agt0 { + status = "okay"; + interrupts = <83 1>, <84 1>; + interrupt-names = "agti", "agtcmai"; + renesas,prescaler = <4>; + counter0: counter { + status = "okay"; + }; +}; diff --git a/samples/drivers/counter/alarm/boards/ek_ra4m3.overlay b/samples/drivers/counter/alarm/boards/ek_ra4m3.overlay new file mode 100644 index 000000000000000..fd9126b0a969a5a --- /dev/null +++ b/samples/drivers/counter/alarm/boards/ek_ra4m3.overlay @@ -0,0 +1,15 @@ +/* + * Copyright (c) 2024 Renesas Electronics Corporation + * + * SPDX-License-Identifier: Apache-2.0 + */ + +&agt0 { + status = "okay"; + interrupts = <83 1>, <84 1>; + interrupt-names = "agti", "agtcmai"; + renesas,prescaler = <4>; + counter0: counter { + status = "okay"; + }; +}; diff --git a/samples/drivers/counter/alarm/boards/ek_ra4w1.overlay b/samples/drivers/counter/alarm/boards/ek_ra4w1.overlay new file mode 100644 index 000000000000000..06bb88711ca5f47 --- /dev/null +++ b/samples/drivers/counter/alarm/boards/ek_ra4w1.overlay @@ -0,0 +1,15 @@ +/* + * Copyright (c) 2024 Renesas Electronics Corporation + * + * SPDX-License-Identifier: Apache-2.0 + */ + +&agt0 { + status = "okay"; + interrupts = <21 1>, <22 1>; + interrupt-names = "agti", "agtcmai"; + renesas,prescaler = <4>; + counter0: counter { + status = "okay"; + }; +}; diff --git a/samples/drivers/counter/alarm/boards/ek_ra6m1.overlay b/samples/drivers/counter/alarm/boards/ek_ra6m1.overlay new file mode 100644 index 000000000000000..fd9126b0a969a5a --- /dev/null +++ b/samples/drivers/counter/alarm/boards/ek_ra6m1.overlay @@ -0,0 +1,15 @@ +/* + * Copyright (c) 2024 Renesas Electronics Corporation + * + * SPDX-License-Identifier: Apache-2.0 + */ + +&agt0 { + status = "okay"; + interrupts = <83 1>, <84 1>; + interrupt-names = "agti", "agtcmai"; + renesas,prescaler = <4>; + counter0: counter { + status = "okay"; + }; +}; diff --git a/samples/drivers/counter/alarm/boards/ek_ra6m2.overlay b/samples/drivers/counter/alarm/boards/ek_ra6m2.overlay new file mode 100644 index 000000000000000..fd9126b0a969a5a --- /dev/null +++ b/samples/drivers/counter/alarm/boards/ek_ra6m2.overlay @@ -0,0 +1,15 @@ +/* + * Copyright (c) 2024 Renesas Electronics Corporation + * + * SPDX-License-Identifier: Apache-2.0 + */ + +&agt0 { + status = "okay"; + interrupts = <83 1>, <84 1>; + interrupt-names = "agti", "agtcmai"; + renesas,prescaler = <4>; + counter0: counter { + status = "okay"; + }; +}; diff --git a/samples/drivers/counter/alarm/boards/ek_ra6m3.overlay b/samples/drivers/counter/alarm/boards/ek_ra6m3.overlay new file mode 100644 index 000000000000000..fd9126b0a969a5a --- /dev/null +++ b/samples/drivers/counter/alarm/boards/ek_ra6m3.overlay @@ -0,0 +1,15 @@ +/* + * Copyright (c) 2024 Renesas Electronics Corporation + * + * SPDX-License-Identifier: Apache-2.0 + */ + +&agt0 { + status = "okay"; + interrupts = <83 1>, <84 1>; + interrupt-names = "agti", "agtcmai"; + renesas,prescaler = <4>; + counter0: counter { + status = "okay"; + }; +}; diff --git a/samples/drivers/counter/alarm/boards/ek_ra6m4.overlay b/samples/drivers/counter/alarm/boards/ek_ra6m4.overlay new file mode 100644 index 000000000000000..fd9126b0a969a5a --- /dev/null +++ b/samples/drivers/counter/alarm/boards/ek_ra6m4.overlay @@ -0,0 +1,15 @@ +/* + * Copyright (c) 2024 Renesas Electronics Corporation + * + * SPDX-License-Identifier: Apache-2.0 + */ + +&agt0 { + status = "okay"; + interrupts = <83 1>, <84 1>; + interrupt-names = "agti", "agtcmai"; + renesas,prescaler = <4>; + counter0: counter { + status = "okay"; + }; +}; diff --git a/samples/drivers/counter/alarm/boards/ek_ra6m5.overlay b/samples/drivers/counter/alarm/boards/ek_ra6m5.overlay new file mode 100644 index 000000000000000..fd9126b0a969a5a --- /dev/null +++ b/samples/drivers/counter/alarm/boards/ek_ra6m5.overlay @@ -0,0 +1,15 @@ +/* + * Copyright (c) 2024 Renesas Electronics Corporation + * + * SPDX-License-Identifier: Apache-2.0 + */ + +&agt0 { + status = "okay"; + interrupts = <83 1>, <84 1>; + interrupt-names = "agti", "agtcmai"; + renesas,prescaler = <4>; + counter0: counter { + status = "okay"; + }; +}; diff --git a/samples/drivers/counter/alarm/boards/fpb_ra6e1.overlay b/samples/drivers/counter/alarm/boards/fpb_ra6e1.overlay new file mode 100644 index 000000000000000..fd9126b0a969a5a --- /dev/null +++ b/samples/drivers/counter/alarm/boards/fpb_ra6e1.overlay @@ -0,0 +1,15 @@ +/* + * Copyright (c) 2024 Renesas Electronics Corporation + * + * SPDX-License-Identifier: Apache-2.0 + */ + +&agt0 { + status = "okay"; + interrupts = <83 1>, <84 1>; + interrupt-names = "agti", "agtcmai"; + renesas,prescaler = <4>; + counter0: counter { + status = "okay"; + }; +}; diff --git a/samples/drivers/dac/boards/arduino_giga_r1_stm32h747xx_m7.overlay b/samples/drivers/dac/boards/arduino_giga_r1_stm32h747xx_m7.overlay new file mode 100644 index 000000000000000..688d98687763043 --- /dev/null +++ b/samples/drivers/dac/boards/arduino_giga_r1_stm32h747xx_m7.overlay @@ -0,0 +1,7 @@ +/ { + zephyr,user { + dac = <&dac1>; + dac-channel-id = <1>; + dac-resolution = <12>; + }; +}; diff --git a/samples/drivers/display/sample.yaml b/samples/drivers/display/sample.yaml index 4e22184dce89bd7..d242243257cdaf9 100644 --- a/samples/drivers/display/sample.yaml +++ b/samples/drivers/display/sample.yaml @@ -52,6 +52,8 @@ tests: - mimxrt1060_evk - mimxrt1050_evk - mimxrt1040_evk + integration_platforms: + - mimxrt1040_evk tags: display harness: console extra_args: SHIELD=rk043fn02h_ct diff --git a/samples/drivers/led/lp5569/README.rst b/samples/drivers/led/lp5569/README.rst index ecb04cf9965cd5b..f39fcd1678c633e 100644 --- a/samples/drivers/led/lp5569/README.rst +++ b/samples/drivers/led/lp5569/README.rst @@ -8,7 +8,10 @@ Overview ******** This sample controls 9 LEDs connected to an LP5569 driver. The sample turns -all LEDs on and switches all LEDs off again within a one second interval. +all LEDs on one by one with a 1 second delay between each. Then it fades all +LEDs until they are off again. Afterwards, it turns them all on at once, waits +a second, and turns them all back off. +This pattern then repeats indefinitely. Building and Running ******************** diff --git a/samples/drivers/led/lp5569/src/main.c b/samples/drivers/led/lp5569/src/main.c index fe18d5ee280aaba..bf18ef33b38779e 100644 --- a/samples/drivers/led/lp5569/src/main.c +++ b/samples/drivers/led/lp5569/src/main.c @@ -18,6 +18,7 @@ LOG_MODULE_REGISTER(app, CONFIG_LED_LOG_LEVEL); int main(void) { const struct device *const led_dev = DEVICE_DT_GET_ANY(ti_lp5569); + uint8_t ch_buf[9] = {0}; int i, ret; if (!led_dev) { @@ -32,7 +33,8 @@ int main(void) /* * Display a continuous pattern that turns on 9 LEDs at 1 s one by - * one until it reaches the end and turns off LEDs in reverse order. + * one until it reaches the end and fades off all LEDs. + * Afterwards, all LEDs get blinked once at the same time. */ LOG_INF("Testing 9 LEDs .."); @@ -59,6 +61,26 @@ int main(void) k_sleep(DELAY_TIME_BREATHING); } + + k_sleep(DELAY_TIME_ON); + + /* Turn on all LEDs at once to demonstrate write_channels */ + memset(ch_buf, 255, ARRAY_SIZE(ch_buf)); + ret = led_write_channels(led_dev, 0, ARRAY_SIZE(ch_buf), ch_buf); + if (ret) { + return ret; + } + + k_sleep(DELAY_TIME_ON); + + /* Turn off all LEDs at once to demonstrate write_channels */ + memset(ch_buf, 0, ARRAY_SIZE(ch_buf)); + ret = led_write_channels(led_dev, 0, ARRAY_SIZE(ch_buf), ch_buf); + if (ret) { + return ret; + } + + k_sleep(DELAY_TIME_ON); } return 0; } diff --git a/samples/drivers/watchdog/sample.yaml b/samples/drivers/watchdog/sample.yaml index 1d887396c3ca0ba..3021d84961a0371 100644 --- a/samples/drivers/watchdog/sample.yaml +++ b/samples/drivers/watchdog/sample.yaml @@ -112,3 +112,5 @@ tests: - s32z2xxdc2/s32z270/rtu1 - s32z2xxdc2@D/s32z270/rtu0 - s32z2xxdc2@D/s32z270/rtu1 + integration_platforms: + - s32z2xxdc2/s32z270/rtu0 diff --git a/samples/modules/thrift/hello/client/hello_client.py b/samples/modules/thrift/hello/client/hello_client.py index 06422347ff033ea..2c8d38186711044 100755 --- a/samples/modules/thrift/hello/client/hello_client.py +++ b/samples/modules/thrift/hello/client/hello_client.py @@ -14,12 +14,12 @@ import argparse import sys + sys.path.append('gen-py') -from thrift.protocol import TBinaryProtocol -from thrift.transport import TTransport -from thrift.transport import TSocket from hello import Hello +from thrift.protocol import TBinaryProtocol +from thrift.transport import TSocket, TTransport def parse_args(): diff --git a/samples/net/cellular_modem/server/te.py b/samples/net/cellular_modem/server/te.py index 1b6d2341e3b2dd8..465b0404eba8c41 100755 --- a/samples/net/cellular_modem/server/te.py +++ b/samples/net/cellular_modem/server/te.py @@ -2,6 +2,7 @@ # SPDX-License-Identifier: Apache-2.0 import signal + from te_udp_echo import TEUDPEcho from te_udp_receive import TEUDPReceive diff --git a/samples/net/cloud/aws_iot_mqtt/src/creds/convert_keys.py b/samples/net/cloud/aws_iot_mqtt/src/creds/convert_keys.py index e322007647ac2bf..04dc51f8047e675 100644 --- a/samples/net/cloud/aws_iot_mqtt/src/creds/convert_keys.py +++ b/samples/net/cloud/aws_iot_mqtt/src/creds/convert_keys.py @@ -1,8 +1,9 @@ # Copyright (c) 2023 Lucas Dietrich # SPDX-License-Identifier: Apache-2.0 -import os import glob +import os + def bin2array(name, fin, fout): with open(fin, 'rb') as f: diff --git a/samples/net/wifi/shell/boards/frdm_rw612.conf b/samples/net/wifi/shell/boards/frdm_rw612.conf index e9ba4d7df6f3408..8f40dd471fabd7e 100644 --- a/samples/net/wifi/shell/boards/frdm_rw612.conf +++ b/samples/net/wifi/shell/boards/frdm_rw612.conf @@ -90,8 +90,10 @@ CONFIG_WIFI_NM_MAX_MANAGED_INTERFACES=2 CONFIG_SAE_PWE_EARLY_EXIT=y CONFIG_WIFI_NM_HOSTAPD_AP=y CONFIG_WIFI_NM_WPA_SUPPLICANT_WPS=y +CONFIG_WIFI_NM_HOSTAPD_WPS=y CONFIG_WIFI_NM_WPA_SUPPLICANT_ROAMING=y CONFIG_WIFI_NM_WPA_SUPPLICANT_SKIP_DHCP_ON_ROAMING=y +CONFIG_WIFI_NM_HOSTAPD_CRYPTO_ENTERPRISE=y # Enable mbedtls CONFIG_MBEDTLS=y diff --git a/samples/net/wifi/shell/boards/rd_rw612_bga.conf b/samples/net/wifi/shell/boards/rd_rw612_bga.conf index 5ecd5b4f1e705bd..da51250fc0c91b2 100644 --- a/samples/net/wifi/shell/boards/rd_rw612_bga.conf +++ b/samples/net/wifi/shell/boards/rd_rw612_bga.conf @@ -89,8 +89,10 @@ CONFIG_WIFI_NM_MAX_MANAGED_INTERFACES=2 CONFIG_SAE_PWE_EARLY_EXIT=y CONFIG_WIFI_NM_HOSTAPD_AP=y CONFIG_WIFI_NM_WPA_SUPPLICANT_WPS=y +CONFIG_WIFI_NM_HOSTAPD_WPS=y CONFIG_WIFI_NM_WPA_SUPPLICANT_ROAMING=y CONFIG_WIFI_NM_WPA_SUPPLICANT_SKIP_DHCP_ON_ROAMING=y +CONFIG_WIFI_NM_HOSTAPD_CRYPTO_ENTERPRISE=y # Enable mbedtls CONFIG_MBEDTLS=y diff --git a/samples/net/zperf/sample.yaml b/samples/net/zperf/sample.yaml index 35fbfd42e6bfc72..a2e9ffbe70d987e 100644 --- a/samples/net/zperf/sample.yaml +++ b/samples/net/zperf/sample.yaml @@ -27,6 +27,8 @@ tests: - nucleo_f429zi - nucleo_f746zg - stm32h573i_dk + integration_platforms: + - stm32h573i_dk sample.net.zperf_no_shell: harness: net extra_configs: diff --git a/samples/sensor/accel_trig/sample.yaml b/samples/sensor/accel_trig/sample.yaml index 2ce9ba91575334f..9392668a5e0c29b 100644 --- a/samples/sensor/accel_trig/sample.yaml +++ b/samples/sensor/accel_trig/sample.yaml @@ -12,6 +12,14 @@ tests: \\(\\s*-?[0-9\\.]*,\\s*-?[0-9\\.]*,\\s*-?[0-9\\.]*\\)$" integration_platforms: - frdm_k64f # fxos8700 + platform_exclude: + - sensortile_box + - stm32f3_disco + - stm32f411e_disco + - b_l4s5i_iot01a + - disco_l475_iot1 + - stm32l562e_dk + - stm32wb5mm_dk sample.sensor.accel_trig.adxl362-trigger: harness: console tags: sensors diff --git a/samples/sensor/magn_trig/sample.yaml b/samples/sensor/magn_trig/sample.yaml index 3f010b7099d5c8c..8f4a27381a04d2a 100644 --- a/samples/sensor/magn_trig/sample.yaml +++ b/samples/sensor/magn_trig/sample.yaml @@ -12,3 +12,7 @@ tests: \\(\\s*-?[0-9\\.]*,\\s*-?[0-9\\.]*,\\s*-?[0-9\\.]*\\)$" integration_platforms: - frdm_k64f # fxos8700 + platform_exclude: + - sensortile_box + - stm32f3_disco + - stm32f411e_disco diff --git a/samples/subsys/canbus/isotp/sample.yaml b/samples/subsys/canbus/isotp/sample.yaml index 67d3901a23b5b02..dfeed3b4e1b046c 100644 --- a/samples/subsys/canbus/isotp/sample.yaml +++ b/samples/subsys/canbus/isotp/sample.yaml @@ -23,8 +23,6 @@ tests: - CONFIG_SAMPLE_LOOPBACK_MODE=y - CONFIG_SAMPLE_CAN_FD_MODE=y platform_allow: - - native_posix - - native_posix/native/64 - native_sim - native_sim/native/64 harness: console diff --git a/samples/subsys/display/lvgl/sample.yaml b/samples/subsys/display/lvgl/sample.yaml index 94b26bc10870384..2b862b06ebdd177 100644 --- a/samples/subsys/display/lvgl/sample.yaml +++ b/samples/subsys/display/lvgl/sample.yaml @@ -76,6 +76,8 @@ tests: - mimxrt1060_evk - mimxrt1050_evk - mimxrt1040_evk + integration_platforms: + - mimxrt1040_evk tags: display harness: console extra_args: SHIELD=rk043fn66hs_ctg @@ -87,6 +89,8 @@ tests: - mimxrt1060_evk - mimxrt1050_evk - mimxrt1040_evk + integration_platforms: + - mimxrt1040_evk tags: display harness: console extra_args: SHIELD=rk043fn02h_ct diff --git a/samples/subsys/ipc/openamp_rsc_table/src/main_remote.c b/samples/subsys/ipc/openamp_rsc_table/src/main_remote.c index c8d12092ace05aa..a28e017e9be7aac 100644 --- a/samples/subsys/ipc/openamp_rsc_table/src/main_remote.c +++ b/samples/subsys/ipc/openamp_rsc_table/src/main_remote.c @@ -299,7 +299,7 @@ void app_rpmsg_tty(void *arg1, void *arg2, void *arg3) k_sem_take(&data_tty_sem, K_FOREVER); if (tty_msg.len) { LOG_INF("[Linux TTY] incoming msg: %.*s", - tty_msg.len, (char *)tty_msg.data); + (int)tty_msg.len, (char *)tty_msg.data); snprintf(tx_buff, 13, "TTY 0x%04x: ", tty_ept.addr); memcpy(&tx_buff[12], tty_msg.data, tty_msg.len); rpmsg_send(&tty_ept, tx_buff, tty_msg.len + 12); diff --git a/samples/subsys/mgmt/mcumgr/smp_svr/sample.yaml b/samples/subsys/mgmt/mcumgr/smp_svr/sample.yaml index 058a5c581e87b83..a4342cab66ed46d 100644 --- a/samples/subsys/mgmt/mcumgr/smp_svr/sample.yaml +++ b/samples/subsys/mgmt/mcumgr/smp_svr/sample.yaml @@ -3,10 +3,10 @@ sample: name: smp svr common: sysbuild: true - harness: bluetooth - tags: bluetooth tests: sample.mcumgr.smp_svr.bt: + harness: bluetooth + tags: bluetooth extra_args: EXTRA_CONF_FILE="overlay-bt.conf" platform_allow: - nrf52dk/nrf52832 @@ -17,6 +17,8 @@ tests: - nrf52dk/nrf52832 - nrf52840dk/nrf52840 sample.mcumgr.smp_svr.bt_static_svc: + harness: bluetooth + tags: bluetooth extra_args: EXTRA_CONF_FILE="overlay-bt.conf" extra_configs: - CONFIG_MCUMGR_TRANSPORT_BT_DYNAMIC_SVC_REGISTRATION=n diff --git a/samples/subsys/nvs/boards/disco_l475_iot1.overlay b/samples/subsys/nvs/boards/disco_l475_iot1.overlay index 2c304977ce52961..786a8ff489a1023 100644 --- a/samples/subsys/nvs/boards/disco_l475_iot1.overlay +++ b/samples/subsys/nvs/boards/disco_l475_iot1.overlay @@ -5,7 +5,6 @@ */ -/delete-node/ &scratch_partition; /delete-node/ &storage_partition; / { diff --git a/samples/subsys/nvs/boards/nucleo_f429zi.overlay b/samples/subsys/nvs/boards/nucleo_f429zi.overlay index bf5a3ad768b885a..43960ce3df6d5f0 100644 --- a/samples/subsys/nvs/boards/nucleo_f429zi.overlay +++ b/samples/subsys/nvs/boards/nucleo_f429zi.overlay @@ -4,8 +4,6 @@ * SPDX-License-Identifier: Apache-2.0 */ -/delete-node/ &storage_partition; - &flash0 { partitions { /* Set 48KB of storage at the beginning of bank2 in order to have 3 sectors smaller than 32K diff --git a/samples/subsys/profiling/perf/pytest/test_perf.py b/samples/subsys/profiling/perf/pytest/test_perf.py index 1bb4c6a7cb00293..eff25f5d156bfad 100755 --- a/samples/subsys/profiling/perf/pytest/test_perf.py +++ b/samples/subsys/profiling/perf/pytest/test_perf.py @@ -7,8 +7,7 @@ import logging import re -from twister_harness import Shell -from twister_harness import DeviceAdapter +from twister_harness import DeviceAdapter, Shell logger = logging.getLogger(__name__) diff --git a/samples/subsys/settings/boards/nrf54l15dk_nrf54l05_cpuapp.conf b/samples/subsys/settings/boards/nrf54l15dk_nrf54l05_cpuapp.conf new file mode 100644 index 000000000000000..3746c13c741b080 --- /dev/null +++ b/samples/subsys/settings/boards/nrf54l15dk_nrf54l05_cpuapp.conf @@ -0,0 +1,2 @@ +CONFIG_NVS=y +CONFIG_SETTINGS_NVS=y diff --git a/samples/subsys/settings/boards/nrf54l15dk_nrf54l10_cpuapp.conf b/samples/subsys/settings/boards/nrf54l15dk_nrf54l10_cpuapp.conf new file mode 100644 index 000000000000000..3746c13c741b080 --- /dev/null +++ b/samples/subsys/settings/boards/nrf54l15dk_nrf54l10_cpuapp.conf @@ -0,0 +1,2 @@ +CONFIG_NVS=y +CONFIG_SETTINGS_NVS=y diff --git a/samples/subsys/settings/sample.yaml b/samples/subsys/settings/sample.yaml index 932716da9dd2ec2..58367465166610a 100644 --- a/samples/subsys/settings/sample.yaml +++ b/samples/subsys/settings/sample.yaml @@ -10,6 +10,8 @@ tests: - native_sim - native_sim/native/64 - mr_canhubk3 + - nrf54l15dk/nrf54l05/cpuapp + - nrf54l15dk/nrf54l10/cpuapp - nrf54l15dk/nrf54l15/cpuapp - nrf54h20dk/nrf54h20/cpuapp integration_platforms: diff --git a/samples/subsys/testsuite/pytest/basic/pytest/conftest.py b/samples/subsys/testsuite/pytest/basic/pytest/conftest.py index 75b5c585273088a..8a65d9250b8148d 100644 --- a/samples/subsys/testsuite/pytest/basic/pytest/conftest.py +++ b/samples/subsys/testsuite/pytest/basic/pytest/conftest.py @@ -4,6 +4,7 @@ import pytest + # add option "--cmdopt" to pytest, or it will report "unknown option" # this option is passed from twister. def pytest_addoption(parser): diff --git a/samples/subsys/zbus/remote_mock/remote_mock.py b/samples/subsys/zbus/remote_mock/remote_mock.py index 71b0d839ce1c90b..92cb7dd53c2c010 100755 --- a/samples/subsys/zbus/remote_mock/remote_mock.py +++ b/samples/subsys/zbus/remote_mock/remote_mock.py @@ -1,10 +1,11 @@ #!/usr/bin/env python3 # Copyright (c) 2022 Rodrigo Peixoto # SPDX-License-Identifier: Apache-2.0 -import serial +import argparse import json from time import sleep -import argparse + +import serial j = """ [ diff --git a/samples/subsys/zbus/uart_bridge/decoder.py b/samples/subsys/zbus/uart_bridge/decoder.py index 64a7df7bdb88341..3a65e3786fed111 100755 --- a/samples/subsys/zbus/uart_bridge/decoder.py +++ b/samples/subsys/zbus/uart_bridge/decoder.py @@ -1,9 +1,10 @@ #!/usr/bin/env python3 # Copyright (c) 2022 Rodrigo Peixoto # SPDX-License-Identifier: Apache-2.0 -import serial -import json import argparse +import json + +import serial j = """ [ diff --git a/samples/tfm_integration/config_build/sample.yaml b/samples/tfm_integration/config_build/sample.yaml index 424b9c27ae66fac..e19873a174f4884 100644 --- a/samples/tfm_integration/config_build/sample.yaml +++ b/samples/tfm_integration/config_build/sample.yaml @@ -5,11 +5,12 @@ common: tags: - trusted-firmware-m platform_allow: - - mps2/an521/cpu0/ns - v2m_musca_s1/musca_s1/ns - nrf5340dk/nrf5340/cpuapp/ns - nrf9160dk/nrf9160/ns - bl5340_dvk/nrf5340/cpuapp/ns + integration_platforms: + - nrf5340dk/nrf5340/cpuapp/ns harness: console harness_config: type: one_line diff --git a/samples/tfm_integration/psa_crypto/sample.yaml b/samples/tfm_integration/psa_crypto/sample.yaml index 37a6aeaf234f4ac..ff5448cc5e6cfd3 100644 --- a/samples/tfm_integration/psa_crypto/sample.yaml +++ b/samples/tfm_integration/psa_crypto/sample.yaml @@ -20,6 +20,8 @@ tests: - nrf9160dk/nrf9160/ns - stm32l562e_dk/stm32l562xx/ns - bl5340_dvk/nrf5340/cpuapp/ns + integration_platforms: + - mps2/an521/cpu0/ns harness: console harness_config: type: multi_line diff --git a/scripts/build/gen_syscalls.py b/scripts/build/gen_syscalls.py index 13dc1448a1f2906..607445ce129cdfb 100755 --- a/scripts/build/gen_syscalls.py +++ b/scripts/build/gen_syscalls.py @@ -345,7 +345,7 @@ def marshall_defs(func_name, func_type, args): else: mrsh += "\t\t" + "uintptr_t arg3, uintptr_t arg4, void *more, void *ssf)\n" mrsh += "{\n" - mrsh += "\t" + "_current->syscall_frame = ssf;\n" + mrsh += "\t" + "arch_current_thread()->syscall_frame = ssf;\n" for unused_arg in range(nmrsh, 6): mrsh += "\t(void) arg%d;\t/* unused */\n" % unused_arg @@ -371,7 +371,7 @@ def marshall_defs(func_name, func_type, args): if func_type == "void": mrsh += "\t" + "%s;\n" % vrfy_call - mrsh += "\t" + "_current->syscall_frame = NULL;\n" + mrsh += "\t" + "arch_current_thread()->syscall_frame = NULL;\n" mrsh += "\t" + "return 0;\n" else: mrsh += "\t" + "%s ret = %s;\n" % (func_type, vrfy_call) @@ -380,10 +380,10 @@ def marshall_defs(func_name, func_type, args): ptr = "((uint64_t *)%s)" % mrsh_rval(nmrsh - 1, nmrsh) mrsh += "\t" + "K_OOPS(K_SYSCALL_MEMORY_WRITE(%s, 8));\n" % ptr mrsh += "\t" + "*%s = ret;\n" % ptr - mrsh += "\t" + "_current->syscall_frame = NULL;\n" + mrsh += "\t" + "arch_current_thread()->syscall_frame = NULL;\n" mrsh += "\t" + "return 0;\n" else: - mrsh += "\t" + "_current->syscall_frame = NULL;\n" + mrsh += "\t" + "arch_current_thread()->syscall_frame = NULL;\n" mrsh += "\t" + "return (uintptr_t) ret;\n" mrsh += "}\n" diff --git a/scripts/check_maintainers.py b/scripts/check_maintainers.py index 8b393b0ec81ebf7..d7eec12d7a74f16 100755 --- a/scripts/check_maintainers.py +++ b/scripts/check_maintainers.py @@ -7,9 +7,10 @@ import argparse import sys -from github_helpers import get_github_object from get_maintainer import Maintainers from github.GithubException import UnknownObjectException +from github_helpers import get_github_object + def parse_args(): parser = argparse.ArgumentParser( diff --git a/scripts/ci/check_compliance.py b/scripts/ci/check_compliance.py index 40b90e2aa392041..8c34c1d6899565d 100755 --- a/scripts/ci/check_compliance.py +++ b/scripts/ci/check_compliance.py @@ -1657,7 +1657,7 @@ def run(self): f"ruff check --force-exclude --output-format=json {file}", check=True, stdout=subprocess.PIPE, - stderr=subprocess.STDOUT, + stderr=subprocess.DEVNULL, shell=True, cwd=GIT_TOP, ) diff --git a/scripts/coredump/gdbstubs/__init__.py b/scripts/coredump/gdbstubs/__init__.py index 14f75831c6f47b7..51c0c50e59618d3 100644 --- a/scripts/coredump/gdbstubs/__init__.py +++ b/scripts/coredump/gdbstubs/__init__.py @@ -4,12 +4,12 @@ # # SPDX-License-Identifier: Apache-2.0 -from gdbstubs.arch.x86 import GdbStub_x86 -from gdbstubs.arch.x86_64 import GdbStub_x86_64 +from gdbstubs.arch.arm64 import GdbStub_ARM64 from gdbstubs.arch.arm_cortex_m import GdbStub_ARM_CortexM from gdbstubs.arch.risc_v import GdbStub_RISC_V +from gdbstubs.arch.x86 import GdbStub_x86 +from gdbstubs.arch.x86_64 import GdbStub_x86_64 from gdbstubs.arch.xtensa import GdbStub_Xtensa -from gdbstubs.arch.arm64 import GdbStub_ARM64 class TgtCode: diff --git a/scripts/dts/python-devicetree/src/devicetree/edtlib.py b/scripts/dts/python-devicetree/src/devicetree/edtlib.py index 46c18ce52624e1a..30c936b373360fb 100644 --- a/scripts/dts/python-devicetree/src/devicetree/edtlib.py +++ b/scripts/dts/python-devicetree/src/devicetree/edtlib.py @@ -1019,8 +1019,6 @@ def __init__( # Public, some of which are initialized properly later: self.edt: 'EDT' = edt self.dep_ordinal: int = -1 - self.matching_compat: Optional[str] = None - self.binding_path: Optional[str] = None self.compats: List[str] = compats self.ranges: List[Range] = [] self.regs: List[Register] = [] @@ -1139,6 +1137,20 @@ def read_only(self) -> bool: "See the class docstring" return "read-only" in self._node.props + @property + def matching_compat(self) -> Optional[str]: + "See the class docstring" + if self._binding: + return self._binding.compatible + return None + + @property + def binding_path(self) -> Optional[str]: + "See the class docstring" + if self._binding: + return self._binding.path + return None + @property def aliases(self) -> List[str]: "See the class docstring" @@ -1258,12 +1270,9 @@ def __repr__(self) -> str: return f"" def _init_binding(self) -> None: - # Initializes Node.matching_compat, Node._binding, and - # Node.binding_path. - # - # Node._binding holds the data from the node's binding file, in the - # format returned by PyYAML (plain Python lists, dicts, etc.), or None - # if the node has no binding. + # Initializes Node._binding. It holds data from the node's binding file, + # in the format returned by PyYAML (plain Python lists, dicts, etc.), or + # None if the node has no binding. # This relies on the parent of the node having already been # initialized, which is guaranteed by going through the nodes in @@ -1295,8 +1304,6 @@ def _init_binding(self) -> None: else: continue - self.binding_path = binding.path - self.matching_compat = compat self._binding = binding return else: @@ -1307,13 +1314,10 @@ def _init_binding(self) -> None: binding_from_parent = self._binding_from_parent() if binding_from_parent: self._binding = binding_from_parent - self.binding_path = self._binding.path - self.matching_compat = self._binding.compatible - return # No binding found - self._binding = self.binding_path = self.matching_compat = None + self._binding = None def _binding_from_properties(self) -> None: # Sets up a Binding object synthesized from the properties in the node. @@ -1354,8 +1358,6 @@ def _binding_from_properties(self) -> None: raw['properties'][name] = pp # Set up Node state. - self.binding_path = None - self.matching_compat = None self.compats = [] self._binding = Binding(None, {}, raw=raw, require_compatible=False) diff --git a/scripts/generate_usb_vif/constants/xml_constants.py b/scripts/generate_usb_vif/constants/xml_constants.py index 2aeeefe9cd5e6bf..1c9dc0475578f13 100644 --- a/scripts/generate_usb_vif/constants/xml_constants.py +++ b/scripts/generate_usb_vif/constants/xml_constants.py @@ -5,8 +5,7 @@ """This file contains XML constants defined to be used by generate_vif.py""" -from constants import other_constants -from constants import vif_element_constants +from constants import other_constants, vif_element_constants XML_ENCODING = "utf-8" XML_ELEMENT_NAME_PREFIX = "vif" diff --git a/scripts/kconfig/kconfig.py b/scripts/kconfig/kconfig.py index c0de8245cabd829..feb0b447a884f68 100755 --- a/scripts/kconfig/kconfig.py +++ b/scripts/kconfig/kconfig.py @@ -23,8 +23,17 @@ # Zephyr doesn't use tristate symbols. They're supported here just to make the # script a bit more generic. -from kconfiglib import Kconfig, split_expr, expr_value, expr_str, BOOL, \ - TRISTATE, TRI_TO_STR, AND, OR +from kconfiglib import ( + AND, + BOOL, + OR, + TRI_TO_STR, + TRISTATE, + Kconfig, + expr_str, + expr_value, + split_expr, +) def main(): diff --git a/scripts/logging/dictionary/log_parser_uart.py b/scripts/logging/dictionary/log_parser_uart.py index 6426644096bb7c7..28fabc128ea1744 100755 --- a/scripts/logging/dictionary/log_parser_uart.py +++ b/scripts/logging/dictionary/log_parser_uart.py @@ -12,13 +12,13 @@ the log messages. """ -import serial -import time import argparse import logging import sys +import time import parserlib +import serial LOGGER_FORMAT = "%(message)s" logger = logging.getLogger("parser") diff --git a/scripts/logging/dictionary/parserlib.py b/scripts/logging/dictionary/parserlib.py index 2404aab7961100a..ad6c4073ff81380 100755 --- a/scripts/logging/dictionary/parserlib.py +++ b/scripts/logging/dictionary/parserlib.py @@ -12,8 +12,8 @@ input binary data to the log using log database. """ -import sys import logging +import sys import dictionary_parser from dictionary_parser.log_database import LogDatabase diff --git a/scripts/pylib/pytest-twister-harness/src/twister_harness/helpers/mcumgr.py b/scripts/pylib/pytest-twister-harness/src/twister_harness/helpers/mcumgr.py index 038c16a4fc8de15..45551dd52b69017 100755 --- a/scripts/pylib/pytest-twister-harness/src/twister_harness/helpers/mcumgr.py +++ b/scripts/pylib/pytest-twister-harness/src/twister_harness/helpers/mcumgr.py @@ -6,10 +6,9 @@ import logging import re import shlex - -from subprocess import check_output, getstatusoutput -from pathlib import Path from dataclasses import dataclass +from pathlib import Path +from subprocess import check_output, getstatusoutput logger = logging.getLogger(__name__) diff --git a/scripts/pylib/pytest-twister-harness/tests/fixtures/mcumgr_fixture_test.py b/scripts/pylib/pytest-twister-harness/tests/fixtures/mcumgr_fixture_test.py index e8aaabe8fe1b38e..69c387613913661 100644 --- a/scripts/pylib/pytest-twister-harness/tests/fixtures/mcumgr_fixture_test.py +++ b/scripts/pylib/pytest-twister-harness/tests/fixtures/mcumgr_fixture_test.py @@ -2,10 +2,10 @@ # # SPDX-License-Identifier: Apache-2.0 -import pytest import textwrap - from unittest import mock + +import pytest from twister_harness.helpers.mcumgr import MCUmgr, MCUmgrException diff --git a/scripts/pylib/pytest-twister-harness/tests/helpers/shell_mcuboot_command_parser_test.py b/scripts/pylib/pytest-twister-harness/tests/helpers/shell_mcuboot_command_parser_test.py index c6ebf46c2c2509e..bdad7fc68a394db 100644 --- a/scripts/pylib/pytest-twister-harness/tests/helpers/shell_mcuboot_command_parser_test.py +++ b/scripts/pylib/pytest-twister-harness/tests/helpers/shell_mcuboot_command_parser_test.py @@ -4,7 +4,7 @@ import textwrap -from twister_harness.helpers.shell import ShellMCUbootCommandParsed, ShellMCUbootArea +from twister_harness.helpers.shell import ShellMCUbootArea, ShellMCUbootCommandParsed def test_if_mcuboot_command_output_is_parsed_two_areas() -> None: diff --git a/scripts/pylib/twister/twisterlib/constants.py b/scripts/pylib/twister/twisterlib/constants.py new file mode 100644 index 000000000000000..4ffcb5b6939bde5 --- /dev/null +++ b/scripts/pylib/twister/twisterlib/constants.py @@ -0,0 +1,20 @@ +#!/usr/bin/env python3 +# +# Copyright (c) 2024 Arm Limited (or its affiliates). All rights reserved. +# +# SPDX-License-Identifier: Apache-2.0 + +SUPPORTED_SIMS = [ + "mdb-nsim", + "nsim", + "renode", + "qemu", + "tsim", + "armfvp", + "xt-sim", + "native", + "custom", + "simics", +] +SUPPORTED_SIMS_IN_PYTEST = ['native', 'qemu'] +SUPPORTED_SIMS_WITH_EXEC = ['nsim', 'mdb-nsim', 'renode', 'tsim', 'native', 'simics', 'custom'] diff --git a/scripts/pylib/twister/twisterlib/environment.py b/scripts/pylib/twister/twisterlib/environment.py index 2b330caf2ab3340..7d55c0f8d27fdc2 100644 --- a/scripts/pylib/twister/twisterlib/environment.py +++ b/scripts/pylib/twister/twisterlib/environment.py @@ -1,7 +1,7 @@ #!/usr/bin/env python3 # vim: set syntax=python ts=4 : # -# Copyright (c) 2018 Intel Corporation +# Copyright (c) 2018-2024 Intel Corporation # Copyright 2022 NXP # Copyright (c) 2024 Arm Limited (or its affiliates). All rights reserved. # @@ -20,6 +20,7 @@ from pathlib import Path from typing import Generator, List +from twisterlib.constants import SUPPORTED_SIMS from twisterlib.coverage import supported_coverage_formats logger = logging.getLogger('twister') @@ -71,7 +72,7 @@ def norm_path(astring): return newstring -def add_parse_arguments(parser = None): +def add_parse_arguments(parser = None) -> argparse.ArgumentParser: if parser is None: parser = argparse.ArgumentParser( description=__doc__, @@ -149,7 +150,8 @@ def add_parse_arguments(parser = None): test_plan_report_xor.add_argument("--list-tests", action="store_true", help="""List of all sub-test functions recursively found in all --testsuite-root arguments. Note different sub-tests can share - the same section name and come from different directories. + the same test scenario identifier (section.subsection) + and come from different directories. The output is flattened and reports --sub-test names only, not their directories. For instance net.socket.getaddrinfo_ok and net.socket.fd_set belong to different directories. @@ -179,6 +181,13 @@ def add_parse_arguments(parser = None): --device-testing """) + run_group_option.add_argument( + "--simulation", dest="sim_name", choices=SUPPORTED_SIMS, + help="Selects which simulation to use. Must match one of the names defined in the board's " + "manifest. If multiple simulator are specified in the selected board and this " + "argument is not passed, then the first simulator is selected.") + + device.add_argument("--device-serial", help="""Serial device for accessing the board (e.g., /dev/ttyACM0) @@ -239,17 +248,22 @@ def add_parse_arguments(parser = None): test_xor_subtest.add_argument( "-s", "--test", "--scenario", action="append", type = norm_path, - help="Run only the specified testsuite scenario. These are named by " - "") + help="""Run only the specified test suite scenario. These are named by + 'path/relative/to/Zephyr/base/section.subsection_in_testcase_yaml', + or just 'section.subsection' identifier. With '--testsuite-root' option + the scenario will be found faster. + """) test_xor_subtest.add_argument( "--sub-test", action="append", - help="""Recursively find sub-test functions and run the entire - test section where they were found, including all sibling test + help="""Recursively find sub-test functions (test cases) and run the entire + test scenario (section.subsection) where they were found, including all sibling test functions. Sub-tests are named by: - section.name.in.testcase.yaml.function_name_without_test_prefix - Example: In kernel.fifo.fifo_loop: 'kernel.fifo' is a section name - and 'fifo_loop' is a name of a function found in main.c without test prefix. + 'section.subsection_in_testcase_yaml.ztest_suite.ztest_without_test_prefix'. + Example_1: 'kernel.fifo.fifo_api_1cpu.fifo_loop' where 'kernel.fifo' is a test scenario + name (section.subsection) and 'fifo_api_1cpu.fifo_loop' is + a Ztest suite_name.test_name identificator. + Example_2: 'debug.coredump.logging_backend' is a standalone test scenario name. """) parser.add_argument( @@ -805,7 +819,7 @@ def add_parse_arguments(parser = None): return parser -def parse_arguments(parser, args, options = None, on_init=True): +def parse_arguments(parser: argparse.ArgumentParser, args, options = None, on_init=True) -> argparse.Namespace: if options is None: options = parser.parse_args(args) @@ -952,7 +966,7 @@ def strip_ansi_sequences(s: str) -> str: class TwisterEnv: - def __init__(self, options, default_options=None) -> None: + def __init__(self, options : argparse.Namespace, default_options=None) -> None: self.version = "Unknown" self.toolchain = None self.commit_date = "Unknown" diff --git a/scripts/pylib/twister/twisterlib/handlers.py b/scripts/pylib/twister/twisterlib/handlers.py index 1c92e9f5b6dc25d..9a6fa9abb39c862 100755 --- a/scripts/pylib/twister/twisterlib/handlers.py +++ b/scripts/pylib/twister/twisterlib/handlers.py @@ -49,9 +49,6 @@ logger = logging.getLogger('twister') logger.setLevel(logging.DEBUG) -SUPPORTED_SIMS = ["mdb-nsim", "nsim", "renode", "qemu", "tsim", "armfvp", "xt-sim", "native", "custom", "simics"] -SUPPORTED_SIMS_IN_PYTEST = ['native', 'qemu'] - def terminate_process(proc): """ @@ -242,6 +239,7 @@ def _output_handler(self, proc, harness): self.terminate(proc) def _create_command(self, robot_test): + if robot_test: keywords = os.path.join(self.options.coverage_basedir, 'tests/robot/common.robot') elf = os.path.join(self.build_dir, "zephyr/zephyr.elf") @@ -263,8 +261,14 @@ def _create_command(self, robot_test): "--variable", "RESC:@" + resc, "--variable", "UART:" + uart] elif self.call_make_run: - command = [self.generator_cmd, "-C", self.get_default_domain_build_dir(), "run"] + if self.options.sim_name: + target = f"run_{self.options.sim_name}" + else: + target = "run" + + command = [self.generator_cmd, "-C", self.get_default_domain_build_dir(), target] elif self.instance.testsuite.type == "unit": + assert self.binary, "Missing binary in unit testsuite." command = [self.binary] else: binary = os.path.join(self.get_default_domain_build_dir(), "zephyr", "zephyr.exe") diff --git a/scripts/pylib/twister/twisterlib/harness.py b/scripts/pylib/twister/twisterlib/harness.py index 2629cdfb83fafa4..74272c5054f9e31 100644 --- a/scripts/pylib/twister/twisterlib/harness.py +++ b/scripts/pylib/twister/twisterlib/harness.py @@ -20,10 +20,10 @@ from twisterlib.reports import ReportStatus from twisterlib.error import ConfigurationError, StatusAttributeError from twisterlib.environment import ZEPHYR_BASE, PYTEST_PLUGIN_INSTALLED -from twisterlib.handlers import Handler, terminate_process, SUPPORTED_SIMS_IN_PYTEST +from twisterlib.handlers import Handler, terminate_process from twisterlib.statuses import TwisterStatus from twisterlib.testinstance import TestInstance - +from twisterlib.constants import SUPPORTED_SIMS_IN_PYTEST logger = logging.getLogger('twister') logger.setLevel(logging.DEBUG) @@ -31,7 +31,6 @@ _WINDOWS = platform.system() == 'Windows' -result_re = re.compile(r".*(PASS|FAIL|SKIP) - (test_)?(\S*) in (\d*[.,]?\d*) seconds") class Harness: GCOV_START = "GCOV_COVERAGE_DUMP_START" GCOV_END = "GCOV_COVERAGE_DUMP_END" @@ -59,12 +58,19 @@ def __init__(self): self.ztest = False self.detected_suite_names = [] self.run_id = None + self.started_suites = {} + self.started_cases = {} self.matched_run_id = False self.run_id_exists = False self.instance: TestInstance | None = None self.testcase_output = "" self._match = False + + @property + def trace(self) -> bool: + return self.instance.handler.options.verbose > 2 + @property def status(self) -> TwisterStatus: return self._status @@ -710,42 +716,124 @@ def _check_result(self, line): class Test(Harness): __test__ = False # for pytest to skip this class when collects tests - RUN_PASSED = "PROJECT EXECUTION SUCCESSFUL" - RUN_FAILED = "PROJECT EXECUTION FAILED" - test_suite_start_pattern = r"Running TESTSUITE (?P.*)" - ZTEST_START_PATTERN = r"START - (test_)?([a-zA-Z0-9_-]+)" - def handle(self, line): - test_suite_match = re.search(self.test_suite_start_pattern, line) - if test_suite_match: - suite_name = test_suite_match.group("suite_name") + test_suite_start_pattern = re.compile(r"Running TESTSUITE (?P\S*)") + test_suite_end_pattern = re.compile(r"TESTSUITE (?P\S*)\s+(?Psucceeded|failed)") + test_case_start_pattern = re.compile(r"START - (test_)?([a-zA-Z0-9_-]+)") + test_case_end_pattern = re.compile(r".*(PASS|FAIL|SKIP) - (test_)?(\S*) in (\d*[.,]?\d*) seconds") + test_suite_summary_pattern = re.compile(r"SUITE (?P\S*) - .* \[(?P\S*)\]: .* duration = (\d*[.,]?\d*) seconds") + test_case_summary_pattern = re.compile(r" - (PASS|FAIL|SKIP) - \[([^\.]*).(test_)?(\S*)\] duration = (\d*[.,]?\d*) seconds") + + + def get_testcase(self, tc_name, phase, ts_name=None): + """ Search a Ztest case among detected in the test image binary + expecting the same test names as already known from the ELF. + Track suites and cases unexpectedly found in the log. + """ + ts_names = self.started_suites.keys() + if ts_name: + if ts_name not in self.instance.testsuite.ztest_suite_names: + logger.warning(f"On {phase}: unexpected Ztest suite '{ts_name}' " + f"not present among: {self.instance.testsuite.ztest_suite_names}") + if ts_name not in self.detected_suite_names: + if self.trace: + logger.debug(f"On {phase}: detected new Ztest suite '{ts_name}'") + self.detected_suite_names.append(ts_name) + ts_names = [ ts_name ] if ts_name in ts_names else [] + + # Firstly try to match the test case ID to the first running Ztest suite with this test name. + for ts_name_ in ts_names: + if self.started_suites[ts_name_]['count'] < (0 if phase == 'TS_SUM' else 1): + continue + tc_fq_id = "{}.{}.{}".format(self.id, ts_name_, tc_name) + if tc := self.instance.get_case_by_name(tc_fq_id): + if self.trace: + logger.debug(f"On {phase}: Ztest case '{tc_name}' matched to '{tc_fq_id}") + return tc + logger.debug(f"On {phase}: Ztest case '{tc_name}' is not known in {self.started_suites} running suite(s).") + tc_id = "{}.{}".format(self.id, tc_name) + return self.instance.get_case_or_create(tc_id) + + def start_suite(self, suite_name): + if suite_name not in self.detected_suite_names: self.detected_suite_names.append(suite_name) + if suite_name not in self.instance.testsuite.ztest_suite_names: + logger.warning(f"Unexpected Ztest suite '{suite_name}'") + if suite_name in self.started_suites: + if self.started_suites[suite_name]['count'] > 0: + logger.warning(f"Already STARTED '{suite_name}':{self.started_suites[suite_name]}") + elif self.trace: + logger.debug(f"START suite '{suite_name}'") + self.started_suites[suite_name]['count'] += 1 + self.started_suites[suite_name]['repeat'] += 1 + else: + self.started_suites[suite_name] = { 'count': 1, 'repeat': 0 } + + def end_suite(self, suite_name, phase='', suite_status=None): + if suite_name in self.started_suites: + if phase == 'TS_SUM' and self.started_suites[suite_name]['count'] == 0: + return + if self.started_suites[suite_name]['count'] < 1: + logger.error(f"Already ENDED {phase} suite '{suite_name}':{self.started_suites[suite_name]}") + elif self.trace: + logger.debug(f"END {phase} suite '{suite_name}':{self.started_suites[suite_name]}") + self.started_suites[suite_name]['count'] -= 1 + elif suite_status == 'SKIP': + self.start_suite(suite_name) # register skipped suites at their summary end + self.started_suites[suite_name]['count'] -= 1 + else: + logger.warning(f"END {phase} suite '{suite_name}' without START detected") - testcase_match = re.search(self.ZTEST_START_PATTERN, line) - if testcase_match: - name = "{}.{}".format(self.id, testcase_match.group(2)) - tc = self.instance.get_case_or_create(name) + def start_case(self, tc_name): + if tc_name in self.started_cases: + if self.started_cases[tc_name]['count'] > 0: + logger.warning(f"Already STARTED '{tc_name}':{self.started_cases[tc_name]}") + self.started_cases[tc_name]['count'] += 1 + else: + self.started_cases[tc_name] = { 'count': 1 } + + def end_case(self, tc_name, phase=''): + if tc_name in self.started_cases: + if phase == 'TS_SUM' and self.started_cases[tc_name]['count'] == 0: + return + if self.started_cases[tc_name]['count'] < 1: + logger.error(f"Already ENDED {phase} case '{tc_name}':{self.started_cases[tc_name]}") + elif self.trace: + logger.debug(f"END {phase} case '{tc_name}':{self.started_cases[tc_name]}") + self.started_cases[tc_name]['count'] -= 1 + elif phase != 'TS_SUM': + logger.warning(f"END {phase} case '{tc_name}' without START detected") + + + def handle(self, line): + testcase_match = None + if self._match: + self.testcase_output += line + "\n" + + if test_suite_start_match := re.search(self.test_suite_start_pattern, line): + self.start_suite(test_suite_start_match.group("suite_name")) + elif test_suite_end_match := re.search(self.test_suite_end_pattern, line): + suite_name=test_suite_end_match.group("suite_name") + self.end_suite(suite_name, 'TS_END') + elif testcase_match := re.search(self.test_case_start_pattern, line): + tc_name = testcase_match.group(2) + tc = self.get_testcase(tc_name, 'TC_START') + self.start_case(tc.name) # Mark the test as started, if something happens here, it is mostly # due to this tests, for example timeout. This should in this case # be marked as failed and not blocked (not run). tc.status = TwisterStatus.STARTED - - if testcase_match or self._match: - self.testcase_output += line + "\n" - self._match = True - - result_match = result_re.match(line) + if not self._match: + self.testcase_output += line + "\n" + self._match = True # some testcases are skipped based on predicates and do not show up # during test execution, however they are listed in the summary. Parse # the summary for status and use that status instead. - - summary_re = re.compile(r"- (PASS|FAIL|SKIP) - \[([^\.]*).(test_)?(\S*)\] duration = (\d*[.,]?\d*) seconds") - summary_match = summary_re.match(line) - - if result_match: + elif result_match := self.test_case_end_pattern.match(line): matched_status = result_match.group(1) - name = "{}.{}".format(self.id, result_match.group(3)) - tc = self.instance.get_case_or_create(name) + tc_name = result_match.group(3) + tc = self.get_testcase(tc_name, 'TC_END') + self.end_case(tc.name) tc.status = TwisterStatus[matched_status] if tc.status == TwisterStatus.SKIP: tc.reason = "ztest skip" @@ -755,15 +843,22 @@ def handle(self, line): self.testcase_output = "" self._match = False self.ztest = True - elif summary_match: - matched_status = summary_match.group(1) - self.detected_suite_names.append(summary_match.group(2)) - name = "{}.{}".format(self.id, summary_match.group(4)) - tc = self.instance.get_case_or_create(name) + elif test_suite_summary_match := self.test_suite_summary_pattern.match(line): + suite_name=test_suite_summary_match.group("suite_name") + suite_status=test_suite_summary_match.group("suite_status") + self._match = False + self.ztest = True + self.end_suite(suite_name, 'TS_SUM', suite_status=suite_status) + elif test_case_summary_match := self.test_case_summary_pattern.match(line): + matched_status = test_case_summary_match.group(1) + suite_name = test_case_summary_match.group(2) + tc_name = test_case_summary_match.group(4) + tc = self.get_testcase(tc_name, 'TS_SUM', suite_name) + self.end_case(tc.name, 'TS_SUM') tc.status = TwisterStatus[matched_status] if tc.status == TwisterStatus.SKIP: tc.reason = "ztest skip" - tc.duration = float(summary_match.group(5)) + tc.duration = float(test_case_summary_match.group(5)) if tc.status == TwisterStatus.FAIL: tc.output = self.testcase_output self.testcase_output = "" diff --git a/scripts/pylib/twister/twisterlib/platform.py b/scripts/pylib/twister/twisterlib/platform.py index 03281ed3b2f3604..7238a52e17bfce0 100644 --- a/scripts/pylib/twister/twisterlib/platform.py +++ b/scripts/pylib/twister/twisterlib/platform.py @@ -2,16 +2,43 @@ # vim: set syntax=python ts=4 : # # Copyright (c) 2018-2022 Intel Corporation +# Copyright (c) 2024 Arm Limited (or its affiliates). All rights reserved. +# # SPDX-License-Identifier: Apache-2.0 import os +import shutil import scl from twisterlib.environment import ZEPHYR_BASE +from twisterlib.constants import SUPPORTED_SIMS import logging logger = logging.getLogger('twister') logger.setLevel(logging.DEBUG) + +class Simulator: + """Class representing a simulator""" + + def __init__(self, data: dict[str, str]): + assert "name" in data + assert data["name"] in SUPPORTED_SIMS + self.name = data["name"] + self.exec = data.get("exec") + + def is_runnable(self) -> bool: + return not bool(self.exec) or bool(shutil.which(self.exec)) + + def __str__(self): + return f"Simulator(name: {self.name}, exec: {self.exec})" + + def __eq__(self, other): + if isinstance(other, Simulator): + return self.name == other.name and self.exec == other.exec + else: + return False + + class Platform: """Class representing metadata for a particular platform @@ -46,8 +73,8 @@ def __init__(self): self.vendor = "" self.tier = -1 self.type = "na" - self.simulation = "na" - self.simulation_exec = None + self.simulators: list[Simulator] = [] + self.simulation: str = "na" self.supported_toolchains = [] self.env = [] self.env_satisfied = True @@ -103,8 +130,12 @@ def load(self, board, target, aliases, data): self.vendor = board.vendor self.tier = variant_data.get("tier", data.get("tier", self.tier)) self.type = variant_data.get('type', data.get('type', self.type)) - self.simulation = variant_data.get('simulation', data.get('simulation', self.simulation)) - self.simulation_exec = variant_data.get('simulation_exec', data.get('simulation_exec', self.simulation_exec)) + + self.simulators = [Simulator(data) for data in variant_data.get('simulation', data.get('simulation', self.simulators))] + default_sim = self.simulator_by_name(None) + if default_sim: + self.simulation = default_sim.name + self.supported_toolchains = variant_data.get("toolchain", data.get("toolchain", [])) if self.supported_toolchains is None: self.supported_toolchains = [] @@ -138,5 +169,11 @@ def load(self, board, target, aliases, data): if not os.environ.get(env, None): self.env_satisfied = False + def simulator_by_name(self, sim_name: str | None) -> Simulator | None: + if sim_name: + return next(filter(lambda s: s.name == sim_name, iter(self.simulators)), None) + else: + return next(iter(self.simulators), None) + def __repr__(self): return "<%s on %s>" % (self.name, self.arch) diff --git a/scripts/pylib/twister/twisterlib/quarantine.py b/scripts/pylib/twister/twisterlib/quarantine.py index cc6ae43002219f3..dc8f7b73f141044 100644 --- a/scripts/pylib/twister/twisterlib/quarantine.py +++ b/scripts/pylib/twister/twisterlib/quarantine.py @@ -1,4 +1,6 @@ # Copyright (c) 2022 Nordic Semiconductor ASA +# Copyright (c) 2024 Arm Limited (or its affiliates). All rights reserved. +# # SPDX-License-Identifier: Apache-2.0 from __future__ import annotations @@ -31,8 +33,8 @@ def __init__(self, quarantine_list=[]) -> None: for quarantine_file in quarantine_list: self.quarantine.extend(QuarantineData.load_data_from_yaml(quarantine_file)) - def get_matched_quarantine(self, testname, platform, architecture, simulation): - qelem = self.quarantine.get_matched_quarantine(testname, platform, architecture, simulation) + def get_matched_quarantine(self, testname, platform, architecture, simulator): + qelem = self.quarantine.get_matched_quarantine(testname, platform, architecture, simulator) if qelem: logger.debug('%s quarantined with reason: %s' % (testname, qelem.comment)) return qelem.comment @@ -111,7 +113,7 @@ def get_matched_quarantine(self, scenario: str, platform: str, architecture: str, - simulation: str) -> QuarantineElement | None: + simulator_name: str) -> QuarantineElement | None: """Return quarantine element if test is matched to quarantine rules""" for qelem in self.qlist: matched: bool = False @@ -125,7 +127,7 @@ def get_matched_quarantine(self, and (matched := _is_element_matched(architecture, qelem.re_architectures)) is False): continue if (qelem.simulations - and (matched := _is_element_matched(simulation, qelem.re_simulations)) is False): + and (matched := _is_element_matched(simulator_name, qelem.re_simulations)) is False): continue if matched: diff --git a/scripts/pylib/twister/twisterlib/runner.py b/scripts/pylib/twister/twisterlib/runner.py index 128bc598ed9c4d2..172add5367edf07 100644 --- a/scripts/pylib/twister/twisterlib/runner.py +++ b/scripts/pylib/twister/twisterlib/runner.py @@ -1,6 +1,6 @@ # vim: set syntax=python ts=4 : # -# Copyright (c) 20180-2022 Intel Corporation +# Copyright (c) 2018-2024 Intel Corporation # Copyright 2022 NXP # SPDX-License-Identifier: Apache-2.0 @@ -814,6 +814,10 @@ def __init__(self, instance: TestInstance, env: TwisterEnv, jobserver, **kwargs) self.env = env self.duts = None + @property + def trace(self) -> bool: + return self.options.verbose > 2 + def log_info(self, filename, inline_logs, log_testcases=False): filename = os.path.abspath(os.path.realpath(filename)) if inline_logs: @@ -1087,6 +1091,18 @@ def process(self, pipeline, done, message, lock, results): self.instance.reason = reason self.instance.add_missing_case_status(TwisterStatus.BLOCK, reason) + def demangle(self, symbol_name): + if symbol_name[:2] == '_Z': + try: + cpp_filt = subprocess.run('c++filt', input=symbol_name, text=True, check=True, + stdout=subprocess.PIPE, stderr=subprocess.PIPE) + if self.trace: + logger.debug(f"Demangle: '{symbol_name}'==>'{cpp_filt.stdout}'") + return cpp_filt.stdout.strip() + except Exception as e: + logger.error(f"Failed to demangle '{symbol_name}': {e}") + return symbol_name + def determine_testcases(self, results): yaml_testsuite_name = self.instance.testsuite.id logger.debug(f"Determine test cases for test suite: {yaml_testsuite_name}") @@ -1102,19 +1118,25 @@ def determine_testcases(self, results): for sym in section.iter_symbols(): # It is only meant for new ztest fx because only new ztest fx exposes test functions # precisely. - + m_ = new_ztest_unit_test_regex.search(sym.name) + if not m_: + continue + # Demangle C++ symbols + m_ = new_ztest_unit_test_regex.search(self.demangle(sym.name)) + if not m_: + continue # The 1st capture group is new ztest suite name. # The 2nd capture group is new ztest unit test name. - matches = new_ztest_unit_test_regex.findall(sym.name) - if matches: - for m in matches: - # new_ztest_suite = m[0] # not used for now - test_func_name = m[1].replace("test_", "", 1) - testcase_id = f"{yaml_testsuite_name}.{test_func_name}" - detected_cases.append(testcase_id) + new_ztest_suite = m_[1] + if new_ztest_suite not in self.instance.testsuite.ztest_suite_names: + logger.warning(f"Unexpected Ztest suite '{new_ztest_suite}' " + f"not present in: {self.instance.testsuite.ztest_suite_names}") + test_func_name = m_[2].replace("test_", "", 1) + testcase_id = f"{yaml_testsuite_name}.{new_ztest_suite}.{test_func_name}" + detected_cases.append(testcase_id) if detected_cases: - logger.debug(f"{', '.join(detected_cases)} in {elf_file}") + logger.debug(f"Detected Ztest cases: [{', '.join(detected_cases)}] in {elf_file}") tc_keeper = {tc.name: {'status': tc.status, 'reason': tc.reason} for tc in self.instance.testcases} self.instance.testcases.clear() self.instance.testsuite.testcases.clear() diff --git a/scripts/pylib/twister/twisterlib/testinstance.py b/scripts/pylib/twister/twisterlib/testinstance.py index 825403e8d84c36c..4b29a27eb5d28d9 100644 --- a/scripts/pylib/twister/twisterlib/testinstance.py +++ b/scripts/pylib/twister/twisterlib/testinstance.py @@ -11,7 +11,6 @@ import hashlib import random import logging -import shutil import glob import csv @@ -28,8 +27,11 @@ QEMUHandler, QEMUWinHandler, DeviceHandler, +) +from twisterlib.constants import ( SUPPORTED_SIMS, SUPPORTED_SIMS_IN_PYTEST, + SUPPORTED_SIMS_WITH_EXEC, ) logger = logging.getLogger('twister') @@ -211,12 +213,13 @@ def setup_handler(self, env: TwisterEnv): options = env.options common_args = (options, env.generator_cmd, not options.disable_suite_name_check) + simulator = self.platform.simulator_by_name(options.sim_name) if options.device_testing: handler = DeviceHandler(self, "device", *common_args) handler.call_make_run = False handler.ready = True - elif self.platform.simulation != "na": - if self.platform.simulation == "qemu": + elif simulator: + if simulator.name == "qemu": if os.name != "nt": handler = QEMUHandler(self, "qemu", *common_args) else: @@ -224,10 +227,9 @@ def setup_handler(self, env: TwisterEnv): handler.args.append(f"QEMU_PIPE={handler.get_fifo()}") handler.ready = True else: - handler = SimulationHandler(self, self.platform.simulation, *common_args) + handler = SimulationHandler(self, simulator.name, *common_args) + handler.ready = simulator.is_runnable() - if self.platform.simulation_exec and shutil.which(self.platform.simulation_exec): - handler.ready = True elif self.testsuite.type == "unit": handler = BinaryHandler(self, "unit", *common_args) handler.binary = os.path.join(self.build_dir, "testbinary") @@ -242,21 +244,23 @@ def setup_handler(self, env: TwisterEnv): # Global testsuite parameters def check_runnable(self, - options, - hardware_map=None): + options: TwisterEnv, + hardware_map=None): enable_slow = options.enable_slow filter = options.filter fixtures = options.fixture device_testing = options.device_testing + simulation = options.sim_name + simulator = self.platform.simulator_by_name(simulation) if os.name == 'nt': # running on simulators is currently supported only for QEMU on Windows - if self.platform.simulation not in ('na', 'qemu'): + if (not simulator) or simulator.name not in ('na', 'qemu'): return False # check presence of QEMU on Windows - if self.platform.simulation == 'qemu' and 'QEMU_BIN_PATH' not in os.environ: + if simulator.name == 'qemu' and 'QEMU_BIN_PATH' not in os.environ: return False # we asked for build-only on the command line @@ -269,20 +273,20 @@ def check_runnable(self, return False target_ready = bool(self.testsuite.type == "unit" or \ - self.platform.type == "native" or \ - (self.platform.simulation in SUPPORTED_SIMS and \ - self.platform.simulation not in self.testsuite.simulation_exclude) or device_testing) + self.platform.type == "native" or \ + (simulator and simulator.name in SUPPORTED_SIMS and \ + simulator.name not in self.testsuite.simulation_exclude) or \ + device_testing) # check if test is runnable in pytest if self.testsuite.harness == 'pytest': - target_ready = bool(filter == 'runnable' or self.platform.simulation in SUPPORTED_SIMS_IN_PYTEST) + target_ready = bool(filter == 'runnable' or simulator and simulator.name in SUPPORTED_SIMS_IN_PYTEST) - SUPPORTED_SIMS_WITH_EXEC = ['nsim', 'mdb-nsim', 'renode', 'tsim', 'native', 'simics', 'custom'] if filter != 'runnable' and \ - self.platform.simulation in SUPPORTED_SIMS_WITH_EXEC and \ - self.platform.simulation_exec: - if not shutil.which(self.platform.simulation_exec): - target_ready = False + simulator and \ + simulator.name in SUPPORTED_SIMS_WITH_EXEC and \ + not simulator.is_runnable(): + target_ready = False testsuite_runnable = self.testsuite_runnable(self.testsuite, fixtures) diff --git a/scripts/pylib/twister/twisterlib/testplan.py b/scripts/pylib/twister/twisterlib/testplan.py index 930b9f6fa3ca667..b19cee8a1cec219 100755 --- a/scripts/pylib/twister/twisterlib/testplan.py +++ b/scripts/pylib/twister/twisterlib/testplan.py @@ -2,6 +2,8 @@ # vim: set syntax=python ts=4 : # # Copyright (c) 2018 Intel Corporation +# Copyright (c) 2024 Arm Limited (or its affiliates). All rights reserved. +# # SPDX-License-Identifier: Apache-2.0 import os import sys @@ -14,7 +16,6 @@ from itertools import islice import logging import copy -import shutil import random import snippets from pathlib import Path @@ -95,7 +96,7 @@ class TestPlan: SAMPLE_FILENAME = 'sample.yaml' TESTSUITE_FILENAME = 'testcase.yaml' - def __init__(self, env=None): + def __init__(self, env: Namespace): self.options = env.options self.env = env @@ -123,6 +124,7 @@ def __init__(self, env=None): self.levels = [] self.test_config = {} + self.name = "unnamed" def get_level(self, name): level = next((l for l in self.levels if l.name == name), None) @@ -157,8 +159,9 @@ def parse_configuration(self, config_file): if inherit: for inherted_level in inherit: _inherited = self.get_level(inherted_level) + assert _inherited, "Unknown inherited level {inherted_level}" _inherited_scenarios = _inherited.scenarios - level_scenarios = _level.scenarios + level_scenarios = _level.scenarios if _level else [] level_scenarios.extend(_inherited_scenarios) def find_subtests(self): @@ -627,8 +630,9 @@ def get_platform(self, name): def handle_quarantined_tests(self, instance: TestInstance, plat: Platform): if self.quarantine: + simulator = plat.simulator_by_name(self.options) matched_quarantine = self.quarantine.get_matched_quarantine( - instance.testsuite.id, plat.name, plat.arch, plat.simulation + instance.testsuite.id, plat.name, plat.arch, simulator.name if simulator is not None else 'na' ) if matched_quarantine and not self.options.quarantine_verify: instance.add_filter("Quarantine: " + matched_quarantine, Filters.QUARANTINE) @@ -773,7 +777,7 @@ def apply_filters(self, **kwargs): platform_filter = _platforms platforms = list(filter(lambda p: p.name in platform_filter, self.platforms)) elif emu_filter: - platforms = list(filter(lambda p: p.simulation != 'na', self.platforms)) + platforms = list(filter(lambda p: bool(p.simulator_by_name(self.options.sim_name)), self.platforms)) elif vendor_filter: platforms = list(filter(lambda p: p.vendor in vendor_filter, self.platforms)) logger.info(f"Selecting platforms by vendors: {','.join(vendor_filter)}") @@ -786,10 +790,8 @@ def apply_filters(self, **kwargs): # the default platforms list. Default platforms should always be # runnable. for p in _platforms: - if p.simulation and p.simulation_exec: - if shutil.which(p.simulation_exec): - platforms.append(p) - else: + sim = p.simulator_by_name(self.options.sim_name) + if (not sim) or sim.is_runnable(): platforms.append(p) else: platforms = self.platforms @@ -931,7 +933,8 @@ def apply_filters(self, **kwargs): instance.add_filter("Not enough RAM", Filters.PLATFORM) if ts.harness: - if ts.harness == 'robot' and plat.simulation != 'renode': + sim = plat.simulator_by_name(self.options.sim_name) + if ts.harness == 'robot' and sim and sim.name != 'renode': instance.add_filter("No robot support for the selected platform", Filters.SKIP) if ts.depends_on: @@ -999,7 +1002,7 @@ def apply_filters(self, **kwargs): # to run a test once per unique (arch, simulation) platform. if not ignore_platform_key and hasattr(ts, 'platform_key') and len(ts.platform_key) > 0: key_fields = sorted(set(ts.platform_key)) - keys = [getattr(plat, key_field) for key_field in key_fields] + keys = [getattr(plat, key_field, None) for key_field in key_fields] for key in keys: if key is None or key == 'na': instance.add_filter( @@ -1054,7 +1057,8 @@ def apply_filters(self, **kwargs): elif emulation_platforms: self.add_instances(instance_list) - for instance in list(filter(lambda inst: not inst.platform.simulation != 'na', instance_list)): + for instance in list(filter(lambda inst: not + inst.platform.simulator_by_name(self.options.sim_name), instance_list)): instance.add_filter("Not an emulated platform", Filters.CMD_LINE) elif vendor_platforms: self.add_instances(instance_list) diff --git a/scripts/pylib/twister/twisterlib/testsuite.py b/scripts/pylib/twister/twisterlib/testsuite.py index 3522c5bb218e0b6..01b91f4b876d8d4 100644 --- a/scripts/pylib/twister/twisterlib/testsuite.py +++ b/scripts/pylib/twister/twisterlib/testsuite.py @@ -1,6 +1,6 @@ # vim: set syntax=python ts=4 : # -# Copyright (c) 2018-2022 Intel Corporation +# Copyright (c) 2018-2024 Intel Corporation # SPDX-License-Identifier: Apache-2.0 from enum import Enum @@ -248,14 +248,16 @@ def _find_ztest_testcases(search_area, testcase_regex): testcase_regex_matches = \ [m for m in testcase_regex.finditer(search_area)] testcase_names = \ - [m.group("testcase_name") for m in testcase_regex_matches] - testcase_names = [name.decode("UTF-8") for name in testcase_names] + [(m.group("suite_name") if m.groupdict().get("suite_name") else b'', m.group("testcase_name")) \ + for m in testcase_regex_matches] + testcase_names = [(ts_name.decode("UTF-8"), tc_name.decode("UTF-8")) for ts_name, tc_name in testcase_names] warnings = None for testcase_name in testcase_names: - if not testcase_name.startswith("test_"): + if not testcase_name[1].startswith("test_"): warnings = "Found a test that does not start with test_" testcase_names = \ - [tc_name.replace("test_", "", 1) for tc_name in testcase_names] + [(ts_name + '.' if ts_name else '') + f"{tc_name.replace('test_', '', 1)}" \ + for (ts_name, tc_name) in testcase_names] return testcase_names, warnings diff --git a/scripts/schemas/twister/platform-schema.yaml b/scripts/schemas/twister/platform-schema.yaml index a8771404b026793..945163ae3273c39 100644 --- a/scripts/schemas/twister/platform-schema.yaml +++ b/scripts/schemas/twister/platform-schema.yaml @@ -30,22 +30,28 @@ schema;platform-schema: type: str enum: ["mcu", "qemu", "sim", "unit", "native"] "simulation": - type: str - enum: - [ - "qemu", - "simics", - "xt-sim", - "renode", - "nsim", - "mdb-nsim", - "tsim", - "armfvp", - "native", - "custom", - ] - "simulation_exec": - type: str + type: seq + seq: + - type: map + mapping: + "name": + type: str + required: true + enum: + [ + "qemu", + "simics", + "xt-sim", + "renode", + "nsim", + "mdb-nsim", + "tsim", + "armfvp", + "native", + "custom", + ] + "exec": + type: str "arch": type: str enum: diff --git a/scripts/tests/twister/test_handlers.py b/scripts/tests/twister/test_handlers.py index 32340b7f3e01479..4e83d67fa8b7cea 100644 --- a/scripts/tests/twister/test_handlers.py +++ b/scripts/tests/twister/test_handlers.py @@ -443,6 +443,7 @@ def test_binaryhandler_create_command( options = SimpleNamespace() options.enable_valgrind = enable_valgrind options.coverage_basedir = "coverage_basedir" + options.sim_name = None handler = BinaryHandler(mocked_instance, 'build', options, 'generator', False) handler.binary = 'bin' handler.call_make_run = call_make_run diff --git a/scripts/tests/twister/test_harness.py b/scripts/tests/twister/test_harness.py index c0a135fb24105ed..7e0fca79677ab30 100644 --- a/scripts/tests/twister/test_harness.py +++ b/scripts/tests/twister/test_harness.py @@ -597,31 +597,48 @@ def test_get_harness(name): "", "Running TESTSUITE suite_name", ["suite_name"], + { 'suite_name': { 'count': 1, 'repeat': 0 } }, + {}, TwisterStatus.NONE, True, TwisterStatus.NONE, ), - ("", "START - test_testcase", [], TwisterStatus.STARTED, True, TwisterStatus.NONE), ( - "", + "On TC_START: Ztest case 'testcase' is not known in {} running suite(s)", + "START - test_testcase", + [], + {}, + { 'test_id.testcase': { 'count': 1 } }, + TwisterStatus.STARTED, + True, + TwisterStatus.NONE + ), + ( + "On TC_END: Ztest case 'example' is not known in {} running suite(s)", "PASS - test_example in 0 seconds", [], + {}, + {}, TwisterStatus.PASS, True, TwisterStatus.NONE, ), ( - "", + "On TC_END: Ztest case 'example' is not known in {} running suite(s)", "SKIP - test_example in 0 seconds", [], + {}, + {}, TwisterStatus.SKIP, True, TwisterStatus.NONE, ), ( - "", + "On TC_END: Ztest case 'example' is not known in {} running suite(s)", "FAIL - test_example in 0 seconds", [], + {}, + {}, TwisterStatus.FAIL, True, TwisterStatus.NONE, @@ -630,6 +647,8 @@ def test_get_harness(name): "not a ztest and no state for test_id", "START - test_testcase", [], + {}, + { 'test_id.testcase': { 'count': 1 } }, TwisterStatus.PASS, False, TwisterStatus.PASS, @@ -638,6 +657,8 @@ def test_get_harness(name): "not a ztest and no state for test_id", "START - test_testcase", [], + {}, + { 'test_id.testcase': { 'count': 1 } }, TwisterStatus.FAIL, False, TwisterStatus.FAIL, @@ -646,12 +667,14 @@ def test_get_harness(name): @pytest.mark.parametrize( - "exp_out, line, exp_suite_name, exp_status, ztest, state", + "exp_out, line, exp_suite_name, exp_started_suites, exp_started_cases, exp_status, ztest, state", TEST_DATA_7, ids=["testsuite", "testcase", "pass", "skip", "failed", "ztest pass", "ztest fail"], ) def test_test_handle( - tmp_path, caplog, exp_out, line, exp_suite_name, exp_status, ztest, state + tmp_path, caplog, exp_out, line, + exp_suite_name, exp_started_suites, exp_started_cases, + exp_status, ztest, state ): # Arrange line = line @@ -662,6 +685,7 @@ def test_test_handle( mock_testsuite = mock.Mock(id="id", testcases=[]) mock_testsuite.name = "mock_testsuite" mock_testsuite.harness_config = {} + mock_testsuite.ztest_suite_names = [] outdir = tmp_path / "gtest_out" outdir.mkdir() @@ -681,6 +705,9 @@ def test_test_handle( # Assert assert test_obj.detected_suite_names == exp_suite_name + assert test_obj.started_suites == exp_started_suites + assert test_obj.started_cases == exp_started_cases + assert exp_out in caplog.text if not "Running" in line and exp_out == "": assert test_obj.instance.testcases[0].status == exp_status diff --git a/scripts/tests/twister/test_mixins.py b/scripts/tests/twister/test_mixins.py index 94e91dcd4ec6f21..8639d8cc56f2944 100644 --- a/scripts/tests/twister/test_mixins.py +++ b/scripts/tests/twister/test_mixins.py @@ -7,6 +7,7 @@ """ import os + import pytest diff --git a/scripts/tests/twister/test_platform.py b/scripts/tests/twister/test_platform.py index 69b6d8842269124..c4b9858d8b1fb82 100644 --- a/scripts/tests/twister/test_platform.py +++ b/scripts/tests/twister/test_platform.py @@ -14,7 +14,7 @@ ZEPHYR_BASE = os.getenv("ZEPHYR_BASE") sys.path.insert(0, os.path.join(ZEPHYR_BASE, "scripts/pylib/twister")) -from twisterlib.platform import Platform +from twisterlib.platform import Platform, Simulator TESTDATA_1 = [ @@ -38,8 +38,7 @@ 'vendor': '', 'tier': -1, 'type': 'na', - 'simulation': 'na', - 'simulation_exec': None, + 'simulators': [], 'supported_toolchains': [], 'env': [], 'env_satisfied': True @@ -71,8 +70,9 @@ vendor: vendor1 tier: 1 type: unit -simulation: nsim -simulation_exec: nsimdrv +simulation: +- name: nsim + exec: nsimdrv toolchain: - zephyr - llvm @@ -94,8 +94,7 @@ 'vendor': 'vendor1', 'tier': 1, 'type': 'unit', - 'simulation': 'nsim', - 'simulation_exec': 'nsimdrv', + 'simulators': [Simulator({'name': 'nsim', 'exec': 'nsimdrv'})], 'supported_toolchains': ['zephyr', 'llvm', 'cross-compile'], 'env': ['dummynonexistentvar'], 'env_satisfied': False diff --git a/scripts/tests/twister/test_quarantine.py b/scripts/tests/twister/test_quarantine.py index 1e4b7d2f405797e..ea6b3cf677ebe35 100644 --- a/scripts/tests/twister/test_quarantine.py +++ b/scripts/tests/twister/test_quarantine.py @@ -263,12 +263,12 @@ def test_quarantinedata_get_matched_quarantine( scenario=scenario, platform=platform, architecture=architecture, - simulation=simulation + simulator_name=simulation ) is None else: assert quarantine_data.get_matched_quarantine( scenario=scenario, platform=platform, architecture=architecture, - simulation=simulation + simulator_name=simulation ) == qlist[expected_idx] diff --git a/scripts/tests/twister/test_runner.py b/scripts/tests/twister/test_runner.py index 3ab7de2fb935f47..29459d585498dd7 100644 --- a/scripts/tests/twister/test_runner.py +++ b/scripts/tests/twister/test_runner.py @@ -56,6 +56,7 @@ def mocked_instance(tmp_path): def mocked_env(): env = mock.Mock() options = mock.Mock() + options.verbose = 2 env.options = options return env @@ -1562,11 +1563,32 @@ def mock_determine_testcases(res): TESTDATA_7 = [ ( [ - 'z_ztest_unit_test__dummy_suite_name__dummy_test_name', - 'z_ztest_unit_test__dummy_suite_name__test_dummy_name', + 'z_ztest_unit_test__dummy_suite1_name__dummy_test_name1', + 'z_ztest_unit_test__dummy_suite2_name__test_dummy_name2', 'no match' ], - ['dummy_id.dummy_name', 'dummy_id.dummy_name'] + [ + ('dummy_id.dummy_suite1_name.dummy_name1'), + ('dummy_id.dummy_suite2_name.dummy_name2') + ] + ), + ( + [ + 'z_ztest_unit_test__dummy_suite2_name__test_dummy_name2', + 'z_ztest_unit_test__bad_suite3_name_no_test', + '_ZN12_GLOBAL__N_1L54z_ztest_unit_test__dummy_suite3_name__test_dummy_name4E', + '_ZN12_GLOBAL__N_1L54z_ztest_unit_test__dummy_suite3_name__test_bad_name1E', + '_ZN12_GLOBAL__N_1L51z_ztest_unit_test_dummy_suite3_name__test_bad_name2E', + '_ZN12_GLOBAL__N_1L54z_ztest_unit_test__dummy_suite3_name__test_dummy_name5E', + '_ZN15foobarnamespaceL54z_ztest_unit_test__dummy_suite3_name__test_dummy_name6E', + ], + [ + ('dummy_id.dummy_suite2_name.dummy_name2'), + ('dummy_id.dummy_suite3_name.dummy_name4'), + ('dummy_id.dummy_suite3_name.bad_name1E'), + ('dummy_id.dummy_suite3_name.dummy_name5'), + ('dummy_id.dummy_suite3_name.dummy_name6'), + ] ), ( ['no match'], @@ -1577,10 +1599,11 @@ def mock_determine_testcases(res): @pytest.mark.parametrize( 'symbols_names, added_tcs', TESTDATA_7, - ids=['two hits, one miss', 'nothing'] + ids=['two hits, one miss', 'demangle', 'nothing'] ) def test_projectbuilder_determine_testcases( mocked_jobserver, + mocked_env, symbols_names, added_tcs ): @@ -1599,9 +1622,9 @@ def test_projectbuilder_determine_testcases( instance_mock = mock.Mock() instance_mock.testcases = [] instance_mock.testsuite.id = 'dummy_id' - env_mock = mock.Mock() + instance_mock.testsuite.ztest_suite_names = [] - pb = ProjectBuilder(instance_mock, env_mock, mocked_jobserver) + pb = ProjectBuilder(instance_mock, mocked_env, mocked_jobserver) with mock.patch('twisterlib.runner.ELFFile', elf_mock), \ mock.patch('builtins.open', mock.mock_open()): @@ -2137,13 +2160,11 @@ def test_projectbuilder_cmake(): instance_mock = mock.Mock() instance_mock.handler = 'dummy handler' instance_mock.build_dir = os.path.join('build', 'dir') - instance_mock.platform.name = 'frdm_k64f' env_mock = mock.Mock() pb = ProjectBuilder(instance_mock, env_mock, mocked_jobserver) pb.build_dir = 'build_dir' - pb.testsuite.platform = instance_mock.platform - pb.testsuite.extra_args = ['some', 'platform:frdm_k64f:args'] + pb.testsuite.extra_args = ['some', 'args'] pb.testsuite.extra_conf_files = ['some', 'files1'] pb.testsuite.extra_overlay_confs = ['some', 'files2'] pb.testsuite.extra_dtc_overlay_files = ['some', 'files3'] @@ -2156,7 +2177,7 @@ def test_projectbuilder_cmake(): assert res == cmake_res_mock pb.cmake_assemble_args.assert_called_once_with( - ['some', 'args'], + pb.testsuite.extra_args, pb.instance.handler, pb.testsuite.extra_conf_files, pb.testsuite.extra_overlay_confs, diff --git a/scripts/tests/twister/test_testinstance.py b/scripts/tests/twister/test_testinstance.py index 59ea56a207eefb6..13aae836c1a7cbf 100644 --- a/scripts/tests/twister/test_testinstance.py +++ b/scripts/tests/twister/test_testinstance.py @@ -16,6 +16,7 @@ ZEPHYR_BASE = os.getenv("ZEPHYR_BASE") sys.path.insert(0, os.path.join(ZEPHYR_BASE, "scripts/pylib/twister")) +from pylib.twister.twisterlib.platform import Simulator from twisterlib.statuses import TwisterStatus from twisterlib.testinstance import TestInstance from twisterlib.error import BuildError @@ -25,12 +26,12 @@ TESTDATA_PART_1 = [ - (False, False, "console", "na", "qemu", False, [], (False, True)), + (False, False, "console", None, "qemu", False, [], (False, True)), (False, False, "console", "native", "qemu", False, [], (False, True)), (True, False, "console", "native", "nsim", False, [], (True, False)), (True, True, "console", "native", "renode", False, [], (True, False)), (False, False, "sensor", "native", "", False, [], (True, False)), - (False, False, "sensor", "na", "", False, [], (True, False)), + (False, False, "sensor", None, "", False, [], (True, False)), (False, True, "sensor", "native", "", True, [], (True, False)), ] @pytest.mark.parametrize( @@ -62,7 +63,7 @@ def test_check_build_or_run( class_testplan.platforms = platforms_list platform = class_testplan.get_platform("demo_board_2") platform.type = platform_type - platform.simulation = platform_sim + platform.simulators = [Simulator({"name": platform_sim})] if platform_sim else [] testsuite.harness = harness testsuite.build_only = build_only testsuite.slow = slow @@ -73,7 +74,8 @@ def test_check_build_or_run( device_testing=False, enable_slow=slow, fixtures=fixture, - filter="" + filter="", + sim_name=platform_sim ) ) run = testinstance.check_runnable(env.options) @@ -455,9 +457,9 @@ def test_testinstance_testsuite_runnable( (True, mock.ANY, mock.ANY, mock.ANY, None, [], False), (False, True, mock.ANY, mock.ANY, 'device', [], True), (False, False, 'qemu', mock.ANY, 'qemu', ['QEMU_PIPE=1'], True), - (False, False, 'dummy sim', mock.ANY, 'dummy sim', [], True), - (False, False, 'na', 'unit', 'unit', ['COVERAGE=1'], True), - (False, False, 'na', 'dummy type', '', [], False), + (False, False, 'armfvp', mock.ANY, 'armfvp', [], True), + (False, False, None, 'unit', 'unit', ['COVERAGE=1'], True), + (False, False, None, 'dummy type', '', [], False), ] @pytest.mark.parametrize( @@ -479,13 +481,13 @@ def test_testinstance_setup_handler( expected_handler_ready ): testinstance.handler = mock.Mock() if preexisting_handler else None - testinstance.platform.simulation = platform_sim - testinstance.platform.simulation_exec = 'dummy exec' + testinstance.platform.simulators = [Simulator({"name": platform_sim, "exec": 'dummy exec'})] if platform_sim else [] testinstance.testsuite.type = testsuite_type env = mock.Mock( options=mock.Mock( device_testing=device_testing, - enable_coverage=True + enable_coverage=True, + sim_name=platform_sim, ) ) @@ -546,8 +548,7 @@ def test_testinstance_check_runnable( hardware_map, expected ): - testinstance.platform.simulation = platform_sim - testinstance.platform.simulation_exec = platform_sim_exec + testinstance.platform.simulators = [Simulator({"name": platform_sim, "exec": platform_sim_exec})] testinstance.testsuite.build_only = testsuite_build_only testinstance.testsuite.slow = testsuite_slow testinstance.testsuite.harness = testsuite_harness @@ -557,7 +558,8 @@ def test_testinstance_check_runnable( device_testing=False, enable_slow=enable_slow, fixtures=fixtures, - filter=filter + filter=filter, + sim_name=platform_sim ) ) with mock.patch('os.name', os_name), \ diff --git a/scripts/tests/twister/test_testplan.py b/scripts/tests/twister/test_testplan.py index eea3d3e9abefb08..b00d69ab06113dc 100644 --- a/scripts/tests/twister/test_testplan.py +++ b/scripts/tests/twister/test_testplan.py @@ -1,5 +1,5 @@ #!/usr/bin/env python3 -# Copyright (c) 2020 Intel Corporation +# Copyright (c) 2020-2024 Intel Corporation # # SPDX-License-Identifier: Apache-2.0 @@ -85,7 +85,8 @@ def test_get_all_testsuites_short(class_testplan, all_testsuites_dict): 'test_b.check_1', 'test_b.check_2', 'test_c.check_1', 'test_c.check_2', 'test_d.check_1.unit_1a', 'test_d.check_1.unit_1b', - 'test_e.check_1.1a', 'test_e.check_1.1b', + 'test_e.check_1.feature5.1a', + 'test_e.check_1.feature5.1b', 'test_config.main'] assert sorted(plan.get_all_tests()) == sorted(expected_tests) diff --git a/scripts/tests/twister/test_testsuite.py b/scripts/tests/twister/test_testsuite.py index e297b6b6d9cd6c8..8d20902a5ebaf13 100644 --- a/scripts/tests/twister/test_testsuite.py +++ b/scripts/tests/twister/test_testsuite.py @@ -165,7 +165,7 @@ def test_scanpathresults_dunders(original, provided, expected): ), ScanPathResult( warnings=None, - matches=['1a', '1b'], + matches=['feature5.1a', 'feature5.1b'], has_registered_test_suites=False, has_run_registered_test_suites=True, has_test_main=False, diff --git a/scripts/tests/twister_blackbox/test_config.py b/scripts/tests/twister_blackbox/test_config.py index c05d18cdaa780ab..2cad497055f5b50 100644 --- a/scripts/tests/twister_blackbox/test_config.py +++ b/scripts/tests/twister_blackbox/test_config.py @@ -13,6 +13,7 @@ import sys import json +# pylint: disable=no-name-in-module from conftest import ZEPHYR_BASE, TEST_DATA, testsuite_filename_mock from twisterlib.testplan import TestPlan @@ -55,13 +56,13 @@ def test_alt_config_root(self, out_path): assert str(sys_exit.value) == '0' - assert len(filtered_j) == 3 + assert len(filtered_j) == 4 @pytest.mark.parametrize( 'level, expected_tests', [ - ('smoke', 5), - ('acceptance', 6), + ('smoke', 6), + ('acceptance', 7), ], ids=['smoke', 'acceptance'] ) diff --git a/scripts/tests/twister_blackbox/test_data/test_config.yaml b/scripts/tests/twister_blackbox/test_data/test_config.yaml index d7e4828350cf9a8..6bfe24a4e819e6e 100644 --- a/scripts/tests/twister_blackbox/test_data/test_config.yaml +++ b/scripts/tests/twister_blackbox/test_data/test_config.yaml @@ -6,9 +6,10 @@ levels: description: > A plan to be used verifying basic features adds: - - dummy.agnostic.* + - dummy.agnostic\..* - name: acceptance description: > More coverage adds: - - dummy.* + - dummy.agnostic\..* + - dummy.device\..* diff --git a/scripts/tests/twister_blackbox/test_data/tests/dummy/agnostic/group2/src/main.c b/scripts/tests/twister_blackbox/test_data/tests/dummy/agnostic/group2/src/main.c index 55c375965aeb944..798fd9756a8c153 100644 --- a/scripts/tests/twister_blackbox/test_data/tests/dummy/agnostic/group2/src/main.c +++ b/scripts/tests/twister_blackbox/test_data/tests/dummy/agnostic/group2/src/main.c @@ -9,6 +9,8 @@ ZTEST_SUITE(a2_tests, NULL, NULL, NULL, NULL, NULL); +ZTEST_SUITE(a3_tests, NULL, NULL, NULL, NULL, NULL); + /** * @brief Test Asserts * @@ -34,3 +36,8 @@ ZTEST(a2_tests, test_assert2) zassert_equal(1, 1, "1 was not equal to 1"); zassert_equal_ptr(NULL, NULL, "NULL was not equal to NULL"); } + +ZTEST(a3_tests, test_assert1) +{ + zassert_true(1, "1 was false"); +} diff --git a/scripts/tests/twister_blackbox/test_data/tests/dummy/agnostic_cpp/group1/subgroup1/CMakeLists.txt b/scripts/tests/twister_blackbox/test_data/tests/dummy/agnostic_cpp/group1/subgroup1/CMakeLists.txt new file mode 100644 index 000000000000000..3ffe630f1ad9898 --- /dev/null +++ b/scripts/tests/twister_blackbox/test_data/tests/dummy/agnostic_cpp/group1/subgroup1/CMakeLists.txt @@ -0,0 +1,8 @@ +# SPDX-License-Identifier: Apache-2.0 + +cmake_minimum_required(VERSION 3.20.0) +find_package(Zephyr REQUIRED HINTS $ENV{ZEPHYR_BASE}) +project(integration) + +FILE(GLOB app_sources src/*.cpp) +target_sources(app PRIVATE ${app_sources}) diff --git a/scripts/tests/twister_blackbox/test_data/tests/dummy/agnostic_cpp/group1/subgroup1/prj.conf b/scripts/tests/twister_blackbox/test_data/tests/dummy/agnostic_cpp/group1/subgroup1/prj.conf new file mode 100644 index 000000000000000..9467c2926896dd7 --- /dev/null +++ b/scripts/tests/twister_blackbox/test_data/tests/dummy/agnostic_cpp/group1/subgroup1/prj.conf @@ -0,0 +1 @@ +CONFIG_ZTEST=y diff --git a/scripts/tests/twister_blackbox/test_data/tests/dummy/agnostic_cpp/group1/subgroup1/src/main.cpp b/scripts/tests/twister_blackbox/test_data/tests/dummy/agnostic_cpp/group1/subgroup1/src/main.cpp new file mode 100644 index 000000000000000..b37d02646cfcbc5 --- /dev/null +++ b/scripts/tests/twister_blackbox/test_data/tests/dummy/agnostic_cpp/group1/subgroup1/src/main.cpp @@ -0,0 +1,28 @@ +/* + * Copyright (c) 2023-2024 Intel Corporation + * + * SPDX-License-Identifier: Apache-2.0 + */ + +#include + + +// global namespace + +ZTEST_SUITE(a1_1_tests, NULL, NULL, NULL, NULL, NULL); + +/** + * @brief Test Asserts + * + * This test verifies various assert macros provided by ztest. + * + */ +ZTEST(a1_1_tests, test_assert) +{ + zassert_true(1, "1 was false"); + zassert_false(0, "0 was true"); + zassert_is_null(NULL, "NULL was not NULL"); + zassert_not_null("foo", "\"foo\" was NULL"); + zassert_equal(1, 1, "1 was not equal to 1"); + zassert_equal_ptr(NULL, NULL, "NULL was not equal to NULL"); +} diff --git a/scripts/tests/twister_blackbox/test_data/tests/dummy/agnostic_cpp/group1/subgroup1/test_data.yaml b/scripts/tests/twister_blackbox/test_data/tests/dummy/agnostic_cpp/group1/subgroup1/test_data.yaml new file mode 100644 index 000000000000000..7d8a64205414465 --- /dev/null +++ b/scripts/tests/twister_blackbox/test_data/tests/dummy/agnostic_cpp/group1/subgroup1/test_data.yaml @@ -0,0 +1,10 @@ +tests: + dummy.agnostic_cpp.group1.subgroup1: + platform_allow: + - native_sim + integration_platforms: + - native_sim + tags: + - agnostic + - cpp + - subgrouped diff --git a/scripts/tests/twister_blackbox/test_data/tests/dummy/agnostic_cpp/group1/subgroup2/CMakeLists.txt b/scripts/tests/twister_blackbox/test_data/tests/dummy/agnostic_cpp/group1/subgroup2/CMakeLists.txt new file mode 100644 index 000000000000000..3ffe630f1ad9898 --- /dev/null +++ b/scripts/tests/twister_blackbox/test_data/tests/dummy/agnostic_cpp/group1/subgroup2/CMakeLists.txt @@ -0,0 +1,8 @@ +# SPDX-License-Identifier: Apache-2.0 + +cmake_minimum_required(VERSION 3.20.0) +find_package(Zephyr REQUIRED HINTS $ENV{ZEPHYR_BASE}) +project(integration) + +FILE(GLOB app_sources src/*.cpp) +target_sources(app PRIVATE ${app_sources}) diff --git a/scripts/tests/twister_blackbox/test_data/tests/dummy/agnostic_cpp/group1/subgroup2/prj.conf b/scripts/tests/twister_blackbox/test_data/tests/dummy/agnostic_cpp/group1/subgroup2/prj.conf new file mode 100644 index 000000000000000..9467c2926896dd7 --- /dev/null +++ b/scripts/tests/twister_blackbox/test_data/tests/dummy/agnostic_cpp/group1/subgroup2/prj.conf @@ -0,0 +1 @@ +CONFIG_ZTEST=y diff --git a/scripts/tests/twister_blackbox/test_data/tests/dummy/agnostic_cpp/group1/subgroup2/src/main.cpp b/scripts/tests/twister_blackbox/test_data/tests/dummy/agnostic_cpp/group1/subgroup2/src/main.cpp new file mode 100644 index 000000000000000..0ac835a959c0421 --- /dev/null +++ b/scripts/tests/twister_blackbox/test_data/tests/dummy/agnostic_cpp/group1/subgroup2/src/main.cpp @@ -0,0 +1,27 @@ +/* + * Copyright (c) 2023-2024 Intel Corporation + * + * SPDX-License-Identifier: Apache-2.0 + */ + +#include + +// global namespace + +ZTEST_SUITE(a1_2_tests, NULL, NULL, NULL, NULL, NULL); + +/** + * @brief Test Asserts + * + * This test verifies various assert macros provided by ztest. + * + */ +ZTEST(a1_2_tests, test_assert) +{ + zassert_true(1, "1 was false"); + zassert_false(0, "0 was true"); + zassert_is_null(NULL, "NULL was not NULL"); + zassert_not_null("foo", "\"foo\" was NULL"); + zassert_equal(1, 1, "1 was not equal to 1"); + zassert_equal_ptr(NULL, NULL, "NULL was not equal to NULL"); +} diff --git a/scripts/tests/twister_blackbox/test_data/tests/dummy/agnostic_cpp/group1/subgroup2/test_data.yaml b/scripts/tests/twister_blackbox/test_data/tests/dummy/agnostic_cpp/group1/subgroup2/test_data.yaml new file mode 100644 index 000000000000000..f0146d3e193448d --- /dev/null +++ b/scripts/tests/twister_blackbox/test_data/tests/dummy/agnostic_cpp/group1/subgroup2/test_data.yaml @@ -0,0 +1,11 @@ +tests: + dummy.agnostic_cpp.group1.subgroup2: + build_only: true + platform_allow: + - native_sim + integration_platforms: + - native_sim + tags: + - agnostic + - cpp + - subgrouped diff --git a/scripts/tests/twister_blackbox/test_data/tests/dummy/agnostic_cpp/group2/CMakeLists.txt b/scripts/tests/twister_blackbox/test_data/tests/dummy/agnostic_cpp/group2/CMakeLists.txt new file mode 100644 index 000000000000000..3ffe630f1ad9898 --- /dev/null +++ b/scripts/tests/twister_blackbox/test_data/tests/dummy/agnostic_cpp/group2/CMakeLists.txt @@ -0,0 +1,8 @@ +# SPDX-License-Identifier: Apache-2.0 + +cmake_minimum_required(VERSION 3.20.0) +find_package(Zephyr REQUIRED HINTS $ENV{ZEPHYR_BASE}) +project(integration) + +FILE(GLOB app_sources src/*.cpp) +target_sources(app PRIVATE ${app_sources}) diff --git a/scripts/tests/twister_blackbox/test_data/tests/dummy/agnostic_cpp/group2/prj.conf b/scripts/tests/twister_blackbox/test_data/tests/dummy/agnostic_cpp/group2/prj.conf new file mode 100644 index 000000000000000..9467c2926896dd7 --- /dev/null +++ b/scripts/tests/twister_blackbox/test_data/tests/dummy/agnostic_cpp/group2/prj.conf @@ -0,0 +1 @@ +CONFIG_ZTEST=y diff --git a/scripts/tests/twister_blackbox/test_data/tests/dummy/agnostic_cpp/group2/src/main.cpp b/scripts/tests/twister_blackbox/test_data/tests/dummy/agnostic_cpp/group2/src/main.cpp new file mode 100644 index 000000000000000..1c86457e76a0d6c --- /dev/null +++ b/scripts/tests/twister_blackbox/test_data/tests/dummy/agnostic_cpp/group2/src/main.cpp @@ -0,0 +1,48 @@ +/* + * Copyright (c) 2023-2024 Intel Corporation + * + * SPDX-License-Identifier: Apache-2.0 + */ + +#include + + +namespace +{ + +ZTEST_SUITE(a2_tests, NULL, NULL, NULL, NULL, NULL); + +ZTEST_SUITE(a3_tests, NULL, NULL, NULL, NULL, NULL); + +/** + * @brief Test Asserts + * + * This test verifies various assert macros provided by ztest. + * + */ +ZTEST(a2_tests, test_assert1) +{ + zassert_true(1, "1 was false"); + zassert_false(0, "0 was true"); + zassert_is_null(NULL, "NULL was not NULL"); + zassert_not_null("foo", "\"foo\" was NULL"); + zassert_equal(1, 1, "1 was not equal to 1"); + zassert_equal_ptr(NULL, NULL, "NULL was not equal to NULL"); +} + +ZTEST(a2_tests, test_assert2) +{ + zassert_true(1, "1 was false"); + zassert_false(0, "0 was true"); + zassert_is_null(NULL, "NULL was not NULL"); + zassert_not_null("foo", "\"foo\" was NULL"); + zassert_equal(1, 1, "1 was not equal to 1"); + zassert_equal_ptr(NULL, NULL, "NULL was not equal to NULL"); +} + +ZTEST(a3_tests, test_assert1) +{ + zassert_true(1, "1 was false"); +} + +} // namsespace diff --git a/scripts/tests/twister_blackbox/test_data/tests/dummy/agnostic_cpp/group2/src/submain.cpp b/scripts/tests/twister_blackbox/test_data/tests/dummy/agnostic_cpp/group2/src/submain.cpp new file mode 100644 index 000000000000000..bf9c90536b2d206 --- /dev/null +++ b/scripts/tests/twister_blackbox/test_data/tests/dummy/agnostic_cpp/group2/src/submain.cpp @@ -0,0 +1,28 @@ +/* + * Copyright (c) 2023-2024 Intel Corporation + * + * SPDX-License-Identifier: Apache-2.0 + */ + +#include + +namespace foo_namespace +{ + +/** + * @brief Test Asserts + * + * This test verifies various assert macros provided by ztest. + * + */ +ZTEST(a2_tests, test_assert3) +{ + zassert_true(1, "1 was false"); + zassert_false(0, "0 was true"); + zassert_is_null(NULL, "NULL was not NULL"); + zassert_not_null("foo", "\"foo\" was NULL"); + zassert_equal(1, 1, "1 was not equal to 1"); + zassert_equal_ptr(NULL, NULL, "NULL was not equal to NULL"); +} + +} // foo_namespace diff --git a/scripts/tests/twister_blackbox/test_data/tests/dummy/agnostic_cpp/group2/test_data.yaml b/scripts/tests/twister_blackbox/test_data/tests/dummy/agnostic_cpp/group2/test_data.yaml new file mode 100644 index 000000000000000..1a93b591460f6e8 --- /dev/null +++ b/scripts/tests/twister_blackbox/test_data/tests/dummy/agnostic_cpp/group2/test_data.yaml @@ -0,0 +1,9 @@ +tests: + dummy.agnostic_cpp.group2: + platform_allow: + - native_sim + integration_platforms: + - native_sim + tags: + - agnostic + - cpp diff --git a/scripts/tests/twister_blackbox/test_data/tests/pytest/pytest/conftest.py b/scripts/tests/twister_blackbox/test_data/tests/pytest/pytest/conftest.py index 75b5c585273088a..8a65d9250b8148d 100644 --- a/scripts/tests/twister_blackbox/test_data/tests/pytest/pytest/conftest.py +++ b/scripts/tests/twister_blackbox/test_data/tests/pytest/pytest/conftest.py @@ -4,6 +4,7 @@ import pytest + # add option "--cmdopt" to pytest, or it will report "unknown option" # this option is passed from twister. def pytest_addoption(parser): diff --git a/scripts/tests/twister_blackbox/test_filter.py b/scripts/tests/twister_blackbox/test_filter.py index 90ea95e6430751a..3558296d40b110c 100644 --- a/scripts/tests/twister_blackbox/test_filter.py +++ b/scripts/tests/twister_blackbox/test_filter.py @@ -14,6 +14,7 @@ import json import re +# pylint: disable=no-name-in-module from conftest import ZEPHYR_BASE, TEST_DATA, testsuite_filename_mock from twisterlib.testplan import TestPlan @@ -81,23 +82,27 @@ def teardown_class(cls): pass @pytest.mark.parametrize( - 'tag, expected_test_count', + 'tags, expected_test_count', [ - ('device', 5), # dummy.agnostic.group1.subgroup1.assert - # dummy.agnostic.group1.subgroup2.assert - # dummy.agnostic.group2.assert1 - # dummy.agnostic.group2.assert2 - # dummy.agnostic.group2.assert3 - ('agnostic', 1) # dummy.device.group.assert + (['device', 'cpp'], 6), + # dummy.agnostic.group1.subgroup1.a1_1_tests.assert + # dummy.agnostic.group1.subgroup2.a2_2_tests.assert + # dummy.agnostic.group2.a2_tests.assert1 + # dummy.agnostic.group2.a2_tests.assert2 + # dummy.agnostic.group2.a2_tests.assert3 + # dummy.agnostic.group2.a3_tests.assert1 + (['agnostic'], 1) # dummy.device.group.assert ], - ids=['no device', 'no agnostic'] + ids=['no device, no cpp', 'no agnostic'] ) @mock.patch.object(TestPlan, 'TESTSUITE_FILENAME', testsuite_filename_mock) - def test_exclude_tag(self, out_path, tag, expected_test_count): + def test_exclude_tag(self, out_path, tags, expected_test_count): test_platforms = ['qemu_x86', 'intel_adl_crb'] path = os.path.join(TEST_DATA, 'tests', 'dummy') args = ['-i', '--outdir', out_path, '-T', path, '-y'] + \ - ['--exclude-tag', tag] + \ + [val for pair in zip( + ['--exclude-tag'] * len(tags), tags + ) for val in pair] + \ [val for pair in zip( ['-p'] * len(test_platforms), test_platforms ) for val in pair] @@ -144,7 +149,7 @@ def test_enable_slow(self, out_path): assert str(sys_exit.value) == '0' - assert len(filtered_j) == 5 + assert len(filtered_j) == 6 @mock.patch.object(TestPlan, 'TESTSUITE_FILENAME', testsuite_filename_mock) def test_enable_slow_only(self, out_path): @@ -172,7 +177,7 @@ def test_enable_slow_only(self, out_path): assert str(sys_exit.value) == '0' - assert len(filtered_j) == 3 + assert len(filtered_j) == 4 @pytest.mark.parametrize( 'arch, expected', diff --git a/scripts/tests/twister_blackbox/test_platform.py b/scripts/tests/twister_blackbox/test_platform.py index 83fe07b274b9c24..0c644dcff5aee5e 100644 --- a/scripts/tests/twister_blackbox/test_platform.py +++ b/scripts/tests/twister_blackbox/test_platform.py @@ -36,7 +36,7 @@ class TestPlatform: 'built_configurations': 2, 'failed_configurations': 0, 'errored_configurations': 0, - 'executed_test_cases': 8, + 'executed_test_cases': 10, 'skipped_test_cases': 2, 'platform_count': 2, 'executed_on_platform': 4, @@ -64,6 +64,27 @@ class TestPlatform: 'only_built': 0 } ), + ( + os.path.join(TEST_DATA, 'tests', 'dummy', 'agnostic_cpp'), + ['native_sim'], + { + 'selected_test_scenarios': 3, + 'selected_test_instances': 3, + 'executed_test_instances': 3, + 'skipped_configurations': 0, + 'skipped_by_static_filter': 0, + 'skipped_at_runtime': 0, + 'passed_configurations': 2, + 'built_configurations': 1, + 'failed_configurations': 0, + 'errored_configurations': 0, + 'executed_test_cases': 5, + 'skipped_test_cases': 0, + 'platform_count': 1, + 'executed_on_platform': 2, + 'only_built': 1 + } + ), ] @classmethod @@ -129,7 +150,7 @@ def test_force_platform(self, out_path): assert str(sys_exit.value) == '0' - assert len(filtered_j) == 12 + assert len(filtered_j) == 26 def test_platform(self, out_path): path = os.path.join(TEST_DATA, 'tests', 'dummy') @@ -250,6 +271,7 @@ def test_exclude_platform(self, capfd, out_path, test_path, test_platforms, expe ids=[ 'emulation_only tests/dummy/agnostic', 'emulation_only tests/dummy/device', + 'native_sim_only tests/dummy/agnostic_cpp', ] ) def test_emulation_only(self, capfd, out_path, test_path, test_platforms, expected): diff --git a/scripts/tests/twister_blackbox/test_printouts.py b/scripts/tests/twister_blackbox/test_printouts.py index 3f65549b8ea9c09..853797354f44cdd 100644 --- a/scripts/tests/twister_blackbox/test_printouts.py +++ b/scripts/tests/twister_blackbox/test_printouts.py @@ -1,5 +1,5 @@ #!/usr/bin/env python3 -# Copyright (c) 2023 Intel Corporation +# Copyright (c) 2023-2024 Intel Corporation # # SPDX-License-Identifier: Apache-2.0 """ @@ -41,17 +41,18 @@ class TestPrintOuts: ( os.path.join(TEST_DATA, 'tests', 'dummy', 'agnostic'), [ - 'dummy.agnostic.group1.subgroup1.assert', - 'dummy.agnostic.group1.subgroup2.assert', - 'dummy.agnostic.group2.assert1', - 'dummy.agnostic.group2.assert2', - 'dummy.agnostic.group2.assert3' + 'dummy.agnostic.group1.subgroup1.a1_1_tests.assert', + 'dummy.agnostic.group1.subgroup2.a1_2_tests.assert', + 'dummy.agnostic.group2.a2_tests.assert1', + 'dummy.agnostic.group2.a2_tests.assert2', + 'dummy.agnostic.group2.a3_tests.assert1', + 'dummy.agnostic.group2.a2_tests.assert3' ] ), ( os.path.join(TEST_DATA, 'tests', 'dummy', 'device'), [ - 'dummy.device.group.assert' + 'dummy.device.group.d_tests.assert' ] ), ] @@ -64,11 +65,12 @@ class TestPrintOuts: '└── Tests\n' \ ' └── dummy\n' \ ' └── agnostic\n' \ - ' ├── dummy.agnostic.group1.subgroup1.assert\n' \ - ' ├── dummy.agnostic.group1.subgroup2.assert\n' \ - ' ├── dummy.agnostic.group2.assert1\n' \ - ' ├── dummy.agnostic.group2.assert2\n' \ - ' └── dummy.agnostic.group2.assert3\n' + ' ├── dummy.agnostic.group1.subgroup1.a1_1_tests.assert\n' \ + ' ├── dummy.agnostic.group1.subgroup2.a1_2_tests.assert\n' \ + ' ├── dummy.agnostic.group2.a2_tests.assert1\n' \ + ' ├── dummy.agnostic.group2.a2_tests.assert2\n' \ + ' ├── dummy.agnostic.group2.a2_tests.assert3\n' \ + ' └── dummy.agnostic.group2.a3_tests.assert1\n' ), ( os.path.join(TEST_DATA, 'tests', 'dummy', 'device'), @@ -77,7 +79,7 @@ class TestPrintOuts: '└── Tests\n' ' └── dummy\n' ' └── device\n' - ' └── dummy.device.group.assert\n' + ' └── dummy.device.group.d_tests.assert\n' ), ] diff --git a/scripts/tests/twister_blackbox/test_report.py b/scripts/tests/twister_blackbox/test_report.py index 2db1006bc5aa923..bac6ddbbbfa0b8c 100644 --- a/scripts/tests/twister_blackbox/test_report.py +++ b/scripts/tests/twister_blackbox/test_report.py @@ -1,5 +1,5 @@ #!/usr/bin/env python3 -# Copyright (c) 2023 Intel Corporation +# Copyright (c) 2023-2024 Intel Corporation # # SPDX-License-Identifier: Apache-2.0 """ @@ -350,12 +350,12 @@ def test_log_file(self, capfd, test_path, test_platforms, out_path, file_name): ( os.path.join(TEST_DATA, 'tests', 'dummy'), ['--detailed-skipped-report'], - {'qemu_x86/atom': 5, 'intel_adl_crb/alder_lake': 1} + {'qemu_x86/atom': 6, 'intel_adl_crb/alder_lake': 1} ), ( os.path.join(TEST_DATA, 'tests', 'dummy'), ['--detailed-skipped-report', '--report-filtered'], - {'qemu_x86/atom': 6, 'intel_adl_crb/alder_lake': 6} + {'qemu_x86/atom': 13, 'intel_adl_crb/alder_lake': 13} ), ], ids=['dummy tests', 'dummy tests with filtered'] @@ -392,7 +392,7 @@ def test_detailed_skipped_report(self, out_path, test_path, flags, expected_test 'test_path, report_filtered, expected_filtered_count', [ (os.path.join(TEST_DATA, 'tests', 'dummy'), False, 0), - (os.path.join(TEST_DATA, 'tests', 'dummy'), True, 4), + (os.path.join(TEST_DATA, 'tests', 'dummy'), True, 10), ], ids=['no filtered', 'with filtered'] ) diff --git a/scripts/tests/twister_blackbox/test_runner.py b/scripts/tests/twister_blackbox/test_runner.py index a4a253fbff7a80d..e1b6a1947033376 100644 --- a/scripts/tests/twister_blackbox/test_runner.py +++ b/scripts/tests/twister_blackbox/test_runner.py @@ -1,5 +1,5 @@ #!/usr/bin/env python3 -# Copyright (c) 2023 Intel Corporation +# Copyright (c) 2023-2024 Intel Corporation # # SPDX-License-Identifier: Apache-2.0 """ @@ -54,7 +54,7 @@ class TestRunner: 'built_configurations': 0, 'failed_configurations': 0, 'errored_configurations': 0, - 'executed_test_cases': 8, + 'executed_test_cases': 10, 'skipped_test_cases': 0, 'platform_count': 2, 'executed_on_platform': 4, @@ -591,7 +591,7 @@ def test_tag(self, capfd, out_path, test_path, test_platforms, tags, expected): sys.stderr.write(err) for line in expected: - assert re.search(line, err) + assert re.search(line, err), f"no expected:'{line}' in '{err}'" assert str(sys_exit.value) == '0' diff --git a/scripts/tests/twister_blackbox/test_shuffle.py b/scripts/tests/twister_blackbox/test_shuffle.py index ade1267b4822719..f45724b7b55e7ac 100644 --- a/scripts/tests/twister_blackbox/test_shuffle.py +++ b/scripts/tests/twister_blackbox/test_shuffle.py @@ -10,10 +10,10 @@ import mock import os import pytest -import re import sys import json +# pylint: disable=no-name-in-module from conftest import ZEPHYR_BASE, TEST_DATA, testsuite_filename_mock from twisterlib.testplan import TestPlan @@ -33,20 +33,21 @@ def teardown_class(cls): @pytest.mark.parametrize( 'seed, ratio, expected_order', [ - ('123', '1/2', ['dummy.agnostic.group1.subgroup1', 'dummy.agnostic.group1.subgroup2']), - ('123', '2/2', ['dummy.agnostic.group2', 'dummy.device.group']), - ('321', '1/2', ['dummy.agnostic.group1.subgroup1', 'dummy.agnostic.group2']), - ('321', '2/2', ['dummy.device.group', 'dummy.agnostic.group1.subgroup2']), - ('123', '1/3', ['dummy.agnostic.group1.subgroup1', 'dummy.agnostic.group1.subgroup2']), + ('123', '1/2', ['dummy.device.group', 'dummy.agnostic.group1.subgroup2']), + ('123', '2/2', ['dummy.agnostic.group2', 'dummy.agnostic.group1.subgroup1']), + ('321', '1/2', ['dummy.agnostic.group2', 'dummy.agnostic.group1.subgroup2']), + ('321', '2/2', ['dummy.device.group', 'dummy.agnostic.group1.subgroup1']), + ('123', '1/3', ['dummy.device.group', 'dummy.agnostic.group1.subgroup2']), ('123', '2/3', ['dummy.agnostic.group2']), - ('123', '3/3', ['dummy.device.group']), - ('321', '1/3', ['dummy.agnostic.group1.subgroup1', 'dummy.agnostic.group2']), + ('123', '3/3', ['dummy.agnostic.group1.subgroup1']), + ('321', '1/3', ['dummy.agnostic.group2', 'dummy.agnostic.group1.subgroup2']), ('321', '2/3', ['dummy.device.group']), - ('321', '3/3', ['dummy.agnostic.group1.subgroup2']) + ('321', '3/3', ['dummy.agnostic.group1.subgroup1']) ], ids=['first half, 123', 'second half, 123', 'first half, 321', 'second half, 321', 'first third, 123', 'middle third, 123', 'last third, 123', - 'first third, 321', 'middle third, 321', 'last third, 321'] + 'first third, 321', 'middle third, 321', 'last third, 321' +] ) @mock.patch.object(TestPlan, 'TESTSUITE_FILENAME', testsuite_filename_mock) def test_shuffle_tests(self, out_path, seed, ratio, expected_order): @@ -65,14 +66,8 @@ def test_shuffle_tests(self, out_path, seed, ratio, expected_order): with open(os.path.join(out_path, 'testplan.json')) as f: j = json.load(f) - filtered_j = [ - (ts['platform'], ts['name'], tc['identifier']) \ - for ts in j['testsuites'] \ - for tc in ts['testcases'] if 'reason' not in tc - ] - testcases = [re.sub(r'\.assert[^\.]*?$', '', j[2]) for j in filtered_j] - testsuites = list(dict.fromkeys(testcases)) + testsuites = [os.path.basename(ts['name']) for ts in j['testsuites']] assert testsuites == expected_order diff --git a/scripts/tests/twister_blackbox/test_testlist.py b/scripts/tests/twister_blackbox/test_testlist.py index 1ef93f072b6b505..ad8eaeddfaf5577 100644 --- a/scripts/tests/twister_blackbox/test_testlist.py +++ b/scripts/tests/twister_blackbox/test_testlist.py @@ -13,6 +13,7 @@ import sys import json +# pylint: disable=no-name-in-module from conftest import ZEPHYR_BASE, TEST_DATA, testsuite_filename_mock, clear_log_in_test from twisterlib.testplan import TestPlan @@ -71,4 +72,4 @@ def test_save_tests(self, out_path): for tc in ts['testcases'] if 'reason' not in tc ] - assert len(filtered_j) == 5 + assert len(filtered_j) == 6 diff --git a/scripts/tests/twister_blackbox/test_testplan.py b/scripts/tests/twister_blackbox/test_testplan.py index 915653a33e15e0e..8834e03ead039cd 100644 --- a/scripts/tests/twister_blackbox/test_testplan.py +++ b/scripts/tests/twister_blackbox/test_testplan.py @@ -13,6 +13,7 @@ import sys import json +# pylint: disable=no-name-in-module from conftest import ZEPHYR_BASE, TEST_DATA, testsuite_filename_mock from twisterlib.testplan import TestPlan from twisterlib.error import TwisterRuntimeError @@ -20,7 +21,7 @@ class TestTestPlan: TESTDATA_1 = [ - ('dummy.agnostic.group2.assert1', SystemExit, 3), + ('dummy.agnostic.group2.a2_tests.assert1', SystemExit, 4), ( os.path.join('scripts', 'tests', 'twister_blackbox', 'test_data', 'tests', 'dummy', 'agnostic', 'group1', 'subgroup1', @@ -30,12 +31,12 @@ class TestTestPlan: ), ] TESTDATA_2 = [ - ('buildable', 6), - ('runnable', 4), + ('buildable', 7), + ('runnable', 5), ] TESTDATA_3 = [ (True, 1), - (False, 6), + (False, 7), ] @classmethod @@ -52,7 +53,7 @@ def teardown_class(cls): @pytest.mark.parametrize( 'test, expected_exception, expected_subtest_count', TESTDATA_1, - ids=['valid', 'invalid'] + ids=['valid', 'not found'] ) @mock.patch.object(TestPlan, 'TESTSUITE_FILENAME', testsuite_filename_mock) def test_subtest(self, out_path, test, expected_exception, expected_subtest_count): diff --git a/scripts/utils/migrate_includes.py b/scripts/utils/migrate_includes.py index 14bd8230cb4692a..b050f432638e387 100644 --- a/scripts/utils/migrate_includes.py +++ b/scripts/utils/migrate_includes.py @@ -16,10 +16,9 @@ """ import argparse -from pathlib import Path import re import sys - +from pathlib import Path ZEPHYR_BASE = Path(__file__).parents[2] diff --git a/scripts/utils/migrate_posix_kconfigs.py b/scripts/utils/migrate_posix_kconfigs.py index ea8eed2d2f8e508..d7667543c24e9c3 100644 --- a/scripts/utils/migrate_posix_kconfigs.py +++ b/scripts/utils/migrate_posix_kconfigs.py @@ -18,10 +18,9 @@ """ import argparse -from pathlib import Path import re import sys - +from pathlib import Path ZEPHYR_BASE = Path(__file__).parents[2] diff --git a/scripts/utils/migrate_sys_init.py b/scripts/utils/migrate_sys_init.py index 3f786cfc8c93288..578a00ac7e576ae 100644 --- a/scripts/utils/migrate_sys_init.py +++ b/scripts/utils/migrate_sys_init.py @@ -15,8 +15,8 @@ """ import argparse -from pathlib import Path import re +from pathlib import Path def update_sys_init(project, dry_run): diff --git a/scripts/utils/twister_to_list.py b/scripts/utils/twister_to_list.py index f2235fcd5a56a84..cadae1c4fd0ca4d 100644 --- a/scripts/utils/twister_to_list.py +++ b/scripts/utils/twister_to_list.py @@ -16,7 +16,6 @@ from ruamel.yaml import YAML - FIELDS = ( "arch_exclude", "arch_allow", diff --git a/scripts/west-commands.yml b/scripts/west-commands.yml index aceebef092d96bf..c42d3aa29044391 100644 --- a/scripts/west-commands.yml +++ b/scripts/west-commands.yml @@ -84,3 +84,8 @@ west-commands: - name: sdk class: Sdk help: manage Zephyr SDK + - file: scripts/west_commands/packages.py + commands: + - name: packages + class: Packages + help: manage packages for Zephyr diff --git a/scripts/west_commands/boards.py b/scripts/west_commands/boards.py index 5117fd1fd08a8a7..201c37069547212 100644 --- a/scripts/west_commands/boards.py +++ b/scripts/west_commands/boards.py @@ -4,19 +4,19 @@ import argparse import os -from pathlib import Path import re import sys import textwrap +from pathlib import Path from west.commands import WestCommand - from zephyr_ext_common import ZEPHYR_BASE sys.path.append(os.fspath(Path(__file__).parent.parent)) import list_boards import zephyr_module + class Boards(WestCommand): def __init__(self): diff --git a/scripts/west_commands/packages.py b/scripts/west_commands/packages.py new file mode 100644 index 000000000000000..116a278cd7b067f --- /dev/null +++ b/scripts/west_commands/packages.py @@ -0,0 +1,164 @@ +# Copyright (c) 2024 Basalte bv +# +# SPDX-License-Identifier: Apache-2.0 + +import argparse +import os +import subprocess +import sys +import textwrap +from itertools import chain +from pathlib import Path + +from west.commands import WestCommand +from zephyr_ext_common import ZEPHYR_BASE + +sys.path.append(os.fspath(Path(__file__).parent.parent)) +import zephyr_module + + +def in_venv() -> bool: + return sys.prefix != sys.base_prefix + + +class Packages(WestCommand): + def __init__(self): + super().__init__( + "packages", + "manage packages for Zephyr", + "List and Install packages for Zephyr and modules", + accepts_unknown_args=True, + ) + + def do_add_parser(self, parser_adder): + parser = parser_adder.add_parser( + self.name, + help=self.help, + description=self.description, + formatter_class=argparse.RawDescriptionHelpFormatter, + epilog=textwrap.dedent( + """ + Listing packages: + + Run 'west packages ' to list all dependencies + available from a given package manager, already + installed and not. These can be filtered by module, + see 'west packages --help' for details. + """ + ), + ) + + parser.add_argument( + "-m", + "--module", + action="append", + default=[], + dest="modules", + metavar="", + help="Zephyr module to run the 'packages' command for. " + "Use 'zephyr' if the 'packages' command should run for Zephyr itself. " + "Option can be passed multiple times. " + "If this option is not given, the 'packages' command will run for Zephyr " + "and all modules.", + ) + + subparsers_gen = parser.add_subparsers( + metavar="", + dest="manager", + help="select a manager.", + required=True, + ) + + pip_parser = subparsers_gen.add_parser( + "pip", + help="manage pip packages", + formatter_class=argparse.RawDescriptionHelpFormatter, + epilog=textwrap.dedent( + """ + Manage pip packages: + + Run 'west packages pip' to print all requirement files needed by + Zephyr and modules. + + The output is compatible with the requirements file format itself. + """ + ), + ) + + pip_parser.add_argument( + "--install", + action="store_true", + help="Install pip requirements instead of listing them. " + "A single 'pip install' command is built and executed. " + "Additional pip arguments can be passed after a -- separator " + "from the original 'west packages pip --install' command. For example pass " + "'--dry-run' to pip not to actually install anything, but print what would be.", + ) + + return parser + + def do_run(self, args, unknown): + if len(unknown) > 0 and unknown[0] != "--": + self.die( + f'Unknown argument "{unknown[0]}"; ' + 'arguments for the manager should be passed after "--"' + ) + + # Store the zephyr modules for easier access + self.zephyr_modules = zephyr_module.parse_modules(ZEPHYR_BASE, self.manifest) + + if args.modules: + # Check for unknown module names + module_names = [m.meta.get("name") for m in self.zephyr_modules] + module_names.append("zephyr") + for m in args.modules: + if m not in module_names: + self.die(f'Unknown zephyr module "{m}"') + + if args.manager == "pip": + return self.do_run_pip(args, unknown[1:]) + + # Unreachable but print an error message if an implementation is missing. + self.die(f'Unsupported package manager: "{args.manager}"') + + def do_run_pip(self, args, manager_args): + requirements = [] + + if not args.modules or "zephyr" in args.modules: + requirements.append(ZEPHYR_BASE / "scripts/requirements.txt") + + for module in self.zephyr_modules: + module_name = module.meta.get("name") + if args.modules and module_name not in args.modules: + if args.install: + self.dbg(f"Skipping module {module_name}") + continue + + # Get the optional pip section from the package managers + pip = module.meta.get("package-managers", {}).get("pip") + if pip is None: + if args.install: + self.dbg(f"Nothing to install for {module_name}") + continue + + # Add requirements files + requirements += [Path(module.project) / r for r in pip.get("requirement-files", [])] + + if args.install: + if not in_venv(): + self.die("Running pip install outside of a virtual environment") + + if len(requirements) > 0: + subprocess.check_call( + [sys.executable, "-m", "pip", "install"] + + list(chain.from_iterable([("-r", r) for r in requirements])) + + manager_args + ) + else: + self.inf("Nothing to install") + return + + if len(manager_args) > 0: + self.die(f'west packages pip does not support unknown arguments: "{manager_args}"') + + self.inf("\n".join([f"-r {r}" for r in requirements])) diff --git a/scripts/west_commands/runners/__init__.py b/scripts/west_commands/runners/__init__.py index a4fbe843782e9b5..850c2b903b4365f 100644 --- a/scripts/west_commands/runners/__init__.py +++ b/scripts/west_commands/runners/__init__.py @@ -5,7 +5,7 @@ import importlib import logging -from runners.core import ZephyrBinaryRunner, MissingProgram +from runners.core import MissingProgram, ZephyrBinaryRunner _logger = logging.getLogger('runners') @@ -73,6 +73,6 @@ def get_runner_cls(runner): for cls in ZephyrBinaryRunner.get_runners(): if cls.name() == runner: return cls - raise ValueError('unknown runner "{}"'.format(runner)) + raise ValueError(f'unknown runner "{runner}"') -__all__ = ['ZephyrBinaryRunner', 'get_runner_cls'] +__all__ = ['ZephyrBinaryRunner', 'MissingProgram', 'get_runner_cls'] diff --git a/scripts/west_commands/runners/blackmagicprobe.py b/scripts/west_commands/runners/blackmagicprobe.py index 1c2c8fa0d6a2aec..2699943acc0dd84 100644 --- a/scripts/west_commands/runners/blackmagicprobe.py +++ b/scripts/west_commands/runners/blackmagicprobe.py @@ -11,7 +11,7 @@ import sys from pathlib import Path -from runners.core import ZephyrBinaryRunner, RunnerCaps +from runners.core import RunnerCaps, ZephyrBinaryRunner try: import serial.tools.list_ports @@ -170,12 +170,11 @@ def bmp_flash(self, command, **kwargs): command = (self.gdb + ['-ex', "set confirm off", - '-ex', "target extended-remote {}".format( - self.gdb_serial)] + + '-ex', f"target extended-remote {self.gdb_serial}"] + self.connect_rst_enable_arg + ['-ex', "monitor swdp_scan", '-ex', "attach 1", - '-ex', "load {}".format(flash_file), + '-ex', f"load {flash_file}", '-ex', "kill", '-ex', "quit", '-silent']) @@ -192,20 +191,18 @@ def bmp_attach(self, command, **kwargs): if self.elf_file is None: command = (self.gdb + ['-ex', "set confirm off", - '-ex', "target extended-remote {}".format( - self.gdb_serial)] + + '-ex', f"target extended-remote {self.gdb_serial}"] + self.connect_rst_disable_arg + ['-ex', "monitor swdp_scan", '-ex', "attach 1"]) else: command = (self.gdb + ['-ex', "set confirm off", - '-ex', "target extended-remote {}".format( - self.gdb_serial)] + + '-ex', f"target extended-remote {self.gdb_serial}"] + self.connect_rst_disable_arg + ['-ex', "monitor swdp_scan", '-ex', "attach 1", - '-ex', "file {}".format(self.elf_file)]) + '-ex', f"file {self.elf_file}"]) self.check_call_ignore_sigint(command) def bmp_debug(self, command, **kwargs): @@ -213,13 +210,12 @@ def bmp_debug(self, command, **kwargs): raise ValueError('Cannot debug; elf file is missing') command = (self.gdb + ['-ex', "set confirm off", - '-ex', "target extended-remote {}".format( - self.gdb_serial)] + + '-ex', f"target extended-remote {self.gdb_serial}"] + self.connect_rst_enable_arg + ['-ex', "monitor swdp_scan", '-ex', "attach 1", - '-ex', "file {}".format(self.elf_file), - '-ex', "load {}".format(self.elf_file)]) + '-ex', f"file {self.elf_file}", + '-ex', f"load {self.elf_file}"]) self.check_call_ignore_sigint(command) def do_run(self, command, **kwargs): diff --git a/scripts/west_commands/runners/bossac.py b/scripts/west_commands/runners/bossac.py index fcbd6fdf92be4e1..227d6b5c82e7a6f 100644 --- a/scripts/west_commands/runners/bossac.py +++ b/scripts/west_commands/runners/bossac.py @@ -13,7 +13,7 @@ import sys import time -from runners.core import ZephyrBinaryRunner, RunnerCaps +from runners.core import RunnerCaps, ZephyrBinaryRunner if platform.system() == 'Darwin': DEFAULT_BOSSAC_PORT = None @@ -76,19 +76,13 @@ def read_help(self): def supports(self, flag): """Check if bossac supports a flag by searching the help""" - for line in self.read_help(): - if flag in line: - return True - return False + return any(flag in line for line in self.read_help()) def is_extended_samba_protocol(self): ext_samba_versions = ['CONFIG_BOOTLOADER_BOSSA_ARDUINO', 'CONFIG_BOOTLOADER_BOSSA_ADAFRUIT_UF2'] - for x in ext_samba_versions: - if self.build_conf.getboolean(x): - return True - return False + return any(self.build_conf.getboolean(x) for x in ext_samba_versions) def is_partition_enabled(self): return self.build_conf.getboolean('CONFIG_USE_DT_CODE_PARTITION') @@ -102,8 +96,7 @@ def get_chosen_code_partition_node(self): b = pathlib.Path(self.cfg.build_dir) edt_pickle = b / 'zephyr' / 'edt.pickle' if not edt_pickle.is_file(): - error_msg = "can't load devicetree; expected to find:" \ - + str(edt_pickle) + error_msg = "can't load devicetree; expected to find:" + str(edt_pickle) raise RuntimeError(error_msg) @@ -111,10 +104,10 @@ def get_chosen_code_partition_node(self): try: with open(edt_pickle, 'rb') as f: edt = pickle.load(f) - except ModuleNotFoundError: + except ModuleNotFoundError as err: error_msg = "could not load devicetree, something may be wrong " \ + "with the python environment" - raise RuntimeError(error_msg) + raise RuntimeError(error_msg) from err return edt.chosen_node('zephyr,code-partition') @@ -151,7 +144,9 @@ def get_image_offset(self, supports_offset): def is_gnu_coreutils_stty(self): try: - result = subprocess.run(['stty', '--version'], capture_output=True, text=True, check=True) + result = subprocess.run( + ['stty', '--version'], capture_output=True, text=True, check=True + ) return 'coreutils' in result.stdout except subprocess.CalledProcessError: return False @@ -200,7 +195,7 @@ def make_bossac_cmd(self): offset = self.get_image_offset(self.supports('--offset')) if offset is not None and int(str(offset), 16) > 0: - cmd_flash += ['-o', '%s' % offset] + cmd_flash += ['-o', str(offset)] elif dt_chosen_code_partition_nd is not None: error_msg = 'There is no CONFIG_USE_DT_CODE_PARTITION Kconfig' \ diff --git a/scripts/west_commands/runners/canopen_program.py b/scripts/west_commands/runners/canopen_program.py index 2fb8ba42b0170c9..081a2652bfc572a 100644 --- a/scripts/west_commands/runners/canopen_program.py +++ b/scripts/west_commands/runners/canopen_program.py @@ -8,7 +8,7 @@ import os import time -from runners.core import ZephyrBinaryRunner, RunnerCaps +from runners.core import RunnerCaps, ZephyrBinaryRunner try: import canopen @@ -112,8 +112,10 @@ def do_add_parser(cls, parser): parser.add_argument('--sdo-timeout', type=float, default=DEFAULT_SDO_TIMEOUT, help=f'''CANopen SDO response timeout in seconds (default: {DEFAULT_SDO_TIMEOUT})''') - parser.add_argument('--download-buffer-size', type=int, default=DEFAULT_PROGRAM_DOWNLOAD_BUFFER_SIZE, - help=f'Program download buffer size in bytes (default: {DEFAULT_PROGRAM_DOWNLOAD_BUFFER_SIZE})') + parser.add_argument('--download-buffer-size', type=int, + default=DEFAULT_PROGRAM_DOWNLOAD_BUFFER_SIZE, + help=f'''Program download buffer size in bytes + (default: {DEFAULT_PROGRAM_DOWNLOAD_BUFFER_SIZE})''') parser.add_argument('--block-transfer', default=False, action='store_true', help='Use SDO block transfers (experimental, default: no)') @@ -151,8 +153,8 @@ def flash(self, **kwargs): if status == 0: self.downloader.swid() else: - self.logger.warning('Flash status 0x{:02x}, ' - 'skipping software identification'.format(status)) + self.logger.warning(f'Flash status 0x{status:02x}, ' + 'skipping software identification') self.downloader.enter_pre_operational() @@ -172,7 +174,7 @@ def flash(self, **kwargs): status = self.downloader.wait_for_flash_status_ok(self.timeout) if status != 0: raise ValueError('Program download failed: ' - 'flash status 0x{:02x}'.format(status)) + f'flash status 0x{status:02x}') self.downloader.swid() self.downloader.start_program() @@ -185,13 +187,13 @@ def flash(self, **kwargs): self.downloader.disconnect() -class CANopenProgramDownloader(object): +class CANopenProgramDownloader: '''CANopen program downloader''' def __init__(self, logger, node_id, can_context=DEFAULT_CAN_CONTEXT, program_number=DEFAULT_PROGRAM_NUMBER, sdo_retries=DEFAULT_SDO_RETRIES, sdo_timeout=DEFAULT_SDO_TIMEOUT, download_buffer_size=DEFAULT_PROGRAM_DOWNLOAD_BUFFER_SIZE, block_transfer=False): - super(CANopenProgramDownloader, self).__init__() + super().__init__() self.logger = logger self.node_id = node_id self.can_context = can_context @@ -214,8 +216,8 @@ def connect(self): '''Connect to CAN network''' try: self.network.connect(context=self.can_context) - except: - raise ValueError('Unable to connect to CAN network') + except Exception as err: + raise ValueError('Unable to connect to CAN network') from err def disconnect(self): '''Disconnect from CAN network''' @@ -226,15 +228,15 @@ def enter_pre_operational(self): self.logger.info("Entering pre-operational mode") try: self.node.nmt.state = 'PRE-OPERATIONAL' - except: - raise ValueError('Failed to enter pre-operational mode') + except Exception as err: + raise ValueError('Failed to enter pre-operational mode') from err def _ctrl_program(self, cmd): '''Write program control command to CANopen object dictionary (0x1f51)''' try: self.ctrl_sdo.raw = cmd - except: - raise ValueError('Unable to write control command 0x{:02x}'.format(cmd)) + except Exception as err: + raise ValueError(f'Unable to write control command 0x{cmd:02x}') from err def stop_program(self): '''Write stop control command to CANopen object dictionary (0x1f51)''' @@ -260,17 +262,17 @@ def swid(self): '''Read software identification from CANopen object dictionary (0x1f56)''' try: swid = self.swid_sdo.raw - except: - raise ValueError('Failed to read software identification') - self.logger.info('Program software identification: 0x{:08x}'.format(swid)) + except Exception as err: + raise ValueError('Failed to read software identification') from err + self.logger.info(f'Program software identification: 0x{swid:08x}') return swid def flash_status(self): '''Read flash status identification''' try: status = self.flash_sdo.raw - except: - raise ValueError('Failed to read flash status identification') + except Exception as err: + raise ValueError('Failed to read flash status identification') from err return status def download(self, bin_file): @@ -278,7 +280,7 @@ def download(self, bin_file): self.logger.info('Downloading program: %s', bin_file) try: size = os.path.getsize(bin_file) - infile = open(bin_file, 'rb') + infile = open(bin_file, 'rb') # noqa: SIM115 outfile = self.data_sdo.open('wb', buffering=self.download_buffer_size, size=size, block_transfer=self.block_transfer) @@ -289,8 +291,8 @@ def download(self, bin_file): break outfile.write(chunk) progress.next(n=len(chunk)) - except: - raise ValueError('Failed to download program') + except Exception as err: + raise ValueError('Failed to download program') from err finally: progress.finish() infile.close() @@ -301,8 +303,8 @@ def wait_for_bootup(self, timeout=DEFAULT_TIMEOUT): self.logger.info('Waiting for boot-up message...') try: self.node.nmt.wait_for_bootup(timeout=timeout) - except: - raise ValueError('Timeout waiting for boot-up message') + except Exception as err: + raise ValueError('Timeout waiting for boot-up message') from err def wait_for_flash_status_ok(self, timeout=DEFAULT_TIMEOUT): '''Wait for flash status ok''' diff --git a/scripts/west_commands/runners/core.py b/scripts/west_commands/runners/core.py index 69491f1990df020..cf01d2abf453806 100644 --- a/scripts/west_commands/runners/core.py +++ b/scripts/west_commands/runners/core.py @@ -26,11 +26,10 @@ import subprocess import sys from dataclasses import dataclass, field -from functools import partial from enum import Enum +from functools import partial from inspect import isabstract -from typing import Dict, List, NamedTuple, NoReturn, Optional, Set, Type, \ - Union +from typing import NamedTuple, NoReturn try: from elftools.elf.elffile import ELFFile @@ -52,7 +51,7 @@ # We could potentially search for RTT blocks in hex or bin files as well, # but since the magic string is "SEGGER RTT", i thought it might be better # to avoid, at the risk of false positives. -def find_rtt_block(elf_file: str) -> Optional[int]: +def find_rtt_block(elf_file: str) -> int | None: if ELFTOOLS_MISSING: raise RuntimeError('the Python dependency elftools was missing; ' 'see the getting started guide for details on ' @@ -165,7 +164,7 @@ class BuildConfiguration: def __init__(self, build_dir: str): self.build_dir = build_dir - self.options: Dict[str, Union[str, int]] = {} + self.options: dict[str, str | int] = {} self.path = os.path.join(self.build_dir, 'zephyr', '.config') self._parse() @@ -190,7 +189,7 @@ def _parse(self): opt_value = re.compile(f'^(?P