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CEmulator.cs
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CEmulator.cs
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using System;
using System.Collections.Generic;
using System.Text;
using System.IO;
namespace sharpGB
{
public class CEmulator
{
public byte[] NintendoLogo =
{
0xCE, 0xED, 0x66, 0x66, 0xCC, 0x0D, 0x00, 0x0B, 0x03, 0x73, 0x00,
0x83, 0x00, 0x0C, 0x00, 0x0D, 0x00, 0x08, 0x11, 0x1F, 0x88, 0x89,
0x00, 0x0E, 0xDC, 0xCC, 0x6E, 0xE6, 0xDD, 0xDD, 0xD9, 0x99, 0xBB,
0xBB, 0x67, 0x63, 0x6E, 0x0E, 0xEC, 0xCC, 0xDD, 0xDC, 0x99, 0x9F,
0xBB, 0xB9, 0x33, 0x3E
};
public enum IRQType
{
VBLANK,
LCDC,
TIMER,
SERIALIO,
HIGHTOLOW
}
// All components that make up a gameboy emulator
public CRom ROM;
public CDisassembler Disassembler;
public CMemory Memory;
public CProcessor Processor;
public CVideo Video;
public int ClockCyclesElapsed; // Elapsed cpu clock cycles
public int MachineCyclesElapsed; // Elapsed gameboy clock cycles
public int LYCounter; // Will signal when another display line is to draw
public int LastInstructionClockCycle; // Clock cycle duration of the last executed instruction
public bool EmulationRunning; // Flag indicating emulator running
public bool UnknownOPcode; // True if OPcode not implemented
public bool UnknownOperand; // True if OPcode has unexpected operand
public bool BreakPointReached; // True if PC stands at a breakpoint
public byte CurrentOPcode; // current OPcode to execute
public int LastBreakPoint; // The last address the emulator breaked at
public List<int> BreakPoints; // List of addresses the emulator is to stop
public CEmulator()
{
this.ROM = new CRom();
this.Memory = new CMemory();
this.Disassembler = new CDisassembler();
this.Processor = new CProcessor();
this.Video = new CVideo(ref this.Memory);
this.EmulationRunning = true;
this.BreakPoints = new List<int>();
Reset();
}
// Emulate the insertion of a cartridge
public bool LoadROMFromFile(string FileName)
{
// Start emulation anew
Reset();
// Load the ROM
if(!ROM.LoadFromFile(FileName)) return false;
// Determine whether the ROM will be loaded thoroughly (if 32kb ROM) or partially (i.e. Bank 0)
// into the gameboy address space, beginning at 0x0000
int DumpSize = (ROM.Header.CartridgeType == 0) ? 0x8000 : 0x4000;
for (int i = 0; i < DumpSize; i++)
Memory.Data[i] = ROM.Data[i];
// Pass the catridge information to the memory unit (affects addressing behaviour)
Memory.CartridgeType = ROM.Header.CartridgeType;
// The gameboy has an internal piece of code that loads and presents the Nintendo logo from the cartidge
// After presenting, the gameboy runs a comparison of the logo with internal rom data
ROM.LogoOK = true;
for (int i = 0x104; i < 0x134; i++)
if (ROM.Data[i] != NintendoLogo[i-0x104])
ROM.LogoOK = false;
// Now we run a complement check the gameboy and gameboypocket does afterwards
byte complement = 25;
for (int i = 0x134; i <= 0x14D; i++)
complement += ROM.Data[i];
if ( complement == 0)
ROM.ComplementOK = true;
else ROM.ComplementOK = false;
// And we do the checksum for the rom against the checksum bytes, although the gameboy itself ignores it
long checksum = 0;
for (int i = 0; i < ROM.RomSize; i++)
if ((i != 0x014E) || (i != 0x014F)) // ignore the two checksum bytes, sum up all the other bytes
checksum += ROM.Data[i];
if ((((byte)(checksum >> 8)) == ROM.Header.Checksum[0]) && // compare lower two bytes against checksum bytes
(((byte)(checksum)) == ROM.Header.Checksum[1]))
ROM.CheckSumOK = true;
else ROM.CheckSumOK = false;
// Reset the screen
Video.VBlank();
return true;
}
// Resets the complete emulation
public void Reset()
{
// Standard values
CurrentOPcode = 0x00;
ClockCyclesElapsed = 0;
LYCounter = 0;
MachineCyclesElapsed = 0;
LastBreakPoint = -1;
BreakPoints.Clear();
BreakPointReached = false;
this.EmulationRunning = true;
Memory.Data[(int)CMemory.HardwareRegisters.TIMA] = 0x00;
Memory.Data[(int)CMemory.HardwareRegisters.TMA] = 0x00;
Memory.Data[(int)CMemory.HardwareRegisters.TAC] = 0x00;
Memory.Data[(int)CMemory.HardwareRegisters.NR10] = 0x80;
Memory.Data[(int)CMemory.HardwareRegisters.NR11] = 0xBF;
Memory.Data[(int)CMemory.HardwareRegisters.NR12] = 0xF3;
Memory.Data[(int)CMemory.HardwareRegisters.NR14] = 0xBF;
// Some sound register missing here...
Memory.Data[(int)CMemory.HardwareRegisters.LCDC] = 0x91;
Memory.Data[(int)CMemory.HardwareRegisters.SCY] = 0x00;
Memory.Data[(int)CMemory.HardwareRegisters.SCX] = 0x00;
Memory.Data[(int)CMemory.HardwareRegisters.LYC] = 0x00;
Memory.Data[(int)CMemory.HardwareRegisters.BGP] = 0xFC;
Memory.Data[(int)CMemory.HardwareRegisters.OBP0] = 0xFF;
Memory.Data[(int)CMemory.HardwareRegisters.OBP1] = 0xFF;
Memory.Data[(int)CMemory.HardwareRegisters.WY] = 0x00;
Memory.Data[(int)CMemory.HardwareRegisters.WX] = 0x00;
Memory.Data[(int)CMemory.HardwareRegisters.IF] = 0x00;
Memory.Data[(int)CMemory.HardwareRegisters.IE] = 0x00;
Processor.A = 0x01;
Processor.B = 0x00;
Processor.C = 0x13;
Processor.D = 0x00;
Processor.E = 0xD8;
Processor.H = 0x01;
Processor.L = 0x4D;
Processor.PC = 0x0100;
Processor.SP = 0xFFFE;
Processor.ZeroFlag = 1;
Processor.SubtractFlag = 0;
Processor.HalfCarryFlag = 1;
Processor.CarryFlag = 1;
// Assemble the F register
Processor.F = (byte)((Processor.ZeroFlag << 7) | (Processor.SubtractFlag << 6) |
(Processor.HalfCarryFlag << 5) | (Processor.CarryFlag << 4));
}
// Add breakpoint for debugging
public void AddBreakPoint(int address)
{
if (!BreakPoints.Contains(address))
BreakPoints.Add(address);
}
// Remove breakpoint
public void RemoveBreakPoint(int address)
{
if (BreakPoints.Contains(address))
BreakPoints.Remove(address);
}
// Emulates a complete machine cycle
public void EmulateNextStep()
{
EmulationRunning = true;
// Check whether last instruction signaled a change in interrupt handling
// DI and EI take effect AFTER the next instruction following them
if (Processor.DIsignaled == 1)Processor.DIsignaled++;
else if (Processor.DIsignaled == 2)
{
Processor.DIsignaled = 0;
Processor.IME = false;
}
if (Processor.EIsignaled == 1)Processor.EIsignaled++;
else if (Processor.EIsignaled == 2)
{
Processor.EIsignaled = 0;
Processor.IME = true;
}
// Fetch current OPcode
CurrentOPcode = Memory.Data[Processor.PC];
// Check if the PC position is a breakpoint and that the last breakpoint is ignored
if (BreakPoints.Contains(Processor.PC) && (Processor.OldPC != Processor.PC))
{
BreakPointReached = true;
LastBreakPoint = Processor.PC;
EmulationRunning = false;
return;
}
// Else run the operation and save clock cycle of OPcode
Processor.OldPC = Processor.PC;
LastInstructionClockCycle = DecodeAndExecute(CurrentOPcode);
// Check if there is a reason to halt the emulation
if (UnknownOPcode || UnknownOperand || !EmulationRunning)
{
EmulationRunning = false; // Stop emulation
return;
}
// Increment cycle counters
ClockCyclesElapsed += LastInstructionClockCycle;
LYCounter += LastInstructionClockCycle;
MachineCyclesElapsed++;
// VBLANK IRQ - Occurs only when display is enabled
// Every 456(144) clock(machine) cycles, one of the 144 screen lines is drawn
// After that there is a VBlank-IRQ with a period of 10 scanlines.
if (LYCounter >= 456 && (Memory.Data[(int)CMemory.HardwareRegisters.LCDC] & 0x80)>0)
{
LYCounter = 0;
// Increase the current line the gameboy display driver is to draw
Memory.Data[(int)CMemory.HardwareRegisters.LY]++;
Video.DrawLine();
// Check if VBLANK interrupt arises or correct LY if needed
if (Memory.Data[(int)CMemory.HardwareRegisters.LY] == 144)
{
RaiseIRQ(IRQType.VBLANK);
Video.VBlank();
}
else if (Memory.Data[(int)CMemory.HardwareRegisters.LY] > 153)
Memory.Data[(int)CMemory.HardwareRegisters.LY] = 0;
// Check for LYC coincidence
if (((Memory.Data[(int)CMemory.HardwareRegisters.STAT] & 0x40) > 0) && // enabled?
(Memory.Data[(int)CMemory.HardwareRegisters.LY] ==
Memory.Data[(int)CMemory.HardwareRegisters.LYC]))
Memory.Data[(int)CMemory.HardwareRegisters.STAT] |= 0x04; // bit on
else Memory.Data[(int)CMemory.HardwareRegisters.STAT] &= 0xFB; // bit off
}
// Timer IRQ
// Serial Transfer IRQ
// High-to-Low P10-P13 (key input handling)
// Check whether interrupts are to be handled
if (Processor.IME) DoIdleIRQs();
}
// Emulate until encountered a problem or aborted
public void EmulateFully()
{
while (EmulationRunning)
EmulateNextStep();
}
// Emulate n steps
public void EmulateSteps(int n)
{
for (int i = 0; i < n && EmulationRunning; i++ )
EmulateNextStep();
}
// Shows a window with more information on emulator halt
public void ShowError()
{
if (EmulationRunning) return;
if (BreakPointReached)
{
System.Windows.Forms.MessageBox.Show("Reached breakpoint at 0x" + Processor.PC.ToString("X4"));
BreakPointReached = false;
}
else if (UnknownOPcode)
System.Windows.Forms.MessageBox.Show("Unknown OPcode: " + Memory.Data[Processor.PC].ToString("X2"));
else if (UnknownOperand)
System.Windows.Forms.MessageBox.Show("Unknown operand: " + Memory.Data[Processor.PC+1].ToString("X2"));
EmulationRunning = true;
}
// This (humongous) method decodes and executes the given opcode.
int DecodeAndExecute(byte OPcode)
{
// return value, represents the clock cycles needed for opcode
int cycles=0;
// Assemble the F register
Processor.F = (byte)((Processor.ZeroFlag << 7) | (Processor.SubtractFlag << 6) |
(Processor.HalfCarryFlag << 5) | (Processor.CarryFlag << 4));
// often used variables
Processor.HL = (ushort) (Processor.H << 8 | Processor.L);
byte value;
ushort word;
// In here, PC incrementing/changing must be taken care of as well
switch (OPcode)
{
#region /* Load instructions */
// immediate loads
case 0x3E: // A <- immediate
Processor.A = Memory.Data[Processor.PC + 1];
Processor.PC += 2;
cycles = 8;
break;
case 0x06: // B <- immediate
Processor.B = Memory.Data[Processor.PC + 1];
Processor.PC += 2;
cycles = 8;
break;
case 0x0E: // C <- immediate
Processor.C = Memory.Data[Processor.PC + 1];
Processor.PC += 2;
cycles = 8;
break;
case 0x16: // D <- immediate
Processor.D = Memory.Data[Processor.PC + 1];
Processor.PC += 2;
cycles = 8;
break;
case 0x1E: // E <- immediate
Processor.E = Memory.Data[Processor.PC + 1];
Processor.PC += 2;
cycles = 8;
break;
case 0x26: // H <- immediate
Processor.H = Memory.Data[Processor.PC + 1];
Processor.PC += 2;
cycles = 8;
break;
case 0x2E: // L <- immediate
Processor.L = Memory.Data[Processor.PC + 1];
Processor.PC += 2;
cycles = 8;
break;
case 0x01: // BC <- immediate
Processor.C = Memory.Data[Processor.PC + 1];
Processor.B = Memory.Data[Processor.PC + 2];
Processor.PC += 3;
cycles = 12;
break;
case 0x11: // DE <- immediate
Processor.E = Memory.Data[Processor.PC + 1];
Processor.D = Memory.Data[Processor.PC + 2];
Processor.PC += 3;
cycles = 12;
break;
case 0x21: // HL <- immediate
Processor.L = Memory.Data[Processor.PC + 1];
Processor.H = Memory.Data[Processor.PC + 2];
Processor.PC += 3;
cycles = 12;
break;
case 0x31: // SP <- immediate
Processor.SP = (ushort)(Memory.Data[Processor.PC + 2] << 8 | Memory.Data[Processor.PC + 1]);
Processor.PC += 3;
cycles = 12;
break;
case 0x36: // (HL) <- immediate
Memory.writeByte(Processor.HL, Memory.Data[Processor.PC + 1]);
Processor.PC += 2;
cycles = 12;
break;
// memory to register transfer
case 0xF2: // A <- (0xFF00 + C)
word = (ushort)(0xFF00 + Processor.C);
Processor.A = Memory.readByte(word);
Processor.PC++;
cycles = 8;
break;
case 0x0A: // A <- (BC)
word = (ushort)(Processor.B << 8 | Processor.C);
Processor.A = Memory.readByte(word);
Processor.PC++;
cycles = 8;
break;
case 0x1A: // A <- (DE)
word = (ushort)(Processor.D << 8 | Processor.E);
Processor.A = Memory.readByte(word);
Processor.PC++;
cycles = 8;
break;
case 0x7E: // A <- (HL)
Processor.A = Memory.readByte(Processor.HL);
Processor.PC++;
cycles = 8;
break;
case 0x46: // B <- (HL)
Processor.B = Memory.readByte(Processor.HL);
Processor.PC++;
cycles = 8;
break;
case 0x4E: // C <- (HL)
Processor.C = Memory.readByte(Processor.HL);
Processor.PC++;
cycles = 8;
break;
case 0x56: // D <- (HL)
Processor.D = Memory.readByte(Processor.HL);
Processor.PC++;
cycles = 8;
break;
case 0x5E: // E <- (HL)
Processor.E = Memory.readByte(Processor.HL);
Processor.PC++;
cycles = 8;
break;
case 0x66: // H <- (HL)
Processor.H = Memory.readByte(Processor.HL);
Processor.PC++;
cycles = 8;
break;
case 0x6E: // L <- (HL)
Processor.L = Memory.readByte(Processor.HL);
Processor.PC++;
cycles = 8;
break;
case 0x2A: // A <- (HL), HL++ /* FLAGS??? */
Processor.A = Memory.readByte(Processor.HL);
Processor.HL++;
Processor.H = (byte)(Processor.HL >> 8);
Processor.L = (byte)Processor.HL;
Processor.PC++;
cycles = 8;
break;
case 0xFA: // A <- (nn immediate)
word = (ushort)(Memory.Data[Processor.PC + 2] << 8 | Memory.Data[Processor.PC + 1]);
Processor.A = Memory.readByte(word);
Processor.PC += 3;
cycles = 16;
break;
case 0xF0: // A <- (0xFF00+ n immediate)
word = (ushort)(0xFF00 + Memory.Data[Processor.PC + 1]);
Processor.A = Memory.readByte(word);
Processor.PC += 2;
cycles = 12;
break;
// register to memory transfer
case 0xE2: // (0xFF00 + C) <- A
word = (ushort)(0xFF00 + Processor.C);
Memory.writeByte(word, Processor.A);
Processor.PC++;
cycles = 8;
break;
case 0x02: // (BC) <- A
word = (ushort)(Processor.B << 8 | Processor.C);
Memory.writeByte(word, Processor.A);
Processor.PC++;
cycles = 8;
break;
case 0x12: // (DE) <- A
word = (ushort)(Processor.D << 8 | Processor.E);
Memory.writeByte(word, Processor.A);
Processor.PC++;
cycles = 8;
break;
case 0x77: // (HL) <- A
Memory.writeByte(Processor.HL, Processor.A);
Processor.PC++;
cycles = 8;
break;
case 0x70: // (HL) <- B
Memory.writeByte(Processor.HL, Processor.B);
Processor.PC++;
cycles = 8;
break;
case 0x71: // (HL) <- C
Memory.writeByte(Processor.HL, Processor.C);
Processor.PC++;
cycles = 8;
break;
case 0x72: // (HL) <- D
Memory.writeByte(Processor.HL, Processor.D);
Processor.PC++;
cycles = 8;
break;
case 0x73: // (HL) <- E
Memory.writeByte(Processor.HL, Processor.E);
Processor.PC++;
cycles = 8;
break;
case 0x74: // (HL) <- H
Memory.writeByte(Processor.HL, Processor.H);
Processor.PC++;
cycles = 8;
break;
case 0x75: // (HL) <- L
Memory.writeByte(Processor.HL, Processor.L);
Processor.PC++;
cycles = 8;
break;
case 0xEA: // (nn) <- A
word = (ushort)(Memory.Data[Processor.PC + 2] << 8 | Memory.Data[Processor.PC + 1]);
Memory.writeByte(word, Processor.A);
Processor.PC += 3;
cycles = 16;
break;
case 0xE0: // (0xFF00+ n immediate) <- A
word = (ushort)(0xFF00 + Memory.Data[Processor.PC + 1]);
Memory.writeByte(word, Processor.A);
Processor.PC += 2;
cycles = 12;
break;
case 0x32: // (HL) <- A, HL--
Memory.writeByte(Processor.HL, Processor.A);
Processor.HL--;
Processor.H = (byte)(Processor.HL >> 8);
Processor.L = (byte)Processor.HL;
Processor.PC++;
cycles = 8;
break;
case 0x22: // (HL) <- A, HL++
Memory.writeByte(Processor.HL, Processor.A);
Processor.HL++;
Processor.H = (byte)(Processor.HL >> 8);
Processor.L = (byte)Processor.HL;
Processor.PC++;
cycles = 8;
break;
case 0x08: // (nn) <- SP
word = (ushort)(Memory.Data[Processor.PC + 2] << 8 | Memory.Data[Processor.PC + 1]);
Memory.writeByte(word, (byte) Processor.SP);
Memory.writeByte(word+1, (byte)(Processor.SP >> 8) );
Processor.PC += 3;
cycles = 20;
break;
// register to register transfer
case 0x7F: // A <- A
Processor.PC++;
cycles = 4;
break;
case 0x78: // A <- B
Processor.A = Processor.B;
Processor.PC++;
cycles = 4;
break;
case 0x79: // A <- C
Processor.A = Processor.C;
Processor.PC++;
cycles = 4;
break;
case 0x7A: // A <- D
Processor.A = Processor.D;
Processor.PC++;
cycles = 4;
break;
case 0x7B: // A <- E
Processor.A = Processor.E;
Processor.PC++;
cycles = 4;
break;
case 0x7C: // A <- H
Processor.A = Processor.H;
Processor.PC++;
cycles = 4;
break;
case 0x7D: // A <- L
Processor.A = Processor.L;
Processor.PC++;
cycles = 4;
break;
case 0x47: // B <- A
Processor.B = Processor.A;
Processor.PC++;
cycles = 4;
break;
case 0x40: // B <- B
Processor.PC++;
cycles = 4;
break;
case 0x41: // B <- C
Processor.B = Processor.C;
Processor.PC++;
cycles = 4;
break;
case 0x42: // B <- D
Processor.B = Processor.D;
Processor.PC++;
cycles = 4;
break;
case 0x43: // B <- E
Processor.B = Processor.E;
Processor.PC++;
cycles = 4;
break;
case 0x44: // B <- H
Processor.B = Processor.H;
Processor.PC++;
cycles = 4;
break;
case 0x45: // B <- L
Processor.B = Processor.L;
Processor.PC++;
cycles = 4;
break;
case 0x4F: // C <- A
Processor.C = Processor.A;
Processor.PC++;
cycles = 4;
break;
case 0x48: // C <- B
Processor.C = Processor.B;
Processor.PC++;
cycles = 4;
break;
case 0x49: // C <- C
Processor.PC++;
cycles = 4;
break;
case 0x4A: // C <- D
Processor.C = Processor.D;
Processor.PC++;
cycles = 4;
break;
case 0x4B: // C <- E
Processor.C = Processor.E;
Processor.PC++;
cycles = 4;
break;
case 0x4C: // C <- H
Processor.C = Processor.H;
Processor.PC++;
cycles = 4;
break;
case 0x4D: // C <- L
Processor.C = Processor.L;
Processor.PC++;
cycles = 4;
break;
case 0x57: // D <- A
Processor.D = Processor.A;
Processor.PC++;
cycles = 4;
break;
case 0x50: // D <- B
Processor.D = Processor.B;
Processor.PC++;
cycles = 4;
break;
case 0x51: // D <- C
Processor.D = Processor.C;
Processor.PC++;
cycles = 4;
break;
case 0x52: // D <- D
Processor.PC++;
cycles = 4;
break;
case 0x53: // D <- E
Processor.D = Processor.E;
Processor.PC++;
cycles = 4;
break;
case 0x54: // D <- H
Processor.D = Processor.H;
Processor.PC++;
cycles = 4;
break;
case 0x55: // D <- L
Processor.D = Processor.L;
Processor.PC++;
cycles = 4;
break;
case 0x5F: // E <- A
Processor.E = Processor.A;
Processor.PC++;
cycles = 4;
break;
case 0x58: // E <- B
Processor.E = Processor.B;
Processor.PC++;
cycles = 4;
break;
case 0x59: // E <- C
Processor.E = Processor.C;
Processor.PC++;
cycles = 4;
break;
case 0x5A: // E <- D
Processor.E = Processor.D;
Processor.PC++;
cycles = 4;
break;
case 0x5B: // E <- E
Processor.PC++;
cycles = 4;
break;
case 0x5C: // E <- H
Processor.E = Processor.H;
Processor.PC++;
cycles = 4;
break;
case 0x5D: // E <- L
Processor.E = Processor.L;
Processor.PC++;
cycles = 4;
break;
case 0x67: // H <- A
Processor.H = Processor.A;
Processor.PC++;
cycles = 4;
break;
case 0x60: // H <- B
Processor.H = Processor.B;
Processor.PC++;
cycles = 4;
break;
case 0x61: // H <- C
Processor.H = Processor.C;
Processor.PC++;
cycles = 4;
break;
case 0x62: // H <- D
Processor.H = Processor.D;
Processor.PC++;
cycles = 4;
break;
case 0x63: // H <- E
Processor.H = Processor.E;
Processor.PC++;
cycles = 4;
break;
case 0x64: // H <- H
Processor.PC++;
cycles = 4;
break;
case 0x65: // H <- L
Processor.H = Processor.L;
Processor.PC++;
cycles = 4;
break;
case 0x6F: // L <- A
Processor.L = Processor.A;
Processor.PC++;
cycles = 4;
break;
case 0x68: // L <- B
Processor.L = Processor.B;
Processor.PC++;
cycles = 4;
break;
case 0x69: // L <- C
Processor.L = Processor.C;
Processor.PC++;
cycles = 4;
break;
case 0x6A: // L <- D
Processor.L = Processor.D;
Processor.PC++;
cycles = 4;
break;
case 0x6B: // L <- E
Processor.L = Processor.E;
Processor.PC++;
cycles = 4;
break;
case 0x6C: // L <- H
Processor.L = Processor.H;
Processor.PC++;
cycles = 4;
break;
case 0x6D: // L <- L
Processor.PC++;
cycles = 4;
break;
case 0xF9: // SP <- HL
Processor.SP = Processor.HL;
Processor.PC++;
cycles = 8;
break;
case 0xF8: // HL <- SP + signed immediate
word = Processor.HL;
Processor.HL = (ushort)(Processor.SP + (sbyte)(Memory.Data[Processor.PC + 1]));
Processor.SetFlags(0, 0, (word & 0x800) - (Processor.HL & 0x800), (word & 0x8000) - (Processor.HL & 0x8000));
Processor.PC += 2;
cycles = 12;
break;
// STACK OPS
// PUSH
case 0xF5: // PUSH AF
op_push(Processor.F);
op_push(Processor.A);
Processor.PC++;
cycles = 16;
break;
case 0xC5: // PUSH BC
op_push(Processor.C);
op_push(Processor.B);
Processor.PC++;
cycles = 16;
break;
case 0xD5: // PUSH DE
op_push(Processor.E);
op_push(Processor.D);
Processor.PC++;
cycles = 16;
break;
case 0xE5: // PUSH HL
op_push(Processor.L);
op_push(Processor.H);
Processor.PC++;
cycles = 16;
break;
// POP
case 0xF1: // POP AF
Processor.A = op_pop();
Processor.F = op_pop();
Processor.PC++;
cycles = 12;
break;
case 0xC1: // POP BC
Processor.B = op_pop();
Processor.C = op_pop();
Processor.PC++;
cycles = 12;
break;
case 0xD1: // POP DE
Processor.D = op_pop();
Processor.E = op_pop();
Processor.PC++;
cycles = 12;
break;
case 0xE1: // POP HL
Processor.H = op_pop();
Processor.L = op_pop();
Processor.PC++;
cycles = 12;
break;
#endregion
#region /* Arithmetic instructions */
// 8-bit arithmetics
// ADD
case 0x87:
op_add(Processor.A);
Processor.PC++;
cycles = 4;
break;
case 0x80:
op_add(Processor.B);
Processor.PC++;
cycles = 4;
break;
case 0x81:
op_add(Processor.C);
Processor.PC++;
cycles = 4;
break;
case 0x82:
op_add(Processor.D);
Processor.PC++;
cycles = 4;
break;
case 0x83:
op_add(Processor.E);
Processor.PC++;
cycles = 4;
break;
case 0x84:
op_add(Processor.H);
Processor.PC++;
cycles = 4;
break;
case 0x85:
op_add(Processor.L);
Processor.PC++;
cycles = 4;
break;
case 0x86:
op_add(Memory.readByte(Processor.HL));
Processor.PC++;
cycles = 8;
break;
case 0xC6:
op_add(Memory.Data[Processor.PC+1]);
Processor.PC += 2;
cycles = 8;
break;
// ADC
case 0x8F:
op_adc(Processor.A);
Processor.PC++;
cycles = 4;
break;
case 0x88:
op_adc(Processor.B);
Processor.PC++;
cycles = 4;
break;
case 0x89:
op_adc(Processor.C);
Processor.PC++;
cycles = 4;
break;
case 0x8A:
op_adc(Processor.D);
Processor.PC++;
cycles = 4;
break;
case 0x8B:
op_adc(Processor.E);
Processor.PC++;
cycles = 4;
break;
case 0x8C:
op_adc(Processor.H);
Processor.PC++;
cycles = 4;
break;
case 0x8D:
op_adc(Processor.L);
Processor.PC++;
cycles = 4;
break;
case 0x8E:
op_adc(Memory.readByte(Processor.HL));
Processor.PC++;
cycles = 8;
break;
case 0xCE:
op_add(Memory.Data[Processor.PC + 1]);
Processor.PC += 2;
cycles = 8;
break;
// SUB
case 0x97:
op_sub(Processor.A);
Processor.PC++;
cycles = 4;
break;
case 0x90:
op_sub(Processor.B);
Processor.PC++;
cycles = 4;
break;
case 0x91:
op_sub(Processor.C);
Processor.PC++;
cycles = 4;
break;
case 0x92:
op_sub(Processor.D);
Processor.PC++;
cycles = 4;
break;
case 0x93:
op_sub(Processor.E);
Processor.PC++;
cycles = 4;
break;
case 0x94:
op_sub(Processor.H);
Processor.PC++;
cycles = 4;
break;