simulate single x8 DRAM

[klaru]

How can I simulate a channel with a single x8 DRAM?

I can simulate a channel with four or two DRAMs by changing the "nbrOfDevices" parameter in the memspec .json file AND simultaneously change the "BYTE_BIT" addresses by removing address 2 (for four x8 devices) or by removing addresses 1 and 2 (for two x8 devices).
However, this doesn't work for "nbrOfDevices"=1 since when I remove all "BYTE_BITS" I get a segmentation fault.

Also, how could I simulate a channel with a single x4 DRAM (which is less than a byte wide)?

[lsteiner-tukl]

Thank you for the hint. Here is a patch that fixes this problem. However, simulating only one x4 device is not yet possible.
fix_single_device.patch

[klaru]

Thanks for the patch. It works. Any plans to make a single x4 device work as well? Klaus From: lsteiner-tukl ***@***.***> Sent: Wednesday, August 30, 2023 1:49 To: tukl-msd/DRAMSys ***@***.***> Cc: klaru ***@***.***>; Author ***@***.***> Subject: Re: [tukl-msd/DRAMSys] simulate single x8 DRAM (Issue #32) Thank you for the hint. Here is a patch that fixes this problem. However, simulating only one x4 device is not yet possible. fix_single_device.patch <https://github.com/tukl-msd/DRAMSys/files/12473664/fix_single_device.patch> — Reply to this email directly, view it on GitHub <#32 (comment)> , or unsubscribe <https://github.com/notifications/unsubscribe-auth/AKKHCY4C4SDM6G2DT3V2R3LXX3457ANCNFSM6AAAAAA4D6UQW4> . You are receiving this because you authored the thread. <https://github.com/notifications/beacon/AKKHCY756CXVMGUWKKZJE2DXX3457A5CNFSM6AAAAAA4D6UQW6WGG33NNVSW45C7OR4XAZNMJFZXG5LFINXW23LFNZ2KUY3PNVWWK3TUL5UWJTTFIDXZQ.gif> Message ID: ***@***.*** ***@***.***> >

[lsteiner-tukl]

One problem is that our address mappings work on byte granularity. Are you planning to run simulations with enabled storage? Because from a behavioral perspective it makes no difference whether you only simulate a single device or a whole DIMM.