From faaca338731953a1231f68fcadfdc3e6bdb61c0c Mon Sep 17 00:00:00 2001 From: Billy Rennekamp Date: Thu, 8 Aug 2024 22:30:54 +0200 Subject: [PATCH 01/10] prover server --- .gitignore | 9 + game_4_250_cpp/Makefile | 22 + game_4_250_cpp/calcwit.cpp | 126 + game_4_250_cpp/calcwit.hpp | 69 + game_4_250_cpp/circom.hpp | 85 + game_4_250_cpp/fr.asm | 8794 ++++++++++++++++++++ game_4_250_cpp/fr.cpp | 321 + game_4_250_cpp/fr.hpp | 164 + game_4_250_cpp/game_4_250.cpp | 7807 +++++++++++++++++ game_4_250_cpp/game_4_250.dat | Bin 0 -> 6572440 bytes game_4_250_cpp/main.cpp | 288 + game_4_250_js/generate_witness.js | 22 + game_4_250_js/witness_calculator.js | 330 + game_6_125_cpp/Makefile | 22 + game_6_125_cpp/calcwit.cpp | 126 + game_6_125_cpp/calcwit.hpp | 69 + game_6_125_cpp/circom.hpp | 85 + game_6_125_cpp/fr.asm | 8794 ++++++++++++++++++++ game_6_125_cpp/fr.cpp | 321 + game_6_125_cpp/fr.hpp | 164 + game_6_125_cpp/game_6_125.cpp | 7819 +++++++++++++++++ game_6_125_cpp/game_6_125.dat | Bin 0 -> 6594560 bytes game_6_125_cpp/main.cpp | 288 + game_6_125_js/generate_witness.js | 22 + game_6_125_js/witness_calculator.js | 330 + server-prover/package.json | 15 + server-prover/sample/game_4_250.wtns | Bin 0 -> 26257100 bytes server-prover/sample/game_4_250_input.json | 263 + server-prover/sample/game_6_125.wtns | Bin 0 -> 26345420 bytes server-prover/sample/game_6_125_input.json | 140 + server-prover/src/index.html | 1 + server-prover/src/index.js | 91 + server-prover/src/witness_calculator.js | 330 + server-prover/yarn.lock | 8 + 34 files changed, 36925 insertions(+) create mode 100644 game_4_250_cpp/Makefile create mode 100644 game_4_250_cpp/calcwit.cpp create mode 100644 game_4_250_cpp/calcwit.hpp create mode 100644 game_4_250_cpp/circom.hpp create mode 100644 game_4_250_cpp/fr.asm create mode 100644 game_4_250_cpp/fr.cpp create mode 100644 game_4_250_cpp/fr.hpp create mode 100644 game_4_250_cpp/game_4_250.cpp create mode 100644 game_4_250_cpp/game_4_250.dat create mode 100644 game_4_250_cpp/main.cpp create mode 100644 game_4_250_js/generate_witness.js create mode 100644 game_4_250_js/witness_calculator.js create mode 100644 game_6_125_cpp/Makefile create mode 100644 game_6_125_cpp/calcwit.cpp create mode 100644 game_6_125_cpp/calcwit.hpp create mode 100644 game_6_125_cpp/circom.hpp create mode 100644 game_6_125_cpp/fr.asm create mode 100644 game_6_125_cpp/fr.cpp create mode 100644 game_6_125_cpp/fr.hpp create mode 100644 game_6_125_cpp/game_6_125.cpp create mode 100644 game_6_125_cpp/game_6_125.dat create mode 100644 game_6_125_cpp/main.cpp create mode 100644 game_6_125_js/generate_witness.js create mode 100644 game_6_125_js/witness_calculator.js create mode 100644 server-prover/package.json create mode 100644 server-prover/sample/game_4_250.wtns create mode 100644 server-prover/sample/game_4_250_input.json create mode 100644 server-prover/sample/game_6_125.wtns create mode 100644 server-prover/sample/game_6_125_input.json create mode 100644 server-prover/src/index.html create mode 100644 server-prover/src/index.js create mode 100644 server-prover/src/witness_calculator.js create mode 100644 server-prover/yarn.lock diff --git a/.gitignore b/.gitignore index 1c28230c..f840862d 100644 --- a/.gitignore +++ b/.gitignore @@ -31,6 +31,15 @@ contracts/*Verifier.sol /*_js/ /*_cpp/ + +!game_4_250_cpp +!game_6_125_cpp + +!game_4_250_js +!game_6_125_js + +*/tmp/* + *_proof.json *_public.json diff --git a/game_4_250_cpp/Makefile b/game_4_250_cpp/Makefile new file mode 100644 index 00000000..fcfd109d --- /dev/null +++ b/game_4_250_cpp/Makefile @@ -0,0 +1,22 @@ +CC=g++ +CFLAGS=-std=c++11 -O3 -I. +DEPS_HPP = circom.hpp calcwit.hpp fr.hpp +DEPS_O = main.o calcwit.o fr.o fr_asm.o + +ifeq ($(shell uname),Darwin) + NASM=nasm -fmacho64 --prefix _ +endif +ifeq ($(shell uname),Linux) + NASM=nasm -felf64 +endif + +all: game_4_250 + +%.o: %.cpp $(DEPS_HPP) + $(CC) -c $< $(CFLAGS) + +fr_asm.o: fr.asm + $(NASM) fr.asm -o fr_asm.o + +game_4_250: $(DEPS_O) game_4_250.o + $(CC) -o game_4_250 *.o -lgmp diff --git a/game_4_250_cpp/calcwit.cpp b/game_4_250_cpp/calcwit.cpp new file mode 100644 index 00000000..949fea41 --- /dev/null +++ b/game_4_250_cpp/calcwit.cpp @@ -0,0 +1,126 @@ +#include +#include +#include +#include "calcwit.hpp" + +extern void run(Circom_CalcWit* ctx); + +std::string int_to_hex( u64 i ) +{ + std::stringstream stream; + stream << "0x" + << std::setfill ('0') << std::setw(16) + << std::hex << i; + return stream.str(); +} + +u64 fnv1a(std::string s) { + u64 hash = 0xCBF29CE484222325LL; + for(char& c : s) { + hash ^= u64(c); + hash *= 0x100000001B3LL; + } + return hash; +} + +Circom_CalcWit::Circom_CalcWit (Circom_Circuit *aCircuit, uint maxTh) { + circuit = aCircuit; + inputSignalAssignedCounter = get_main_input_signal_no(); + inputSignalAssigned = new bool[inputSignalAssignedCounter]; + for (int i = 0; i< inputSignalAssignedCounter; i++) { + inputSignalAssigned[i] = false; + } + signalValues = new FrElement[get_total_signal_no()]; + Fr_str2element(&signalValues[0], "1", 10); + componentMemory = new Circom_Component[get_number_of_components()]; + circuitConstants = circuit ->circuitConstants; + templateInsId2IOSignalInfo = circuit -> templateInsId2IOSignalInfo; + + maxThread = maxTh; + + // parallelism + numThread = 0; + +} + +Circom_CalcWit::~Circom_CalcWit() { + // ... +} + +uint Circom_CalcWit::getInputSignalHashPosition(u64 h) { + uint n = get_size_of_input_hashmap(); + uint pos = (uint)(h % (u64)n); + if (circuit->InputHashMap[pos].hash!=h){ + uint inipos = pos; + pos++; + while (pos != inipos) { + if (circuit->InputHashMap[pos].hash==h) return pos; + if (circuit->InputHashMap[pos].hash==0) { + fprintf(stderr, "Signal not found\n"); + assert(false); + } + pos = (pos+1)%n; + } + fprintf(stderr, "Signals not found\n"); + assert(false); + } + return pos; +} + +void Circom_CalcWit::tryRunCircuit(){ + if (inputSignalAssignedCounter == 0) { + run(this); + } +} + +void Circom_CalcWit::setInputSignal(u64 h, uint i, FrElement & val){ + if (inputSignalAssignedCounter == 0) { + fprintf(stderr, "No more signals to be assigned\n"); + assert(false); + } + uint pos = getInputSignalHashPosition(h); + if (i >= circuit->InputHashMap[pos].signalsize) { + fprintf(stderr, "Input signal array access exceeds the size\n"); + assert(false); + } + + uint si = circuit->InputHashMap[pos].signalid+i; + if (inputSignalAssigned[si-get_main_input_signal_start()]) { + fprintf(stderr, "Signal assigned twice: %d\n", si); + assert(false); + } + signalValues[si] = val; + inputSignalAssigned[si-get_main_input_signal_start()] = true; + inputSignalAssignedCounter--; + tryRunCircuit(); +} + +u64 Circom_CalcWit::getInputSignalSize(u64 h) { + uint pos = getInputSignalHashPosition(h); + return circuit->InputHashMap[pos].signalsize; +} + +std::string Circom_CalcWit::getTrace(u64 id_cmp){ + if (id_cmp == 0) return componentMemory[id_cmp].componentName; + else{ + u64 id_father = componentMemory[id_cmp].idFather; + std::string my_name = componentMemory[id_cmp].componentName; + + return Circom_CalcWit::getTrace(id_father) + "." + my_name; + } + + +} + +std::string Circom_CalcWit::generate_position_array(uint* dimensions, uint size_dimensions, uint index){ + std::string positions = ""; + + for (uint i = 0 ; i < size_dimensions; i++){ + uint last_pos = index % dimensions[size_dimensions -1 - i]; + index = index / dimensions[size_dimensions -1 - i]; + std::string new_pos = "[" + std::to_string(last_pos) + "]"; + positions = new_pos + positions; + } + return positions; +} + diff --git a/game_4_250_cpp/calcwit.hpp b/game_4_250_cpp/calcwit.hpp new file mode 100644 index 00000000..363de21d --- /dev/null +++ b/game_4_250_cpp/calcwit.hpp @@ -0,0 +1,69 @@ +#ifndef CIRCOM_CALCWIT_H +#define CIRCOM_CALCWIT_H + +#include +#include +#include +#include +#include + +#include "circom.hpp" +#include "fr.hpp" + +#define NMUTEXES 32 //512 + +u64 fnv1a(std::string s); + +class Circom_CalcWit { + + bool *inputSignalAssigned; + uint inputSignalAssignedCounter; + + Circom_Circuit *circuit; + +public: + + FrElement *signalValues; + Circom_Component* componentMemory; + FrElement* circuitConstants; + std::map templateInsId2IOSignalInfo; + std::string* listOfTemplateMessages; + + // parallelism + std::mutex numThreadMutex; + std::condition_variable ntcvs; + int numThread; + + int maxThread; + + // Functions called by the circuit + Circom_CalcWit(Circom_Circuit *aCircuit, uint numTh = NMUTEXES); + ~Circom_CalcWit(); + + // Public functions + void setInputSignal(u64 h, uint i, FrElement &val); + void tryRunCircuit(); + + u64 getInputSignalSize(u64 h); + + inline uint getRemaingInputsToBeSet() { + return inputSignalAssignedCounter; + } + + inline void getWitness(uint idx, PFrElement val) { + Fr_copy(val, &signalValues[circuit->witness2SignalList[idx]]); + } + + std::string getTrace(u64 id_cmp); + + std::string generate_position_array(uint* dimensions, uint size_dimensions, uint index); + +private: + + uint getInputSignalHashPosition(u64 h); + +}; + +typedef void (*Circom_TemplateFunction)(uint __cIdx, Circom_CalcWit* __ctx); + +#endif // CIRCOM_CALCWIT_H diff --git a/game_4_250_cpp/circom.hpp b/game_4_250_cpp/circom.hpp new file mode 100644 index 00000000..eabc686f --- /dev/null +++ b/game_4_250_cpp/circom.hpp @@ -0,0 +1,85 @@ +#ifndef __CIRCOM_H +#define __CIRCOM_H + +#include +#include +#include +#include +#include + +#include "fr.hpp" + +typedef unsigned long long u64; +typedef uint32_t u32; +typedef uint8_t u8; + +//only for the main inputs +struct __attribute__((__packed__)) HashSignalInfo { + u64 hash; + u64 signalid; + u64 signalsize; +}; + +struct IODef { + u32 offset; + u32 len; + u32 *lengths; +}; + +struct IODefPair { + u32 len; + IODef* defs; +}; + +struct Circom_Circuit { + // const char *P; + HashSignalInfo* InputHashMap; + u64* witness2SignalList; + FrElement* circuitConstants; + std::map templateInsId2IOSignalInfo; +}; + + +struct Circom_Component { + u32 templateId; + u64 signalStart; + u32 inputCounter; + std::string templateName; + std::string componentName; + u64 idFather; + u32* subcomponents = NULL; + bool* subcomponentsParallel = NULL; + bool *outputIsSet = NULL; //one for each output + std::mutex *mutexes = NULL; //one for each output + std::condition_variable *cvs = NULL; + std::thread *sbct = NULL;//subcomponent threads +}; + +/* +For every template instantiation create two functions: +- name_create +- name_run + +//PFrElement: pointer to FrElement + +Every name_run or circom_function has: +===================================== + +//array of PFrElements for auxiliars in expression computation (known size); +PFrElements expaux[]; + +//array of PFrElements for local vars (known size) +PFrElements lvar[]; + +*/ + +uint get_main_input_signal_start(); +uint get_main_input_signal_no(); +uint get_total_signal_no(); +uint get_number_of_components(); +uint get_size_of_input_hashmap(); +uint get_size_of_witness(); +uint get_size_of_constants(); +uint get_size_of_io_map(); + +#endif // __CIRCOM_H diff --git a/game_4_250_cpp/fr.asm b/game_4_250_cpp/fr.asm new file mode 100644 index 00000000..611e89c9 --- /dev/null +++ b/game_4_250_cpp/fr.asm @@ -0,0 +1,8794 @@ + + + global Fr_copy + global Fr_copyn + global Fr_add + global Fr_sub + global Fr_neg + global Fr_mul + global Fr_square + global Fr_band + global Fr_bor + global Fr_bxor + global Fr_bnot + global Fr_shl + global Fr_shr + global Fr_eq + global Fr_neq + global Fr_lt + global Fr_gt + global Fr_leq + global Fr_geq + global Fr_land + global Fr_lor + global Fr_lnot + global Fr_toNormal + global Fr_toLongNormal + global Fr_toMontgomery + global Fr_toInt + global Fr_isTrue + global Fr_q + global Fr_R3 + + global Fr_rawCopy + global Fr_rawZero + global Fr_rawSwap + global Fr_rawAdd + global Fr_rawSub + global Fr_rawNeg + global Fr_rawMMul + global Fr_rawMSquare + global Fr_rawToMontgomery + global Fr_rawFromMontgomery + global Fr_rawIsEq + global Fr_rawIsZero + global Fr_rawq + global Fr_rawR3 + + extern Fr_fail + DEFAULT REL + + section .text + + + + + + + + + + + + + + + + + + + + +;;;;;;;;;;;;;;;;;;;;;; +; copy +;;;;;;;;;;;;;;;;;;;;;; +; Copies +; Params: +; rsi <= the src +; rdi <= the dest +; +; Nidified registers: +; rax +;;;;;;;;;;;;;;;;;;;;;;; +Fr_copy: + + mov rax, [rsi + 0] + mov [rdi + 0], rax + + mov rax, [rsi + 8] + mov [rdi + 8], rax + + mov rax, [rsi + 16] + mov [rdi + 16], rax + + mov rax, [rsi + 24] + mov [rdi + 24], rax + + mov rax, [rsi + 32] + mov [rdi + 32], rax + + ret + + +;;;;;;;;;;;;;;;;;;;;;; +; rawCopy +;;;;;;;;;;;;;;;;;;;;;; +; Copies +; Params: +; rsi <= the src +; rdi <= the dest +; +; Nidified registers: +; rax +;;;;;;;;;;;;;;;;;;;;;;; +Fr_rawCopy: + + mov rax, [rsi + 0] + mov [rdi + 0], rax + + mov rax, [rsi + 8] + mov [rdi + 8], rax + + mov rax, [rsi + 16] + mov [rdi + 16], rax + + mov rax, [rsi + 24] + mov [rdi + 24], rax + + ret + + +;;;;;;;;;;;;;;;;;;;;;; +; rawZero +;;;;;;;;;;;;;;;;;;;;;; +; Copies +; Params: +; rsi <= the src +; +; Nidified registers: +; rax +;;;;;;;;;;;;;;;;;;;;;;; +Fr_rawZero: + xor rax, rax + + mov [rdi + 0], rax + + mov [rdi + 8], rax + + mov [rdi + 16], rax + + mov [rdi + 24], rax + + ret + +;;;;;;;;;;;;;;;;;;;;;; +; rawSwap +;;;;;;;;;;;;;;;;;;;;;; +; Copies +; Params: +; rdi <= a +; rsi <= p +; +; Nidified registers: +; rax +;;;;;;;;;;;;;;;;;;;;;;; +Fr_rawSwap: + + mov rax, [rsi + 0] + mov rcx, [rdi + 0] + mov [rdi + 0], rax + mov [rsi + 0], rbx + + mov rax, [rsi + 8] + mov rcx, [rdi + 8] + mov [rdi + 8], rax + mov [rsi + 8], rbx + + mov rax, [rsi + 16] + mov rcx, [rdi + 16] + mov [rdi + 16], rax + mov [rsi + 16], rbx + + mov rax, [rsi + 24] + mov rcx, [rdi + 24] + mov [rdi + 24], rax + mov [rsi + 24], rbx + + ret + + +;;;;;;;;;;;;;;;;;;;;;; +; copy an array of integers +;;;;;;;;;;;;;;;;;;;;;; +; Copies +; Params: +; rsi <= the src +; rdi <= the dest +; rdx <= number of integers to copy +; +; Nidified registers: +; rax +;;;;;;;;;;;;;;;;;;;;;;; +Fr_copyn: +Fr_copyn_loop: + mov r8, rsi + mov r9, rdi + mov rax, 5 + mul rdx + mov rcx, rax + cld + rep movsq + mov rsi, r8 + mov rdi, r9 + ret + +;;;;;;;;;;;;;;;;;;;;;; +; rawCopyS2L +;;;;;;;;;;;;;;;;;;;;;; +; Convert a 64 bit integer to a long format field element +; Params: +; rsi <= the integer +; rdi <= Pointer to the overwritted element +; +; Nidified registers: +; rax +;;;;;;;;;;;;;;;;;;;;;;; + +rawCopyS2L: + mov al, 0x80 + shl rax, 56 + mov [rdi], rax ; set the result to LONG normal + + cmp rsi, 0 + js u64toLong_adjust_neg + + mov [rdi + 8], rsi + xor rax, rax + + mov [rdi + 16], rax + + mov [rdi + 24], rax + + mov [rdi + 32], rax + + ret + +u64toLong_adjust_neg: + add rsi, [q] ; Set the first digit + mov [rdi + 8], rsi ; + + mov rsi, -1 ; all ones + + mov rax, rsi ; Add to q + adc rax, [q + 8 ] + mov [rdi + 16], rax + + mov rax, rsi ; Add to q + adc rax, [q + 16 ] + mov [rdi + 24], rax + + mov rax, rsi ; Add to q + adc rax, [q + 24 ] + mov [rdi + 32], rax + + ret + +;;;;;;;;;;;;;;;;;;;;;; +; toInt +;;;;;;;;;;;;;;;;;;;;;; +; Convert a 64 bit integer to a long format field element +; Params: +; rsi <= Pointer to the element +; Returs: +; rax <= The value +;;;;;;;;;;;;;;;;;;;;;;; +Fr_toInt: + mov rax, [rdi] + bt rax, 63 + jc Fr_long + movsx rax, eax + ret + +Fr_long: + push rbp + push rsi + push rdx + mov rbp, rsp + bt rax, 62 + jnc Fr_longNormal +Fr_longMontgomery: + + sub rsp, 40 + push rsi + mov rsi, rdi + mov rdi, rsp + call Fr_toNormal + pop rsi + + +Fr_longNormal: + mov rax, [rdi + 8] + mov rcx, rax + shr rcx, 31 + jnz Fr_longNeg + + mov rcx, [rdi + 16] + test rcx, rcx + jnz Fr_longNeg + + mov rcx, [rdi + 24] + test rcx, rcx + jnz Fr_longNeg + + mov rcx, [rdi + 32] + test rcx, rcx + jnz Fr_longNeg + + mov rsp, rbp + pop rdx + pop rsi + pop rbp + ret + +Fr_longNeg: + mov rax, [rdi + 8] + sub rax, [q] + jnc Fr_longErr + + mov rcx, [rdi + 16] + sbb rcx, [q + 8] + jnc Fr_longErr + + mov rcx, [rdi + 24] + sbb rcx, [q + 16] + jnc Fr_longErr + + mov rcx, [rdi + 32] + sbb rcx, [q + 24] + jnc Fr_longErr + + mov rcx, rax + sar rcx, 31 + add rcx, 1 + jnz Fr_longErr + mov rsp, rbp + pop rdx + pop rsi + pop rbp + ret + +Fr_longErr: + push rdi + mov rdi, 0 + call Fr_fail + pop rdi + mov rsp, rbp + pop rdx + pop rsi + pop rbp + ret + + + + + +Fr_rawMMul: + push r15 + push r14 + push r13 + push r12 + mov rcx,rdx + mov r9,[ np ] + xor r10,r10 + +; FirstLoop + mov rdx,[rsi + 0] + mulx rax,r11,[rcx] + mulx r8,r12,[rcx +8] + adcx r12,rax + mulx rax,r13,[rcx +16] + adcx r13,r8 + mulx r8,r14,[rcx +24] + adcx r14,rax + mov r15,r10 + adcx r15,r8 +; SecondLoop + mov rdx,r9 + mulx rax,rdx,r11 + mulx r8,rax,[q] + adcx rax,r11 + mulx rax,r11,[q +8] + adcx r11,r8 + adox r11,r12 + mulx r8,r12,[q +16] + adcx r12,rax + adox r12,r13 + mulx rax,r13,[q +24] + adcx r13,r8 + adox r13,r14 + mov r14,r10 + adcx r14,rax + adox r14,r15 + +; FirstLoop + mov rdx,[rsi + 8] + mov r15,r10 + mulx r8,rax,[rcx +0] + adcx r11,rax + adox r12,r8 + mulx r8,rax,[rcx +8] + adcx r12,rax + adox r13,r8 + mulx r8,rax,[rcx +16] + adcx r13,rax + adox r14,r8 + mulx r8,rax,[rcx +24] + adcx r14,rax + adox r15,r8 + adcx r15,r10 +; SecondLoop + mov rdx,r9 + mulx rax,rdx,r11 + mulx r8,rax,[q] + adcx rax,r11 + mulx rax,r11,[q +8] + adcx r11,r8 + adox r11,r12 + mulx r8,r12,[q +16] + adcx r12,rax + adox r12,r13 + mulx rax,r13,[q +24] + adcx r13,r8 + adox r13,r14 + mov r14,r10 + adcx r14,rax + adox r14,r15 + +; FirstLoop + mov rdx,[rsi + 16] + mov r15,r10 + mulx r8,rax,[rcx +0] + adcx r11,rax + adox r12,r8 + mulx r8,rax,[rcx +8] + adcx r12,rax + adox r13,r8 + mulx r8,rax,[rcx +16] + adcx r13,rax + adox r14,r8 + mulx r8,rax,[rcx +24] + adcx r14,rax + adox r15,r8 + adcx r15,r10 +; SecondLoop + mov rdx,r9 + mulx rax,rdx,r11 + mulx r8,rax,[q] + adcx rax,r11 + mulx rax,r11,[q +8] + adcx r11,r8 + adox r11,r12 + mulx r8,r12,[q +16] + adcx r12,rax + adox r12,r13 + mulx rax,r13,[q +24] + adcx r13,r8 + adox r13,r14 + mov r14,r10 + adcx r14,rax + adox r14,r15 + +; FirstLoop + mov rdx,[rsi + 24] + mov r15,r10 + mulx r8,rax,[rcx +0] + adcx r11,rax + adox r12,r8 + mulx r8,rax,[rcx +8] + adcx r12,rax + adox r13,r8 + mulx r8,rax,[rcx +16] + adcx r13,rax + adox r14,r8 + mulx r8,rax,[rcx +24] + adcx r14,rax + adox r15,r8 + adcx r15,r10 +; SecondLoop + mov rdx,r9 + mulx rax,rdx,r11 + mulx r8,rax,[q] + adcx rax,r11 + mulx rax,r11,[q +8] + adcx r11,r8 + adox r11,r12 + mulx r8,r12,[q +16] + adcx r12,rax + adox r12,r13 + mulx rax,r13,[q +24] + adcx r13,r8 + adox r13,r14 + mov r14,r10 + adcx r14,rax + adox r14,r15 + +;comparison + cmp r14,[q + 24] + jc Fr_rawMMul_done + jnz Fr_rawMMul_sq + cmp r13,[q + 16] + jc Fr_rawMMul_done + jnz Fr_rawMMul_sq + cmp r12,[q + 8] + jc Fr_rawMMul_done + jnz Fr_rawMMul_sq + cmp r11,[q + 0] + jc Fr_rawMMul_done + jnz Fr_rawMMul_sq +Fr_rawMMul_sq: + sub r11,[q +0] + sbb r12,[q +8] + sbb r13,[q +16] + sbb r14,[q +24] +Fr_rawMMul_done: + mov [rdi + 0],r11 + mov [rdi + 8],r12 + mov [rdi + 16],r13 + mov [rdi + 24],r14 + pop r12 + pop r13 + pop r14 + pop r15 + ret +Fr_rawMSquare: + push r15 + push r14 + push r13 + push r12 + mov rcx,rdx + mov r9,[ np ] + xor r10,r10 + +; FirstLoop + mov rdx,[rsi + 0] + mulx rax,r11,rdx + mulx r8,r12,[rsi +8] + adcx r12,rax + mulx rax,r13,[rsi +16] + adcx r13,r8 + mulx r8,r14,[rsi +24] + adcx r14,rax + mov r15,r10 + adcx r15,r8 +; SecondLoop + mov rdx,r9 + mulx rax,rdx,r11 + mulx r8,rax,[q] + adcx rax,r11 + mulx rax,r11,[q +8] + adcx r11,r8 + adox r11,r12 + mulx r8,r12,[q +16] + adcx r12,rax + adox r12,r13 + mulx rax,r13,[q +24] + adcx r13,r8 + adox r13,r14 + mov r14,r10 + adcx r14,rax + adox r14,r15 + +; FirstLoop + mov rdx,[rsi + 8] + mov r15,r10 + mulx r8,rax,[rsi +0] + adcx r11,rax + adox r12,r8 + mulx r8,rax,[rsi +8] + adcx r12,rax + adox r13,r8 + mulx r8,rax,[rsi +16] + adcx r13,rax + adox r14,r8 + mulx r8,rax,[rsi +24] + adcx r14,rax + adox r15,r8 + adcx r15,r10 +; SecondLoop + mov rdx,r9 + mulx rax,rdx,r11 + mulx r8,rax,[q] + adcx rax,r11 + mulx rax,r11,[q +8] + adcx r11,r8 + adox r11,r12 + mulx r8,r12,[q +16] + adcx r12,rax + adox r12,r13 + mulx rax,r13,[q +24] + adcx r13,r8 + adox r13,r14 + mov r14,r10 + adcx r14,rax + adox r14,r15 + +; FirstLoop + mov rdx,[rsi + 16] + mov r15,r10 + mulx r8,rax,[rsi +0] + adcx r11,rax + adox r12,r8 + mulx r8,rax,[rsi +8] + adcx r12,rax + adox r13,r8 + mulx r8,rax,[rsi +16] + adcx r13,rax + adox r14,r8 + mulx r8,rax,[rsi +24] + adcx r14,rax + adox r15,r8 + adcx r15,r10 +; SecondLoop + mov rdx,r9 + mulx rax,rdx,r11 + mulx r8,rax,[q] + adcx rax,r11 + mulx rax,r11,[q +8] + adcx r11,r8 + adox r11,r12 + mulx r8,r12,[q +16] + adcx r12,rax + adox r12,r13 + mulx rax,r13,[q +24] + adcx r13,r8 + adox r13,r14 + mov r14,r10 + adcx r14,rax + adox r14,r15 + +; FirstLoop + mov rdx,[rsi + 24] + mov r15,r10 + mulx r8,rax,[rsi +0] + adcx r11,rax + adox r12,r8 + mulx r8,rax,[rsi +8] + adcx r12,rax + adox r13,r8 + mulx r8,rax,[rsi +16] + adcx r13,rax + adox r14,r8 + mulx r8,rax,[rsi +24] + adcx r14,rax + adox r15,r8 + adcx r15,r10 +; SecondLoop + mov rdx,r9 + mulx rax,rdx,r11 + mulx r8,rax,[q] + adcx rax,r11 + mulx rax,r11,[q +8] + adcx r11,r8 + adox r11,r12 + mulx r8,r12,[q +16] + adcx r12,rax + adox r12,r13 + mulx rax,r13,[q +24] + adcx r13,r8 + adox r13,r14 + mov r14,r10 + adcx r14,rax + adox r14,r15 + +;comparison + cmp r14,[q + 24] + jc Fr_rawMSquare_done + jnz Fr_rawMSquare_sq + cmp r13,[q + 16] + jc Fr_rawMSquare_done + jnz Fr_rawMSquare_sq + cmp r12,[q + 8] + jc Fr_rawMSquare_done + jnz Fr_rawMSquare_sq + cmp r11,[q + 0] + jc Fr_rawMSquare_done + jnz Fr_rawMSquare_sq +Fr_rawMSquare_sq: + sub r11,[q +0] + sbb r12,[q +8] + sbb r13,[q +16] + sbb r14,[q +24] +Fr_rawMSquare_done: + mov [rdi + 0],r11 + mov [rdi + 8],r12 + mov [rdi + 16],r13 + mov [rdi + 24],r14 + pop r12 + pop r13 + pop r14 + pop r15 + ret +Fr_rawMMul1: + push r15 + push r14 + push r13 + push r12 + mov rcx,rdx + mov r9,[ np ] + xor r10,r10 + +; FirstLoop + mov rdx,rcx + mulx rax,r11,[rsi] + mulx r8,r12,[rsi +8] + adcx r12,rax + mulx rax,r13,[rsi +16] + adcx r13,r8 + mulx r8,r14,[rsi +24] + adcx r14,rax + mov r15,r10 + adcx r15,r8 +; SecondLoop + mov rdx,r9 + mulx rax,rdx,r11 + mulx r8,rax,[q] + adcx rax,r11 + mulx rax,r11,[q +8] + adcx r11,r8 + adox r11,r12 + mulx r8,r12,[q +16] + adcx r12,rax + adox r12,r13 + mulx rax,r13,[q +24] + adcx r13,r8 + adox r13,r14 + mov r14,r10 + adcx r14,rax + adox r14,r15 + + mov r15,r10 +; SecondLoop + mov rdx,r9 + mulx rax,rdx,r11 + mulx r8,rax,[q] + adcx rax,r11 + mulx rax,r11,[q +8] + adcx r11,r8 + adox r11,r12 + mulx r8,r12,[q +16] + adcx r12,rax + adox r12,r13 + mulx rax,r13,[q +24] + adcx r13,r8 + adox r13,r14 + mov r14,r10 + adcx r14,rax + adox r14,r15 + + mov r15,r10 +; SecondLoop + mov rdx,r9 + mulx rax,rdx,r11 + mulx r8,rax,[q] + adcx rax,r11 + mulx rax,r11,[q +8] + adcx r11,r8 + adox r11,r12 + mulx r8,r12,[q +16] + adcx r12,rax + adox r12,r13 + mulx rax,r13,[q +24] + adcx r13,r8 + adox r13,r14 + mov r14,r10 + adcx r14,rax + adox r14,r15 + + mov r15,r10 +; SecondLoop + mov rdx,r9 + mulx rax,rdx,r11 + mulx r8,rax,[q] + adcx rax,r11 + mulx rax,r11,[q +8] + adcx r11,r8 + adox r11,r12 + mulx r8,r12,[q +16] + adcx r12,rax + adox r12,r13 + mulx rax,r13,[q +24] + adcx r13,r8 + adox r13,r14 + mov r14,r10 + adcx r14,rax + adox r14,r15 + +;comparison + cmp r14,[q + 24] + jc Fr_rawMMul1_done + jnz Fr_rawMMul1_sq + cmp r13,[q + 16] + jc Fr_rawMMul1_done + jnz Fr_rawMMul1_sq + cmp r12,[q + 8] + jc Fr_rawMMul1_done + jnz Fr_rawMMul1_sq + cmp r11,[q + 0] + jc Fr_rawMMul1_done + jnz Fr_rawMMul1_sq +Fr_rawMMul1_sq: + sub r11,[q +0] + sbb r12,[q +8] + sbb r13,[q +16] + sbb r14,[q +24] +Fr_rawMMul1_done: + mov [rdi + 0],r11 + mov [rdi + 8],r12 + mov [rdi + 16],r13 + mov [rdi + 24],r14 + pop r12 + pop r13 + pop r14 + pop r15 + ret +Fr_rawFromMontgomery: + push r15 + push r14 + push r13 + push r12 + mov rcx,rdx + mov r9,[ np ] + xor r10,r10 + +; FirstLoop + mov r11,[rsi +0] + mov r12,[rsi +8] + mov r13,[rsi +16] + mov r14,[rsi +24] + mov r15,r10 +; SecondLoop + mov rdx,r9 + mulx rax,rdx,r11 + mulx r8,rax,[q] + adcx rax,r11 + mulx rax,r11,[q +8] + adcx r11,r8 + adox r11,r12 + mulx r8,r12,[q +16] + adcx r12,rax + adox r12,r13 + mulx rax,r13,[q +24] + adcx r13,r8 + adox r13,r14 + mov r14,r10 + adcx r14,rax + adox r14,r15 + + mov r15,r10 +; SecondLoop + mov rdx,r9 + mulx rax,rdx,r11 + mulx r8,rax,[q] + adcx rax,r11 + mulx rax,r11,[q +8] + adcx r11,r8 + adox r11,r12 + mulx r8,r12,[q +16] + adcx r12,rax + adox r12,r13 + mulx rax,r13,[q +24] + adcx r13,r8 + adox r13,r14 + mov r14,r10 + adcx r14,rax + adox r14,r15 + + mov r15,r10 +; SecondLoop + mov rdx,r9 + mulx rax,rdx,r11 + mulx r8,rax,[q] + adcx rax,r11 + mulx rax,r11,[q +8] + adcx r11,r8 + adox r11,r12 + mulx r8,r12,[q +16] + adcx r12,rax + adox r12,r13 + mulx rax,r13,[q +24] + adcx r13,r8 + adox r13,r14 + mov r14,r10 + adcx r14,rax + adox r14,r15 + + mov r15,r10 +; SecondLoop + mov rdx,r9 + mulx rax,rdx,r11 + mulx r8,rax,[q] + adcx rax,r11 + mulx rax,r11,[q +8] + adcx r11,r8 + adox r11,r12 + mulx r8,r12,[q +16] + adcx r12,rax + adox r12,r13 + mulx rax,r13,[q +24] + adcx r13,r8 + adox r13,r14 + mov r14,r10 + adcx r14,rax + adox r14,r15 + +;comparison + cmp r14,[q + 24] + jc Fr_rawFromMontgomery_done + jnz Fr_rawFromMontgomery_sq + cmp r13,[q + 16] + jc Fr_rawFromMontgomery_done + jnz Fr_rawFromMontgomery_sq + cmp r12,[q + 8] + jc Fr_rawFromMontgomery_done + jnz Fr_rawFromMontgomery_sq + cmp r11,[q + 0] + jc Fr_rawFromMontgomery_done + jnz Fr_rawFromMontgomery_sq +Fr_rawFromMontgomery_sq: + sub r11,[q +0] + sbb r12,[q +8] + sbb r13,[q +16] + sbb r14,[q +24] +Fr_rawFromMontgomery_done: + mov [rdi + 0],r11 + mov [rdi + 8],r12 + mov [rdi + 16],r13 + mov [rdi + 24],r14 + pop r12 + pop r13 + pop r14 + pop r15 + ret + +;;;;;;;;;;;;;;;;;;;;;; +; rawToMontgomery +;;;;;;;;;;;;;;;;;;;;;; +; Convert a number to Montgomery +; rdi <= Pointer destination element +; rsi <= Pointer to src element +;;;;;;;;;;;;;;;;;;;; +Fr_rawToMontgomery: + push rdx + lea rdx, [R2] + call Fr_rawMMul + pop rdx + ret + +;;;;;;;;;;;;;;;;;;;;;; +; toMontgomery +;;;;;;;;;;;;;;;;;;;;;; +; Convert a number to Montgomery +; rdi <= Destination +; rdi <= Pointer element to convert +; Modified registers: +; r8, r9, 10, r11, rax, rcx +;;;;;;;;;;;;;;;;;;;; +Fr_toMontgomery: + mov rax, [rsi] + bt rax, 62 ; check if montgomery + jc toMontgomery_doNothing + bt rax, 63 + jc toMontgomeryLong + +toMontgomeryShort: + movsx rdx, eax + mov [rdi], rdx + add rdi, 8 + lea rsi, [R2] + cmp rdx, 0 + js negMontgomeryShort +posMontgomeryShort: + call Fr_rawMMul1 + sub rdi, 8 + mov r11b, 0x40 + shl r11d, 24 + mov [rdi+4], r11d + ret + +negMontgomeryShort: + neg rdx ; Do the multiplication positive and then negate the result. + call Fr_rawMMul1 + mov rsi, rdi + call rawNegL + sub rdi, 8 + mov r11b, 0x40 + shl r11d, 24 + mov [rdi+4], r11d + ret + + +toMontgomeryLong: + mov [rdi], rax + add rdi, 8 + add rsi, 8 + lea rdx, [R2] + call Fr_rawMMul + sub rsi, 8 + sub rdi, 8 + mov r11b, 0xC0 + shl r11d, 24 + mov [rdi+4], r11d + ret + + +toMontgomery_doNothing: + call Fr_copy + ret + +;;;;;;;;;;;;;;;;;;;;;; +; toNormal +;;;;;;;;;;;;;;;;;;;;;; +; Convert a number from Montgomery +; rdi <= Destination +; rsi <= Pointer element to convert +; Modified registers: +; r8, r9, 10, r11, rax, rcx +;;;;;;;;;;;;;;;;;;;; +Fr_toNormal: + mov rax, [rsi] + bt rax, 62 ; check if montgomery + jnc toNormal_doNothing + bt rax, 63 ; if short, it means it's converted + jnc toNormal_doNothing + +toNormalLong: + add rdi, 8 + add rsi, 8 + call Fr_rawFromMontgomery + sub rsi, 8 + sub rdi, 8 + mov r11b, 0x80 + shl r11d, 24 + mov [rdi+4], r11d + ret + +toNormal_doNothing: + call Fr_copy + ret + +;;;;;;;;;;;;;;;;;;;;;; +; toLongNormal +;;;;;;;;;;;;;;;;;;;;;; +; Convert a number to long normal +; rdi <= Destination +; rsi <= Pointer element to convert +; Modified registers: +; r8, r9, 10, r11, rax, rcx +;;;;;;;;;;;;;;;;;;;; +Fr_toLongNormal: + mov rax, [rsi] + bt rax, 63 ; check if long + jnc toLongNormal_fromShort + bt rax, 62 ; check if montgomery + jc toLongNormal_fromMontgomery + call Fr_copy ; It is already long + ret + +toLongNormal_fromMontgomery: + add rdi, 8 + add rsi, 8 + call Fr_rawFromMontgomery + sub rsi, 8 + sub rdi, 8 + mov r11b, 0x80 + shl r11d, 24 + mov [rdi+4], r11d + ret + +toLongNormal_fromShort: + mov r8, rsi ; save rsi + movsx rsi, eax + call rawCopyS2L + mov rsi, r8 ; recover rsi + mov r11b, 0x80 + shl r11d, 24 + mov [rdi+4], r11d + ret + + + + + + + + + + + + +;;;;;;;;;;;;;;;;;;;;;; +; add +;;;;;;;;;;;;;;;;;;;;;; +; Adds two elements of any kind +; Params: +; rsi <= Pointer to element 1 +; rdx <= Pointer to element 2 +; rdi <= Pointer to result +; Modified Registers: +; r8, r9, 10, r11, rax, rcx +;;;;;;;;;;;;;;;;;;;;;; +Fr_add: + push rbp + push rsi + push rdx + mov rbp, rsp + mov rax, [rsi] + mov rcx, [rdx] + bt rax, 63 ; Check if is short first operand + jc add_l1 + bt rcx, 63 ; Check if is short second operand + jc add_s1l2 + +add_s1s2: ; Both operands are short + + xor rdx, rdx + mov edx, eax + add edx, ecx + jo add_manageOverflow ; rsi already is the 64bits result + + mov [rdi], rdx ; not necessary to adjust so just save and return + mov rsp, rbp + pop rdx + pop rsi + pop rbp + ret + +add_manageOverflow: ; Do the operation in 64 bits + push rsi + movsx rsi, eax + movsx rdx, ecx + add rsi, rdx + call rawCopyS2L + pop rsi + mov rsp, rbp + pop rdx + pop rsi + pop rbp + ret + +add_l1: + bt rcx, 63 ; Check if is short second operand + jc add_l1l2 + +;;;;;;;; +add_l1s2: + bt rax, 62 ; check if montgomery first + jc add_l1ms2 +add_l1ns2: + mov r11b, 0x80 + shl r11d, 24 + mov [rdi+4], r11d + + add rsi, 8 + movsx rdx, ecx + add rdi, 8 + cmp rdx, 0 + + jns tmp_1 + neg rdx + call rawSubLS + sub rdi, 8 + sub rsi, 8 + mov rsp, rbp + pop rdx + pop rsi + pop rbp + ret +tmp_1: + call rawAddLS + sub rdi, 8 + sub rsi, 8 + mov rsp, rbp + pop rdx + pop rsi + pop rbp + ret + + + +add_l1ms2: + bt rcx, 62 ; check if montgomery second + jc add_l1ms2m +add_l1ms2n: + mov r11b, 0xC0 + shl r11d, 24 + mov [rdi+4], r11d + + mov r8, rdi + sub rsp, 40 + mov rdi, rsp + push rsi + mov rsi, rdx + push r8 + call Fr_toMontgomery + mov rdx, rdi + pop rdi + pop rsi + + + add rdi, 8 + add rsi, 8 + add rdx, 8 + call rawAddLL + sub rdi, 8 + sub rsi, 8 + mov rsp, rbp + pop rdx + pop rsi + pop rbp + ret + + +add_l1ms2m: + mov r11b, 0xC0 + shl r11d, 24 + mov [rdi+4], r11d + + add rdi, 8 + add rsi, 8 + add rdx, 8 + call rawAddLL + sub rdi, 8 + sub rsi, 8 + mov rsp, rbp + pop rdx + pop rsi + pop rbp + ret + + + +;;;;;;;; +add_s1l2: + bt rcx, 62 ; check if montgomery second + jc add_s1l2m +add_s1l2n: + mov r11b, 0x80 + shl r11d, 24 + mov [rdi+4], r11d + + lea rsi, [rdx + 8] + movsx rdx, eax + add rdi, 8 + cmp rdx, 0 + + jns tmp_2 + neg rdx + call rawSubLS + sub rdi, 8 + sub rsi, 8 + mov rsp, rbp + pop rdx + pop rsi + pop rbp + ret +tmp_2: + call rawAddLS + sub rdi, 8 + sub rsi, 8 + mov rsp, rbp + pop rdx + pop rsi + pop rbp + ret + + +add_s1l2m: + bt rax, 62 ; check if montgomery first + jc add_s1ml2m +add_s1nl2m: + mov r11b, 0xC0 + shl r11d, 24 + mov [rdi+4], r11d + + mov r8, rdi + sub rsp, 40 + mov rdi, rsp + push rdx + push r8 + call Fr_toMontgomery + mov rsi, rdi + pop rdi + pop rdx + + + add rdi, 8 + add rsi, 8 + add rdx, 8 + call rawAddLL + sub rdi, 8 + sub rsi, 8 + mov rsp, rbp + pop rdx + pop rsi + pop rbp + ret + + +add_s1ml2m: + mov r11b, 0xC0 + shl r11d, 24 + mov [rdi+4], r11d + + add rdi, 8 + add rsi, 8 + add rdx, 8 + call rawAddLL + sub rdi, 8 + sub rsi, 8 + mov rsp, rbp + pop rdx + pop rsi + pop rbp + ret + + +;;;; +add_l1l2: + bt rax, 62 ; check if montgomery first + jc add_l1ml2 +add_l1nl2: + bt rcx, 62 ; check if montgomery second + jc add_l1nl2m +add_l1nl2n: + mov r11b, 0x80 + shl r11d, 24 + mov [rdi+4], r11d + + add rdi, 8 + add rsi, 8 + add rdx, 8 + call rawAddLL + sub rdi, 8 + sub rsi, 8 + mov rsp, rbp + pop rdx + pop rsi + pop rbp + ret + + +add_l1nl2m: + mov r11b, 0xC0 + shl r11d, 24 + mov [rdi+4], r11d + + mov r8, rdi + sub rsp, 40 + mov rdi, rsp + push rdx + push r8 + call Fr_toMontgomery + mov rsi, rdi + pop rdi + pop rdx + + + add rdi, 8 + add rsi, 8 + add rdx, 8 + call rawAddLL + sub rdi, 8 + sub rsi, 8 + mov rsp, rbp + pop rdx + pop rsi + pop rbp + ret + + +add_l1ml2: + bt rcx, 62 ; check if montgomery seconf + jc add_l1ml2m +add_l1ml2n: + mov r11b, 0xC0 + shl r11d, 24 + mov [rdi+4], r11d + + mov r8, rdi + sub rsp, 40 + mov rdi, rsp + push rsi + mov rsi, rdx + push r8 + call Fr_toMontgomery + mov rdx, rdi + pop rdi + pop rsi + + + add rdi, 8 + add rsi, 8 + add rdx, 8 + call rawAddLL + sub rdi, 8 + sub rsi, 8 + mov rsp, rbp + pop rdx + pop rsi + pop rbp + ret + + +add_l1ml2m: + mov r11b, 0xC0 + shl r11d, 24 + mov [rdi+4], r11d + + add rdi, 8 + add rsi, 8 + add rdx, 8 + call rawAddLL + sub rdi, 8 + sub rsi, 8 + mov rsp, rbp + pop rdx + pop rsi + pop rbp + ret + + + + +;;;;;;;;;;;;;;;;;;;;;; +; rawAddLL +;;;;;;;;;;;;;;;;;;;;;; +; Adds two elements of type long +; Params: +; rsi <= Pointer to the long data of element 1 +; rdx <= Pointer to the long data of element 2 +; rdi <= Pointer to the long data of result +; Modified Registers: +; rax +;;;;;;;;;;;;;;;;;;;;;; +rawAddLL: +Fr_rawAdd: + ; Add component by component with carry + + mov rax, [rsi + 0] + add rax, [rdx + 0] + mov [rdi + 0], rax + + mov rax, [rsi + 8] + adc rax, [rdx + 8] + mov [rdi + 8], rax + + mov rax, [rsi + 16] + adc rax, [rdx + 16] + mov [rdi + 16], rax + + mov rax, [rsi + 24] + adc rax, [rdx + 24] + mov [rdi + 24], rax + + jc rawAddLL_sq ; if overflow, substract q + + ; Compare with q + + + cmp rax, [q + 24] + jc rawAddLL_done ; q is bigget so done. + jnz rawAddLL_sq ; q is lower + + + mov rax, [rdi + 16] + + cmp rax, [q + 16] + jc rawAddLL_done ; q is bigget so done. + jnz rawAddLL_sq ; q is lower + + + mov rax, [rdi + 8] + + cmp rax, [q + 8] + jc rawAddLL_done ; q is bigget so done. + jnz rawAddLL_sq ; q is lower + + + mov rax, [rdi + 0] + + cmp rax, [q + 0] + jc rawAddLL_done ; q is bigget so done. + jnz rawAddLL_sq ; q is lower + + ; If equal substract q +rawAddLL_sq: + + mov rax, [q + 0] + sub [rdi + 0], rax + + mov rax, [q + 8] + sbb [rdi + 8], rax + + mov rax, [q + 16] + sbb [rdi + 16], rax + + mov rax, [q + 24] + sbb [rdi + 24], rax + +rawAddLL_done: + ret + + +;;;;;;;;;;;;;;;;;;;;;; +; rawAddLS +;;;;;;;;;;;;;;;;;;;;;; +; Adds two elements of type long +; Params: +; rdi <= Pointer to the long data of result +; rsi <= Pointer to the long data of element 1 +; rdx <= Value to be added +;;;;;;;;;;;;;;;;;;;;;; +rawAddLS: + ; Add component by component with carry + + add rdx, [rsi] + mov [rdi] ,rdx + + mov rdx, 0 + adc rdx, [rsi + 8] + mov [rdi + 8], rdx + + mov rdx, 0 + adc rdx, [rsi + 16] + mov [rdi + 16], rdx + + mov rdx, 0 + adc rdx, [rsi + 24] + mov [rdi + 24], rdx + + jc rawAddLS_sq ; if overflow, substract q + + ; Compare with q + + mov rax, [rdi + 24] + cmp rax, [q + 24] + jc rawAddLS_done ; q is bigget so done. + jnz rawAddLS_sq ; q is lower + + mov rax, [rdi + 16] + cmp rax, [q + 16] + jc rawAddLS_done ; q is bigget so done. + jnz rawAddLS_sq ; q is lower + + mov rax, [rdi + 8] + cmp rax, [q + 8] + jc rawAddLS_done ; q is bigget so done. + jnz rawAddLS_sq ; q is lower + + mov rax, [rdi + 0] + cmp rax, [q + 0] + jc rawAddLS_done ; q is bigget so done. + jnz rawAddLS_sq ; q is lower + + ; If equal substract q +rawAddLS_sq: + + mov rax, [q + 0] + sub [rdi + 0], rax + + mov rax, [q + 8] + sbb [rdi + 8], rax + + mov rax, [q + 16] + sbb [rdi + 16], rax + + mov rax, [q + 24] + sbb [rdi + 24], rax + +rawAddLS_done: + ret + + + + + + + + + + + + + + + +;;;;;;;;;;;;;;;;;;;;;; +; sub +;;;;;;;;;;;;;;;;;;;;;; +; Substracts two elements of any kind +; Params: +; rsi <= Pointer to element 1 +; rdx <= Pointer to element 2 +; rdi <= Pointer to result +; Modified Registers: +; r8, r9, 10, r11, rax, rcx +;;;;;;;;;;;;;;;;;;;;;; +Fr_sub: + push rbp + push rsi + push rdx + mov rbp, rsp + mov rax, [rsi] + mov rcx, [rdx] + bt rax, 63 ; Check if is long first operand + jc sub_l1 + bt rcx, 63 ; Check if is long second operand + jc sub_s1l2 + +sub_s1s2: ; Both operands are short + + xor rdx, rdx + mov edx, eax + sub edx, ecx + jo sub_manageOverflow ; rsi already is the 64bits result + + mov [rdi], rdx ; not necessary to adjust so just save and return + mov rsp, rbp + pop rdx + pop rsi + pop rbp + ret + +sub_manageOverflow: ; Do the operation in 64 bits + push rsi + movsx rsi, eax + movsx rdx, ecx + sub rsi, rdx + call rawCopyS2L + pop rsi + mov rsp, rbp + pop rdx + pop rsi + pop rbp + ret + +sub_l1: + bt rcx, 63 ; Check if is short second operand + jc sub_l1l2 + +;;;;;;;; +sub_l1s2: + bt rax, 62 ; check if montgomery first + jc sub_l1ms2 +sub_l1ns2: + mov r11b, 0x80 + shl r11d, 24 + mov [rdi+4], r11d + + add rsi, 8 + movsx rdx, ecx + add rdi, 8 + cmp rdx, 0 + + jns tmp_3 + neg rdx + call rawAddLS + sub rdi, 8 + sub rsi, 8 + mov rsp, rbp + pop rdx + pop rsi + pop rbp + ret +tmp_3: + call rawSubLS + sub rdi, 8 + sub rsi, 8 + mov rsp, rbp + pop rdx + pop rsi + pop rbp + ret + + +sub_l1ms2: + bt rcx, 62 ; check if montgomery second + jc sub_l1ms2m +sub_l1ms2n: + mov r11b, 0xC0 + shl r11d, 24 + mov [rdi+4], r11d + + mov r8, rdi + sub rsp, 40 + mov rdi, rsp + push rsi + mov rsi, rdx + push r8 + call Fr_toMontgomery + mov rdx, rdi + pop rdi + pop rsi + + + add rdi, 8 + add rsi, 8 + add rdx, 8 + call rawSubLL + sub rdi, 8 + sub rsi, 8 + mov rsp, rbp + pop rdx + pop rsi + pop rbp + ret + + +sub_l1ms2m: + mov r11b, 0xC0 + shl r11d, 24 + mov [rdi+4], r11d + + add rdi, 8 + add rsi, 8 + add rdx, 8 + call rawSubLL + sub rdi, 8 + sub rsi, 8 + mov rsp, rbp + pop rdx + pop rsi + pop rbp + ret + + + +;;;;;;;; +sub_s1l2: + bt rcx, 62 ; check if montgomery first + jc sub_s1l2m +sub_s1l2n: + mov r11b, 0x80 + shl r11d, 24 + mov [rdi+4], r11d + + cmp eax, 0 + + js tmp_4 + + ; First Operand is positive + push rsi + add rdi, 8 + movsx rsi, eax + add rdx, 8 + call rawSubSL + sub rdi, 8 + pop rsi + mov rsp, rbp + pop rdx + pop rsi + pop rbp + ret + +tmp_4: ; First operand is negative + push rsi + lea rsi, [rdx + 8] + movsx rdx, eax + add rdi, 8 + neg rdx + call rawNegLS + sub rdi, 8 + pop rsi + mov rsp, rbp + pop rdx + pop rsi + pop rbp + ret + + +sub_s1l2m: + bt rax, 62 ; check if montgomery second + jc sub_s1ml2m +sub_s1nl2m: + mov r11b, 0xC0 + shl r11d, 24 + mov [rdi+4], r11d + + mov r8, rdi + sub rsp, 40 + mov rdi, rsp + push rdx + push r8 + call Fr_toMontgomery + mov rsi, rdi + pop rdi + pop rdx + + + add rdi, 8 + add rsi, 8 + add rdx, 8 + call rawSubLL + sub rdi, 8 + sub rsi, 8 + mov rsp, rbp + pop rdx + pop rsi + pop rbp + ret + + +sub_s1ml2m: + mov r11b, 0xC0 + shl r11d, 24 + mov [rdi+4], r11d + + add rdi, 8 + add rsi, 8 + add rdx, 8 + call rawSubLL + sub rdi, 8 + sub rsi, 8 + mov rsp, rbp + pop rdx + pop rsi + pop rbp + ret + + +;;;; +sub_l1l2: + bt rax, 62 ; check if montgomery first + jc sub_l1ml2 +sub_l1nl2: + bt rcx, 62 ; check if montgomery second + jc sub_l1nl2m +sub_l1nl2n: + mov r11b, 0x80 + shl r11d, 24 + mov [rdi+4], r11d + + add rdi, 8 + add rsi, 8 + add rdx, 8 + call rawSubLL + sub rdi, 8 + sub rsi, 8 + mov rsp, rbp + pop rdx + pop rsi + pop rbp + ret + + +sub_l1nl2m: + mov r11b, 0xC0 + shl r11d, 24 + mov [rdi+4], r11d + + mov r8, rdi + sub rsp, 40 + mov rdi, rsp + push rdx + push r8 + call Fr_toMontgomery + mov rsi, rdi + pop rdi + pop rdx + + + add rdi, 8 + add rsi, 8 + add rdx, 8 + call rawSubLL + sub rdi, 8 + sub rsi, 8 + mov rsp, rbp + pop rdx + pop rsi + pop rbp + ret + + +sub_l1ml2: + bt rcx, 62 ; check if montgomery seconf + jc sub_l1ml2m +sub_l1ml2n: + mov r11b, 0xC0 + shl r11d, 24 + mov [rdi+4], r11d + + mov r8, rdi + sub rsp, 40 + mov rdi, rsp + push rsi + mov rsi, rdx + push r8 + call Fr_toMontgomery + mov rdx, rdi + pop rdi + pop rsi + + + add rdi, 8 + add rsi, 8 + add rdx, 8 + call rawSubLL + sub rdi, 8 + sub rsi, 8 + mov rsp, rbp + pop rdx + pop rsi + pop rbp + ret + + +sub_l1ml2m: + mov r11b, 0xC0 + shl r11d, 24 + mov [rdi+4], r11d + + add rdi, 8 + add rsi, 8 + add rdx, 8 + call rawSubLL + sub rdi, 8 + sub rsi, 8 + mov rsp, rbp + pop rdx + pop rsi + pop rbp + ret + + + +;;;;;;;;;;;;;;;;;;;;;; +; rawSubLS +;;;;;;;;;;;;;;;;;;;;;; +; Substracts a short element from the long element +; Params: +; rdi <= Pointer to the long data of result +; rsi <= Pointer to the long data of element 1 where will be substracted +; rdx <= Value to be substracted +; [rdi] = [rsi] - rdx +; Modified Registers: +; rax +;;;;;;;;;;;;;;;;;;;;;; +rawSubLS: + ; Substract first digit + + mov rax, [rsi] + sub rax, rdx + mov [rdi] ,rax + mov rdx, 0 + + mov rax, [rsi + 8] + sbb rax, rdx + mov [rdi + 8], rax + + mov rax, [rsi + 16] + sbb rax, rdx + mov [rdi + 16], rax + + mov rax, [rsi + 24] + sbb rax, rdx + mov [rdi + 24], rax + + jnc rawSubLS_done ; if overflow, add q + + ; Add q +rawSubLS_aq: + + mov rax, [q + 0] + add [rdi + 0], rax + + mov rax, [q + 8] + adc [rdi + 8], rax + + mov rax, [q + 16] + adc [rdi + 16], rax + + mov rax, [q + 24] + adc [rdi + 24], rax + +rawSubLS_done: + ret + + +;;;;;;;;;;;;;;;;;;;;;; +; rawSubSL +;;;;;;;;;;;;;;;;;;;;;; +; Substracts a long element from a short element +; Params: +; rdi <= Pointer to the long data of result +; rsi <= Value from where will bo substracted +; rdx <= Pointer to long of the value to be substracted +; +; [rdi] = rsi - [rdx] +; Modified Registers: +; rax +;;;;;;;;;;;;;;;;;;;;;; +rawSubSL: + ; Substract first digit + sub rsi, [rdx] + mov [rdi] ,rsi + + + mov rax, 0 + sbb rax, [rdx + 8] + mov [rdi + 8], rax + + mov rax, 0 + sbb rax, [rdx + 16] + mov [rdi + 16], rax + + mov rax, 0 + sbb rax, [rdx + 24] + mov [rdi + 24], rax + + jnc rawSubSL_done ; if overflow, add q + + ; Add q +rawSubSL_aq: + + mov rax, [q + 0] + add [rdi + 0], rax + + mov rax, [q + 8] + adc [rdi + 8], rax + + mov rax, [q + 16] + adc [rdi + 16], rax + + mov rax, [q + 24] + adc [rdi + 24], rax + +rawSubSL_done: + ret + +;;;;;;;;;;;;;;;;;;;;;; +; rawSubLL +;;;;;;;;;;;;;;;;;;;;;; +; Substracts a long element from a short element +; Params: +; rdi <= Pointer to the long data of result +; rsi <= Pointer to long from where substracted +; rdx <= Pointer to long of the value to be substracted +; +; [rdi] = [rsi] - [rdx] +; Modified Registers: +; rax +;;;;;;;;;;;;;;;;;;;;;; +rawSubLL: +Fr_rawSub: + ; Substract first digit + + mov rax, [rsi + 0] + sub rax, [rdx + 0] + mov [rdi + 0], rax + + mov rax, [rsi + 8] + sbb rax, [rdx + 8] + mov [rdi + 8], rax + + mov rax, [rsi + 16] + sbb rax, [rdx + 16] + mov [rdi + 16], rax + + mov rax, [rsi + 24] + sbb rax, [rdx + 24] + mov [rdi + 24], rax + + jnc rawSubLL_done ; if overflow, add q + + ; Add q +rawSubLL_aq: + + mov rax, [q + 0] + add [rdi + 0], rax + + mov rax, [q + 8] + adc [rdi + 8], rax + + mov rax, [q + 16] + adc [rdi + 16], rax + + mov rax, [q + 24] + adc [rdi + 24], rax + +rawSubLL_done: + ret + +;;;;;;;;;;;;;;;;;;;;;; +; rawNegLS +;;;;;;;;;;;;;;;;;;;;;; +; Substracts a long element and a short element form 0 +; Params: +; rdi <= Pointer to the long data of result +; rsi <= Pointer to long from where substracted +; rdx <= short value to be substracted too +; +; [rdi] = -[rsi] - rdx +; Modified Registers: +; rax +;;;;;;;;;;;;;;;;;;;;;; +rawNegLS: + mov rax, [q] + sub rax, rdx + mov [rdi], rax + + mov rax, [q + 8 ] + sbb rax, 0 + mov [rdi + 8], rax + + mov rax, [q + 16 ] + sbb rax, 0 + mov [rdi + 16], rax + + mov rax, [q + 24 ] + sbb rax, 0 + mov [rdi + 24], rax + + setc dl + + + mov rax, [rdi + 0 ] + sub rax, [rsi + 0] + mov [rdi + 0], rax + + mov rax, [rdi + 8 ] + sbb rax, [rsi + 8] + mov [rdi + 8], rax + + mov rax, [rdi + 16 ] + sbb rax, [rsi + 16] + mov [rdi + 16], rax + + mov rax, [rdi + 24 ] + sbb rax, [rsi + 24] + mov [rdi + 24], rax + + + setc dh + or dl, dh + jz rawNegSL_done + + ; it is a negative value, so add q + + mov rax, [q + 0] + add [rdi + 0], rax + + mov rax, [q + 8] + adc [rdi + 8], rax + + mov rax, [q + 16] + adc [rdi + 16], rax + + mov rax, [q + 24] + adc [rdi + 24], rax + + +rawNegSL_done: + ret + + + + + + + +;;;;;;;;;;;;;;;;;;;;;; +; neg +;;;;;;;;;;;;;;;;;;;;;; +; Adds two elements of any kind +; Params: +; rsi <= Pointer to element to be negated +; rdi <= Pointer to result +; [rdi] = -[rsi] +;;;;;;;;;;;;;;;;;;;;;; +Fr_neg: + mov rax, [rsi] + bt rax, 63 ; Check if is short first operand + jc neg_l + +neg_s: ; Operand is short + + neg eax + jo neg_manageOverflow ; Check if overflow. (0x80000000 is the only case) + + mov [rdi], rax ; not necessary to adjust so just save and return + ret + +neg_manageOverflow: ; Do the operation in 64 bits + push rsi + movsx rsi, eax + neg rsi + call rawCopyS2L + pop rsi + ret + + + +neg_l: + mov [rdi], rax ; Copy the type + + add rdi, 8 + add rsi, 8 + call rawNegL + sub rdi, 8 + sub rsi, 8 + ret + + + +;;;;;;;;;;;;;;;;;;;;;; +; rawNeg +;;;;;;;;;;;;;;;;;;;;;; +; Negates a value +; Params: +; rdi <= Pointer to the long data of result +; rsi <= Pointer to the long data of element 1 +; +; [rdi] = - [rsi] +;;;;;;;;;;;;;;;;;;;;;; +rawNegL: +Fr_rawNeg: + ; Compare is zero + + xor rax, rax + + cmp [rsi + 0], rax + jnz doNegate + + cmp [rsi + 8], rax + jnz doNegate + + cmp [rsi + 16], rax + jnz doNegate + + cmp [rsi + 24], rax + jnz doNegate + + ; it's zero so just set to zero + + mov [rdi + 0], rax + + mov [rdi + 8], rax + + mov [rdi + 16], rax + + mov [rdi + 24], rax + + ret +doNegate: + + mov rax, [q + 0] + sub rax, [rsi + 0] + mov [rdi + 0], rax + + mov rax, [q + 8] + sbb rax, [rsi + 8] + mov [rdi + 8], rax + + mov rax, [q + 16] + sbb rax, [rsi + 16] + mov [rdi + 16], rax + + mov rax, [q + 24] + sbb rax, [rsi + 24] + mov [rdi + 24], rax + + ret + + + + + + + + + + + + + + + + + + + +;;;;;;;;;;;;;;;;;;;;;; +; square +;;;;;;;;;;;;;;;;;;;;;; +; Squares a field element +; Params: +; rsi <= Pointer to element 1 +; rdi <= Pointer to result +; [rdi] = [rsi] * [rsi] +; Modified Registers: +; r8, r9, 10, r11, rax, rcx +;;;;;;;;;;;;;;;;;;;;;; +Fr_square: + mov r8, [rsi] + bt r8, 63 ; Check if is short first operand + jc square_l1 + +square_s1: ; Both operands are short + + xor rax, rax + mov eax, r8d + imul eax + jo square_manageOverflow ; rsi already is the 64bits result + + mov [rdi], rax ; not necessary to adjust so just save and return + +square_manageOverflow: ; Do the operation in 64 bits + push rsi + movsx rax, r8d + imul rax + mov rsi, rax + call rawCopyS2L + pop rsi + + ret + +square_l1: + bt r8, 62 ; check if montgomery first + jc square_l1m +square_l1n: + mov r11b, 0xC0 + shl r11d, 24 + mov [rdi+4], r11d + + add rdi, 8 + add rsi, 8 + call Fr_rawMSquare + sub rdi, 8 + sub rsi, 8 + + + push rsi + add rdi, 8 + mov rsi, rdi + lea rdx, [R3] + call Fr_rawMMul + sub rdi, 8 + pop rsi + + ret + +square_l1m: + mov r11b, 0xC0 + shl r11d, 24 + mov [rdi+4], r11d + + add rdi, 8 + add rsi, 8 + call Fr_rawMSquare + sub rdi, 8 + sub rsi, 8 + + ret + + + +;;;;;;;;;;;;;;;;;;;;;; +; mul +;;;;;;;;;;;;;;;;;;;;;; +; Multiplies two elements of any kind +; Params: +; rsi <= Pointer to element 1 +; rdx <= Pointer to element 2 +; rdi <= Pointer to result +; [rdi] = [rsi] * [rdi] +; Modified Registers: +; r8, r9, 10, r11, rax, rcx +;;;;;;;;;;;;;;;;;;;;;; +Fr_mul: + mov r8, [rsi] + mov r9, [rdx] + bt r8, 63 ; Check if is short first operand + jc mul_l1 + bt r9, 63 ; Check if is short second operand + jc mul_s1l2 + +mul_s1s2: ; Both operands are short + + xor rax, rax + mov eax, r8d + imul r9d + jo mul_manageOverflow ; rsi already is the 64bits result + + mov [rdi], rax ; not necessary to adjust so just save and return + +mul_manageOverflow: ; Do the operation in 64 bits + push rsi + movsx rax, r8d + movsx rcx, r9d + imul rcx + mov rsi, rax + call rawCopyS2L + pop rsi + + ret + +mul_l1: + bt r9, 63 ; Check if is short second operand + jc mul_l1l2 + +;;;;;;;; +mul_l1s2: + bt r8, 62 ; check if montgomery first + jc mul_l1ms2 +mul_l1ns2: + bt r9, 62 ; check if montgomery first + jc mul_l1ns2m +mul_l1ns2n: + mov r11b, 0xC0 + shl r11d, 24 + mov [rdi+4], r11d + + push rsi + add rsi, 8 + movsx rdx, r9d + add rdi, 8 + cmp rdx, 0 + + jns tmp_5 + neg rdx + call Fr_rawMMul1 + mov rsi, rdi + call rawNegL + sub rdi, 8 + pop rsi + + jmp tmp_6 +tmp_5: + call Fr_rawMMul1 + sub rdi, 8 + pop rsi +tmp_6: + + + + push rsi + add rdi, 8 + mov rsi, rdi + lea rdx, [R3] + call Fr_rawMMul + sub rdi, 8 + pop rsi + + ret + + +mul_l1ns2m: + mov r11b, 0x80 + shl r11d, 24 + mov [rdi+4], r11d + + add rdi, 8 + add rsi, 8 + add rdx, 8 + call Fr_rawMMul + sub rdi, 8 + sub rsi, 8 + + ret + + +mul_l1ms2: + bt r9, 62 ; check if montgomery second + jc mul_l1ms2m +mul_l1ms2n: + mov r11b, 0x80 + shl r11d, 24 + mov [rdi+4], r11d + + push rsi + add rsi, 8 + movsx rdx, r9d + add rdi, 8 + cmp rdx, 0 + + jns tmp_7 + neg rdx + call Fr_rawMMul1 + mov rsi, rdi + call rawNegL + sub rdi, 8 + pop rsi + + jmp tmp_8 +tmp_7: + call Fr_rawMMul1 + sub rdi, 8 + pop rsi +tmp_8: + + + ret + +mul_l1ms2m: + mov r11b, 0xC0 + shl r11d, 24 + mov [rdi+4], r11d + + add rdi, 8 + add rsi, 8 + add rdx, 8 + call Fr_rawMMul + sub rdi, 8 + sub rsi, 8 + + ret + + +;;;;;;;; +mul_s1l2: + bt r8, 62 ; check if montgomery first + jc mul_s1ml2 +mul_s1nl2: + bt r9, 62 ; check if montgomery first + jc mul_s1nl2m +mul_s1nl2n: + mov r11b, 0xC0 + shl r11d, 24 + mov [rdi+4], r11d + + push rsi + lea rsi, [rdx + 8] + movsx rdx, r8d + add rdi, 8 + cmp rdx, 0 + + jns tmp_9 + neg rdx + call Fr_rawMMul1 + mov rsi, rdi + call rawNegL + sub rdi, 8 + pop rsi + + jmp tmp_10 +tmp_9: + call Fr_rawMMul1 + sub rdi, 8 + pop rsi +tmp_10: + + + + push rsi + add rdi, 8 + mov rsi, rdi + lea rdx, [R3] + call Fr_rawMMul + sub rdi, 8 + pop rsi + + ret + +mul_s1nl2m: + mov r11b, 0x80 + shl r11d, 24 + mov [rdi+4], r11d + + push rsi + lea rsi, [rdx + 8] + movsx rdx, r8d + add rdi, 8 + cmp rdx, 0 + + jns tmp_11 + neg rdx + call Fr_rawMMul1 + mov rsi, rdi + call rawNegL + sub rdi, 8 + pop rsi + + jmp tmp_12 +tmp_11: + call Fr_rawMMul1 + sub rdi, 8 + pop rsi +tmp_12: + + + ret + +mul_s1ml2: + bt r9, 62 ; check if montgomery first + jc mul_s1ml2m +mul_s1ml2n: + mov r11b, 0x80 + shl r11d, 24 + mov [rdi+4], r11d + + add rdi, 8 + add rsi, 8 + add rdx, 8 + call Fr_rawMMul + sub rdi, 8 + sub rsi, 8 + + ret + +mul_s1ml2m: + mov r11b, 0xC0 + shl r11d, 24 + mov [rdi+4], r11d + + add rdi, 8 + add rsi, 8 + add rdx, 8 + call Fr_rawMMul + sub rdi, 8 + sub rsi, 8 + + ret + +;;;; +mul_l1l2: + bt r8, 62 ; check if montgomery first + jc mul_l1ml2 +mul_l1nl2: + bt r9, 62 ; check if montgomery second + jc mul_l1nl2m +mul_l1nl2n: + mov r11b, 0xC0 + shl r11d, 24 + mov [rdi+4], r11d + + add rdi, 8 + add rsi, 8 + add rdx, 8 + call Fr_rawMMul + sub rdi, 8 + sub rsi, 8 + + + push rsi + add rdi, 8 + mov rsi, rdi + lea rdx, [R3] + call Fr_rawMMul + sub rdi, 8 + pop rsi + + ret + +mul_l1nl2m: + mov r11b, 0x80 + shl r11d, 24 + mov [rdi+4], r11d + + add rdi, 8 + add rsi, 8 + add rdx, 8 + call Fr_rawMMul + sub rdi, 8 + sub rsi, 8 + + ret + +mul_l1ml2: + bt r9, 62 ; check if montgomery seconf + jc mul_l1ml2m +mul_l1ml2n: + mov r11b, 0x80 + shl r11d, 24 + mov [rdi+4], r11d + + add rdi, 8 + add rsi, 8 + add rdx, 8 + call Fr_rawMMul + sub rdi, 8 + sub rsi, 8 + + ret + +mul_l1ml2m: + mov r11b, 0xC0 + shl r11d, 24 + mov [rdi+4], r11d + + add rdi, 8 + add rsi, 8 + add rdx, 8 + call Fr_rawMMul + sub rdi, 8 + sub rsi, 8 + + ret + + + + + + + + + + + + + + + + + + + +;;;;;;;;;;;;;;;;;;;;;; +; band +;;;;;;;;;;;;;;;;;;;;;; +; Adds two elements of any kind +; Params: +; rsi <= Pointer to element 1 +; rdx <= Pointer to element 2 +; rdi <= Pointer to result +; Modified Registers: +; r8, r9, 10, r11, rax, rcx +;;;;;;;;;;;;;;;;;;;;;; +Fr_band: + push rbp + push rsi + push rdx + mov rbp, rsp + mov rax, [rsi] + mov rcx, [rdx] + bt rax, 63 ; Check if is short first operand + jc and_l1 + bt rcx, 63 ; Check if is short second operand + jc and_s1l2 + +and_s1s2: + + cmp eax, 0 + + js tmp_13 + + cmp ecx, 0 + js tmp_13 + xor rdx, rdx ; both ops are positive so do the op and return + mov edx, eax + and edx, ecx + mov [rdi], rdx ; not necessary to adjust so just save and return + mov rsp, rbp + pop rdx + pop rsi + pop rbp + ret + +tmp_13: + mov r11b, 0x80 + shl r11d, 24 + mov [rdi+4], r11d + + mov r8, rdi + sub rsp, 40 + mov rdi, rsp + push rsi + mov rsi, rdx + push r8 + call Fr_toLongNormal + mov rdx, rdi + pop rdi + pop rsi + + + mov r8, rdi + sub rsp, 40 + mov rdi, rsp + push rdx + push r8 + call Fr_toLongNormal + mov rsi, rdi + pop rdi + pop rdx + + + + mov rax, [rsi + 8] + and rax, [rdx + 8] + + mov [rdi + 8 ], rax + + mov rax, [rsi + 16] + and rax, [rdx + 16] + + mov [rdi + 16 ], rax + + mov rax, [rsi + 24] + and rax, [rdx + 24] + + mov [rdi + 24 ], rax + + mov rax, [rsi + 32] + and rax, [rdx + 32] + + and rax, [lboMask] + + mov [rdi + 32 ], rax + + + + + + ; Compare with q + + mov rax, [rdi + 32] + cmp rax, [q + 24] + jc tmp_15 ; q is bigget so done. + jnz tmp_14 ; q is lower + + mov rax, [rdi + 24] + cmp rax, [q + 16] + jc tmp_15 ; q is bigget so done. + jnz tmp_14 ; q is lower + + mov rax, [rdi + 16] + cmp rax, [q + 8] + jc tmp_15 ; q is bigget so done. + jnz tmp_14 ; q is lower + + mov rax, [rdi + 8] + cmp rax, [q + 0] + jc tmp_15 ; q is bigget so done. + jnz tmp_14 ; q is lower + + ; If equal substract q +tmp_14: + + mov rax, [q + 0] + sub [rdi + 8], rax + + mov rax, [q + 8] + sbb [rdi + 16], rax + + mov rax, [q + 16] + sbb [rdi + 24], rax + + mov rax, [q + 24] + sbb [rdi + 32], rax + +tmp_15: + + mov rsp, rbp + pop rdx + pop rsi + pop rbp + ret + + + + + + +and_l1: + bt rcx, 63 ; Check if is short second operand + jc and_l1l2 + + +and_l1s2: + bt rax, 62 ; check if montgomery first + jc and_l1ms2 +and_l1ns2: + mov r11b, 0x80 + shl r11d, 24 + mov [rdi+4], r11d + + mov rcx, [rdx] + cmp ecx, 0 + + js tmp_16 + movsx rax, ecx + and rax, [rsi +8] + mov [rdi+8], rax + + xor rax, rax + and rax, [rsi + 16]; + + mov [rdi + 16 ], rax; + + xor rax, rax + and rax, [rsi + 24]; + + mov [rdi + 24 ], rax; + + xor rax, rax + and rax, [rsi + 32]; + + and rax, [lboMask] ; + + mov [rdi + 32 ], rax; + + + + + + ; Compare with q + + mov rax, [rdi + 32] + cmp rax, [q + 24] + jc tmp_18 ; q is bigget so done. + jnz tmp_17 ; q is lower + + mov rax, [rdi + 24] + cmp rax, [q + 16] + jc tmp_18 ; q is bigget so done. + jnz tmp_17 ; q is lower + + mov rax, [rdi + 16] + cmp rax, [q + 8] + jc tmp_18 ; q is bigget so done. + jnz tmp_17 ; q is lower + + mov rax, [rdi + 8] + cmp rax, [q + 0] + jc tmp_18 ; q is bigget so done. + jnz tmp_17 ; q is lower + + ; If equal substract q +tmp_17: + + mov rax, [q + 0] + sub [rdi + 8], rax + + mov rax, [q + 8] + sbb [rdi + 16], rax + + mov rax, [q + 16] + sbb [rdi + 24], rax + + mov rax, [q + 24] + sbb [rdi + 32], rax + +tmp_18: + + mov rsp, rbp + pop rdx + pop rsi + pop rbp + ret + +tmp_16: + + mov r8, rdi + sub rsp, 40 + mov rdi, rsp + push rsi + mov rsi, rdx + push r8 + call Fr_toLongNormal + mov rdx, rdi + pop rdi + pop rsi + + mov r11b, 0x80 + shl r11d, 24 + mov [rdi+4], r11d + + + mov rax, [rsi + 8] + and rax, [rdx + 8] + + mov [rdi + 8 ], rax + + mov rax, [rsi + 16] + and rax, [rdx + 16] + + mov [rdi + 16 ], rax + + mov rax, [rsi + 24] + and rax, [rdx + 24] + + mov [rdi + 24 ], rax + + mov rax, [rsi + 32] + and rax, [rdx + 32] + + and rax, [lboMask] + + mov [rdi + 32 ], rax + + + + + + ; Compare with q + + mov rax, [rdi + 32] + cmp rax, [q + 24] + jc tmp_20 ; q is bigget so done. + jnz tmp_19 ; q is lower + + mov rax, [rdi + 24] + cmp rax, [q + 16] + jc tmp_20 ; q is bigget so done. + jnz tmp_19 ; q is lower + + mov rax, [rdi + 16] + cmp rax, [q + 8] + jc tmp_20 ; q is bigget so done. + jnz tmp_19 ; q is lower + + mov rax, [rdi + 8] + cmp rax, [q + 0] + jc tmp_20 ; q is bigget so done. + jnz tmp_19 ; q is lower + + ; If equal substract q +tmp_19: + + mov rax, [q + 0] + sub [rdi + 8], rax + + mov rax, [q + 8] + sbb [rdi + 16], rax + + mov rax, [q + 16] + sbb [rdi + 24], rax + + mov rax, [q + 24] + sbb [rdi + 32], rax + +tmp_20: + + mov rsp, rbp + pop rdx + pop rsi + pop rbp + ret + + + + +and_l1ms2: + mov r11b, 0x80 + shl r11d, 24 + mov [rdi+4], r11d + + mov r8, rdi + sub rsp, 40 + mov rdi, rsp + push rdx + push r8 + call Fr_toNormal + mov rsi, rdi + pop rdi + pop rdx + + + mov rcx, [rdx] + cmp ecx, 0 + + js tmp_21 + movsx rax, ecx + and rax, [rsi +8] + mov [rdi+8], rax + + xor rax, rax + and rax, [rsi + 16]; + + mov [rdi + 16 ], rax; + + xor rax, rax + and rax, [rsi + 24]; + + mov [rdi + 24 ], rax; + + xor rax, rax + and rax, [rsi + 32]; + + and rax, [lboMask] ; + + mov [rdi + 32 ], rax; + + + + + + ; Compare with q + + mov rax, [rdi + 32] + cmp rax, [q + 24] + jc tmp_23 ; q is bigget so done. + jnz tmp_22 ; q is lower + + mov rax, [rdi + 24] + cmp rax, [q + 16] + jc tmp_23 ; q is bigget so done. + jnz tmp_22 ; q is lower + + mov rax, [rdi + 16] + cmp rax, [q + 8] + jc tmp_23 ; q is bigget so done. + jnz tmp_22 ; q is lower + + mov rax, [rdi + 8] + cmp rax, [q + 0] + jc tmp_23 ; q is bigget so done. + jnz tmp_22 ; q is lower + + ; If equal substract q +tmp_22: + + mov rax, [q + 0] + sub [rdi + 8], rax + + mov rax, [q + 8] + sbb [rdi + 16], rax + + mov rax, [q + 16] + sbb [rdi + 24], rax + + mov rax, [q + 24] + sbb [rdi + 32], rax + +tmp_23: + + mov rsp, rbp + pop rdx + pop rsi + pop rbp + ret + +tmp_21: + + mov r8, rdi + sub rsp, 40 + mov rdi, rsp + push rsi + mov rsi, rdx + push r8 + call Fr_toLongNormal + mov rdx, rdi + pop rdi + pop rsi + + mov r11b, 0x80 + shl r11d, 24 + mov [rdi+4], r11d + + + mov rax, [rsi + 8] + and rax, [rdx + 8] + + mov [rdi + 8 ], rax + + mov rax, [rsi + 16] + and rax, [rdx + 16] + + mov [rdi + 16 ], rax + + mov rax, [rsi + 24] + and rax, [rdx + 24] + + mov [rdi + 24 ], rax + + mov rax, [rsi + 32] + and rax, [rdx + 32] + + and rax, [lboMask] + + mov [rdi + 32 ], rax + + + + + + ; Compare with q + + mov rax, [rdi + 32] + cmp rax, [q + 24] + jc tmp_25 ; q is bigget so done. + jnz tmp_24 ; q is lower + + mov rax, [rdi + 24] + cmp rax, [q + 16] + jc tmp_25 ; q is bigget so done. + jnz tmp_24 ; q is lower + + mov rax, [rdi + 16] + cmp rax, [q + 8] + jc tmp_25 ; q is bigget so done. + jnz tmp_24 ; q is lower + + mov rax, [rdi + 8] + cmp rax, [q + 0] + jc tmp_25 ; q is bigget so done. + jnz tmp_24 ; q is lower + + ; If equal substract q +tmp_24: + + mov rax, [q + 0] + sub [rdi + 8], rax + + mov rax, [q + 8] + sbb [rdi + 16], rax + + mov rax, [q + 16] + sbb [rdi + 24], rax + + mov rax, [q + 24] + sbb [rdi + 32], rax + +tmp_25: + + mov rsp, rbp + pop rdx + pop rsi + pop rbp + ret + + + + + +and_s1l2: + bt rcx, 62 ; check if montgomery first + jc and_s1l2m +and_s1l2n: + mov r11b, 0x80 + shl r11d, 24 + mov [rdi+4], r11d + + mov eax, [rsi] + cmp eax, 0 + + js tmp_26 + and rax, [rdx +8] + mov [rdi+8], rax + + xor rax, rax + and rax, [rdx + 16] + + mov [rdi + 16 ], rax + + xor rax, rax + and rax, [rdx + 24] + + mov [rdi + 24 ], rax + + xor rax, rax + and rax, [rdx + 32] + + and rax, [lboMask] + + mov [rdi + 32 ], rax + + + + + + ; Compare with q + + mov rax, [rdi + 32] + cmp rax, [q + 24] + jc tmp_28 ; q is bigget so done. + jnz tmp_27 ; q is lower + + mov rax, [rdi + 24] + cmp rax, [q + 16] + jc tmp_28 ; q is bigget so done. + jnz tmp_27 ; q is lower + + mov rax, [rdi + 16] + cmp rax, [q + 8] + jc tmp_28 ; q is bigget so done. + jnz tmp_27 ; q is lower + + mov rax, [rdi + 8] + cmp rax, [q + 0] + jc tmp_28 ; q is bigget so done. + jnz tmp_27 ; q is lower + + ; If equal substract q +tmp_27: + + mov rax, [q + 0] + sub [rdi + 8], rax + + mov rax, [q + 8] + sbb [rdi + 16], rax + + mov rax, [q + 16] + sbb [rdi + 24], rax + + mov rax, [q + 24] + sbb [rdi + 32], rax + +tmp_28: + + mov rsp, rbp + pop rdx + pop rsi + pop rbp + ret + +tmp_26: + + mov r8, rdi + sub rsp, 40 + mov rdi, rsp + push rdx + push r8 + call Fr_toLongNormal + mov rsi, rdi + pop rdi + pop rdx + + mov r11b, 0x80 + shl r11d, 24 + mov [rdi+4], r11d + + + mov rax, [rsi + 8] + and rax, [rdx + 8] + + mov [rdi + 8 ], rax + + mov rax, [rsi + 16] + and rax, [rdx + 16] + + mov [rdi + 16 ], rax + + mov rax, [rsi + 24] + and rax, [rdx + 24] + + mov [rdi + 24 ], rax + + mov rax, [rsi + 32] + and rax, [rdx + 32] + + and rax, [lboMask] + + mov [rdi + 32 ], rax + + + + + + ; Compare with q + + mov rax, [rdi + 32] + cmp rax, [q + 24] + jc tmp_30 ; q is bigget so done. + jnz tmp_29 ; q is lower + + mov rax, [rdi + 24] + cmp rax, [q + 16] + jc tmp_30 ; q is bigget so done. + jnz tmp_29 ; q is lower + + mov rax, [rdi + 16] + cmp rax, [q + 8] + jc tmp_30 ; q is bigget so done. + jnz tmp_29 ; q is lower + + mov rax, [rdi + 8] + cmp rax, [q + 0] + jc tmp_30 ; q is bigget so done. + jnz tmp_29 ; q is lower + + ; If equal substract q +tmp_29: + + mov rax, [q + 0] + sub [rdi + 8], rax + + mov rax, [q + 8] + sbb [rdi + 16], rax + + mov rax, [q + 16] + sbb [rdi + 24], rax + + mov rax, [q + 24] + sbb [rdi + 32], rax + +tmp_30: + + mov rsp, rbp + pop rdx + pop rsi + pop rbp + ret + + + + +and_s1l2m: + mov r11b, 0x80 + shl r11d, 24 + mov [rdi+4], r11d + + mov r8, rdi + sub rsp, 40 + mov rdi, rsp + push rsi + mov rsi, rdx + push r8 + call Fr_toNormal + mov rdx, rdi + pop rdi + pop rsi + + + mov eax, [rsi] + cmp eax, 0 + + js tmp_31 + and rax, [rdx +8] + mov [rdi+8], rax + + xor rax, rax + and rax, [rdx + 16] + + mov [rdi + 16 ], rax + + xor rax, rax + and rax, [rdx + 24] + + mov [rdi + 24 ], rax + + xor rax, rax + and rax, [rdx + 32] + + and rax, [lboMask] + + mov [rdi + 32 ], rax + + + + + + ; Compare with q + + mov rax, [rdi + 32] + cmp rax, [q + 24] + jc tmp_33 ; q is bigget so done. + jnz tmp_32 ; q is lower + + mov rax, [rdi + 24] + cmp rax, [q + 16] + jc tmp_33 ; q is bigget so done. + jnz tmp_32 ; q is lower + + mov rax, [rdi + 16] + cmp rax, [q + 8] + jc tmp_33 ; q is bigget so done. + jnz tmp_32 ; q is lower + + mov rax, [rdi + 8] + cmp rax, [q + 0] + jc tmp_33 ; q is bigget so done. + jnz tmp_32 ; q is lower + + ; If equal substract q +tmp_32: + + mov rax, [q + 0] + sub [rdi + 8], rax + + mov rax, [q + 8] + sbb [rdi + 16], rax + + mov rax, [q + 16] + sbb [rdi + 24], rax + + mov rax, [q + 24] + sbb [rdi + 32], rax + +tmp_33: + + mov rsp, rbp + pop rdx + pop rsi + pop rbp + ret + +tmp_31: + + mov r8, rdi + sub rsp, 40 + mov rdi, rsp + push rdx + push r8 + call Fr_toLongNormal + mov rsi, rdi + pop rdi + pop rdx + + mov r11b, 0x80 + shl r11d, 24 + mov [rdi+4], r11d + + + mov rax, [rsi + 8] + and rax, [rdx + 8] + + mov [rdi + 8 ], rax + + mov rax, [rsi + 16] + and rax, [rdx + 16] + + mov [rdi + 16 ], rax + + mov rax, [rsi + 24] + and rax, [rdx + 24] + + mov [rdi + 24 ], rax + + mov rax, [rsi + 32] + and rax, [rdx + 32] + + and rax, [lboMask] + + mov [rdi + 32 ], rax + + + + + + ; Compare with q + + mov rax, [rdi + 32] + cmp rax, [q + 24] + jc tmp_35 ; q is bigget so done. + jnz tmp_34 ; q is lower + + mov rax, [rdi + 24] + cmp rax, [q + 16] + jc tmp_35 ; q is bigget so done. + jnz tmp_34 ; q is lower + + mov rax, [rdi + 16] + cmp rax, [q + 8] + jc tmp_35 ; q is bigget so done. + jnz tmp_34 ; q is lower + + mov rax, [rdi + 8] + cmp rax, [q + 0] + jc tmp_35 ; q is bigget so done. + jnz tmp_34 ; q is lower + + ; If equal substract q +tmp_34: + + mov rax, [q + 0] + sub [rdi + 8], rax + + mov rax, [q + 8] + sbb [rdi + 16], rax + + mov rax, [q + 16] + sbb [rdi + 24], rax + + mov rax, [q + 24] + sbb [rdi + 32], rax + +tmp_35: + + mov rsp, rbp + pop rdx + pop rsi + pop rbp + ret + + + + + +and_l1l2: + bt rax, 62 ; check if montgomery first + jc and_l1ml2 + bt rcx, 62 ; check if montgomery first + jc and_l1nl2m +and_l1nl2n: + mov r11b, 0x80 + shl r11d, 24 + mov [rdi+4], r11d + + + mov rax, [rsi + 8] + and rax, [rdx + 8] + + mov [rdi + 8 ], rax + + mov rax, [rsi + 16] + and rax, [rdx + 16] + + mov [rdi + 16 ], rax + + mov rax, [rsi + 24] + and rax, [rdx + 24] + + mov [rdi + 24 ], rax + + mov rax, [rsi + 32] + and rax, [rdx + 32] + + and rax, [lboMask] + + mov [rdi + 32 ], rax + + + + + + ; Compare with q + + mov rax, [rdi + 32] + cmp rax, [q + 24] + jc tmp_37 ; q is bigget so done. + jnz tmp_36 ; q is lower + + mov rax, [rdi + 24] + cmp rax, [q + 16] + jc tmp_37 ; q is bigget so done. + jnz tmp_36 ; q is lower + + mov rax, [rdi + 16] + cmp rax, [q + 8] + jc tmp_37 ; q is bigget so done. + jnz tmp_36 ; q is lower + + mov rax, [rdi + 8] + cmp rax, [q + 0] + jc tmp_37 ; q is bigget so done. + jnz tmp_36 ; q is lower + + ; If equal substract q +tmp_36: + + mov rax, [q + 0] + sub [rdi + 8], rax + + mov rax, [q + 8] + sbb [rdi + 16], rax + + mov rax, [q + 16] + sbb [rdi + 24], rax + + mov rax, [q + 24] + sbb [rdi + 32], rax + +tmp_37: + + mov rsp, rbp + pop rdx + pop rsi + pop rbp + ret + + +and_l1nl2m: + mov r11b, 0x80 + shl r11d, 24 + mov [rdi+4], r11d + + mov r8, rdi + sub rsp, 40 + mov rdi, rsp + push rsi + mov rsi, rdx + push r8 + call Fr_toNormal + mov rdx, rdi + pop rdi + pop rsi + + + + mov rax, [rsi + 8] + and rax, [rdx + 8] + + mov [rdi + 8 ], rax + + mov rax, [rsi + 16] + and rax, [rdx + 16] + + mov [rdi + 16 ], rax + + mov rax, [rsi + 24] + and rax, [rdx + 24] + + mov [rdi + 24 ], rax + + mov rax, [rsi + 32] + and rax, [rdx + 32] + + and rax, [lboMask] + + mov [rdi + 32 ], rax + + + + + + ; Compare with q + + mov rax, [rdi + 32] + cmp rax, [q + 24] + jc tmp_39 ; q is bigget so done. + jnz tmp_38 ; q is lower + + mov rax, [rdi + 24] + cmp rax, [q + 16] + jc tmp_39 ; q is bigget so done. + jnz tmp_38 ; q is lower + + mov rax, [rdi + 16] + cmp rax, [q + 8] + jc tmp_39 ; q is bigget so done. + jnz tmp_38 ; q is lower + + mov rax, [rdi + 8] + cmp rax, [q + 0] + jc tmp_39 ; q is bigget so done. + jnz tmp_38 ; q is lower + + ; If equal substract q +tmp_38: + + mov rax, [q + 0] + sub [rdi + 8], rax + + mov rax, [q + 8] + sbb [rdi + 16], rax + + mov rax, [q + 16] + sbb [rdi + 24], rax + + mov rax, [q + 24] + sbb [rdi + 32], rax + +tmp_39: + + mov rsp, rbp + pop rdx + pop rsi + pop rbp + ret + + +and_l1ml2: + bt rcx, 62 ; check if montgomery first + jc and_l1ml2m +and_l1ml2n: + mov r11b, 0x80 + shl r11d, 24 + mov [rdi+4], r11d + + mov r8, rdi + sub rsp, 40 + mov rdi, rsp + push rdx + push r8 + call Fr_toNormal + mov rsi, rdi + pop rdi + pop rdx + + + + mov rax, [rsi + 8] + and rax, [rdx + 8] + + mov [rdi + 8 ], rax + + mov rax, [rsi + 16] + and rax, [rdx + 16] + + mov [rdi + 16 ], rax + + mov rax, [rsi + 24] + and rax, [rdx + 24] + + mov [rdi + 24 ], rax + + mov rax, [rsi + 32] + and rax, [rdx + 32] + + and rax, [lboMask] + + mov [rdi + 32 ], rax + + + + + + ; Compare with q + + mov rax, [rdi + 32] + cmp rax, [q + 24] + jc tmp_41 ; q is bigget so done. + jnz tmp_40 ; q is lower + + mov rax, [rdi + 24] + cmp rax, [q + 16] + jc tmp_41 ; q is bigget so done. + jnz tmp_40 ; q is lower + + mov rax, [rdi + 16] + cmp rax, [q + 8] + jc tmp_41 ; q is bigget so done. + jnz tmp_40 ; q is lower + + mov rax, [rdi + 8] + cmp rax, [q + 0] + jc tmp_41 ; q is bigget so done. + jnz tmp_40 ; q is lower + + ; If equal substract q +tmp_40: + + mov rax, [q + 0] + sub [rdi + 8], rax + + mov rax, [q + 8] + sbb [rdi + 16], rax + + mov rax, [q + 16] + sbb [rdi + 24], rax + + mov rax, [q + 24] + sbb [rdi + 32], rax + +tmp_41: + + mov rsp, rbp + pop rdx + pop rsi + pop rbp + ret + + +and_l1ml2m: + mov r11b, 0x80 + shl r11d, 24 + mov [rdi+4], r11d + + mov r8, rdi + sub rsp, 40 + mov rdi, rsp + push rdx + push r8 + call Fr_toNormal + mov rsi, rdi + pop rdi + pop rdx + + + mov r8, rdi + sub rsp, 40 + mov rdi, rsp + push rsi + mov rsi, rdx + push r8 + call Fr_toNormal + mov rdx, rdi + pop rdi + pop rsi + + + + mov rax, [rsi + 8] + and rax, [rdx + 8] + + mov [rdi + 8 ], rax + + mov rax, [rsi + 16] + and rax, [rdx + 16] + + mov [rdi + 16 ], rax + + mov rax, [rsi + 24] + and rax, [rdx + 24] + + mov [rdi + 24 ], rax + + mov rax, [rsi + 32] + and rax, [rdx + 32] + + and rax, [lboMask] + + mov [rdi + 32 ], rax + + + + + + ; Compare with q + + mov rax, [rdi + 32] + cmp rax, [q + 24] + jc tmp_43 ; q is bigget so done. + jnz tmp_42 ; q is lower + + mov rax, [rdi + 24] + cmp rax, [q + 16] + jc tmp_43 ; q is bigget so done. + jnz tmp_42 ; q is lower + + mov rax, [rdi + 16] + cmp rax, [q + 8] + jc tmp_43 ; q is bigget so done. + jnz tmp_42 ; q is lower + + mov rax, [rdi + 8] + cmp rax, [q + 0] + jc tmp_43 ; q is bigget so done. + jnz tmp_42 ; q is lower + + ; If equal substract q +tmp_42: + + mov rax, [q + 0] + sub [rdi + 8], rax + + mov rax, [q + 8] + sbb [rdi + 16], rax + + mov rax, [q + 16] + sbb [rdi + 24], rax + + mov rax, [q + 24] + sbb [rdi + 32], rax + +tmp_43: + + mov rsp, rbp + pop rdx + pop rsi + pop rbp + ret + + + +;;;;;;;;;;;;;;;;;;;;;; +; bor +;;;;;;;;;;;;;;;;;;;;;; +; Adds two elements of any kind +; Params: +; rsi <= Pointer to element 1 +; rdx <= Pointer to element 2 +; rdi <= Pointer to result +; Modified Registers: +; r8, r9, 10, r11, rax, rcx +;;;;;;;;;;;;;;;;;;;;;; +Fr_bor: + push rbp + push rsi + push rdx + mov rbp, rsp + mov rax, [rsi] + mov rcx, [rdx] + bt rax, 63 ; Check if is short first operand + jc or_l1 + bt rcx, 63 ; Check if is short second operand + jc or_s1l2 + +or_s1s2: + + cmp eax, 0 + + js tmp_44 + + cmp ecx, 0 + js tmp_44 + xor rdx, rdx ; both ops are positive so do the op and return + mov edx, eax + or edx, ecx + mov [rdi], rdx ; not necessary to adjust so just save and return + mov rsp, rbp + pop rdx + pop rsi + pop rbp + ret + +tmp_44: + mov r11b, 0x80 + shl r11d, 24 + mov [rdi+4], r11d + + mov r8, rdi + sub rsp, 40 + mov rdi, rsp + push rsi + mov rsi, rdx + push r8 + call Fr_toLongNormal + mov rdx, rdi + pop rdi + pop rsi + + + mov r8, rdi + sub rsp, 40 + mov rdi, rsp + push rdx + push r8 + call Fr_toLongNormal + mov rsi, rdi + pop rdi + pop rdx + + + + mov rax, [rsi + 8] + or rax, [rdx + 8] + + mov [rdi + 8 ], rax + + mov rax, [rsi + 16] + or rax, [rdx + 16] + + mov [rdi + 16 ], rax + + mov rax, [rsi + 24] + or rax, [rdx + 24] + + mov [rdi + 24 ], rax + + mov rax, [rsi + 32] + or rax, [rdx + 32] + + and rax, [lboMask] + + mov [rdi + 32 ], rax + + + + + + ; Compare with q + + mov rax, [rdi + 32] + cmp rax, [q + 24] + jc tmp_46 ; q is bigget so done. + jnz tmp_45 ; q is lower + + mov rax, [rdi + 24] + cmp rax, [q + 16] + jc tmp_46 ; q is bigget so done. + jnz tmp_45 ; q is lower + + mov rax, [rdi + 16] + cmp rax, [q + 8] + jc tmp_46 ; q is bigget so done. + jnz tmp_45 ; q is lower + + mov rax, [rdi + 8] + cmp rax, [q + 0] + jc tmp_46 ; q is bigget so done. + jnz tmp_45 ; q is lower + + ; If equal substract q +tmp_45: + + mov rax, [q + 0] + sub [rdi + 8], rax + + mov rax, [q + 8] + sbb [rdi + 16], rax + + mov rax, [q + 16] + sbb [rdi + 24], rax + + mov rax, [q + 24] + sbb [rdi + 32], rax + +tmp_46: + + mov rsp, rbp + pop rdx + pop rsi + pop rbp + ret + + + + + + +or_l1: + bt rcx, 63 ; Check if is short second operand + jc or_l1l2 + + +or_l1s2: + bt rax, 62 ; check if montgomery first + jc or_l1ms2 +or_l1ns2: + mov r11b, 0x80 + shl r11d, 24 + mov [rdi+4], r11d + + mov rcx, [rdx] + cmp ecx, 0 + + js tmp_47 + movsx rax, ecx + or rax, [rsi +8] + mov [rdi+8], rax + + xor rax, rax + or rax, [rsi + 16]; + + mov [rdi + 16 ], rax; + + xor rax, rax + or rax, [rsi + 24]; + + mov [rdi + 24 ], rax; + + xor rax, rax + or rax, [rsi + 32]; + + and rax, [lboMask] ; + + mov [rdi + 32 ], rax; + + + + + + ; Compare with q + + mov rax, [rdi + 32] + cmp rax, [q + 24] + jc tmp_49 ; q is bigget so done. + jnz tmp_48 ; q is lower + + mov rax, [rdi + 24] + cmp rax, [q + 16] + jc tmp_49 ; q is bigget so done. + jnz tmp_48 ; q is lower + + mov rax, [rdi + 16] + cmp rax, [q + 8] + jc tmp_49 ; q is bigget so done. + jnz tmp_48 ; q is lower + + mov rax, [rdi + 8] + cmp rax, [q + 0] + jc tmp_49 ; q is bigget so done. + jnz tmp_48 ; q is lower + + ; If equal substract q +tmp_48: + + mov rax, [q + 0] + sub [rdi + 8], rax + + mov rax, [q + 8] + sbb [rdi + 16], rax + + mov rax, [q + 16] + sbb [rdi + 24], rax + + mov rax, [q + 24] + sbb [rdi + 32], rax + +tmp_49: + + mov rsp, rbp + pop rdx + pop rsi + pop rbp + ret + +tmp_47: + + mov r8, rdi + sub rsp, 40 + mov rdi, rsp + push rsi + mov rsi, rdx + push r8 + call Fr_toLongNormal + mov rdx, rdi + pop rdi + pop rsi + + mov r11b, 0x80 + shl r11d, 24 + mov [rdi+4], r11d + + + mov rax, [rsi + 8] + or rax, [rdx + 8] + + mov [rdi + 8 ], rax + + mov rax, [rsi + 16] + or rax, [rdx + 16] + + mov [rdi + 16 ], rax + + mov rax, [rsi + 24] + or rax, [rdx + 24] + + mov [rdi + 24 ], rax + + mov rax, [rsi + 32] + or rax, [rdx + 32] + + and rax, [lboMask] + + mov [rdi + 32 ], rax + + + + + + ; Compare with q + + mov rax, [rdi + 32] + cmp rax, [q + 24] + jc tmp_51 ; q is bigget so done. + jnz tmp_50 ; q is lower + + mov rax, [rdi + 24] + cmp rax, [q + 16] + jc tmp_51 ; q is bigget so done. + jnz tmp_50 ; q is lower + + mov rax, [rdi + 16] + cmp rax, [q + 8] + jc tmp_51 ; q is bigget so done. + jnz tmp_50 ; q is lower + + mov rax, [rdi + 8] + cmp rax, [q + 0] + jc tmp_51 ; q is bigget so done. + jnz tmp_50 ; q is lower + + ; If equal substract q +tmp_50: + + mov rax, [q + 0] + sub [rdi + 8], rax + + mov rax, [q + 8] + sbb [rdi + 16], rax + + mov rax, [q + 16] + sbb [rdi + 24], rax + + mov rax, [q + 24] + sbb [rdi + 32], rax + +tmp_51: + + mov rsp, rbp + pop rdx + pop rsi + pop rbp + ret + + + + +or_l1ms2: + mov r11b, 0x80 + shl r11d, 24 + mov [rdi+4], r11d + + mov r8, rdi + sub rsp, 40 + mov rdi, rsp + push rdx + push r8 + call Fr_toNormal + mov rsi, rdi + pop rdi + pop rdx + + + mov rcx, [rdx] + cmp ecx, 0 + + js tmp_52 + movsx rax, ecx + or rax, [rsi +8] + mov [rdi+8], rax + + xor rax, rax + or rax, [rsi + 16]; + + mov [rdi + 16 ], rax; + + xor rax, rax + or rax, [rsi + 24]; + + mov [rdi + 24 ], rax; + + xor rax, rax + or rax, [rsi + 32]; + + and rax, [lboMask] ; + + mov [rdi + 32 ], rax; + + + + + + ; Compare with q + + mov rax, [rdi + 32] + cmp rax, [q + 24] + jc tmp_54 ; q is bigget so done. + jnz tmp_53 ; q is lower + + mov rax, [rdi + 24] + cmp rax, [q + 16] + jc tmp_54 ; q is bigget so done. + jnz tmp_53 ; q is lower + + mov rax, [rdi + 16] + cmp rax, [q + 8] + jc tmp_54 ; q is bigget so done. + jnz tmp_53 ; q is lower + + mov rax, [rdi + 8] + cmp rax, [q + 0] + jc tmp_54 ; q is bigget so done. + jnz tmp_53 ; q is lower + + ; If equal substract q +tmp_53: + + mov rax, [q + 0] + sub [rdi + 8], rax + + mov rax, [q + 8] + sbb [rdi + 16], rax + + mov rax, [q + 16] + sbb [rdi + 24], rax + + mov rax, [q + 24] + sbb [rdi + 32], rax + +tmp_54: + + mov rsp, rbp + pop rdx + pop rsi + pop rbp + ret + +tmp_52: + + mov r8, rdi + sub rsp, 40 + mov rdi, rsp + push rsi + mov rsi, rdx + push r8 + call Fr_toLongNormal + mov rdx, rdi + pop rdi + pop rsi + + mov r11b, 0x80 + shl r11d, 24 + mov [rdi+4], r11d + + + mov rax, [rsi + 8] + or rax, [rdx + 8] + + mov [rdi + 8 ], rax + + mov rax, [rsi + 16] + or rax, [rdx + 16] + + mov [rdi + 16 ], rax + + mov rax, [rsi + 24] + or rax, [rdx + 24] + + mov [rdi + 24 ], rax + + mov rax, [rsi + 32] + or rax, [rdx + 32] + + and rax, [lboMask] + + mov [rdi + 32 ], rax + + + + + + ; Compare with q + + mov rax, [rdi + 32] + cmp rax, [q + 24] + jc tmp_56 ; q is bigget so done. + jnz tmp_55 ; q is lower + + mov rax, [rdi + 24] + cmp rax, [q + 16] + jc tmp_56 ; q is bigget so done. + jnz tmp_55 ; q is lower + + mov rax, [rdi + 16] + cmp rax, [q + 8] + jc tmp_56 ; q is bigget so done. + jnz tmp_55 ; q is lower + + mov rax, [rdi + 8] + cmp rax, [q + 0] + jc tmp_56 ; q is bigget so done. + jnz tmp_55 ; q is lower + + ; If equal substract q +tmp_55: + + mov rax, [q + 0] + sub [rdi + 8], rax + + mov rax, [q + 8] + sbb [rdi + 16], rax + + mov rax, [q + 16] + sbb [rdi + 24], rax + + mov rax, [q + 24] + sbb [rdi + 32], rax + +tmp_56: + + mov rsp, rbp + pop rdx + pop rsi + pop rbp + ret + + + + + +or_s1l2: + bt rcx, 62 ; check if montgomery first + jc or_s1l2m +or_s1l2n: + mov r11b, 0x80 + shl r11d, 24 + mov [rdi+4], r11d + + mov eax, [rsi] + cmp eax, 0 + + js tmp_57 + or rax, [rdx +8] + mov [rdi+8], rax + + xor rax, rax + or rax, [rdx + 16] + + mov [rdi + 16 ], rax + + xor rax, rax + or rax, [rdx + 24] + + mov [rdi + 24 ], rax + + xor rax, rax + or rax, [rdx + 32] + + and rax, [lboMask] + + mov [rdi + 32 ], rax + + + + + + ; Compare with q + + mov rax, [rdi + 32] + cmp rax, [q + 24] + jc tmp_59 ; q is bigget so done. + jnz tmp_58 ; q is lower + + mov rax, [rdi + 24] + cmp rax, [q + 16] + jc tmp_59 ; q is bigget so done. + jnz tmp_58 ; q is lower + + mov rax, [rdi + 16] + cmp rax, [q + 8] + jc tmp_59 ; q is bigget so done. + jnz tmp_58 ; q is lower + + mov rax, [rdi + 8] + cmp rax, [q + 0] + jc tmp_59 ; q is bigget so done. + jnz tmp_58 ; q is lower + + ; If equal substract q +tmp_58: + + mov rax, [q + 0] + sub [rdi + 8], rax + + mov rax, [q + 8] + sbb [rdi + 16], rax + + mov rax, [q + 16] + sbb [rdi + 24], rax + + mov rax, [q + 24] + sbb [rdi + 32], rax + +tmp_59: + + mov rsp, rbp + pop rdx + pop rsi + pop rbp + ret + +tmp_57: + + mov r8, rdi + sub rsp, 40 + mov rdi, rsp + push rdx + push r8 + call Fr_toLongNormal + mov rsi, rdi + pop rdi + pop rdx + + mov r11b, 0x80 + shl r11d, 24 + mov [rdi+4], r11d + + + mov rax, [rsi + 8] + or rax, [rdx + 8] + + mov [rdi + 8 ], rax + + mov rax, [rsi + 16] + or rax, [rdx + 16] + + mov [rdi + 16 ], rax + + mov rax, [rsi + 24] + or rax, [rdx + 24] + + mov [rdi + 24 ], rax + + mov rax, [rsi + 32] + or rax, [rdx + 32] + + and rax, [lboMask] + + mov [rdi + 32 ], rax + + + + + + ; Compare with q + + mov rax, [rdi + 32] + cmp rax, [q + 24] + jc tmp_61 ; q is bigget so done. + jnz tmp_60 ; q is lower + + mov rax, [rdi + 24] + cmp rax, [q + 16] + jc tmp_61 ; q is bigget so done. + jnz tmp_60 ; q is lower + + mov rax, [rdi + 16] + cmp rax, [q + 8] + jc tmp_61 ; q is bigget so done. + jnz tmp_60 ; q is lower + + mov rax, [rdi + 8] + cmp rax, [q + 0] + jc tmp_61 ; q is bigget so done. + jnz tmp_60 ; q is lower + + ; If equal substract q +tmp_60: + + mov rax, [q + 0] + sub [rdi + 8], rax + + mov rax, [q + 8] + sbb [rdi + 16], rax + + mov rax, [q + 16] + sbb [rdi + 24], rax + + mov rax, [q + 24] + sbb [rdi + 32], rax + +tmp_61: + + mov rsp, rbp + pop rdx + pop rsi + pop rbp + ret + + + + +or_s1l2m: + mov r11b, 0x80 + shl r11d, 24 + mov [rdi+4], r11d + + mov r8, rdi + sub rsp, 40 + mov rdi, rsp + push rsi + mov rsi, rdx + push r8 + call Fr_toNormal + mov rdx, rdi + pop rdi + pop rsi + + + mov eax, [rsi] + cmp eax, 0 + + js tmp_62 + or rax, [rdx +8] + mov [rdi+8], rax + + xor rax, rax + or rax, [rdx + 16] + + mov [rdi + 16 ], rax + + xor rax, rax + or rax, [rdx + 24] + + mov [rdi + 24 ], rax + + xor rax, rax + or rax, [rdx + 32] + + and rax, [lboMask] + + mov [rdi + 32 ], rax + + + + + + ; Compare with q + + mov rax, [rdi + 32] + cmp rax, [q + 24] + jc tmp_64 ; q is bigget so done. + jnz tmp_63 ; q is lower + + mov rax, [rdi + 24] + cmp rax, [q + 16] + jc tmp_64 ; q is bigget so done. + jnz tmp_63 ; q is lower + + mov rax, [rdi + 16] + cmp rax, [q + 8] + jc tmp_64 ; q is bigget so done. + jnz tmp_63 ; q is lower + + mov rax, [rdi + 8] + cmp rax, [q + 0] + jc tmp_64 ; q is bigget so done. + jnz tmp_63 ; q is lower + + ; If equal substract q +tmp_63: + + mov rax, [q + 0] + sub [rdi + 8], rax + + mov rax, [q + 8] + sbb [rdi + 16], rax + + mov rax, [q + 16] + sbb [rdi + 24], rax + + mov rax, [q + 24] + sbb [rdi + 32], rax + +tmp_64: + + mov rsp, rbp + pop rdx + pop rsi + pop rbp + ret + +tmp_62: + + mov r8, rdi + sub rsp, 40 + mov rdi, rsp + push rdx + push r8 + call Fr_toLongNormal + mov rsi, rdi + pop rdi + pop rdx + + mov r11b, 0x80 + shl r11d, 24 + mov [rdi+4], r11d + + + mov rax, [rsi + 8] + or rax, [rdx + 8] + + mov [rdi + 8 ], rax + + mov rax, [rsi + 16] + or rax, [rdx + 16] + + mov [rdi + 16 ], rax + + mov rax, [rsi + 24] + or rax, [rdx + 24] + + mov [rdi + 24 ], rax + + mov rax, [rsi + 32] + or rax, [rdx + 32] + + and rax, [lboMask] + + mov [rdi + 32 ], rax + + + + + + ; Compare with q + + mov rax, [rdi + 32] + cmp rax, [q + 24] + jc tmp_66 ; q is bigget so done. + jnz tmp_65 ; q is lower + + mov rax, [rdi + 24] + cmp rax, [q + 16] + jc tmp_66 ; q is bigget so done. + jnz tmp_65 ; q is lower + + mov rax, [rdi + 16] + cmp rax, [q + 8] + jc tmp_66 ; q is bigget so done. + jnz tmp_65 ; q is lower + + mov rax, [rdi + 8] + cmp rax, [q + 0] + jc tmp_66 ; q is bigget so done. + jnz tmp_65 ; q is lower + + ; If equal substract q +tmp_65: + + mov rax, [q + 0] + sub [rdi + 8], rax + + mov rax, [q + 8] + sbb [rdi + 16], rax + + mov rax, [q + 16] + sbb [rdi + 24], rax + + mov rax, [q + 24] + sbb [rdi + 32], rax + +tmp_66: + + mov rsp, rbp + pop rdx + pop rsi + pop rbp + ret + + + + + +or_l1l2: + bt rax, 62 ; check if montgomery first + jc or_l1ml2 + bt rcx, 62 ; check if montgomery first + jc or_l1nl2m +or_l1nl2n: + mov r11b, 0x80 + shl r11d, 24 + mov [rdi+4], r11d + + + mov rax, [rsi + 8] + or rax, [rdx + 8] + + mov [rdi + 8 ], rax + + mov rax, [rsi + 16] + or rax, [rdx + 16] + + mov [rdi + 16 ], rax + + mov rax, [rsi + 24] + or rax, [rdx + 24] + + mov [rdi + 24 ], rax + + mov rax, [rsi + 32] + or rax, [rdx + 32] + + and rax, [lboMask] + + mov [rdi + 32 ], rax + + + + + + ; Compare with q + + mov rax, [rdi + 32] + cmp rax, [q + 24] + jc tmp_68 ; q is bigget so done. + jnz tmp_67 ; q is lower + + mov rax, [rdi + 24] + cmp rax, [q + 16] + jc tmp_68 ; q is bigget so done. + jnz tmp_67 ; q is lower + + mov rax, [rdi + 16] + cmp rax, [q + 8] + jc tmp_68 ; q is bigget so done. + jnz tmp_67 ; q is lower + + mov rax, [rdi + 8] + cmp rax, [q + 0] + jc tmp_68 ; q is bigget so done. + jnz tmp_67 ; q is lower + + ; If equal substract q +tmp_67: + + mov rax, [q + 0] + sub [rdi + 8], rax + + mov rax, [q + 8] + sbb [rdi + 16], rax + + mov rax, [q + 16] + sbb [rdi + 24], rax + + mov rax, [q + 24] + sbb [rdi + 32], rax + +tmp_68: + + mov rsp, rbp + pop rdx + pop rsi + pop rbp + ret + + +or_l1nl2m: + mov r11b, 0x80 + shl r11d, 24 + mov [rdi+4], r11d + + mov r8, rdi + sub rsp, 40 + mov rdi, rsp + push rsi + mov rsi, rdx + push r8 + call Fr_toNormal + mov rdx, rdi + pop rdi + pop rsi + + + + mov rax, [rsi + 8] + or rax, [rdx + 8] + + mov [rdi + 8 ], rax + + mov rax, [rsi + 16] + or rax, [rdx + 16] + + mov [rdi + 16 ], rax + + mov rax, [rsi + 24] + or rax, [rdx + 24] + + mov [rdi + 24 ], rax + + mov rax, [rsi + 32] + or rax, [rdx + 32] + + and rax, [lboMask] + + mov [rdi + 32 ], rax + + + + + + ; Compare with q + + mov rax, [rdi + 32] + cmp rax, [q + 24] + jc tmp_70 ; q is bigget so done. + jnz tmp_69 ; q is lower + + mov rax, [rdi + 24] + cmp rax, [q + 16] + jc tmp_70 ; q is bigget so done. + jnz tmp_69 ; q is lower + + mov rax, [rdi + 16] + cmp rax, [q + 8] + jc tmp_70 ; q is bigget so done. + jnz tmp_69 ; q is lower + + mov rax, [rdi + 8] + cmp rax, [q + 0] + jc tmp_70 ; q is bigget so done. + jnz tmp_69 ; q is lower + + ; If equal substract q +tmp_69: + + mov rax, [q + 0] + sub [rdi + 8], rax + + mov rax, [q + 8] + sbb [rdi + 16], rax + + mov rax, [q + 16] + sbb [rdi + 24], rax + + mov rax, [q + 24] + sbb [rdi + 32], rax + +tmp_70: + + mov rsp, rbp + pop rdx + pop rsi + pop rbp + ret + + +or_l1ml2: + bt rcx, 62 ; check if montgomery first + jc or_l1ml2m +or_l1ml2n: + mov r11b, 0x80 + shl r11d, 24 + mov [rdi+4], r11d + + mov r8, rdi + sub rsp, 40 + mov rdi, rsp + push rdx + push r8 + call Fr_toNormal + mov rsi, rdi + pop rdi + pop rdx + + + + mov rax, [rsi + 8] + or rax, [rdx + 8] + + mov [rdi + 8 ], rax + + mov rax, [rsi + 16] + or rax, [rdx + 16] + + mov [rdi + 16 ], rax + + mov rax, [rsi + 24] + or rax, [rdx + 24] + + mov [rdi + 24 ], rax + + mov rax, [rsi + 32] + or rax, [rdx + 32] + + and rax, [lboMask] + + mov [rdi + 32 ], rax + + + + + + ; Compare with q + + mov rax, [rdi + 32] + cmp rax, [q + 24] + jc tmp_72 ; q is bigget so done. + jnz tmp_71 ; q is lower + + mov rax, [rdi + 24] + cmp rax, [q + 16] + jc tmp_72 ; q is bigget so done. + jnz tmp_71 ; q is lower + + mov rax, [rdi + 16] + cmp rax, [q + 8] + jc tmp_72 ; q is bigget so done. + jnz tmp_71 ; q is lower + + mov rax, [rdi + 8] + cmp rax, [q + 0] + jc tmp_72 ; q is bigget so done. + jnz tmp_71 ; q is lower + + ; If equal substract q +tmp_71: + + mov rax, [q + 0] + sub [rdi + 8], rax + + mov rax, [q + 8] + sbb [rdi + 16], rax + + mov rax, [q + 16] + sbb [rdi + 24], rax + + mov rax, [q + 24] + sbb [rdi + 32], rax + +tmp_72: + + mov rsp, rbp + pop rdx + pop rsi + pop rbp + ret + + +or_l1ml2m: + mov r11b, 0x80 + shl r11d, 24 + mov [rdi+4], r11d + + mov r8, rdi + sub rsp, 40 + mov rdi, rsp + push rdx + push r8 + call Fr_toNormal + mov rsi, rdi + pop rdi + pop rdx + + + mov r8, rdi + sub rsp, 40 + mov rdi, rsp + push rsi + mov rsi, rdx + push r8 + call Fr_toNormal + mov rdx, rdi + pop rdi + pop rsi + + + + mov rax, [rsi + 8] + or rax, [rdx + 8] + + mov [rdi + 8 ], rax + + mov rax, [rsi + 16] + or rax, [rdx + 16] + + mov [rdi + 16 ], rax + + mov rax, [rsi + 24] + or rax, [rdx + 24] + + mov [rdi + 24 ], rax + + mov rax, [rsi + 32] + or rax, [rdx + 32] + + and rax, [lboMask] + + mov [rdi + 32 ], rax + + + + + + ; Compare with q + + mov rax, [rdi + 32] + cmp rax, [q + 24] + jc tmp_74 ; q is bigget so done. + jnz tmp_73 ; q is lower + + mov rax, [rdi + 24] + cmp rax, [q + 16] + jc tmp_74 ; q is bigget so done. + jnz tmp_73 ; q is lower + + mov rax, [rdi + 16] + cmp rax, [q + 8] + jc tmp_74 ; q is bigget so done. + jnz tmp_73 ; q is lower + + mov rax, [rdi + 8] + cmp rax, [q + 0] + jc tmp_74 ; q is bigget so done. + jnz tmp_73 ; q is lower + + ; If equal substract q +tmp_73: + + mov rax, [q + 0] + sub [rdi + 8], rax + + mov rax, [q + 8] + sbb [rdi + 16], rax + + mov rax, [q + 16] + sbb [rdi + 24], rax + + mov rax, [q + 24] + sbb [rdi + 32], rax + +tmp_74: + + mov rsp, rbp + pop rdx + pop rsi + pop rbp + ret + + + +;;;;;;;;;;;;;;;;;;;;;; +; bxor +;;;;;;;;;;;;;;;;;;;;;; +; Adds two elements of any kind +; Params: +; rsi <= Pointer to element 1 +; rdx <= Pointer to element 2 +; rdi <= Pointer to result +; Modified Registers: +; r8, r9, 10, r11, rax, rcx +;;;;;;;;;;;;;;;;;;;;;; +Fr_bxor: + push rbp + push rsi + push rdx + mov rbp, rsp + mov rax, [rsi] + mov rcx, [rdx] + bt rax, 63 ; Check if is short first operand + jc xor_l1 + bt rcx, 63 ; Check if is short second operand + jc xor_s1l2 + +xor_s1s2: + + cmp eax, 0 + + js tmp_75 + + cmp ecx, 0 + js tmp_75 + xor rdx, rdx ; both ops are positive so do the op and return + mov edx, eax + xor edx, ecx + mov [rdi], rdx ; not necessary to adjust so just save and return + mov rsp, rbp + pop rdx + pop rsi + pop rbp + ret + +tmp_75: + mov r11b, 0x80 + shl r11d, 24 + mov [rdi+4], r11d + + mov r8, rdi + sub rsp, 40 + mov rdi, rsp + push rsi + mov rsi, rdx + push r8 + call Fr_toLongNormal + mov rdx, rdi + pop rdi + pop rsi + + + mov r8, rdi + sub rsp, 40 + mov rdi, rsp + push rdx + push r8 + call Fr_toLongNormal + mov rsi, rdi + pop rdi + pop rdx + + + + mov rax, [rsi + 8] + xor rax, [rdx + 8] + + mov [rdi + 8 ], rax + + mov rax, [rsi + 16] + xor rax, [rdx + 16] + + mov [rdi + 16 ], rax + + mov rax, [rsi + 24] + xor rax, [rdx + 24] + + mov [rdi + 24 ], rax + + mov rax, [rsi + 32] + xor rax, [rdx + 32] + + and rax, [lboMask] + + mov [rdi + 32 ], rax + + + + + + ; Compare with q + + mov rax, [rdi + 32] + cmp rax, [q + 24] + jc tmp_77 ; q is bigget so done. + jnz tmp_76 ; q is lower + + mov rax, [rdi + 24] + cmp rax, [q + 16] + jc tmp_77 ; q is bigget so done. + jnz tmp_76 ; q is lower + + mov rax, [rdi + 16] + cmp rax, [q + 8] + jc tmp_77 ; q is bigget so done. + jnz tmp_76 ; q is lower + + mov rax, [rdi + 8] + cmp rax, [q + 0] + jc tmp_77 ; q is bigget so done. + jnz tmp_76 ; q is lower + + ; If equal substract q +tmp_76: + + mov rax, [q + 0] + sub [rdi + 8], rax + + mov rax, [q + 8] + sbb [rdi + 16], rax + + mov rax, [q + 16] + sbb [rdi + 24], rax + + mov rax, [q + 24] + sbb [rdi + 32], rax + +tmp_77: + + mov rsp, rbp + pop rdx + pop rsi + pop rbp + ret + + + + + + +xor_l1: + bt rcx, 63 ; Check if is short second operand + jc xor_l1l2 + + +xor_l1s2: + bt rax, 62 ; check if montgomery first + jc xor_l1ms2 +xor_l1ns2: + mov r11b, 0x80 + shl r11d, 24 + mov [rdi+4], r11d + + mov rcx, [rdx] + cmp ecx, 0 + + js tmp_78 + movsx rax, ecx + xor rax, [rsi +8] + mov [rdi+8], rax + + xor rax, rax + xor rax, [rsi + 16]; + + mov [rdi + 16 ], rax; + + xor rax, rax + xor rax, [rsi + 24]; + + mov [rdi + 24 ], rax; + + xor rax, rax + xor rax, [rsi + 32]; + + and rax, [lboMask] ; + + mov [rdi + 32 ], rax; + + + + + + ; Compare with q + + mov rax, [rdi + 32] + cmp rax, [q + 24] + jc tmp_80 ; q is bigget so done. + jnz tmp_79 ; q is lower + + mov rax, [rdi + 24] + cmp rax, [q + 16] + jc tmp_80 ; q is bigget so done. + jnz tmp_79 ; q is lower + + mov rax, [rdi + 16] + cmp rax, [q + 8] + jc tmp_80 ; q is bigget so done. + jnz tmp_79 ; q is lower + + mov rax, [rdi + 8] + cmp rax, [q + 0] + jc tmp_80 ; q is bigget so done. + jnz tmp_79 ; q is lower + + ; If equal substract q +tmp_79: + + mov rax, [q + 0] + sub [rdi + 8], rax + + mov rax, [q + 8] + sbb [rdi + 16], rax + + mov rax, [q + 16] + sbb [rdi + 24], rax + + mov rax, [q + 24] + sbb [rdi + 32], rax + +tmp_80: + + mov rsp, rbp + pop rdx + pop rsi + pop rbp + ret + +tmp_78: + + mov r8, rdi + sub rsp, 40 + mov rdi, rsp + push rsi + mov rsi, rdx + push r8 + call Fr_toLongNormal + mov rdx, rdi + pop rdi + pop rsi + + mov r11b, 0x80 + shl r11d, 24 + mov [rdi+4], r11d + + + mov rax, [rsi + 8] + xor rax, [rdx + 8] + + mov [rdi + 8 ], rax + + mov rax, [rsi + 16] + xor rax, [rdx + 16] + + mov [rdi + 16 ], rax + + mov rax, [rsi + 24] + xor rax, [rdx + 24] + + mov [rdi + 24 ], rax + + mov rax, [rsi + 32] + xor rax, [rdx + 32] + + and rax, [lboMask] + + mov [rdi + 32 ], rax + + + + + + ; Compare with q + + mov rax, [rdi + 32] + cmp rax, [q + 24] + jc tmp_82 ; q is bigget so done. + jnz tmp_81 ; q is lower + + mov rax, [rdi + 24] + cmp rax, [q + 16] + jc tmp_82 ; q is bigget so done. + jnz tmp_81 ; q is lower + + mov rax, [rdi + 16] + cmp rax, [q + 8] + jc tmp_82 ; q is bigget so done. + jnz tmp_81 ; q is lower + + mov rax, [rdi + 8] + cmp rax, [q + 0] + jc tmp_82 ; q is bigget so done. + jnz tmp_81 ; q is lower + + ; If equal substract q +tmp_81: + + mov rax, [q + 0] + sub [rdi + 8], rax + + mov rax, [q + 8] + sbb [rdi + 16], rax + + mov rax, [q + 16] + sbb [rdi + 24], rax + + mov rax, [q + 24] + sbb [rdi + 32], rax + +tmp_82: + + mov rsp, rbp + pop rdx + pop rsi + pop rbp + ret + + + + +xor_l1ms2: + mov r11b, 0x80 + shl r11d, 24 + mov [rdi+4], r11d + + mov r8, rdi + sub rsp, 40 + mov rdi, rsp + push rdx + push r8 + call Fr_toNormal + mov rsi, rdi + pop rdi + pop rdx + + + mov rcx, [rdx] + cmp ecx, 0 + + js tmp_83 + movsx rax, ecx + xor rax, [rsi +8] + mov [rdi+8], rax + + xor rax, rax + xor rax, [rsi + 16]; + + mov [rdi + 16 ], rax; + + xor rax, rax + xor rax, [rsi + 24]; + + mov [rdi + 24 ], rax; + + xor rax, rax + xor rax, [rsi + 32]; + + and rax, [lboMask] ; + + mov [rdi + 32 ], rax; + + + + + + ; Compare with q + + mov rax, [rdi + 32] + cmp rax, [q + 24] + jc tmp_85 ; q is bigget so done. + jnz tmp_84 ; q is lower + + mov rax, [rdi + 24] + cmp rax, [q + 16] + jc tmp_85 ; q is bigget so done. + jnz tmp_84 ; q is lower + + mov rax, [rdi + 16] + cmp rax, [q + 8] + jc tmp_85 ; q is bigget so done. + jnz tmp_84 ; q is lower + + mov rax, [rdi + 8] + cmp rax, [q + 0] + jc tmp_85 ; q is bigget so done. + jnz tmp_84 ; q is lower + + ; If equal substract q +tmp_84: + + mov rax, [q + 0] + sub [rdi + 8], rax + + mov rax, [q + 8] + sbb [rdi + 16], rax + + mov rax, [q + 16] + sbb [rdi + 24], rax + + mov rax, [q + 24] + sbb [rdi + 32], rax + +tmp_85: + + mov rsp, rbp + pop rdx + pop rsi + pop rbp + ret + +tmp_83: + + mov r8, rdi + sub rsp, 40 + mov rdi, rsp + push rsi + mov rsi, rdx + push r8 + call Fr_toLongNormal + mov rdx, rdi + pop rdi + pop rsi + + mov r11b, 0x80 + shl r11d, 24 + mov [rdi+4], r11d + + + mov rax, [rsi + 8] + xor rax, [rdx + 8] + + mov [rdi + 8 ], rax + + mov rax, [rsi + 16] + xor rax, [rdx + 16] + + mov [rdi + 16 ], rax + + mov rax, [rsi + 24] + xor rax, [rdx + 24] + + mov [rdi + 24 ], rax + + mov rax, [rsi + 32] + xor rax, [rdx + 32] + + and rax, [lboMask] + + mov [rdi + 32 ], rax + + + + + + ; Compare with q + + mov rax, [rdi + 32] + cmp rax, [q + 24] + jc tmp_87 ; q is bigget so done. + jnz tmp_86 ; q is lower + + mov rax, [rdi + 24] + cmp rax, [q + 16] + jc tmp_87 ; q is bigget so done. + jnz tmp_86 ; q is lower + + mov rax, [rdi + 16] + cmp rax, [q + 8] + jc tmp_87 ; q is bigget so done. + jnz tmp_86 ; q is lower + + mov rax, [rdi + 8] + cmp rax, [q + 0] + jc tmp_87 ; q is bigget so done. + jnz tmp_86 ; q is lower + + ; If equal substract q +tmp_86: + + mov rax, [q + 0] + sub [rdi + 8], rax + + mov rax, [q + 8] + sbb [rdi + 16], rax + + mov rax, [q + 16] + sbb [rdi + 24], rax + + mov rax, [q + 24] + sbb [rdi + 32], rax + +tmp_87: + + mov rsp, rbp + pop rdx + pop rsi + pop rbp + ret + + + + + +xor_s1l2: + bt rcx, 62 ; check if montgomery first + jc xor_s1l2m +xor_s1l2n: + mov r11b, 0x80 + shl r11d, 24 + mov [rdi+4], r11d + + mov eax, [rsi] + cmp eax, 0 + + js tmp_88 + xor rax, [rdx +8] + mov [rdi+8], rax + + xor rax, rax + xor rax, [rdx + 16] + + mov [rdi + 16 ], rax + + xor rax, rax + xor rax, [rdx + 24] + + mov [rdi + 24 ], rax + + xor rax, rax + xor rax, [rdx + 32] + + and rax, [lboMask] + + mov [rdi + 32 ], rax + + + + + + ; Compare with q + + mov rax, [rdi + 32] + cmp rax, [q + 24] + jc tmp_90 ; q is bigget so done. + jnz tmp_89 ; q is lower + + mov rax, [rdi + 24] + cmp rax, [q + 16] + jc tmp_90 ; q is bigget so done. + jnz tmp_89 ; q is lower + + mov rax, [rdi + 16] + cmp rax, [q + 8] + jc tmp_90 ; q is bigget so done. + jnz tmp_89 ; q is lower + + mov rax, [rdi + 8] + cmp rax, [q + 0] + jc tmp_90 ; q is bigget so done. + jnz tmp_89 ; q is lower + + ; If equal substract q +tmp_89: + + mov rax, [q + 0] + sub [rdi + 8], rax + + mov rax, [q + 8] + sbb [rdi + 16], rax + + mov rax, [q + 16] + sbb [rdi + 24], rax + + mov rax, [q + 24] + sbb [rdi + 32], rax + +tmp_90: + + mov rsp, rbp + pop rdx + pop rsi + pop rbp + ret + +tmp_88: + + mov r8, rdi + sub rsp, 40 + mov rdi, rsp + push rdx + push r8 + call Fr_toLongNormal + mov rsi, rdi + pop rdi + pop rdx + + mov r11b, 0x80 + shl r11d, 24 + mov [rdi+4], r11d + + + mov rax, [rsi + 8] + xor rax, [rdx + 8] + + mov [rdi + 8 ], rax + + mov rax, [rsi + 16] + xor rax, [rdx + 16] + + mov [rdi + 16 ], rax + + mov rax, [rsi + 24] + xor rax, [rdx + 24] + + mov [rdi + 24 ], rax + + mov rax, [rsi + 32] + xor rax, [rdx + 32] + + and rax, [lboMask] + + mov [rdi + 32 ], rax + + + + + + ; Compare with q + + mov rax, [rdi + 32] + cmp rax, [q + 24] + jc tmp_92 ; q is bigget so done. + jnz tmp_91 ; q is lower + + mov rax, [rdi + 24] + cmp rax, [q + 16] + jc tmp_92 ; q is bigget so done. + jnz tmp_91 ; q is lower + + mov rax, [rdi + 16] + cmp rax, [q + 8] + jc tmp_92 ; q is bigget so done. + jnz tmp_91 ; q is lower + + mov rax, [rdi + 8] + cmp rax, [q + 0] + jc tmp_92 ; q is bigget so done. + jnz tmp_91 ; q is lower + + ; If equal substract q +tmp_91: + + mov rax, [q + 0] + sub [rdi + 8], rax + + mov rax, [q + 8] + sbb [rdi + 16], rax + + mov rax, [q + 16] + sbb [rdi + 24], rax + + mov rax, [q + 24] + sbb [rdi + 32], rax + +tmp_92: + + mov rsp, rbp + pop rdx + pop rsi + pop rbp + ret + + + + +xor_s1l2m: + mov r11b, 0x80 + shl r11d, 24 + mov [rdi+4], r11d + + mov r8, rdi + sub rsp, 40 + mov rdi, rsp + push rsi + mov rsi, rdx + push r8 + call Fr_toNormal + mov rdx, rdi + pop rdi + pop rsi + + + mov eax, [rsi] + cmp eax, 0 + + js tmp_93 + xor rax, [rdx +8] + mov [rdi+8], rax + + xor rax, rax + xor rax, [rdx + 16] + + mov [rdi + 16 ], rax + + xor rax, rax + xor rax, [rdx + 24] + + mov [rdi + 24 ], rax + + xor rax, rax + xor rax, [rdx + 32] + + and rax, [lboMask] + + mov [rdi + 32 ], rax + + + + + + ; Compare with q + + mov rax, [rdi + 32] + cmp rax, [q + 24] + jc tmp_95 ; q is bigget so done. + jnz tmp_94 ; q is lower + + mov rax, [rdi + 24] + cmp rax, [q + 16] + jc tmp_95 ; q is bigget so done. + jnz tmp_94 ; q is lower + + mov rax, [rdi + 16] + cmp rax, [q + 8] + jc tmp_95 ; q is bigget so done. + jnz tmp_94 ; q is lower + + mov rax, [rdi + 8] + cmp rax, [q + 0] + jc tmp_95 ; q is bigget so done. + jnz tmp_94 ; q is lower + + ; If equal substract q +tmp_94: + + mov rax, [q + 0] + sub [rdi + 8], rax + + mov rax, [q + 8] + sbb [rdi + 16], rax + + mov rax, [q + 16] + sbb [rdi + 24], rax + + mov rax, [q + 24] + sbb [rdi + 32], rax + +tmp_95: + + mov rsp, rbp + pop rdx + pop rsi + pop rbp + ret + +tmp_93: + + mov r8, rdi + sub rsp, 40 + mov rdi, rsp + push rdx + push r8 + call Fr_toLongNormal + mov rsi, rdi + pop rdi + pop rdx + + mov r11b, 0x80 + shl r11d, 24 + mov [rdi+4], r11d + + + mov rax, [rsi + 8] + xor rax, [rdx + 8] + + mov [rdi + 8 ], rax + + mov rax, [rsi + 16] + xor rax, [rdx + 16] + + mov [rdi + 16 ], rax + + mov rax, [rsi + 24] + xor rax, [rdx + 24] + + mov [rdi + 24 ], rax + + mov rax, [rsi + 32] + xor rax, [rdx + 32] + + and rax, [lboMask] + + mov [rdi + 32 ], rax + + + + + + ; Compare with q + + mov rax, [rdi + 32] + cmp rax, [q + 24] + jc tmp_97 ; q is bigget so done. + jnz tmp_96 ; q is lower + + mov rax, [rdi + 24] + cmp rax, [q + 16] + jc tmp_97 ; q is bigget so done. + jnz tmp_96 ; q is lower + + mov rax, [rdi + 16] + cmp rax, [q + 8] + jc tmp_97 ; q is bigget so done. + jnz tmp_96 ; q is lower + + mov rax, [rdi + 8] + cmp rax, [q + 0] + jc tmp_97 ; q is bigget so done. + jnz tmp_96 ; q is lower + + ; If equal substract q +tmp_96: + + mov rax, [q + 0] + sub [rdi + 8], rax + + mov rax, [q + 8] + sbb [rdi + 16], rax + + mov rax, [q + 16] + sbb [rdi + 24], rax + + mov rax, [q + 24] + sbb [rdi + 32], rax + +tmp_97: + + mov rsp, rbp + pop rdx + pop rsi + pop rbp + ret + + + + + +xor_l1l2: + bt rax, 62 ; check if montgomery first + jc xor_l1ml2 + bt rcx, 62 ; check if montgomery first + jc xor_l1nl2m +xor_l1nl2n: + mov r11b, 0x80 + shl r11d, 24 + mov [rdi+4], r11d + + + mov rax, [rsi + 8] + xor rax, [rdx + 8] + + mov [rdi + 8 ], rax + + mov rax, [rsi + 16] + xor rax, [rdx + 16] + + mov [rdi + 16 ], rax + + mov rax, [rsi + 24] + xor rax, [rdx + 24] + + mov [rdi + 24 ], rax + + mov rax, [rsi + 32] + xor rax, [rdx + 32] + + and rax, [lboMask] + + mov [rdi + 32 ], rax + + + + + + ; Compare with q + + mov rax, [rdi + 32] + cmp rax, [q + 24] + jc tmp_99 ; q is bigget so done. + jnz tmp_98 ; q is lower + + mov rax, [rdi + 24] + cmp rax, [q + 16] + jc tmp_99 ; q is bigget so done. + jnz tmp_98 ; q is lower + + mov rax, [rdi + 16] + cmp rax, [q + 8] + jc tmp_99 ; q is bigget so done. + jnz tmp_98 ; q is lower + + mov rax, [rdi + 8] + cmp rax, [q + 0] + jc tmp_99 ; q is bigget so done. + jnz tmp_98 ; q is lower + + ; If equal substract q +tmp_98: + + mov rax, [q + 0] + sub [rdi + 8], rax + + mov rax, [q + 8] + sbb [rdi + 16], rax + + mov rax, [q + 16] + sbb [rdi + 24], rax + + mov rax, [q + 24] + sbb [rdi + 32], rax + +tmp_99: + + mov rsp, rbp + pop rdx + pop rsi + pop rbp + ret + + +xor_l1nl2m: + mov r11b, 0x80 + shl r11d, 24 + mov [rdi+4], r11d + + mov r8, rdi + sub rsp, 40 + mov rdi, rsp + push rsi + mov rsi, rdx + push r8 + call Fr_toNormal + mov rdx, rdi + pop rdi + pop rsi + + + + mov rax, [rsi + 8] + xor rax, [rdx + 8] + + mov [rdi + 8 ], rax + + mov rax, [rsi + 16] + xor rax, [rdx + 16] + + mov [rdi + 16 ], rax + + mov rax, [rsi + 24] + xor rax, [rdx + 24] + + mov [rdi + 24 ], rax + + mov rax, [rsi + 32] + xor rax, [rdx + 32] + + and rax, [lboMask] + + mov [rdi + 32 ], rax + + + + + + ; Compare with q + + mov rax, [rdi + 32] + cmp rax, [q + 24] + jc tmp_101 ; q is bigget so done. + jnz tmp_100 ; q is lower + + mov rax, [rdi + 24] + cmp rax, [q + 16] + jc tmp_101 ; q is bigget so done. + jnz tmp_100 ; q is lower + + mov rax, [rdi + 16] + cmp rax, [q + 8] + jc tmp_101 ; q is bigget so done. + jnz tmp_100 ; q is lower + + mov rax, [rdi + 8] + cmp rax, [q + 0] + jc tmp_101 ; q is bigget so done. + jnz tmp_100 ; q is lower + + ; If equal substract q +tmp_100: + + mov rax, [q + 0] + sub [rdi + 8], rax + + mov rax, [q + 8] + sbb [rdi + 16], rax + + mov rax, [q + 16] + sbb [rdi + 24], rax + + mov rax, [q + 24] + sbb [rdi + 32], rax + +tmp_101: + + mov rsp, rbp + pop rdx + pop rsi + pop rbp + ret + + +xor_l1ml2: + bt rcx, 62 ; check if montgomery first + jc xor_l1ml2m +xor_l1ml2n: + mov r11b, 0x80 + shl r11d, 24 + mov [rdi+4], r11d + + mov r8, rdi + sub rsp, 40 + mov rdi, rsp + push rdx + push r8 + call Fr_toNormal + mov rsi, rdi + pop rdi + pop rdx + + + + mov rax, [rsi + 8] + xor rax, [rdx + 8] + + mov [rdi + 8 ], rax + + mov rax, [rsi + 16] + xor rax, [rdx + 16] + + mov [rdi + 16 ], rax + + mov rax, [rsi + 24] + xor rax, [rdx + 24] + + mov [rdi + 24 ], rax + + mov rax, [rsi + 32] + xor rax, [rdx + 32] + + and rax, [lboMask] + + mov [rdi + 32 ], rax + + + + + + ; Compare with q + + mov rax, [rdi + 32] + cmp rax, [q + 24] + jc tmp_103 ; q is bigget so done. + jnz tmp_102 ; q is lower + + mov rax, [rdi + 24] + cmp rax, [q + 16] + jc tmp_103 ; q is bigget so done. + jnz tmp_102 ; q is lower + + mov rax, [rdi + 16] + cmp rax, [q + 8] + jc tmp_103 ; q is bigget so done. + jnz tmp_102 ; q is lower + + mov rax, [rdi + 8] + cmp rax, [q + 0] + jc tmp_103 ; q is bigget so done. + jnz tmp_102 ; q is lower + + ; If equal substract q +tmp_102: + + mov rax, [q + 0] + sub [rdi + 8], rax + + mov rax, [q + 8] + sbb [rdi + 16], rax + + mov rax, [q + 16] + sbb [rdi + 24], rax + + mov rax, [q + 24] + sbb [rdi + 32], rax + +tmp_103: + + mov rsp, rbp + pop rdx + pop rsi + pop rbp + ret + + +xor_l1ml2m: + mov r11b, 0x80 + shl r11d, 24 + mov [rdi+4], r11d + + mov r8, rdi + sub rsp, 40 + mov rdi, rsp + push rdx + push r8 + call Fr_toNormal + mov rsi, rdi + pop rdi + pop rdx + + + mov r8, rdi + sub rsp, 40 + mov rdi, rsp + push rsi + mov rsi, rdx + push r8 + call Fr_toNormal + mov rdx, rdi + pop rdi + pop rsi + + + + mov rax, [rsi + 8] + xor rax, [rdx + 8] + + mov [rdi + 8 ], rax + + mov rax, [rsi + 16] + xor rax, [rdx + 16] + + mov [rdi + 16 ], rax + + mov rax, [rsi + 24] + xor rax, [rdx + 24] + + mov [rdi + 24 ], rax + + mov rax, [rsi + 32] + xor rax, [rdx + 32] + + and rax, [lboMask] + + mov [rdi + 32 ], rax + + + + + + ; Compare with q + + mov rax, [rdi + 32] + cmp rax, [q + 24] + jc tmp_105 ; q is bigget so done. + jnz tmp_104 ; q is lower + + mov rax, [rdi + 24] + cmp rax, [q + 16] + jc tmp_105 ; q is bigget so done. + jnz tmp_104 ; q is lower + + mov rax, [rdi + 16] + cmp rax, [q + 8] + jc tmp_105 ; q is bigget so done. + jnz tmp_104 ; q is lower + + mov rax, [rdi + 8] + cmp rax, [q + 0] + jc tmp_105 ; q is bigget so done. + jnz tmp_104 ; q is lower + + ; If equal substract q +tmp_104: + + mov rax, [q + 0] + sub [rdi + 8], rax + + mov rax, [q + 8] + sbb [rdi + 16], rax + + mov rax, [q + 16] + sbb [rdi + 24], rax + + mov rax, [q + 24] + sbb [rdi + 32], rax + +tmp_105: + + mov rsp, rbp + pop rdx + pop rsi + pop rbp + ret + + + + +;;;;;;;;;;;;;;;;;;;;;; +; bnot +;;;;;;;;;;;;;;;;;;;;;; +; Adds two elements of any kind +; Params: +; rsi <= Pointer to element 1 +; rdi <= Pointer to result +; Modified Registers: +; r8, r9, 10, r11, rax, rcx +;;;;;;;;;;;;;;;;;;;;;; +Fr_bnot: + push rbp + push rsi + push rdx + mov rbp, rsp + mov r11b, 0x80 + shl r11d, 24 + mov [rdi+4], r11d + + mov rax, [rsi] + bt rax, 63 ; Check if is long operand + jc bnot_l1 +bnot_s: + + mov r8, rdi + sub rsp, 40 + mov rdi, rsp + push rdx + push r8 + call Fr_toLongNormal + mov rsi, rdi + pop rdi + pop rdx + + jmp bnot_l1n + +bnot_l1: + bt rax, 62 ; check if montgomery first + jnc bnot_l1n + +bnot_l1m: + + mov r8, rdi + sub rsp, 40 + mov rdi, rsp + push rdx + push r8 + call Fr_toNormal + mov rsi, rdi + pop rdi + pop rdx + + +bnot_l1n: + + mov rax, [rsi + 8] + not rax + + mov [rdi + 8], rax + + mov rax, [rsi + 16] + not rax + + mov [rdi + 16], rax + + mov rax, [rsi + 24] + not rax + + mov [rdi + 24], rax + + mov rax, [rsi + 32] + not rax + + and rax, [lboMask] + + mov [rdi + 32], rax + + + + + + ; Compare with q + + mov rax, [rdi + 32] + cmp rax, [q + 24] + jc tmp_107 ; q is bigget so done. + jnz tmp_106 ; q is lower + + mov rax, [rdi + 24] + cmp rax, [q + 16] + jc tmp_107 ; q is bigget so done. + jnz tmp_106 ; q is lower + + mov rax, [rdi + 16] + cmp rax, [q + 8] + jc tmp_107 ; q is bigget so done. + jnz tmp_106 ; q is lower + + mov rax, [rdi + 8] + cmp rax, [q + 0] + jc tmp_107 ; q is bigget so done. + jnz tmp_106 ; q is lower + + ; If equal substract q +tmp_106: + + mov rax, [q + 0] + sub [rdi + 8], rax + + mov rax, [q + 8] + sbb [rdi + 16], rax + + mov rax, [q + 16] + sbb [rdi + 24], rax + + mov rax, [q + 24] + sbb [rdi + 32], rax + +tmp_107: + + mov rsp, rbp + pop rdx + pop rsi + pop rbp + ret + + + + +;;;;;;;;;;;;;;;;;;;;;; +; rawShr +;;;;;;;;;;;;;;;;;;;;;; +; Adds two elements of any kind +; Params: +; rsi <= Pointer to element 1 +; rdx <= how much is shifted +; rdi <= Pointer to result +; Modified Registers: +; r8, r9, 10, r11, rax, rcx +;;;;;;;;;;;;;;;;;;;;;; +rawShr: + cmp rdx, 0 + je Fr_rawCopy + + cmp rdx, 254 + jae Fr_rawZero + +rawShr_nz: + mov r8, rdx + shr r8,6 + mov rcx, rdx + and rcx, 0x3F + jz rawShr_aligned + mov ch, 64 + sub ch, cl + + mov r9, 1 + rol cx, 8 + shl r9, cl + rol cx, 8 + sub r9, 1 + mov r10, r9 + not r10 + + + cmp r8, 3 + jae rawShr_if2_0 + + mov rax, [rsi + r8*8 + 0 ] + shr rax, cl + and rax, r9 + mov r11, [rsi + r8*8 + 8 ] + rol cx, 8 + shl r11, cl + rol cx, 8 + and r11, r10 + or rax, r11 + mov [rdi + 0], rax + + jmp rawShr_endif_0 +rawShr_if2_0: + jne rawShr_else_0 + + mov rax, [rsi + r8*8 + 0 ] + shr rax, cl + and rax, r9 + mov [rdi + 0], rax + + jmp rawShr_endif_0 +rawShr_else_0: + xor rax, rax + mov [rdi + 0], rax +rawShr_endif_0: + + cmp r8, 2 + jae rawShr_if2_1 + + mov rax, [rsi + r8*8 + 8 ] + shr rax, cl + and rax, r9 + mov r11, [rsi + r8*8 + 16 ] + rol cx, 8 + shl r11, cl + rol cx, 8 + and r11, r10 + or rax, r11 + mov [rdi + 8], rax + + jmp rawShr_endif_1 +rawShr_if2_1: + jne rawShr_else_1 + + mov rax, [rsi + r8*8 + 8 ] + shr rax, cl + and rax, r9 + mov [rdi + 8], rax + + jmp rawShr_endif_1 +rawShr_else_1: + xor rax, rax + mov [rdi + 8], rax +rawShr_endif_1: + + cmp r8, 1 + jae rawShr_if2_2 + + mov rax, [rsi + r8*8 + 16 ] + shr rax, cl + and rax, r9 + mov r11, [rsi + r8*8 + 24 ] + rol cx, 8 + shl r11, cl + rol cx, 8 + and r11, r10 + or rax, r11 + mov [rdi + 16], rax + + jmp rawShr_endif_2 +rawShr_if2_2: + jne rawShr_else_2 + + mov rax, [rsi + r8*8 + 16 ] + shr rax, cl + and rax, r9 + mov [rdi + 16], rax + + jmp rawShr_endif_2 +rawShr_else_2: + xor rax, rax + mov [rdi + 16], rax +rawShr_endif_2: + + cmp r8, 0 + jae rawShr_if2_3 + + mov rax, [rsi + r8*8 + 24 ] + shr rax, cl + and rax, r9 + mov r11, [rsi + r8*8 + 32 ] + rol cx, 8 + shl r11, cl + rol cx, 8 + and r11, r10 + or rax, r11 + mov [rdi + 24], rax + + jmp rawShr_endif_3 +rawShr_if2_3: + jne rawShr_else_3 + + mov rax, [rsi + r8*8 + 24 ] + shr rax, cl + and rax, r9 + mov [rdi + 24], rax + + jmp rawShr_endif_3 +rawShr_else_3: + xor rax, rax + mov [rdi + 24], rax +rawShr_endif_3: + + + ret + +rawShr_aligned: + + cmp r8, 3 + ja rawShr_if3_0 + mov rax, [rsi + r8*8 + 0 ] + mov [rdi + 0], rax + jmp rawShr_endif3_0 +rawShr_if3_0: + xor rax, rax + mov [rdi + 0], rax +rawShr_endif3_0: + + cmp r8, 2 + ja rawShr_if3_1 + mov rax, [rsi + r8*8 + 8 ] + mov [rdi + 8], rax + jmp rawShr_endif3_1 +rawShr_if3_1: + xor rax, rax + mov [rdi + 8], rax +rawShr_endif3_1: + + cmp r8, 1 + ja rawShr_if3_2 + mov rax, [rsi + r8*8 + 16 ] + mov [rdi + 16], rax + jmp rawShr_endif3_2 +rawShr_if3_2: + xor rax, rax + mov [rdi + 16], rax +rawShr_endif3_2: + + cmp r8, 0 + ja rawShr_if3_3 + mov rax, [rsi + r8*8 + 24 ] + mov [rdi + 24], rax + jmp rawShr_endif3_3 +rawShr_if3_3: + xor rax, rax + mov [rdi + 24], rax +rawShr_endif3_3: + + ret + + +;;;;;;;;;;;;;;;;;;;;;; +; rawShl +;;;;;;;;;;;;;;;;;;;;;; +; Adds two elements of any kind +; Params: +; rsi <= Pointer to element 1 +; rdx <= how much is shifted +; rdi <= Pointer to result +; Modified Registers: +; r8, r9, 10, r11, rax, rcx +;;;;;;;;;;;;;;;;;;;;;; +rawShl: + cmp rdx, 0 + je Fr_rawCopy + + cmp rdx, 254 + jae Fr_rawZero + + mov r8, rdx + shr r8,6 + mov rcx, rdx + and rcx, 0x3F + jz rawShl_aligned + mov ch, 64 + sub ch, cl + + + mov r10, 1 + shl r10, cl + sub r10, 1 + mov r9, r10 + not r9 + + mov rdx, rsi + mov rax, r8 + shl rax, 3 + sub rdx, rax + + + cmp r8, 3 + jae rawShl_if2_3 + + mov rax, [rdx + 24 ] + shl rax, cl + and rax, r9 + mov r11, [rdx + 16 ] + rol cx, 8 + shr r11, cl + rol cx, 8 + and r11, r10 + or rax, r11 + + and rax, [lboMask] + + + mov [rdi + 24], rax + + jmp rawShl_endif_3 +rawShl_if2_3: + jne rawShl_else_3 + + mov rax, [rdx + 24 ] + shl rax, cl + and rax, r9 + + and rax, [lboMask] + + + mov [rdi + 24], rax + + jmp rawShl_endif_3 +rawShl_else_3: + xor rax, rax + mov [rdi + 24], rax +rawShl_endif_3: + + cmp r8, 2 + jae rawShl_if2_2 + + mov rax, [rdx + 16 ] + shl rax, cl + and rax, r9 + mov r11, [rdx + 8 ] + rol cx, 8 + shr r11, cl + rol cx, 8 + and r11, r10 + or rax, r11 + + + mov [rdi + 16], rax + + jmp rawShl_endif_2 +rawShl_if2_2: + jne rawShl_else_2 + + mov rax, [rdx + 16 ] + shl rax, cl + and rax, r9 + + + mov [rdi + 16], rax + + jmp rawShl_endif_2 +rawShl_else_2: + xor rax, rax + mov [rdi + 16], rax +rawShl_endif_2: + + cmp r8, 1 + jae rawShl_if2_1 + + mov rax, [rdx + 8 ] + shl rax, cl + and rax, r9 + mov r11, [rdx + 0 ] + rol cx, 8 + shr r11, cl + rol cx, 8 + and r11, r10 + or rax, r11 + + + mov [rdi + 8], rax + + jmp rawShl_endif_1 +rawShl_if2_1: + jne rawShl_else_1 + + mov rax, [rdx + 8 ] + shl rax, cl + and rax, r9 + + + mov [rdi + 8], rax + + jmp rawShl_endif_1 +rawShl_else_1: + xor rax, rax + mov [rdi + 8], rax +rawShl_endif_1: + + cmp r8, 0 + jae rawShl_if2_0 + + mov rax, [rdx + 0 ] + shl rax, cl + and rax, r9 + mov r11, [rdx + -8 ] + rol cx, 8 + shr r11, cl + rol cx, 8 + and r11, r10 + or rax, r11 + + + mov [rdi + 0], rax + + jmp rawShl_endif_0 +rawShl_if2_0: + jne rawShl_else_0 + + mov rax, [rdx + 0 ] + shl rax, cl + and rax, r9 + + + mov [rdi + 0], rax + + jmp rawShl_endif_0 +rawShl_else_0: + xor rax, rax + mov [rdi + 0], rax +rawShl_endif_0: + + + + + + + ; Compare with q + + mov rax, [rdi + 24] + cmp rax, [q + 24] + jc tmp_109 ; q is bigget so done. + jnz tmp_108 ; q is lower + + mov rax, [rdi + 16] + cmp rax, [q + 16] + jc tmp_109 ; q is bigget so done. + jnz tmp_108 ; q is lower + + mov rax, [rdi + 8] + cmp rax, [q + 8] + jc tmp_109 ; q is bigget so done. + jnz tmp_108 ; q is lower + + mov rax, [rdi + 0] + cmp rax, [q + 0] + jc tmp_109 ; q is bigget so done. + jnz tmp_108 ; q is lower + + ; If equal substract q +tmp_108: + + mov rax, [q + 0] + sub [rdi + 0], rax + + mov rax, [q + 8] + sbb [rdi + 8], rax + + mov rax, [q + 16] + sbb [rdi + 16], rax + + mov rax, [q + 24] + sbb [rdi + 24], rax + +tmp_109: + + ret; + +rawShl_aligned: + mov rdx, rsi + mov rax, r8 + shl rax, 3 + sub rdx, rax + + + cmp r8, 3 + ja rawShl_if3_3 + mov rax, [rdx + 24 ] + + and rax, [lboMask] + + mov [rdi + 24], rax + jmp rawShl_endif3_3 +rawShl_if3_3: + xor rax, rax + mov [rdi + 24], rax +rawShl_endif3_3: + + cmp r8, 2 + ja rawShl_if3_2 + mov rax, [rdx + 16 ] + + mov [rdi + 16], rax + jmp rawShl_endif3_2 +rawShl_if3_2: + xor rax, rax + mov [rdi + 16], rax +rawShl_endif3_2: + + cmp r8, 1 + ja rawShl_if3_1 + mov rax, [rdx + 8 ] + + mov [rdi + 8], rax + jmp rawShl_endif3_1 +rawShl_if3_1: + xor rax, rax + mov [rdi + 8], rax +rawShl_endif3_1: + + cmp r8, 0 + ja rawShl_if3_0 + mov rax, [rdx + 0 ] + + mov [rdi + 0], rax + jmp rawShl_endif3_0 +rawShl_if3_0: + xor rax, rax + mov [rdi + 0], rax +rawShl_endif3_0: + + + + + + ; Compare with q + + mov rax, [rdi + 24] + cmp rax, [q + 24] + jc tmp_111 ; q is bigget so done. + jnz tmp_110 ; q is lower + + mov rax, [rdi + 16] + cmp rax, [q + 16] + jc tmp_111 ; q is bigget so done. + jnz tmp_110 ; q is lower + + mov rax, [rdi + 8] + cmp rax, [q + 8] + jc tmp_111 ; q is bigget so done. + jnz tmp_110 ; q is lower + + mov rax, [rdi + 0] + cmp rax, [q + 0] + jc tmp_111 ; q is bigget so done. + jnz tmp_110 ; q is lower + + ; If equal substract q +tmp_110: + + mov rax, [q + 0] + sub [rdi + 0], rax + + mov rax, [q + 8] + sbb [rdi + 8], rax + + mov rax, [q + 16] + sbb [rdi + 16], rax + + mov rax, [q + 24] + sbb [rdi + 24], rax + +tmp_111: + + ret + + + + + + +;;;;;;;;;;;;;;;;;;;;;; +; shr +;;;;;;;;;;;;;;;;;;;;;; +; Adds two elements of any kind +; Params: +; rsi <= Pointer to element 1 +; rdx <= Pointer to element 2 +; rdi <= Pointer to result +; Modified Registers: +; r8, r9, 10, r11, rax, rcx +;;;;;;;;;;;;;;;;;;;;;; +Fr_shr: + push rbp + push rsi + push rdi + push rdx + mov rbp, rsp + + + + + + + mov rcx, [rdx] + bt rcx, 63 ; Check if is short second operand + jnc tmp_112 + + ; long 2 + bt rcx, 62 ; Check if is montgomery second operand + jnc tmp_113 + + mov r8, rdi + sub rsp, 40 + mov rdi, rsp + push rsi + mov rsi, rdx + push r8 + call Fr_toNormal + mov rdx, rdi + pop rdi + pop rsi + +tmp_113: + mov rcx, [rdx + 8] + cmp rcx, 254 + jae tmp_114 + xor rax, rax + + cmp [rdx + 16], rax + jnz tmp_114 + + cmp [rdx + 24], rax + jnz tmp_114 + + cmp [rdx + 32], rax + jnz tmp_114 + + mov rdx, rcx + jmp do_shr + +tmp_114: + mov rcx, [q] + sub rcx, [rdx+8] + cmp rcx, 254 + jae setzero + mov rax, [q] + sub rax, [rdx+8] + + mov rax, [q+ 8] + sbb rax, [rdx + 16] + jnz setzero + + mov rax, [q+ 16] + sbb rax, [rdx + 24] + jnz setzero + + mov rax, [q+ 24] + sbb rax, [rdx + 32] + jnz setzero + + mov rdx, rcx + jmp do_shl + +tmp_112: + cmp ecx, 0 + jl tmp_115 + cmp ecx, 254 + jae setzero + movsx rdx, ecx + jmp do_shr +tmp_115: + neg ecx + cmp ecx, 254 + jae setzero + movsx rdx, ecx + jmp do_shl + + + + +;;;;;;;;;;;;;;;;;;;;;; +; shl +;;;;;;;;;;;;;;;;;;;;;; +; Adds two elements of any kind +; Params: +; rsi <= Pointer to element 1 +; rdx <= Pointer to element 2 +; rdi <= Pointer to result +; Modified Registers: +; r8, r9, 10, r11, rax, rcx +;;;;;;;;;;;;;;;;;;;;;; +Fr_shl: + push rbp + push rsi + push rdi + push rdx + mov rbp, rsp + + + + + + mov rcx, [rdx] + bt rcx, 63 ; Check if is short second operand + jnc tmp_116 + + ; long 2 + bt rcx, 62 ; Check if is montgomery second operand + jnc tmp_117 + + mov r8, rdi + sub rsp, 40 + mov rdi, rsp + push rsi + mov rsi, rdx + push r8 + call Fr_toNormal + mov rdx, rdi + pop rdi + pop rsi + +tmp_117: + mov rcx, [rdx + 8] + cmp rcx, 254 + jae tmp_118 + xor rax, rax + + cmp [rdx + 16], rax + jnz tmp_118 + + cmp [rdx + 24], rax + jnz tmp_118 + + cmp [rdx + 32], rax + jnz tmp_118 + + mov rdx, rcx + jmp do_shl + +tmp_118: + mov rcx, [q] + sub rcx, [rdx+8] + cmp rcx, 254 + jae setzero + mov rax, [q] + sub rax, [rdx+8] + + mov rax, [q+ 8] + sbb rax, [rdx + 16] + jnz setzero + + mov rax, [q+ 16] + sbb rax, [rdx + 24] + jnz setzero + + mov rax, [q+ 24] + sbb rax, [rdx + 32] + jnz setzero + + mov rdx, rcx + jmp do_shr + +tmp_116: + cmp ecx, 0 + jl tmp_119 + cmp ecx, 254 + jae setzero + movsx rdx, ecx + jmp do_shl +tmp_119: + neg ecx + cmp ecx, 254 + jae setzero + movsx rdx, ecx + jmp do_shr + + + +;;;;;;;;;; +;;; doShl +;;;;;;;;;; +do_shl: + mov rcx, [rsi] + bt rcx, 63 ; Check if is short second operand + jc do_shll +do_shls: + + movsx rax, ecx + cmp rax, 0 + jz setzero; + jl do_shlcl + + cmp rdx, 31 + jae do_shlcl + + mov cl, dl + shl rax, cl + mov rcx, rax + shr rcx, 31 + jnz do_shlcl + mov [rdi], rax + mov rsp, rbp + pop rdx + pop rdi + pop rsi + pop rbp + ret + +do_shlcl: + + mov r8, rdi + sub rsp, 40 + mov rdi, rsp + push rdx + push r8 + call Fr_toLongNormal + mov rsi, rdi + pop rdi + pop rdx + + jmp do_shlln + +do_shll: + bt rcx, 62 ; Check if is short second operand + jnc do_shlln + + mov r8, rdi + sub rsp, 40 + mov rdi, rsp + push rdx + push r8 + call Fr_toNormal + mov rsi, rdi + pop rdi + pop rdx + +do_shlln: + mov r11b, 0x80 + shl r11d, 24 + mov [rdi+4], r11d + add rdi, 8 + add rsi, 8 + call rawShl + mov rsp, rbp + pop rdx + pop rdi + pop rsi + pop rbp + ret + + +;;;;;;;;;; +;;; doShr +;;;;;;;;;; +do_shr: + mov rcx, [rsi] + bt rcx, 63 ; Check if is short second operand + jc do_shrl +do_shrs: + movsx rax, ecx + cmp rax, 0 + jz setzero; + jl do_shrcl + + cmp rdx, 31 + jae setzero + + mov cl, dl + shr rax, cl + mov [rdi], rax + mov rsp, rbp + pop rdx + pop rdi + pop rsi + pop rbp + ret + +do_shrcl: + + mov r8, rdi + sub rsp, 40 + mov rdi, rsp + push rdx + push r8 + call Fr_toLongNormal + mov rsi, rdi + pop rdi + pop rdx + + +do_shrl: + bt rcx, 62 ; Check if is short second operand + jnc do_shrln + + mov r8, rdi + sub rsp, 40 + mov rdi, rsp + push rdx + push r8 + call Fr_toNormal + mov rsi, rdi + pop rdi + pop rdx + +do_shrln: + mov r11b, 0x80 + shl r11d, 24 + mov [rdi+4], r11d + add rdi, 8 + add rsi, 8 + call rawShr + mov rsp, rbp + pop rdx + pop rdi + pop rsi + pop rbp + ret + +setzero: + xor rax, rax + mov [rdi], rax + mov rsp, rbp + pop rdx + pop rdi + pop rsi + pop rbp + ret + + + + + +;;;;;;;;;;;;;;;;;;;;;; +; rgt - Raw Greater Than +;;;;;;;;;;;;;;;;;;;;;; +; returns in ax 1 id *rsi > *rdx +; Params: +; rsi <= Pointer to element 1 +; rdx <= Pointer to element 2 +; rax <= Return 1 or 0 +; Modified Registers: +; r8, r9, rax +;;;;;;;;;;;;;;;;;;;;;; +Fr_rgt: + push rbp + push rsi + push rdx + mov rbp, rsp + mov r8, [rsi] + mov r9, [rdx] + bt r8, 63 ; Check if is short first operand + jc rgt_l1 + bt r9, 63 ; Check if is short second operand + jc rgt_s1l2 + +rgt_s1s2: ; Both operands are short + cmp r8d, r9d + jg rgt_ret1 + jmp rgt_ret0 + + +rgt_l1: + bt r9, 63 ; Check if is short second operand + jc rgt_l1l2 + +;;;;;;;; +rgt_l1s2: + bt r8, 62 ; check if montgomery first + jc rgt_l1ms2 +rgt_l1ns2: + + mov r8, rdi + sub rsp, 40 + mov rdi, rsp + push rsi + mov rsi, rdx + push r8 + call Fr_toLongNormal + mov rdx, rdi + pop rdi + pop rsi + + jmp rgtL1L2 + +rgt_l1ms2: + + mov r8, rdi + sub rsp, 40 + mov rdi, rsp + push rsi + mov rsi, rdx + push r8 + call Fr_toLongNormal + mov rdx, rdi + pop rdi + pop rsi + + + mov r8, rdi + sub rsp, 40 + mov rdi, rsp + push rdx + push r8 + call Fr_toNormal + mov rsi, rdi + pop rdi + pop rdx + + jmp rgtL1L2 + + +;;;;;;;; +rgt_s1l2: + bt r9, 62 ; check if montgomery second + jc rgt_s1l2m +rgt_s1l2n: + + mov r8, rdi + sub rsp, 40 + mov rdi, rsp + push rdx + push r8 + call Fr_toLongNormal + mov rsi, rdi + pop rdi + pop rdx + + jmp rgtL1L2 + +rgt_s1l2m: + + mov r8, rdi + sub rsp, 40 + mov rdi, rsp + push rdx + push r8 + call Fr_toLongNormal + mov rsi, rdi + pop rdi + pop rdx + + + mov r8, rdi + sub rsp, 40 + mov rdi, rsp + push rsi + mov rsi, rdx + push r8 + call Fr_toNormal + mov rdx, rdi + pop rdi + pop rsi + + jmp rgtL1L2 + +;;;; +rgt_l1l2: + bt r8, 62 ; check if montgomery first + jc rgt_l1ml2 +rgt_l1nl2: + bt r9, 62 ; check if montgomery second + jc rgt_l1nl2m +rgt_l1nl2n: + jmp rgtL1L2 + +rgt_l1nl2m: + + mov r8, rdi + sub rsp, 40 + mov rdi, rsp + push rsi + mov rsi, rdx + push r8 + call Fr_toNormal + mov rdx, rdi + pop rdi + pop rsi + + jmp rgtL1L2 + +rgt_l1ml2: + bt r9, 62 ; check if montgomery second + jc rgt_l1ml2m +rgt_l1ml2n: + + mov r8, rdi + sub rsp, 40 + mov rdi, rsp + push rdx + push r8 + call Fr_toNormal + mov rsi, rdi + pop rdi + pop rdx + + jmp rgtL1L2 + +rgt_l1ml2m: + + mov r8, rdi + sub rsp, 40 + mov rdi, rsp + push rdx + push r8 + call Fr_toNormal + mov rsi, rdi + pop rdi + pop rdx + + + mov r8, rdi + sub rsp, 40 + mov rdi, rsp + push rsi + mov rsi, rdx + push r8 + call Fr_toNormal + mov rdx, rdi + pop rdi + pop rsi + + jmp rgtL1L2 + + +;;;;;; +; rgtL1L2 +;;;;;; + +rgtL1L2: + + + mov rax, [rsi + 32] + cmp [half + 24], rax ; comare with (q-1)/2 + jc rgtl1l2_n1 ; half e1-e2 is neg => e1 < e2 + + jnz rgtl1l2_p1 ; half>rax => e1 -e2 is pos => e1 > e2 + + + mov rax, [rsi + 24] + cmp [half + 16], rax ; comare with (q-1)/2 + jc rgtl1l2_n1 ; half e1-e2 is neg => e1 < e2 + + jnz rgtl1l2_p1 ; half>rax => e1 -e2 is pos => e1 > e2 + + + mov rax, [rsi + 16] + cmp [half + 8], rax ; comare with (q-1)/2 + jc rgtl1l2_n1 ; half e1-e2 is neg => e1 < e2 + + jnz rgtl1l2_p1 ; half>rax => e1 -e2 is pos => e1 > e2 + + + mov rax, [rsi + 8] + cmp [half + 0], rax ; comare with (q-1)/2 + jc rgtl1l2_n1 ; half e1-e2 is neg => e1 < e2 + + jmp rgtl1l2_p1 + + + +rgtl1l2_p1: + + + mov rax, [rdx + 32] + cmp [half + 24], rax ; comare with (q-1)/2 + jc rgt_ret1 ; half e1-e2 is neg => e1 < e2 + + jnz rgtRawL1L2 ; half>rax => e1 -e2 is pos => e1 > e2 + + + mov rax, [rdx + 24] + cmp [half + 16], rax ; comare with (q-1)/2 + jc rgt_ret1 ; half e1-e2 is neg => e1 < e2 + + jnz rgtRawL1L2 ; half>rax => e1 -e2 is pos => e1 > e2 + + + mov rax, [rdx + 16] + cmp [half + 8], rax ; comare with (q-1)/2 + jc rgt_ret1 ; half e1-e2 is neg => e1 < e2 + + jnz rgtRawL1L2 ; half>rax => e1 -e2 is pos => e1 > e2 + + + mov rax, [rdx + 8] + cmp [half + 0], rax ; comare with (q-1)/2 + jc rgt_ret1 ; half e1-e2 is neg => e1 < e2 + + jmp rgtRawL1L2 + + + + +rgtl1l2_n1: + + + mov rax, [rdx + 32] + cmp [half + 24], rax ; comare with (q-1)/2 + jc rgtRawL1L2 ; half e1-e2 is neg => e1 < e2 + + jnz rgt_ret0 ; half>rax => e1 -e2 is pos => e1 > e2 + + + mov rax, [rdx + 24] + cmp [half + 16], rax ; comare with (q-1)/2 + jc rgtRawL1L2 ; half e1-e2 is neg => e1 < e2 + + jnz rgt_ret0 ; half>rax => e1 -e2 is pos => e1 > e2 + + + mov rax, [rdx + 16] + cmp [half + 8], rax ; comare with (q-1)/2 + jc rgtRawL1L2 ; half e1-e2 is neg => e1 < e2 + + jnz rgt_ret0 ; half>rax => e1 -e2 is pos => e1 > e2 + + + mov rax, [rdx + 8] + cmp [half + 0], rax ; comare with (q-1)/2 + jc rgtRawL1L2 ; half e1-e2 is neg => e1 < e2 + + jmp rgt_ret0 + + + + + +rgtRawL1L2: + + mov rax, [rsi + 32] + cmp [rdx + 32], rax ; comare with (q-1)/2 + jc rgt_ret1 ; rsi 1st > 2nd + + jnz rgt_ret0 + + + mov rax, [rsi + 24] + cmp [rdx + 24], rax ; comare with (q-1)/2 + jc rgt_ret1 ; rsi 1st > 2nd + + jnz rgt_ret0 + + + mov rax, [rsi + 16] + cmp [rdx + 16], rax ; comare with (q-1)/2 + jc rgt_ret1 ; rsi 1st > 2nd + + jnz rgt_ret0 + + + mov rax, [rsi + 8] + cmp [rdx + 8], rax ; comare with (q-1)/2 + jc rgt_ret1 ; rsi 1st > 2nd + + + +rgt_ret0: + xor rax, rax + mov rsp, rbp + pop rdx + pop rsi + pop rbp + ret +rgt_ret1: + mov rax, 1 + mov rsp, rbp + pop rdx + pop rsi + pop rbp + ret + + + +;;;;;;;;;;;;;;;;;;;;;; +; rlt - Raw Less Than +;;;;;;;;;;;;;;;;;;;;;; +; returns in ax 1 id *rsi > *rdx +; Params: +; rsi <= Pointer to element 1 +; rdx <= Pointer to element 2 +; rax <= Return 1 or 0 +; Modified Registers: +; r8, r9, rax +;;;;;;;;;;;;;;;;;;;;;; +Fr_rlt: + push rbp + push rsi + push rdx + mov rbp, rsp + mov r8, [rsi] + mov r9, [rdx] + bt r8, 63 ; Check if is short first operand + jc rlt_l1 + bt r9, 63 ; Check if is short second operand + jc rlt_s1l2 + +rlt_s1s2: ; Both operands are short + cmp r8d, r9d + jl rlt_ret1 + jmp rlt_ret0 + + +rlt_l1: + bt r9, 63 ; Check if is short second operand + jc rlt_l1l2 + +;;;;;;;; +rlt_l1s2: + bt r8, 62 ; check if montgomery first + jc rlt_l1ms2 +rlt_l1ns2: + + mov r8, rdi + sub rsp, 40 + mov rdi, rsp + push rsi + mov rsi, rdx + push r8 + call Fr_toLongNormal + mov rdx, rdi + pop rdi + pop rsi + + jmp rltL1L2 + +rlt_l1ms2: + + mov r8, rdi + sub rsp, 40 + mov rdi, rsp + push rsi + mov rsi, rdx + push r8 + call Fr_toLongNormal + mov rdx, rdi + pop rdi + pop rsi + + + mov r8, rdi + sub rsp, 40 + mov rdi, rsp + push rdx + push r8 + call Fr_toNormal + mov rsi, rdi + pop rdi + pop rdx + + jmp rltL1L2 + + +;;;;;;;; +rlt_s1l2: + bt r9, 62 ; check if montgomery second + jc rlt_s1l2m +rlt_s1l2n: + + mov r8, rdi + sub rsp, 40 + mov rdi, rsp + push rdx + push r8 + call Fr_toLongNormal + mov rsi, rdi + pop rdi + pop rdx + + jmp rltL1L2 + +rlt_s1l2m: + + mov r8, rdi + sub rsp, 40 + mov rdi, rsp + push rdx + push r8 + call Fr_toLongNormal + mov rsi, rdi + pop rdi + pop rdx + + + mov r8, rdi + sub rsp, 40 + mov rdi, rsp + push rsi + mov rsi, rdx + push r8 + call Fr_toNormal + mov rdx, rdi + pop rdi + pop rsi + + jmp rltL1L2 + +;;;; +rlt_l1l2: + bt r8, 62 ; check if montgomery first + jc rlt_l1ml2 +rlt_l1nl2: + bt r9, 62 ; check if montgomery second + jc rlt_l1nl2m +rlt_l1nl2n: + jmp rltL1L2 + +rlt_l1nl2m: + + mov r8, rdi + sub rsp, 40 + mov rdi, rsp + push rsi + mov rsi, rdx + push r8 + call Fr_toNormal + mov rdx, rdi + pop rdi + pop rsi + + jmp rltL1L2 + +rlt_l1ml2: + bt r9, 62 ; check if montgomery second + jc rlt_l1ml2m +rlt_l1ml2n: + + mov r8, rdi + sub rsp, 40 + mov rdi, rsp + push rdx + push r8 + call Fr_toNormal + mov rsi, rdi + pop rdi + pop rdx + + jmp rltL1L2 + +rlt_l1ml2m: + + mov r8, rdi + sub rsp, 40 + mov rdi, rsp + push rdx + push r8 + call Fr_toNormal + mov rsi, rdi + pop rdi + pop rdx + + + mov r8, rdi + sub rsp, 40 + mov rdi, rsp + push rsi + mov rsi, rdx + push r8 + call Fr_toNormal + mov rdx, rdi + pop rdi + pop rsi + + jmp rltL1L2 + + +;;;;;; +; rltL1L2 +;;;;;; + +rltL1L2: + + + mov rax, [rsi + 32] + cmp [half + 24], rax ; comare with (q-1)/2 + jc rltl1l2_n1 ; half e1-e2 is neg => e1 < e2 + + jnz rltl1l2_p1 ; half>rax => e1 -e2 is pos => e1 > e2 + + + mov rax, [rsi + 24] + cmp [half + 16], rax ; comare with (q-1)/2 + jc rltl1l2_n1 ; half e1-e2 is neg => e1 < e2 + + jnz rltl1l2_p1 ; half>rax => e1 -e2 is pos => e1 > e2 + + + mov rax, [rsi + 16] + cmp [half + 8], rax ; comare with (q-1)/2 + jc rltl1l2_n1 ; half e1-e2 is neg => e1 < e2 + + jnz rltl1l2_p1 ; half>rax => e1 -e2 is pos => e1 > e2 + + + mov rax, [rsi + 8] + cmp [half + 0], rax ; comare with (q-1)/2 + jc rltl1l2_n1 ; half e1-e2 is neg => e1 < e2 + + jmp rltl1l2_p1 + + + +rltl1l2_p1: + + + mov rax, [rdx + 32] + cmp [half + 24], rax ; comare with (q-1)/2 + jc rlt_ret0 ; half e1-e2 is neg => e1 < e2 + + jnz rltRawL1L2 ; half>rax => e1 -e2 is pos => e1 > e2 + + + mov rax, [rdx + 24] + cmp [half + 16], rax ; comare with (q-1)/2 + jc rlt_ret0 ; half e1-e2 is neg => e1 < e2 + + jnz rltRawL1L2 ; half>rax => e1 -e2 is pos => e1 > e2 + + + mov rax, [rdx + 16] + cmp [half + 8], rax ; comare with (q-1)/2 + jc rlt_ret0 ; half e1-e2 is neg => e1 < e2 + + jnz rltRawL1L2 ; half>rax => e1 -e2 is pos => e1 > e2 + + + mov rax, [rdx + 8] + cmp [half + 0], rax ; comare with (q-1)/2 + jc rlt_ret0 ; half e1-e2 is neg => e1 < e2 + + jmp rltRawL1L2 + + + + +rltl1l2_n1: + + + mov rax, [rdx + 32] + cmp [half + 24], rax ; comare with (q-1)/2 + jc rltRawL1L2 ; half e1-e2 is neg => e1 < e2 + + jnz rlt_ret1 ; half>rax => e1 -e2 is pos => e1 > e2 + + + mov rax, [rdx + 24] + cmp [half + 16], rax ; comare with (q-1)/2 + jc rltRawL1L2 ; half e1-e2 is neg => e1 < e2 + + jnz rlt_ret1 ; half>rax => e1 -e2 is pos => e1 > e2 + + + mov rax, [rdx + 16] + cmp [half + 8], rax ; comare with (q-1)/2 + jc rltRawL1L2 ; half e1-e2 is neg => e1 < e2 + + jnz rlt_ret1 ; half>rax => e1 -e2 is pos => e1 > e2 + + + mov rax, [rdx + 8] + cmp [half + 0], rax ; comare with (q-1)/2 + jc rltRawL1L2 ; half e1-e2 is neg => e1 < e2 + + jmp rlt_ret1 + + + + + +rltRawL1L2: + + mov rax, [rsi + 32] + cmp [rdx + 32], rax ; comare with (q-1)/2 + jc rlt_ret0 ; rsi 1st > 2nd + jnz rlt_ret1 + + mov rax, [rsi + 24] + cmp [rdx + 24], rax ; comare with (q-1)/2 + jc rlt_ret0 ; rsi 1st > 2nd + jnz rlt_ret1 + + mov rax, [rsi + 16] + cmp [rdx + 16], rax ; comare with (q-1)/2 + jc rlt_ret0 ; rsi 1st > 2nd + jnz rlt_ret1 + + mov rax, [rsi + 8] + cmp [rdx + 8], rax ; comare with (q-1)/2 + jc rlt_ret0 ; rsi 1st > 2nd + jnz rlt_ret1 + + +rlt_ret0: + xor rax, rax + mov rsp, rbp + pop rdx + pop rsi + pop rbp + ret +rlt_ret1: + mov rax, 1 + mov rsp, rbp + pop rdx + pop rsi + pop rbp + ret + + + +;;;;;;;;;;;;;;;;;;;;;; +; req - Raw Eq +;;;;;;;;;;;;;;;;;;;;;; +; returns in ax 1 id *rsi == *rdx +; Params: +; rsi <= Pointer to element 1 +; rdx <= Pointer to element 2 +; rax <= Return 1 or 0 +; Modified Registers: +; r8, r9, rax +;;;;;;;;;;;;;;;;;;;;;; +Fr_req: + push rbp + push rsi + push rdx + mov rbp, rsp + mov r8, [rsi] + mov r9, [rdx] + bt r8, 63 ; Check if is short first operand + jc req_l1 + bt r9, 63 ; Check if is short second operand + jc req_s1l2 + +req_s1s2: ; Both operands are short + cmp r8d, r9d + je req_ret1 + jmp req_ret0 + + +req_l1: + bt r9, 63 ; Check if is short second operand + jc req_l1l2 + +;;;;;;;; +req_l1s2: + bt r8, 62 ; check if montgomery first + jc req_l1ms2 +req_l1ns2: + + mov r8, rdi + sub rsp, 40 + mov rdi, rsp + push rsi + mov rsi, rdx + push r8 + call Fr_toLongNormal + mov rdx, rdi + pop rdi + pop rsi + + jmp reqL1L2 + +req_l1ms2: + + mov r8, rdi + sub rsp, 40 + mov rdi, rsp + push rsi + mov rsi, rdx + push r8 + call Fr_toMontgomery + mov rdx, rdi + pop rdi + pop rsi + + jmp reqL1L2 + + +;;;;;;;; +req_s1l2: + bt r9, 62 ; check if montgomery second + jc req_s1l2m +req_s1l2n: + + mov r8, rdi + sub rsp, 40 + mov rdi, rsp + push rdx + push r8 + call Fr_toLongNormal + mov rsi, rdi + pop rdi + pop rdx + + jmp reqL1L2 + +req_s1l2m: + + mov r8, rdi + sub rsp, 40 + mov rdi, rsp + push rdx + push r8 + call Fr_toMontgomery + mov rsi, rdi + pop rdi + pop rdx + + jmp reqL1L2 + +;;;; +req_l1l2: + bt r8, 62 ; check if montgomery first + jc req_l1ml2 +req_l1nl2: + bt r9, 62 ; check if montgomery second + jc req_l1nl2m +req_l1nl2n: + jmp reqL1L2 + +req_l1nl2m: + + mov r8, rdi + sub rsp, 40 + mov rdi, rsp + push rdx + push r8 + call Fr_toMontgomery + mov rsi, rdi + pop rdi + pop rdx + + jmp reqL1L2 + +req_l1ml2: + bt r9, 62 ; check if montgomery second + jc req_l1ml2m +req_l1ml2n: + + mov r8, rdi + sub rsp, 40 + mov rdi, rsp + push rsi + mov rsi, rdx + push r8 + call Fr_toMontgomery + mov rdx, rdi + pop rdi + pop rsi + + jmp reqL1L2 + +req_l1ml2m: + jmp reqL1L2 + + +;;;;;; +; eqL1L2 +;;;;;; + +reqL1L2: + + mov rax, [rsi + 8] + cmp [rdx + 8], rax + jne req_ret0 ; rsi 1st > 2nd + + mov rax, [rsi + 16] + cmp [rdx + 16], rax + jne req_ret0 ; rsi 1st > 2nd + + mov rax, [rsi + 24] + cmp [rdx + 24], rax + jne req_ret0 ; rsi 1st > 2nd + + mov rax, [rsi + 32] + cmp [rdx + 32], rax + jne req_ret0 ; rsi 1st > 2nd + + +req_ret1: + mov rax, 1 + mov rsp, rbp + pop rdx + pop rsi + pop rbp + ret + +req_ret0: + xor rax, rax + mov rsp, rbp + pop rdx + pop rsi + pop rbp + ret + + +;;;;;;;;;;;;;;;;;;;;;; +; gt +;;;;;;;;;;;;;;;;;;;;;; +; Compares two elements of any kind +; Params: +; rsi <= Pointer to element 1 +; rdx <= Pointer to element 2 +; rdi <= Pointer to result can be zero or one. +; Modified Registers: +; rax, rcx +;;;;;;;;;;;;;;;;;;;;;; +Fr_gt: + call Fr_rgt + mov [rdi], rax + ret + +;;;;;;;;;;;;;;;;;;;;;; +; lt +;;;;;;;;;;;;;;;;;;;;;; +; Compares two elements of any kind +; Params: +; rsi <= Pointer to element 1 +; rdx <= Pointer to element 2 +; rdi <= Pointer to result can be zero or one. +; Modified Registers: +; rax, rcx +;;;;;;;;;;;;;;;;;;;;;; +Fr_lt: + call Fr_rlt + mov [rdi], rax + ret + +;;;;;;;;;;;;;;;;;;;;;; +; eq +;;;;;;;;;;;;;;;;;;;;;; +; Compares two elements of any kind +; Params: +; rsi <= Pointer to element 1 +; rdx <= Pointer to element 2 +; rdi <= Pointer to result can be zero or one. +; Modified Registers: +; rax, rcx +;;;;;;;;;;;;;;;;;;;;;; +Fr_eq: + call Fr_req + mov [rdi], rax + ret + +;;;;;;;;;;;;;;;;;;;;;; +; neq +;;;;;;;;;;;;;;;;;;;;;; +; Compares two elements of any kind +; Params: +; rsi <= Pointer to element 1 +; rdx <= Pointer to element 2 +; rdi <= Pointer to result can be zero or one. +; Modified Registers: +; rax, rcx +;;;;;;;;;;;;;;;;;;;;;; +Fr_neq: + call Fr_req + xor rax, 1 + mov [rdi], rax + ret + +;;;;;;;;;;;;;;;;;;;;;; +; geq +;;;;;;;;;;;;;;;;;;;;;; +; Compares two elements of any kind +; Params: +; rsi <= Pointer to element 1 +; rdx <= Pointer to element 2 +; rdi <= Pointer to result can be zero or one. +; Modified Registers: +; rax, rcx +;;;;;;;;;;;;;;;;;;;;;; +Fr_geq: + call Fr_rlt + xor rax, 1 + mov [rdi], rax + ret + +;;;;;;;;;;;;;;;;;;;;;; +; leq +;;;;;;;;;;;;;;;;;;;;;; +; Compares two elements of any kind +; Params: +; rsi <= Pointer to element 1 +; rdx <= Pointer to element 2 +; rdi <= Pointer to result can be zero or one. +; Modified Registers: +; rax, rcx +;;;;;;;;;;;;;;;;;;;;;; +Fr_leq: + call Fr_rgt + xor rax, 1 + mov [rdi], rax + ret + + + +;;;;;;;;;;;;;;;;;;;;;; +; rawIsEq +;;;;;;;;;;;;;;;;;;;;;; +; Compares two elements of any kind +; Params: +; rdi <= Pointer to element 1 +; rsi <= Pointer to element 2 +; Returns +; ax <= 1 if are equal 0, otherwise +; Modified Registers: +; rax +;;;;;;;;;;;;;;;;;;;;;; +Fr_rawIsEq: + + mov rax, [rsi + 0] + cmp [rdi + 0], rax + jne rawIsEq_ret0 + + mov rax, [rsi + 8] + cmp [rdi + 8], rax + jne rawIsEq_ret0 + + mov rax, [rsi + 16] + cmp [rdi + 16], rax + jne rawIsEq_ret0 + + mov rax, [rsi + 24] + cmp [rdi + 24], rax + jne rawIsEq_ret0 + +rawIsEq_ret1: + mov rax, 1 + ret + +rawIsEq_ret0: + xor rax, rax + ret + +;;;;;;;;;;;;;;;;;;;;;; +; rawIsZero +;;;;;;;;;;;;;;;;;;;;;; +; Compares two elements of any kind +; Params: +; rdi <= Pointer to element 1 +; Returns +; ax <= 1 if is 0, otherwise +; Modified Registers: +; rax +;;;;;;;;;;;;;;;;;;;;;; +Fr_rawIsZero: + + cmp qword [rdi + 0], $0 + jne rawIsZero_ret0 + + cmp qword [rdi + 8], $0 + jne rawIsZero_ret0 + + cmp qword [rdi + 16], $0 + jne rawIsZero_ret0 + + cmp qword [rdi + 24], $0 + jne rawIsZero_ret0 + + +rawIsZero_ret1: + mov rax, 1 + ret + +rawIsZero_ret0: + xor rax, rax + ret + + + + + + + + + + + +;;;;;;;;;;;;;;;;;;;;;; +; land +;;;;;;;;;;;;;;;;;;;;;; +; Logical and between two elements +; Params: +; rsi <= Pointer to element 1 +; rdx <= Pointer to element 2 +; rdi <= Pointer to result zero or one +; Modified Registers: +; rax, rcx, r8 +;;;;;;;;;;;;;;;;;;;;;; +Fr_land: + + + + + + + mov rax, [rsi] + bt rax, 63 + jc tmp_120 + + test eax, eax + jz retZero_122 + jmp retOne_121 + +tmp_120: + + mov rax, [rsi + 8] + test rax, rax + jnz retOne_121 + + mov rax, [rsi + 16] + test rax, rax + jnz retOne_121 + + mov rax, [rsi + 24] + test rax, rax + jnz retOne_121 + + mov rax, [rsi + 32] + test rax, rax + jnz retOne_121 + + +retZero_122: + mov qword r8, 0 + jmp done_123 + +retOne_121: + mov qword r8, 1 + +done_123: + + + + + + + + mov rax, [rdx] + bt rax, 63 + jc tmp_124 + + test eax, eax + jz retZero_126 + jmp retOne_125 + +tmp_124: + + mov rax, [rdx + 8] + test rax, rax + jnz retOne_125 + + mov rax, [rdx + 16] + test rax, rax + jnz retOne_125 + + mov rax, [rdx + 24] + test rax, rax + jnz retOne_125 + + mov rax, [rdx + 32] + test rax, rax + jnz retOne_125 + + +retZero_126: + mov qword rcx, 0 + jmp done_127 + +retOne_125: + mov qword rcx, 1 + +done_127: + + and rcx, r8 + mov [rdi], rcx + ret + + +;;;;;;;;;;;;;;;;;;;;;; +; lor +;;;;;;;;;;;;;;;;;;;;;; +; Logical or between two elements +; Params: +; rsi <= Pointer to element 1 +; rdx <= Pointer to element 2 +; rdi <= Pointer to result zero or one +; Modified Registers: +; rax, rcx, r8 +;;;;;;;;;;;;;;;;;;;;;; +Fr_lor: + + + + + + + mov rax, [rsi] + bt rax, 63 + jc tmp_128 + + test eax, eax + jz retZero_130 + jmp retOne_129 + +tmp_128: + + mov rax, [rsi + 8] + test rax, rax + jnz retOne_129 + + mov rax, [rsi + 16] + test rax, rax + jnz retOne_129 + + mov rax, [rsi + 24] + test rax, rax + jnz retOne_129 + + mov rax, [rsi + 32] + test rax, rax + jnz retOne_129 + + +retZero_130: + mov qword r8, 0 + jmp done_131 + +retOne_129: + mov qword r8, 1 + +done_131: + + + + + + + + mov rax, [rdx] + bt rax, 63 + jc tmp_132 + + test eax, eax + jz retZero_134 + jmp retOne_133 + +tmp_132: + + mov rax, [rdx + 8] + test rax, rax + jnz retOne_133 + + mov rax, [rdx + 16] + test rax, rax + jnz retOne_133 + + mov rax, [rdx + 24] + test rax, rax + jnz retOne_133 + + mov rax, [rdx + 32] + test rax, rax + jnz retOne_133 + + +retZero_134: + mov qword rcx, 0 + jmp done_135 + +retOne_133: + mov qword rcx, 1 + +done_135: + + or rcx, r8 + mov [rdi], rcx + ret + + +;;;;;;;;;;;;;;;;;;;;;; +; lnot +;;;;;;;;;;;;;;;;;;;;;; +; Do the logical not of an element +; Params: +; rsi <= Pointer to element to be tested +; rdi <= Pointer to result one if element1 is zero and zero otherwise +; Modified Registers: +; rax, rax, r8 +;;;;;;;;;;;;;;;;;;;;;; +Fr_lnot: + + + + + + + mov rax, [rsi] + bt rax, 63 + jc tmp_136 + + test eax, eax + jz retZero_138 + jmp retOne_137 + +tmp_136: + + mov rax, [rsi + 8] + test rax, rax + jnz retOne_137 + + mov rax, [rsi + 16] + test rax, rax + jnz retOne_137 + + mov rax, [rsi + 24] + test rax, rax + jnz retOne_137 + + mov rax, [rsi + 32] + test rax, rax + jnz retOne_137 + + +retZero_138: + mov qword rcx, 0 + jmp done_139 + +retOne_137: + mov qword rcx, 1 + +done_139: + + test rcx, rcx + + jz lnot_retOne +lnot_retZero: + mov qword [rdi], 0 + ret +lnot_retOne: + mov qword [rdi], 1 + ret + + +;;;;;;;;;;;;;;;;;;;;;; +; isTrue +;;;;;;;;;;;;;;;;;;;;;; +; Convert a 64 bit integer to a long format field element +; Params: +; rsi <= Pointer to the element +; Returs: +; rax <= 1 if true 0 if false +;;;;;;;;;;;;;;;;;;;;;;; +Fr_isTrue: + + + + + + + mov rax, [rdi] + bt rax, 63 + jc tmp_140 + + test eax, eax + jz retZero_142 + jmp retOne_141 + +tmp_140: + + mov rax, [rdi + 8] + test rax, rax + jnz retOne_141 + + mov rax, [rdi + 16] + test rax, rax + jnz retOne_141 + + mov rax, [rdi + 24] + test rax, rax + jnz retOne_141 + + mov rax, [rdi + 32] + test rax, rax + jnz retOne_141 + + +retZero_142: + mov qword rax, 0 + jmp done_143 + +retOne_141: + mov qword rax, 1 + +done_143: + + ret + + + + + + section .data +Fr_q: + dd 0 + dd 0x80000000 +Fr_rawq: +q dq 0x43e1f593f0000001,0x2833e84879b97091,0xb85045b68181585d,0x30644e72e131a029 +half dq 0xa1f0fac9f8000000,0x9419f4243cdcb848,0xdc2822db40c0ac2e,0x183227397098d014 +R2 dq 0x1bb8e645ae216da7,0x53fe3ab1e35c59e3,0x8c49833d53bb8085,0x0216d0b17f4e44a5 +Fr_R3: + dd 0 + dd 0x80000000 +Fr_rawR3: +R3 dq 0x5e94d8e1b4bf0040,0x2a489cbe1cfbb6b8,0x893cc664a19fcfed,0x0cf8594b7fcc657c +lboMask dq 0x3fffffffffffffff +np dq 0xc2e1f593efffffff + diff --git a/game_4_250_cpp/fr.cpp b/game_4_250_cpp/fr.cpp new file mode 100644 index 00000000..14864de1 --- /dev/null +++ b/game_4_250_cpp/fr.cpp @@ -0,0 +1,321 @@ +#include "fr.hpp" +#include +#include +#include +#include +#include + + +static mpz_t q; +static mpz_t zero; +static mpz_t one; +static mpz_t mask; +static size_t nBits; +static bool initialized = false; + + +void Fr_toMpz(mpz_t r, PFrElement pE) { + FrElement tmp; + Fr_toNormal(&tmp, pE); + if (!(tmp.type & Fr_LONG)) { + mpz_set_si(r, tmp.shortVal); + if (tmp.shortVal<0) { + mpz_add(r, r, q); + } + } else { + mpz_import(r, Fr_N64, -1, 8, -1, 0, (const void *)tmp.longVal); + } +} + +void Fr_fromMpz(PFrElement pE, mpz_t v) { + if (mpz_fits_sint_p(v)) { + pE->type = Fr_SHORT; + pE->shortVal = mpz_get_si(v); + } else { + pE->type = Fr_LONG; + for (int i=0; ilongVal[i] = 0; + mpz_export((void *)(pE->longVal), NULL, -1, 8, -1, 0, v); + } +} + + +bool Fr_init() { + if (initialized) return false; + initialized = true; + mpz_init(q); + mpz_import(q, Fr_N64, -1, 8, -1, 0, (const void *)Fr_q.longVal); + mpz_init_set_ui(zero, 0); + mpz_init_set_ui(one, 1); + nBits = mpz_sizeinbase (q, 2); + mpz_init(mask); + mpz_mul_2exp(mask, one, nBits); + mpz_sub(mask, mask, one); + return true; +} + +void Fr_str2element(PFrElement pE, char const *s, uint base) { + mpz_t mr; + mpz_init_set_str(mr, s, base); + mpz_fdiv_r(mr, mr, q); + Fr_fromMpz(pE, mr); + mpz_clear(mr); +} + +char *Fr_element2str(PFrElement pE) { + FrElement tmp; + mpz_t r; + if (!(pE->type & Fr_LONG)) { + if (pE->shortVal>=0) { + char *r = new char[32]; + sprintf(r, "%d", pE->shortVal); + return r; + } else { + mpz_init_set_si(r, pE->shortVal); + mpz_add(r, r, q); + } + } else { + Fr_toNormal(&tmp, pE); + mpz_init(r); + mpz_import(r, Fr_N64, -1, 8, -1, 0, (const void *)tmp.longVal); + } + char *res = mpz_get_str (0, 10, r); + mpz_clear(r); + return res; +} + +void Fr_idiv(PFrElement r, PFrElement a, PFrElement b) { + mpz_t ma; + mpz_t mb; + mpz_t mr; + mpz_init(ma); + mpz_init(mb); + mpz_init(mr); + + Fr_toMpz(ma, a); + // char *s1 = mpz_get_str (0, 10, ma); + // printf("s1 %s\n", s1); + Fr_toMpz(mb, b); + // char *s2 = mpz_get_str (0, 10, mb); + // printf("s2 %s\n", s2); + mpz_fdiv_q(mr, ma, mb); + // char *sr = mpz_get_str (0, 10, mr); + // printf("r %s\n", sr); + Fr_fromMpz(r, mr); + + mpz_clear(ma); + mpz_clear(mb); + mpz_clear(mr); +} + +void Fr_mod(PFrElement r, PFrElement a, PFrElement b) { + mpz_t ma; + mpz_t mb; + mpz_t mr; + mpz_init(ma); + mpz_init(mb); + mpz_init(mr); + + Fr_toMpz(ma, a); + Fr_toMpz(mb, b); + mpz_fdiv_r(mr, ma, mb); + Fr_fromMpz(r, mr); + + mpz_clear(ma); + mpz_clear(mb); + mpz_clear(mr); +} + +void Fr_pow(PFrElement r, PFrElement a, PFrElement b) { + mpz_t ma; + mpz_t mb; + mpz_t mr; + mpz_init(ma); + mpz_init(mb); + mpz_init(mr); + + Fr_toMpz(ma, a); + Fr_toMpz(mb, b); + mpz_powm(mr, ma, mb, q); + Fr_fromMpz(r, mr); + + mpz_clear(ma); + mpz_clear(mb); + mpz_clear(mr); +} + +void Fr_inv(PFrElement r, PFrElement a) { + mpz_t ma; + mpz_t mr; + mpz_init(ma); + mpz_init(mr); + + Fr_toMpz(ma, a); + mpz_invert(mr, ma, q); + Fr_fromMpz(r, mr); + mpz_clear(ma); + mpz_clear(mr); +} + +void Fr_div(PFrElement r, PFrElement a, PFrElement b) { + FrElement tmp; + Fr_inv(&tmp, b); + Fr_mul(r, a, &tmp); +} + +void Fr_fail() { + assert(false); +} + + +RawFr::RawFr() { + Fr_init(); + set(fZero, 0); + set(fOne, 1); + neg(fNegOne, fOne); +} + +RawFr::~RawFr() { +} + +void RawFr::fromString(Element &r, const std::string &s, uint32_t radix) { + mpz_t mr; + mpz_init_set_str(mr, s.c_str(), radix); + mpz_fdiv_r(mr, mr, q); + for (int i=0; i>3] & (1 << (p & 0x7))) +void RawFr::exp(Element &r, const Element &base, uint8_t* scalar, unsigned int scalarSize) { + bool oneFound = false; + Element copyBase; + copy(copyBase, base); + for (int i=scalarSize*8-1; i>=0; i--) { + if (!oneFound) { + if ( !BIT_IS_SET(scalar, i) ) continue; + copy(r, copyBase); + oneFound = true; + continue; + } + square(r, r); + if ( BIT_IS_SET(scalar, i) ) { + mul(r, r, copyBase); + } + } + if (!oneFound) { + copy(r, fOne); + } +} + +void RawFr::toMpz(mpz_t r, const Element &a) { + Element tmp; + Fr_rawFromMontgomery(tmp.v, a.v); + mpz_import(r, Fr_N64, -1, 8, -1, 0, (const void *)tmp.v); +} + +void RawFr::fromMpz(Element &r, const mpz_t a) { + for (int i=0; i +#include +#include + +#ifdef __APPLE__ +#include // typedef unsigned int uint; +#endif // __APPLE__ + +#define Fr_N64 4 +#define Fr_SHORT 0x00000000 +#define Fr_LONG 0x80000000 +#define Fr_LONGMONTGOMERY 0xC0000000 +typedef uint64_t FrRawElement[Fr_N64]; +typedef struct __attribute__((__packed__)) { + int32_t shortVal; + uint32_t type; + FrRawElement longVal; +} FrElement; +typedef FrElement *PFrElement; +extern FrElement Fr_q; +extern FrElement Fr_R3; +extern FrRawElement Fr_rawq; +extern FrRawElement Fr_rawR3; + +extern "C" void Fr_copy(PFrElement r, PFrElement a); +extern "C" void Fr_copyn(PFrElement r, PFrElement a, int n); +extern "C" void Fr_add(PFrElement r, PFrElement a, PFrElement b); +extern "C" void Fr_sub(PFrElement r, PFrElement a, PFrElement b); +extern "C" void Fr_neg(PFrElement r, PFrElement a); +extern "C" void Fr_mul(PFrElement r, PFrElement a, PFrElement b); +extern "C" void Fr_square(PFrElement r, PFrElement a); +extern "C" void Fr_band(PFrElement r, PFrElement a, PFrElement b); +extern "C" void Fr_bor(PFrElement r, PFrElement a, PFrElement b); +extern "C" void Fr_bxor(PFrElement r, PFrElement a, PFrElement b); +extern "C" void Fr_bnot(PFrElement r, PFrElement a); +extern "C" void Fr_shl(PFrElement r, PFrElement a, PFrElement b); +extern "C" void Fr_shr(PFrElement r, PFrElement a, PFrElement b); +extern "C" void Fr_eq(PFrElement r, PFrElement a, PFrElement b); +extern "C" void Fr_neq(PFrElement r, PFrElement a, PFrElement b); +extern "C" void Fr_lt(PFrElement r, PFrElement a, PFrElement b); +extern "C" void Fr_gt(PFrElement r, PFrElement a, PFrElement b); +extern "C" void Fr_leq(PFrElement r, PFrElement a, PFrElement b); +extern "C" void Fr_geq(PFrElement r, PFrElement a, PFrElement b); +extern "C" void Fr_land(PFrElement r, PFrElement a, PFrElement b); +extern "C" void Fr_lor(PFrElement r, PFrElement a, PFrElement b); +extern "C" void Fr_lnot(PFrElement r, PFrElement a); +extern "C" void Fr_toNormal(PFrElement r, PFrElement a); +extern "C" void Fr_toLongNormal(PFrElement r, PFrElement a); +extern "C" void Fr_toMontgomery(PFrElement r, PFrElement a); + +extern "C" int Fr_isTrue(PFrElement pE); +extern "C" int Fr_toInt(PFrElement pE); + +extern "C" void Fr_rawCopy(FrRawElement pRawResult, const FrRawElement pRawA); +extern "C" void Fr_rawSwap(FrRawElement pRawResult, FrRawElement pRawA); +extern "C" void Fr_rawAdd(FrRawElement pRawResult, const FrRawElement pRawA, const FrRawElement pRawB); +extern "C" void Fr_rawSub(FrRawElement pRawResult, const FrRawElement pRawA, const FrRawElement pRawB); +extern "C" void Fr_rawNeg(FrRawElement pRawResult, const FrRawElement pRawA); +extern "C" void Fr_rawMMul(FrRawElement pRawResult, const FrRawElement pRawA, const FrRawElement pRawB); +extern "C" void Fr_rawMSquare(FrRawElement pRawResult, const FrRawElement pRawA); +extern "C" void Fr_rawMMul1(FrRawElement pRawResult, const FrRawElement pRawA, uint64_t pRawB); +extern "C" void Fr_rawToMontgomery(FrRawElement pRawResult, const FrRawElement &pRawA); +extern "C" void Fr_rawFromMontgomery(FrRawElement pRawResult, const FrRawElement &pRawA); +extern "C" int Fr_rawIsEq(const FrRawElement pRawA, const FrRawElement pRawB); +extern "C" int Fr_rawIsZero(const FrRawElement pRawB); + +extern "C" void Fr_fail(); + + +// Pending functions to convert + +void Fr_str2element(PFrElement pE, char const*s, uint base); +char *Fr_element2str(PFrElement pE); +void Fr_idiv(PFrElement r, PFrElement a, PFrElement b); +void Fr_mod(PFrElement r, PFrElement a, PFrElement b); +void Fr_inv(PFrElement r, PFrElement a); +void Fr_div(PFrElement r, PFrElement a, PFrElement b); +void Fr_pow(PFrElement r, PFrElement a, PFrElement b); + +class RawFr { + +public: + const static int N64 = Fr_N64; + const static int MaxBits = 254; + + + struct Element { + FrRawElement v; + }; + +private: + Element fZero; + Element fOne; + Element fNegOne; + +public: + + RawFr(); + ~RawFr(); + + const Element &zero() { return fZero; }; + const Element &one() { return fOne; }; + const Element &negOne() { return fNegOne; }; + Element set(int value); + void set(Element &r, int value); + + void fromString(Element &r, const std::string &n, uint32_t radix = 10); + std::string toString(const Element &a, uint32_t radix = 10); + + void inline copy(Element &r, const Element &a) { Fr_rawCopy(r.v, a.v); }; + void inline swap(Element &a, Element &b) { Fr_rawSwap(a.v, b.v); }; + void inline add(Element &r, const Element &a, const Element &b) { Fr_rawAdd(r.v, a.v, b.v); }; + void inline sub(Element &r, const Element &a, const Element &b) { Fr_rawSub(r.v, a.v, b.v); }; + void inline mul(Element &r, const Element &a, const Element &b) { Fr_rawMMul(r.v, a.v, b.v); }; + + Element inline add(const Element &a, const Element &b) { Element r; Fr_rawAdd(r.v, a.v, b.v); return r;}; + Element inline sub(const Element &a, const Element &b) { Element r; Fr_rawSub(r.v, a.v, b.v); return r;}; + Element inline mul(const Element &a, const Element &b) { Element r; Fr_rawMMul(r.v, a.v, b.v); return r;}; + + Element inline neg(const Element &a) { Element r; Fr_rawNeg(r.v, a.v); return r; }; + Element inline square(const Element &a) { Element r; Fr_rawMSquare(r.v, a.v); return r; }; + + Element inline add(int a, const Element &b) { return add(set(a), b);}; + Element inline sub(int a, const Element &b) { return sub(set(a), b);}; + Element inline mul(int a, const Element &b) { return mul(set(a), b);}; + + Element inline add(const Element &a, int b) { return add(a, set(b));}; + Element inline sub(const Element &a, int b) { return sub(a, set(b));}; + Element inline mul(const Element &a, int b) { return mul(a, set(b));}; + + void inline mul1(Element &r, const Element &a, uint64_t b) { Fr_rawMMul1(r.v, a.v, b); }; + void inline neg(Element &r, const Element &a) { Fr_rawNeg(r.v, a.v); }; + void inline square(Element &r, const Element &a) { Fr_rawMSquare(r.v, a.v); }; + void inv(Element &r, const Element &a); + void div(Element &r, const Element &a, const Element &b); + void exp(Element &r, const Element &base, uint8_t* scalar, unsigned int scalarSize); + + void inline toMontgomery(Element &r, const Element &a) { Fr_rawToMontgomery(r.v, a.v); }; + void inline fromMontgomery(Element &r, const Element &a) { Fr_rawFromMontgomery(r.v, a.v); }; + int inline eq(const Element &a, const Element &b) { return Fr_rawIsEq(a.v, b.v); }; + int inline isZero(const Element &a) { return Fr_rawIsZero(a.v); }; + + void toMpz(mpz_t r, const Element &a); + void fromMpz(Element &a, const mpz_t r); + + int toRprBE(const Element &element, uint8_t *data, int bytes); + int fromRprBE(Element &element, const uint8_t *data, int bytes); + + int bytes ( void ) { return Fr_N64 * 8; }; + + void fromUI(Element &r, unsigned long int v); + + static RawFr field; + +}; + + +#endif // __FR_H + + + diff --git a/game_4_250_cpp/game_4_250.cpp b/game_4_250_cpp/game_4_250.cpp new file mode 100644 index 00000000..efb8200e --- /dev/null +++ b/game_4_250_cpp/game_4_250.cpp @@ -0,0 +1,7807 @@ +#include +#include +#include +#include "circom.hpp" +#include "calcwit.hpp" +void MultiMux1_0_create(uint soffset,uint coffset,Circom_CalcWit* ctx,std::string componentName,uint componentFather); +void MultiMux1_0_run(uint ctx_index,Circom_CalcWit* ctx); +void IsZero_1_create(uint soffset,uint coffset,Circom_CalcWit* ctx,std::string componentName,uint componentFather); +void IsZero_1_run(uint ctx_index,Circom_CalcWit* ctx); +void Num2Bits_2_create(uint soffset,uint coffset,Circom_CalcWit* ctx,std::string componentName,uint componentFather); +void Num2Bits_2_run(uint ctx_index,Circom_CalcWit* ctx); +void LessThan_3_create(uint soffset,uint coffset,Circom_CalcWit* ctx,std::string componentName,uint componentFather); +void LessThan_3_run(uint ctx_index,Circom_CalcWit* ctx); +void MultiMux1_4_create(uint soffset,uint coffset,Circom_CalcWit* ctx,std::string componentName,uint componentFather); +void MultiMux1_4_run(uint ctx_index,Circom_CalcWit* ctx); +void Mux1_5_create(uint soffset,uint coffset,Circom_CalcWit* ctx,std::string componentName,uint componentFather); +void Mux1_5_run(uint ctx_index,Circom_CalcWit* ctx); +void AbsoluteValueSubtraction_6_create(uint soffset,uint coffset,Circom_CalcWit* ctx,std::string componentName,uint componentFather); +void AbsoluteValueSubtraction_6_run(uint ctx_index,Circom_CalcWit* ctx); +void Num2Bits_7_create(uint soffset,uint coffset,Circom_CalcWit* ctx,std::string componentName,uint componentFather); +void Num2Bits_7_run(uint ctx_index,Circom_CalcWit* ctx); +void LessThan_8_create(uint soffset,uint coffset,Circom_CalcWit* ctx,std::string componentName,uint componentFather); +void LessThan_8_run(uint ctx_index,Circom_CalcWit* ctx); +void XOR_9_create(uint soffset,uint coffset,Circom_CalcWit* ctx,std::string componentName,uint componentFather); +void XOR_9_run(uint ctx_index,Circom_CalcWit* ctx); +void OR_10_create(uint soffset,uint coffset,Circom_CalcWit* ctx,std::string componentName,uint componentFather); +void OR_10_run(uint ctx_index,Circom_CalcWit* ctx); +void Num2Bits_11_create(uint soffset,uint coffset,Circom_CalcWit* ctx,std::string componentName,uint componentFather); +void Num2Bits_11_run(uint ctx_index,Circom_CalcWit* ctx); +void LessThan_12_create(uint soffset,uint coffset,Circom_CalcWit* ctx,std::string componentName,uint componentFather); +void LessThan_12_run(uint ctx_index,Circom_CalcWit* ctx); +void LessEqThan_13_create(uint soffset,uint coffset,Circom_CalcWit* ctx,std::string componentName,uint componentFather); +void LessEqThan_13_run(uint ctx_index,Circom_CalcWit* ctx); +void Sqrt_14_create(uint soffset,uint coffset,Circom_CalcWit* ctx,std::string componentName,uint componentFather); +void Sqrt_14_run(uint ctx_index,Circom_CalcWit* ctx); +void Num2Bits_15_create(uint soffset,uint coffset,Circom_CalcWit* ctx,std::string componentName,uint componentFather); +void Num2Bits_15_run(uint ctx_index,Circom_CalcWit* ctx); +void LessThan_16_create(uint soffset,uint coffset,Circom_CalcWit* ctx,std::string componentName,uint componentFather); +void LessThan_16_run(uint ctx_index,Circom_CalcWit* ctx); +void LessEqThan_17_create(uint soffset,uint coffset,Circom_CalcWit* ctx,std::string componentName,uint componentFather); +void LessEqThan_17_run(uint ctx_index,Circom_CalcWit* ctx); +void Div_18_create(uint soffset,uint coffset,Circom_CalcWit* ctx,std::string componentName,uint componentFather); +void Div_18_run(uint ctx_index,Circom_CalcWit* ctx); +void CalculateForce_19_create(uint soffset,uint coffset,Circom_CalcWit* ctx,std::string componentName,uint componentFather); +void CalculateForce_19_run(uint ctx_index,Circom_CalcWit* ctx); +void Num2Bits_20_create(uint soffset,uint coffset,Circom_CalcWit* ctx,std::string componentName,uint componentFather); +void Num2Bits_20_run(uint ctx_index,Circom_CalcWit* ctx); +void LessThan_21_create(uint soffset,uint coffset,Circom_CalcWit* ctx,std::string componentName,uint componentFather); +void LessThan_21_run(uint ctx_index,Circom_CalcWit* ctx); +void Limiter_22_create(uint soffset,uint coffset,Circom_CalcWit* ctx,std::string componentName,uint componentFather); +void Limiter_22_run(uint ctx_index,Circom_CalcWit* ctx); +void Num2Bits_23_create(uint soffset,uint coffset,Circom_CalcWit* ctx,std::string componentName,uint componentFather); +void Num2Bits_23_run(uint ctx_index,Circom_CalcWit* ctx); +void LessThan_24_create(uint soffset,uint coffset,Circom_CalcWit* ctx,std::string componentName,uint componentFather); +void LessThan_24_run(uint ctx_index,Circom_CalcWit* ctx); +void LowerLimiter_25_create(uint soffset,uint coffset,Circom_CalcWit* ctx,std::string componentName,uint componentFather); +void LowerLimiter_25_run(uint ctx_index,Circom_CalcWit* ctx); +void LessThan_26_create(uint soffset,uint coffset,Circom_CalcWit* ctx,std::string componentName,uint componentFather); +void LessThan_26_run(uint ctx_index,Circom_CalcWit* ctx); +void Limiter_27_create(uint soffset,uint coffset,Circom_CalcWit* ctx,std::string componentName,uint componentFather); +void Limiter_27_run(uint ctx_index,Circom_CalcWit* ctx); +void LowerLimiter_28_create(uint soffset,uint coffset,Circom_CalcWit* ctx,std::string componentName,uint componentFather); +void LowerLimiter_28_run(uint ctx_index,Circom_CalcWit* ctx); +void ForceAccumulator_29_create(uint soffset,uint coffset,Circom_CalcWit* ctx,std::string componentName,uint componentFather); +void ForceAccumulator_29_run(uint ctx_index,Circom_CalcWit* ctx); +void CalculateMissile_30_create(uint soffset,uint coffset,Circom_CalcWit* ctx,std::string componentName,uint componentFather); +void CalculateMissile_30_run(uint ctx_index,Circom_CalcWit* ctx); +void AbsoluteValueSubtraction_31_create(uint soffset,uint coffset,Circom_CalcWit* ctx,std::string componentName,uint componentFather); +void AbsoluteValueSubtraction_31_run(uint ctx_index,Circom_CalcWit* ctx); +void GetDistance_32_create(uint soffset,uint coffset,Circom_CalcWit* ctx,std::string componentName,uint componentFather); +void GetDistance_32_run(uint ctx_index,Circom_CalcWit* ctx); +void Num2Bits_33_create(uint soffset,uint coffset,Circom_CalcWit* ctx,std::string componentName,uint componentFather); +void Num2Bits_33_run(uint ctx_index,Circom_CalcWit* ctx); +void LessThan_34_create(uint soffset,uint coffset,Circom_CalcWit* ctx,std::string componentName,uint componentFather); +void LessThan_34_run(uint ctx_index,Circom_CalcWit* ctx); +void DetectCollision_35_create(uint soffset,uint coffset,Circom_CalcWit* ctx,std::string componentName,uint componentFather); +void DetectCollision_35_run(uint ctx_index,Circom_CalcWit* ctx); +void MultiMux1_36_create(uint soffset,uint coffset,Circom_CalcWit* ctx,std::string componentName,uint componentFather); +void MultiMux1_36_run(uint ctx_index,Circom_CalcWit* ctx); +void StepState_37_create(uint soffset,uint coffset,Circom_CalcWit* ctx,std::string componentName,uint componentFather); +void StepState_37_run(uint ctx_index,Circom_CalcWit* ctx); +void approxSqrt_0(Circom_CalcWit* ctx,FrElement* lvar,uint componentFather,FrElement* destination,int destination_size); +void approxDiv_1(Circom_CalcWit* ctx,FrElement* lvar,uint componentFather,FrElement* destination,int destination_size); +void getX_2(Circom_CalcWit* ctx,FrElement* lvar,uint componentFather,FrElement* destination,int destination_size); +void getY_3(Circom_CalcWit* ctx,FrElement* lvar,uint componentFather,FrElement* destination,int destination_size); +void getMass_4(Circom_CalcWit* ctx,FrElement* lvar,uint componentFather,FrElement* destination,int destination_size); +Circom_TemplateFunction _functionTable[38] = { +MultiMux1_0_run, +IsZero_1_run, +Num2Bits_2_run, +LessThan_3_run, +MultiMux1_4_run, +Mux1_5_run, +AbsoluteValueSubtraction_6_run, +Num2Bits_7_run, +LessThan_8_run, +XOR_9_run, +OR_10_run, +Num2Bits_11_run, +LessThan_12_run, +LessEqThan_13_run, +Sqrt_14_run, +Num2Bits_15_run, +LessThan_16_run, +LessEqThan_17_run, +Div_18_run, +CalculateForce_19_run, +Num2Bits_20_run, +LessThan_21_run, +Limiter_22_run, +Num2Bits_23_run, +LessThan_24_run, +LowerLimiter_25_run, +LessThan_26_run, +Limiter_27_run, +LowerLimiter_28_run, +ForceAccumulator_29_run, +CalculateMissile_30_run, +AbsoluteValueSubtraction_31_run, +GetDistance_32_run, +Num2Bits_33_run, +LessThan_34_run, +DetectCollision_35_run, +MultiMux1_36_run, +StepState_37_run }; +Circom_TemplateFunction _functionTableParallel[38] = { +NULL, +NULL, +NULL, +NULL, +NULL, +NULL, +NULL, +NULL, +NULL, +NULL, +NULL, +NULL, +NULL, +NULL, +NULL, +NULL, +NULL, +NULL, +NULL, +NULL, +NULL, +NULL, +NULL, +NULL, +NULL, +NULL, +NULL, +NULL, +NULL, +NULL, +NULL, +NULL, +NULL, +NULL, +NULL, +NULL, +NULL, +NULL }; +uint get_main_input_signal_start() {return 27;} + +uint get_main_input_signal_no() {return 779;} + +uint get_total_signal_no() {return 1396317;} + +uint get_number_of_components() {return 175253;} + +uint get_size_of_input_hashmap() {return 256;} + +uint get_size_of_witness() {return 820532;} + +uint get_size_of_constants() {return 51;} + +uint get_size_of_io_map() {return 0;} + +void release_memory_component(Circom_CalcWit* ctx, uint pos) {{ + +if (pos != 0){{ + +if(ctx->componentMemory[pos].subcomponents) +delete []ctx->componentMemory[pos].subcomponents; + +if(ctx->componentMemory[pos].subcomponentsParallel) +delete []ctx->componentMemory[pos].subcomponentsParallel; + +if(ctx->componentMemory[pos].outputIsSet) +delete []ctx->componentMemory[pos].outputIsSet; + +if(ctx->componentMemory[pos].mutexes) +delete []ctx->componentMemory[pos].mutexes; + +if(ctx->componentMemory[pos].cvs) +delete []ctx->componentMemory[pos].cvs; + +if(ctx->componentMemory[pos].sbct) +delete []ctx->componentMemory[pos].sbct; + +}} + + +}} + + +// function declarations +void approxSqrt_0(Circom_CalcWit* ctx,FrElement* lvar,uint componentFather,FrElement* destination,int destination_size){ +FrElement* circuitConstants = ctx->circuitConstants; +FrElement expaux[4]; +std::string myTemplateName = "approxSqrt"; +u64 myId = componentFather; +Fr_eq(&expaux[0],&lvar[0],&circuitConstants[1]); // line circom 8 +if(Fr_isTrue(&expaux[0])){ +{ +PFrElement aux_dest = &lvar[1]; +// load src +// end load src +Fr_copy(aux_dest,&circuitConstants[1]); +} +{ +PFrElement aux_dest = &lvar[2]; +// load src +// end load src +Fr_copy(aux_dest,&circuitConstants[1]); +} +{ +PFrElement aux_dest = &lvar[3]; +// load src +// end load src +Fr_copy(aux_dest,&circuitConstants[1]); +} +// return bucket +Fr_copyn(destination,&lvar[1],destination_size); +return; +} +{ +PFrElement aux_dest = &lvar[1]; +// load src +// end load src +Fr_copy(aux_dest,&circuitConstants[1]); +} +{ +PFrElement aux_dest = &lvar[2]; +// load src +Fr_shr(&expaux[0],&lvar[0],&circuitConstants[2]); // line circom 13 +// end load src +Fr_copy(aux_dest,&expaux[0]); +} +{ +PFrElement aux_dest = &lvar[3]; +// load src +// end load src +Fr_copy(aux_dest,&circuitConstants[1]); +} +{ +PFrElement aux_dest = &lvar[4]; +// load src +// end load src +Fr_copy(aux_dest,&circuitConstants[1]); +} +Fr_leq(&expaux[0],&lvar[1],&lvar[2]); // line circom 16 +while(Fr_isTrue(&expaux[0])){ +{ +PFrElement aux_dest = &lvar[3]; +// load src +Fr_add(&expaux[1],&lvar[1],&lvar[2]); // line circom 17 +Fr_shr(&expaux[0],&expaux[1],&circuitConstants[2]); // line circom 17 +// end load src +Fr_copy(aux_dest,&expaux[0]); +} +{ +PFrElement aux_dest = &lvar[4]; +// load src +Fr_mul(&expaux[0],&lvar[3],&lvar[3]); // line circom 19 +// end load src +Fr_copy(aux_dest,&expaux[0]); +} +Fr_eq(&expaux[0],&lvar[4],&lvar[0]); // line circom 20 +if(Fr_isTrue(&expaux[0])){ +{ +PFrElement aux_dest = &lvar[5]; +// load src +// end load src +Fr_copy(aux_dest,&lvar[1]); +} +{ +PFrElement aux_dest = &lvar[6]; +// load src +// end load src +Fr_copy(aux_dest,&lvar[3]); +} +{ +PFrElement aux_dest = &lvar[7]; +// load src +// end load src +Fr_copy(aux_dest,&lvar[2]); +} +// return bucket +Fr_copyn(destination,&lvar[5],destination_size); +return; +}else{ +Fr_lt(&expaux[0],&lvar[4],&lvar[0]); // line circom 22 +if(Fr_isTrue(&expaux[0])){ +{ +PFrElement aux_dest = &lvar[1]; +// load src +Fr_add(&expaux[0],&lvar[3],&circuitConstants[2]); // line circom 23 +// end load src +Fr_copy(aux_dest,&expaux[0]); +} +}else{ +{ +PFrElement aux_dest = &lvar[2]; +// load src +Fr_sub(&expaux[0],&lvar[3],&circuitConstants[2]); // line circom 25 +// end load src +Fr_copy(aux_dest,&expaux[0]); +} +} +} +Fr_leq(&expaux[0],&lvar[1],&lvar[2]); // line circom 16 +} +{ +PFrElement aux_dest = &lvar[5]; +// load src +// end load src +Fr_copy(aux_dest,&lvar[1]); +} +{ +PFrElement aux_dest = &lvar[6]; +// load src +// end load src +Fr_copy(aux_dest,&lvar[3]); +} +{ +PFrElement aux_dest = &lvar[7]; +// load src +// end load src +Fr_copy(aux_dest,&lvar[2]); +} +// return bucket +Fr_copyn(destination,&lvar[5],destination_size); +return; +} + +void approxDiv_1(Circom_CalcWit* ctx,FrElement* lvar,uint componentFather,FrElement* destination,int destination_size){ +FrElement* circuitConstants = ctx->circuitConstants; +FrElement expaux[5]; +std::string myTemplateName = "approxDiv"; +u64 myId = componentFather; +Fr_eq(&expaux[0],&lvar[0],&circuitConstants[1]); // line circom 35 +if(Fr_isTrue(&expaux[0])){ +// return bucket +Fr_copy(destination,&circuitConstants[1]); +return; +} +{ +PFrElement aux_dest = &lvar[2]; +// load src +// end load src +Fr_copy(aux_dest,&circuitConstants[1]); +} +{ +PFrElement aux_dest = &lvar[3]; +// load src +// end load src +Fr_copy(aux_dest,&circuitConstants[1]); +} +{ +PFrElement aux_dest = &lvar[4]; +// load src +// end load src +Fr_copy(aux_dest,&circuitConstants[1]); +} +{ +PFrElement aux_dest = &lvar[5]; +// load src +// end load src +Fr_copy(aux_dest,&circuitConstants[1]); +} +{ +PFrElement aux_dest = &lvar[2]; +// load src +// end load src +Fr_copy(aux_dest,&circuitConstants[1]); +} +{ +PFrElement aux_dest = &lvar[3]; +// load src +// end load src +Fr_copy(aux_dest,&lvar[0]); +} +Fr_lt(&expaux[0],&lvar[2],&lvar[3]); // line circom 46 +while(Fr_isTrue(&expaux[0])){ +{ +PFrElement aux_dest = &lvar[4]; +// load src +Fr_add(&expaux[2],&lvar[3],&lvar[2]); // line circom 47 +Fr_add(&expaux[1],&expaux[2],&circuitConstants[2]); // line circom 47 +Fr_shr(&expaux[0],&expaux[1],&circuitConstants[2]); // line circom 47 +// end load src +Fr_copy(aux_dest,&expaux[0]); +} +{ +PFrElement aux_dest = &lvar[5]; +// load src +Fr_mul(&expaux[0],&lvar[4],&lvar[1]); // line circom 48 +// end load src +Fr_copy(aux_dest,&expaux[0]); +} +Fr_gt(&expaux[0],&lvar[5],&lvar[0]); // line circom 51 +if(Fr_isTrue(&expaux[0])){ +{ +PFrElement aux_dest = &lvar[3]; +// load src +Fr_sub(&expaux[0],&lvar[4],&circuitConstants[2]); // line circom 52 +// end load src +Fr_copy(aux_dest,&expaux[0]); +} +}else{ +{ +PFrElement aux_dest = &lvar[2]; +// load src +// end load src +Fr_copy(aux_dest,&lvar[4]); +} +} +Fr_lt(&expaux[0],&lvar[2],&lvar[3]); // line circom 46 +} +// return bucket +Fr_copy(destination,&lvar[2]); +return; +} + +void getX_2(Circom_CalcWit* ctx,FrElement* lvar,uint componentFather,FrElement* destination,int destination_size){ +FrElement* circuitConstants = ctx->circuitConstants; +FrElement expaux[1]; +std::string myTemplateName = "getX"; +u64 myId = componentFather; +// return bucket +Fr_copy(destination,&lvar[0]); +return; +} + +void getY_3(Circom_CalcWit* ctx,FrElement* lvar,uint componentFather,FrElement* destination,int destination_size){ +FrElement* circuitConstants = ctx->circuitConstants; +FrElement expaux[1]; +std::string myTemplateName = "getY"; +u64 myId = componentFather; +// return bucket +Fr_copy(destination,&lvar[1]); +return; +} + +void getMass_4(Circom_CalcWit* ctx,FrElement* lvar,uint componentFather,FrElement* destination,int destination_size){ +FrElement* circuitConstants = ctx->circuitConstants; +FrElement expaux[1]; +std::string myTemplateName = "getMass"; +u64 myId = componentFather; +// return bucket +Fr_copy(destination,&lvar[4]); +return; +} + +// template declarations +void MultiMux1_0_create(uint soffset,uint coffset,Circom_CalcWit* ctx,std::string componentName,uint componentFather){ +ctx->componentMemory[coffset].templateId = 0; +ctx->componentMemory[coffset].templateName = "MultiMux1"; +ctx->componentMemory[coffset].signalStart = soffset; +ctx->componentMemory[coffset].inputCounter = 5; +ctx->componentMemory[coffset].componentName = componentName; +ctx->componentMemory[coffset].idFather = componentFather; +ctx->componentMemory[coffset].subcomponents = new uint[0]; +} + +void MultiMux1_0_run(uint ctx_index,Circom_CalcWit* ctx){ +FrElement* signalValues = ctx->signalValues; +u64 mySignalStart = ctx->componentMemory[ctx_index].signalStart; +std::string myTemplateName = ctx->componentMemory[ctx_index].templateName; +std::string myComponentName = ctx->componentMemory[ctx_index].componentName; +u64 myFather = ctx->componentMemory[ctx_index].idFather; +u64 myId = ctx_index; +u32* mySubcomponents = ctx->componentMemory[ctx_index].subcomponents; +bool* mySubcomponentsParallel = ctx->componentMemory[ctx_index].subcomponentsParallel; +FrElement* circuitConstants = ctx->circuitConstants; +std::string* listOfTemplateMessages = ctx->listOfTemplateMessages; +FrElement expaux[5]; +FrElement lvar[2]; +uint sub_component_aux; +uint index_multiple_eq; +{ +PFrElement aux_dest = &lvar[0]; +// load src +// end load src +Fr_copy(aux_dest,&circuitConstants[0]); +} +{ +PFrElement aux_dest = &lvar[1]; +// load src +// end load src +Fr_copy(aux_dest,&circuitConstants[1]); +} +Fr_lt(&expaux[0],&lvar[1],&circuitConstants[0]); // line circom 26 +while(Fr_isTrue(&expaux[0])){ +{ +PFrElement aux_dest = &signalValues[mySignalStart + ((1 * Fr_toInt(&lvar[1])) + 0)]; +// load src +Fr_sub(&expaux[2],&signalValues[mySignalStart + (((2 * Fr_toInt(&lvar[1])) + 1) + 2)],&signalValues[mySignalStart + (((2 * Fr_toInt(&lvar[1])) + 0) + 2)]); // line circom 28 +Fr_mul(&expaux[1],&expaux[2],&signalValues[mySignalStart + 6]); // line circom 28 +Fr_add(&expaux[0],&expaux[1],&signalValues[mySignalStart + (((2 * Fr_toInt(&lvar[1])) + 0) + 2)]); // line circom 28 +// end load src +Fr_copy(aux_dest,&expaux[0]); +} +{ +PFrElement aux_dest = &lvar[1]; +// load src +Fr_add(&expaux[0],&lvar[1],&circuitConstants[2]); // line circom 26 +// end load src +Fr_copy(aux_dest,&expaux[0]); +} +Fr_lt(&expaux[0],&lvar[1],&circuitConstants[0]); // line circom 26 +} +for (uint i = 0; i < 0; i++){ +uint index_subc = ctx->componentMemory[ctx_index].subcomponents[i]; +if (index_subc != 0)release_memory_component(ctx,index_subc); +} +} + +void IsZero_1_create(uint soffset,uint coffset,Circom_CalcWit* ctx,std::string componentName,uint componentFather){ +ctx->componentMemory[coffset].templateId = 1; +ctx->componentMemory[coffset].templateName = "IsZero"; +ctx->componentMemory[coffset].signalStart = soffset; +ctx->componentMemory[coffset].inputCounter = 1; +ctx->componentMemory[coffset].componentName = componentName; +ctx->componentMemory[coffset].idFather = componentFather; +ctx->componentMemory[coffset].subcomponents = new uint[0]; +} + +void IsZero_1_run(uint ctx_index,Circom_CalcWit* ctx){ +FrElement* signalValues = ctx->signalValues; +u64 mySignalStart = ctx->componentMemory[ctx_index].signalStart; +std::string myTemplateName = ctx->componentMemory[ctx_index].templateName; +std::string myComponentName = ctx->componentMemory[ctx_index].componentName; +u64 myFather = ctx->componentMemory[ctx_index].idFather; +u64 myId = ctx_index; +u32* mySubcomponents = ctx->componentMemory[ctx_index].subcomponents; +bool* mySubcomponentsParallel = ctx->componentMemory[ctx_index].subcomponentsParallel; +FrElement* circuitConstants = ctx->circuitConstants; +std::string* listOfTemplateMessages = ctx->listOfTemplateMessages; +FrElement expaux[4]; +FrElement lvar[0]; +uint sub_component_aux; +uint index_multiple_eq; +Fr_neq(&expaux[0],&signalValues[mySignalStart + 1],&circuitConstants[1]); // line circom 30 +if(Fr_isTrue(&expaux[0])){ +{ +PFrElement aux_dest = &signalValues[mySignalStart + 2]; +// load src +Fr_div(&expaux[0],&circuitConstants[2],&signalValues[mySignalStart + 1]); // line circom 30 +// end load src +Fr_copy(aux_dest,&expaux[0]); +} +}else{ +{ +PFrElement aux_dest = &signalValues[mySignalStart + 2]; +// load src +// end load src +Fr_copy(aux_dest,&circuitConstants[1]); +} +} +{ +PFrElement aux_dest = &signalValues[mySignalStart + 0]; +// load src +Fr_neg(&expaux[2],&signalValues[mySignalStart + 1]); // line circom 32 +Fr_mul(&expaux[1],&expaux[2],&signalValues[mySignalStart + 2]); // line circom 32 +Fr_add(&expaux[0],&expaux[1],&circuitConstants[2]); // line circom 32 +// end load src +Fr_copy(aux_dest,&expaux[0]); +} +Fr_mul(&expaux[1],&signalValues[mySignalStart + 1],&signalValues[mySignalStart + 0]); // line circom 33 +Fr_eq(&expaux[0],&expaux[1],&circuitConstants[1]); // line circom 33 +if (!Fr_isTrue(&expaux[0])) std::cout << "Failed assert in template/function " << myTemplateName << " line 33. " << "Followed trace of components: " << ctx->getTrace(myId) << std::endl; +assert(Fr_isTrue(&expaux[0])); +for (uint i = 0; i < 0; i++){ +uint index_subc = ctx->componentMemory[ctx_index].subcomponents[i]; +if (index_subc != 0)release_memory_component(ctx,index_subc); +} +} + +void Num2Bits_2_create(uint soffset,uint coffset,Circom_CalcWit* ctx,std::string componentName,uint componentFather){ +ctx->componentMemory[coffset].templateId = 2; +ctx->componentMemory[coffset].templateName = "Num2Bits"; +ctx->componentMemory[coffset].signalStart = soffset; +ctx->componentMemory[coffset].inputCounter = 1; +ctx->componentMemory[coffset].componentName = componentName; +ctx->componentMemory[coffset].idFather = componentFather; +ctx->componentMemory[coffset].subcomponents = new uint[0]; +} + +void Num2Bits_2_run(uint ctx_index,Circom_CalcWit* ctx){ +FrElement* signalValues = ctx->signalValues; +u64 mySignalStart = ctx->componentMemory[ctx_index].signalStart; +std::string myTemplateName = ctx->componentMemory[ctx_index].templateName; +std::string myComponentName = ctx->componentMemory[ctx_index].componentName; +u64 myFather = ctx->componentMemory[ctx_index].idFather; +u64 myId = ctx_index; +u32* mySubcomponents = ctx->componentMemory[ctx_index].subcomponents; +bool* mySubcomponentsParallel = ctx->componentMemory[ctx_index].subcomponentsParallel; +FrElement* circuitConstants = ctx->circuitConstants; +std::string* listOfTemplateMessages = ctx->listOfTemplateMessages; +FrElement expaux[6]; +FrElement lvar[4]; +uint sub_component_aux; +uint index_multiple_eq; +{ +PFrElement aux_dest = &lvar[0]; +// load src +// end load src +Fr_copy(aux_dest,&circuitConstants[3]); +} +{ +PFrElement aux_dest = &lvar[1]; +// load src +// end load src +Fr_copy(aux_dest,&circuitConstants[1]); +} +{ +PFrElement aux_dest = &lvar[2]; +// load src +// end load src +Fr_copy(aux_dest,&circuitConstants[2]); +} +{ +PFrElement aux_dest = &lvar[3]; +// load src +// end load src +Fr_copy(aux_dest,&circuitConstants[1]); +} +Fr_lt(&expaux[0],&lvar[3],&circuitConstants[3]); // line circom 31 +while(Fr_isTrue(&expaux[0])){ +{ +PFrElement aux_dest = &signalValues[mySignalStart + ((1 * Fr_toInt(&lvar[3])) + 0)]; +// load src +Fr_shr(&expaux[1],&signalValues[mySignalStart + 21],&lvar[3]); // line circom 32 +Fr_band(&expaux[0],&expaux[1],&circuitConstants[2]); // line circom 32 +// end load src +Fr_copy(aux_dest,&expaux[0]); +} +Fr_sub(&expaux[3],&signalValues[mySignalStart + ((1 * Fr_toInt(&lvar[3])) + 0)],&circuitConstants[2]); // line circom 33 +Fr_mul(&expaux[1],&signalValues[mySignalStart + ((1 * Fr_toInt(&lvar[3])) + 0)],&expaux[3]); // line circom 33 +Fr_eq(&expaux[0],&expaux[1],&circuitConstants[1]); // line circom 33 +if (!Fr_isTrue(&expaux[0])) std::cout << "Failed assert in template/function " << myTemplateName << " line 33. " << "Followed trace of components: " << ctx->getTrace(myId) << std::endl; +assert(Fr_isTrue(&expaux[0])); +{ +PFrElement aux_dest = &lvar[1]; +// load src +Fr_mul(&expaux[2],&signalValues[mySignalStart + ((1 * Fr_toInt(&lvar[3])) + 0)],&lvar[2]); // line circom 34 +Fr_add(&expaux[0],&lvar[1],&expaux[2]); // line circom 34 +// end load src +Fr_copy(aux_dest,&expaux[0]); +} +{ +PFrElement aux_dest = &lvar[2]; +// load src +Fr_add(&expaux[0],&lvar[2],&lvar[2]); // line circom 35 +// end load src +Fr_copy(aux_dest,&expaux[0]); +} +{ +PFrElement aux_dest = &lvar[3]; +// load src +Fr_add(&expaux[0],&lvar[3],&circuitConstants[2]); // line circom 31 +// end load src +Fr_copy(aux_dest,&expaux[0]); +} +Fr_lt(&expaux[0],&lvar[3],&circuitConstants[3]); // line circom 31 +} +Fr_eq(&expaux[0],&lvar[1],&signalValues[mySignalStart + 21]); // line circom 38 +if (!Fr_isTrue(&expaux[0])) std::cout << "Failed assert in template/function " << myTemplateName << " line 38. " << "Followed trace of components: " << ctx->getTrace(myId) << std::endl; +assert(Fr_isTrue(&expaux[0])); +for (uint i = 0; i < 0; i++){ +uint index_subc = ctx->componentMemory[ctx_index].subcomponents[i]; +if (index_subc != 0)release_memory_component(ctx,index_subc); +} +} + +void LessThan_3_create(uint soffset,uint coffset,Circom_CalcWit* ctx,std::string componentName,uint componentFather){ +ctx->componentMemory[coffset].templateId = 3; +ctx->componentMemory[coffset].templateName = "LessThan"; +ctx->componentMemory[coffset].signalStart = soffset; +ctx->componentMemory[coffset].inputCounter = 2; +ctx->componentMemory[coffset].componentName = componentName; +ctx->componentMemory[coffset].idFather = componentFather; +ctx->componentMemory[coffset].subcomponents = new uint[1]{0}; +} + +void LessThan_3_run(uint ctx_index,Circom_CalcWit* ctx){ +FrElement* signalValues = ctx->signalValues; +u64 mySignalStart = ctx->componentMemory[ctx_index].signalStart; +std::string myTemplateName = ctx->componentMemory[ctx_index].templateName; +std::string myComponentName = ctx->componentMemory[ctx_index].componentName; +u64 myFather = ctx->componentMemory[ctx_index].idFather; +u64 myId = ctx_index; +u32* mySubcomponents = ctx->componentMemory[ctx_index].subcomponents; +bool* mySubcomponentsParallel = ctx->componentMemory[ctx_index].subcomponentsParallel; +FrElement* circuitConstants = ctx->circuitConstants; +std::string* listOfTemplateMessages = ctx->listOfTemplateMessages; +FrElement expaux[4]; +FrElement lvar[1]; +uint sub_component_aux; +uint index_multiple_eq; +{ +PFrElement aux_dest = &lvar[0]; +// load src +// end load src +Fr_copy(aux_dest,&circuitConstants[4]); +} +{ +uint aux_create = 0; +int aux_cmp_num = 0+ctx_index+1; +uint csoffset = mySignalStart+3; +for (uint i = 0; i < 1; i++) { +std::string new_cmp_name = "n2b"; +Num2Bits_2_create(csoffset,aux_cmp_num,ctx,new_cmp_name,myId); +mySubcomponents[aux_create+i] = aux_cmp_num; +csoffset += 22 ; +aux_cmp_num += 1; +} +} +if (!Fr_isTrue(&circuitConstants[2])) std::cout << "Failed assert in template/function " << myTemplateName << " line 90. " << "Followed trace of components: " << ctx->getTrace(myId) << std::endl; +assert(Fr_isTrue(&circuitConstants[2])); +{ +uint cmp_index_ref = 0; +{ +PFrElement aux_dest = &ctx->signalValues[ctx->componentMemory[mySubcomponents[cmp_index_ref]].signalStart + 21]; +// load src +Fr_add(&expaux[1],&signalValues[mySignalStart + 1],&circuitConstants[5]); // line circom 96 +Fr_sub(&expaux[0],&expaux[1],&signalValues[mySignalStart + 2]); // line circom 96 +// end load src +Fr_copy(aux_dest,&expaux[0]); +} +// need to run sub component +ctx->componentMemory[mySubcomponents[cmp_index_ref]].inputCounter -= 1; +assert(!(ctx->componentMemory[mySubcomponents[cmp_index_ref]].inputCounter)); +Num2Bits_2_run(mySubcomponents[cmp_index_ref],ctx); +} +{ +PFrElement aux_dest = &signalValues[mySignalStart + 0]; +// load src +Fr_sub(&expaux[0],&circuitConstants[2],&ctx->signalValues[ctx->componentMemory[mySubcomponents[0]].signalStart + 20]); // line circom 98 +// end load src +Fr_copy(aux_dest,&expaux[0]); +} +for (uint i = 0; i < 1; i++){ +uint index_subc = ctx->componentMemory[ctx_index].subcomponents[i]; +if (index_subc != 0)release_memory_component(ctx,index_subc); +} +} + +void MultiMux1_4_create(uint soffset,uint coffset,Circom_CalcWit* ctx,std::string componentName,uint componentFather){ +ctx->componentMemory[coffset].templateId = 4; +ctx->componentMemory[coffset].templateName = "MultiMux1"; +ctx->componentMemory[coffset].signalStart = soffset; +ctx->componentMemory[coffset].inputCounter = 3; +ctx->componentMemory[coffset].componentName = componentName; +ctx->componentMemory[coffset].idFather = componentFather; +ctx->componentMemory[coffset].subcomponents = new uint[0]; +} + +void MultiMux1_4_run(uint ctx_index,Circom_CalcWit* ctx){ +FrElement* signalValues = ctx->signalValues; +u64 mySignalStart = ctx->componentMemory[ctx_index].signalStart; +std::string myTemplateName = ctx->componentMemory[ctx_index].templateName; +std::string myComponentName = ctx->componentMemory[ctx_index].componentName; +u64 myFather = ctx->componentMemory[ctx_index].idFather; +u64 myId = ctx_index; +u32* mySubcomponents = ctx->componentMemory[ctx_index].subcomponents; +bool* mySubcomponentsParallel = ctx->componentMemory[ctx_index].subcomponentsParallel; +FrElement* circuitConstants = ctx->circuitConstants; +std::string* listOfTemplateMessages = ctx->listOfTemplateMessages; +FrElement expaux[5]; +FrElement lvar[2]; +uint sub_component_aux; +uint index_multiple_eq; +{ +PFrElement aux_dest = &lvar[0]; +// load src +// end load src +Fr_copy(aux_dest,&circuitConstants[2]); +} +{ +PFrElement aux_dest = &lvar[1]; +// load src +// end load src +Fr_copy(aux_dest,&circuitConstants[1]); +} +Fr_lt(&expaux[0],&lvar[1],&circuitConstants[2]); // line circom 26 +while(Fr_isTrue(&expaux[0])){ +{ +PFrElement aux_dest = &signalValues[mySignalStart + 0]; +// load src +Fr_sub(&expaux[2],&signalValues[mySignalStart + 2],&signalValues[mySignalStart + 1]); // line circom 28 +Fr_mul(&expaux[1],&expaux[2],&signalValues[mySignalStart + 3]); // line circom 28 +Fr_add(&expaux[0],&expaux[1],&signalValues[mySignalStart + 1]); // line circom 28 +// end load src +Fr_copy(aux_dest,&expaux[0]); +} +{ +PFrElement aux_dest = &lvar[1]; +// load src +// end load src +Fr_copy(aux_dest,&circuitConstants[2]); +} +Fr_lt(&expaux[0],&lvar[1],&circuitConstants[2]); // line circom 26 +} +for (uint i = 0; i < 0; i++){ +uint index_subc = ctx->componentMemory[ctx_index].subcomponents[i]; +if (index_subc != 0)release_memory_component(ctx,index_subc); +} +} + +void Mux1_5_create(uint soffset,uint coffset,Circom_CalcWit* ctx,std::string componentName,uint componentFather){ +ctx->componentMemory[coffset].templateId = 5; +ctx->componentMemory[coffset].templateName = "Mux1"; +ctx->componentMemory[coffset].signalStart = soffset; +ctx->componentMemory[coffset].inputCounter = 3; +ctx->componentMemory[coffset].componentName = componentName; +ctx->componentMemory[coffset].idFather = componentFather; +ctx->componentMemory[coffset].subcomponents = new uint[1]{0}; +} + +void Mux1_5_run(uint ctx_index,Circom_CalcWit* ctx){ +FrElement* signalValues = ctx->signalValues; +u64 mySignalStart = ctx->componentMemory[ctx_index].signalStart; +std::string myTemplateName = ctx->componentMemory[ctx_index].templateName; +std::string myComponentName = ctx->componentMemory[ctx_index].componentName; +u64 myFather = ctx->componentMemory[ctx_index].idFather; +u64 myId = ctx_index; +u32* mySubcomponents = ctx->componentMemory[ctx_index].subcomponents; +bool* mySubcomponentsParallel = ctx->componentMemory[ctx_index].subcomponentsParallel; +FrElement* circuitConstants = ctx->circuitConstants; +std::string* listOfTemplateMessages = ctx->listOfTemplateMessages; +FrElement expaux[3]; +FrElement lvar[1]; +uint sub_component_aux; +uint index_multiple_eq; +{ +uint aux_create = 0; +int aux_cmp_num = 0+ctx_index+1; +uint csoffset = mySignalStart+4; +for (uint i = 0; i < 1; i++) { +std::string new_cmp_name = "mux"; +MultiMux1_4_create(csoffset,aux_cmp_num,ctx,new_cmp_name,myId); +mySubcomponents[aux_create+i] = aux_cmp_num; +csoffset += 4 ; +aux_cmp_num += 1; +} +} +{ +PFrElement aux_dest = &lvar[0]; +// load src +// end load src +Fr_copy(aux_dest,&circuitConstants[1]); +} +{ +PFrElement aux_dest = &lvar[0]; +// load src +// end load src +Fr_copy(aux_dest,&circuitConstants[1]); +} +Fr_lt(&expaux[0],&lvar[0],&circuitConstants[0]); // line circom 41 +while(Fr_isTrue(&expaux[0])){ +{ +uint cmp_index_ref = 0; +{ +PFrElement aux_dest = &ctx->signalValues[ctx->componentMemory[mySubcomponents[cmp_index_ref]].signalStart + ((0 + (1 * Fr_toInt(&lvar[0]))) + 1)]; +// load src +// end load src +Fr_copy(aux_dest,&signalValues[mySignalStart + ((1 * Fr_toInt(&lvar[0])) + 1)]); +} +// no need to run sub component +ctx->componentMemory[mySubcomponents[cmp_index_ref]].inputCounter -= 1; +assert(ctx->componentMemory[mySubcomponents[cmp_index_ref]].inputCounter > 0); +} +{ +PFrElement aux_dest = &lvar[0]; +// load src +Fr_add(&expaux[0],&lvar[0],&circuitConstants[2]); // line circom 41 +// end load src +Fr_copy(aux_dest,&expaux[0]); +} +Fr_lt(&expaux[0],&lvar[0],&circuitConstants[0]); // line circom 41 +} +{ +uint cmp_index_ref = 0; +{ +PFrElement aux_dest = &ctx->signalValues[ctx->componentMemory[mySubcomponents[cmp_index_ref]].signalStart + 3]; +// load src +// end load src +Fr_copy(aux_dest,&signalValues[mySignalStart + 3]); +} +// need to run sub component +ctx->componentMemory[mySubcomponents[cmp_index_ref]].inputCounter -= 1; +assert(!(ctx->componentMemory[mySubcomponents[cmp_index_ref]].inputCounter)); +MultiMux1_4_run(mySubcomponents[cmp_index_ref],ctx); +} +{ +PFrElement aux_dest = &signalValues[mySignalStart + 0]; +// load src +// end load src +Fr_copy(aux_dest,&ctx->signalValues[ctx->componentMemory[mySubcomponents[0]].signalStart + 0]); +} +for (uint i = 0; i < 1; i++){ +uint index_subc = ctx->componentMemory[ctx_index].subcomponents[i]; +if (index_subc != 0)release_memory_component(ctx,index_subc); +} +} + +void AbsoluteValueSubtraction_6_create(uint soffset,uint coffset,Circom_CalcWit* ctx,std::string componentName,uint componentFather){ +ctx->componentMemory[coffset].templateId = 6; +ctx->componentMemory[coffset].templateName = "AbsoluteValueSubtraction"; +ctx->componentMemory[coffset].signalStart = soffset; +ctx->componentMemory[coffset].inputCounter = 2; +ctx->componentMemory[coffset].componentName = componentName; +ctx->componentMemory[coffset].idFather = componentFather; +ctx->componentMemory[coffset].subcomponents = new uint[4]{0}; +} + +void AbsoluteValueSubtraction_6_run(uint ctx_index,Circom_CalcWit* ctx){ +FrElement* signalValues = ctx->signalValues; +u64 mySignalStart = ctx->componentMemory[ctx_index].signalStart; +std::string myTemplateName = ctx->componentMemory[ctx_index].templateName; +std::string myComponentName = ctx->componentMemory[ctx_index].componentName; +u64 myFather = ctx->componentMemory[ctx_index].idFather; +u64 myId = ctx_index; +u32* mySubcomponents = ctx->componentMemory[ctx_index].subcomponents; +bool* mySubcomponentsParallel = ctx->componentMemory[ctx_index].subcomponentsParallel; +FrElement* circuitConstants = ctx->circuitConstants; +std::string* listOfTemplateMessages = ctx->listOfTemplateMessages; +FrElement expaux[3]; +FrElement lvar[1]; +uint sub_component_aux; +uint index_multiple_eq; +{ +PFrElement aux_dest = &lvar[0]; +// load src +// end load src +Fr_copy(aux_dest,&circuitConstants[4]); +} +{ +uint aux_create = 0; +int aux_cmp_num = 1+ctx_index+1; +uint csoffset = mySignalStart+9; +for (uint i = 0; i < 1; i++) { +std::string new_cmp_name = "lessThan"; +LessThan_3_create(csoffset,aux_cmp_num,ctx,new_cmp_name,myId); +mySubcomponents[aux_create+i] = aux_cmp_num; +csoffset += 25 ; +aux_cmp_num += 2; +} +} +{ +uint aux_create = 1; +int aux_cmp_num = 3+ctx_index+1; +uint csoffset = mySignalStart+34; +for (uint i = 0; i < 1; i++) { +std::string new_cmp_name = "myMux"; +Mux1_5_create(csoffset,aux_cmp_num,ctx,new_cmp_name,myId); +mySubcomponents[aux_create+i] = aux_cmp_num; +csoffset += 8 ; +aux_cmp_num += 2; +} +} +{ +uint aux_create = 2; +int aux_cmp_num = 0+ctx_index+1; +uint csoffset = mySignalStart+6; +for (uint i = 0; i < 1; i++) { +std::string new_cmp_name = "isZero"; +IsZero_1_create(csoffset,aux_cmp_num,ctx,new_cmp_name,myId); +mySubcomponents[aux_create+i] = aux_cmp_num; +csoffset += 3 ; +aux_cmp_num += 1; +} +} +{ +uint aux_create = 3; +int aux_cmp_num = 5+ctx_index+1; +uint csoffset = mySignalStart+42; +for (uint i = 0; i < 1; i++) { +std::string new_cmp_name = "myMux2"; +Mux1_5_create(csoffset,aux_cmp_num,ctx,new_cmp_name,myId); +mySubcomponents[aux_create+i] = aux_cmp_num; +csoffset += 8 ; +aux_cmp_num += 2; +} +} +{ +uint cmp_index_ref = 0; +{ +PFrElement aux_dest = &ctx->signalValues[ctx->componentMemory[mySubcomponents[cmp_index_ref]].signalStart + 1]; +// load src +// end load src +Fr_copy(aux_dest,&signalValues[mySignalStart + 1]); +} +// no need to run sub component +ctx->componentMemory[mySubcomponents[cmp_index_ref]].inputCounter -= 1; +assert(ctx->componentMemory[mySubcomponents[cmp_index_ref]].inputCounter > 0); +} +{ +uint cmp_index_ref = 0; +{ +PFrElement aux_dest = &ctx->signalValues[ctx->componentMemory[mySubcomponents[cmp_index_ref]].signalStart + 2]; +// load src +// end load src +Fr_copy(aux_dest,&signalValues[mySignalStart + 2]); +} +// need to run sub component +ctx->componentMemory[mySubcomponents[cmp_index_ref]].inputCounter -= 1; +assert(!(ctx->componentMemory[mySubcomponents[cmp_index_ref]].inputCounter)); +LessThan_3_run(mySubcomponents[cmp_index_ref],ctx); +} +{ +PFrElement aux_dest = &signalValues[mySignalStart + 3]; +// load src +// end load src +Fr_copy(aux_dest,&ctx->signalValues[ctx->componentMemory[mySubcomponents[0]].signalStart + 0]); +} +{ +uint cmp_index_ref = 1; +{ +PFrElement aux_dest = &ctx->signalValues[ctx->componentMemory[mySubcomponents[cmp_index_ref]].signalStart + 1]; +// load src +// end load src +Fr_copy(aux_dest,&signalValues[mySignalStart + 1]); +} +// no need to run sub component +ctx->componentMemory[mySubcomponents[cmp_index_ref]].inputCounter -= 1; +assert(ctx->componentMemory[mySubcomponents[cmp_index_ref]].inputCounter > 0); +} +{ +uint cmp_index_ref = 1; +{ +PFrElement aux_dest = &ctx->signalValues[ctx->componentMemory[mySubcomponents[cmp_index_ref]].signalStart + 2]; +// load src +// end load src +Fr_copy(aux_dest,&signalValues[mySignalStart + 2]); +} +// no need to run sub component +ctx->componentMemory[mySubcomponents[cmp_index_ref]].inputCounter -= 1; +assert(ctx->componentMemory[mySubcomponents[cmp_index_ref]].inputCounter > 0); +} +{ +uint cmp_index_ref = 1; +{ +PFrElement aux_dest = &ctx->signalValues[ctx->componentMemory[mySubcomponents[cmp_index_ref]].signalStart + 3]; +// load src +// end load src +Fr_copy(aux_dest,&signalValues[mySignalStart + 3]); +} +// need to run sub component +ctx->componentMemory[mySubcomponents[cmp_index_ref]].inputCounter -= 1; +assert(!(ctx->componentMemory[mySubcomponents[cmp_index_ref]].inputCounter)); +Mux1_5_run(mySubcomponents[cmp_index_ref],ctx); +} +{ +PFrElement aux_dest = &signalValues[mySignalStart + 4]; +// load src +// end load src +Fr_copy(aux_dest,&ctx->signalValues[ctx->componentMemory[mySubcomponents[1]].signalStart + 0]); +} +{ +uint cmp_index_ref = 2; +{ +PFrElement aux_dest = &ctx->signalValues[ctx->componentMemory[mySubcomponents[cmp_index_ref]].signalStart + 1]; +// load src +Fr_sub(&expaux[0],&signalValues[mySignalStart + 4],&signalValues[mySignalStart + 1]); // line circom 220 +// end load src +Fr_copy(aux_dest,&expaux[0]); +} +// need to run sub component +ctx->componentMemory[mySubcomponents[cmp_index_ref]].inputCounter -= 1; +assert(!(ctx->componentMemory[mySubcomponents[cmp_index_ref]].inputCounter)); +IsZero_1_run(mySubcomponents[cmp_index_ref],ctx); +} +{ +uint cmp_index_ref = 3; +{ +PFrElement aux_dest = &ctx->signalValues[ctx->componentMemory[mySubcomponents[cmp_index_ref]].signalStart + 1]; +// load src +// end load src +Fr_copy(aux_dest,&signalValues[mySignalStart + 1]); +} +// no need to run sub component +ctx->componentMemory[mySubcomponents[cmp_index_ref]].inputCounter -= 1; +assert(ctx->componentMemory[mySubcomponents[cmp_index_ref]].inputCounter > 0); +} +{ +uint cmp_index_ref = 3; +{ +PFrElement aux_dest = &ctx->signalValues[ctx->componentMemory[mySubcomponents[cmp_index_ref]].signalStart + 2]; +// load src +// end load src +Fr_copy(aux_dest,&signalValues[mySignalStart + 2]); +} +// no need to run sub component +ctx->componentMemory[mySubcomponents[cmp_index_ref]].inputCounter -= 1; +assert(ctx->componentMemory[mySubcomponents[cmp_index_ref]].inputCounter > 0); +} +{ +uint cmp_index_ref = 3; +{ +PFrElement aux_dest = &ctx->signalValues[ctx->componentMemory[mySubcomponents[cmp_index_ref]].signalStart + 3]; +// load src +// end load src +Fr_copy(aux_dest,&ctx->signalValues[ctx->componentMemory[mySubcomponents[2]].signalStart + 0]); +} +// need to run sub component +ctx->componentMemory[mySubcomponents[cmp_index_ref]].inputCounter -= 1; +assert(!(ctx->componentMemory[mySubcomponents[cmp_index_ref]].inputCounter)); +Mux1_5_run(mySubcomponents[cmp_index_ref],ctx); +} +{ +PFrElement aux_dest = &signalValues[mySignalStart + 5]; +// load src +// end load src +Fr_copy(aux_dest,&ctx->signalValues[ctx->componentMemory[mySubcomponents[3]].signalStart + 0]); +} +{ +PFrElement aux_dest = &signalValues[mySignalStart + 0]; +// load src +Fr_sub(&expaux[0],&signalValues[mySignalStart + 4],&signalValues[mySignalStart + 5]); // line circom 228 +// end load src +Fr_copy(aux_dest,&expaux[0]); +} +for (uint i = 0; i < 4; i++){ +uint index_subc = ctx->componentMemory[ctx_index].subcomponents[i]; +if (index_subc != 0)release_memory_component(ctx,index_subc); +} +} + +void Num2Bits_7_create(uint soffset,uint coffset,Circom_CalcWit* ctx,std::string componentName,uint componentFather){ +ctx->componentMemory[coffset].templateId = 7; +ctx->componentMemory[coffset].templateName = "Num2Bits"; +ctx->componentMemory[coffset].signalStart = soffset; +ctx->componentMemory[coffset].inputCounter = 1; +ctx->componentMemory[coffset].componentName = componentName; +ctx->componentMemory[coffset].idFather = componentFather; +ctx->componentMemory[coffset].subcomponents = new uint[0]; +} + +void Num2Bits_7_run(uint ctx_index,Circom_CalcWit* ctx){ +FrElement* signalValues = ctx->signalValues; +u64 mySignalStart = ctx->componentMemory[ctx_index].signalStart; +std::string myTemplateName = ctx->componentMemory[ctx_index].templateName; +std::string myComponentName = ctx->componentMemory[ctx_index].componentName; +u64 myFather = ctx->componentMemory[ctx_index].idFather; +u64 myId = ctx_index; +u32* mySubcomponents = ctx->componentMemory[ctx_index].subcomponents; +bool* mySubcomponentsParallel = ctx->componentMemory[ctx_index].subcomponentsParallel; +FrElement* circuitConstants = ctx->circuitConstants; +std::string* listOfTemplateMessages = ctx->listOfTemplateMessages; +FrElement expaux[6]; +FrElement lvar[4]; +uint sub_component_aux; +uint index_multiple_eq; +{ +PFrElement aux_dest = &lvar[0]; +// load src +// end load src +Fr_copy(aux_dest,&circuitConstants[6]); +} +{ +PFrElement aux_dest = &lvar[1]; +// load src +// end load src +Fr_copy(aux_dest,&circuitConstants[1]); +} +{ +PFrElement aux_dest = &lvar[2]; +// load src +// end load src +Fr_copy(aux_dest,&circuitConstants[2]); +} +{ +PFrElement aux_dest = &lvar[3]; +// load src +// end load src +Fr_copy(aux_dest,&circuitConstants[1]); +} +Fr_lt(&expaux[0],&lvar[3],&circuitConstants[6]); // line circom 31 +while(Fr_isTrue(&expaux[0])){ +{ +PFrElement aux_dest = &signalValues[mySignalStart + ((1 * Fr_toInt(&lvar[3])) + 0)]; +// load src +Fr_shr(&expaux[1],&signalValues[mySignalStart + 42],&lvar[3]); // line circom 32 +Fr_band(&expaux[0],&expaux[1],&circuitConstants[2]); // line circom 32 +// end load src +Fr_copy(aux_dest,&expaux[0]); +} +Fr_sub(&expaux[3],&signalValues[mySignalStart + ((1 * Fr_toInt(&lvar[3])) + 0)],&circuitConstants[2]); // line circom 33 +Fr_mul(&expaux[1],&signalValues[mySignalStart + ((1 * Fr_toInt(&lvar[3])) + 0)],&expaux[3]); // line circom 33 +Fr_eq(&expaux[0],&expaux[1],&circuitConstants[1]); // line circom 33 +if (!Fr_isTrue(&expaux[0])) std::cout << "Failed assert in template/function " << myTemplateName << " line 33. " << "Followed trace of components: " << ctx->getTrace(myId) << std::endl; +assert(Fr_isTrue(&expaux[0])); +{ +PFrElement aux_dest = &lvar[1]; +// load src +Fr_mul(&expaux[2],&signalValues[mySignalStart + ((1 * Fr_toInt(&lvar[3])) + 0)],&lvar[2]); // line circom 34 +Fr_add(&expaux[0],&lvar[1],&expaux[2]); // line circom 34 +// end load src +Fr_copy(aux_dest,&expaux[0]); +} +{ +PFrElement aux_dest = &lvar[2]; +// load src +Fr_add(&expaux[0],&lvar[2],&lvar[2]); // line circom 35 +// end load src +Fr_copy(aux_dest,&expaux[0]); +} +{ +PFrElement aux_dest = &lvar[3]; +// load src +Fr_add(&expaux[0],&lvar[3],&circuitConstants[2]); // line circom 31 +// end load src +Fr_copy(aux_dest,&expaux[0]); +} +Fr_lt(&expaux[0],&lvar[3],&circuitConstants[6]); // line circom 31 +} +Fr_eq(&expaux[0],&lvar[1],&signalValues[mySignalStart + 42]); // line circom 38 +if (!Fr_isTrue(&expaux[0])) std::cout << "Failed assert in template/function " << myTemplateName << " line 38. " << "Followed trace of components: " << ctx->getTrace(myId) << std::endl; +assert(Fr_isTrue(&expaux[0])); +for (uint i = 0; i < 0; i++){ +uint index_subc = ctx->componentMemory[ctx_index].subcomponents[i]; +if (index_subc != 0)release_memory_component(ctx,index_subc); +} +} + +void LessThan_8_create(uint soffset,uint coffset,Circom_CalcWit* ctx,std::string componentName,uint componentFather){ +ctx->componentMemory[coffset].templateId = 8; +ctx->componentMemory[coffset].templateName = "LessThan"; +ctx->componentMemory[coffset].signalStart = soffset; +ctx->componentMemory[coffset].inputCounter = 2; +ctx->componentMemory[coffset].componentName = componentName; +ctx->componentMemory[coffset].idFather = componentFather; +ctx->componentMemory[coffset].subcomponents = new uint[1]{0}; +} + +void LessThan_8_run(uint ctx_index,Circom_CalcWit* ctx){ +FrElement* signalValues = ctx->signalValues; +u64 mySignalStart = ctx->componentMemory[ctx_index].signalStart; +std::string myTemplateName = ctx->componentMemory[ctx_index].templateName; +std::string myComponentName = ctx->componentMemory[ctx_index].componentName; +u64 myFather = ctx->componentMemory[ctx_index].idFather; +u64 myId = ctx_index; +u32* mySubcomponents = ctx->componentMemory[ctx_index].subcomponents; +bool* mySubcomponentsParallel = ctx->componentMemory[ctx_index].subcomponentsParallel; +FrElement* circuitConstants = ctx->circuitConstants; +std::string* listOfTemplateMessages = ctx->listOfTemplateMessages; +FrElement expaux[4]; +FrElement lvar[1]; +uint sub_component_aux; +uint index_multiple_eq; +{ +PFrElement aux_dest = &lvar[0]; +// load src +// end load src +Fr_copy(aux_dest,&circuitConstants[7]); +} +{ +uint aux_create = 0; +int aux_cmp_num = 0+ctx_index+1; +uint csoffset = mySignalStart+3; +for (uint i = 0; i < 1; i++) { +std::string new_cmp_name = "n2b"; +Num2Bits_7_create(csoffset,aux_cmp_num,ctx,new_cmp_name,myId); +mySubcomponents[aux_create+i] = aux_cmp_num; +csoffset += 43 ; +aux_cmp_num += 1; +} +} +if (!Fr_isTrue(&circuitConstants[2])) std::cout << "Failed assert in template/function " << myTemplateName << " line 90. " << "Followed trace of components: " << ctx->getTrace(myId) << std::endl; +assert(Fr_isTrue(&circuitConstants[2])); +{ +uint cmp_index_ref = 0; +{ +PFrElement aux_dest = &ctx->signalValues[ctx->componentMemory[mySubcomponents[cmp_index_ref]].signalStart + 42]; +// load src +Fr_add(&expaux[1],&signalValues[mySignalStart + 1],&circuitConstants[8]); // line circom 96 +Fr_sub(&expaux[0],&expaux[1],&signalValues[mySignalStart + 2]); // line circom 96 +// end load src +Fr_copy(aux_dest,&expaux[0]); +} +// need to run sub component +ctx->componentMemory[mySubcomponents[cmp_index_ref]].inputCounter -= 1; +assert(!(ctx->componentMemory[mySubcomponents[cmp_index_ref]].inputCounter)); +Num2Bits_7_run(mySubcomponents[cmp_index_ref],ctx); +} +{ +PFrElement aux_dest = &signalValues[mySignalStart + 0]; +// load src +Fr_sub(&expaux[0],&circuitConstants[2],&ctx->signalValues[ctx->componentMemory[mySubcomponents[0]].signalStart + 41]); // line circom 98 +// end load src +Fr_copy(aux_dest,&expaux[0]); +} +for (uint i = 0; i < 1; i++){ +uint index_subc = ctx->componentMemory[ctx_index].subcomponents[i]; +if (index_subc != 0)release_memory_component(ctx,index_subc); +} +} + +void XOR_9_create(uint soffset,uint coffset,Circom_CalcWit* ctx,std::string componentName,uint componentFather){ +ctx->componentMemory[coffset].templateId = 9; +ctx->componentMemory[coffset].templateName = "XOR"; +ctx->componentMemory[coffset].signalStart = soffset; +ctx->componentMemory[coffset].inputCounter = 2; +ctx->componentMemory[coffset].componentName = componentName; +ctx->componentMemory[coffset].idFather = componentFather; +ctx->componentMemory[coffset].subcomponents = new uint[0]; +} + +void XOR_9_run(uint ctx_index,Circom_CalcWit* ctx){ +FrElement* signalValues = ctx->signalValues; +u64 mySignalStart = ctx->componentMemory[ctx_index].signalStart; +std::string myTemplateName = ctx->componentMemory[ctx_index].templateName; +std::string myComponentName = ctx->componentMemory[ctx_index].componentName; +u64 myFather = ctx->componentMemory[ctx_index].idFather; +u64 myId = ctx_index; +u32* mySubcomponents = ctx->componentMemory[ctx_index].subcomponents; +bool* mySubcomponentsParallel = ctx->componentMemory[ctx_index].subcomponentsParallel; +FrElement* circuitConstants = ctx->circuitConstants; +std::string* listOfTemplateMessages = ctx->listOfTemplateMessages; +FrElement expaux[6]; +FrElement lvar[0]; +uint sub_component_aux; +uint index_multiple_eq; +{ +PFrElement aux_dest = &signalValues[mySignalStart + 0]; +// load src +Fr_add(&expaux[1],&signalValues[mySignalStart + 1],&signalValues[mySignalStart + 2]); // line circom 26 +Fr_mul(&expaux[3],&circuitConstants[0],&signalValues[mySignalStart + 1]); // line circom 26 +Fr_mul(&expaux[2],&expaux[3],&signalValues[mySignalStart + 2]); // line circom 26 +Fr_sub(&expaux[0],&expaux[1],&expaux[2]); // line circom 26 +// end load src +Fr_copy(aux_dest,&expaux[0]); +} +for (uint i = 0; i < 0; i++){ +uint index_subc = ctx->componentMemory[ctx_index].subcomponents[i]; +if (index_subc != 0)release_memory_component(ctx,index_subc); +} +} + +void OR_10_create(uint soffset,uint coffset,Circom_CalcWit* ctx,std::string componentName,uint componentFather){ +ctx->componentMemory[coffset].templateId = 10; +ctx->componentMemory[coffset].templateName = "OR"; +ctx->componentMemory[coffset].signalStart = soffset; +ctx->componentMemory[coffset].inputCounter = 2; +ctx->componentMemory[coffset].componentName = componentName; +ctx->componentMemory[coffset].idFather = componentFather; +ctx->componentMemory[coffset].subcomponents = new uint[0]; +} + +void OR_10_run(uint ctx_index,Circom_CalcWit* ctx){ +FrElement* signalValues = ctx->signalValues; +u64 mySignalStart = ctx->componentMemory[ctx_index].signalStart; +std::string myTemplateName = ctx->componentMemory[ctx_index].templateName; +std::string myComponentName = ctx->componentMemory[ctx_index].componentName; +u64 myFather = ctx->componentMemory[ctx_index].idFather; +u64 myId = ctx_index; +u32* mySubcomponents = ctx->componentMemory[ctx_index].subcomponents; +bool* mySubcomponentsParallel = ctx->componentMemory[ctx_index].subcomponentsParallel; +FrElement* circuitConstants = ctx->circuitConstants; +std::string* listOfTemplateMessages = ctx->listOfTemplateMessages; +FrElement expaux[5]; +FrElement lvar[0]; +uint sub_component_aux; +uint index_multiple_eq; +{ +PFrElement aux_dest = &signalValues[mySignalStart + 0]; +// load src +Fr_add(&expaux[1],&signalValues[mySignalStart + 1],&signalValues[mySignalStart + 2]); // line circom 42 +Fr_mul(&expaux[2],&signalValues[mySignalStart + 1],&signalValues[mySignalStart + 2]); // line circom 42 +Fr_sub(&expaux[0],&expaux[1],&expaux[2]); // line circom 42 +// end load src +Fr_copy(aux_dest,&expaux[0]); +} +for (uint i = 0; i < 0; i++){ +uint index_subc = ctx->componentMemory[ctx_index].subcomponents[i]; +if (index_subc != 0)release_memory_component(ctx,index_subc); +} +} + +void Num2Bits_11_create(uint soffset,uint coffset,Circom_CalcWit* ctx,std::string componentName,uint componentFather){ +ctx->componentMemory[coffset].templateId = 11; +ctx->componentMemory[coffset].templateName = "Num2Bits"; +ctx->componentMemory[coffset].signalStart = soffset; +ctx->componentMemory[coffset].inputCounter = 1; +ctx->componentMemory[coffset].componentName = componentName; +ctx->componentMemory[coffset].idFather = componentFather; +ctx->componentMemory[coffset].subcomponents = new uint[0]; +} + +void Num2Bits_11_run(uint ctx_index,Circom_CalcWit* ctx){ +FrElement* signalValues = ctx->signalValues; +u64 mySignalStart = ctx->componentMemory[ctx_index].signalStart; +std::string myTemplateName = ctx->componentMemory[ctx_index].templateName; +std::string myComponentName = ctx->componentMemory[ctx_index].componentName; +u64 myFather = ctx->componentMemory[ctx_index].idFather; +u64 myId = ctx_index; +u32* mySubcomponents = ctx->componentMemory[ctx_index].subcomponents; +bool* mySubcomponentsParallel = ctx->componentMemory[ctx_index].subcomponentsParallel; +FrElement* circuitConstants = ctx->circuitConstants; +std::string* listOfTemplateMessages = ctx->listOfTemplateMessages; +FrElement expaux[6]; +FrElement lvar[4]; +uint sub_component_aux; +uint index_multiple_eq; +{ +PFrElement aux_dest = &lvar[0]; +// load src +// end load src +Fr_copy(aux_dest,&circuitConstants[9]); +} +{ +PFrElement aux_dest = &lvar[1]; +// load src +// end load src +Fr_copy(aux_dest,&circuitConstants[1]); +} +{ +PFrElement aux_dest = &lvar[2]; +// load src +// end load src +Fr_copy(aux_dest,&circuitConstants[2]); +} +{ +PFrElement aux_dest = &lvar[3]; +// load src +// end load src +Fr_copy(aux_dest,&circuitConstants[1]); +} +Fr_lt(&expaux[0],&lvar[3],&circuitConstants[9]); // line circom 31 +while(Fr_isTrue(&expaux[0])){ +{ +PFrElement aux_dest = &signalValues[mySignalStart + ((1 * Fr_toInt(&lvar[3])) + 0)]; +// load src +Fr_shr(&expaux[1],&signalValues[mySignalStart + 23],&lvar[3]); // line circom 32 +Fr_band(&expaux[0],&expaux[1],&circuitConstants[2]); // line circom 32 +// end load src +Fr_copy(aux_dest,&expaux[0]); +} +Fr_sub(&expaux[3],&signalValues[mySignalStart + ((1 * Fr_toInt(&lvar[3])) + 0)],&circuitConstants[2]); // line circom 33 +Fr_mul(&expaux[1],&signalValues[mySignalStart + ((1 * Fr_toInt(&lvar[3])) + 0)],&expaux[3]); // line circom 33 +Fr_eq(&expaux[0],&expaux[1],&circuitConstants[1]); // line circom 33 +if (!Fr_isTrue(&expaux[0])) std::cout << "Failed assert in template/function " << myTemplateName << " line 33. " << "Followed trace of components: " << ctx->getTrace(myId) << std::endl; +assert(Fr_isTrue(&expaux[0])); +{ +PFrElement aux_dest = &lvar[1]; +// load src +Fr_mul(&expaux[2],&signalValues[mySignalStart + ((1 * Fr_toInt(&lvar[3])) + 0)],&lvar[2]); // line circom 34 +Fr_add(&expaux[0],&lvar[1],&expaux[2]); // line circom 34 +// end load src +Fr_copy(aux_dest,&expaux[0]); +} +{ +PFrElement aux_dest = &lvar[2]; +// load src +Fr_add(&expaux[0],&lvar[2],&lvar[2]); // line circom 35 +// end load src +Fr_copy(aux_dest,&expaux[0]); +} +{ +PFrElement aux_dest = &lvar[3]; +// load src +Fr_add(&expaux[0],&lvar[3],&circuitConstants[2]); // line circom 31 +// end load src +Fr_copy(aux_dest,&expaux[0]); +} +Fr_lt(&expaux[0],&lvar[3],&circuitConstants[9]); // line circom 31 +} +Fr_eq(&expaux[0],&lvar[1],&signalValues[mySignalStart + 23]); // line circom 38 +if (!Fr_isTrue(&expaux[0])) std::cout << "Failed assert in template/function " << myTemplateName << " line 38. " << "Followed trace of components: " << ctx->getTrace(myId) << std::endl; +assert(Fr_isTrue(&expaux[0])); +for (uint i = 0; i < 0; i++){ +uint index_subc = ctx->componentMemory[ctx_index].subcomponents[i]; +if (index_subc != 0)release_memory_component(ctx,index_subc); +} +} + +void LessThan_12_create(uint soffset,uint coffset,Circom_CalcWit* ctx,std::string componentName,uint componentFather){ +ctx->componentMemory[coffset].templateId = 12; +ctx->componentMemory[coffset].templateName = "LessThan"; +ctx->componentMemory[coffset].signalStart = soffset; +ctx->componentMemory[coffset].inputCounter = 2; +ctx->componentMemory[coffset].componentName = componentName; +ctx->componentMemory[coffset].idFather = componentFather; +ctx->componentMemory[coffset].subcomponents = new uint[1]{0}; +} + +void LessThan_12_run(uint ctx_index,Circom_CalcWit* ctx){ +FrElement* signalValues = ctx->signalValues; +u64 mySignalStart = ctx->componentMemory[ctx_index].signalStart; +std::string myTemplateName = ctx->componentMemory[ctx_index].templateName; +std::string myComponentName = ctx->componentMemory[ctx_index].componentName; +u64 myFather = ctx->componentMemory[ctx_index].idFather; +u64 myId = ctx_index; +u32* mySubcomponents = ctx->componentMemory[ctx_index].subcomponents; +bool* mySubcomponentsParallel = ctx->componentMemory[ctx_index].subcomponentsParallel; +FrElement* circuitConstants = ctx->circuitConstants; +std::string* listOfTemplateMessages = ctx->listOfTemplateMessages; +FrElement expaux[4]; +FrElement lvar[1]; +uint sub_component_aux; +uint index_multiple_eq; +{ +PFrElement aux_dest = &lvar[0]; +// load src +// end load src +Fr_copy(aux_dest,&circuitConstants[10]); +} +{ +uint aux_create = 0; +int aux_cmp_num = 0+ctx_index+1; +uint csoffset = mySignalStart+3; +for (uint i = 0; i < 1; i++) { +std::string new_cmp_name = "n2b"; +Num2Bits_11_create(csoffset,aux_cmp_num,ctx,new_cmp_name,myId); +mySubcomponents[aux_create+i] = aux_cmp_num; +csoffset += 24 ; +aux_cmp_num += 1; +} +} +if (!Fr_isTrue(&circuitConstants[2])) std::cout << "Failed assert in template/function " << myTemplateName << " line 90. " << "Followed trace of components: " << ctx->getTrace(myId) << std::endl; +assert(Fr_isTrue(&circuitConstants[2])); +{ +uint cmp_index_ref = 0; +{ +PFrElement aux_dest = &ctx->signalValues[ctx->componentMemory[mySubcomponents[cmp_index_ref]].signalStart + 23]; +// load src +Fr_add(&expaux[1],&signalValues[mySignalStart + 1],&circuitConstants[11]); // line circom 96 +Fr_sub(&expaux[0],&expaux[1],&signalValues[mySignalStart + 2]); // line circom 96 +// end load src +Fr_copy(aux_dest,&expaux[0]); +} +// need to run sub component +ctx->componentMemory[mySubcomponents[cmp_index_ref]].inputCounter -= 1; +assert(!(ctx->componentMemory[mySubcomponents[cmp_index_ref]].inputCounter)); +Num2Bits_11_run(mySubcomponents[cmp_index_ref],ctx); +} +{ +PFrElement aux_dest = &signalValues[mySignalStart + 0]; +// load src +Fr_sub(&expaux[0],&circuitConstants[2],&ctx->signalValues[ctx->componentMemory[mySubcomponents[0]].signalStart + 22]); // line circom 98 +// end load src +Fr_copy(aux_dest,&expaux[0]); +} +for (uint i = 0; i < 1; i++){ +uint index_subc = ctx->componentMemory[ctx_index].subcomponents[i]; +if (index_subc != 0)release_memory_component(ctx,index_subc); +} +} + +void LessEqThan_13_create(uint soffset,uint coffset,Circom_CalcWit* ctx,std::string componentName,uint componentFather){ +ctx->componentMemory[coffset].templateId = 13; +ctx->componentMemory[coffset].templateName = "LessEqThan"; +ctx->componentMemory[coffset].signalStart = soffset; +ctx->componentMemory[coffset].inputCounter = 2; +ctx->componentMemory[coffset].componentName = componentName; +ctx->componentMemory[coffset].idFather = componentFather; +ctx->componentMemory[coffset].subcomponents = new uint[1]{0}; +} + +void LessEqThan_13_run(uint ctx_index,Circom_CalcWit* ctx){ +FrElement* signalValues = ctx->signalValues; +u64 mySignalStart = ctx->componentMemory[ctx_index].signalStart; +std::string myTemplateName = ctx->componentMemory[ctx_index].templateName; +std::string myComponentName = ctx->componentMemory[ctx_index].componentName; +u64 myFather = ctx->componentMemory[ctx_index].idFather; +u64 myId = ctx_index; +u32* mySubcomponents = ctx->componentMemory[ctx_index].subcomponents; +bool* mySubcomponentsParallel = ctx->componentMemory[ctx_index].subcomponentsParallel; +FrElement* circuitConstants = ctx->circuitConstants; +std::string* listOfTemplateMessages = ctx->listOfTemplateMessages; +FrElement expaux[3]; +FrElement lvar[1]; +uint sub_component_aux; +uint index_multiple_eq; +{ +PFrElement aux_dest = &lvar[0]; +// load src +// end load src +Fr_copy(aux_dest,&circuitConstants[10]); +} +{ +uint aux_create = 0; +int aux_cmp_num = 0+ctx_index+1; +uint csoffset = mySignalStart+3; +for (uint i = 0; i < 1; i++) { +std::string new_cmp_name = "lt"; +LessThan_12_create(csoffset,aux_cmp_num,ctx,new_cmp_name,myId); +mySubcomponents[aux_create+i] = aux_cmp_num; +csoffset += 27 ; +aux_cmp_num += 2; +} +} +{ +uint cmp_index_ref = 0; +{ +PFrElement aux_dest = &ctx->signalValues[ctx->componentMemory[mySubcomponents[cmp_index_ref]].signalStart + 1]; +// load src +// end load src +Fr_copy(aux_dest,&signalValues[mySignalStart + 1]); +} +// no need to run sub component +ctx->componentMemory[mySubcomponents[cmp_index_ref]].inputCounter -= 1; +assert(ctx->componentMemory[mySubcomponents[cmp_index_ref]].inputCounter > 0); +} +{ +uint cmp_index_ref = 0; +{ +PFrElement aux_dest = &ctx->signalValues[ctx->componentMemory[mySubcomponents[cmp_index_ref]].signalStart + 2]; +// load src +Fr_add(&expaux[0],&signalValues[mySignalStart + 2],&circuitConstants[2]); // line circom 112 +// end load src +Fr_copy(aux_dest,&expaux[0]); +} +// need to run sub component +ctx->componentMemory[mySubcomponents[cmp_index_ref]].inputCounter -= 1; +assert(!(ctx->componentMemory[mySubcomponents[cmp_index_ref]].inputCounter)); +LessThan_12_run(mySubcomponents[cmp_index_ref],ctx); +} +{ +PFrElement aux_dest = &signalValues[mySignalStart + 0]; +// load src +// end load src +Fr_copy(aux_dest,&ctx->signalValues[ctx->componentMemory[mySubcomponents[0]].signalStart + 0]); +} +for (uint i = 0; i < 1; i++){ +uint index_subc = ctx->componentMemory[ctx_index].subcomponents[i]; +if (index_subc != 0)release_memory_component(ctx,index_subc); +} +} + +void Sqrt_14_create(uint soffset,uint coffset,Circom_CalcWit* ctx,std::string componentName,uint componentFather){ +ctx->componentMemory[coffset].templateId = 14; +ctx->componentMemory[coffset].templateName = "Sqrt"; +ctx->componentMemory[coffset].signalStart = soffset; +ctx->componentMemory[coffset].inputCounter = 1; +ctx->componentMemory[coffset].componentName = componentName; +ctx->componentMemory[coffset].idFather = componentFather; +ctx->componentMemory[coffset].subcomponents = new uint[8]{0}; +} + +void Sqrt_14_run(uint ctx_index,Circom_CalcWit* ctx){ +FrElement* signalValues = ctx->signalValues; +u64 mySignalStart = ctx->componentMemory[ctx_index].signalStart; +std::string myTemplateName = ctx->componentMemory[ctx_index].templateName; +std::string myComponentName = ctx->componentMemory[ctx_index].componentName; +u64 myFather = ctx->componentMemory[ctx_index].idFather; +u64 myId = ctx_index; +u32* mySubcomponents = ctx->componentMemory[ctx_index].subcomponents; +bool* mySubcomponentsParallel = ctx->componentMemory[ctx_index].subcomponentsParallel; +FrElement* circuitConstants = ctx->circuitConstants; +std::string* listOfTemplateMessages = ctx->listOfTemplateMessages; +FrElement expaux[5]; +FrElement lvar[8]; +uint sub_component_aux; +uint index_multiple_eq; +{ +PFrElement aux_dest = &lvar[0]; +// load src +// end load src +Fr_copy(aux_dest,&circuitConstants[12]); +} +{ +uint aux_create = 0; +int aux_cmp_num = 5+ctx_index+1; +uint csoffset = mySignalStart+26; +for (uint i = 0; i < 1; i++) { +std::string new_cmp_name = "isPerfect"; +IsZero_1_create(csoffset,aux_cmp_num,ctx,new_cmp_name,myId); +mySubcomponents[aux_create+i] = aux_cmp_num; +csoffset += 3 ; +aux_cmp_num += 1; +} +} +{ +uint aux_create = 1; +int aux_cmp_num = 6+ctx_index+1; +uint csoffset = mySignalStart+29; +for (uint i = 0; i < 1; i++) { +std::string new_cmp_name = "isZeroDiff2"; +IsZero_1_create(csoffset,aux_cmp_num,ctx,new_cmp_name,myId); +mySubcomponents[aux_create+i] = aux_cmp_num; +csoffset += 3 ; +aux_cmp_num += 1; +} +} +{ +uint aux_create = 2; +int aux_cmp_num = 7+ctx_index+1; +uint csoffset = mySignalStart+32; +for (uint i = 0; i < 1; i++) { +std::string new_cmp_name = "isZeroDiff3"; +IsZero_1_create(csoffset,aux_cmp_num,ctx,new_cmp_name,myId); +mySubcomponents[aux_create+i] = aux_cmp_num; +csoffset += 3 ; +aux_cmp_num += 1; +} +} +{ +uint aux_create = 3; +int aux_cmp_num = 4+ctx_index+1; +uint csoffset = mySignalStart+23; +for (uint i = 0; i < 1; i++) { +std::string new_cmp_name = "firstCondition"; +XOR_9_create(csoffset,aux_cmp_num,ctx,new_cmp_name,myId); +mySubcomponents[aux_create+i] = aux_cmp_num; +csoffset += 3 ; +aux_cmp_num += 1; +} +} +{ +uint aux_create = 4; +int aux_cmp_num = 11+ctx_index+1; +uint csoffset = mySignalStart+65; +for (uint i = 0; i < 1; i++) { +std::string new_cmp_name = "secondCondition"; +OR_10_create(csoffset,aux_cmp_num,ctx,new_cmp_name,myId); +mySubcomponents[aux_create+i] = aux_cmp_num; +csoffset += 3 ; +aux_cmp_num += 1; +} +} +{ +uint aux_create = 5; +int aux_cmp_num = 0+ctx_index+1; +uint csoffset = mySignalStart+7; +for (uint i = 0; i < 1; i++) { +std::string new_cmp_name = "diffMux"; +Mux1_5_create(csoffset,aux_cmp_num,ctx,new_cmp_name,myId); +mySubcomponents[aux_create+i] = aux_cmp_num; +csoffset += 8 ; +aux_cmp_num += 2; +} +} +{ +uint aux_create = 6; +int aux_cmp_num = 2+ctx_index+1; +uint csoffset = mySignalStart+15; +for (uint i = 0; i < 1; i++) { +std::string new_cmp_name = "diffMux2"; +Mux1_5_create(csoffset,aux_cmp_num,ctx,new_cmp_name,myId); +mySubcomponents[aux_create+i] = aux_cmp_num; +csoffset += 8 ; +aux_cmp_num += 2; +} +} +{ +uint aux_create = 7; +int aux_cmp_num = 8+ctx_index+1; +uint csoffset = mySignalStart+35; +for (uint i = 0; i < 1; i++) { +std::string new_cmp_name = "lessThan2"; +LessEqThan_13_create(csoffset,aux_cmp_num,ctx,new_cmp_name,myId); +mySubcomponents[aux_create+i] = aux_cmp_num; +csoffset += 30 ; +aux_cmp_num += 3; +} +} +{ + +// start of call bucket +FrElement lvarcall[8]; +// copying argument 0 +Fr_copy(&lvarcall[0],&signalValues[mySignalStart + 1]); +// end copying argument 0 +approxSqrt_0(ctx,lvarcall,myId,&signalValues[mySignalStart + 2],3); +// end call bucket +} + +{ +PFrElement aux_dest = &signalValues[mySignalStart + 0]; +// load src +// end load src +Fr_copy(aux_dest,&signalValues[mySignalStart + 3]); +} +{ +PFrElement aux_dest = &lvar[1]; +// load src +// end load src +Fr_copy(aux_dest,&circuitConstants[1]); +} +{ +PFrElement aux_dest = &lvar[2]; +// load src +// end load src +Fr_copy(aux_dest,&circuitConstants[1]); +} +{ +PFrElement aux_dest = &lvar[3]; +// load src +// end load src +Fr_copy(aux_dest,&circuitConstants[1]); +} +{ + +// start of call bucket +FrElement lvarcall[8]; +// copying argument 0 +Fr_copy(&lvarcall[0],&circuitConstants[12]); +// end copying argument 0 +approxSqrt_0(ctx,lvarcall,myId,&lvar[1],3); +// end call bucket +} + +{ +PFrElement aux_dest = &lvar[4]; +// load src +// end load src +Fr_copy(aux_dest,&circuitConstants[13]); +} +{ +PFrElement aux_dest = &lvar[5]; +// load src +// end load src +Fr_copy(aux_dest,&circuitConstants[3]); +} +{ +uint cmp_index_ref = 0; +{ +PFrElement aux_dest = &ctx->signalValues[ctx->componentMemory[mySubcomponents[cmp_index_ref]].signalStart + 1]; +// load src +Fr_pow(&expaux[1],&signalValues[mySignalStart + 0],&circuitConstants[0]); // line circom 116 +Fr_sub(&expaux[0],&expaux[1],&signalValues[mySignalStart + 1]); // line circom 116 +// end load src +Fr_copy(aux_dest,&expaux[0]); +} +// need to run sub component +ctx->componentMemory[mySubcomponents[cmp_index_ref]].inputCounter -= 1; +assert(!(ctx->componentMemory[mySubcomponents[cmp_index_ref]].inputCounter)); +IsZero_1_run(mySubcomponents[cmp_index_ref],ctx); +} +{ +uint cmp_index_ref = 1; +{ +PFrElement aux_dest = &ctx->signalValues[ctx->componentMemory[mySubcomponents[cmp_index_ref]].signalStart + 1]; +// load src +Fr_sub(&expaux[0],&signalValues[mySignalStart + 2],&signalValues[mySignalStart + 3]); // line circom 125 +// end load src +Fr_copy(aux_dest,&expaux[0]); +} +// need to run sub component +ctx->componentMemory[mySubcomponents[cmp_index_ref]].inputCounter -= 1; +assert(!(ctx->componentMemory[mySubcomponents[cmp_index_ref]].inputCounter)); +IsZero_1_run(mySubcomponents[cmp_index_ref],ctx); +} +{ +uint cmp_index_ref = 2; +{ +PFrElement aux_dest = &ctx->signalValues[ctx->componentMemory[mySubcomponents[cmp_index_ref]].signalStart + 1]; +// load src +Fr_sub(&expaux[0],&signalValues[mySignalStart + 4],&signalValues[mySignalStart + 3]); // line circom 129 +// end load src +Fr_copy(aux_dest,&expaux[0]); +} +// need to run sub component +ctx->componentMemory[mySubcomponents[cmp_index_ref]].inputCounter -= 1; +assert(!(ctx->componentMemory[mySubcomponents[cmp_index_ref]].inputCounter)); +IsZero_1_run(mySubcomponents[cmp_index_ref],ctx); +} +{ +uint cmp_index_ref = 3; +{ +PFrElement aux_dest = &ctx->signalValues[ctx->componentMemory[mySubcomponents[cmp_index_ref]].signalStart + 1]; +// load src +// end load src +Fr_copy(aux_dest,&ctx->signalValues[ctx->componentMemory[mySubcomponents[1]].signalStart + 0]); +} +// no need to run sub component +ctx->componentMemory[mySubcomponents[cmp_index_ref]].inputCounter -= 1; +assert(ctx->componentMemory[mySubcomponents[cmp_index_ref]].inputCounter > 0); +} +{ +uint cmp_index_ref = 3; +{ +PFrElement aux_dest = &ctx->signalValues[ctx->componentMemory[mySubcomponents[cmp_index_ref]].signalStart + 2]; +// load src +// end load src +Fr_copy(aux_dest,&ctx->signalValues[ctx->componentMemory[mySubcomponents[2]].signalStart + 0]); +} +// need to run sub component +ctx->componentMemory[mySubcomponents[cmp_index_ref]].inputCounter -= 1; +assert(!(ctx->componentMemory[mySubcomponents[cmp_index_ref]].inputCounter)); +XOR_9_run(mySubcomponents[cmp_index_ref],ctx); +} +{ +uint cmp_index_ref = 4; +{ +PFrElement aux_dest = &ctx->signalValues[ctx->componentMemory[mySubcomponents[cmp_index_ref]].signalStart + 1]; +// load src +// end load src +Fr_copy(aux_dest,&ctx->signalValues[ctx->componentMemory[mySubcomponents[3]].signalStart + 0]); +} +// no need to run sub component +ctx->componentMemory[mySubcomponents[cmp_index_ref]].inputCounter -= 1; +assert(ctx->componentMemory[mySubcomponents[cmp_index_ref]].inputCounter > 0); +} +{ +uint cmp_index_ref = 4; +{ +PFrElement aux_dest = &ctx->signalValues[ctx->componentMemory[mySubcomponents[cmp_index_ref]].signalStart + 2]; +// load src +// end load src +Fr_copy(aux_dest,&ctx->signalValues[ctx->componentMemory[mySubcomponents[0]].signalStart + 0]); +} +// need to run sub component +ctx->componentMemory[mySubcomponents[cmp_index_ref]].inputCounter -= 1; +assert(!(ctx->componentMemory[mySubcomponents[cmp_index_ref]].inputCounter)); +OR_10_run(mySubcomponents[cmp_index_ref],ctx); +} +Fr_eq(&expaux[0],&ctx->signalValues[ctx->componentMemory[mySubcomponents[4]].signalStart + 0],&circuitConstants[2]); // line circom 144 +if (!Fr_isTrue(&expaux[0])) std::cout << "Failed assert in template/function " << myTemplateName << " line 144. " << "Followed trace of components: " << ctx->getTrace(myId) << std::endl; +assert(Fr_isTrue(&expaux[0])); +{ +uint cmp_index_ref = 5; +{ +PFrElement aux_dest = &ctx->signalValues[ctx->componentMemory[mySubcomponents[cmp_index_ref]].signalStart + 1]; +// load src +Fr_pow(&expaux[1],&signalValues[mySignalStart + 3],&circuitConstants[0]); // line circom 161 +Fr_sub(&expaux[0],&expaux[1],&signalValues[mySignalStart + 1]); // line circom 161 +// end load src +Fr_copy(aux_dest,&expaux[0]); +} +// no need to run sub component +ctx->componentMemory[mySubcomponents[cmp_index_ref]].inputCounter -= 1; +assert(ctx->componentMemory[mySubcomponents[cmp_index_ref]].inputCounter > 0); +} +{ +uint cmp_index_ref = 5; +{ +PFrElement aux_dest = &ctx->signalValues[ctx->componentMemory[mySubcomponents[cmp_index_ref]].signalStart + 2]; +// load src +Fr_pow(&expaux[2],&signalValues[mySignalStart + 3],&circuitConstants[0]); // line circom 162 +Fr_sub(&expaux[0],&signalValues[mySignalStart + 1],&expaux[2]); // line circom 162 +// end load src +Fr_copy(aux_dest,&expaux[0]); +} +// no need to run sub component +ctx->componentMemory[mySubcomponents[cmp_index_ref]].inputCounter -= 1; +assert(ctx->componentMemory[mySubcomponents[cmp_index_ref]].inputCounter > 0); +} +{ +uint cmp_index_ref = 5; +{ +PFrElement aux_dest = &ctx->signalValues[ctx->componentMemory[mySubcomponents[cmp_index_ref]].signalStart + 3]; +// load src +// end load src +Fr_copy(aux_dest,&ctx->signalValues[ctx->componentMemory[mySubcomponents[2]].signalStart + 0]); +} +// need to run sub component +ctx->componentMemory[mySubcomponents[cmp_index_ref]].inputCounter -= 1; +assert(!(ctx->componentMemory[mySubcomponents[cmp_index_ref]].inputCounter)); +Mux1_5_run(mySubcomponents[cmp_index_ref],ctx); +} +{ +PFrElement aux_dest = &signalValues[mySignalStart + 5]; +// load src +// end load src +Fr_copy(aux_dest,&ctx->signalValues[ctx->componentMemory[mySubcomponents[5]].signalStart + 0]); +} +{ +uint cmp_index_ref = 6; +{ +PFrElement aux_dest = &ctx->signalValues[ctx->componentMemory[mySubcomponents[cmp_index_ref]].signalStart + 1]; +// load src +// end load src +Fr_copy(aux_dest,&signalValues[mySignalStart + 5]); +} +// no need to run sub component +ctx->componentMemory[mySubcomponents[cmp_index_ref]].inputCounter -= 1; +assert(ctx->componentMemory[mySubcomponents[cmp_index_ref]].inputCounter > 0); +} +{ +uint cmp_index_ref = 6; +{ +PFrElement aux_dest = &ctx->signalValues[ctx->componentMemory[mySubcomponents[cmp_index_ref]].signalStart + 2]; +// load src +// end load src +Fr_copy(aux_dest,&circuitConstants[1]); +} +// no need to run sub component +ctx->componentMemory[mySubcomponents[cmp_index_ref]].inputCounter -= 1; +assert(ctx->componentMemory[mySubcomponents[cmp_index_ref]].inputCounter > 0); +} +{ +uint cmp_index_ref = 6; +{ +PFrElement aux_dest = &ctx->signalValues[ctx->componentMemory[mySubcomponents[cmp_index_ref]].signalStart + 3]; +// load src +// end load src +Fr_copy(aux_dest,&ctx->signalValues[ctx->componentMemory[mySubcomponents[0]].signalStart + 0]); +} +// need to run sub component +ctx->componentMemory[mySubcomponents[cmp_index_ref]].inputCounter -= 1; +assert(!(ctx->componentMemory[mySubcomponents[cmp_index_ref]].inputCounter)); +Mux1_5_run(mySubcomponents[cmp_index_ref],ctx); +} +{ +PFrElement aux_dest = &signalValues[mySignalStart + 6]; +// load src +// end load src +Fr_copy(aux_dest,&ctx->signalValues[ctx->componentMemory[mySubcomponents[6]].signalStart + 0]); +} +{ +PFrElement aux_dest = &lvar[6]; +// load src +// end load src +Fr_copy(aux_dest,&circuitConstants[14]); +} +{ +PFrElement aux_dest = &lvar[7]; +// load src +// end load src +Fr_copy(aux_dest,&circuitConstants[10]); +} +{ +uint cmp_index_ref = 7; +{ +PFrElement aux_dest = &ctx->signalValues[ctx->componentMemory[mySubcomponents[cmp_index_ref]].signalStart + 1]; +// load src +// end load src +Fr_copy(aux_dest,&signalValues[mySignalStart + 6]); +} +// no need to run sub component +ctx->componentMemory[mySubcomponents[cmp_index_ref]].inputCounter -= 1; +assert(ctx->componentMemory[mySubcomponents[cmp_index_ref]].inputCounter > 0); +} +{ +uint cmp_index_ref = 7; +{ +PFrElement aux_dest = &ctx->signalValues[ctx->componentMemory[mySubcomponents[cmp_index_ref]].signalStart + 2]; +// load src +Fr_mul(&expaux[0],&signalValues[mySignalStart + 0],&circuitConstants[0]); // line circom 180 +// end load src +Fr_copy(aux_dest,&expaux[0]); +} +// need to run sub component +ctx->componentMemory[mySubcomponents[cmp_index_ref]].inputCounter -= 1; +assert(!(ctx->componentMemory[mySubcomponents[cmp_index_ref]].inputCounter)); +LessEqThan_13_run(mySubcomponents[cmp_index_ref],ctx); +} +Fr_eq(&expaux[0],&ctx->signalValues[ctx->componentMemory[mySubcomponents[7]].signalStart + 0],&circuitConstants[2]); // line circom 182 +if (!Fr_isTrue(&expaux[0])) std::cout << "Failed assert in template/function " << myTemplateName << " line 182. " << "Followed trace of components: " << ctx->getTrace(myId) << std::endl; +assert(Fr_isTrue(&expaux[0])); +for (uint i = 0; i < 8; i++){ +uint index_subc = ctx->componentMemory[ctx_index].subcomponents[i]; +if (index_subc != 0)release_memory_component(ctx,index_subc); +} +} + +void Num2Bits_15_create(uint soffset,uint coffset,Circom_CalcWit* ctx,std::string componentName,uint componentFather){ +ctx->componentMemory[coffset].templateId = 15; +ctx->componentMemory[coffset].templateName = "Num2Bits"; +ctx->componentMemory[coffset].signalStart = soffset; +ctx->componentMemory[coffset].inputCounter = 1; +ctx->componentMemory[coffset].componentName = componentName; +ctx->componentMemory[coffset].idFather = componentFather; +ctx->componentMemory[coffset].subcomponents = new uint[0]; +} + +void Num2Bits_15_run(uint ctx_index,Circom_CalcWit* ctx){ +FrElement* signalValues = ctx->signalValues; +u64 mySignalStart = ctx->componentMemory[ctx_index].signalStart; +std::string myTemplateName = ctx->componentMemory[ctx_index].templateName; +std::string myComponentName = ctx->componentMemory[ctx_index].componentName; +u64 myFather = ctx->componentMemory[ctx_index].idFather; +u64 myId = ctx_index; +u32* mySubcomponents = ctx->componentMemory[ctx_index].subcomponents; +bool* mySubcomponentsParallel = ctx->componentMemory[ctx_index].subcomponentsParallel; +FrElement* circuitConstants = ctx->circuitConstants; +std::string* listOfTemplateMessages = ctx->listOfTemplateMessages; +FrElement expaux[6]; +FrElement lvar[4]; +uint sub_component_aux; +uint index_multiple_eq; +{ +PFrElement aux_dest = &lvar[0]; +// load src +// end load src +Fr_copy(aux_dest,&circuitConstants[15]); +} +{ +PFrElement aux_dest = &lvar[1]; +// load src +// end load src +Fr_copy(aux_dest,&circuitConstants[1]); +} +{ +PFrElement aux_dest = &lvar[2]; +// load src +// end load src +Fr_copy(aux_dest,&circuitConstants[2]); +} +{ +PFrElement aux_dest = &lvar[3]; +// load src +// end load src +Fr_copy(aux_dest,&circuitConstants[1]); +} +Fr_lt(&expaux[0],&lvar[3],&circuitConstants[15]); // line circom 31 +while(Fr_isTrue(&expaux[0])){ +{ +PFrElement aux_dest = &signalValues[mySignalStart + ((1 * Fr_toInt(&lvar[3])) + 0)]; +// load src +Fr_shr(&expaux[1],&signalValues[mySignalStart + 65],&lvar[3]); // line circom 32 +Fr_band(&expaux[0],&expaux[1],&circuitConstants[2]); // line circom 32 +// end load src +Fr_copy(aux_dest,&expaux[0]); +} +Fr_sub(&expaux[3],&signalValues[mySignalStart + ((1 * Fr_toInt(&lvar[3])) + 0)],&circuitConstants[2]); // line circom 33 +Fr_mul(&expaux[1],&signalValues[mySignalStart + ((1 * Fr_toInt(&lvar[3])) + 0)],&expaux[3]); // line circom 33 +Fr_eq(&expaux[0],&expaux[1],&circuitConstants[1]); // line circom 33 +if (!Fr_isTrue(&expaux[0])) std::cout << "Failed assert in template/function " << myTemplateName << " line 33. " << "Followed trace of components: " << ctx->getTrace(myId) << std::endl; +assert(Fr_isTrue(&expaux[0])); +{ +PFrElement aux_dest = &lvar[1]; +// load src +Fr_mul(&expaux[2],&signalValues[mySignalStart + ((1 * Fr_toInt(&lvar[3])) + 0)],&lvar[2]); // line circom 34 +Fr_add(&expaux[0],&lvar[1],&expaux[2]); // line circom 34 +// end load src +Fr_copy(aux_dest,&expaux[0]); +} +{ +PFrElement aux_dest = &lvar[2]; +// load src +Fr_add(&expaux[0],&lvar[2],&lvar[2]); // line circom 35 +// end load src +Fr_copy(aux_dest,&expaux[0]); +} +{ +PFrElement aux_dest = &lvar[3]; +// load src +Fr_add(&expaux[0],&lvar[3],&circuitConstants[2]); // line circom 31 +// end load src +Fr_copy(aux_dest,&expaux[0]); +} +Fr_lt(&expaux[0],&lvar[3],&circuitConstants[15]); // line circom 31 +} +Fr_eq(&expaux[0],&lvar[1],&signalValues[mySignalStart + 65]); // line circom 38 +if (!Fr_isTrue(&expaux[0])) std::cout << "Failed assert in template/function " << myTemplateName << " line 38. " << "Followed trace of components: " << ctx->getTrace(myId) << std::endl; +assert(Fr_isTrue(&expaux[0])); +for (uint i = 0; i < 0; i++){ +uint index_subc = ctx->componentMemory[ctx_index].subcomponents[i]; +if (index_subc != 0)release_memory_component(ctx,index_subc); +} +} + +void LessThan_16_create(uint soffset,uint coffset,Circom_CalcWit* ctx,std::string componentName,uint componentFather){ +ctx->componentMemory[coffset].templateId = 16; +ctx->componentMemory[coffset].templateName = "LessThan"; +ctx->componentMemory[coffset].signalStart = soffset; +ctx->componentMemory[coffset].inputCounter = 2; +ctx->componentMemory[coffset].componentName = componentName; +ctx->componentMemory[coffset].idFather = componentFather; +ctx->componentMemory[coffset].subcomponents = new uint[1]{0}; +} + +void LessThan_16_run(uint ctx_index,Circom_CalcWit* ctx){ +FrElement* signalValues = ctx->signalValues; +u64 mySignalStart = ctx->componentMemory[ctx_index].signalStart; +std::string myTemplateName = ctx->componentMemory[ctx_index].templateName; +std::string myComponentName = ctx->componentMemory[ctx_index].componentName; +u64 myFather = ctx->componentMemory[ctx_index].idFather; +u64 myId = ctx_index; +u32* mySubcomponents = ctx->componentMemory[ctx_index].subcomponents; +bool* mySubcomponentsParallel = ctx->componentMemory[ctx_index].subcomponentsParallel; +FrElement* circuitConstants = ctx->circuitConstants; +std::string* listOfTemplateMessages = ctx->listOfTemplateMessages; +FrElement expaux[4]; +FrElement lvar[1]; +uint sub_component_aux; +uint index_multiple_eq; +{ +PFrElement aux_dest = &lvar[0]; +// load src +// end load src +Fr_copy(aux_dest,&circuitConstants[16]); +} +{ +uint aux_create = 0; +int aux_cmp_num = 0+ctx_index+1; +uint csoffset = mySignalStart+3; +for (uint i = 0; i < 1; i++) { +std::string new_cmp_name = "n2b"; +Num2Bits_15_create(csoffset,aux_cmp_num,ctx,new_cmp_name,myId); +mySubcomponents[aux_create+i] = aux_cmp_num; +csoffset += 66 ; +aux_cmp_num += 1; +} +} +if (!Fr_isTrue(&circuitConstants[2])) std::cout << "Failed assert in template/function " << myTemplateName << " line 90. " << "Followed trace of components: " << ctx->getTrace(myId) << std::endl; +assert(Fr_isTrue(&circuitConstants[2])); +{ +uint cmp_index_ref = 0; +{ +PFrElement aux_dest = &ctx->signalValues[ctx->componentMemory[mySubcomponents[cmp_index_ref]].signalStart + 65]; +// load src +Fr_add(&expaux[1],&signalValues[mySignalStart + 1],&circuitConstants[17]); // line circom 96 +Fr_sub(&expaux[0],&expaux[1],&signalValues[mySignalStart + 2]); // line circom 96 +// end load src +Fr_copy(aux_dest,&expaux[0]); +} +// need to run sub component +ctx->componentMemory[mySubcomponents[cmp_index_ref]].inputCounter -= 1; +assert(!(ctx->componentMemory[mySubcomponents[cmp_index_ref]].inputCounter)); +Num2Bits_15_run(mySubcomponents[cmp_index_ref],ctx); +} +{ +PFrElement aux_dest = &signalValues[mySignalStart + 0]; +// load src +Fr_sub(&expaux[0],&circuitConstants[2],&ctx->signalValues[ctx->componentMemory[mySubcomponents[0]].signalStart + 64]); // line circom 98 +// end load src +Fr_copy(aux_dest,&expaux[0]); +} +for (uint i = 0; i < 1; i++){ +uint index_subc = ctx->componentMemory[ctx_index].subcomponents[i]; +if (index_subc != 0)release_memory_component(ctx,index_subc); +} +} + +void LessEqThan_17_create(uint soffset,uint coffset,Circom_CalcWit* ctx,std::string componentName,uint componentFather){ +ctx->componentMemory[coffset].templateId = 17; +ctx->componentMemory[coffset].templateName = "LessEqThan"; +ctx->componentMemory[coffset].signalStart = soffset; +ctx->componentMemory[coffset].inputCounter = 2; +ctx->componentMemory[coffset].componentName = componentName; +ctx->componentMemory[coffset].idFather = componentFather; +ctx->componentMemory[coffset].subcomponents = new uint[1]{0}; +} + +void LessEqThan_17_run(uint ctx_index,Circom_CalcWit* ctx){ +FrElement* signalValues = ctx->signalValues; +u64 mySignalStart = ctx->componentMemory[ctx_index].signalStart; +std::string myTemplateName = ctx->componentMemory[ctx_index].templateName; +std::string myComponentName = ctx->componentMemory[ctx_index].componentName; +u64 myFather = ctx->componentMemory[ctx_index].idFather; +u64 myId = ctx_index; +u32* mySubcomponents = ctx->componentMemory[ctx_index].subcomponents; +bool* mySubcomponentsParallel = ctx->componentMemory[ctx_index].subcomponentsParallel; +FrElement* circuitConstants = ctx->circuitConstants; +std::string* listOfTemplateMessages = ctx->listOfTemplateMessages; +FrElement expaux[3]; +FrElement lvar[1]; +uint sub_component_aux; +uint index_multiple_eq; +{ +PFrElement aux_dest = &lvar[0]; +// load src +// end load src +Fr_copy(aux_dest,&circuitConstants[16]); +} +{ +uint aux_create = 0; +int aux_cmp_num = 0+ctx_index+1; +uint csoffset = mySignalStart+3; +for (uint i = 0; i < 1; i++) { +std::string new_cmp_name = "lt"; +LessThan_16_create(csoffset,aux_cmp_num,ctx,new_cmp_name,myId); +mySubcomponents[aux_create+i] = aux_cmp_num; +csoffset += 69 ; +aux_cmp_num += 2; +} +} +{ +uint cmp_index_ref = 0; +{ +PFrElement aux_dest = &ctx->signalValues[ctx->componentMemory[mySubcomponents[cmp_index_ref]].signalStart + 1]; +// load src +// end load src +Fr_copy(aux_dest,&signalValues[mySignalStart + 1]); +} +// no need to run sub component +ctx->componentMemory[mySubcomponents[cmp_index_ref]].inputCounter -= 1; +assert(ctx->componentMemory[mySubcomponents[cmp_index_ref]].inputCounter > 0); +} +{ +uint cmp_index_ref = 0; +{ +PFrElement aux_dest = &ctx->signalValues[ctx->componentMemory[mySubcomponents[cmp_index_ref]].signalStart + 2]; +// load src +Fr_add(&expaux[0],&signalValues[mySignalStart + 2],&circuitConstants[2]); // line circom 112 +// end load src +Fr_copy(aux_dest,&expaux[0]); +} +// need to run sub component +ctx->componentMemory[mySubcomponents[cmp_index_ref]].inputCounter -= 1; +assert(!(ctx->componentMemory[mySubcomponents[cmp_index_ref]].inputCounter)); +LessThan_16_run(mySubcomponents[cmp_index_ref],ctx); +} +{ +PFrElement aux_dest = &signalValues[mySignalStart + 0]; +// load src +// end load src +Fr_copy(aux_dest,&ctx->signalValues[ctx->componentMemory[mySubcomponents[0]].signalStart + 0]); +} +for (uint i = 0; i < 1; i++){ +uint index_subc = ctx->componentMemory[ctx_index].subcomponents[i]; +if (index_subc != 0)release_memory_component(ctx,index_subc); +} +} + +void Div_18_create(uint soffset,uint coffset,Circom_CalcWit* ctx,std::string componentName,uint componentFather){ +ctx->componentMemory[coffset].templateId = 18; +ctx->componentMemory[coffset].templateName = "Div"; +ctx->componentMemory[coffset].signalStart = soffset; +ctx->componentMemory[coffset].inputCounter = 2; +ctx->componentMemory[coffset].componentName = componentName; +ctx->componentMemory[coffset].idFather = componentFather; +ctx->componentMemory[coffset].subcomponents = new uint[3]{0}; +} + +void Div_18_run(uint ctx_index,Circom_CalcWit* ctx){ +FrElement* signalValues = ctx->signalValues; +u64 mySignalStart = ctx->componentMemory[ctx_index].signalStart; +std::string myTemplateName = ctx->componentMemory[ctx_index].templateName; +std::string myComponentName = ctx->componentMemory[ctx_index].componentName; +u64 myFather = ctx->componentMemory[ctx_index].idFather; +u64 myId = ctx_index; +u32* mySubcomponents = ctx->componentMemory[ctx_index].subcomponents; +bool* mySubcomponentsParallel = ctx->componentMemory[ctx_index].subcomponentsParallel; +FrElement* circuitConstants = ctx->circuitConstants; +std::string* listOfTemplateMessages = ctx->listOfTemplateMessages; +FrElement expaux[3]; +FrElement lvar[0]; +uint sub_component_aux; +uint index_multiple_eq; +{ +uint aux_create = 0; +int aux_cmp_num = 1+ctx_index+1; +uint csoffset = mySignalStart+8; +for (uint i = 0; i < 1; i++) { +std::string new_cmp_name = "lessThan"; +LessEqThan_17_create(csoffset,aux_cmp_num,ctx,new_cmp_name,myId); +mySubcomponents[aux_create+i] = aux_cmp_num; +csoffset += 72 ; +aux_cmp_num += 3; +} +} +{ +uint aux_create = 1; +int aux_cmp_num = 0+ctx_index+1; +uint csoffset = mySignalStart+5; +for (uint i = 0; i < 1; i++) { +std::string new_cmp_name = "isZero"; +IsZero_1_create(csoffset,aux_cmp_num,ctx,new_cmp_name,myId); +mySubcomponents[aux_create+i] = aux_cmp_num; +csoffset += 3 ; +aux_cmp_num += 1; +} +} +{ +uint aux_create = 2; +int aux_cmp_num = 4+ctx_index+1; +uint csoffset = mySignalStart+80; +for (uint i = 0; i < 1; i++) { +std::string new_cmp_name = "or"; +OR_10_create(csoffset,aux_cmp_num,ctx,new_cmp_name,myId); +mySubcomponents[aux_create+i] = aux_cmp_num; +csoffset += 3 ; +aux_cmp_num += 1; +} +} +{ + +// start of call bucket +FrElement lvarcall[6]; +// copying argument 0 +Fr_copy(&lvarcall[0],&signalValues[mySignalStart + 1]); +// end copying argument 0 +// copying argument 1 +Fr_copy(&lvarcall[1],&signalValues[mySignalStart + 2]); +// end copying argument 1 +approxDiv_1(ctx,lvarcall,myId,&signalValues[mySignalStart + 0],1); +// end call bucket +} + +{ +PFrElement aux_dest = &signalValues[mySignalStart + 3]; +// load src +Fr_mul(&expaux[0],&signalValues[mySignalStart + 0],&signalValues[mySignalStart + 2]); // line circom 70 +// end load src +Fr_copy(aux_dest,&expaux[0]); +} +{ +PFrElement aux_dest = &signalValues[mySignalStart + 4]; +// load src +Fr_sub(&expaux[0],&signalValues[mySignalStart + 1],&signalValues[mySignalStart + 0]); // line circom 74 +// end load src +Fr_copy(aux_dest,&expaux[0]); +} +{ +uint cmp_index_ref = 0; +{ +PFrElement aux_dest = &ctx->signalValues[ctx->componentMemory[mySubcomponents[cmp_index_ref]].signalStart + 1]; +// load src +// end load src +Fr_copy(aux_dest,&signalValues[mySignalStart + 4]); +} +// no need to run sub component +ctx->componentMemory[mySubcomponents[cmp_index_ref]].inputCounter -= 1; +assert(ctx->componentMemory[mySubcomponents[cmp_index_ref]].inputCounter > 0); +} +{ +uint cmp_index_ref = 0; +{ +PFrElement aux_dest = &ctx->signalValues[ctx->componentMemory[mySubcomponents[cmp_index_ref]].signalStart + 2]; +// load src +// end load src +Fr_copy(aux_dest,&signalValues[mySignalStart + 1]); +} +// need to run sub component +ctx->componentMemory[mySubcomponents[cmp_index_ref]].inputCounter -= 1; +assert(!(ctx->componentMemory[mySubcomponents[cmp_index_ref]].inputCounter)); +LessEqThan_17_run(mySubcomponents[cmp_index_ref],ctx); +} +{ +uint cmp_index_ref = 1; +{ +PFrElement aux_dest = &ctx->signalValues[ctx->componentMemory[mySubcomponents[cmp_index_ref]].signalStart + 1]; +// load src +// end load src +Fr_copy(aux_dest,&signalValues[mySignalStart + 1]); +} +// need to run sub component +ctx->componentMemory[mySubcomponents[cmp_index_ref]].inputCounter -= 1; +assert(!(ctx->componentMemory[mySubcomponents[cmp_index_ref]].inputCounter)); +IsZero_1_run(mySubcomponents[cmp_index_ref],ctx); +} +{ +uint cmp_index_ref = 2; +{ +PFrElement aux_dest = &ctx->signalValues[ctx->componentMemory[mySubcomponents[cmp_index_ref]].signalStart + 1]; +// load src +// end load src +Fr_copy(aux_dest,&ctx->signalValues[ctx->componentMemory[mySubcomponents[1]].signalStart + 0]); +} +// no need to run sub component +ctx->componentMemory[mySubcomponents[cmp_index_ref]].inputCounter -= 1; +assert(ctx->componentMemory[mySubcomponents[cmp_index_ref]].inputCounter > 0); +} +{ +uint cmp_index_ref = 2; +{ +PFrElement aux_dest = &ctx->signalValues[ctx->componentMemory[mySubcomponents[cmp_index_ref]].signalStart + 2]; +// load src +// end load src +Fr_copy(aux_dest,&ctx->signalValues[ctx->componentMemory[mySubcomponents[0]].signalStart + 0]); +} +// need to run sub component +ctx->componentMemory[mySubcomponents[cmp_index_ref]].inputCounter -= 1; +assert(!(ctx->componentMemory[mySubcomponents[cmp_index_ref]].inputCounter)); +OR_10_run(mySubcomponents[cmp_index_ref],ctx); +} +Fr_eq(&expaux[0],&ctx->signalValues[ctx->componentMemory[mySubcomponents[2]].signalStart + 0],&circuitConstants[2]); // line circom 91 +if (!Fr_isTrue(&expaux[0])) std::cout << "Failed assert in template/function " << myTemplateName << " line 91. " << "Followed trace of components: " << ctx->getTrace(myId) << std::endl; +assert(Fr_isTrue(&expaux[0])); +for (uint i = 0; i < 3; i++){ +uint index_subc = ctx->componentMemory[ctx_index].subcomponents[i]; +if (index_subc != 0)release_memory_component(ctx,index_subc); +} +} + +void CalculateForce_19_create(uint soffset,uint coffset,Circom_CalcWit* ctx,std::string componentName,uint componentFather){ +ctx->componentMemory[coffset].templateId = 19; +ctx->componentMemory[coffset].templateName = "CalculateForce"; +ctx->componentMemory[coffset].signalStart = soffset; +ctx->componentMemory[coffset].inputCounter = 10; +ctx->componentMemory[coffset].componentName = componentName; +ctx->componentMemory[coffset].idFather = componentFather; +ctx->componentMemory[coffset].subcomponents = new uint[13]{0}; +} + +void CalculateForce_19_run(uint ctx_index,Circom_CalcWit* ctx){ +FrElement* signalValues = ctx->signalValues; +u64 mySignalStart = ctx->componentMemory[ctx_index].signalStart; +std::string myTemplateName = ctx->componentMemory[ctx_index].templateName; +std::string myComponentName = ctx->componentMemory[ctx_index].componentName; +u64 myFather = ctx->componentMemory[ctx_index].idFather; +u64 myId = ctx_index; +u32* mySubcomponents = ctx->componentMemory[ctx_index].subcomponents; +bool* mySubcomponentsParallel = ctx->componentMemory[ctx_index].subcomponentsParallel; +FrElement* circuitConstants = ctx->circuitConstants; +std::string* listOfTemplateMessages = ctx->listOfTemplateMessages; +FrElement expaux[4]; +FrElement lvar[45]; +uint sub_component_aux; +uint index_multiple_eq; +{ +uint aux_create = 0; +int aux_cmp_num = 0+ctx_index+1; +uint csoffset = mySignalStart+33; +for (uint i = 0; i < 1; i++) { +std::string new_cmp_name = "absoluteValueSubtraction"; +AbsoluteValueSubtraction_6_create(csoffset,aux_cmp_num,ctx,new_cmp_name,myId); +mySubcomponents[aux_create+i] = aux_cmp_num; +csoffset += 50 ; +aux_cmp_num += 8; +} +} +{ +uint aux_create = 1; +int aux_cmp_num = 8+ctx_index+1; +uint csoffset = mySignalStart+83; +for (uint i = 0; i < 1; i++) { +std::string new_cmp_name = "absoluteValueSubtraction2"; +AbsoluteValueSubtraction_6_create(csoffset,aux_cmp_num,ctx,new_cmp_name,myId); +mySubcomponents[aux_create+i] = aux_cmp_num; +csoffset += 50 ; +aux_cmp_num += 8; +} +} +{ +uint aux_create = 2; +int aux_cmp_num = 32+ctx_index+1; +uint csoffset = mySignalStart+311; +for (uint i = 0; i < 1; i++) { +std::string new_cmp_name = "lessThan"; +LessThan_8_create(csoffset,aux_cmp_num,ctx,new_cmp_name,myId); +mySubcomponents[aux_create+i] = aux_cmp_num; +csoffset += 46 ; +aux_cmp_num += 2; +} +} +{ +uint aux_create = 3; +int aux_cmp_num = 34+ctx_index+1; +uint csoffset = mySignalStart+357; +for (uint i = 0; i < 1; i++) { +std::string new_cmp_name = "myMux"; +Mux1_5_create(csoffset,aux_cmp_num,ctx,new_cmp_name,myId); +mySubcomponents[aux_create+i] = aux_cmp_num; +csoffset += 8 ; +aux_cmp_num += 2; +} +} +{ +uint aux_create = 4; +int aux_cmp_num = 40+ctx_index+1; +uint csoffset = mySignalStart+381; +for (uint i = 0; i < 1; i++) { +std::string new_cmp_name = "sqrt"; +Sqrt_14_create(csoffset,aux_cmp_num,ctx,new_cmp_name,myId); +mySubcomponents[aux_create+i] = aux_cmp_num; +csoffset += 68 ; +aux_cmp_num += 13; +} +} +{ +uint aux_create = 5; +int aux_cmp_num = 28+ctx_index+1; +uint csoffset = mySignalStart+299; +for (uint i = 0; i < 1; i++) { +std::string new_cmp_name = "isZero"; +IsZero_1_create(csoffset,aux_cmp_num,ctx,new_cmp_name,myId); +mySubcomponents[aux_create+i] = aux_cmp_num; +csoffset += 3 ; +aux_cmp_num += 1; +} +} +{ +uint aux_create = 6; +int aux_cmp_num = 36+ctx_index+1; +uint csoffset = mySignalStart+365; +for (uint i = 0; i < 1; i++) { +std::string new_cmp_name = "myMux2"; +Mux1_5_create(csoffset,aux_cmp_num,ctx,new_cmp_name,myId); +mySubcomponents[aux_create+i] = aux_cmp_num; +csoffset += 8 ; +aux_cmp_num += 2; +} +} +{ +uint aux_create = 7; +int aux_cmp_num = 29+ctx_index+1; +uint csoffset = mySignalStart+302; +for (uint i = 0; i < 1; i++) { +std::string new_cmp_name = "isZero2"; +IsZero_1_create(csoffset,aux_cmp_num,ctx,new_cmp_name,myId); +mySubcomponents[aux_create+i] = aux_cmp_num; +csoffset += 3 ; +aux_cmp_num += 1; +} +} +{ +uint aux_create = 8; +int aux_cmp_num = 38+ctx_index+1; +uint csoffset = mySignalStart+373; +for (uint i = 0; i < 1; i++) { +std::string new_cmp_name = "myMux3"; +Mux1_5_create(csoffset,aux_cmp_num,ctx,new_cmp_name,myId); +mySubcomponents[aux_create+i] = aux_cmp_num; +csoffset += 8 ; +aux_cmp_num += 2; +} +} +{ +uint aux_create = 9; +int aux_cmp_num = 16+ctx_index+1; +uint csoffset = mySignalStart+133; +for (uint i = 0; i < 1; i++) { +std::string new_cmp_name = "div1"; +Div_18_create(csoffset,aux_cmp_num,ctx,new_cmp_name,myId); +mySubcomponents[aux_create+i] = aux_cmp_num; +csoffset += 83 ; +aux_cmp_num += 6; +} +} +{ +uint aux_create = 10; +int aux_cmp_num = 30+ctx_index+1; +uint csoffset = mySignalStart+305; +for (uint i = 0; i < 1; i++) { +std::string new_cmp_name = "isZero3"; +IsZero_1_create(csoffset,aux_cmp_num,ctx,new_cmp_name,myId); +mySubcomponents[aux_create+i] = aux_cmp_num; +csoffset += 3 ; +aux_cmp_num += 1; +} +} +{ +uint aux_create = 11; +int aux_cmp_num = 22+ctx_index+1; +uint csoffset = mySignalStart+216; +for (uint i = 0; i < 1; i++) { +std::string new_cmp_name = "div2"; +Div_18_create(csoffset,aux_cmp_num,ctx,new_cmp_name,myId); +mySubcomponents[aux_create+i] = aux_cmp_num; +csoffset += 83 ; +aux_cmp_num += 6; +} +} +{ +uint aux_create = 12; +int aux_cmp_num = 31+ctx_index+1; +uint csoffset = mySignalStart+308; +for (uint i = 0; i < 1; i++) { +std::string new_cmp_name = "isZero4"; +IsZero_1_create(csoffset,aux_cmp_num,ctx,new_cmp_name,myId); +mySubcomponents[aux_create+i] = aux_cmp_num; +csoffset += 3 ; +aux_cmp_num += 1; +} +} +{ +PFrElement aux_dest = &lvar[0]; +// load src +// end load src +Fr_copy(aux_dest,&circuitConstants[18]); +} +{ +PFrElement aux_dest = &lvar[1]; +// load src +// end load src +Fr_copy(aux_dest,&circuitConstants[19]); +} +{ +PFrElement aux_dest = &lvar[2]; +// load src +// end load src +Fr_copy(aux_dest,&circuitConstants[20]); +} +{ +PFrElement aux_dest = &lvar[3]; +// load src +// end load src +Fr_copy(aux_dest,&circuitConstants[21]); +} +{ +PFrElement aux_dest = &lvar[4]; +// load src +// end load src +Fr_copy(aux_dest,&circuitConstants[22]); +} +{ +PFrElement aux_dest = &lvar[5]; +// load src +// end load src +Fr_copy(aux_dest,&circuitConstants[23]); +} +{ +PFrElement aux_dest = &lvar[6]; +// load src +// end load src +Fr_copy(aux_dest,&circuitConstants[24]); +} +{ +PFrElement aux_dest = &lvar[7]; +// load src +// end load src +Fr_copy(aux_dest,&circuitConstants[25]); +} +{ +PFrElement aux_dest = &lvar[8]; +// load src +// end load src +Fr_copy(aux_dest,&circuitConstants[26]); +} +{ +PFrElement aux_dest = &lvar[9]; +// load src +// end load src +Fr_copy(aux_dest,&circuitConstants[27]); +} +{ +PFrElement aux_dest = &lvar[10]; +// load src +// end load src +Fr_copy(aux_dest,&circuitConstants[28]); +} +{ +PFrElement aux_dest = &lvar[11]; +// load src +// end load src +Fr_copy(aux_dest,&circuitConstants[19]); +} +{ +PFrElement aux_dest = &lvar[12]; +// load src +// end load src +Fr_copy(aux_dest,&circuitConstants[29]); +} +{ +PFrElement aux_dest = &lvar[13]; +// load src +// end load src +Fr_copy(aux_dest,&circuitConstants[4]); +} +{ +PFrElement aux_dest = &lvar[14]; +// load src +// end load src +Fr_copy(aux_dest,&circuitConstants[4]); +} +{ +PFrElement aux_dest = &signalValues[mySignalStart + 14]; +// load src +// end load src +Fr_copy(aux_dest,&circuitConstants[30]); +} +{ +PFrElement aux_dest = &lvar[15]; +// load src +// end load src +Fr_copy(aux_dest,&circuitConstants[30]); +} +{ +PFrElement aux_dest = &lvar[16]; +// load src +// end load src +Fr_copy(aux_dest,&circuitConstants[31]); +} +{ + +// start of call bucket +FrElement lvarcall[5]; +// copying argument 0 +Fr_copyn(&lvarcall[0],&signalValues[mySignalStart + 4],5); +// end copying argument 0 +getX_2(ctx,lvarcall,myId,&lvar[17],1); +// end call bucket +} + +{ +PFrElement aux_dest = &lvar[18]; +// load src +// end load src +Fr_copy(aux_dest,&circuitConstants[4]); +} +{ + +// start of call bucket +FrElement lvarcall[5]; +// copying argument 0 +Fr_copyn(&lvarcall[0],&signalValues[mySignalStart + 4],5); +// end copying argument 0 +getY_3(ctx,lvarcall,myId,&lvar[19],1); +// end call bucket +} + +{ +PFrElement aux_dest = &lvar[20]; +// load src +// end load src +Fr_copy(aux_dest,&circuitConstants[4]); +} +{ + +// start of call bucket +FrElement lvarcall[5]; +// copying argument 0 +Fr_copyn(&lvarcall[0],&signalValues[mySignalStart + 4],5); +// end copying argument 0 +getMass_4(ctx,lvarcall,myId,&lvar[21],1); +// end call bucket +} + +{ +PFrElement aux_dest = &lvar[22]; +// load src +// end load src +Fr_copy(aux_dest,&circuitConstants[26]); +} +{ + +// start of call bucket +FrElement lvarcall[5]; +// copying argument 0 +Fr_copyn(&lvarcall[0],&signalValues[mySignalStart + 9],5); +// end copying argument 0 +getX_2(ctx,lvarcall,myId,&lvar[23],1); +// end call bucket +} + +{ +PFrElement aux_dest = &lvar[24]; +// load src +// end load src +Fr_copy(aux_dest,&circuitConstants[4]); +} +{ + +// start of call bucket +FrElement lvarcall[5]; +// copying argument 0 +Fr_copyn(&lvarcall[0],&signalValues[mySignalStart + 9],5); +// end copying argument 0 +getY_3(ctx,lvarcall,myId,&lvar[25],1); +// end call bucket +} + +{ +PFrElement aux_dest = &lvar[26]; +// load src +// end load src +Fr_copy(aux_dest,&circuitConstants[4]); +} +{ + +// start of call bucket +FrElement lvarcall[5]; +// copying argument 0 +Fr_copyn(&lvarcall[0],&signalValues[mySignalStart + 9],5); +// end copying argument 0 +getMass_4(ctx,lvarcall,myId,&lvar[27],1); +// end call bucket +} + +{ +PFrElement aux_dest = &lvar[28]; +// load src +// end load src +Fr_copy(aux_dest,&circuitConstants[26]); +} +{ +PFrElement aux_dest = &signalValues[mySignalStart + 15]; +// load src +Fr_sub(&expaux[0],&lvar[23],&lvar[17]); // line circom 90 +// end load src +Fr_copy(aux_dest,&expaux[0]); +} +{ +PFrElement aux_dest = &lvar[29]; +// load src +// end load src +Fr_copy(aux_dest,&circuitConstants[4]); +} +{ +uint cmp_index_ref = 0; +{ +PFrElement aux_dest = &ctx->signalValues[ctx->componentMemory[mySubcomponents[cmp_index_ref]].signalStart + 1]; +// load src +// end load src +Fr_copy(aux_dest,&lvar[17]); +} +// no need to run sub component +ctx->componentMemory[mySubcomponents[cmp_index_ref]].inputCounter -= 1; +assert(ctx->componentMemory[mySubcomponents[cmp_index_ref]].inputCounter > 0); +} +{ +uint cmp_index_ref = 0; +{ +PFrElement aux_dest = &ctx->signalValues[ctx->componentMemory[mySubcomponents[cmp_index_ref]].signalStart + 2]; +// load src +// end load src +Fr_copy(aux_dest,&lvar[23]); +} +// need to run sub component +ctx->componentMemory[mySubcomponents[cmp_index_ref]].inputCounter -= 1; +assert(!(ctx->componentMemory[mySubcomponents[cmp_index_ref]].inputCounter)); +AbsoluteValueSubtraction_6_run(mySubcomponents[cmp_index_ref],ctx); +} +{ +PFrElement aux_dest = &signalValues[mySignalStart + 16]; +// load src +// end load src +Fr_copy(aux_dest,&ctx->signalValues[ctx->componentMemory[mySubcomponents[0]].signalStart + 0]); +} +{ +PFrElement aux_dest = &lvar[30]; +// load src +// end load src +Fr_copy(aux_dest,&circuitConstants[29]); +} +{ +PFrElement aux_dest = &signalValues[mySignalStart + 17]; +// load src +Fr_sub(&expaux[0],&lvar[25],&lvar[19]); // line circom 99 +// end load src +Fr_copy(aux_dest,&expaux[0]); +} +{ +PFrElement aux_dest = &lvar[31]; +// load src +// end load src +Fr_copy(aux_dest,&circuitConstants[4]); +} +{ +uint cmp_index_ref = 1; +{ +PFrElement aux_dest = &ctx->signalValues[ctx->componentMemory[mySubcomponents[cmp_index_ref]].signalStart + 1]; +// load src +// end load src +Fr_copy(aux_dest,&lvar[19]); +} +// no need to run sub component +ctx->componentMemory[mySubcomponents[cmp_index_ref]].inputCounter -= 1; +assert(ctx->componentMemory[mySubcomponents[cmp_index_ref]].inputCounter > 0); +} +{ +uint cmp_index_ref = 1; +{ +PFrElement aux_dest = &ctx->signalValues[ctx->componentMemory[mySubcomponents[cmp_index_ref]].signalStart + 2]; +// load src +// end load src +Fr_copy(aux_dest,&lvar[25]); +} +// need to run sub component +ctx->componentMemory[mySubcomponents[cmp_index_ref]].inputCounter -= 1; +assert(!(ctx->componentMemory[mySubcomponents[cmp_index_ref]].inputCounter)); +AbsoluteValueSubtraction_6_run(mySubcomponents[cmp_index_ref],ctx); +} +{ +PFrElement aux_dest = &signalValues[mySignalStart + 18]; +// load src +// end load src +Fr_copy(aux_dest,&ctx->signalValues[ctx->componentMemory[mySubcomponents[1]].signalStart + 0]); +} +{ +PFrElement aux_dest = &lvar[32]; +// load src +// end load src +Fr_copy(aux_dest,&circuitConstants[29]); +} +{ +PFrElement aux_dest = &signalValues[mySignalStart + 19]; +// load src +Fr_mul(&expaux[0],&signalValues[mySignalStart + 16],&signalValues[mySignalStart + 16]); // line circom 113 +// end load src +Fr_copy(aux_dest,&expaux[0]); +} +{ +PFrElement aux_dest = &lvar[33]; +// load src +// end load src +Fr_copy(aux_dest,&circuitConstants[32]); +} +{ +PFrElement aux_dest = &lvar[34]; +// load src +// end load src +Fr_copy(aux_dest,&circuitConstants[33]); +} +{ +PFrElement aux_dest = &signalValues[mySignalStart + 20]; +// load src +Fr_mul(&expaux[0],&signalValues[mySignalStart + 18],&signalValues[mySignalStart + 18]); // line circom 118 +// end load src +Fr_copy(aux_dest,&expaux[0]); +} +{ +PFrElement aux_dest = &lvar[35]; +// load src +// end load src +Fr_copy(aux_dest,&circuitConstants[32]); +} +{ +PFrElement aux_dest = &lvar[36]; +// load src +// end load src +Fr_copy(aux_dest,&circuitConstants[33]); +} +{ +PFrElement aux_dest = &signalValues[mySignalStart + 21]; +// load src +Fr_add(&expaux[0],&signalValues[mySignalStart + 19],&signalValues[mySignalStart + 20]); // line circom 123 +// end load src +Fr_copy(aux_dest,&expaux[0]); +} +{ +PFrElement aux_dest = &lvar[37]; +// load src +// end load src +Fr_copy(aux_dest,&circuitConstants[12]); +} +{ +PFrElement aux_dest = &lvar[38]; +// load src +// end load src +Fr_copy(aux_dest,&circuitConstants[7]); +} +{ +PFrElement aux_dest = &lvar[39]; +// load src +// end load src +Fr_copy(aux_dest,&circuitConstants[7]); +} +{ +uint cmp_index_ref = 2; +{ +PFrElement aux_dest = &ctx->signalValues[ctx->componentMemory[mySubcomponents[cmp_index_ref]].signalStart + 1]; +// load src +// end load src +Fr_copy(aux_dest,&signalValues[mySignalStart + 21]); +} +// no need to run sub component +ctx->componentMemory[mySubcomponents[cmp_index_ref]].inputCounter -= 1; +assert(ctx->componentMemory[mySubcomponents[cmp_index_ref]].inputCounter > 0); +} +{ +uint cmp_index_ref = 2; +{ +PFrElement aux_dest = &ctx->signalValues[ctx->componentMemory[mySubcomponents[cmp_index_ref]].signalStart + 2]; +// load src +// end load src +Fr_copy(aux_dest,&signalValues[mySignalStart + 14]); +} +// need to run sub component +ctx->componentMemory[mySubcomponents[cmp_index_ref]].inputCounter -= 1; +assert(!(ctx->componentMemory[mySubcomponents[cmp_index_ref]].inputCounter)); +LessThan_8_run(mySubcomponents[cmp_index_ref],ctx); +} +{ +uint cmp_index_ref = 3; +{ +PFrElement aux_dest = &ctx->signalValues[ctx->componentMemory[mySubcomponents[cmp_index_ref]].signalStart + 1]; +// load src +// end load src +Fr_copy(aux_dest,&signalValues[mySignalStart + 21]); +} +// no need to run sub component +ctx->componentMemory[mySubcomponents[cmp_index_ref]].inputCounter -= 1; +assert(ctx->componentMemory[mySubcomponents[cmp_index_ref]].inputCounter > 0); +} +{ +uint cmp_index_ref = 3; +{ +PFrElement aux_dest = &ctx->signalValues[ctx->componentMemory[mySubcomponents[cmp_index_ref]].signalStart + 2]; +// load src +// end load src +Fr_copy(aux_dest,&signalValues[mySignalStart + 14]); +} +// no need to run sub component +ctx->componentMemory[mySubcomponents[cmp_index_ref]].inputCounter -= 1; +assert(ctx->componentMemory[mySubcomponents[cmp_index_ref]].inputCounter > 0); +} +{ +uint cmp_index_ref = 3; +{ +PFrElement aux_dest = &ctx->signalValues[ctx->componentMemory[mySubcomponents[cmp_index_ref]].signalStart + 3]; +// load src +// end load src +Fr_copy(aux_dest,&ctx->signalValues[ctx->componentMemory[mySubcomponents[2]].signalStart + 0]); +} +// need to run sub component +ctx->componentMemory[mySubcomponents[cmp_index_ref]].inputCounter -= 1; +assert(!(ctx->componentMemory[mySubcomponents[cmp_index_ref]].inputCounter)); +Mux1_5_run(mySubcomponents[cmp_index_ref],ctx); +} +{ +PFrElement aux_dest = &signalValues[mySignalStart + 22]; +// load src +// end load src +Fr_copy(aux_dest,&ctx->signalValues[ctx->componentMemory[mySubcomponents[3]].signalStart + 0]); +} +{ +uint cmp_index_ref = 4; +{ +PFrElement aux_dest = &ctx->signalValues[ctx->componentMemory[mySubcomponents[cmp_index_ref]].signalStart + 1]; +// load src +// end load src +Fr_copy(aux_dest,&signalValues[mySignalStart + 22]); +} +// need to run sub component +ctx->componentMemory[mySubcomponents[cmp_index_ref]].inputCounter -= 1; +assert(!(ctx->componentMemory[mySubcomponents[cmp_index_ref]].inputCounter)); +Sqrt_14_run(mySubcomponents[cmp_index_ref],ctx); +} +{ +PFrElement aux_dest = &signalValues[mySignalStart + 23]; +// load src +// end load src +Fr_copy(aux_dest,&ctx->signalValues[ctx->componentMemory[mySubcomponents[4]].signalStart + 0]); +} +{ +PFrElement aux_dest = &lvar[40]; +// load src +// end load src +Fr_copy(aux_dest,&circuitConstants[1]); +} +{ +PFrElement aux_dest = &lvar[41]; +// load src +// end load src +Fr_copy(aux_dest,&circuitConstants[1]); +} +{ +PFrElement aux_dest = &lvar[42]; +// load src +// end load src +Fr_copy(aux_dest,&circuitConstants[1]); +} +{ + +// start of call bucket +FrElement lvarcall[8]; +// copying argument 0 +Fr_copy(&lvarcall[0],&circuitConstants[12]); +// end copying argument 0 +approxSqrt_0(ctx,lvarcall,myId,&lvar[40],3); +// end call bucket +} + +{ +PFrElement aux_dest = &lvar[43]; +// load src +// end load src +Fr_copy(aux_dest,&circuitConstants[13]); +} +{ +PFrElement aux_dest = &lvar[44]; +// load src +// end load src +Fr_copy(aux_dest,&circuitConstants[3]); +} +{ +PFrElement aux_dest = &signalValues[mySignalStart + 24]; +// load src +Fr_add(&expaux[1],&lvar[21],&lvar[27]); // line circom 151 +Fr_mul(&expaux[0],&expaux[1],&circuitConstants[34]); // line circom 151 +// end load src +Fr_copy(aux_dest,&expaux[0]); +} +{ +uint cmp_index_ref = 5; +{ +PFrElement aux_dest = &ctx->signalValues[ctx->componentMemory[mySubcomponents[cmp_index_ref]].signalStart + 1]; +// load src +// end load src +Fr_copy(aux_dest,&lvar[21]); +} +// need to run sub component +ctx->componentMemory[mySubcomponents[cmp_index_ref]].inputCounter -= 1; +assert(!(ctx->componentMemory[mySubcomponents[cmp_index_ref]].inputCounter)); +IsZero_1_run(mySubcomponents[cmp_index_ref],ctx); +} +{ +uint cmp_index_ref = 6; +{ +PFrElement aux_dest = &ctx->signalValues[ctx->componentMemory[mySubcomponents[cmp_index_ref]].signalStart + 1]; +// load src +// end load src +Fr_copy(aux_dest,&signalValues[mySignalStart + 24]); +} +// no need to run sub component +ctx->componentMemory[mySubcomponents[cmp_index_ref]].inputCounter -= 1; +assert(ctx->componentMemory[mySubcomponents[cmp_index_ref]].inputCounter > 0); +} +{ +uint cmp_index_ref = 6; +{ +PFrElement aux_dest = &ctx->signalValues[ctx->componentMemory[mySubcomponents[cmp_index_ref]].signalStart + 2]; +// load src +// end load src +Fr_copy(aux_dest,&circuitConstants[1]); +} +// no need to run sub component +ctx->componentMemory[mySubcomponents[cmp_index_ref]].inputCounter -= 1; +assert(ctx->componentMemory[mySubcomponents[cmp_index_ref]].inputCounter > 0); +} +{ +uint cmp_index_ref = 6; +{ +PFrElement aux_dest = &ctx->signalValues[ctx->componentMemory[mySubcomponents[cmp_index_ref]].signalStart + 3]; +// load src +// end load src +Fr_copy(aux_dest,&ctx->signalValues[ctx->componentMemory[mySubcomponents[5]].signalStart + 0]); +} +// need to run sub component +ctx->componentMemory[mySubcomponents[cmp_index_ref]].inputCounter -= 1; +assert(!(ctx->componentMemory[mySubcomponents[cmp_index_ref]].inputCounter)); +Mux1_5_run(mySubcomponents[cmp_index_ref],ctx); +} +{ +uint cmp_index_ref = 7; +{ +PFrElement aux_dest = &ctx->signalValues[ctx->componentMemory[mySubcomponents[cmp_index_ref]].signalStart + 1]; +// load src +// end load src +Fr_copy(aux_dest,&lvar[27]); +} +// need to run sub component +ctx->componentMemory[mySubcomponents[cmp_index_ref]].inputCounter -= 1; +assert(!(ctx->componentMemory[mySubcomponents[cmp_index_ref]].inputCounter)); +IsZero_1_run(mySubcomponents[cmp_index_ref],ctx); +} +{ +uint cmp_index_ref = 8; +{ +PFrElement aux_dest = &ctx->signalValues[ctx->componentMemory[mySubcomponents[cmp_index_ref]].signalStart + 1]; +// load src +// end load src +Fr_copy(aux_dest,&ctx->signalValues[ctx->componentMemory[mySubcomponents[6]].signalStart + 0]); +} +// no need to run sub component +ctx->componentMemory[mySubcomponents[cmp_index_ref]].inputCounter -= 1; +assert(ctx->componentMemory[mySubcomponents[cmp_index_ref]].inputCounter > 0); +} +{ +uint cmp_index_ref = 8; +{ +PFrElement aux_dest = &ctx->signalValues[ctx->componentMemory[mySubcomponents[cmp_index_ref]].signalStart + 2]; +// load src +// end load src +Fr_copy(aux_dest,&circuitConstants[1]); +} +// no need to run sub component +ctx->componentMemory[mySubcomponents[cmp_index_ref]].inputCounter -= 1; +assert(ctx->componentMemory[mySubcomponents[cmp_index_ref]].inputCounter > 0); +} +{ +uint cmp_index_ref = 8; +{ +PFrElement aux_dest = &ctx->signalValues[ctx->componentMemory[mySubcomponents[cmp_index_ref]].signalStart + 3]; +// load src +// end load src +Fr_copy(aux_dest,&ctx->signalValues[ctx->componentMemory[mySubcomponents[7]].signalStart + 0]); +} +// need to run sub component +ctx->componentMemory[mySubcomponents[cmp_index_ref]].inputCounter -= 1; +assert(!(ctx->componentMemory[mySubcomponents[cmp_index_ref]].inputCounter)); +Mux1_5_run(mySubcomponents[cmp_index_ref],ctx); +} +{ +PFrElement aux_dest = &signalValues[mySignalStart + 25]; +// load src +// end load src +Fr_copy(aux_dest,&ctx->signalValues[ctx->componentMemory[mySubcomponents[8]].signalStart + 0]); +} +{ +PFrElement aux_dest = &signalValues[mySignalStart + 26]; +// load src +Fr_mul(&expaux[0],&signalValues[mySignalStart + 22],&circuitConstants[0]); // line circom 174 +// end load src +Fr_copy(aux_dest,&expaux[0]); +} +{ +PFrElement aux_dest = &signalValues[mySignalStart + 27]; +// load src +Fr_mul(&expaux[1],&circuitConstants[22],&signalValues[mySignalStart + 25]); // line circom 178 +Fr_mul(&expaux[0],&expaux[1],&circuitConstants[19]); // line circom 178 +// end load src +Fr_copy(aux_dest,&expaux[0]); +} +{ +PFrElement aux_dest = &signalValues[mySignalStart + 28]; +// load src +Fr_mul(&expaux[0],&signalValues[mySignalStart + 26],&signalValues[mySignalStart + 23]); // line circom 181 +// end load src +Fr_copy(aux_dest,&expaux[0]); +} +{ +PFrElement aux_dest = &signalValues[mySignalStart + 29]; +// load src +Fr_mul(&expaux[0],&signalValues[mySignalStart + 16],&signalValues[mySignalStart + 27]); // line circom 184 +// end load src +Fr_copy(aux_dest,&expaux[0]); +} +{ +uint cmp_index_ref = 9; +{ +PFrElement aux_dest = &ctx->signalValues[ctx->componentMemory[mySubcomponents[cmp_index_ref]].signalStart + 1]; +// load src +// end load src +Fr_copy(aux_dest,&signalValues[mySignalStart + 29]); +} +// no need to run sub component +ctx->componentMemory[mySubcomponents[cmp_index_ref]].inputCounter -= 1; +assert(ctx->componentMemory[mySubcomponents[cmp_index_ref]].inputCounter > 0); +} +{ +uint cmp_index_ref = 9; +{ +PFrElement aux_dest = &ctx->signalValues[ctx->componentMemory[mySubcomponents[cmp_index_ref]].signalStart + 2]; +// load src +// end load src +Fr_copy(aux_dest,&signalValues[mySignalStart + 28]); +} +// need to run sub component +ctx->componentMemory[mySubcomponents[cmp_index_ref]].inputCounter -= 1; +assert(!(ctx->componentMemory[mySubcomponents[cmp_index_ref]].inputCounter)); +Div_18_run(mySubcomponents[cmp_index_ref],ctx); +} +{ +PFrElement aux_dest = &signalValues[mySignalStart + 30]; +// load src +// end load src +Fr_copy(aux_dest,&ctx->signalValues[ctx->componentMemory[mySubcomponents[9]].signalStart + 0]); +} +{ +uint cmp_index_ref = 10; +{ +PFrElement aux_dest = &ctx->signalValues[ctx->componentMemory[mySubcomponents[cmp_index_ref]].signalStart + 1]; +// load src +Fr_add(&expaux[0],&signalValues[mySignalStart + 16],&signalValues[mySignalStart + 15]); // line circom 195 +// end load src +Fr_copy(aux_dest,&expaux[0]); +} +// need to run sub component +ctx->componentMemory[mySubcomponents[cmp_index_ref]].inputCounter -= 1; +assert(!(ctx->componentMemory[mySubcomponents[cmp_index_ref]].inputCounter)); +IsZero_1_run(mySubcomponents[cmp_index_ref],ctx); +} +{ +PFrElement aux_dest = &signalValues[mySignalStart + 0]; +// load src +// end load src +Fr_copy(aux_dest,&ctx->signalValues[ctx->componentMemory[mySubcomponents[10]].signalStart + 0]); +} +{ +PFrElement aux_dest = &signalValues[mySignalStart + 1]; +// load src +// end load src +Fr_copy(aux_dest,&signalValues[mySignalStart + 30]); +} +{ +PFrElement aux_dest = &signalValues[mySignalStart + 31]; +// load src +Fr_mul(&expaux[0],&signalValues[mySignalStart + 18],&signalValues[mySignalStart + 27]); // line circom 200 +// end load src +Fr_copy(aux_dest,&expaux[0]); +} +{ +uint cmp_index_ref = 11; +{ +PFrElement aux_dest = &ctx->signalValues[ctx->componentMemory[mySubcomponents[cmp_index_ref]].signalStart + 1]; +// load src +// end load src +Fr_copy(aux_dest,&signalValues[mySignalStart + 31]); +} +// no need to run sub component +ctx->componentMemory[mySubcomponents[cmp_index_ref]].inputCounter -= 1; +assert(ctx->componentMemory[mySubcomponents[cmp_index_ref]].inputCounter > 0); +} +{ +uint cmp_index_ref = 11; +{ +PFrElement aux_dest = &ctx->signalValues[ctx->componentMemory[mySubcomponents[cmp_index_ref]].signalStart + 2]; +// load src +// end load src +Fr_copy(aux_dest,&signalValues[mySignalStart + 28]); +} +// need to run sub component +ctx->componentMemory[mySubcomponents[cmp_index_ref]].inputCounter -= 1; +assert(!(ctx->componentMemory[mySubcomponents[cmp_index_ref]].inputCounter)); +Div_18_run(mySubcomponents[cmp_index_ref],ctx); +} +{ +PFrElement aux_dest = &signalValues[mySignalStart + 32]; +// load src +// end load src +Fr_copy(aux_dest,&ctx->signalValues[ctx->componentMemory[mySubcomponents[11]].signalStart + 0]); +} +{ +uint cmp_index_ref = 12; +{ +PFrElement aux_dest = &ctx->signalValues[ctx->componentMemory[mySubcomponents[cmp_index_ref]].signalStart + 1]; +// load src +Fr_add(&expaux[0],&signalValues[mySignalStart + 18],&signalValues[mySignalStart + 17]); // line circom 213 +// end load src +Fr_copy(aux_dest,&expaux[0]); +} +// need to run sub component +ctx->componentMemory[mySubcomponents[cmp_index_ref]].inputCounter -= 1; +assert(!(ctx->componentMemory[mySubcomponents[cmp_index_ref]].inputCounter)); +IsZero_1_run(mySubcomponents[cmp_index_ref],ctx); +} +{ +PFrElement aux_dest = &signalValues[mySignalStart + 2]; +// load src +// end load src +Fr_copy(aux_dest,&ctx->signalValues[ctx->componentMemory[mySubcomponents[12]].signalStart + 0]); +} +{ +PFrElement aux_dest = &signalValues[mySignalStart + 3]; +// load src +// end load src +Fr_copy(aux_dest,&signalValues[mySignalStart + 32]); +} +for (uint i = 0; i < 13; i++){ +uint index_subc = ctx->componentMemory[ctx_index].subcomponents[i]; +if (index_subc != 0)release_memory_component(ctx,index_subc); +} +} + +void Num2Bits_20_create(uint soffset,uint coffset,Circom_CalcWit* ctx,std::string componentName,uint componentFather){ +ctx->componentMemory[coffset].templateId = 20; +ctx->componentMemory[coffset].templateName = "Num2Bits"; +ctx->componentMemory[coffset].signalStart = soffset; +ctx->componentMemory[coffset].inputCounter = 1; +ctx->componentMemory[coffset].componentName = componentName; +ctx->componentMemory[coffset].idFather = componentFather; +ctx->componentMemory[coffset].subcomponents = new uint[0]; +} + +void Num2Bits_20_run(uint ctx_index,Circom_CalcWit* ctx){ +FrElement* signalValues = ctx->signalValues; +u64 mySignalStart = ctx->componentMemory[ctx_index].signalStart; +std::string myTemplateName = ctx->componentMemory[ctx_index].templateName; +std::string myComponentName = ctx->componentMemory[ctx_index].componentName; +u64 myFather = ctx->componentMemory[ctx_index].idFather; +u64 myId = ctx_index; +u32* mySubcomponents = ctx->componentMemory[ctx_index].subcomponents; +bool* mySubcomponentsParallel = ctx->componentMemory[ctx_index].subcomponentsParallel; +FrElement* circuitConstants = ctx->circuitConstants; +std::string* listOfTemplateMessages = ctx->listOfTemplateMessages; +FrElement expaux[6]; +FrElement lvar[4]; +uint sub_component_aux; +uint index_multiple_eq; +{ +PFrElement aux_dest = &lvar[0]; +// load src +// end load src +Fr_copy(aux_dest,&circuitConstants[35]); +} +{ +PFrElement aux_dest = &lvar[1]; +// load src +// end load src +Fr_copy(aux_dest,&circuitConstants[1]); +} +{ +PFrElement aux_dest = &lvar[2]; +// load src +// end load src +Fr_copy(aux_dest,&circuitConstants[2]); +} +{ +PFrElement aux_dest = &lvar[3]; +// load src +// end load src +Fr_copy(aux_dest,&circuitConstants[1]); +} +Fr_lt(&expaux[0],&lvar[3],&circuitConstants[35]); // line circom 31 +while(Fr_isTrue(&expaux[0])){ +{ +PFrElement aux_dest = &signalValues[mySignalStart + ((1 * Fr_toInt(&lvar[3])) + 0)]; +// load src +Fr_shr(&expaux[1],&signalValues[mySignalStart + 72],&lvar[3]); // line circom 32 +Fr_band(&expaux[0],&expaux[1],&circuitConstants[2]); // line circom 32 +// end load src +Fr_copy(aux_dest,&expaux[0]); +} +Fr_sub(&expaux[3],&signalValues[mySignalStart + ((1 * Fr_toInt(&lvar[3])) + 0)],&circuitConstants[2]); // line circom 33 +Fr_mul(&expaux[1],&signalValues[mySignalStart + ((1 * Fr_toInt(&lvar[3])) + 0)],&expaux[3]); // line circom 33 +Fr_eq(&expaux[0],&expaux[1],&circuitConstants[1]); // line circom 33 +if (!Fr_isTrue(&expaux[0])) std::cout << "Failed assert in template/function " << myTemplateName << " line 33. " << "Followed trace of components: " << ctx->getTrace(myId) << std::endl; +assert(Fr_isTrue(&expaux[0])); +{ +PFrElement aux_dest = &lvar[1]; +// load src +Fr_mul(&expaux[2],&signalValues[mySignalStart + ((1 * Fr_toInt(&lvar[3])) + 0)],&lvar[2]); // line circom 34 +Fr_add(&expaux[0],&lvar[1],&expaux[2]); // line circom 34 +// end load src +Fr_copy(aux_dest,&expaux[0]); +} +{ +PFrElement aux_dest = &lvar[2]; +// load src +Fr_add(&expaux[0],&lvar[2],&lvar[2]); // line circom 35 +// end load src +Fr_copy(aux_dest,&expaux[0]); +} +{ +PFrElement aux_dest = &lvar[3]; +// load src +Fr_add(&expaux[0],&lvar[3],&circuitConstants[2]); // line circom 31 +// end load src +Fr_copy(aux_dest,&expaux[0]); +} +Fr_lt(&expaux[0],&lvar[3],&circuitConstants[35]); // line circom 31 +} +Fr_eq(&expaux[0],&lvar[1],&signalValues[mySignalStart + 72]); // line circom 38 +if (!Fr_isTrue(&expaux[0])) std::cout << "Failed assert in template/function " << myTemplateName << " line 38. " << "Followed trace of components: " << ctx->getTrace(myId) << std::endl; +assert(Fr_isTrue(&expaux[0])); +for (uint i = 0; i < 0; i++){ +uint index_subc = ctx->componentMemory[ctx_index].subcomponents[i]; +if (index_subc != 0)release_memory_component(ctx,index_subc); +} +} + +void LessThan_21_create(uint soffset,uint coffset,Circom_CalcWit* ctx,std::string componentName,uint componentFather){ +ctx->componentMemory[coffset].templateId = 21; +ctx->componentMemory[coffset].templateName = "LessThan"; +ctx->componentMemory[coffset].signalStart = soffset; +ctx->componentMemory[coffset].inputCounter = 2; +ctx->componentMemory[coffset].componentName = componentName; +ctx->componentMemory[coffset].idFather = componentFather; +ctx->componentMemory[coffset].subcomponents = new uint[1]{0}; +} + +void LessThan_21_run(uint ctx_index,Circom_CalcWit* ctx){ +FrElement* signalValues = ctx->signalValues; +u64 mySignalStart = ctx->componentMemory[ctx_index].signalStart; +std::string myTemplateName = ctx->componentMemory[ctx_index].templateName; +std::string myComponentName = ctx->componentMemory[ctx_index].componentName; +u64 myFather = ctx->componentMemory[ctx_index].idFather; +u64 myId = ctx_index; +u32* mySubcomponents = ctx->componentMemory[ctx_index].subcomponents; +bool* mySubcomponentsParallel = ctx->componentMemory[ctx_index].subcomponentsParallel; +FrElement* circuitConstants = ctx->circuitConstants; +std::string* listOfTemplateMessages = ctx->listOfTemplateMessages; +FrElement expaux[4]; +FrElement lvar[1]; +uint sub_component_aux; +uint index_multiple_eq; +{ +PFrElement aux_dest = &lvar[0]; +// load src +// end load src +Fr_copy(aux_dest,&circuitConstants[36]); +} +{ +uint aux_create = 0; +int aux_cmp_num = 0+ctx_index+1; +uint csoffset = mySignalStart+3; +for (uint i = 0; i < 1; i++) { +std::string new_cmp_name = "n2b"; +Num2Bits_20_create(csoffset,aux_cmp_num,ctx,new_cmp_name,myId); +mySubcomponents[aux_create+i] = aux_cmp_num; +csoffset += 73 ; +aux_cmp_num += 1; +} +} +if (!Fr_isTrue(&circuitConstants[2])) std::cout << "Failed assert in template/function " << myTemplateName << " line 90. " << "Followed trace of components: " << ctx->getTrace(myId) << std::endl; +assert(Fr_isTrue(&circuitConstants[2])); +{ +uint cmp_index_ref = 0; +{ +PFrElement aux_dest = &ctx->signalValues[ctx->componentMemory[mySubcomponents[cmp_index_ref]].signalStart + 72]; +// load src +Fr_add(&expaux[1],&signalValues[mySignalStart + 1],&circuitConstants[37]); // line circom 96 +Fr_sub(&expaux[0],&expaux[1],&signalValues[mySignalStart + 2]); // line circom 96 +// end load src +Fr_copy(aux_dest,&expaux[0]); +} +// need to run sub component +ctx->componentMemory[mySubcomponents[cmp_index_ref]].inputCounter -= 1; +assert(!(ctx->componentMemory[mySubcomponents[cmp_index_ref]].inputCounter)); +Num2Bits_20_run(mySubcomponents[cmp_index_ref],ctx); +} +{ +PFrElement aux_dest = &signalValues[mySignalStart + 0]; +// load src +Fr_sub(&expaux[0],&circuitConstants[2],&ctx->signalValues[ctx->componentMemory[mySubcomponents[0]].signalStart + 71]); // line circom 98 +// end load src +Fr_copy(aux_dest,&expaux[0]); +} +for (uint i = 0; i < 1; i++){ +uint index_subc = ctx->componentMemory[ctx_index].subcomponents[i]; +if (index_subc != 0)release_memory_component(ctx,index_subc); +} +} + +void Limiter_22_create(uint soffset,uint coffset,Circom_CalcWit* ctx,std::string componentName,uint componentFather){ +ctx->componentMemory[coffset].templateId = 22; +ctx->componentMemory[coffset].templateName = "Limiter"; +ctx->componentMemory[coffset].signalStart = soffset; +ctx->componentMemory[coffset].inputCounter = 3; +ctx->componentMemory[coffset].componentName = componentName; +ctx->componentMemory[coffset].idFather = componentFather; +ctx->componentMemory[coffset].subcomponents = new uint[2]{0}; +} + +void Limiter_22_run(uint ctx_index,Circom_CalcWit* ctx){ +FrElement* signalValues = ctx->signalValues; +u64 mySignalStart = ctx->componentMemory[ctx_index].signalStart; +std::string myTemplateName = ctx->componentMemory[ctx_index].templateName; +std::string myComponentName = ctx->componentMemory[ctx_index].componentName; +u64 myFather = ctx->componentMemory[ctx_index].idFather; +u64 myId = ctx_index; +u32* mySubcomponents = ctx->componentMemory[ctx_index].subcomponents; +bool* mySubcomponentsParallel = ctx->componentMemory[ctx_index].subcomponentsParallel; +FrElement* circuitConstants = ctx->circuitConstants; +std::string* listOfTemplateMessages = ctx->listOfTemplateMessages; +FrElement expaux[2]; +FrElement lvar[1]; +uint sub_component_aux; +uint index_multiple_eq; +{ +PFrElement aux_dest = &lvar[0]; +// load src +// end load src +Fr_copy(aux_dest,&circuitConstants[36]); +} +{ +uint aux_create = 0; +int aux_cmp_num = 0+ctx_index+1; +uint csoffset = mySignalStart+4; +for (uint i = 0; i < 1; i++) { +std::string new_cmp_name = "lessThan"; +LessThan_21_create(csoffset,aux_cmp_num,ctx,new_cmp_name,myId); +mySubcomponents[aux_create+i] = aux_cmp_num; +csoffset += 76 ; +aux_cmp_num += 2; +} +} +{ +uint aux_create = 1; +int aux_cmp_num = 2+ctx_index+1; +uint csoffset = mySignalStart+80; +for (uint i = 0; i < 1; i++) { +std::string new_cmp_name = "mux"; +Mux1_5_create(csoffset,aux_cmp_num,ctx,new_cmp_name,myId); +mySubcomponents[aux_create+i] = aux_cmp_num; +csoffset += 8 ; +aux_cmp_num += 2; +} +} +{ +uint cmp_index_ref = 0; +{ +PFrElement aux_dest = &ctx->signalValues[ctx->componentMemory[mySubcomponents[cmp_index_ref]].signalStart + 1]; +// load src +// end load src +Fr_copy(aux_dest,&signalValues[mySignalStart + 1]); +} +// no need to run sub component +ctx->componentMemory[mySubcomponents[cmp_index_ref]].inputCounter -= 1; +assert(ctx->componentMemory[mySubcomponents[cmp_index_ref]].inputCounter > 0); +} +{ +uint cmp_index_ref = 0; +{ +PFrElement aux_dest = &ctx->signalValues[ctx->componentMemory[mySubcomponents[cmp_index_ref]].signalStart + 2]; +// load src +// end load src +Fr_copy(aux_dest,&signalValues[mySignalStart + 2]); +} +// need to run sub component +ctx->componentMemory[mySubcomponents[cmp_index_ref]].inputCounter -= 1; +assert(!(ctx->componentMemory[mySubcomponents[cmp_index_ref]].inputCounter)); +LessThan_21_run(mySubcomponents[cmp_index_ref],ctx); +} +{ +uint cmp_index_ref = 1; +{ +PFrElement aux_dest = &ctx->signalValues[ctx->componentMemory[mySubcomponents[cmp_index_ref]].signalStart + 1]; +// load src +// end load src +Fr_copy(aux_dest,&signalValues[mySignalStart + 3]); +} +// no need to run sub component +ctx->componentMemory[mySubcomponents[cmp_index_ref]].inputCounter -= 1; +assert(ctx->componentMemory[mySubcomponents[cmp_index_ref]].inputCounter > 0); +} +{ +uint cmp_index_ref = 1; +{ +PFrElement aux_dest = &ctx->signalValues[ctx->componentMemory[mySubcomponents[cmp_index_ref]].signalStart + 2]; +// load src +// end load src +Fr_copy(aux_dest,&signalValues[mySignalStart + 1]); +} +// no need to run sub component +ctx->componentMemory[mySubcomponents[cmp_index_ref]].inputCounter -= 1; +assert(ctx->componentMemory[mySubcomponents[cmp_index_ref]].inputCounter > 0); +} +{ +uint cmp_index_ref = 1; +{ +PFrElement aux_dest = &ctx->signalValues[ctx->componentMemory[mySubcomponents[cmp_index_ref]].signalStart + 3]; +// load src +// end load src +Fr_copy(aux_dest,&ctx->signalValues[ctx->componentMemory[mySubcomponents[0]].signalStart + 0]); +} +// need to run sub component +ctx->componentMemory[mySubcomponents[cmp_index_ref]].inputCounter -= 1; +assert(!(ctx->componentMemory[mySubcomponents[cmp_index_ref]].inputCounter)); +Mux1_5_run(mySubcomponents[cmp_index_ref],ctx); +} +{ +PFrElement aux_dest = &signalValues[mySignalStart + 0]; +// load src +// end load src +Fr_copy(aux_dest,&ctx->signalValues[ctx->componentMemory[mySubcomponents[1]].signalStart + 0]); +} +for (uint i = 0; i < 2; i++){ +uint index_subc = ctx->componentMemory[ctx_index].subcomponents[i]; +if (index_subc != 0)release_memory_component(ctx,index_subc); +} +} + +void Num2Bits_23_create(uint soffset,uint coffset,Circom_CalcWit* ctx,std::string componentName,uint componentFather){ +ctx->componentMemory[coffset].templateId = 23; +ctx->componentMemory[coffset].templateName = "Num2Bits"; +ctx->componentMemory[coffset].signalStart = soffset; +ctx->componentMemory[coffset].inputCounter = 1; +ctx->componentMemory[coffset].componentName = componentName; +ctx->componentMemory[coffset].idFather = componentFather; +ctx->componentMemory[coffset].subcomponents = new uint[0]; +} + +void Num2Bits_23_run(uint ctx_index,Circom_CalcWit* ctx){ +FrElement* signalValues = ctx->signalValues; +u64 mySignalStart = ctx->componentMemory[ctx_index].signalStart; +std::string myTemplateName = ctx->componentMemory[ctx_index].templateName; +std::string myComponentName = ctx->componentMemory[ctx_index].componentName; +u64 myFather = ctx->componentMemory[ctx_index].idFather; +u64 myId = ctx_index; +u32* mySubcomponents = ctx->componentMemory[ctx_index].subcomponents; +bool* mySubcomponentsParallel = ctx->componentMemory[ctx_index].subcomponentsParallel; +FrElement* circuitConstants = ctx->circuitConstants; +std::string* listOfTemplateMessages = ctx->listOfTemplateMessages; +FrElement expaux[6]; +FrElement lvar[4]; +uint sub_component_aux; +uint index_multiple_eq; +{ +PFrElement aux_dest = &lvar[0]; +// load src +// end load src +Fr_copy(aux_dest,&circuitConstants[23]); +} +{ +PFrElement aux_dest = &lvar[1]; +// load src +// end load src +Fr_copy(aux_dest,&circuitConstants[1]); +} +{ +PFrElement aux_dest = &lvar[2]; +// load src +// end load src +Fr_copy(aux_dest,&circuitConstants[2]); +} +{ +PFrElement aux_dest = &lvar[3]; +// load src +// end load src +Fr_copy(aux_dest,&circuitConstants[1]); +} +Fr_lt(&expaux[0],&lvar[3],&circuitConstants[23]); // line circom 31 +while(Fr_isTrue(&expaux[0])){ +{ +PFrElement aux_dest = &signalValues[mySignalStart + ((1 * Fr_toInt(&lvar[3])) + 0)]; +// load src +Fr_shr(&expaux[1],&signalValues[mySignalStart + 17],&lvar[3]); // line circom 32 +Fr_band(&expaux[0],&expaux[1],&circuitConstants[2]); // line circom 32 +// end load src +Fr_copy(aux_dest,&expaux[0]); +} +Fr_sub(&expaux[3],&signalValues[mySignalStart + ((1 * Fr_toInt(&lvar[3])) + 0)],&circuitConstants[2]); // line circom 33 +Fr_mul(&expaux[1],&signalValues[mySignalStart + ((1 * Fr_toInt(&lvar[3])) + 0)],&expaux[3]); // line circom 33 +Fr_eq(&expaux[0],&expaux[1],&circuitConstants[1]); // line circom 33 +if (!Fr_isTrue(&expaux[0])) std::cout << "Failed assert in template/function " << myTemplateName << " line 33. " << "Followed trace of components: " << ctx->getTrace(myId) << std::endl; +assert(Fr_isTrue(&expaux[0])); +{ +PFrElement aux_dest = &lvar[1]; +// load src +Fr_mul(&expaux[2],&signalValues[mySignalStart + ((1 * Fr_toInt(&lvar[3])) + 0)],&lvar[2]); // line circom 34 +Fr_add(&expaux[0],&lvar[1],&expaux[2]); // line circom 34 +// end load src +Fr_copy(aux_dest,&expaux[0]); +} +{ +PFrElement aux_dest = &lvar[2]; +// load src +Fr_add(&expaux[0],&lvar[2],&lvar[2]); // line circom 35 +// end load src +Fr_copy(aux_dest,&expaux[0]); +} +{ +PFrElement aux_dest = &lvar[3]; +// load src +Fr_add(&expaux[0],&lvar[3],&circuitConstants[2]); // line circom 31 +// end load src +Fr_copy(aux_dest,&expaux[0]); +} +Fr_lt(&expaux[0],&lvar[3],&circuitConstants[23]); // line circom 31 +} +Fr_eq(&expaux[0],&lvar[1],&signalValues[mySignalStart + 17]); // line circom 38 +if (!Fr_isTrue(&expaux[0])) std::cout << "Failed assert in template/function " << myTemplateName << " line 38. " << "Followed trace of components: " << ctx->getTrace(myId) << std::endl; +assert(Fr_isTrue(&expaux[0])); +for (uint i = 0; i < 0; i++){ +uint index_subc = ctx->componentMemory[ctx_index].subcomponents[i]; +if (index_subc != 0)release_memory_component(ctx,index_subc); +} +} + +void LessThan_24_create(uint soffset,uint coffset,Circom_CalcWit* ctx,std::string componentName,uint componentFather){ +ctx->componentMemory[coffset].templateId = 24; +ctx->componentMemory[coffset].templateName = "LessThan"; +ctx->componentMemory[coffset].signalStart = soffset; +ctx->componentMemory[coffset].inputCounter = 2; +ctx->componentMemory[coffset].componentName = componentName; +ctx->componentMemory[coffset].idFather = componentFather; +ctx->componentMemory[coffset].subcomponents = new uint[1]{0}; +} + +void LessThan_24_run(uint ctx_index,Circom_CalcWit* ctx){ +FrElement* signalValues = ctx->signalValues; +u64 mySignalStart = ctx->componentMemory[ctx_index].signalStart; +std::string myTemplateName = ctx->componentMemory[ctx_index].templateName; +std::string myComponentName = ctx->componentMemory[ctx_index].componentName; +u64 myFather = ctx->componentMemory[ctx_index].idFather; +u64 myId = ctx_index; +u32* mySubcomponents = ctx->componentMemory[ctx_index].subcomponents; +bool* mySubcomponentsParallel = ctx->componentMemory[ctx_index].subcomponentsParallel; +FrElement* circuitConstants = ctx->circuitConstants; +std::string* listOfTemplateMessages = ctx->listOfTemplateMessages; +FrElement expaux[4]; +FrElement lvar[1]; +uint sub_component_aux; +uint index_multiple_eq; +{ +PFrElement aux_dest = &lvar[0]; +// load src +// end load src +Fr_copy(aux_dest,&circuitConstants[38]); +} +{ +uint aux_create = 0; +int aux_cmp_num = 0+ctx_index+1; +uint csoffset = mySignalStart+3; +for (uint i = 0; i < 1; i++) { +std::string new_cmp_name = "n2b"; +Num2Bits_23_create(csoffset,aux_cmp_num,ctx,new_cmp_name,myId); +mySubcomponents[aux_create+i] = aux_cmp_num; +csoffset += 18 ; +aux_cmp_num += 1; +} +} +if (!Fr_isTrue(&circuitConstants[2])) std::cout << "Failed assert in template/function " << myTemplateName << " line 90. " << "Followed trace of components: " << ctx->getTrace(myId) << std::endl; +assert(Fr_isTrue(&circuitConstants[2])); +{ +uint cmp_index_ref = 0; +{ +PFrElement aux_dest = &ctx->signalValues[ctx->componentMemory[mySubcomponents[cmp_index_ref]].signalStart + 17]; +// load src +Fr_add(&expaux[1],&signalValues[mySignalStart + 1],&circuitConstants[39]); // line circom 96 +Fr_sub(&expaux[0],&expaux[1],&signalValues[mySignalStart + 2]); // line circom 96 +// end load src +Fr_copy(aux_dest,&expaux[0]); +} +// need to run sub component +ctx->componentMemory[mySubcomponents[cmp_index_ref]].inputCounter -= 1; +assert(!(ctx->componentMemory[mySubcomponents[cmp_index_ref]].inputCounter)); +Num2Bits_23_run(mySubcomponents[cmp_index_ref],ctx); +} +{ +PFrElement aux_dest = &signalValues[mySignalStart + 0]; +// load src +Fr_sub(&expaux[0],&circuitConstants[2],&ctx->signalValues[ctx->componentMemory[mySubcomponents[0]].signalStart + 16]); // line circom 98 +// end load src +Fr_copy(aux_dest,&expaux[0]); +} +for (uint i = 0; i < 1; i++){ +uint index_subc = ctx->componentMemory[ctx_index].subcomponents[i]; +if (index_subc != 0)release_memory_component(ctx,index_subc); +} +} + +void LowerLimiter_25_create(uint soffset,uint coffset,Circom_CalcWit* ctx,std::string componentName,uint componentFather){ +ctx->componentMemory[coffset].templateId = 25; +ctx->componentMemory[coffset].templateName = "LowerLimiter"; +ctx->componentMemory[coffset].signalStart = soffset; +ctx->componentMemory[coffset].inputCounter = 3; +ctx->componentMemory[coffset].componentName = componentName; +ctx->componentMemory[coffset].idFather = componentFather; +ctx->componentMemory[coffset].subcomponents = new uint[2]{0}; +} + +void LowerLimiter_25_run(uint ctx_index,Circom_CalcWit* ctx){ +FrElement* signalValues = ctx->signalValues; +u64 mySignalStart = ctx->componentMemory[ctx_index].signalStart; +std::string myTemplateName = ctx->componentMemory[ctx_index].templateName; +std::string myComponentName = ctx->componentMemory[ctx_index].componentName; +u64 myFather = ctx->componentMemory[ctx_index].idFather; +u64 myId = ctx_index; +u32* mySubcomponents = ctx->componentMemory[ctx_index].subcomponents; +bool* mySubcomponentsParallel = ctx->componentMemory[ctx_index].subcomponentsParallel; +FrElement* circuitConstants = ctx->circuitConstants; +std::string* listOfTemplateMessages = ctx->listOfTemplateMessages; +FrElement expaux[2]; +FrElement lvar[1]; +uint sub_component_aux; +uint index_multiple_eq; +{ +PFrElement aux_dest = &lvar[0]; +// load src +// end load src +Fr_copy(aux_dest,&circuitConstants[38]); +} +{ +uint aux_create = 0; +int aux_cmp_num = 0+ctx_index+1; +uint csoffset = mySignalStart+4; +for (uint i = 0; i < 1; i++) { +std::string new_cmp_name = "lessThan"; +LessThan_24_create(csoffset,aux_cmp_num,ctx,new_cmp_name,myId); +mySubcomponents[aux_create+i] = aux_cmp_num; +csoffset += 21 ; +aux_cmp_num += 2; +} +} +{ +uint aux_create = 1; +int aux_cmp_num = 2+ctx_index+1; +uint csoffset = mySignalStart+25; +for (uint i = 0; i < 1; i++) { +std::string new_cmp_name = "mux"; +Mux1_5_create(csoffset,aux_cmp_num,ctx,new_cmp_name,myId); +mySubcomponents[aux_create+i] = aux_cmp_num; +csoffset += 8 ; +aux_cmp_num += 2; +} +} +{ +uint cmp_index_ref = 0; +{ +PFrElement aux_dest = &ctx->signalValues[ctx->componentMemory[mySubcomponents[cmp_index_ref]].signalStart + 1]; +// load src +// end load src +Fr_copy(aux_dest,&signalValues[mySignalStart + 2]); +} +// no need to run sub component +ctx->componentMemory[mySubcomponents[cmp_index_ref]].inputCounter -= 1; +assert(ctx->componentMemory[mySubcomponents[cmp_index_ref]].inputCounter > 0); +} +{ +uint cmp_index_ref = 0; +{ +PFrElement aux_dest = &ctx->signalValues[ctx->componentMemory[mySubcomponents[cmp_index_ref]].signalStart + 2]; +// load src +// end load src +Fr_copy(aux_dest,&signalValues[mySignalStart + 1]); +} +// need to run sub component +ctx->componentMemory[mySubcomponents[cmp_index_ref]].inputCounter -= 1; +assert(!(ctx->componentMemory[mySubcomponents[cmp_index_ref]].inputCounter)); +LessThan_24_run(mySubcomponents[cmp_index_ref],ctx); +} +{ +uint cmp_index_ref = 1; +{ +PFrElement aux_dest = &ctx->signalValues[ctx->componentMemory[mySubcomponents[cmp_index_ref]].signalStart + 1]; +// load src +// end load src +Fr_copy(aux_dest,&signalValues[mySignalStart + 3]); +} +// no need to run sub component +ctx->componentMemory[mySubcomponents[cmp_index_ref]].inputCounter -= 1; +assert(ctx->componentMemory[mySubcomponents[cmp_index_ref]].inputCounter > 0); +} +{ +uint cmp_index_ref = 1; +{ +PFrElement aux_dest = &ctx->signalValues[ctx->componentMemory[mySubcomponents[cmp_index_ref]].signalStart + 2]; +// load src +// end load src +Fr_copy(aux_dest,&signalValues[mySignalStart + 1]); +} +// no need to run sub component +ctx->componentMemory[mySubcomponents[cmp_index_ref]].inputCounter -= 1; +assert(ctx->componentMemory[mySubcomponents[cmp_index_ref]].inputCounter > 0); +} +{ +uint cmp_index_ref = 1; +{ +PFrElement aux_dest = &ctx->signalValues[ctx->componentMemory[mySubcomponents[cmp_index_ref]].signalStart + 3]; +// load src +// end load src +Fr_copy(aux_dest,&ctx->signalValues[ctx->componentMemory[mySubcomponents[0]].signalStart + 0]); +} +// need to run sub component +ctx->componentMemory[mySubcomponents[cmp_index_ref]].inputCounter -= 1; +assert(!(ctx->componentMemory[mySubcomponents[cmp_index_ref]].inputCounter)); +Mux1_5_run(mySubcomponents[cmp_index_ref],ctx); +} +{ +PFrElement aux_dest = &signalValues[mySignalStart + 0]; +// load src +// end load src +Fr_copy(aux_dest,&ctx->signalValues[ctx->componentMemory[mySubcomponents[1]].signalStart + 0]); +} +for (uint i = 0; i < 2; i++){ +uint index_subc = ctx->componentMemory[ctx_index].subcomponents[i]; +if (index_subc != 0)release_memory_component(ctx,index_subc); +} +} + +void LessThan_26_create(uint soffset,uint coffset,Circom_CalcWit* ctx,std::string componentName,uint componentFather){ +ctx->componentMemory[coffset].templateId = 26; +ctx->componentMemory[coffset].templateName = "LessThan"; +ctx->componentMemory[coffset].signalStart = soffset; +ctx->componentMemory[coffset].inputCounter = 2; +ctx->componentMemory[coffset].componentName = componentName; +ctx->componentMemory[coffset].idFather = componentFather; +ctx->componentMemory[coffset].subcomponents = new uint[1]{0}; +} + +void LessThan_26_run(uint ctx_index,Circom_CalcWit* ctx){ +FrElement* signalValues = ctx->signalValues; +u64 mySignalStart = ctx->componentMemory[ctx_index].signalStart; +std::string myTemplateName = ctx->componentMemory[ctx_index].templateName; +std::string myComponentName = ctx->componentMemory[ctx_index].componentName; +u64 myFather = ctx->componentMemory[ctx_index].idFather; +u64 myId = ctx_index; +u32* mySubcomponents = ctx->componentMemory[ctx_index].subcomponents; +bool* mySubcomponentsParallel = ctx->componentMemory[ctx_index].subcomponentsParallel; +FrElement* circuitConstants = ctx->circuitConstants; +std::string* listOfTemplateMessages = ctx->listOfTemplateMessages; +FrElement expaux[4]; +FrElement lvar[1]; +uint sub_component_aux; +uint index_multiple_eq; +{ +PFrElement aux_dest = &lvar[0]; +// load src +// end load src +Fr_copy(aux_dest,&circuitConstants[4]); +} +{ +uint aux_create = 0; +int aux_cmp_num = 0+ctx_index+1; +uint csoffset = mySignalStart+3; +for (uint i = 0; i < 1; i++) { +std::string new_cmp_name = "n2b"; +Num2Bits_2_create(csoffset,aux_cmp_num,ctx,new_cmp_name,myId); +mySubcomponents[aux_create+i] = aux_cmp_num; +csoffset += 22 ; +aux_cmp_num += 1; +} +} +if (!Fr_isTrue(&circuitConstants[2])) std::cout << "Failed assert in template/function " << myTemplateName << " line 90. " << "Followed trace of components: " << ctx->getTrace(myId) << std::endl; +assert(Fr_isTrue(&circuitConstants[2])); +{ +uint cmp_index_ref = 0; +{ +PFrElement aux_dest = &ctx->signalValues[ctx->componentMemory[mySubcomponents[cmp_index_ref]].signalStart + 21]; +// load src +Fr_add(&expaux[1],&signalValues[mySignalStart + 1],&circuitConstants[5]); // line circom 96 +Fr_sub(&expaux[0],&expaux[1],&signalValues[mySignalStart + 2]); // line circom 96 +// end load src +Fr_copy(aux_dest,&expaux[0]); +} +// need to run sub component +ctx->componentMemory[mySubcomponents[cmp_index_ref]].inputCounter -= 1; +assert(!(ctx->componentMemory[mySubcomponents[cmp_index_ref]].inputCounter)); +Num2Bits_2_run(mySubcomponents[cmp_index_ref],ctx); +} +{ +PFrElement aux_dest = &signalValues[mySignalStart + 0]; +// load src +Fr_sub(&expaux[0],&circuitConstants[2],&ctx->signalValues[ctx->componentMemory[mySubcomponents[0]].signalStart + 20]); // line circom 98 +// end load src +Fr_copy(aux_dest,&expaux[0]); +} +for (uint i = 0; i < 1; i++){ +uint index_subc = ctx->componentMemory[ctx_index].subcomponents[i]; +if (index_subc != 0)release_memory_component(ctx,index_subc); +} +} + +void Limiter_27_create(uint soffset,uint coffset,Circom_CalcWit* ctx,std::string componentName,uint componentFather){ +ctx->componentMemory[coffset].templateId = 27; +ctx->componentMemory[coffset].templateName = "Limiter"; +ctx->componentMemory[coffset].signalStart = soffset; +ctx->componentMemory[coffset].inputCounter = 3; +ctx->componentMemory[coffset].componentName = componentName; +ctx->componentMemory[coffset].idFather = componentFather; +ctx->componentMemory[coffset].subcomponents = new uint[2]{0}; +} + +void Limiter_27_run(uint ctx_index,Circom_CalcWit* ctx){ +FrElement* signalValues = ctx->signalValues; +u64 mySignalStart = ctx->componentMemory[ctx_index].signalStart; +std::string myTemplateName = ctx->componentMemory[ctx_index].templateName; +std::string myComponentName = ctx->componentMemory[ctx_index].componentName; +u64 myFather = ctx->componentMemory[ctx_index].idFather; +u64 myId = ctx_index; +u32* mySubcomponents = ctx->componentMemory[ctx_index].subcomponents; +bool* mySubcomponentsParallel = ctx->componentMemory[ctx_index].subcomponentsParallel; +FrElement* circuitConstants = ctx->circuitConstants; +std::string* listOfTemplateMessages = ctx->listOfTemplateMessages; +FrElement expaux[2]; +FrElement lvar[1]; +uint sub_component_aux; +uint index_multiple_eq; +{ +PFrElement aux_dest = &lvar[0]; +// load src +// end load src +Fr_copy(aux_dest,&circuitConstants[4]); +} +{ +uint aux_create = 0; +int aux_cmp_num = 0+ctx_index+1; +uint csoffset = mySignalStart+4; +for (uint i = 0; i < 1; i++) { +std::string new_cmp_name = "lessThan"; +LessThan_26_create(csoffset,aux_cmp_num,ctx,new_cmp_name,myId); +mySubcomponents[aux_create+i] = aux_cmp_num; +csoffset += 25 ; +aux_cmp_num += 2; +} +} +{ +uint aux_create = 1; +int aux_cmp_num = 2+ctx_index+1; +uint csoffset = mySignalStart+29; +for (uint i = 0; i < 1; i++) { +std::string new_cmp_name = "mux"; +Mux1_5_create(csoffset,aux_cmp_num,ctx,new_cmp_name,myId); +mySubcomponents[aux_create+i] = aux_cmp_num; +csoffset += 8 ; +aux_cmp_num += 2; +} +} +{ +uint cmp_index_ref = 0; +{ +PFrElement aux_dest = &ctx->signalValues[ctx->componentMemory[mySubcomponents[cmp_index_ref]].signalStart + 1]; +// load src +// end load src +Fr_copy(aux_dest,&signalValues[mySignalStart + 1]); +} +// no need to run sub component +ctx->componentMemory[mySubcomponents[cmp_index_ref]].inputCounter -= 1; +assert(ctx->componentMemory[mySubcomponents[cmp_index_ref]].inputCounter > 0); +} +{ +uint cmp_index_ref = 0; +{ +PFrElement aux_dest = &ctx->signalValues[ctx->componentMemory[mySubcomponents[cmp_index_ref]].signalStart + 2]; +// load src +// end load src +Fr_copy(aux_dest,&signalValues[mySignalStart + 2]); +} +// need to run sub component +ctx->componentMemory[mySubcomponents[cmp_index_ref]].inputCounter -= 1; +assert(!(ctx->componentMemory[mySubcomponents[cmp_index_ref]].inputCounter)); +LessThan_26_run(mySubcomponents[cmp_index_ref],ctx); +} +{ +uint cmp_index_ref = 1; +{ +PFrElement aux_dest = &ctx->signalValues[ctx->componentMemory[mySubcomponents[cmp_index_ref]].signalStart + 1]; +// load src +// end load src +Fr_copy(aux_dest,&signalValues[mySignalStart + 3]); +} +// no need to run sub component +ctx->componentMemory[mySubcomponents[cmp_index_ref]].inputCounter -= 1; +assert(ctx->componentMemory[mySubcomponents[cmp_index_ref]].inputCounter > 0); +} +{ +uint cmp_index_ref = 1; +{ +PFrElement aux_dest = &ctx->signalValues[ctx->componentMemory[mySubcomponents[cmp_index_ref]].signalStart + 2]; +// load src +// end load src +Fr_copy(aux_dest,&signalValues[mySignalStart + 1]); +} +// no need to run sub component +ctx->componentMemory[mySubcomponents[cmp_index_ref]].inputCounter -= 1; +assert(ctx->componentMemory[mySubcomponents[cmp_index_ref]].inputCounter > 0); +} +{ +uint cmp_index_ref = 1; +{ +PFrElement aux_dest = &ctx->signalValues[ctx->componentMemory[mySubcomponents[cmp_index_ref]].signalStart + 3]; +// load src +// end load src +Fr_copy(aux_dest,&ctx->signalValues[ctx->componentMemory[mySubcomponents[0]].signalStart + 0]); +} +// need to run sub component +ctx->componentMemory[mySubcomponents[cmp_index_ref]].inputCounter -= 1; +assert(!(ctx->componentMemory[mySubcomponents[cmp_index_ref]].inputCounter)); +Mux1_5_run(mySubcomponents[cmp_index_ref],ctx); +} +{ +PFrElement aux_dest = &signalValues[mySignalStart + 0]; +// load src +// end load src +Fr_copy(aux_dest,&ctx->signalValues[ctx->componentMemory[mySubcomponents[1]].signalStart + 0]); +} +for (uint i = 0; i < 2; i++){ +uint index_subc = ctx->componentMemory[ctx_index].subcomponents[i]; +if (index_subc != 0)release_memory_component(ctx,index_subc); +} +} + +void LowerLimiter_28_create(uint soffset,uint coffset,Circom_CalcWit* ctx,std::string componentName,uint componentFather){ +ctx->componentMemory[coffset].templateId = 28; +ctx->componentMemory[coffset].templateName = "LowerLimiter"; +ctx->componentMemory[coffset].signalStart = soffset; +ctx->componentMemory[coffset].inputCounter = 3; +ctx->componentMemory[coffset].componentName = componentName; +ctx->componentMemory[coffset].idFather = componentFather; +ctx->componentMemory[coffset].subcomponents = new uint[2]{0}; +} + +void LowerLimiter_28_run(uint ctx_index,Circom_CalcWit* ctx){ +FrElement* signalValues = ctx->signalValues; +u64 mySignalStart = ctx->componentMemory[ctx_index].signalStart; +std::string myTemplateName = ctx->componentMemory[ctx_index].templateName; +std::string myComponentName = ctx->componentMemory[ctx_index].componentName; +u64 myFather = ctx->componentMemory[ctx_index].idFather; +u64 myId = ctx_index; +u32* mySubcomponents = ctx->componentMemory[ctx_index].subcomponents; +bool* mySubcomponentsParallel = ctx->componentMemory[ctx_index].subcomponentsParallel; +FrElement* circuitConstants = ctx->circuitConstants; +std::string* listOfTemplateMessages = ctx->listOfTemplateMessages; +FrElement expaux[2]; +FrElement lvar[1]; +uint sub_component_aux; +uint index_multiple_eq; +{ +PFrElement aux_dest = &lvar[0]; +// load src +// end load src +Fr_copy(aux_dest,&circuitConstants[4]); +} +{ +uint aux_create = 0; +int aux_cmp_num = 0+ctx_index+1; +uint csoffset = mySignalStart+4; +for (uint i = 0; i < 1; i++) { +std::string new_cmp_name = "lessThan"; +LessThan_26_create(csoffset,aux_cmp_num,ctx,new_cmp_name,myId); +mySubcomponents[aux_create+i] = aux_cmp_num; +csoffset += 25 ; +aux_cmp_num += 2; +} +} +{ +uint aux_create = 1; +int aux_cmp_num = 2+ctx_index+1; +uint csoffset = mySignalStart+29; +for (uint i = 0; i < 1; i++) { +std::string new_cmp_name = "mux"; +Mux1_5_create(csoffset,aux_cmp_num,ctx,new_cmp_name,myId); +mySubcomponents[aux_create+i] = aux_cmp_num; +csoffset += 8 ; +aux_cmp_num += 2; +} +} +{ +uint cmp_index_ref = 0; +{ +PFrElement aux_dest = &ctx->signalValues[ctx->componentMemory[mySubcomponents[cmp_index_ref]].signalStart + 1]; +// load src +// end load src +Fr_copy(aux_dest,&signalValues[mySignalStart + 2]); +} +// no need to run sub component +ctx->componentMemory[mySubcomponents[cmp_index_ref]].inputCounter -= 1; +assert(ctx->componentMemory[mySubcomponents[cmp_index_ref]].inputCounter > 0); +} +{ +uint cmp_index_ref = 0; +{ +PFrElement aux_dest = &ctx->signalValues[ctx->componentMemory[mySubcomponents[cmp_index_ref]].signalStart + 2]; +// load src +// end load src +Fr_copy(aux_dest,&signalValues[mySignalStart + 1]); +} +// need to run sub component +ctx->componentMemory[mySubcomponents[cmp_index_ref]].inputCounter -= 1; +assert(!(ctx->componentMemory[mySubcomponents[cmp_index_ref]].inputCounter)); +LessThan_26_run(mySubcomponents[cmp_index_ref],ctx); +} +{ +uint cmp_index_ref = 1; +{ +PFrElement aux_dest = &ctx->signalValues[ctx->componentMemory[mySubcomponents[cmp_index_ref]].signalStart + 1]; +// load src +// end load src +Fr_copy(aux_dest,&signalValues[mySignalStart + 3]); +} +// no need to run sub component +ctx->componentMemory[mySubcomponents[cmp_index_ref]].inputCounter -= 1; +assert(ctx->componentMemory[mySubcomponents[cmp_index_ref]].inputCounter > 0); +} +{ +uint cmp_index_ref = 1; +{ +PFrElement aux_dest = &ctx->signalValues[ctx->componentMemory[mySubcomponents[cmp_index_ref]].signalStart + 2]; +// load src +// end load src +Fr_copy(aux_dest,&signalValues[mySignalStart + 1]); +} +// no need to run sub component +ctx->componentMemory[mySubcomponents[cmp_index_ref]].inputCounter -= 1; +assert(ctx->componentMemory[mySubcomponents[cmp_index_ref]].inputCounter > 0); +} +{ +uint cmp_index_ref = 1; +{ +PFrElement aux_dest = &ctx->signalValues[ctx->componentMemory[mySubcomponents[cmp_index_ref]].signalStart + 3]; +// load src +// end load src +Fr_copy(aux_dest,&ctx->signalValues[ctx->componentMemory[mySubcomponents[0]].signalStart + 0]); +} +// need to run sub component +ctx->componentMemory[mySubcomponents[cmp_index_ref]].inputCounter -= 1; +assert(!(ctx->componentMemory[mySubcomponents[cmp_index_ref]].inputCounter)); +Mux1_5_run(mySubcomponents[cmp_index_ref],ctx); +} +{ +PFrElement aux_dest = &signalValues[mySignalStart + 0]; +// load src +// end load src +Fr_copy(aux_dest,&ctx->signalValues[ctx->componentMemory[mySubcomponents[1]].signalStart + 0]); +} +for (uint i = 0; i < 2; i++){ +uint index_subc = ctx->componentMemory[ctx_index].subcomponents[i]; +if (index_subc != 0)release_memory_component(ctx,index_subc); +} +} + +void ForceAccumulator_29_create(uint soffset,uint coffset,Circom_CalcWit* ctx,std::string componentName,uint componentFather){ +ctx->componentMemory[coffset].templateId = 29; +ctx->componentMemory[coffset].templateName = "ForceAccumulator"; +ctx->componentMemory[coffset].signalStart = soffset; +ctx->componentMemory[coffset].inputCounter = 20; +ctx->componentMemory[coffset].componentName = componentName; +ctx->componentMemory[coffset].idFather = componentFather; +ctx->componentMemory[coffset].subcomponents = new uint[66]{0}; +} + +void ForceAccumulator_29_run(uint ctx_index,Circom_CalcWit* ctx){ +FrElement* signalValues = ctx->signalValues; +u64 mySignalStart = ctx->componentMemory[ctx_index].signalStart; +std::string myTemplateName = ctx->componentMemory[ctx_index].templateName; +std::string myComponentName = ctx->componentMemory[ctx_index].componentName; +u64 myFather = ctx->componentMemory[ctx_index].idFather; +u64 myId = ctx_index; +u32* mySubcomponents = ctx->componentMemory[ctx_index].subcomponents; +bool* mySubcomponentsParallel = ctx->componentMemory[ctx_index].subcomponentsParallel; +FrElement* circuitConstants = ctx->circuitConstants; +std::string* listOfTemplateMessages = ctx->listOfTemplateMessages; +FrElement expaux[5]; +FrElement lvar[27]; +uint sub_component_aux; +uint index_multiple_eq; +{ +PFrElement aux_dest = &lvar[0]; +// load src +// end load src +Fr_copy(aux_dest,&circuitConstants[34]); +} +{ +uint aux_create = 0; +int aux_cmp_num = 0+ctx_index+1; +uint csoffset = mySignalStart+48; +uint aux_dimensions[1] = {6}; +for (uint i = 0; i < 6; i++) { +std::string new_cmp_name = "calculateForceComponent"+ctx->generate_position_array(aux_dimensions, 1, i); +CalculateForce_19_create(csoffset,aux_cmp_num,ctx,new_cmp_name,myId); +mySubcomponents[aux_create+i] = aux_cmp_num; +csoffset += 449 ; +aux_cmp_num += 54; +} +} +{ +uint aux_create = 6; +int aux_cmp_num = 332+ctx_index+1; +uint csoffset = mySignalStart+2766; +uint aux_dimensions[1] = {12}; +for (uint i = 0; i < 12; i++) { +std::string new_cmp_name = "mux"+ctx->generate_position_array(aux_dimensions, 1, i); +MultiMux1_0_create(csoffset,aux_cmp_num,ctx,new_cmp_name,myId); +mySubcomponents[aux_create+i] = aux_cmp_num; +csoffset += 7 ; +aux_cmp_num += 1; +} +} +{ +uint aux_create = 18; +int aux_cmp_num = 440+ctx_index+1; +uint csoffset = mySignalStart+3506; +uint aux_dimensions[1] = {4}; +for (uint i = 0; i < 4; i++) { +std::string new_cmp_name = "vectorLimiterX"+ctx->generate_position_array(aux_dimensions, 1, i); +Limiter_22_create(csoffset,aux_cmp_num,ctx,new_cmp_name,myId); +mySubcomponents[aux_create+i] = aux_cmp_num; +csoffset += 88 ; +aux_cmp_num += 5; +} +} +{ +uint aux_create = 22; +int aux_cmp_num = 480+ctx_index+1; +uint csoffset = mySignalStart+4210; +uint aux_dimensions[1] = {4}; +for (uint i = 0; i < 4; i++) { +std::string new_cmp_name = "vectorLowerLimiterX"+ctx->generate_position_array(aux_dimensions, 1, i); +LowerLimiter_25_create(csoffset,aux_cmp_num,ctx,new_cmp_name,myId); +mySubcomponents[aux_create+i] = aux_cmp_num; +csoffset += 33 ; +aux_cmp_num += 5; +} +} +{ +uint aux_create = 26; +int aux_cmp_num = 460+ctx_index+1; +uint csoffset = mySignalStart+3858; +uint aux_dimensions[1] = {4}; +for (uint i = 0; i < 4; i++) { +std::string new_cmp_name = "vectorLimiterY"+ctx->generate_position_array(aux_dimensions, 1, i); +Limiter_22_create(csoffset,aux_cmp_num,ctx,new_cmp_name,myId); +mySubcomponents[aux_create+i] = aux_cmp_num; +csoffset += 88 ; +aux_cmp_num += 5; +} +} +{ +uint aux_create = 30; +int aux_cmp_num = 500+ctx_index+1; +uint csoffset = mySignalStart+4342; +uint aux_dimensions[1] = {4}; +for (uint i = 0; i < 4; i++) { +std::string new_cmp_name = "vectorLowerLimiterY"+ctx->generate_position_array(aux_dimensions, 1, i); +LowerLimiter_25_create(csoffset,aux_cmp_num,ctx,new_cmp_name,myId); +mySubcomponents[aux_create+i] = aux_cmp_num; +csoffset += 33 ; +aux_cmp_num += 5; +} +} +{ +uint aux_create = 34; +int aux_cmp_num = 360+ctx_index+1; +uint csoffset = mySignalStart+2914; +uint aux_dimensions[1] = {4}; +for (uint i = 0; i < 4; i++) { +std::string new_cmp_name = "positionLimiterX"+ctx->generate_position_array(aux_dimensions, 1, i); +Limiter_27_create(csoffset,aux_cmp_num,ctx,new_cmp_name,myId); +mySubcomponents[aux_create+i] = aux_cmp_num; +csoffset += 37 ; +aux_cmp_num += 5; +} +} +{ +uint aux_create = 38; +int aux_cmp_num = 400+ctx_index+1; +uint csoffset = mySignalStart+3210; +uint aux_dimensions[1] = {4}; +for (uint i = 0; i < 4; i++) { +std::string new_cmp_name = "positionLowerLimiterX"+ctx->generate_position_array(aux_dimensions, 1, i); +LowerLimiter_28_create(csoffset,aux_cmp_num,ctx,new_cmp_name,myId); +mySubcomponents[aux_create+i] = aux_cmp_num; +csoffset += 37 ; +aux_cmp_num += 5; +} +} +{ +uint aux_create = 42; +int aux_cmp_num = 380+ctx_index+1; +uint csoffset = mySignalStart+3062; +uint aux_dimensions[1] = {4}; +for (uint i = 0; i < 4; i++) { +std::string new_cmp_name = "positionLimiterY"+ctx->generate_position_array(aux_dimensions, 1, i); +Limiter_27_create(csoffset,aux_cmp_num,ctx,new_cmp_name,myId); +mySubcomponents[aux_create+i] = aux_cmp_num; +csoffset += 37 ; +aux_cmp_num += 5; +} +} +{ +uint aux_create = 46; +int aux_cmp_num = 420+ctx_index+1; +uint csoffset = mySignalStart+3358; +uint aux_dimensions[1] = {4}; +for (uint i = 0; i < 4; i++) { +std::string new_cmp_name = "positionLowerLimiterY"+ctx->generate_position_array(aux_dimensions, 1, i); +LowerLimiter_28_create(csoffset,aux_cmp_num,ctx,new_cmp_name,myId); +mySubcomponents[aux_create+i] = aux_cmp_num; +csoffset += 37 ; +aux_cmp_num += 5; +} +} +{ +uint aux_create = 50; +int aux_cmp_num = 324+ctx_index+1; +uint csoffset = mySignalStart+2742; +uint aux_dimensions[1] = {4}; +for (uint i = 0; i < 4; i++) { +std::string new_cmp_name = "isZeroX"+ctx->generate_position_array(aux_dimensions, 1, i); +IsZero_1_create(csoffset,aux_cmp_num,ctx,new_cmp_name,myId); +mySubcomponents[aux_create+i] = aux_cmp_num; +csoffset += 3 ; +aux_cmp_num += 1; +} +} +{ +uint aux_create = 54; +int aux_cmp_num = 344+ctx_index+1; +uint csoffset = mySignalStart+2850; +uint aux_dimensions[1] = {4}; +for (uint i = 0; i < 4; i++) { +std::string new_cmp_name = "muxX"+ctx->generate_position_array(aux_dimensions, 1, i); +Mux1_5_create(csoffset,aux_cmp_num,ctx,new_cmp_name,myId); +mySubcomponents[aux_create+i] = aux_cmp_num; +csoffset += 8 ; +aux_cmp_num += 2; +} +} +{ +uint aux_create = 58; +int aux_cmp_num = 328+ctx_index+1; +uint csoffset = mySignalStart+2754; +uint aux_dimensions[1] = {4}; +for (uint i = 0; i < 4; i++) { +std::string new_cmp_name = "isZeroY"+ctx->generate_position_array(aux_dimensions, 1, i); +IsZero_1_create(csoffset,aux_cmp_num,ctx,new_cmp_name,myId); +mySubcomponents[aux_create+i] = aux_cmp_num; +csoffset += 3 ; +aux_cmp_num += 1; +} +} +{ +uint aux_create = 62; +int aux_cmp_num = 352+ctx_index+1; +uint csoffset = mySignalStart+2882; +uint aux_dimensions[1] = {4}; +for (uint i = 0; i < 4; i++) { +std::string new_cmp_name = "muxY"+ctx->generate_position_array(aux_dimensions, 1, i); +Mux1_5_create(csoffset,aux_cmp_num,ctx,new_cmp_name,myId); +mySubcomponents[aux_create+i] = aux_cmp_num; +csoffset += 8 ; +aux_cmp_num += 2; +} +} +{ +PFrElement aux_dest = &lvar[1]; +// load src +// end load src +Fr_copy(aux_dest,&circuitConstants[18]); +} +{ +PFrElement aux_dest = &lvar[2]; +// load src +// end load src +Fr_copy(aux_dest,&circuitConstants[19]); +} +{ +PFrElement aux_dest = &lvar[3]; +// load src +// end load src +Fr_copy(aux_dest,&circuitConstants[0]); +} +{ +PFrElement aux_dest = &lvar[4]; +// load src +// end load src +Fr_copy(aux_dest,&circuitConstants[4]); +} +{ +PFrElement aux_dest = &lvar[5]; +// load src +// end load src +Fr_copy(aux_dest,&circuitConstants[40]); +} +{ +PFrElement aux_dest = &lvar[6]; +// load src +// end load src +Fr_copy(aux_dest,&circuitConstants[19]); +} +{ +PFrElement aux_dest = &lvar[7]; +// load src +// end load src +Fr_copy(aux_dest,&circuitConstants[29]); +} +{ +PFrElement aux_dest = &lvar[16]; +// load src +// end load src +Fr_copy(aux_dest,&circuitConstants[1]); +} +{ +PFrElement aux_dest = &lvar[17]; +// load src +// end load src +Fr_copy(aux_dest,&circuitConstants[1]); +} +{ +PFrElement aux_dest = &lvar[8]; +// load src +// end load src +Fr_copyn(aux_dest,&lvar[16],2); +} +{ +PFrElement aux_dest = &lvar[10]; +// load src +// end load src +Fr_copyn(aux_dest,&lvar[16],2); +} +{ +PFrElement aux_dest = &lvar[12]; +// load src +// end load src +Fr_copyn(aux_dest,&lvar[16],2); +} +{ +PFrElement aux_dest = &lvar[14]; +// load src +// end load src +Fr_copyn(aux_dest,&lvar[16],2); +} +{ +PFrElement aux_dest = &lvar[18]; +// load src +// end load src +Fr_copy(aux_dest,&circuitConstants[41]); +} +{ +PFrElement aux_dest = &lvar[19]; +// load src +// end load src +Fr_copy(aux_dest,&circuitConstants[1]); +} +{ +PFrElement aux_dest = &lvar[20]; +// load src +// end load src +Fr_copy(aux_dest,&circuitConstants[1]); +} +{ +PFrElement aux_dest = &lvar[21]; +// load src +// end load src +Fr_copy(aux_dest,&circuitConstants[1]); +} +{ +PFrElement aux_dest = &lvar[22]; +// load src +// end load src +Fr_copy(aux_dest,&circuitConstants[1]); +} +{ +PFrElement aux_dest = &lvar[23]; +// load src +// end load src +Fr_copy(aux_dest,&circuitConstants[1]); +} +{ +PFrElement aux_dest = &lvar[24]; +// load src +// end load src +Fr_copy(aux_dest,&circuitConstants[42]); +} +{ +PFrElement aux_dest = &lvar[25]; +// load src +// end load src +Fr_copy(aux_dest,&circuitConstants[1]); +} +Fr_lt(&expaux[0],&lvar[25],&circuitConstants[34]); // line circom 63 +while(Fr_isTrue(&expaux[0])){ +{ +PFrElement aux_dest = &lvar[(((2 * Fr_toInt(&lvar[25])) + 0) + 8)]; +// load src +// end load src +Fr_copy(aux_dest,&circuitConstants[42]); +} +{ +PFrElement aux_dest = &lvar[(((2 * Fr_toInt(&lvar[25])) + 1) + 8)]; +// load src +// end load src +Fr_copy(aux_dest,&circuitConstants[42]); +} +{ +PFrElement aux_dest = &lvar[25]; +// load src +Fr_add(&expaux[0],&lvar[25],&circuitConstants[2]); // line circom 63 +// end load src +Fr_copy(aux_dest,&expaux[0]); +} +Fr_lt(&expaux[0],&lvar[25],&circuitConstants[34]); // line circom 63 +} +{ +PFrElement aux_dest = &lvar[25]; +// load src +// end load src +Fr_copy(aux_dest,&circuitConstants[1]); +} +Fr_lt(&expaux[0],&lvar[25],&circuitConstants[34]); // line circom 67 +while(Fr_isTrue(&expaux[0])){ +{ +PFrElement aux_dest = &signalValues[mySignalStart + (((5 * Fr_toInt(&lvar[25])) + 4) + 0)]; +// load src +// end load src +Fr_copy(aux_dest,&signalValues[mySignalStart + (((5 * Fr_toInt(&lvar[25])) + 4) + 20)]); +} +{ +PFrElement aux_dest = &lvar[26]; +// load src +Fr_add(&expaux[0],&lvar[25],&circuitConstants[2]); // line circom 70 +// end load src +Fr_copy(aux_dest,&expaux[0]); +} +Fr_lt(&expaux[0],&lvar[26],&circuitConstants[34]); // line circom 70 +while(Fr_isTrue(&expaux[0])){ +{ +uint cmp_index_ref = ((1 * Fr_toInt(&lvar[23])) + 0); +{ +PFrElement aux_dest = &ctx->signalValues[ctx->componentMemory[mySubcomponents[cmp_index_ref]].signalStart + 4]; +// load src +// end load src +Fr_copyn(aux_dest,&signalValues[mySignalStart + ((5 * Fr_toInt(&lvar[25])) + 20)],5); +} +// run sub component if needed +if(!(ctx->componentMemory[mySubcomponents[cmp_index_ref]].inputCounter -= 5)){ +CalculateForce_19_run(mySubcomponents[cmp_index_ref],ctx); + +} +} +{ +uint cmp_index_ref = ((1 * Fr_toInt(&lvar[23])) + 0); +{ +PFrElement aux_dest = &ctx->signalValues[ctx->componentMemory[mySubcomponents[cmp_index_ref]].signalStart + 9]; +// load src +// end load src +Fr_copyn(aux_dest,&signalValues[mySignalStart + ((5 * Fr_toInt(&lvar[26])) + 20)],5); +} +// run sub component if needed +if(!(ctx->componentMemory[mySubcomponents[cmp_index_ref]].inputCounter -= 5)){ +CalculateForce_19_run(mySubcomponents[cmp_index_ref],ctx); + +} +} +{ +PFrElement aux_dest = &lvar[19]; +// load src +// end load src +Fr_copyn(aux_dest,&ctx->signalValues[ctx->componentMemory[mySubcomponents[((1 * Fr_toInt(&lvar[23])) + 0)]].signalStart + 0],2); +} +{ +PFrElement aux_dest = &lvar[21]; +// load src +// end load src +Fr_copyn(aux_dest,&ctx->signalValues[ctx->componentMemory[mySubcomponents[((1 * Fr_toInt(&lvar[23])) + 0)]].signalStart + 2],2); +} +{ +uint cmp_index_ref = ((1 * Fr_toInt(&lvar[23])) + 6); +{ +PFrElement aux_dest = &ctx->signalValues[ctx->componentMemory[mySubcomponents[cmp_index_ref]].signalStart + 2]; +// load src +Fr_mul(&expaux[2],&circuitConstants[0],&lvar[20]); // line circom 87 +Fr_add(&expaux[0],&lvar[(((2 * Fr_toInt(&lvar[25])) + 0) + 8)],&expaux[2]); // line circom 87 +// end load src +Fr_copy(aux_dest,&expaux[0]); +} +// run sub component if needed +if(!(ctx->componentMemory[mySubcomponents[cmp_index_ref]].inputCounter -= 1)){ +MultiMux1_0_run(mySubcomponents[cmp_index_ref],ctx); + +} +} +{ +uint cmp_index_ref = ((1 * Fr_toInt(&lvar[23])) + 6); +{ +PFrElement aux_dest = &ctx->signalValues[ctx->componentMemory[mySubcomponents[cmp_index_ref]].signalStart + 3]; +// load src +Fr_mul(&expaux[2],&circuitConstants[0],&lvar[20]); // line circom 88 +Fr_sub(&expaux[0],&lvar[(((2 * Fr_toInt(&lvar[25])) + 0) + 8)],&expaux[2]); // line circom 88 +// end load src +Fr_copy(aux_dest,&expaux[0]); +} +// run sub component if needed +if(!(ctx->componentMemory[mySubcomponents[cmp_index_ref]].inputCounter -= 1)){ +MultiMux1_0_run(mySubcomponents[cmp_index_ref],ctx); + +} +} +{ +uint cmp_index_ref = ((1 * Fr_toInt(&lvar[23])) + 6); +{ +PFrElement aux_dest = &ctx->signalValues[ctx->componentMemory[mySubcomponents[cmp_index_ref]].signalStart + 4]; +// load src +Fr_mul(&expaux[2],&circuitConstants[0],&lvar[20]); // line circom 89 +Fr_sub(&expaux[0],&lvar[(((2 * Fr_toInt(&lvar[26])) + 0) + 8)],&expaux[2]); // line circom 89 +// end load src +Fr_copy(aux_dest,&expaux[0]); +} +// run sub component if needed +if(!(ctx->componentMemory[mySubcomponents[cmp_index_ref]].inputCounter -= 1)){ +MultiMux1_0_run(mySubcomponents[cmp_index_ref],ctx); + +} +} +{ +uint cmp_index_ref = ((1 * Fr_toInt(&lvar[23])) + 6); +{ +PFrElement aux_dest = &ctx->signalValues[ctx->componentMemory[mySubcomponents[cmp_index_ref]].signalStart + 5]; +// load src +Fr_mul(&expaux[2],&circuitConstants[0],&lvar[20]); // line circom 90 +Fr_add(&expaux[0],&lvar[(((2 * Fr_toInt(&lvar[26])) + 0) + 8)],&expaux[2]); // line circom 90 +// end load src +Fr_copy(aux_dest,&expaux[0]); +} +// run sub component if needed +if(!(ctx->componentMemory[mySubcomponents[cmp_index_ref]].inputCounter -= 1)){ +MultiMux1_0_run(mySubcomponents[cmp_index_ref],ctx); + +} +} +{ +uint cmp_index_ref = ((1 * Fr_toInt(&lvar[23])) + 6); +{ +PFrElement aux_dest = &ctx->signalValues[ctx->componentMemory[mySubcomponents[cmp_index_ref]].signalStart + 6]; +// load src +// end load src +Fr_copy(aux_dest,&lvar[19]); +} +// run sub component if needed +if(!(ctx->componentMemory[mySubcomponents[cmp_index_ref]].inputCounter -= 1)){ +MultiMux1_0_run(mySubcomponents[cmp_index_ref],ctx); + +} +} +{ +PFrElement aux_dest = &lvar[(((2 * Fr_toInt(&lvar[25])) + 0) + 8)]; +// load src +// end load src +Fr_copy(aux_dest,&ctx->signalValues[ctx->componentMemory[mySubcomponents[((1 * Fr_toInt(&lvar[23])) + 6)]].signalStart + 0]); +} +{ +PFrElement aux_dest = &lvar[(((2 * Fr_toInt(&lvar[26])) + 0) + 8)]; +// load src +// end load src +Fr_copy(aux_dest,&ctx->signalValues[ctx->componentMemory[mySubcomponents[((1 * Fr_toInt(&lvar[23])) + 6)]].signalStart + 1]); +} +{ +uint cmp_index_ref = ((1 * (6 + Fr_toInt(&lvar[23]))) + 6); +{ +PFrElement aux_dest = &ctx->signalValues[ctx->componentMemory[mySubcomponents[cmp_index_ref]].signalStart + 2]; +// load src +Fr_mul(&expaux[2],&circuitConstants[0],&lvar[22]); // line circom 97 +Fr_add(&expaux[0],&lvar[(((2 * Fr_toInt(&lvar[25])) + 1) + 8)],&expaux[2]); // line circom 97 +// end load src +Fr_copy(aux_dest,&expaux[0]); +} +// run sub component if needed +if(!(ctx->componentMemory[mySubcomponents[cmp_index_ref]].inputCounter -= 1)){ +MultiMux1_0_run(mySubcomponents[cmp_index_ref],ctx); + +} +} +{ +uint cmp_index_ref = ((1 * (6 + Fr_toInt(&lvar[23]))) + 6); +{ +PFrElement aux_dest = &ctx->signalValues[ctx->componentMemory[mySubcomponents[cmp_index_ref]].signalStart + 3]; +// load src +Fr_mul(&expaux[2],&circuitConstants[0],&lvar[22]); // line circom 98 +Fr_sub(&expaux[0],&lvar[(((2 * Fr_toInt(&lvar[25])) + 1) + 8)],&expaux[2]); // line circom 98 +// end load src +Fr_copy(aux_dest,&expaux[0]); +} +// run sub component if needed +if(!(ctx->componentMemory[mySubcomponents[cmp_index_ref]].inputCounter -= 1)){ +MultiMux1_0_run(mySubcomponents[cmp_index_ref],ctx); + +} +} +{ +uint cmp_index_ref = ((1 * (6 + Fr_toInt(&lvar[23]))) + 6); +{ +PFrElement aux_dest = &ctx->signalValues[ctx->componentMemory[mySubcomponents[cmp_index_ref]].signalStart + 4]; +// load src +Fr_mul(&expaux[2],&circuitConstants[0],&lvar[22]); // line circom 99 +Fr_sub(&expaux[0],&lvar[(((2 * Fr_toInt(&lvar[26])) + 1) + 8)],&expaux[2]); // line circom 99 +// end load src +Fr_copy(aux_dest,&expaux[0]); +} +// run sub component if needed +if(!(ctx->componentMemory[mySubcomponents[cmp_index_ref]].inputCounter -= 1)){ +MultiMux1_0_run(mySubcomponents[cmp_index_ref],ctx); + +} +} +{ +uint cmp_index_ref = ((1 * (6 + Fr_toInt(&lvar[23]))) + 6); +{ +PFrElement aux_dest = &ctx->signalValues[ctx->componentMemory[mySubcomponents[cmp_index_ref]].signalStart + 5]; +// load src +Fr_mul(&expaux[2],&circuitConstants[0],&lvar[22]); // line circom 100 +Fr_add(&expaux[0],&lvar[(((2 * Fr_toInt(&lvar[26])) + 1) + 8)],&expaux[2]); // line circom 100 +// end load src +Fr_copy(aux_dest,&expaux[0]); +} +// run sub component if needed +if(!(ctx->componentMemory[mySubcomponents[cmp_index_ref]].inputCounter -= 1)){ +MultiMux1_0_run(mySubcomponents[cmp_index_ref],ctx); + +} +} +{ +uint cmp_index_ref = ((1 * (6 + Fr_toInt(&lvar[23]))) + 6); +{ +PFrElement aux_dest = &ctx->signalValues[ctx->componentMemory[mySubcomponents[cmp_index_ref]].signalStart + 6]; +// load src +// end load src +Fr_copy(aux_dest,&lvar[21]); +} +// run sub component if needed +if(!(ctx->componentMemory[mySubcomponents[cmp_index_ref]].inputCounter -= 1)){ +MultiMux1_0_run(mySubcomponents[cmp_index_ref],ctx); + +} +} +{ +PFrElement aux_dest = &lvar[(((2 * Fr_toInt(&lvar[25])) + 1) + 8)]; +// load src +// end load src +Fr_copy(aux_dest,&ctx->signalValues[ctx->componentMemory[mySubcomponents[((1 * (6 + Fr_toInt(&lvar[23]))) + 6)]].signalStart + 0]); +} +{ +PFrElement aux_dest = &lvar[(((2 * Fr_toInt(&lvar[26])) + 1) + 8)]; +// load src +// end load src +Fr_copy(aux_dest,&ctx->signalValues[ctx->componentMemory[mySubcomponents[((1 * (6 + Fr_toInt(&lvar[23]))) + 6)]].signalStart + 1]); +} +{ +PFrElement aux_dest = &lvar[23]; +// load src +Fr_add(&expaux[0],&lvar[23],&circuitConstants[2]); // line circom 105 +// end load src +Fr_copy(aux_dest,&expaux[0]); +} +{ +PFrElement aux_dest = &lvar[26]; +// load src +Fr_add(&expaux[0],&lvar[26],&circuitConstants[2]); // line circom 70 +// end load src +Fr_copy(aux_dest,&expaux[0]); +} +Fr_lt(&expaux[0],&lvar[26],&circuitConstants[34]); // line circom 70 +} +{ +PFrElement aux_dest = &lvar[25]; +// load src +Fr_add(&expaux[0],&lvar[25],&circuitConstants[2]); // line circom 67 +// end load src +Fr_copy(aux_dest,&expaux[0]); +} +Fr_lt(&expaux[0],&lvar[25],&circuitConstants[34]); // line circom 67 +} +{ +PFrElement aux_dest = &lvar[25]; +// load src +// end load src +Fr_copy(aux_dest,&circuitConstants[1]); +} +Fr_lt(&expaux[0],&lvar[25],&circuitConstants[34]); // line circom 125 +while(Fr_isTrue(&expaux[0])){ +{ +PFrElement aux_dest = &signalValues[mySignalStart + ((1 * Fr_toInt(&lvar[25])) + 40)]; +// load src +Fr_add(&expaux[0],&signalValues[mySignalStart + (((5 * Fr_toInt(&lvar[25])) + 2) + 20)],&lvar[(((2 * Fr_toInt(&lvar[25])) + 0) + 8)]); // line circom 136 +// end load src +Fr_copy(aux_dest,&expaux[0]); +} +{ +PFrElement aux_dest = &signalValues[mySignalStart + ((1 * Fr_toInt(&lvar[25])) + 44)]; +// load src +Fr_add(&expaux[0],&signalValues[mySignalStart + (((5 * Fr_toInt(&lvar[25])) + 3) + 20)],&lvar[(((2 * Fr_toInt(&lvar[25])) + 1) + 8)]); // line circom 137 +// end load src +Fr_copy(aux_dest,&expaux[0]); +} +{ +uint cmp_index_ref = ((1 * Fr_toInt(&lvar[25])) + 18); +{ +PFrElement aux_dest = &ctx->signalValues[ctx->componentMemory[mySubcomponents[cmp_index_ref]].signalStart + 1]; +// load src +// end load src +Fr_copy(aux_dest,&signalValues[mySignalStart + ((1 * Fr_toInt(&lvar[25])) + 40)]); +} +// run sub component if needed +if(!(ctx->componentMemory[mySubcomponents[cmp_index_ref]].inputCounter -= 1)){ +Limiter_22_run(mySubcomponents[cmp_index_ref],ctx); + +} +} +{ +uint cmp_index_ref = ((1 * Fr_toInt(&lvar[25])) + 18); +{ +PFrElement aux_dest = &ctx->signalValues[ctx->componentMemory[mySubcomponents[cmp_index_ref]].signalStart + 2]; +// load src +// end load src +Fr_copy(aux_dest,&circuitConstants[43]); +} +// run sub component if needed +if(!(ctx->componentMemory[mySubcomponents[cmp_index_ref]].inputCounter -= 1)){ +Limiter_22_run(mySubcomponents[cmp_index_ref],ctx); + +} +} +{ +uint cmp_index_ref = ((1 * Fr_toInt(&lvar[25])) + 18); +{ +PFrElement aux_dest = &ctx->signalValues[ctx->componentMemory[mySubcomponents[cmp_index_ref]].signalStart + 3]; +// load src +// end load src +Fr_copy(aux_dest,&circuitConstants[43]); +} +// run sub component if needed +if(!(ctx->componentMemory[mySubcomponents[cmp_index_ref]].inputCounter -= 1)){ +Limiter_22_run(mySubcomponents[cmp_index_ref],ctx); + +} +} +{ +uint cmp_index_ref = ((1 * Fr_toInt(&lvar[25])) + 22); +{ +PFrElement aux_dest = &ctx->signalValues[ctx->componentMemory[mySubcomponents[cmp_index_ref]].signalStart + 1]; +// load src +Fr_sub(&expaux[1],&ctx->signalValues[ctx->componentMemory[mySubcomponents[((1 * Fr_toInt(&lvar[25])) + 18)]].signalStart + 0],&circuitConstants[42]); // line circom 177 +Fr_add(&expaux[0],&expaux[1],&circuitConstants[40]); // line circom 177 +// end load src +Fr_copy(aux_dest,&expaux[0]); +} +// run sub component if needed +if(!(ctx->componentMemory[mySubcomponents[cmp_index_ref]].inputCounter -= 1)){ +LowerLimiter_25_run(mySubcomponents[cmp_index_ref],ctx); + +} +} +{ +uint cmp_index_ref = ((1 * Fr_toInt(&lvar[25])) + 22); +{ +PFrElement aux_dest = &ctx->signalValues[ctx->componentMemory[mySubcomponents[cmp_index_ref]].signalStart + 2]; +// load src +// end load src +Fr_copy(aux_dest,&circuitConstants[40]); +} +// run sub component if needed +if(!(ctx->componentMemory[mySubcomponents[cmp_index_ref]].inputCounter -= 1)){ +LowerLimiter_25_run(mySubcomponents[cmp_index_ref],ctx); + +} +} +{ +uint cmp_index_ref = ((1 * Fr_toInt(&lvar[25])) + 22); +{ +PFrElement aux_dest = &ctx->signalValues[ctx->componentMemory[mySubcomponents[cmp_index_ref]].signalStart + 3]; +// load src +// end load src +Fr_copy(aux_dest,&circuitConstants[40]); +} +// run sub component if needed +if(!(ctx->componentMemory[mySubcomponents[cmp_index_ref]].inputCounter -= 1)){ +LowerLimiter_25_run(mySubcomponents[cmp_index_ref],ctx); + +} +} +{ +PFrElement aux_dest = &signalValues[mySignalStart + (((5 * Fr_toInt(&lvar[25])) + 2) + 0)]; +// load src +Fr_sub(&expaux[0],&ctx->signalValues[ctx->componentMemory[mySubcomponents[((1 * Fr_toInt(&lvar[25])) + 22)]].signalStart + 0],&circuitConstants[40]); // line circom 182 +// end load src +Fr_copy(aux_dest,&expaux[0]); +} +{ +uint cmp_index_ref = ((1 * Fr_toInt(&lvar[25])) + 26); +{ +PFrElement aux_dest = &ctx->signalValues[ctx->componentMemory[mySubcomponents[cmp_index_ref]].signalStart + 1]; +// load src +// end load src +Fr_copy(aux_dest,&signalValues[mySignalStart + ((1 * Fr_toInt(&lvar[25])) + 44)]); +} +// run sub component if needed +if(!(ctx->componentMemory[mySubcomponents[cmp_index_ref]].inputCounter -= 1)){ +Limiter_22_run(mySubcomponents[cmp_index_ref],ctx); + +} +} +{ +uint cmp_index_ref = ((1 * Fr_toInt(&lvar[25])) + 26); +{ +PFrElement aux_dest = &ctx->signalValues[ctx->componentMemory[mySubcomponents[cmp_index_ref]].signalStart + 2]; +// load src +// end load src +Fr_copy(aux_dest,&circuitConstants[43]); +} +// run sub component if needed +if(!(ctx->componentMemory[mySubcomponents[cmp_index_ref]].inputCounter -= 1)){ +Limiter_22_run(mySubcomponents[cmp_index_ref],ctx); + +} +} +{ +uint cmp_index_ref = ((1 * Fr_toInt(&lvar[25])) + 26); +{ +PFrElement aux_dest = &ctx->signalValues[ctx->componentMemory[mySubcomponents[cmp_index_ref]].signalStart + 3]; +// load src +// end load src +Fr_copy(aux_dest,&circuitConstants[43]); +} +// run sub component if needed +if(!(ctx->componentMemory[mySubcomponents[cmp_index_ref]].inputCounter -= 1)){ +Limiter_22_run(mySubcomponents[cmp_index_ref],ctx); + +} +} +{ +uint cmp_index_ref = ((1 * Fr_toInt(&lvar[25])) + 30); +{ +PFrElement aux_dest = &ctx->signalValues[ctx->componentMemory[mySubcomponents[cmp_index_ref]].signalStart + 1]; +// load src +Fr_sub(&expaux[1],&ctx->signalValues[ctx->componentMemory[mySubcomponents[((1 * Fr_toInt(&lvar[25])) + 26)]].signalStart + 0],&circuitConstants[42]); // line circom 200 +Fr_add(&expaux[0],&expaux[1],&circuitConstants[40]); // line circom 200 +// end load src +Fr_copy(aux_dest,&expaux[0]); +} +// run sub component if needed +if(!(ctx->componentMemory[mySubcomponents[cmp_index_ref]].inputCounter -= 1)){ +LowerLimiter_25_run(mySubcomponents[cmp_index_ref],ctx); + +} +} +{ +uint cmp_index_ref = ((1 * Fr_toInt(&lvar[25])) + 30); +{ +PFrElement aux_dest = &ctx->signalValues[ctx->componentMemory[mySubcomponents[cmp_index_ref]].signalStart + 2]; +// load src +// end load src +Fr_copy(aux_dest,&circuitConstants[40]); +} +// run sub component if needed +if(!(ctx->componentMemory[mySubcomponents[cmp_index_ref]].inputCounter -= 1)){ +LowerLimiter_25_run(mySubcomponents[cmp_index_ref],ctx); + +} +} +{ +uint cmp_index_ref = ((1 * Fr_toInt(&lvar[25])) + 30); +{ +PFrElement aux_dest = &ctx->signalValues[ctx->componentMemory[mySubcomponents[cmp_index_ref]].signalStart + 3]; +// load src +// end load src +Fr_copy(aux_dest,&circuitConstants[40]); +} +// run sub component if needed +if(!(ctx->componentMemory[mySubcomponents[cmp_index_ref]].inputCounter -= 1)){ +LowerLimiter_25_run(mySubcomponents[cmp_index_ref],ctx); + +} +} +{ +PFrElement aux_dest = &signalValues[mySignalStart + (((5 * Fr_toInt(&lvar[25])) + 3) + 0)]; +// load src +Fr_sub(&expaux[0],&ctx->signalValues[ctx->componentMemory[mySubcomponents[((1 * Fr_toInt(&lvar[25])) + 30)]].signalStart + 0],&circuitConstants[40]); // line circom 205 +// end load src +Fr_copy(aux_dest,&expaux[0]); +} +{ +uint cmp_index_ref = ((1 * Fr_toInt(&lvar[25])) + 34); +{ +PFrElement aux_dest = &ctx->signalValues[ctx->componentMemory[mySubcomponents[cmp_index_ref]].signalStart + 1]; +// load src +Fr_add(&expaux[0],&signalValues[mySignalStart + (((5 * Fr_toInt(&lvar[25])) + 0) + 20)],&signalValues[mySignalStart + (((5 * Fr_toInt(&lvar[25])) + 2) + 0)]); // line circom 225 +// end load src +Fr_copy(aux_dest,&expaux[0]); +} +// run sub component if needed +if(!(ctx->componentMemory[mySubcomponents[cmp_index_ref]].inputCounter -= 1)){ +Limiter_27_run(mySubcomponents[cmp_index_ref],ctx); + +} +} +{ +uint cmp_index_ref = ((1 * Fr_toInt(&lvar[25])) + 34); +{ +PFrElement aux_dest = &ctx->signalValues[ctx->componentMemory[mySubcomponents[cmp_index_ref]].signalStart + 2]; +// load src +// end load src +Fr_copy(aux_dest,&circuitConstants[44]); +} +// run sub component if needed +if(!(ctx->componentMemory[mySubcomponents[cmp_index_ref]].inputCounter -= 1)){ +Limiter_27_run(mySubcomponents[cmp_index_ref],ctx); + +} +} +{ +uint cmp_index_ref = ((1 * Fr_toInt(&lvar[25])) + 34); +{ +PFrElement aux_dest = &ctx->signalValues[ctx->componentMemory[mySubcomponents[cmp_index_ref]].signalStart + 3]; +// load src +// end load src +Fr_copy(aux_dest,&circuitConstants[40]); +} +// run sub component if needed +if(!(ctx->componentMemory[mySubcomponents[cmp_index_ref]].inputCounter -= 1)){ +Limiter_27_run(mySubcomponents[cmp_index_ref],ctx); + +} +} +{ +uint cmp_index_ref = ((1 * Fr_toInt(&lvar[25])) + 38); +{ +PFrElement aux_dest = &ctx->signalValues[ctx->componentMemory[mySubcomponents[cmp_index_ref]].signalStart + 1]; +// load src +Fr_add(&expaux[0],&signalValues[mySignalStart + (((5 * Fr_toInt(&lvar[25])) + 0) + 20)],&signalValues[mySignalStart + (((5 * Fr_toInt(&lvar[25])) + 2) + 0)]); // line circom 231 +// end load src +Fr_copy(aux_dest,&expaux[0]); +} +// run sub component if needed +if(!(ctx->componentMemory[mySubcomponents[cmp_index_ref]].inputCounter -= 1)){ +LowerLimiter_28_run(mySubcomponents[cmp_index_ref],ctx); + +} +} +{ +uint cmp_index_ref = ((1 * Fr_toInt(&lvar[25])) + 38); +{ +PFrElement aux_dest = &ctx->signalValues[ctx->componentMemory[mySubcomponents[cmp_index_ref]].signalStart + 2]; +// load src +// end load src +Fr_copy(aux_dest,&circuitConstants[40]); +} +// run sub component if needed +if(!(ctx->componentMemory[mySubcomponents[cmp_index_ref]].inputCounter -= 1)){ +LowerLimiter_28_run(mySubcomponents[cmp_index_ref],ctx); + +} +} +{ +uint cmp_index_ref = ((1 * Fr_toInt(&lvar[25])) + 38); +{ +PFrElement aux_dest = &ctx->signalValues[ctx->componentMemory[mySubcomponents[cmp_index_ref]].signalStart + 3]; +// load src +// end load src +Fr_copy(aux_dest,&circuitConstants[44]); +} +// run sub component if needed +if(!(ctx->componentMemory[mySubcomponents[cmp_index_ref]].inputCounter -= 1)){ +LowerLimiter_28_run(mySubcomponents[cmp_index_ref],ctx); + +} +} +{ +uint cmp_index_ref = ((1 * Fr_toInt(&lvar[25])) + 50); +{ +PFrElement aux_dest = &ctx->signalValues[ctx->componentMemory[mySubcomponents[cmp_index_ref]].signalStart + 1]; +// load src +Fr_sub(&expaux[0],&ctx->signalValues[ctx->componentMemory[mySubcomponents[((1 * Fr_toInt(&lvar[25])) + 34)]].signalStart + 1],&ctx->signalValues[ctx->componentMemory[mySubcomponents[((1 * Fr_toInt(&lvar[25])) + 34)]].signalStart + 0]); // line circom 237 +// end load src +Fr_copy(aux_dest,&expaux[0]); +} +// run sub component if needed +if(!(ctx->componentMemory[mySubcomponents[cmp_index_ref]].inputCounter -= 1)){ +IsZero_1_run(mySubcomponents[cmp_index_ref],ctx); + +} +} +{ +uint cmp_index_ref = ((1 * Fr_toInt(&lvar[25])) + 54); +{ +PFrElement aux_dest = &ctx->signalValues[ctx->componentMemory[mySubcomponents[cmp_index_ref]].signalStart + 1]; +// load src +Fr_sub(&expaux[0],&ctx->signalValues[ctx->componentMemory[mySubcomponents[((1 * Fr_toInt(&lvar[25])) + 34)]].signalStart + 0],&circuitConstants[40]); // line circom 251 +// end load src +Fr_copy(aux_dest,&expaux[0]); +} +// run sub component if needed +if(!(ctx->componentMemory[mySubcomponents[cmp_index_ref]].inputCounter -= 1)){ +Mux1_5_run(mySubcomponents[cmp_index_ref],ctx); + +} +} +{ +uint cmp_index_ref = ((1 * Fr_toInt(&lvar[25])) + 54); +{ +PFrElement aux_dest = &ctx->signalValues[ctx->componentMemory[mySubcomponents[cmp_index_ref]].signalStart + 2]; +// load src +Fr_sub(&expaux[0],&ctx->signalValues[ctx->componentMemory[mySubcomponents[((1 * Fr_toInt(&lvar[25])) + 38)]].signalStart + 0],&circuitConstants[40]); // line circom 252 +// end load src +Fr_copy(aux_dest,&expaux[0]); +} +// run sub component if needed +if(!(ctx->componentMemory[mySubcomponents[cmp_index_ref]].inputCounter -= 1)){ +Mux1_5_run(mySubcomponents[cmp_index_ref],ctx); + +} +} +{ +uint cmp_index_ref = ((1 * Fr_toInt(&lvar[25])) + 54); +{ +PFrElement aux_dest = &ctx->signalValues[ctx->componentMemory[mySubcomponents[cmp_index_ref]].signalStart + 3]; +// load src +// end load src +Fr_copy(aux_dest,&ctx->signalValues[ctx->componentMemory[mySubcomponents[((1 * Fr_toInt(&lvar[25])) + 50)]].signalStart + 0]); +} +// run sub component if needed +if(!(ctx->componentMemory[mySubcomponents[cmp_index_ref]].inputCounter -= 1)){ +Mux1_5_run(mySubcomponents[cmp_index_ref],ctx); + +} +} +{ +PFrElement aux_dest = &signalValues[mySignalStart + (((5 * Fr_toInt(&lvar[25])) + 0) + 0)]; +// load src +// end load src +Fr_copy(aux_dest,&ctx->signalValues[ctx->componentMemory[mySubcomponents[((1 * Fr_toInt(&lvar[25])) + 54)]].signalStart + 0]); +} +{ +uint cmp_index_ref = ((1 * Fr_toInt(&lvar[25])) + 42); +{ +PFrElement aux_dest = &ctx->signalValues[ctx->componentMemory[mySubcomponents[cmp_index_ref]].signalStart + 1]; +// load src +Fr_add(&expaux[0],&signalValues[mySignalStart + (((5 * Fr_toInt(&lvar[25])) + 1) + 20)],&signalValues[mySignalStart + (((5 * Fr_toInt(&lvar[25])) + 3) + 0)]); // line circom 263 +// end load src +Fr_copy(aux_dest,&expaux[0]); +} +// run sub component if needed +if(!(ctx->componentMemory[mySubcomponents[cmp_index_ref]].inputCounter -= 1)){ +Limiter_27_run(mySubcomponents[cmp_index_ref],ctx); + +} +} +{ +uint cmp_index_ref = ((1 * Fr_toInt(&lvar[25])) + 42); +{ +PFrElement aux_dest = &ctx->signalValues[ctx->componentMemory[mySubcomponents[cmp_index_ref]].signalStart + 2]; +// load src +// end load src +Fr_copy(aux_dest,&circuitConstants[44]); +} +// run sub component if needed +if(!(ctx->componentMemory[mySubcomponents[cmp_index_ref]].inputCounter -= 1)){ +Limiter_27_run(mySubcomponents[cmp_index_ref],ctx); + +} +} +{ +uint cmp_index_ref = ((1 * Fr_toInt(&lvar[25])) + 42); +{ +PFrElement aux_dest = &ctx->signalValues[ctx->componentMemory[mySubcomponents[cmp_index_ref]].signalStart + 3]; +// load src +// end load src +Fr_copy(aux_dest,&circuitConstants[40]); +} +// run sub component if needed +if(!(ctx->componentMemory[mySubcomponents[cmp_index_ref]].inputCounter -= 1)){ +Limiter_27_run(mySubcomponents[cmp_index_ref],ctx); + +} +} +{ +uint cmp_index_ref = ((1 * Fr_toInt(&lvar[25])) + 46); +{ +PFrElement aux_dest = &ctx->signalValues[ctx->componentMemory[mySubcomponents[cmp_index_ref]].signalStart + 1]; +// load src +Fr_add(&expaux[0],&signalValues[mySignalStart + (((5 * Fr_toInt(&lvar[25])) + 1) + 20)],&signalValues[mySignalStart + (((5 * Fr_toInt(&lvar[25])) + 3) + 0)]); // line circom 269 +// end load src +Fr_copy(aux_dest,&expaux[0]); +} +// run sub component if needed +if(!(ctx->componentMemory[mySubcomponents[cmp_index_ref]].inputCounter -= 1)){ +LowerLimiter_28_run(mySubcomponents[cmp_index_ref],ctx); + +} +} +{ +uint cmp_index_ref = ((1 * Fr_toInt(&lvar[25])) + 46); +{ +PFrElement aux_dest = &ctx->signalValues[ctx->componentMemory[mySubcomponents[cmp_index_ref]].signalStart + 2]; +// load src +// end load src +Fr_copy(aux_dest,&circuitConstants[40]); +} +// run sub component if needed +if(!(ctx->componentMemory[mySubcomponents[cmp_index_ref]].inputCounter -= 1)){ +LowerLimiter_28_run(mySubcomponents[cmp_index_ref],ctx); + +} +} +{ +uint cmp_index_ref = ((1 * Fr_toInt(&lvar[25])) + 46); +{ +PFrElement aux_dest = &ctx->signalValues[ctx->componentMemory[mySubcomponents[cmp_index_ref]].signalStart + 3]; +// load src +// end load src +Fr_copy(aux_dest,&circuitConstants[44]); +} +// run sub component if needed +if(!(ctx->componentMemory[mySubcomponents[cmp_index_ref]].inputCounter -= 1)){ +LowerLimiter_28_run(mySubcomponents[cmp_index_ref],ctx); + +} +} +{ +uint cmp_index_ref = ((1 * Fr_toInt(&lvar[25])) + 58); +{ +PFrElement aux_dest = &ctx->signalValues[ctx->componentMemory[mySubcomponents[cmp_index_ref]].signalStart + 1]; +// load src +Fr_sub(&expaux[0],&ctx->signalValues[ctx->componentMemory[mySubcomponents[((1 * Fr_toInt(&lvar[25])) + 42)]].signalStart + 1],&ctx->signalValues[ctx->componentMemory[mySubcomponents[((1 * Fr_toInt(&lvar[25])) + 42)]].signalStart + 0]); // line circom 276 +// end load src +Fr_copy(aux_dest,&expaux[0]); +} +// run sub component if needed +if(!(ctx->componentMemory[mySubcomponents[cmp_index_ref]].inputCounter -= 1)){ +IsZero_1_run(mySubcomponents[cmp_index_ref],ctx); + +} +} +{ +uint cmp_index_ref = ((1 * Fr_toInt(&lvar[25])) + 62); +{ +PFrElement aux_dest = &ctx->signalValues[ctx->componentMemory[mySubcomponents[cmp_index_ref]].signalStart + 1]; +// load src +Fr_sub(&expaux[0],&ctx->signalValues[ctx->componentMemory[mySubcomponents[((1 * Fr_toInt(&lvar[25])) + 42)]].signalStart + 0],&circuitConstants[40]); // line circom 279 +// end load src +Fr_copy(aux_dest,&expaux[0]); +} +// run sub component if needed +if(!(ctx->componentMemory[mySubcomponents[cmp_index_ref]].inputCounter -= 1)){ +Mux1_5_run(mySubcomponents[cmp_index_ref],ctx); + +} +} +{ +uint cmp_index_ref = ((1 * Fr_toInt(&lvar[25])) + 62); +{ +PFrElement aux_dest = &ctx->signalValues[ctx->componentMemory[mySubcomponents[cmp_index_ref]].signalStart + 2]; +// load src +Fr_sub(&expaux[0],&ctx->signalValues[ctx->componentMemory[mySubcomponents[((1 * Fr_toInt(&lvar[25])) + 46)]].signalStart + 0],&circuitConstants[40]); // line circom 280 +// end load src +Fr_copy(aux_dest,&expaux[0]); +} +// run sub component if needed +if(!(ctx->componentMemory[mySubcomponents[cmp_index_ref]].inputCounter -= 1)){ +Mux1_5_run(mySubcomponents[cmp_index_ref],ctx); + +} +} +{ +uint cmp_index_ref = ((1 * Fr_toInt(&lvar[25])) + 62); +{ +PFrElement aux_dest = &ctx->signalValues[ctx->componentMemory[mySubcomponents[cmp_index_ref]].signalStart + 3]; +// load src +// end load src +Fr_copy(aux_dest,&ctx->signalValues[ctx->componentMemory[mySubcomponents[((1 * Fr_toInt(&lvar[25])) + 58)]].signalStart + 0]); +} +// run sub component if needed +if(!(ctx->componentMemory[mySubcomponents[cmp_index_ref]].inputCounter -= 1)){ +Mux1_5_run(mySubcomponents[cmp_index_ref],ctx); + +} +} +{ +PFrElement aux_dest = &signalValues[mySignalStart + (((5 * Fr_toInt(&lvar[25])) + 1) + 0)]; +// load src +// end load src +Fr_copy(aux_dest,&ctx->signalValues[ctx->componentMemory[mySubcomponents[((1 * Fr_toInt(&lvar[25])) + 62)]].signalStart + 0]); +} +{ +PFrElement aux_dest = &lvar[25]; +// load src +Fr_add(&expaux[0],&lvar[25],&circuitConstants[2]); // line circom 125 +// end load src +Fr_copy(aux_dest,&expaux[0]); +} +Fr_lt(&expaux[0],&lvar[25],&circuitConstants[34]); // line circom 125 +} +for (uint i = 0; i < 66; i++){ +uint index_subc = ctx->componentMemory[ctx_index].subcomponents[i]; +if (index_subc != 0)release_memory_component(ctx,index_subc); +} +} + +void CalculateMissile_30_create(uint soffset,uint coffset,Circom_CalcWit* ctx,std::string componentName,uint componentFather){ +ctx->componentMemory[coffset].templateId = 30; +ctx->componentMemory[coffset].templateName = "CalculateMissile"; +ctx->componentMemory[coffset].signalStart = soffset; +ctx->componentMemory[coffset].inputCounter = 5; +ctx->componentMemory[coffset].componentName = componentName; +ctx->componentMemory[coffset].idFather = componentFather; +ctx->componentMemory[coffset].subcomponents = new uint[6]{0}; +} + +void CalculateMissile_30_run(uint ctx_index,Circom_CalcWit* ctx){ +FrElement* signalValues = ctx->signalValues; +u64 mySignalStart = ctx->componentMemory[ctx_index].signalStart; +std::string myTemplateName = ctx->componentMemory[ctx_index].templateName; +std::string myComponentName = ctx->componentMemory[ctx_index].componentName; +u64 myFather = ctx->componentMemory[ctx_index].idFather; +u64 myId = ctx_index; +u32* mySubcomponents = ctx->componentMemory[ctx_index].subcomponents; +bool* mySubcomponentsParallel = ctx->componentMemory[ctx_index].subcomponentsParallel; +FrElement* circuitConstants = ctx->circuitConstants; +std::string* listOfTemplateMessages = ctx->listOfTemplateMessages; +FrElement expaux[3]; +FrElement lvar[7]; +uint sub_component_aux; +uint index_multiple_eq; +{ +uint aux_create = 0; +int aux_cmp_num = 1+ctx_index+1; +uint csoffset = mySignalStart+15; +for (uint i = 0; i < 1; i++) { +std::string new_cmp_name = "calcMissilePositionLimiterX"; +Limiter_27_create(csoffset,aux_cmp_num,ctx,new_cmp_name,myId); +mySubcomponents[aux_create+i] = aux_cmp_num; +csoffset += 37 ; +aux_cmp_num += 5; +} +} +{ +uint aux_create = 1; +int aux_cmp_num = 0+ctx_index+1; +uint csoffset = mySignalStart+12; +for (uint i = 0; i < 1; i++) { +std::string new_cmp_name = "calcMissileIsZeroX"; +IsZero_1_create(csoffset,aux_cmp_num,ctx,new_cmp_name,myId); +mySubcomponents[aux_create+i] = aux_cmp_num; +csoffset += 3 ; +aux_cmp_num += 1; +} +} +{ +uint aux_create = 2; +int aux_cmp_num = 7+ctx_index+1; +uint csoffset = mySignalStart+55; +for (uint i = 0; i < 1; i++) { +std::string new_cmp_name = "muxXDecidesRadius"; +Mux1_5_create(csoffset,aux_cmp_num,ctx,new_cmp_name,myId); +mySubcomponents[aux_create+i] = aux_cmp_num; +csoffset += 8 ; +aux_cmp_num += 2; +} +} +{ +uint aux_create = 3; +int aux_cmp_num = 11+ctx_index+1; +uint csoffset = mySignalStart+71; +for (uint i = 0; i < 1; i++) { +std::string new_cmp_name = "positionLowerLimiterY"; +LowerLimiter_28_create(csoffset,aux_cmp_num,ctx,new_cmp_name,myId); +mySubcomponents[aux_create+i] = aux_cmp_num; +csoffset += 37 ; +aux_cmp_num += 5; +} +} +{ +uint aux_create = 4; +int aux_cmp_num = 6+ctx_index+1; +uint csoffset = mySignalStart+52; +for (uint i = 0; i < 1; i++) { +std::string new_cmp_name = "isZeroY"; +IsZero_1_create(csoffset,aux_cmp_num,ctx,new_cmp_name,myId); +mySubcomponents[aux_create+i] = aux_cmp_num; +csoffset += 3 ; +aux_cmp_num += 1; +} +} +{ +uint aux_create = 5; +int aux_cmp_num = 9+ctx_index+1; +uint csoffset = mySignalStart+63; +for (uint i = 0; i < 1; i++) { +std::string new_cmp_name = "muxY"; +Mux1_5_create(csoffset,aux_cmp_num,ctx,new_cmp_name,myId); +mySubcomponents[aux_create+i] = aux_cmp_num; +csoffset += 8 ; +aux_cmp_num += 2; +} +} +{ +PFrElement aux_dest = &lvar[0]; +// load src +// end load src +Fr_copy(aux_dest,&circuitConstants[18]); +} +{ +PFrElement aux_dest = &lvar[1]; +// load src +// end load src +Fr_copy(aux_dest,&circuitConstants[19]); +} +{ +PFrElement aux_dest = &lvar[2]; +// load src +// end load src +Fr_copy(aux_dest,&circuitConstants[19]); +} +{ +PFrElement aux_dest = &lvar[3]; +// load src +// end load src +Fr_copy(aux_dest,&circuitConstants[29]); +} +{ +PFrElement aux_dest = &lvar[4]; +// load src +// end load src +Fr_copy(aux_dest,&circuitConstants[0]); +} +{ +PFrElement aux_dest = &lvar[5]; +// load src +// end load src +Fr_copy(aux_dest,&circuitConstants[45]); +} +{ +PFrElement aux_dest = &lvar[6]; +// load src +// end load src +Fr_copy(aux_dest,&circuitConstants[46]); +} +{ +PFrElement aux_dest = &signalValues[mySignalStart + 10]; +// load src +Fr_add(&expaux[0],&signalValues[mySignalStart + 5],&signalValues[mySignalStart + 7]); // line circom 52 +// end load src +Fr_copy(aux_dest,&expaux[0]); +} +{ +PFrElement aux_dest = &signalValues[mySignalStart + 11]; +// load src +Fr_add(&expaux[0],&signalValues[mySignalStart + 6],&signalValues[mySignalStart + 8]); // line circom 54 +// end load src +Fr_copy(aux_dest,&expaux[0]); +} +{ +uint cmp_index_ref = 0; +{ +PFrElement aux_dest = &ctx->signalValues[ctx->componentMemory[mySubcomponents[cmp_index_ref]].signalStart + 1]; +// load src +Fr_add(&expaux[0],&signalValues[mySignalStart + 10],&circuitConstants[46]); // line circom 64 +// end load src +Fr_copy(aux_dest,&expaux[0]); +} +// no need to run sub component +ctx->componentMemory[mySubcomponents[cmp_index_ref]].inputCounter -= 1; +assert(ctx->componentMemory[mySubcomponents[cmp_index_ref]].inputCounter > 0); +} +{ +uint cmp_index_ref = 0; +{ +PFrElement aux_dest = &ctx->signalValues[ctx->componentMemory[mySubcomponents[cmp_index_ref]].signalStart + 2]; +// load src +// end load src +Fr_copy(aux_dest,&circuitConstants[47]); +} +// no need to run sub component +ctx->componentMemory[mySubcomponents[cmp_index_ref]].inputCounter -= 1; +assert(ctx->componentMemory[mySubcomponents[cmp_index_ref]].inputCounter > 0); +} +{ +uint cmp_index_ref = 0; +{ +PFrElement aux_dest = &ctx->signalValues[ctx->componentMemory[mySubcomponents[cmp_index_ref]].signalStart + 3]; +// load src +// end load src +Fr_copy(aux_dest,&circuitConstants[1]); +} +// need to run sub component +ctx->componentMemory[mySubcomponents[cmp_index_ref]].inputCounter -= 1; +assert(!(ctx->componentMemory[mySubcomponents[cmp_index_ref]].inputCounter)); +Limiter_27_run(mySubcomponents[cmp_index_ref],ctx); +} +{ +uint cmp_index_ref = 1; +{ +PFrElement aux_dest = &ctx->signalValues[ctx->componentMemory[mySubcomponents[cmp_index_ref]].signalStart + 1]; +// load src +// end load src +Fr_copy(aux_dest,&ctx->signalValues[ctx->componentMemory[mySubcomponents[0]].signalStart + 0]); +} +// need to run sub component +ctx->componentMemory[mySubcomponents[cmp_index_ref]].inputCounter -= 1; +assert(!(ctx->componentMemory[mySubcomponents[cmp_index_ref]].inputCounter)); +IsZero_1_run(mySubcomponents[cmp_index_ref],ctx); +} +{ +uint cmp_index_ref = 2; +{ +PFrElement aux_dest = &ctx->signalValues[ctx->componentMemory[mySubcomponents[cmp_index_ref]].signalStart + 1]; +// load src +// end load src +Fr_copy(aux_dest,&signalValues[mySignalStart + 9]); +} +// no need to run sub component +ctx->componentMemory[mySubcomponents[cmp_index_ref]].inputCounter -= 1; +assert(ctx->componentMemory[mySubcomponents[cmp_index_ref]].inputCounter > 0); +} +{ +uint cmp_index_ref = 2; +{ +PFrElement aux_dest = &ctx->signalValues[ctx->componentMemory[mySubcomponents[cmp_index_ref]].signalStart + 2]; +// load src +// end load src +Fr_copy(aux_dest,&circuitConstants[1]); +} +// no need to run sub component +ctx->componentMemory[mySubcomponents[cmp_index_ref]].inputCounter -= 1; +assert(ctx->componentMemory[mySubcomponents[cmp_index_ref]].inputCounter > 0); +} +{ +uint cmp_index_ref = 2; +{ +PFrElement aux_dest = &ctx->signalValues[ctx->componentMemory[mySubcomponents[cmp_index_ref]].signalStart + 3]; +// load src +// end load src +Fr_copy(aux_dest,&ctx->signalValues[ctx->componentMemory[mySubcomponents[1]].signalStart + 0]); +} +// need to run sub component +ctx->componentMemory[mySubcomponents[cmp_index_ref]].inputCounter -= 1; +assert(!(ctx->componentMemory[mySubcomponents[cmp_index_ref]].inputCounter)); +Mux1_5_run(mySubcomponents[cmp_index_ref],ctx); +} +{ +uint cmp_index_ref = 3; +{ +PFrElement aux_dest = &ctx->signalValues[ctx->componentMemory[mySubcomponents[cmp_index_ref]].signalStart + 1]; +// load src +// end load src +Fr_copy(aux_dest,&signalValues[mySignalStart + 11]); +} +// no need to run sub component +ctx->componentMemory[mySubcomponents[cmp_index_ref]].inputCounter -= 1; +assert(ctx->componentMemory[mySubcomponents[cmp_index_ref]].inputCounter > 0); +} +{ +uint cmp_index_ref = 3; +{ +PFrElement aux_dest = &ctx->signalValues[ctx->componentMemory[mySubcomponents[cmp_index_ref]].signalStart + 2]; +// load src +// end load src +Fr_copy(aux_dest,&circuitConstants[46]); +} +// no need to run sub component +ctx->componentMemory[mySubcomponents[cmp_index_ref]].inputCounter -= 1; +assert(ctx->componentMemory[mySubcomponents[cmp_index_ref]].inputCounter > 0); +} +{ +uint cmp_index_ref = 3; +{ +PFrElement aux_dest = &ctx->signalValues[ctx->componentMemory[mySubcomponents[cmp_index_ref]].signalStart + 3]; +// load src +// end load src +Fr_copy(aux_dest,&circuitConstants[1]); +} +// need to run sub component +ctx->componentMemory[mySubcomponents[cmp_index_ref]].inputCounter -= 1; +assert(!(ctx->componentMemory[mySubcomponents[cmp_index_ref]].inputCounter)); +LowerLimiter_28_run(mySubcomponents[cmp_index_ref],ctx); +} +{ +uint cmp_index_ref = 4; +{ +PFrElement aux_dest = &ctx->signalValues[ctx->componentMemory[mySubcomponents[cmp_index_ref]].signalStart + 1]; +// load src +// end load src +Fr_copy(aux_dest,&ctx->signalValues[ctx->componentMemory[mySubcomponents[3]].signalStart + 0]); +} +// need to run sub component +ctx->componentMemory[mySubcomponents[cmp_index_ref]].inputCounter -= 1; +assert(!(ctx->componentMemory[mySubcomponents[cmp_index_ref]].inputCounter)); +IsZero_1_run(mySubcomponents[cmp_index_ref],ctx); +} +{ +uint cmp_index_ref = 5; +{ +PFrElement aux_dest = &ctx->signalValues[ctx->componentMemory[mySubcomponents[cmp_index_ref]].signalStart + 1]; +// load src +// end load src +Fr_copy(aux_dest,&ctx->signalValues[ctx->componentMemory[mySubcomponents[2]].signalStart + 0]); +} +// no need to run sub component +ctx->componentMemory[mySubcomponents[cmp_index_ref]].inputCounter -= 1; +assert(ctx->componentMemory[mySubcomponents[cmp_index_ref]].inputCounter > 0); +} +{ +uint cmp_index_ref = 5; +{ +PFrElement aux_dest = &ctx->signalValues[ctx->componentMemory[mySubcomponents[cmp_index_ref]].signalStart + 2]; +// load src +// end load src +Fr_copy(aux_dest,&circuitConstants[1]); +} +// no need to run sub component +ctx->componentMemory[mySubcomponents[cmp_index_ref]].inputCounter -= 1; +assert(ctx->componentMemory[mySubcomponents[cmp_index_ref]].inputCounter > 0); +} +{ +uint cmp_index_ref = 5; +{ +PFrElement aux_dest = &ctx->signalValues[ctx->componentMemory[mySubcomponents[cmp_index_ref]].signalStart + 3]; +// load src +// end load src +Fr_copy(aux_dest,&ctx->signalValues[ctx->componentMemory[mySubcomponents[4]].signalStart + 0]); +} +// need to run sub component +ctx->componentMemory[mySubcomponents[cmp_index_ref]].inputCounter -= 1; +assert(!(ctx->componentMemory[mySubcomponents[cmp_index_ref]].inputCounter)); +Mux1_5_run(mySubcomponents[cmp_index_ref],ctx); +} +{ +PFrElement aux_dest = &signalValues[mySignalStart + 0]; +// load src +Fr_sub(&expaux[0],&signalValues[mySignalStart + 10],&circuitConstants[46]); // line circom 104 +// end load src +Fr_copy(aux_dest,&expaux[0]); +} +{ +PFrElement aux_dest = &signalValues[mySignalStart + 1]; +// load src +Fr_sub(&expaux[0],&signalValues[mySignalStart + 11],&circuitConstants[46]); // line circom 105 +// end load src +Fr_copy(aux_dest,&expaux[0]); +} +{ +PFrElement aux_dest = &signalValues[mySignalStart + 2]; +// load src +// end load src +Fr_copy(aux_dest,&signalValues[mySignalStart + 7]); +} +{ +PFrElement aux_dest = &signalValues[mySignalStart + 3]; +// load src +// end load src +Fr_copy(aux_dest,&signalValues[mySignalStart + 8]); +} +{ +PFrElement aux_dest = &signalValues[mySignalStart + 4]; +// load src +// end load src +Fr_copy(aux_dest,&ctx->signalValues[ctx->componentMemory[mySubcomponents[5]].signalStart + 0]); +} +for (uint i = 0; i < 6; i++){ +uint index_subc = ctx->componentMemory[ctx_index].subcomponents[i]; +if (index_subc != 0)release_memory_component(ctx,index_subc); +} +} + +void AbsoluteValueSubtraction_31_create(uint soffset,uint coffset,Circom_CalcWit* ctx,std::string componentName,uint componentFather){ +ctx->componentMemory[coffset].templateId = 31; +ctx->componentMemory[coffset].templateName = "AbsoluteValueSubtraction"; +ctx->componentMemory[coffset].signalStart = soffset; +ctx->componentMemory[coffset].inputCounter = 2; +ctx->componentMemory[coffset].componentName = componentName; +ctx->componentMemory[coffset].idFather = componentFather; +ctx->componentMemory[coffset].subcomponents = new uint[4]{0}; +} + +void AbsoluteValueSubtraction_31_run(uint ctx_index,Circom_CalcWit* ctx){ +FrElement* signalValues = ctx->signalValues; +u64 mySignalStart = ctx->componentMemory[ctx_index].signalStart; +std::string myTemplateName = ctx->componentMemory[ctx_index].templateName; +std::string myComponentName = ctx->componentMemory[ctx_index].componentName; +u64 myFather = ctx->componentMemory[ctx_index].idFather; +u64 myId = ctx_index; +u32* mySubcomponents = ctx->componentMemory[ctx_index].subcomponents; +bool* mySubcomponentsParallel = ctx->componentMemory[ctx_index].subcomponentsParallel; +FrElement* circuitConstants = ctx->circuitConstants; +std::string* listOfTemplateMessages = ctx->listOfTemplateMessages; +FrElement expaux[3]; +FrElement lvar[1]; +uint sub_component_aux; +uint index_multiple_eq; +{ +PFrElement aux_dest = &lvar[0]; +// load src +// end load src +Fr_copy(aux_dest,&circuitConstants[4]); +} +{ +uint aux_create = 0; +int aux_cmp_num = 1+ctx_index+1; +uint csoffset = mySignalStart+9; +for (uint i = 0; i < 1; i++) { +std::string new_cmp_name = "lessThan"; +LessThan_26_create(csoffset,aux_cmp_num,ctx,new_cmp_name,myId); +mySubcomponents[aux_create+i] = aux_cmp_num; +csoffset += 25 ; +aux_cmp_num += 2; +} +} +{ +uint aux_create = 1; +int aux_cmp_num = 3+ctx_index+1; +uint csoffset = mySignalStart+34; +for (uint i = 0; i < 1; i++) { +std::string new_cmp_name = "myMux"; +Mux1_5_create(csoffset,aux_cmp_num,ctx,new_cmp_name,myId); +mySubcomponents[aux_create+i] = aux_cmp_num; +csoffset += 8 ; +aux_cmp_num += 2; +} +} +{ +uint aux_create = 2; +int aux_cmp_num = 0+ctx_index+1; +uint csoffset = mySignalStart+6; +for (uint i = 0; i < 1; i++) { +std::string new_cmp_name = "isZero"; +IsZero_1_create(csoffset,aux_cmp_num,ctx,new_cmp_name,myId); +mySubcomponents[aux_create+i] = aux_cmp_num; +csoffset += 3 ; +aux_cmp_num += 1; +} +} +{ +uint aux_create = 3; +int aux_cmp_num = 5+ctx_index+1; +uint csoffset = mySignalStart+42; +for (uint i = 0; i < 1; i++) { +std::string new_cmp_name = "myMux2"; +Mux1_5_create(csoffset,aux_cmp_num,ctx,new_cmp_name,myId); +mySubcomponents[aux_create+i] = aux_cmp_num; +csoffset += 8 ; +aux_cmp_num += 2; +} +} +{ +uint cmp_index_ref = 0; +{ +PFrElement aux_dest = &ctx->signalValues[ctx->componentMemory[mySubcomponents[cmp_index_ref]].signalStart + 1]; +// load src +// end load src +Fr_copy(aux_dest,&signalValues[mySignalStart + 1]); +} +// no need to run sub component +ctx->componentMemory[mySubcomponents[cmp_index_ref]].inputCounter -= 1; +assert(ctx->componentMemory[mySubcomponents[cmp_index_ref]].inputCounter > 0); +} +{ +uint cmp_index_ref = 0; +{ +PFrElement aux_dest = &ctx->signalValues[ctx->componentMemory[mySubcomponents[cmp_index_ref]].signalStart + 2]; +// load src +// end load src +Fr_copy(aux_dest,&signalValues[mySignalStart + 2]); +} +// need to run sub component +ctx->componentMemory[mySubcomponents[cmp_index_ref]].inputCounter -= 1; +assert(!(ctx->componentMemory[mySubcomponents[cmp_index_ref]].inputCounter)); +LessThan_26_run(mySubcomponents[cmp_index_ref],ctx); +} +{ +PFrElement aux_dest = &signalValues[mySignalStart + 3]; +// load src +// end load src +Fr_copy(aux_dest,&ctx->signalValues[ctx->componentMemory[mySubcomponents[0]].signalStart + 0]); +} +{ +uint cmp_index_ref = 1; +{ +PFrElement aux_dest = &ctx->signalValues[ctx->componentMemory[mySubcomponents[cmp_index_ref]].signalStart + 1]; +// load src +// end load src +Fr_copy(aux_dest,&signalValues[mySignalStart + 1]); +} +// no need to run sub component +ctx->componentMemory[mySubcomponents[cmp_index_ref]].inputCounter -= 1; +assert(ctx->componentMemory[mySubcomponents[cmp_index_ref]].inputCounter > 0); +} +{ +uint cmp_index_ref = 1; +{ +PFrElement aux_dest = &ctx->signalValues[ctx->componentMemory[mySubcomponents[cmp_index_ref]].signalStart + 2]; +// load src +// end load src +Fr_copy(aux_dest,&signalValues[mySignalStart + 2]); +} +// no need to run sub component +ctx->componentMemory[mySubcomponents[cmp_index_ref]].inputCounter -= 1; +assert(ctx->componentMemory[mySubcomponents[cmp_index_ref]].inputCounter > 0); +} +{ +uint cmp_index_ref = 1; +{ +PFrElement aux_dest = &ctx->signalValues[ctx->componentMemory[mySubcomponents[cmp_index_ref]].signalStart + 3]; +// load src +// end load src +Fr_copy(aux_dest,&signalValues[mySignalStart + 3]); +} +// need to run sub component +ctx->componentMemory[mySubcomponents[cmp_index_ref]].inputCounter -= 1; +assert(!(ctx->componentMemory[mySubcomponents[cmp_index_ref]].inputCounter)); +Mux1_5_run(mySubcomponents[cmp_index_ref],ctx); +} +{ +PFrElement aux_dest = &signalValues[mySignalStart + 4]; +// load src +// end load src +Fr_copy(aux_dest,&ctx->signalValues[ctx->componentMemory[mySubcomponents[1]].signalStart + 0]); +} +{ +uint cmp_index_ref = 2; +{ +PFrElement aux_dest = &ctx->signalValues[ctx->componentMemory[mySubcomponents[cmp_index_ref]].signalStart + 1]; +// load src +Fr_sub(&expaux[0],&signalValues[mySignalStart + 4],&signalValues[mySignalStart + 1]); // line circom 220 +// end load src +Fr_copy(aux_dest,&expaux[0]); +} +// need to run sub component +ctx->componentMemory[mySubcomponents[cmp_index_ref]].inputCounter -= 1; +assert(!(ctx->componentMemory[mySubcomponents[cmp_index_ref]].inputCounter)); +IsZero_1_run(mySubcomponents[cmp_index_ref],ctx); +} +{ +uint cmp_index_ref = 3; +{ +PFrElement aux_dest = &ctx->signalValues[ctx->componentMemory[mySubcomponents[cmp_index_ref]].signalStart + 1]; +// load src +// end load src +Fr_copy(aux_dest,&signalValues[mySignalStart + 1]); +} +// no need to run sub component +ctx->componentMemory[mySubcomponents[cmp_index_ref]].inputCounter -= 1; +assert(ctx->componentMemory[mySubcomponents[cmp_index_ref]].inputCounter > 0); +} +{ +uint cmp_index_ref = 3; +{ +PFrElement aux_dest = &ctx->signalValues[ctx->componentMemory[mySubcomponents[cmp_index_ref]].signalStart + 2]; +// load src +// end load src +Fr_copy(aux_dest,&signalValues[mySignalStart + 2]); +} +// no need to run sub component +ctx->componentMemory[mySubcomponents[cmp_index_ref]].inputCounter -= 1; +assert(ctx->componentMemory[mySubcomponents[cmp_index_ref]].inputCounter > 0); +} +{ +uint cmp_index_ref = 3; +{ +PFrElement aux_dest = &ctx->signalValues[ctx->componentMemory[mySubcomponents[cmp_index_ref]].signalStart + 3]; +// load src +// end load src +Fr_copy(aux_dest,&ctx->signalValues[ctx->componentMemory[mySubcomponents[2]].signalStart + 0]); +} +// need to run sub component +ctx->componentMemory[mySubcomponents[cmp_index_ref]].inputCounter -= 1; +assert(!(ctx->componentMemory[mySubcomponents[cmp_index_ref]].inputCounter)); +Mux1_5_run(mySubcomponents[cmp_index_ref],ctx); +} +{ +PFrElement aux_dest = &signalValues[mySignalStart + 5]; +// load src +// end load src +Fr_copy(aux_dest,&ctx->signalValues[ctx->componentMemory[mySubcomponents[3]].signalStart + 0]); +} +{ +PFrElement aux_dest = &signalValues[mySignalStart + 0]; +// load src +Fr_sub(&expaux[0],&signalValues[mySignalStart + 4],&signalValues[mySignalStart + 5]); // line circom 228 +// end load src +Fr_copy(aux_dest,&expaux[0]); +} +for (uint i = 0; i < 4; i++){ +uint index_subc = ctx->componentMemory[ctx_index].subcomponents[i]; +if (index_subc != 0)release_memory_component(ctx,index_subc); +} +} + +void GetDistance_32_create(uint soffset,uint coffset,Circom_CalcWit* ctx,std::string componentName,uint componentFather){ +ctx->componentMemory[coffset].templateId = 32; +ctx->componentMemory[coffset].templateName = "GetDistance"; +ctx->componentMemory[coffset].signalStart = soffset; +ctx->componentMemory[coffset].inputCounter = 4; +ctx->componentMemory[coffset].componentName = componentName; +ctx->componentMemory[coffset].idFather = componentFather; +ctx->componentMemory[coffset].subcomponents = new uint[3]{0}; +} + +void GetDistance_32_run(uint ctx_index,Circom_CalcWit* ctx){ +FrElement* signalValues = ctx->signalValues; +u64 mySignalStart = ctx->componentMemory[ctx_index].signalStart; +std::string myTemplateName = ctx->componentMemory[ctx_index].templateName; +std::string myComponentName = ctx->componentMemory[ctx_index].componentName; +u64 myFather = ctx->componentMemory[ctx_index].idFather; +u64 myId = ctx_index; +u32* mySubcomponents = ctx->componentMemory[ctx_index].subcomponents; +bool* mySubcomponentsParallel = ctx->componentMemory[ctx_index].subcomponentsParallel; +FrElement* circuitConstants = ctx->circuitConstants; +std::string* listOfTemplateMessages = ctx->listOfTemplateMessages; +FrElement expaux[3]; +FrElement lvar[8]; +uint sub_component_aux; +uint index_multiple_eq; +{ +PFrElement aux_dest = &lvar[0]; +// load src +// end load src +Fr_copy(aux_dest,&circuitConstants[4]); +} +{ +uint aux_create = 0; +int aux_cmp_num = 0+ctx_index+1; +uint csoffset = mySignalStart+10; +for (uint i = 0; i < 1; i++) { +std::string new_cmp_name = "absoluteValueSubtraction"; +AbsoluteValueSubtraction_31_create(csoffset,aux_cmp_num,ctx,new_cmp_name,myId); +mySubcomponents[aux_create+i] = aux_cmp_num; +csoffset += 50 ; +aux_cmp_num += 8; +} +} +{ +uint aux_create = 1; +int aux_cmp_num = 8+ctx_index+1; +uint csoffset = mySignalStart+60; +for (uint i = 0; i < 1; i++) { +std::string new_cmp_name = "absoluteValueSubtraction2"; +AbsoluteValueSubtraction_31_create(csoffset,aux_cmp_num,ctx,new_cmp_name,myId); +mySubcomponents[aux_create+i] = aux_cmp_num; +csoffset += 50 ; +aux_cmp_num += 8; +} +} +{ +uint aux_create = 2; +int aux_cmp_num = 16+ctx_index+1; +uint csoffset = mySignalStart+110; +for (uint i = 0; i < 1; i++) { +std::string new_cmp_name = "sqrt"; +Sqrt_14_create(csoffset,aux_cmp_num,ctx,new_cmp_name,myId); +mySubcomponents[aux_create+i] = aux_cmp_num; +csoffset += 68 ; +aux_cmp_num += 13; +} +} +{ +PFrElement aux_dest = &lvar[1]; +// load src +// end load src +Fr_copy(aux_dest,&circuitConstants[18]); +} +{ +PFrElement aux_dest = &lvar[2]; +// load src +// end load src +Fr_copy(aux_dest,&circuitConstants[19]); +} +{ +PFrElement aux_dest = &lvar[3]; +// load src +// end load src +Fr_copy(aux_dest,&circuitConstants[19]); +} +{ +PFrElement aux_dest = &lvar[4]; +// load src +// end load src +Fr_copy(aux_dest,&circuitConstants[29]); +} +{ +PFrElement aux_dest = &lvar[5]; +// load src +// end load src +Fr_copy(aux_dest,&circuitConstants[29]); +} +{ +uint cmp_index_ref = 0; +{ +PFrElement aux_dest = &ctx->signalValues[ctx->componentMemory[mySubcomponents[cmp_index_ref]].signalStart + 1]; +// load src +// end load src +Fr_copy(aux_dest,&signalValues[mySignalStart + 1]); +} +// no need to run sub component +ctx->componentMemory[mySubcomponents[cmp_index_ref]].inputCounter -= 1; +assert(ctx->componentMemory[mySubcomponents[cmp_index_ref]].inputCounter > 0); +} +{ +uint cmp_index_ref = 0; +{ +PFrElement aux_dest = &ctx->signalValues[ctx->componentMemory[mySubcomponents[cmp_index_ref]].signalStart + 2]; +// load src +// end load src +Fr_copy(aux_dest,&signalValues[mySignalStart + 3]); +} +// need to run sub component +ctx->componentMemory[mySubcomponents[cmp_index_ref]].inputCounter -= 1; +assert(!(ctx->componentMemory[mySubcomponents[cmp_index_ref]].inputCounter)); +AbsoluteValueSubtraction_31_run(mySubcomponents[cmp_index_ref],ctx); +} +{ +PFrElement aux_dest = &signalValues[mySignalStart + 5]; +// load src +// end load src +Fr_copy(aux_dest,&ctx->signalValues[ctx->componentMemory[mySubcomponents[0]].signalStart + 0]); +} +{ +uint cmp_index_ref = 1; +{ +PFrElement aux_dest = &ctx->signalValues[ctx->componentMemory[mySubcomponents[cmp_index_ref]].signalStart + 1]; +// load src +// end load src +Fr_copy(aux_dest,&signalValues[mySignalStart + 2]); +} +// no need to run sub component +ctx->componentMemory[mySubcomponents[cmp_index_ref]].inputCounter -= 1; +assert(ctx->componentMemory[mySubcomponents[cmp_index_ref]].inputCounter > 0); +} +{ +uint cmp_index_ref = 1; +{ +PFrElement aux_dest = &ctx->signalValues[ctx->componentMemory[mySubcomponents[cmp_index_ref]].signalStart + 2]; +// load src +// end load src +Fr_copy(aux_dest,&signalValues[mySignalStart + 4]); +} +// need to run sub component +ctx->componentMemory[mySubcomponents[cmp_index_ref]].inputCounter -= 1; +assert(!(ctx->componentMemory[mySubcomponents[cmp_index_ref]].inputCounter)); +AbsoluteValueSubtraction_31_run(mySubcomponents[cmp_index_ref],ctx); +} +{ +PFrElement aux_dest = &signalValues[mySignalStart + 6]; +// load src +// end load src +Fr_copy(aux_dest,&ctx->signalValues[ctx->componentMemory[mySubcomponents[1]].signalStart + 0]); +} +{ +PFrElement aux_dest = &signalValues[mySignalStart + 7]; +// load src +Fr_mul(&expaux[0],&signalValues[mySignalStart + 5],&signalValues[mySignalStart + 5]); // line circom 30 +// end load src +Fr_copy(aux_dest,&expaux[0]); +} +{ +PFrElement aux_dest = &lvar[6]; +// load src +// end load src +Fr_copy(aux_dest,&circuitConstants[32]); +} +{ +PFrElement aux_dest = &signalValues[mySignalStart + 8]; +// load src +Fr_mul(&expaux[0],&signalValues[mySignalStart + 6],&signalValues[mySignalStart + 6]); // line circom 32 +// end load src +Fr_copy(aux_dest,&expaux[0]); +} +{ +PFrElement aux_dest = &signalValues[mySignalStart + 9]; +// load src +Fr_add(&expaux[0],&signalValues[mySignalStart + 7],&signalValues[mySignalStart + 8]); // line circom 33 +// end load src +Fr_copy(aux_dest,&expaux[0]); +} +{ +PFrElement aux_dest = &lvar[7]; +// load src +// end load src +Fr_copy(aux_dest,&circuitConstants[12]); +} +{ +uint cmp_index_ref = 2; +{ +PFrElement aux_dest = &ctx->signalValues[ctx->componentMemory[mySubcomponents[cmp_index_ref]].signalStart + 1]; +// load src +// end load src +Fr_copy(aux_dest,&signalValues[mySignalStart + 9]); +} +// need to run sub component +ctx->componentMemory[mySubcomponents[cmp_index_ref]].inputCounter -= 1; +assert(!(ctx->componentMemory[mySubcomponents[cmp_index_ref]].inputCounter)); +Sqrt_14_run(mySubcomponents[cmp_index_ref],ctx); +} +{ +PFrElement aux_dest = &signalValues[mySignalStart + 0]; +// load src +// end load src +Fr_copy(aux_dest,&ctx->signalValues[ctx->componentMemory[mySubcomponents[2]].signalStart + 0]); +} +for (uint i = 0; i < 3; i++){ +uint index_subc = ctx->componentMemory[ctx_index].subcomponents[i]; +if (index_subc != 0)release_memory_component(ctx,index_subc); +} +} + +void Num2Bits_33_create(uint soffset,uint coffset,Circom_CalcWit* ctx,std::string componentName,uint componentFather){ +ctx->componentMemory[coffset].templateId = 33; +ctx->componentMemory[coffset].templateName = "Num2Bits"; +ctx->componentMemory[coffset].signalStart = soffset; +ctx->componentMemory[coffset].inputCounter = 1; +ctx->componentMemory[coffset].componentName = componentName; +ctx->componentMemory[coffset].idFather = componentFather; +ctx->componentMemory[coffset].subcomponents = new uint[0]; +} + +void Num2Bits_33_run(uint ctx_index,Circom_CalcWit* ctx){ +FrElement* signalValues = ctx->signalValues; +u64 mySignalStart = ctx->componentMemory[ctx_index].signalStart; +std::string myTemplateName = ctx->componentMemory[ctx_index].templateName; +std::string myComponentName = ctx->componentMemory[ctx_index].componentName; +u64 myFather = ctx->componentMemory[ctx_index].idFather; +u64 myId = ctx_index; +u32* mySubcomponents = ctx->componentMemory[ctx_index].subcomponents; +bool* mySubcomponentsParallel = ctx->componentMemory[ctx_index].subcomponentsParallel; +FrElement* circuitConstants = ctx->circuitConstants; +std::string* listOfTemplateMessages = ctx->listOfTemplateMessages; +FrElement expaux[6]; +FrElement lvar[4]; +uint sub_component_aux; +uint index_multiple_eq; +{ +PFrElement aux_dest = &lvar[0]; +// load src +// end load src +Fr_copy(aux_dest,&circuitConstants[10]); +} +{ +PFrElement aux_dest = &lvar[1]; +// load src +// end load src +Fr_copy(aux_dest,&circuitConstants[1]); +} +{ +PFrElement aux_dest = &lvar[2]; +// load src +// end load src +Fr_copy(aux_dest,&circuitConstants[2]); +} +{ +PFrElement aux_dest = &lvar[3]; +// load src +// end load src +Fr_copy(aux_dest,&circuitConstants[1]); +} +Fr_lt(&expaux[0],&lvar[3],&circuitConstants[10]); // line circom 31 +while(Fr_isTrue(&expaux[0])){ +{ +PFrElement aux_dest = &signalValues[mySignalStart + ((1 * Fr_toInt(&lvar[3])) + 0)]; +// load src +Fr_shr(&expaux[1],&signalValues[mySignalStart + 22],&lvar[3]); // line circom 32 +Fr_band(&expaux[0],&expaux[1],&circuitConstants[2]); // line circom 32 +// end load src +Fr_copy(aux_dest,&expaux[0]); +} +Fr_sub(&expaux[3],&signalValues[mySignalStart + ((1 * Fr_toInt(&lvar[3])) + 0)],&circuitConstants[2]); // line circom 33 +Fr_mul(&expaux[1],&signalValues[mySignalStart + ((1 * Fr_toInt(&lvar[3])) + 0)],&expaux[3]); // line circom 33 +Fr_eq(&expaux[0],&expaux[1],&circuitConstants[1]); // line circom 33 +if (!Fr_isTrue(&expaux[0])) std::cout << "Failed assert in template/function " << myTemplateName << " line 33. " << "Followed trace of components: " << ctx->getTrace(myId) << std::endl; +assert(Fr_isTrue(&expaux[0])); +{ +PFrElement aux_dest = &lvar[1]; +// load src +Fr_mul(&expaux[2],&signalValues[mySignalStart + ((1 * Fr_toInt(&lvar[3])) + 0)],&lvar[2]); // line circom 34 +Fr_add(&expaux[0],&lvar[1],&expaux[2]); // line circom 34 +// end load src +Fr_copy(aux_dest,&expaux[0]); +} +{ +PFrElement aux_dest = &lvar[2]; +// load src +Fr_add(&expaux[0],&lvar[2],&lvar[2]); // line circom 35 +// end load src +Fr_copy(aux_dest,&expaux[0]); +} +{ +PFrElement aux_dest = &lvar[3]; +// load src +Fr_add(&expaux[0],&lvar[3],&circuitConstants[2]); // line circom 31 +// end load src +Fr_copy(aux_dest,&expaux[0]); +} +Fr_lt(&expaux[0],&lvar[3],&circuitConstants[10]); // line circom 31 +} +Fr_eq(&expaux[0],&lvar[1],&signalValues[mySignalStart + 22]); // line circom 38 +if (!Fr_isTrue(&expaux[0])) std::cout << "Failed assert in template/function " << myTemplateName << " line 38. " << "Followed trace of components: " << ctx->getTrace(myId) << std::endl; +assert(Fr_isTrue(&expaux[0])); +for (uint i = 0; i < 0; i++){ +uint index_subc = ctx->componentMemory[ctx_index].subcomponents[i]; +if (index_subc != 0)release_memory_component(ctx,index_subc); +} +} + +void LessThan_34_create(uint soffset,uint coffset,Circom_CalcWit* ctx,std::string componentName,uint componentFather){ +ctx->componentMemory[coffset].templateId = 34; +ctx->componentMemory[coffset].templateName = "LessThan"; +ctx->componentMemory[coffset].signalStart = soffset; +ctx->componentMemory[coffset].inputCounter = 2; +ctx->componentMemory[coffset].componentName = componentName; +ctx->componentMemory[coffset].idFather = componentFather; +ctx->componentMemory[coffset].subcomponents = new uint[1]{0}; +} + +void LessThan_34_run(uint ctx_index,Circom_CalcWit* ctx){ +FrElement* signalValues = ctx->signalValues; +u64 mySignalStart = ctx->componentMemory[ctx_index].signalStart; +std::string myTemplateName = ctx->componentMemory[ctx_index].templateName; +std::string myComponentName = ctx->componentMemory[ctx_index].componentName; +u64 myFather = ctx->componentMemory[ctx_index].idFather; +u64 myId = ctx_index; +u32* mySubcomponents = ctx->componentMemory[ctx_index].subcomponents; +bool* mySubcomponentsParallel = ctx->componentMemory[ctx_index].subcomponentsParallel; +FrElement* circuitConstants = ctx->circuitConstants; +std::string* listOfTemplateMessages = ctx->listOfTemplateMessages; +FrElement expaux[4]; +FrElement lvar[1]; +uint sub_component_aux; +uint index_multiple_eq; +{ +PFrElement aux_dest = &lvar[0]; +// load src +// end load src +Fr_copy(aux_dest,&circuitConstants[3]); +} +{ +uint aux_create = 0; +int aux_cmp_num = 0+ctx_index+1; +uint csoffset = mySignalStart+3; +for (uint i = 0; i < 1; i++) { +std::string new_cmp_name = "n2b"; +Num2Bits_33_create(csoffset,aux_cmp_num,ctx,new_cmp_name,myId); +mySubcomponents[aux_create+i] = aux_cmp_num; +csoffset += 23 ; +aux_cmp_num += 1; +} +} +if (!Fr_isTrue(&circuitConstants[2])) std::cout << "Failed assert in template/function " << myTemplateName << " line 90. " << "Followed trace of components: " << ctx->getTrace(myId) << std::endl; +assert(Fr_isTrue(&circuitConstants[2])); +{ +uint cmp_index_ref = 0; +{ +PFrElement aux_dest = &ctx->signalValues[ctx->componentMemory[mySubcomponents[cmp_index_ref]].signalStart + 22]; +// load src +Fr_add(&expaux[1],&signalValues[mySignalStart + 1],&circuitConstants[48]); // line circom 96 +Fr_sub(&expaux[0],&expaux[1],&signalValues[mySignalStart + 2]); // line circom 96 +// end load src +Fr_copy(aux_dest,&expaux[0]); +} +// need to run sub component +ctx->componentMemory[mySubcomponents[cmp_index_ref]].inputCounter -= 1; +assert(!(ctx->componentMemory[mySubcomponents[cmp_index_ref]].inputCounter)); +Num2Bits_33_run(mySubcomponents[cmp_index_ref],ctx); +} +{ +PFrElement aux_dest = &signalValues[mySignalStart + 0]; +// load src +Fr_sub(&expaux[0],&circuitConstants[2],&ctx->signalValues[ctx->componentMemory[mySubcomponents[0]].signalStart + 21]); // line circom 98 +// end load src +Fr_copy(aux_dest,&expaux[0]); +} +for (uint i = 0; i < 1; i++){ +uint index_subc = ctx->componentMemory[ctx_index].subcomponents[i]; +if (index_subc != 0)release_memory_component(ctx,index_subc); +} +} + +void DetectCollision_35_create(uint soffset,uint coffset,Circom_CalcWit* ctx,std::string componentName,uint componentFather){ +ctx->componentMemory[coffset].templateId = 35; +ctx->componentMemory[coffset].templateName = "DetectCollision"; +ctx->componentMemory[coffset].signalStart = soffset; +ctx->componentMemory[coffset].inputCounter = 15; +ctx->componentMemory[coffset].componentName = componentName; +ctx->componentMemory[coffset].idFather = componentFather; +ctx->componentMemory[coffset].subcomponents = new uint[24]{0}; +} + +void DetectCollision_35_run(uint ctx_index,Circom_CalcWit* ctx){ +FrElement* signalValues = ctx->signalValues; +u64 mySignalStart = ctx->componentMemory[ctx_index].signalStart; +std::string myTemplateName = ctx->componentMemory[ctx_index].templateName; +std::string myComponentName = ctx->componentMemory[ctx_index].componentName; +u64 myFather = ctx->componentMemory[ctx_index].idFather; +u64 myId = ctx_index; +u32* mySubcomponents = ctx->componentMemory[ctx_index].subcomponents; +bool* mySubcomponentsParallel = ctx->componentMemory[ctx_index].subcomponentsParallel; +FrElement* circuitConstants = ctx->circuitConstants; +std::string* listOfTemplateMessages = ctx->listOfTemplateMessages; +FrElement expaux[3]; +FrElement lvar[2]; +uint sub_component_aux; +uint index_multiple_eq; +{ +PFrElement aux_dest = &lvar[0]; +// load src +// end load src +Fr_copy(aux_dest,&circuitConstants[34]); +} +{ +uint aux_create = 0; +int aux_cmp_num = 8+ctx_index+1; +uint csoffset = mySignalStart+77; +uint aux_dimensions[1] = {4}; +for (uint i = 0; i < 4; i++) { +std::string new_cmp_name = "getDistance"+ctx->generate_position_array(aux_dimensions, 1, i); +GetDistance_32_create(csoffset,aux_cmp_num,ctx,new_cmp_name,myId); +mySubcomponents[aux_create+i] = aux_cmp_num; +csoffset += 178 ; +aux_cmp_num += 30; +} +} +{ +uint aux_create = 4; +int aux_cmp_num = 128+ctx_index+1; +uint csoffset = mySignalStart+789; +uint aux_dimensions[1] = {4}; +for (uint i = 0; i < 4; i++) { +std::string new_cmp_name = "isZero"+ctx->generate_position_array(aux_dimensions, 1, i); +IsZero_1_create(csoffset,aux_cmp_num,ctx,new_cmp_name,myId); +mySubcomponents[aux_create+i] = aux_cmp_num; +csoffset += 3 ; +aux_cmp_num += 1; +} +} +{ +uint aux_create = 8; +int aux_cmp_num = 0+ctx_index+1; +uint csoffset = mySignalStart+45; +uint aux_dimensions[1] = {4}; +for (uint i = 0; i < 4; i++) { +std::string new_cmp_name = "distanceMinMux"+ctx->generate_position_array(aux_dimensions, 1, i); +Mux1_5_create(csoffset,aux_cmp_num,ctx,new_cmp_name,myId); +mySubcomponents[aux_create+i] = aux_cmp_num; +csoffset += 8 ; +aux_cmp_num += 2; +} +} +{ +uint aux_create = 12; +int aux_cmp_num = 132+ctx_index+1; +uint csoffset = mySignalStart+801; +uint aux_dimensions[1] = {4}; +for (uint i = 0; i < 4; i++) { +std::string new_cmp_name = "lessThan"+ctx->generate_position_array(aux_dimensions, 1, i); +LessThan_34_create(csoffset,aux_cmp_num,ctx,new_cmp_name,myId); +mySubcomponents[aux_create+i] = aux_cmp_num; +csoffset += 26 ; +aux_cmp_num += 2; +} +} +{ +uint aux_create = 16; +int aux_cmp_num = 140+ctx_index+1; +uint csoffset = mySignalStart+905; +uint aux_dimensions[1] = {4}; +for (uint i = 0; i < 4; i++) { +std::string new_cmp_name = "mux"+ctx->generate_position_array(aux_dimensions, 1, i); +Mux1_5_create(csoffset,aux_cmp_num,ctx,new_cmp_name,myId); +mySubcomponents[aux_create+i] = aux_cmp_num; +csoffset += 8 ; +aux_cmp_num += 2; +} +} +{ +uint aux_create = 20; +int aux_cmp_num = 148+ctx_index+1; +uint csoffset = mySignalStart+937; +uint aux_dimensions[1] = {4}; +for (uint i = 0; i < 4; i++) { +std::string new_cmp_name = "mux2"+ctx->generate_position_array(aux_dimensions, 1, i); +Mux1_5_create(csoffset,aux_cmp_num,ctx,new_cmp_name,myId); +mySubcomponents[aux_create+i] = aux_cmp_num; +csoffset += 8 ; +aux_cmp_num += 2; +} +} +{ +PFrElement aux_dest = &signalValues[mySignalStart + 30]; +// load src +// end load src +Fr_copy(aux_dest,&signalValues[mySignalStart + 27]); +} +{ +PFrElement aux_dest = &signalValues[mySignalStart + 31]; +// load src +// end load src +Fr_copy(aux_dest,&signalValues[mySignalStart + 28]); +} +{ +PFrElement aux_dest = &signalValues[mySignalStart + 32]; +// load src +// end load src +Fr_copy(aux_dest,&signalValues[mySignalStart + 29]); +} +{ +PFrElement aux_dest = &lvar[1]; +// load src +// end load src +Fr_copy(aux_dest,&circuitConstants[1]); +} +Fr_lt(&expaux[0],&lvar[1],&circuitConstants[34]); // line circom 26 +while(Fr_isTrue(&expaux[0])){ +{ +uint cmp_index_ref = ((1 * Fr_toInt(&lvar[1])) + 0); +{ +PFrElement aux_dest = &ctx->signalValues[ctx->componentMemory[mySubcomponents[cmp_index_ref]].signalStart + 1]; +// load src +// end load src +Fr_copy(aux_dest,&signalValues[mySignalStart + (((3 * Fr_toInt(&lvar[1])) + 0) + 15)]); +} +// run sub component if needed +if(!(ctx->componentMemory[mySubcomponents[cmp_index_ref]].inputCounter -= 1)){ +GetDistance_32_run(mySubcomponents[cmp_index_ref],ctx); + +} +} +{ +uint cmp_index_ref = ((1 * Fr_toInt(&lvar[1])) + 0); +{ +PFrElement aux_dest = &ctx->signalValues[ctx->componentMemory[mySubcomponents[cmp_index_ref]].signalStart + 2]; +// load src +// end load src +Fr_copy(aux_dest,&signalValues[mySignalStart + (((3 * Fr_toInt(&lvar[1])) + 1) + 15)]); +} +// run sub component if needed +if(!(ctx->componentMemory[mySubcomponents[cmp_index_ref]].inputCounter -= 1)){ +GetDistance_32_run(mySubcomponents[cmp_index_ref],ctx); + +} +} +{ +uint cmp_index_ref = ((1 * Fr_toInt(&lvar[1])) + 0); +{ +PFrElement aux_dest = &ctx->signalValues[ctx->componentMemory[mySubcomponents[cmp_index_ref]].signalStart + 3]; +// load src +// end load src +Fr_copy(aux_dest,&signalValues[mySignalStart + (((3 * Fr_toInt(&lvar[1])) + 0) + 30)]); +} +// run sub component if needed +if(!(ctx->componentMemory[mySubcomponents[cmp_index_ref]].inputCounter -= 1)){ +GetDistance_32_run(mySubcomponents[cmp_index_ref],ctx); + +} +} +{ +uint cmp_index_ref = ((1 * Fr_toInt(&lvar[1])) + 0); +{ +PFrElement aux_dest = &ctx->signalValues[ctx->componentMemory[mySubcomponents[cmp_index_ref]].signalStart + 4]; +// load src +// end load src +Fr_copy(aux_dest,&signalValues[mySignalStart + (((3 * Fr_toInt(&lvar[1])) + 1) + 30)]); +} +// run sub component if needed +if(!(ctx->componentMemory[mySubcomponents[cmp_index_ref]].inputCounter -= 1)){ +GetDistance_32_run(mySubcomponents[cmp_index_ref],ctx); + +} +} +{ +uint cmp_index_ref = ((1 * Fr_toInt(&lvar[1])) + 4); +{ +PFrElement aux_dest = &ctx->signalValues[ctx->componentMemory[mySubcomponents[cmp_index_ref]].signalStart + 1]; +// load src +// end load src +Fr_copy(aux_dest,&signalValues[mySignalStart + (((3 * Fr_toInt(&lvar[1])) + 2) + 30)]); +} +// run sub component if needed +if(!(ctx->componentMemory[mySubcomponents[cmp_index_ref]].inputCounter -= 1)){ +IsZero_1_run(mySubcomponents[cmp_index_ref],ctx); + +} +} +{ +uint cmp_index_ref = ((1 * Fr_toInt(&lvar[1])) + 8); +{ +PFrElement aux_dest = &ctx->signalValues[ctx->componentMemory[mySubcomponents[cmp_index_ref]].signalStart + 1]; +// load src +Fr_mul(&expaux[0],&signalValues[mySignalStart + (((3 * Fr_toInt(&lvar[1])) + 2) + 15)],&circuitConstants[0]); // line circom 44 +// end load src +Fr_copy(aux_dest,&expaux[0]); +} +// run sub component if needed +if(!(ctx->componentMemory[mySubcomponents[cmp_index_ref]].inputCounter -= 1)){ +Mux1_5_run(mySubcomponents[cmp_index_ref],ctx); + +} +} +{ +uint cmp_index_ref = ((1 * Fr_toInt(&lvar[1])) + 8); +{ +PFrElement aux_dest = &ctx->signalValues[ctx->componentMemory[mySubcomponents[cmp_index_ref]].signalStart + 2]; +// load src +// end load src +Fr_copy(aux_dest,&circuitConstants[1]); +} +// run sub component if needed +if(!(ctx->componentMemory[mySubcomponents[cmp_index_ref]].inputCounter -= 1)){ +Mux1_5_run(mySubcomponents[cmp_index_ref],ctx); + +} +} +{ +uint cmp_index_ref = ((1 * Fr_toInt(&lvar[1])) + 8); +{ +PFrElement aux_dest = &ctx->signalValues[ctx->componentMemory[mySubcomponents[cmp_index_ref]].signalStart + 3]; +// load src +// end load src +Fr_copy(aux_dest,&ctx->signalValues[ctx->componentMemory[mySubcomponents[((1 * Fr_toInt(&lvar[1])) + 4)]].signalStart + 0]); +} +// run sub component if needed +if(!(ctx->componentMemory[mySubcomponents[cmp_index_ref]].inputCounter -= 1)){ +Mux1_5_run(mySubcomponents[cmp_index_ref],ctx); + +} +} +{ +uint cmp_index_ref = ((1 * Fr_toInt(&lvar[1])) + 12); +{ +PFrElement aux_dest = &ctx->signalValues[ctx->componentMemory[mySubcomponents[cmp_index_ref]].signalStart + 1]; +// load src +// end load src +Fr_copy(aux_dest,&ctx->signalValues[ctx->componentMemory[mySubcomponents[((1 * Fr_toInt(&lvar[1])) + 0)]].signalStart + 0]); +} +// run sub component if needed +if(!(ctx->componentMemory[mySubcomponents[cmp_index_ref]].inputCounter -= 1)){ +LessThan_34_run(mySubcomponents[cmp_index_ref],ctx); + +} +} +{ +uint cmp_index_ref = ((1 * Fr_toInt(&lvar[1])) + 12); +{ +PFrElement aux_dest = &ctx->signalValues[ctx->componentMemory[mySubcomponents[cmp_index_ref]].signalStart + 2]; +// load src +// end load src +Fr_copy(aux_dest,&ctx->signalValues[ctx->componentMemory[mySubcomponents[((1 * Fr_toInt(&lvar[1])) + 8)]].signalStart + 0]); +} +// run sub component if needed +if(!(ctx->componentMemory[mySubcomponents[cmp_index_ref]].inputCounter -= 1)){ +LessThan_34_run(mySubcomponents[cmp_index_ref],ctx); + +} +} +{ +uint cmp_index_ref = ((1 * Fr_toInt(&lvar[1])) + 16); +{ +PFrElement aux_dest = &ctx->signalValues[ctx->componentMemory[mySubcomponents[cmp_index_ref]].signalStart + 1]; +// load src +// end load src +Fr_copy(aux_dest,&signalValues[mySignalStart + (((3 * Fr_toInt(&lvar[1])) + 2) + 15)]); +} +// run sub component if needed +if(!(ctx->componentMemory[mySubcomponents[cmp_index_ref]].inputCounter -= 1)){ +Mux1_5_run(mySubcomponents[cmp_index_ref],ctx); + +} +} +{ +uint cmp_index_ref = ((1 * Fr_toInt(&lvar[1])) + 16); +{ +PFrElement aux_dest = &ctx->signalValues[ctx->componentMemory[mySubcomponents[cmp_index_ref]].signalStart + 2]; +// load src +// end load src +Fr_copy(aux_dest,&circuitConstants[1]); +} +// run sub component if needed +if(!(ctx->componentMemory[mySubcomponents[cmp_index_ref]].inputCounter -= 1)){ +Mux1_5_run(mySubcomponents[cmp_index_ref],ctx); + +} +} +{ +uint cmp_index_ref = ((1 * Fr_toInt(&lvar[1])) + 16); +{ +PFrElement aux_dest = &ctx->signalValues[ctx->componentMemory[mySubcomponents[cmp_index_ref]].signalStart + 3]; +// load src +// end load src +Fr_copy(aux_dest,&ctx->signalValues[ctx->componentMemory[mySubcomponents[((1 * Fr_toInt(&lvar[1])) + 12)]].signalStart + 0]); +} +// run sub component if needed +if(!(ctx->componentMemory[mySubcomponents[cmp_index_ref]].inputCounter -= 1)){ +Mux1_5_run(mySubcomponents[cmp_index_ref],ctx); + +} +} +{ +PFrElement aux_dest = &signalValues[mySignalStart + (((3 * Fr_toInt(&lvar[1])) + 0) + 0)]; +// load src +// end load src +Fr_copy(aux_dest,&signalValues[mySignalStart + (((3 * Fr_toInt(&lvar[1])) + 0) + 15)]); +} +{ +PFrElement aux_dest = &signalValues[mySignalStart + (((3 * Fr_toInt(&lvar[1])) + 1) + 0)]; +// load src +// end load src +Fr_copy(aux_dest,&signalValues[mySignalStart + (((3 * Fr_toInt(&lvar[1])) + 1) + 15)]); +} +{ +PFrElement aux_dest = &signalValues[mySignalStart + (((3 * Fr_toInt(&lvar[1])) + 2) + 0)]; +// load src +// end load src +Fr_copy(aux_dest,&ctx->signalValues[ctx->componentMemory[mySubcomponents[((1 * Fr_toInt(&lvar[1])) + 16)]].signalStart + 0]); +} +{ +uint cmp_index_ref = ((1 * Fr_toInt(&lvar[1])) + 20); +{ +PFrElement aux_dest = &ctx->signalValues[ctx->componentMemory[mySubcomponents[cmp_index_ref]].signalStart + 1]; +// load src +// end load src +Fr_copy(aux_dest,&signalValues[mySignalStart + (((3 * Fr_toInt(&lvar[1])) + 2) + 30)]); +} +// run sub component if needed +if(!(ctx->componentMemory[mySubcomponents[cmp_index_ref]].inputCounter -= 1)){ +Mux1_5_run(mySubcomponents[cmp_index_ref],ctx); + +} +} +{ +uint cmp_index_ref = ((1 * Fr_toInt(&lvar[1])) + 20); +{ +PFrElement aux_dest = &ctx->signalValues[ctx->componentMemory[mySubcomponents[cmp_index_ref]].signalStart + 2]; +// load src +// end load src +Fr_copy(aux_dest,&circuitConstants[1]); +} +// run sub component if needed +if(!(ctx->componentMemory[mySubcomponents[cmp_index_ref]].inputCounter -= 1)){ +Mux1_5_run(mySubcomponents[cmp_index_ref],ctx); + +} +} +{ +uint cmp_index_ref = ((1 * Fr_toInt(&lvar[1])) + 20); +{ +PFrElement aux_dest = &ctx->signalValues[ctx->componentMemory[mySubcomponents[cmp_index_ref]].signalStart + 3]; +// load src +// end load src +Fr_copy(aux_dest,&ctx->signalValues[ctx->componentMemory[mySubcomponents[((1 * Fr_toInt(&lvar[1])) + 12)]].signalStart + 0]); +} +// run sub component if needed +if(!(ctx->componentMemory[mySubcomponents[cmp_index_ref]].inputCounter -= 1)){ +Mux1_5_run(mySubcomponents[cmp_index_ref],ctx); + +} +} +{ +PFrElement aux_dest = &signalValues[mySignalStart + (((3 * (Fr_toInt(&lvar[1]) + 1)) + 0) + 30)]; +// load src +// end load src +Fr_copy(aux_dest,&signalValues[mySignalStart + 27]); +} +{ +PFrElement aux_dest = &signalValues[mySignalStart + (((3 * (Fr_toInt(&lvar[1]) + 1)) + 1) + 30)]; +// load src +// end load src +Fr_copy(aux_dest,&signalValues[mySignalStart + 28]); +} +{ +PFrElement aux_dest = &signalValues[mySignalStart + (((3 * (Fr_toInt(&lvar[1]) + 1)) + 2) + 30)]; +// load src +// end load src +Fr_copy(aux_dest,&ctx->signalValues[ctx->componentMemory[mySubcomponents[((1 * Fr_toInt(&lvar[1])) + 20)]].signalStart + 0]); +} +{ +PFrElement aux_dest = &lvar[1]; +// load src +Fr_add(&expaux[0],&lvar[1],&circuitConstants[2]); // line circom 26 +// end load src +Fr_copy(aux_dest,&expaux[0]); +} +Fr_lt(&expaux[0],&lvar[1],&circuitConstants[34]); // line circom 26 +} +{ +PFrElement aux_dest = &signalValues[mySignalStart + 12]; +// load src +// end load src +Fr_copy(aux_dest,&signalValues[mySignalStart + 42]); +} +{ +PFrElement aux_dest = &signalValues[mySignalStart + 13]; +// load src +// end load src +Fr_copy(aux_dest,&signalValues[mySignalStart + 43]); +} +{ +PFrElement aux_dest = &signalValues[mySignalStart + 14]; +// load src +// end load src +Fr_copy(aux_dest,&signalValues[mySignalStart + 44]); +} +for (uint i = 0; i < 24; i++){ +uint index_subc = ctx->componentMemory[ctx_index].subcomponents[i]; +if (index_subc != 0)release_memory_component(ctx,index_subc); +} +} + +void MultiMux1_36_create(uint soffset,uint coffset,Circom_CalcWit* ctx,std::string componentName,uint componentFather){ +ctx->componentMemory[coffset].templateId = 36; +ctx->componentMemory[coffset].templateName = "MultiMux1"; +ctx->componentMemory[coffset].signalStart = soffset; +ctx->componentMemory[coffset].inputCounter = 11; +ctx->componentMemory[coffset].componentName = componentName; +ctx->componentMemory[coffset].idFather = componentFather; +ctx->componentMemory[coffset].subcomponents = new uint[0]; +} + +void MultiMux1_36_run(uint ctx_index,Circom_CalcWit* ctx){ +FrElement* signalValues = ctx->signalValues; +u64 mySignalStart = ctx->componentMemory[ctx_index].signalStart; +std::string myTemplateName = ctx->componentMemory[ctx_index].templateName; +std::string myComponentName = ctx->componentMemory[ctx_index].componentName; +u64 myFather = ctx->componentMemory[ctx_index].idFather; +u64 myId = ctx_index; +u32* mySubcomponents = ctx->componentMemory[ctx_index].subcomponents; +bool* mySubcomponentsParallel = ctx->componentMemory[ctx_index].subcomponentsParallel; +FrElement* circuitConstants = ctx->circuitConstants; +std::string* listOfTemplateMessages = ctx->listOfTemplateMessages; +FrElement expaux[5]; +FrElement lvar[2]; +uint sub_component_aux; +uint index_multiple_eq; +{ +PFrElement aux_dest = &lvar[0]; +// load src +// end load src +Fr_copy(aux_dest,&circuitConstants[49]); +} +{ +PFrElement aux_dest = &lvar[1]; +// load src +// end load src +Fr_copy(aux_dest,&circuitConstants[1]); +} +Fr_lt(&expaux[0],&lvar[1],&circuitConstants[49]); // line circom 26 +while(Fr_isTrue(&expaux[0])){ +{ +PFrElement aux_dest = &signalValues[mySignalStart + ((1 * Fr_toInt(&lvar[1])) + 0)]; +// load src +Fr_sub(&expaux[2],&signalValues[mySignalStart + (((2 * Fr_toInt(&lvar[1])) + 1) + 5)],&signalValues[mySignalStart + (((2 * Fr_toInt(&lvar[1])) + 0) + 5)]); // line circom 28 +Fr_mul(&expaux[1],&expaux[2],&signalValues[mySignalStart + 15]); // line circom 28 +Fr_add(&expaux[0],&expaux[1],&signalValues[mySignalStart + (((2 * Fr_toInt(&lvar[1])) + 0) + 5)]); // line circom 28 +// end load src +Fr_copy(aux_dest,&expaux[0]); +} +{ +PFrElement aux_dest = &lvar[1]; +// load src +Fr_add(&expaux[0],&lvar[1],&circuitConstants[2]); // line circom 26 +// end load src +Fr_copy(aux_dest,&expaux[0]); +} +Fr_lt(&expaux[0],&lvar[1],&circuitConstants[49]); // line circom 26 +} +for (uint i = 0; i < 0; i++){ +uint index_subc = ctx->componentMemory[ctx_index].subcomponents[i]; +if (index_subc != 0)release_memory_component(ctx,index_subc); +} +} + +void StepState_37_create(uint soffset,uint coffset,Circom_CalcWit* ctx,std::string componentName,uint componentFather){ +ctx->componentMemory[coffset].templateId = 37; +ctx->componentMemory[coffset].templateName = "StepState"; +ctx->componentMemory[coffset].signalStart = soffset; +ctx->componentMemory[coffset].inputCounter = 779; +ctx->componentMemory[coffset].componentName = componentName; +ctx->componentMemory[coffset].idFather = componentFather; +ctx->componentMemory[coffset].subcomponents = new uint[2502]{0}; +} + +void StepState_37_run(uint ctx_index,Circom_CalcWit* ctx){ +FrElement* signalValues = ctx->signalValues; +u64 mySignalStart = ctx->componentMemory[ctx_index].signalStart; +std::string myTemplateName = ctx->componentMemory[ctx_index].templateName; +std::string myComponentName = ctx->componentMemory[ctx_index].componentName; +u64 myFather = ctx->componentMemory[ctx_index].idFather; +u64 myId = ctx_index; +u32* mySubcomponents = ctx->componentMemory[ctx_index].subcomponents; +bool* mySubcomponentsParallel = ctx->componentMemory[ctx_index].subcomponentsParallel; +FrElement* circuitConstants = ctx->circuitConstants; +std::string* listOfTemplateMessages = ctx->listOfTemplateMessages; +FrElement expaux[4]; +FrElement lvar[35]; +uint sub_component_aux; +uint index_multiple_eq; +{ +PFrElement aux_dest = &lvar[0]; +// load src +// end load src +Fr_copy(aux_dest,&circuitConstants[50]); +} +{ +PFrElement aux_dest = &lvar[1]; +// load src +// end load src +Fr_copy(aux_dest,&circuitConstants[34]); +} +{ +uint aux_create = 0; +int aux_cmp_num = 175251+ctx_index+1; +uint csoffset = mySignalStart+1396309; +for (uint i = 0; i < 1; i++) { +std::string new_cmp_name = "whatShouldStartingMissilePositionBe"; +MultiMux1_0_create(csoffset,aux_cmp_num,ctx,new_cmp_name,myId); +mySubcomponents[aux_create+i] = aux_cmp_num; +csoffset += 7 ; +aux_cmp_num += 1; +} +} +{ +uint aux_create = 1; +int aux_cmp_num = 173750+ctx_index+1; +uint csoffset = mySignalStart+1388556; +for (uint i = 0; i < 1; i++) { +std::string new_cmp_name = "isMissileZero"; +IsZero_1_create(csoffset,aux_cmp_num,ctx,new_cmp_name,myId); +mySubcomponents[aux_create+i] = aux_cmp_num; +csoffset += 3 ; +aux_cmp_num += 1; +} +} +{ +uint aux_create = 2; +int aux_cmp_num = 43500+ctx_index+1; +uint csoffset = mySignalStart+270056; +uint aux_dimensions[1] = {250}; +for (uint i = 0; i < 250; i++) { +std::string new_cmp_name = "forceAccumulator"+ctx->generate_position_array(aux_dimensions, 1, i); +ForceAccumulator_29_create(csoffset,aux_cmp_num,ctx,new_cmp_name,myId); +mySubcomponents[aux_create+i] = aux_cmp_num; +csoffset += 4474 ; +aux_cmp_num += 521; +} +} +{ +uint aux_create = 252; +int aux_cmp_num = 0+ctx_index+1; +uint csoffset = mySignalStart+806; +uint aux_dimensions[1] = {250}; +for (uint i = 0; i < 250; i++) { +std::string new_cmp_name = "calculateMissile"+ctx->generate_position_array(aux_dimensions, 1, i); +CalculateMissile_30_create(csoffset,aux_cmp_num,ctx,new_cmp_name,myId); +mySubcomponents[aux_create+i] = aux_cmp_num; +csoffset += 108 ; +aux_cmp_num += 17; +} +} +{ +uint aux_create = 502; +int aux_cmp_num = 4250+ctx_index+1; +uint csoffset = mySignalStart+27806; +uint aux_dimensions[1] = {250}; +for (uint i = 0; i < 250; i++) { +std::string new_cmp_name = "detectCollision"+ctx->generate_position_array(aux_dimensions, 1, i); +DetectCollision_35_create(csoffset,aux_cmp_num,ctx,new_cmp_name,myId); +mySubcomponents[aux_create+i] = aux_cmp_num; +csoffset += 969 ; +aux_cmp_num += 157; +} +} +{ +uint aux_create = 752; +int aux_cmp_num = 175001+ctx_index+1; +uint csoffset = mySignalStart+1392309; +uint aux_dimensions[1] = {250}; +for (uint i = 0; i < 250; i++) { +std::string new_cmp_name = "mux"+ctx->generate_position_array(aux_dimensions, 1, i); +MultiMux1_36_create(csoffset,aux_cmp_num,ctx,new_cmp_name,myId); +mySubcomponents[aux_create+i] = aux_cmp_num; +csoffset += 16 ; +aux_cmp_num += 1; +} +} +{ +uint aux_create = 1002; +int aux_cmp_num = 173751+ctx_index+1; +uint csoffset = mySignalStart+1388559; +uint aux_dimensions[1] = {250}; +for (uint i = 0; i < 250; i++) { +std::string new_cmp_name = "isZero"+ctx->generate_position_array(aux_dimensions, 1, i); +IsZero_1_create(csoffset,aux_cmp_num,ctx,new_cmp_name,myId); +mySubcomponents[aux_create+i] = aux_cmp_num; +csoffset += 3 ; +aux_cmp_num += 1; +} +} +{ +uint aux_create = 1252; +int aux_cmp_num = 174251+ctx_index+1; +uint csoffset = mySignalStart+1390059; +uint aux_dimensions[2] = {250,4}; +uint aux_positions [750]= {1,2,3,5,6,7,9,10,11,13,14,15,17,18,19,21,22,23,25,26,27,29,30,31,33,34,35,37,38,39,41,42,43,45,46,47,49,50,51,53,54,55,57,58,59,61,62,63,65,66,67,69,70,71,73,74,75,77,78,79,81,82,83,85,86,87,89,90,91,93,94,95,97,98,99,101,102,103,105,106,107,109,110,111,113,114,115,117,118,119,121,122,123,125,126,127,129,130,131,133,134,135,137,138,139,141,142,143,145,146,147,149,150,151,153,154,155,157,158,159,161,162,163,165,166,167,169,170,171,173,174,175,177,178,179,181,182,183,185,186,187,189,190,191,193,194,195,197,198,199,201,202,203,205,206,207,209,210,211,213,214,215,217,218,219,221,222,223,225,226,227,229,230,231,233,234,235,237,238,239,241,242,243,245,246,247,249,250,251,253,254,255,257,258,259,261,262,263,265,266,267,269,270,271,273,274,275,277,278,279,281,282,283,285,286,287,289,290,291,293,294,295,297,298,299,301,302,303,305,306,307,309,310,311,313,314,315,317,318,319,321,322,323,325,326,327,329,330,331,333,334,335,337,338,339,341,342,343,345,346,347,349,350,351,353,354,355,357,358,359,361,362,363,365,366,367,369,370,371,373,374,375,377,378,379,381,382,383,385,386,387,389,390,391,393,394,395,397,398,399,401,402,403,405,406,407,409,410,411,413,414,415,417,418,419,421,422,423,425,426,427,429,430,431,433,434,435,437,438,439,441,442,443,445,446,447,449,450,451,453,454,455,457,458,459,461,462,463,465,466,467,469,470,471,473,474,475,477,478,479,481,482,483,485,486,487,489,490,491,493,494,495,497,498,499,501,502,503,505,506,507,509,510,511,513,514,515,517,518,519,521,522,523,525,526,527,529,530,531,533,534,535,537,538,539,541,542,543,545,546,547,549,550,551,553,554,555,557,558,559,561,562,563,565,566,567,569,570,571,573,574,575,577,578,579,581,582,583,585,586,587,589,590,591,593,594,595,597,598,599,601,602,603,605,606,607,609,610,611,613,614,615,617,618,619,621,622,623,625,626,627,629,630,631,633,634,635,637,638,639,641,642,643,645,646,647,649,650,651,653,654,655,657,658,659,661,662,663,665,666,667,669,670,671,673,674,675,677,678,679,681,682,683,685,686,687,689,690,691,693,694,695,697,698,699,701,702,703,705,706,707,709,710,711,713,714,715,717,718,719,721,722,723,725,726,727,729,730,731,733,734,735,737,738,739,741,742,743,745,746,747,749,750,751,753,754,755,757,758,759,761,762,763,765,766,767,769,770,771,773,774,775,777,778,779,781,782,783,785,786,787,789,790,791,793,794,795,797,798,799,801,802,803,805,806,807,809,810,811,813,814,815,817,818,819,821,822,823,825,826,827,829,830,831,833,834,835,837,838,839,841,842,843,845,846,847,849,850,851,853,854,855,857,858,859,861,862,863,865,866,867,869,870,871,873,874,875,877,878,879,881,882,883,885,886,887,889,890,891,893,894,895,897,898,899,901,902,903,905,906,907,909,910,911,913,914,915,917,918,919,921,922,923,925,926,927,929,930,931,933,934,935,937,938,939,941,942,943,945,946,947,949,950,951,953,954,955,957,958,959,961,962,963,965,966,967,969,970,971,973,974,975,977,978,979,981,982,983,985,986,987,989,990,991,993,994,995,997,998,999}; +for (uint i_aux = 0; i_aux < 750; i_aux++) { +uint i = aux_positions[i_aux]; +std::string new_cmp_name = "isZeroStep"+ctx->generate_position_array(aux_dimensions, 2, i); +IsZero_1_create(csoffset,aux_cmp_num,ctx,new_cmp_name,myId); +mySubcomponents[aux_create+i] = aux_cmp_num; +csoffset += 3 ; +aux_cmp_num += 1; +} +} +{ +uint aux_create = 2252; +int aux_cmp_num = 174001+ctx_index+1; +uint csoffset = mySignalStart+1389309; +uint aux_dimensions[1] = {250}; +for (uint i = 0; i < 250; i++) { +std::string new_cmp_name = "isZeroDone"+ctx->generate_position_array(aux_dimensions, 1, i); +IsZero_1_create(csoffset,aux_cmp_num,ctx,new_cmp_name,myId); +mySubcomponents[aux_create+i] = aux_cmp_num; +csoffset += 3 ; +aux_cmp_num += 1; +} +} +Fr_eq(&expaux[0],&signalValues[mySignalStart + 52],&signalValues[mySignalStart + 49]); // line circom 21 +if (!Fr_isTrue(&expaux[0])) std::cout << "Failed assert in template/function " << myTemplateName << " line 21. " << "Followed trace of components: " << ctx->getTrace(myId) << std::endl; +assert(Fr_isTrue(&expaux[0])); +Fr_eq(&expaux[0],&signalValues[mySignalStart + 53],&signalValues[mySignalStart + 50]); // line circom 22 +if (!Fr_isTrue(&expaux[0])) std::cout << "Failed assert in template/function " << myTemplateName << " line 22. " << "Followed trace of components: " << ctx->getTrace(myId) << std::endl; +assert(Fr_isTrue(&expaux[0])); +Fr_eq(&expaux[0],&signalValues[mySignalStart + 54],&signalValues[mySignalStart + 51]); // line circom 23 +if (!Fr_isTrue(&expaux[0])) std::cout << "Failed assert in template/function " << myTemplateName << " line 23. " << "Followed trace of components: " << ctx->getTrace(myId) << std::endl; +assert(Fr_isTrue(&expaux[0])); +{ +PFrElement aux_dest = &lvar[2]; +// load src +// end load src +Fr_copy(aux_dest,&circuitConstants[1]); +} +{ +PFrElement aux_dest = &lvar[3]; +// load src +// end load src +Fr_copy(aux_dest,&circuitConstants[1]); +} +{ +PFrElement aux_dest = &lvar[4]; +// load src +// end load src +Fr_copy(aux_dest,&circuitConstants[1]); +} +{ +PFrElement aux_dest = &lvar[5]; +// load src +// end load src +Fr_copy(aux_dest,&circuitConstants[1]); +} +{ +PFrElement aux_dest = &lvar[6]; +// load src +// end load src +Fr_copy(aux_dest,&circuitConstants[1]); +} +{ +PFrElement aux_dest = &lvar[7]; +// load src +// end load src +Fr_copy(aux_dest,&circuitConstants[18]); +} +{ +PFrElement aux_dest = &lvar[8]; +// load src +// end load src +Fr_copy(aux_dest,&circuitConstants[19]); +} +{ +PFrElement aux_dest = &lvar[9]; +// load src +// end load src +Fr_copy(aux_dest,&circuitConstants[19]); +} +{ +PFrElement aux_dest = &lvar[10]; +// load src +// end load src +Fr_copy(aux_dest,&circuitConstants[29]); +} +{ +uint cmp_index_ref = 0; +{ +PFrElement aux_dest = &ctx->signalValues[ctx->componentMemory[mySubcomponents[cmp_index_ref]].signalStart + 2]; +// load src +// end load src +Fr_copy(aux_dest,&signalValues[mySignalStart + 47]); +} +// no need to run sub component +ctx->componentMemory[mySubcomponents[cmp_index_ref]].inputCounter -= 1; +assert(ctx->componentMemory[mySubcomponents[cmp_index_ref]].inputCounter > 0); +} +{ +uint cmp_index_ref = 0; +{ +PFrElement aux_dest = &ctx->signalValues[ctx->componentMemory[mySubcomponents[cmp_index_ref]].signalStart + 3]; +// load src +// end load src +Fr_copy(aux_dest,&circuitConstants[1]); +} +// no need to run sub component +ctx->componentMemory[mySubcomponents[cmp_index_ref]].inputCounter -= 1; +assert(ctx->componentMemory[mySubcomponents[cmp_index_ref]].inputCounter > 0); +} +{ +uint cmp_index_ref = 0; +{ +PFrElement aux_dest = &ctx->signalValues[ctx->componentMemory[mySubcomponents[cmp_index_ref]].signalStart + 4]; +// load src +// end load src +Fr_copy(aux_dest,&signalValues[mySignalStart + 48]); +} +// no need to run sub component +ctx->componentMemory[mySubcomponents[cmp_index_ref]].inputCounter -= 1; +assert(ctx->componentMemory[mySubcomponents[cmp_index_ref]].inputCounter > 0); +} +{ +uint cmp_index_ref = 0; +{ +PFrElement aux_dest = &ctx->signalValues[ctx->componentMemory[mySubcomponents[cmp_index_ref]].signalStart + 5]; +// load src +// end load src +Fr_copy(aux_dest,&circuitConstants[29]); +} +// no need to run sub component +ctx->componentMemory[mySubcomponents[cmp_index_ref]].inputCounter -= 1; +assert(ctx->componentMemory[mySubcomponents[cmp_index_ref]].inputCounter > 0); +} +{ +uint cmp_index_ref = 1; +{ +PFrElement aux_dest = &ctx->signalValues[ctx->componentMemory[mySubcomponents[cmp_index_ref]].signalStart + 1]; +// load src +// end load src +Fr_copy(aux_dest,&signalValues[mySignalStart + 51]); +} +// need to run sub component +ctx->componentMemory[mySubcomponents[cmp_index_ref]].inputCounter -= 1; +assert(!(ctx->componentMemory[mySubcomponents[cmp_index_ref]].inputCounter)); +IsZero_1_run(mySubcomponents[cmp_index_ref],ctx); +} +{ +uint cmp_index_ref = 0; +{ +PFrElement aux_dest = &ctx->signalValues[ctx->componentMemory[mySubcomponents[cmp_index_ref]].signalStart + 6]; +// load src +// end load src +Fr_copy(aux_dest,&ctx->signalValues[ctx->componentMemory[mySubcomponents[1]].signalStart + 0]); +} +// need to run sub component +ctx->componentMemory[mySubcomponents[cmp_index_ref]].inputCounter -= 1; +assert(!(ctx->componentMemory[mySubcomponents[cmp_index_ref]].inputCounter)); +MultiMux1_0_run(mySubcomponents[cmp_index_ref],ctx); +} +{ +PFrElement aux_dest = &lvar[2]; +// load src +// end load src +Fr_copy(aux_dest,&ctx->signalValues[ctx->componentMemory[mySubcomponents[0]].signalStart + 0]); +} +{ +PFrElement aux_dest = &lvar[3]; +// load src +// end load src +Fr_copy(aux_dest,&ctx->signalValues[ctx->componentMemory[mySubcomponents[0]].signalStart + 1]); +} +{ +PFrElement aux_dest = &lvar[4]; +// load src +// end load src +Fr_copy(aux_dest,&signalValues[mySignalStart + 49]); +} +{ +PFrElement aux_dest = &lvar[5]; +// load src +// end load src +Fr_copy(aux_dest,&signalValues[mySignalStart + 50]); +} +{ +PFrElement aux_dest = &lvar[6]; +// load src +// end load src +Fr_copy(aux_dest,&signalValues[mySignalStart + 51]); +} +{ +PFrElement aux_dest = &signalValues[mySignalStart + 805]; +// load src +Fr_mul(&expaux[0],&signalValues[mySignalStart + 26],&signalValues[mySignalStart + 26]); // line circom 56 +// end load src +Fr_copy(aux_dest,&expaux[0]); +} +{ +PFrElement aux_dest = &lvar[11]; +// load src +// end load src +Fr_copy(aux_dest,&circuitConstants[1]); +} +{ +PFrElement aux_dest = &lvar[12]; +// load src +// end load src +Fr_copyn(aux_dest,&signalValues[mySignalStart + 27],20); +} +{ +PFrElement aux_dest = &lvar[32]; +// load src +// end load src +Fr_copy(aux_dest,&circuitConstants[1]); +} +Fr_lt(&expaux[0],&lvar[32],&circuitConstants[50]); // line circom 92 +while(Fr_isTrue(&expaux[0])){ +{ +uint cmp_index_ref = ((1 * Fr_toInt(&lvar[32])) + 2); +{ +PFrElement aux_dest = &ctx->signalValues[ctx->componentMemory[mySubcomponents[cmp_index_ref]].signalStart + 20]; +// load src +// end load src +Fr_copyn(aux_dest,&lvar[12],20); +} +// run sub component if needed +if(!(ctx->componentMemory[mySubcomponents[cmp_index_ref]].inputCounter -= 20)){ +ForceAccumulator_29_run(mySubcomponents[cmp_index_ref],ctx); + +} +} +{ +uint cmp_index_ref = ((1 * Fr_toInt(&lvar[32])) + 252); +{ +PFrElement aux_dest = &ctx->signalValues[ctx->componentMemory[mySubcomponents[cmp_index_ref]].signalStart + 5]; +// load src +// end load src +Fr_copyn(aux_dest,&lvar[2],5); +} +// run sub component if needed +if(!(ctx->componentMemory[mySubcomponents[cmp_index_ref]].inputCounter -= 5)){ +CalculateMissile_30_run(mySubcomponents[cmp_index_ref],ctx); + +} +} +{ +uint cmp_index_ref = ((1 * Fr_toInt(&lvar[32])) + 502); +{ +PFrElement aux_dest = &ctx->signalValues[ctx->componentMemory[mySubcomponents[cmp_index_ref]].signalStart + 27]; +// load src +// end load src +Fr_copy(aux_dest,&ctx->signalValues[ctx->componentMemory[mySubcomponents[((1 * Fr_toInt(&lvar[32])) + 252)]].signalStart + 0]); +} +// run sub component if needed +if(!(ctx->componentMemory[mySubcomponents[cmp_index_ref]].inputCounter -= 1)){ +DetectCollision_35_run(mySubcomponents[cmp_index_ref],ctx); + +} +} +{ +uint cmp_index_ref = ((1 * Fr_toInt(&lvar[32])) + 502); +{ +PFrElement aux_dest = &ctx->signalValues[ctx->componentMemory[mySubcomponents[cmp_index_ref]].signalStart + 28]; +// load src +// end load src +Fr_copy(aux_dest,&ctx->signalValues[ctx->componentMemory[mySubcomponents[((1 * Fr_toInt(&lvar[32])) + 252)]].signalStart + 1]); +} +// run sub component if needed +if(!(ctx->componentMemory[mySubcomponents[cmp_index_ref]].inputCounter -= 1)){ +DetectCollision_35_run(mySubcomponents[cmp_index_ref],ctx); + +} +} +{ +uint cmp_index_ref = ((1 * Fr_toInt(&lvar[32])) + 502); +{ +PFrElement aux_dest = &ctx->signalValues[ctx->componentMemory[mySubcomponents[cmp_index_ref]].signalStart + 29]; +// load src +// end load src +Fr_copy(aux_dest,&ctx->signalValues[ctx->componentMemory[mySubcomponents[((1 * Fr_toInt(&lvar[32])) + 252)]].signalStart + 4]); +} +// run sub component if needed +if(!(ctx->componentMemory[mySubcomponents[cmp_index_ref]].inputCounter -= 1)){ +DetectCollision_35_run(mySubcomponents[cmp_index_ref],ctx); + +} +} +{ +PFrElement aux_dest = &lvar[33]; +// load src +// end load src +Fr_copy(aux_dest,&circuitConstants[1]); +} +Fr_lt(&expaux[0],&lvar[33],&circuitConstants[34]); // line circom 125 +while(Fr_isTrue(&expaux[0])){ +{ +uint cmp_index_ref = ((1 * Fr_toInt(&lvar[32])) + 502); +{ +PFrElement aux_dest = &ctx->signalValues[ctx->componentMemory[mySubcomponents[cmp_index_ref]].signalStart + (((3 * Fr_toInt(&lvar[33])) + 0) + 15)]; +// load src +// end load src +Fr_copy(aux_dest,&ctx->signalValues[ctx->componentMemory[mySubcomponents[((1 * Fr_toInt(&lvar[32])) + 2)]].signalStart + (((5 * Fr_toInt(&lvar[33])) + 0) + 0)]); +} +// run sub component if needed +if(!(ctx->componentMemory[mySubcomponents[cmp_index_ref]].inputCounter -= 1)){ +DetectCollision_35_run(mySubcomponents[cmp_index_ref],ctx); + +} +} +{ +uint cmp_index_ref = ((1 * Fr_toInt(&lvar[32])) + 502); +{ +PFrElement aux_dest = &ctx->signalValues[ctx->componentMemory[mySubcomponents[cmp_index_ref]].signalStart + (((3 * Fr_toInt(&lvar[33])) + 1) + 15)]; +// load src +// end load src +Fr_copy(aux_dest,&ctx->signalValues[ctx->componentMemory[mySubcomponents[((1 * Fr_toInt(&lvar[32])) + 2)]].signalStart + (((5 * Fr_toInt(&lvar[33])) + 1) + 0)]); +} +// run sub component if needed +if(!(ctx->componentMemory[mySubcomponents[cmp_index_ref]].inputCounter -= 1)){ +DetectCollision_35_run(mySubcomponents[cmp_index_ref],ctx); + +} +} +{ +uint cmp_index_ref = ((1 * Fr_toInt(&lvar[32])) + 502); +{ +PFrElement aux_dest = &ctx->signalValues[ctx->componentMemory[mySubcomponents[cmp_index_ref]].signalStart + (((3 * Fr_toInt(&lvar[33])) + 2) + 15)]; +// load src +// end load src +Fr_copy(aux_dest,&ctx->signalValues[ctx->componentMemory[mySubcomponents[((1 * Fr_toInt(&lvar[32])) + 2)]].signalStart + (((5 * Fr_toInt(&lvar[33])) + 4) + 0)]); +} +// run sub component if needed +if(!(ctx->componentMemory[mySubcomponents[cmp_index_ref]].inputCounter -= 1)){ +DetectCollision_35_run(mySubcomponents[cmp_index_ref],ctx); + +} +} +{ +PFrElement aux_dest = &lvar[33]; +// load src +Fr_add(&expaux[0],&lvar[33],&circuitConstants[2]); // line circom 125 +// end load src +Fr_copy(aux_dest,&expaux[0]); +} +Fr_lt(&expaux[0],&lvar[33],&circuitConstants[34]); // line circom 125 +} +{ +PFrElement aux_dest = &lvar[33]; +// load src +// end load src +Fr_copy(aux_dest,&circuitConstants[1]); +} +Fr_lt(&expaux[0],&lvar[33],&circuitConstants[34]); // line circom 136 +while(Fr_isTrue(&expaux[0])){ +{ +PFrElement aux_dest = &lvar[(((5 * Fr_toInt(&lvar[33])) + 0) + 12)]; +// load src +// end load src +Fr_copy(aux_dest,&ctx->signalValues[ctx->componentMemory[mySubcomponents[((1 * Fr_toInt(&lvar[32])) + 502)]].signalStart + (((3 * Fr_toInt(&lvar[33])) + 0) + 0)]); +} +{ +PFrElement aux_dest = &lvar[(((5 * Fr_toInt(&lvar[33])) + 1) + 12)]; +// load src +// end load src +Fr_copy(aux_dest,&ctx->signalValues[ctx->componentMemory[mySubcomponents[((1 * Fr_toInt(&lvar[32])) + 502)]].signalStart + (((3 * Fr_toInt(&lvar[33])) + 1) + 0)]); +} +{ +PFrElement aux_dest = &lvar[(((5 * Fr_toInt(&lvar[33])) + 2) + 12)]; +// load src +// end load src +Fr_copy(aux_dest,&ctx->signalValues[ctx->componentMemory[mySubcomponents[((1 * Fr_toInt(&lvar[32])) + 2)]].signalStart + (((5 * Fr_toInt(&lvar[33])) + 2) + 0)]); +} +{ +PFrElement aux_dest = &lvar[(((5 * Fr_toInt(&lvar[33])) + 3) + 12)]; +// load src +// end load src +Fr_copy(aux_dest,&ctx->signalValues[ctx->componentMemory[mySubcomponents[((1 * Fr_toInt(&lvar[32])) + 2)]].signalStart + (((5 * Fr_toInt(&lvar[33])) + 3) + 0)]); +} +{ +PFrElement aux_dest = &lvar[(((5 * Fr_toInt(&lvar[33])) + 4) + 12)]; +// load src +// end load src +Fr_copy(aux_dest,&ctx->signalValues[ctx->componentMemory[mySubcomponents[((1 * Fr_toInt(&lvar[32])) + 502)]].signalStart + (((3 * Fr_toInt(&lvar[33])) + 2) + 0)]); +} +{ +PFrElement aux_dest = &lvar[33]; +// load src +Fr_add(&expaux[0],&lvar[33],&circuitConstants[2]); // line circom 136 +// end load src +Fr_copy(aux_dest,&expaux[0]); +} +Fr_lt(&expaux[0],&lvar[33],&circuitConstants[34]); // line circom 136 +} +{ +PFrElement aux_dest = &lvar[33]; +// load src +// end load src +Fr_copy(aux_dest,&circuitConstants[1]); +} +{ +PFrElement aux_dest = &lvar[34]; +// load src +// end load src +Fr_copy(aux_dest,&circuitConstants[2]); +} +Fr_lt(&expaux[0],&lvar[34],&circuitConstants[34]); // line circom 153 +while(Fr_isTrue(&expaux[0])){ +{ +uint cmp_index_ref = (((4 * Fr_toInt(&lvar[32])) + (1 * Fr_toInt(&lvar[34]))) + 1252); +{ +PFrElement aux_dest = &ctx->signalValues[ctx->componentMemory[mySubcomponents[cmp_index_ref]].signalStart + 1]; +// load src +// end load src +Fr_copy(aux_dest,&ctx->signalValues[ctx->componentMemory[mySubcomponents[((1 * Fr_toInt(&lvar[32])) + 502)]].signalStart + (((3 * Fr_toInt(&lvar[34])) + 2) + 0)]); +} +// run sub component if needed +if(!(ctx->componentMemory[mySubcomponents[cmp_index_ref]].inputCounter -= 1)){ +IsZero_1_run(mySubcomponents[cmp_index_ref],ctx); + +} +} +{ +PFrElement aux_dest = &lvar[33]; +// load src +Fr_add(&expaux[0],&lvar[33],&ctx->signalValues[ctx->componentMemory[mySubcomponents[(((4 * Fr_toInt(&lvar[32])) + (1 * Fr_toInt(&lvar[34]))) + 1252)]].signalStart + 0]); // line circom 156 +// end load src +Fr_copy(aux_dest,&expaux[0]); +} +{ +PFrElement aux_dest = &lvar[34]; +// load src +Fr_add(&expaux[0],&lvar[34],&circuitConstants[2]); // line circom 153 +// end load src +Fr_copy(aux_dest,&expaux[0]); +} +Fr_lt(&expaux[0],&lvar[34],&circuitConstants[34]); // line circom 153 +} +{ +uint cmp_index_ref = ((1 * Fr_toInt(&lvar[32])) + 2252); +{ +PFrElement aux_dest = &ctx->signalValues[ctx->componentMemory[mySubcomponents[cmp_index_ref]].signalStart + 1]; +// load src +Fr_sub(&expaux[0],&circuitConstants[18],&lvar[33]); // line circom 163 +// end load src +Fr_copy(aux_dest,&expaux[0]); +} +// run sub component if needed +if(!(ctx->componentMemory[mySubcomponents[cmp_index_ref]].inputCounter -= 1)){ +IsZero_1_run(mySubcomponents[cmp_index_ref],ctx); + +} +} +{ +PFrElement aux_dest = &lvar[11]; +// load src +Fr_add(&expaux[0],&lvar[11],&ctx->signalValues[ctx->componentMemory[mySubcomponents[((1 * Fr_toInt(&lvar[32])) + 2252)]].signalStart + 0]); // line circom 164 +// end load src +Fr_copy(aux_dest,&expaux[0]); +} +{ +uint cmp_index_ref = ((1 * Fr_toInt(&lvar[32])) + 1002); +{ +PFrElement aux_dest = &ctx->signalValues[ctx->componentMemory[mySubcomponents[cmp_index_ref]].signalStart + 1]; +// load src +// end load src +Fr_copy(aux_dest,&ctx->signalValues[ctx->componentMemory[mySubcomponents[((1 * Fr_toInt(&lvar[32])) + 502)]].signalStart + 14]); +} +// run sub component if needed +if(!(ctx->componentMemory[mySubcomponents[cmp_index_ref]].inputCounter -= 1)){ +IsZero_1_run(mySubcomponents[cmp_index_ref],ctx); + +} +} +{ +uint cmp_index_ref = ((1 * Fr_toInt(&lvar[32])) + 752); +{ +PFrElement aux_dest = &ctx->signalValues[ctx->componentMemory[mySubcomponents[cmp_index_ref]].signalStart + 5]; +// load src +// end load src +Fr_copy(aux_dest,&ctx->signalValues[ctx->componentMemory[mySubcomponents[((1 * Fr_toInt(&lvar[32])) + 502)]].signalStart + 12]); +} +// run sub component if needed +if(!(ctx->componentMemory[mySubcomponents[cmp_index_ref]].inputCounter -= 1)){ +MultiMux1_36_run(mySubcomponents[cmp_index_ref],ctx); + +} +} +{ +uint cmp_index_ref = ((1 * Fr_toInt(&lvar[32])) + 752); +{ +PFrElement aux_dest = &ctx->signalValues[ctx->componentMemory[mySubcomponents[cmp_index_ref]].signalStart + 6]; +// load src +// end load src +Fr_copy(aux_dest,&circuitConstants[1]); +} +// run sub component if needed +if(!(ctx->componentMemory[mySubcomponents[cmp_index_ref]].inputCounter -= 1)){ +MultiMux1_36_run(mySubcomponents[cmp_index_ref],ctx); + +} +} +{ +uint cmp_index_ref = ((1 * Fr_toInt(&lvar[32])) + 752); +{ +PFrElement aux_dest = &ctx->signalValues[ctx->componentMemory[mySubcomponents[cmp_index_ref]].signalStart + 7]; +// load src +// end load src +Fr_copy(aux_dest,&ctx->signalValues[ctx->componentMemory[mySubcomponents[((1 * Fr_toInt(&lvar[32])) + 502)]].signalStart + 13]); +} +// run sub component if needed +if(!(ctx->componentMemory[mySubcomponents[cmp_index_ref]].inputCounter -= 1)){ +MultiMux1_36_run(mySubcomponents[cmp_index_ref],ctx); + +} +} +{ +uint cmp_index_ref = ((1 * Fr_toInt(&lvar[32])) + 752); +{ +PFrElement aux_dest = &ctx->signalValues[ctx->componentMemory[mySubcomponents[cmp_index_ref]].signalStart + 8]; +// load src +// end load src +Fr_copy(aux_dest,&circuitConstants[29]); +} +// run sub component if needed +if(!(ctx->componentMemory[mySubcomponents[cmp_index_ref]].inputCounter -= 1)){ +MultiMux1_36_run(mySubcomponents[cmp_index_ref],ctx); + +} +} +{ +uint cmp_index_ref = ((1 * Fr_toInt(&lvar[32])) + 752); +{ +PFrElement aux_dest = &ctx->signalValues[ctx->componentMemory[mySubcomponents[cmp_index_ref]].signalStart + 9]; +// load src +// end load src +Fr_copy(aux_dest,&ctx->signalValues[ctx->componentMemory[mySubcomponents[((1 * Fr_toInt(&lvar[32])) + 252)]].signalStart + 2]); +} +// run sub component if needed +if(!(ctx->componentMemory[mySubcomponents[cmp_index_ref]].inputCounter -= 1)){ +MultiMux1_36_run(mySubcomponents[cmp_index_ref],ctx); + +} +} +{ +uint cmp_index_ref = ((1 * Fr_toInt(&lvar[32])) + 752); +{ +PFrElement aux_dest = &ctx->signalValues[ctx->componentMemory[mySubcomponents[cmp_index_ref]].signalStart + 10]; +// load src +// end load src +Fr_copy(aux_dest,&signalValues[mySignalStart + (((3 * (Fr_toInt(&lvar[32]) + 1)) + 0) + 52)]); +} +// run sub component if needed +if(!(ctx->componentMemory[mySubcomponents[cmp_index_ref]].inputCounter -= 1)){ +MultiMux1_36_run(mySubcomponents[cmp_index_ref],ctx); + +} +} +{ +uint cmp_index_ref = ((1 * Fr_toInt(&lvar[32])) + 752); +{ +PFrElement aux_dest = &ctx->signalValues[ctx->componentMemory[mySubcomponents[cmp_index_ref]].signalStart + 11]; +// load src +// end load src +Fr_copy(aux_dest,&ctx->signalValues[ctx->componentMemory[mySubcomponents[((1 * Fr_toInt(&lvar[32])) + 252)]].signalStart + 3]); +} +// run sub component if needed +if(!(ctx->componentMemory[mySubcomponents[cmp_index_ref]].inputCounter -= 1)){ +MultiMux1_36_run(mySubcomponents[cmp_index_ref],ctx); + +} +} +{ +uint cmp_index_ref = ((1 * Fr_toInt(&lvar[32])) + 752); +{ +PFrElement aux_dest = &ctx->signalValues[ctx->componentMemory[mySubcomponents[cmp_index_ref]].signalStart + 12]; +// load src +// end load src +Fr_copy(aux_dest,&signalValues[mySignalStart + (((3 * (Fr_toInt(&lvar[32]) + 1)) + 1) + 52)]); +} +// run sub component if needed +if(!(ctx->componentMemory[mySubcomponents[cmp_index_ref]].inputCounter -= 1)){ +MultiMux1_36_run(mySubcomponents[cmp_index_ref],ctx); + +} +} +{ +uint cmp_index_ref = ((1 * Fr_toInt(&lvar[32])) + 752); +{ +PFrElement aux_dest = &ctx->signalValues[ctx->componentMemory[mySubcomponents[cmp_index_ref]].signalStart + 13]; +// load src +// end load src +Fr_copy(aux_dest,&ctx->signalValues[ctx->componentMemory[mySubcomponents[((1 * Fr_toInt(&lvar[32])) + 502)]].signalStart + 14]); +} +// run sub component if needed +if(!(ctx->componentMemory[mySubcomponents[cmp_index_ref]].inputCounter -= 1)){ +MultiMux1_36_run(mySubcomponents[cmp_index_ref],ctx); + +} +} +{ +uint cmp_index_ref = ((1 * Fr_toInt(&lvar[32])) + 752); +{ +PFrElement aux_dest = &ctx->signalValues[ctx->componentMemory[mySubcomponents[cmp_index_ref]].signalStart + 14]; +// load src +// end load src +Fr_copy(aux_dest,&signalValues[mySignalStart + (((3 * (Fr_toInt(&lvar[32]) + 1)) + 2) + 52)]); +} +// run sub component if needed +if(!(ctx->componentMemory[mySubcomponents[cmp_index_ref]].inputCounter -= 1)){ +MultiMux1_36_run(mySubcomponents[cmp_index_ref],ctx); + +} +} +{ +uint cmp_index_ref = ((1 * Fr_toInt(&lvar[32])) + 752); +{ +PFrElement aux_dest = &ctx->signalValues[ctx->componentMemory[mySubcomponents[cmp_index_ref]].signalStart + 15]; +// load src +// end load src +Fr_copy(aux_dest,&ctx->signalValues[ctx->componentMemory[mySubcomponents[((1 * Fr_toInt(&lvar[32])) + 1002)]].signalStart + 0]); +} +// run sub component if needed +if(!(ctx->componentMemory[mySubcomponents[cmp_index_ref]].inputCounter -= 1)){ +MultiMux1_36_run(mySubcomponents[cmp_index_ref],ctx); + +} +} +{ +PFrElement aux_dest = &lvar[2]; +// load src +// end load src +Fr_copy(aux_dest,&ctx->signalValues[ctx->componentMemory[mySubcomponents[((1 * Fr_toInt(&lvar[32])) + 752)]].signalStart + 0]); +} +{ +PFrElement aux_dest = &lvar[3]; +// load src +// end load src +Fr_copy(aux_dest,&ctx->signalValues[ctx->componentMemory[mySubcomponents[((1 * Fr_toInt(&lvar[32])) + 752)]].signalStart + 1]); +} +{ +PFrElement aux_dest = &lvar[4]; +// load src +// end load src +Fr_copy(aux_dest,&ctx->signalValues[ctx->componentMemory[mySubcomponents[((1 * Fr_toInt(&lvar[32])) + 752)]].signalStart + 2]); +} +{ +PFrElement aux_dest = &lvar[5]; +// load src +// end load src +Fr_copy(aux_dest,&ctx->signalValues[ctx->componentMemory[mySubcomponents[((1 * Fr_toInt(&lvar[32])) + 752)]].signalStart + 3]); +} +{ +PFrElement aux_dest = &lvar[6]; +// load src +// end load src +Fr_copy(aux_dest,&ctx->signalValues[ctx->componentMemory[mySubcomponents[((1 * Fr_toInt(&lvar[32])) + 752)]].signalStart + 4]); +} +{ +PFrElement aux_dest = &lvar[32]; +// load src +Fr_add(&expaux[0],&lvar[32],&circuitConstants[2]); // line circom 92 +// end load src +Fr_copy(aux_dest,&expaux[0]); +} +Fr_lt(&expaux[0],&lvar[32],&circuitConstants[50]); // line circom 92 +} +{ +PFrElement aux_dest = &signalValues[mySignalStart + 25]; +// load src +Fr_sub(&expaux[0],&circuitConstants[50],&lvar[11]); // line circom 219 +// end load src +Fr_copy(aux_dest,&expaux[0]); +} +{ +PFrElement aux_dest = &signalValues[mySignalStart + 5]; +// load src +// end load src +Fr_copyn(aux_dest,&lvar[12],20); +} +{ +PFrElement aux_dest = &signalValues[mySignalStart + 0]; +// load src +// end load src +Fr_copyn(aux_dest,&lvar[2],5); +} +for (uint i = 0; i < 2502; i++){ +uint index_subc = ctx->componentMemory[ctx_index].subcomponents[i]; +if (index_subc != 0)release_memory_component(ctx,index_subc); +} +} + +void run(Circom_CalcWit* ctx){ +StepState_37_create(1,0,ctx,"main",0); +StepState_37_run(0,ctx); +} + diff --git a/game_4_250_cpp/game_4_250.dat b/game_4_250_cpp/game_4_250.dat new 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