diff --git a/test/ttmlir/Silicon/TTNN/emitc/mnist.mlir b/test/ttmlir/Silicon/TTNN/emitc/mnist.mlir
index 4fa009717..52e5a05f7 100644
--- a/test/ttmlir/Silicon/TTNN/emitc/mnist.mlir
+++ b/test/ttmlir/Silicon/TTNN/emitc/mnist.mlir
@@ -3,7 +3,6 @@
 // RUN: ttmlir-opt --ttnn-modify-signatures-for-dylib --convert-ttnn-to-emitc %t.mlir > %t2.mlir
 // RUN: ttmlir-translate --mlir-to-cpp %t2.mlir > %basename_t.cpp
 // RUN: compile_dylib.py %basename_t.cpp .
-// UNSUPPORTED: true
 
 module @MNISTLinear attributes {} {
   func.func @forward(%arg0: tensor<1x784xf32> {ttir.name = "input_1"}, %arg1: tensor<784x512xf32> {ttir.name = "linear_relu_stack.0.weight"}, %arg2: tensor<512xf32> {ttir.name = "linear_relu_stack.0.bias"}, %arg3: tensor<512x512xf32> {ttir.name = "linear_relu_stack.2.weight"}, %arg4: tensor<512xf32> {ttir.name = "linear_relu_stack.2.bias"}, %arg5: tensor<512x10xf32> {ttir.name = "linear_relu_stack.4.weight"}, %arg6: tensor<10xf32> {ttir.name = "linear_relu_stack.4.bias"}) -> (tensor<1x10xf32> {ttir.name = "MNISTLinear_350.output_add_981"}) {