diff --git a/tt_metal/common/metal_soc_descriptor.cpp b/tt_metal/common/metal_soc_descriptor.cpp index 2b9d5f20212..a680969ba1e 100644 --- a/tt_metal/common/metal_soc_descriptor.cpp +++ b/tt_metal/common/metal_soc_descriptor.cpp @@ -372,7 +372,7 @@ void metal_SocDescriptor::generate_physical_routing_to_profiler_flat_id() { // virtual coordinates because UMD APIs expect virtual coordinates. metal_SocDescriptor::metal_SocDescriptor(const tt_SocDescriptor& other, uint32_t harvesting_mask) : tt_SocDescriptor(other) { - this->trisc_sizes = {MEM_TRISC0_SIZE, MEM_TRISC1_SIZE, MEM_TRISC2_SIZE}; // TODO: Read trisc size from yaml + this->trisc_sizes = {MEM_TRISC0_FIRMWARE_SIZE, MEM_TRISC1_FIRMWARE_SIZE, MEM_TRISC2_FIRMWARE_SIZE}; // TODO: Read trisc size from yaml this->generate_physical_descriptors_from_virtual(harvesting_mask); this->load_dram_metadata_from_device_descriptor(); this->generate_logical_eth_coords_mapping(); diff --git a/tt_metal/hw/CMakeLists.txt b/tt_metal/hw/CMakeLists.txt index fb948d9b1c8..fd00fad1391 100644 --- a/tt_metal/hw/CMakeLists.txt +++ b/tt_metal/hw/CMakeLists.txt @@ -6,7 +6,7 @@ set(CORES trisc0 trisc1 trisc2 - idle-erisc + ierisc ) if("$ENV{ARCH_NAME}" STREQUAL "wormhole_b0") @@ -19,13 +19,14 @@ endif() foreach(CORE IN LISTS CORES) set(HW_OUTPUT_FILE "${HW_OUTPUT_DIR}/${CORE}.ld") + string(TOUPPER ${CORE} CORE_DEFINE) # custom command to preprocess/generate the output file add_custom_command( OUTPUT ${HW_OUTPUT_FILE} COMMAND ${CMAKE_COMMAND} -E make_directory ${HW_OUTPUT_DIR} - COMMAND ${CMAKE_CXX_COMPILER} -I${HW_INCLUDES} -E -P -x c -o ${HW_OUTPUT_FILE} ${CMAKE_CURRENT_SOURCE_DIR}/toolchain/${CORE}.ld - DEPENDS ${CMAKE_CURRENT_SOURCE_DIR}/toolchain/${CORE}.ld ${DEV_MEM_MAP} + COMMAND ${CMAKE_CXX_COMPILER} -DLD_TARGET=${CORE_DEFINE} -DLD_TYPE=FIRMWARE -I${HW_INCLUDES} -E -P -x c -o ${HW_OUTPUT_FILE} ${CMAKE_CURRENT_SOURCE_DIR}/toolchain/main.ld + DEPENDS ${CMAKE_CURRENT_SOURCE_DIR}/toolchain/main.ld ${CMAKE_CURRENT_SOURCE_DIR}/toolchain/memory.ld ${CMAKE_CURRENT_SOURCE_DIR}/toolchain/sections.ld ${DEV_MEM_MAP} COMMENT "Preprocessing toolchain/${CORE}.ld" VERBATIM ) diff --git a/tt_metal/hw/firmware/src/brisc.cc b/tt_metal/hw/firmware/src/brisc.cc index 41134ccaf90..13d4c4563e6 100644 --- a/tt_metal/hw/firmware/src/brisc.cc +++ b/tt_metal/hw/firmware/src/brisc.cc @@ -156,16 +156,16 @@ void set_deassert_addresses() { #ifdef ARCH_BLACKHOLE WRITE_REG(RISCV_DEBUG_REG_NCRISC_RESET_PC, MEM_NCRISC_FIRMWARE_BASE); - WRITE_REG(RISCV_DEBUG_REG_TRISC0_RESET_PC, MEM_TRISC0_BASE); - WRITE_REG(RISCV_DEBUG_REG_TRISC1_RESET_PC, MEM_TRISC1_BASE); - WRITE_REG(RISCV_DEBUG_REG_TRISC2_RESET_PC, MEM_TRISC2_BASE); + WRITE_REG(RISCV_DEBUG_REG_TRISC0_RESET_PC, MEM_TRISC0_FIRMWARE_BASE); + WRITE_REG(RISCV_DEBUG_REG_TRISC1_RESET_PC, MEM_TRISC1_FIRMWARE_BASE); + WRITE_REG(RISCV_DEBUG_REG_TRISC2_RESET_PC, MEM_TRISC2_FIRMWARE_BASE); WRITE_REG(RISCV_DEBUG_REG_TRISC_RESET_PC_OVERRIDE, 0b111); WRITE_REG(RISCV_DEBUG_REG_NCRISC_RESET_PC_OVERRIDE, 0x1); #else cfg_regs[NCRISC_RESET_PC_PC_ADDR32] = MEM_NCRISC_FIRMWARE_BASE; - cfg_regs[TRISC_RESET_PC_SEC0_PC_ADDR32] = MEM_TRISC0_BASE; - cfg_regs[TRISC_RESET_PC_SEC1_PC_ADDR32] = MEM_TRISC1_BASE; - cfg_regs[TRISC_RESET_PC_SEC2_PC_ADDR32] = MEM_TRISC2_BASE; + cfg_regs[TRISC_RESET_PC_SEC0_PC_ADDR32] = MEM_TRISC0_FIRMWARE_BASE; + cfg_regs[TRISC_RESET_PC_SEC1_PC_ADDR32] = MEM_TRISC1_FIRMWARE_BASE; + cfg_regs[TRISC_RESET_PC_SEC2_PC_ADDR32] = MEM_TRISC2_FIRMWARE_BASE; cfg_regs[TRISC_RESET_PC_OVERRIDE_Reset_PC_Override_en_ADDR32] = 0b111; cfg_regs[NCRISC_RESET_PC_OVERRIDE_Reset_PC_Override_en_ADDR32] = 0x1; #endif diff --git a/tt_metal/hw/inc/blackhole/dev_mem_map.h b/tt_metal/hw/inc/blackhole/dev_mem_map.h index 7c52c0eb781..70d9cb2e701 100644 --- a/tt_metal/hw/inc/blackhole/dev_mem_map.h +++ b/tt_metal/hw/inc/blackhole/dev_mem_map.h @@ -43,9 +43,9 @@ #define MEM_BRISC_FIRMWARE_SIZE (10 * 1024) #define MEM_NCRISC_FIRMWARE_SIZE (16 * 1024) #define MEM_IERISC_FIRMWARE_SIZE (16 * 1024) -#define MEM_TRISC0_SIZE (16 * 1024) -#define MEM_TRISC1_SIZE (16 * 1024) -#define MEM_TRISC2_SIZE (16 * 1024) +#define MEM_TRISC0_FIRMWARE_SIZE (16 * 1024) +#define MEM_TRISC1_FIRMWARE_SIZE (16 * 1024) +#define MEM_TRISC2_FIRMWARE_SIZE (16 * 1024) #define MEM_ZEROS_SIZE 512 #define MEM_BOOT_CODE_BASE 0 @@ -57,15 +57,15 @@ #define MEM_BRISC_FIRMWARE_BASE (MEM_ZEROS_BASE + MEM_ZEROS_SIZE) #define MEM_NCRISC_FIRMWARE_BASE (MEM_BRISC_FIRMWARE_BASE + MEM_BRISC_FIRMWARE_SIZE) #define MEM_IERISC_FIRMWARE_BASE 8192 -#define MEM_TRISC0_BASE (MEM_NCRISC_FIRMWARE_BASE + MEM_NCRISC_FIRMWARE_SIZE) -#define MEM_TRISC1_BASE (MEM_TRISC0_BASE + MEM_TRISC0_SIZE) -#define MEM_TRISC2_BASE (MEM_TRISC1_BASE + MEM_TRISC1_SIZE) +#define MEM_TRISC0_FIRMWARE_BASE (MEM_NCRISC_FIRMWARE_BASE + MEM_NCRISC_FIRMWARE_SIZE) +#define MEM_TRISC1_FIRMWARE_BASE (MEM_TRISC0_FIRMWARE_BASE + MEM_TRISC0_FIRMWARE_SIZE) +#define MEM_TRISC2_FIRMWARE_BASE (MEM_TRISC1_FIRMWARE_BASE + MEM_TRISC1_FIRMWARE_SIZE) ///////////// // Initialization relocation L1 memory // Host downloads to these addresses, fw copies to destination // Note: using xmov to copy ncrisc to addresses above 1M hangs the chip -#define MEM_BRISC_INIT_LOCAL_L1_BASE (MEM_TRISC2_BASE + MEM_TRISC2_SIZE) +#define MEM_BRISC_INIT_LOCAL_L1_BASE (MEM_TRISC2_FIRMWARE_BASE + MEM_TRISC2_FIRMWARE_SIZE) #define MEM_NCRISC_INIT_LOCAL_L1_BASE (MEM_BRISC_INIT_LOCAL_L1_BASE + MEM_BRISC_LOCAL_SIZE) #define MEM_TRISC0_INIT_LOCAL_L1_BASE (MEM_NCRISC_INIT_LOCAL_L1_BASE + MEM_NCRISC_LOCAL_SIZE) #define MEM_TRISC1_INIT_LOCAL_L1_BASE (MEM_TRISC0_INIT_LOCAL_L1_BASE + MEM_TRISC_LOCAL_SIZE) diff --git a/tt_metal/hw/inc/grayskull/dev_mem_map.h b/tt_metal/hw/inc/grayskull/dev_mem_map.h index 8faf3c9e306..31c75be2711 100644 --- a/tt_metal/hw/inc/grayskull/dev_mem_map.h +++ b/tt_metal/hw/inc/grayskull/dev_mem_map.h @@ -46,9 +46,9 @@ #define MEM_BRISC_FIRMWARE_SIZE (10 * 1024) #define MEM_NCRISC_FIRMWARE_SIZE (16 * 1024) #define MEM_IERISC_FIRMWARE_SIZE (0) -#define MEM_TRISC0_SIZE (16 * 1024) -#define MEM_TRISC1_SIZE (16 * 1024) -#define MEM_TRISC2_SIZE (16 * 1024) +#define MEM_TRISC0_FIRMWARE_SIZE (16 * 1024) +#define MEM_TRISC1_FIRMWARE_SIZE (16 * 1024) +#define MEM_TRISC2_FIRMWARE_SIZE (16 * 1024) #define MEM_ZEROS_SIZE 512 #define MEM_BOOT_CODE_BASE 0 @@ -60,9 +60,9 @@ #define MEM_BRISC_FIRMWARE_BASE (MEM_ZEROS_BASE + MEM_ZEROS_SIZE) #define MEM_NCRISC_FIRMWARE_BASE (MEM_NCRISC_IRAM_BASE) #define MEM_IERISC_FIRMWARE_BASE 0 -#define MEM_TRISC0_BASE (MEM_BRISC_FIRMWARE_BASE + MEM_BRISC_FIRMWARE_SIZE) -#define MEM_TRISC1_BASE (MEM_TRISC0_BASE + MEM_TRISC0_SIZE) -#define MEM_TRISC2_BASE (MEM_TRISC1_BASE + MEM_TRISC1_SIZE) +#define MEM_TRISC0_FIRMWARE_BASE (MEM_BRISC_FIRMWARE_BASE + MEM_BRISC_FIRMWARE_SIZE) +#define MEM_TRISC1_FIRMWARE_BASE (MEM_TRISC0_FIRMWARE_BASE + MEM_TRISC0_FIRMWARE_SIZE) +#define MEM_TRISC2_FIRMWARE_BASE (MEM_TRISC1_FIRMWARE_BASE + MEM_TRISC1_FIRMWARE_SIZE) // These are used in ncrisc-halt.S, asserted in ncrisc.cc to be valid // Better way to do this would be to generate a file w/ these addresses @@ -72,7 +72,7 @@ ///////////// // Initialization relocation L1 memory // Host downloads to these addresses, fw copies to destination -#define MEM_BRISC_INIT_LOCAL_L1_BASE (MEM_TRISC2_BASE + MEM_TRISC2_SIZE) +#define MEM_BRISC_INIT_LOCAL_L1_BASE (MEM_TRISC2_FIRMWARE_BASE + MEM_TRISC2_FIRMWARE_SIZE) #define MEM_NCRISC_INIT_LOCAL_L1_BASE (MEM_BRISC_INIT_LOCAL_L1_BASE + MEM_BRISC_LOCAL_SIZE) #define MEM_TRISC0_INIT_LOCAL_L1_BASE (MEM_NCRISC_INIT_LOCAL_L1_BASE + MEM_NCRISC_LOCAL_SIZE) #define MEM_TRISC1_INIT_LOCAL_L1_BASE (MEM_TRISC0_INIT_LOCAL_L1_BASE + MEM_TRISC_LOCAL_SIZE) diff --git a/tt_metal/hw/inc/wormhole/dev_mem_map.h b/tt_metal/hw/inc/wormhole/dev_mem_map.h index c286afa38e5..3be6cd20650 100644 --- a/tt_metal/hw/inc/wormhole/dev_mem_map.h +++ b/tt_metal/hw/inc/wormhole/dev_mem_map.h @@ -47,9 +47,9 @@ #define MEM_BRISC_FIRMWARE_SIZE (10 * 1024) #define MEM_NCRISC_FIRMWARE_SIZE (16 * 1024) #define MEM_IERISC_FIRMWARE_SIZE (16 * 1024) -#define MEM_TRISC0_SIZE (16 * 1024) -#define MEM_TRISC1_SIZE (16 * 1024) -#define MEM_TRISC2_SIZE (16 * 1024) +#define MEM_TRISC0_FIRMWARE_SIZE (16 * 1024) +#define MEM_TRISC1_FIRMWARE_SIZE (16 * 1024) +#define MEM_TRISC2_FIRMWARE_SIZE (16 * 1024) #define MEM_ZEROS_SIZE 512 #define MEM_BOOT_CODE_BASE 0 @@ -61,9 +61,9 @@ #define MEM_BRISC_FIRMWARE_BASE (MEM_ZEROS_BASE + MEM_ZEROS_SIZE) #define MEM_NCRISC_FIRMWARE_BASE (MEM_NCRISC_IRAM_BASE) #define MEM_IERISC_FIRMWARE_BASE 8192 -#define MEM_TRISC0_BASE (MEM_BRISC_FIRMWARE_BASE + MEM_BRISC_FIRMWARE_SIZE) -#define MEM_TRISC1_BASE (MEM_TRISC0_BASE + MEM_TRISC0_SIZE) -#define MEM_TRISC2_BASE (MEM_TRISC1_BASE + MEM_TRISC1_SIZE) +#define MEM_TRISC0_FIRMWARE_BASE (MEM_BRISC_FIRMWARE_BASE + MEM_BRISC_FIRMWARE_SIZE) +#define MEM_TRISC1_FIRMWARE_BASE (MEM_TRISC0_FIRMWARE_BASE + MEM_TRISC0_FIRMWARE_SIZE) +#define MEM_TRISC2_FIRMWARE_BASE (MEM_TRISC1_FIRMWARE_BASE + MEM_TRISC1_FIRMWARE_SIZE) // These are used in ncrisc-halt.S, asserted in ncrisc.cc to be valid // Better way to do this would be to generate a file w/ these addresses @@ -74,7 +74,7 @@ // Initialization relocation L1 memory // Host downloads to these addresses, fw copies to destination // Note: using xmov to copy ncrisc to addresses above 1M hangs the chip -#define MEM_BRISC_INIT_LOCAL_L1_BASE (MEM_TRISC2_BASE + MEM_TRISC2_SIZE) +#define MEM_BRISC_INIT_LOCAL_L1_BASE (MEM_TRISC2_FIRMWARE_BASE + MEM_TRISC2_FIRMWARE_SIZE) #define MEM_NCRISC_INIT_LOCAL_L1_BASE (MEM_BRISC_INIT_LOCAL_L1_BASE + MEM_BRISC_LOCAL_SIZE) #define MEM_TRISC0_INIT_LOCAL_L1_BASE (MEM_NCRISC_INIT_LOCAL_L1_BASE + MEM_NCRISC_LOCAL_SIZE) #define MEM_TRISC1_INIT_LOCAL_L1_BASE (MEM_TRISC0_INIT_LOCAL_L1_BASE + MEM_TRISC_LOCAL_SIZE) diff --git a/tt_metal/hw/toolchain/BUILD b/tt_metal/hw/toolchain/BUILD deleted file mode 100644 index e83460240dd..00000000000 --- a/tt_metal/hw/toolchain/BUILD +++ /dev/null @@ -1,20 +0,0 @@ -package(default_visibility = ["//visibility:public"]) -exports_files(["tensix.ld", "tmu-crt0.S", "substitutes.cpp", "ncrisc.ld"]) - - - -filegroup( - name = "ld-files", - srcs = ["tensix-sections.ld", "tensix-address.ld", "tensix-memory.ld", "idle-erisc-memory.ld"] -) - -py_binary( - name = "hex8tohex32", - srcs = ["hex8tohex32.py"], -) - - -py_binary( - name = "fwlog", - srcs = ["fwlog.py"], -) diff --git a/tt_metal/hw/toolchain/brisc.ld b/tt_metal/hw/toolchain/brisc.ld deleted file mode 100644 index 865599e2413..00000000000 --- a/tt_metal/hw/toolchain/brisc.ld +++ /dev/null @@ -1,18 +0,0 @@ -#include "dev_mem_map.h" -#include "tensix-memory.ld" - -#if DEBUG_MODE == 1 -REGION_ALIAS("REGION_CODE", BRISC_CODE) -REGION_ALIAS("REGION_DATA", BRISC_CODE) -REGION_ALIAS("REGION_STACK", BRISC_CODE) -#else -REGION_ALIAS("REGION_CODE", BRISC_CODE) -REGION_ALIAS("REGION_DATA", BRISC_LOCAL_DATA_MEM) -REGION_ALIAS("REGION_STACK", BRISC_STACK_MEM) -#endif - -__firmware_stack_size = MEM_BRISC_STACK_SIZE; - -#include "tensix-sections.ld" - -_Z11kernel_initv = _etext; diff --git a/tt_metal/hw/toolchain/idle-erisc-memory.ld b/tt_metal/hw/toolchain/idle-erisc-memory.ld deleted file mode 100644 index 0ee672bd75e..00000000000 --- a/tt_metal/hw/toolchain/idle-erisc-memory.ld +++ /dev/null @@ -1,6 +0,0 @@ -MEMORY -{ - IDLE_ERISC_LOCAL_DATA_MEM : ORIGIN = MEM_LOCAL_BASE, LENGTH = MEM_IERISC_LOCAL_SIZE - MEM_IERISC_STACK_SIZE - IDLE_ERISC_STACK_MEM : ORIGIN = MEM_IERISC_STACK_BASE, LENGTH = MEM_IERISC_STACK_SIZE - IDLE_ERISC_CODE : ORIGIN = MEM_IERISC_FIRMWARE_BASE, LENGTH = MEM_IERISC_FIRMWARE_SIZE -} diff --git a/tt_metal/hw/toolchain/idle-erisc-sections.ld b/tt_metal/hw/toolchain/idle-erisc-sections.ld deleted file mode 100644 index 50945aea4b2..00000000000 --- a/tt_metal/hw/toolchain/idle-erisc-sections.ld +++ /dev/null @@ -1,233 +0,0 @@ -/* Copyright (C) 2014-2017 Free Software Foundation, Inc. - Copying and distribution of this script, with or without modification, - are permitted in any medium without royalty provided the copyright - notice and this notice are preserved. */ - -/* - This file contains pre-processor directives that are compiled to create tensix-sections.ld, - any modifications should be made to tensix-sections-pre-proc.ld, tensix-sections.ld is a generated file -*/ - -/* - Firmware text/ldm start at the start of the section - Kernel text/ldm start where firmware left off -*/ -__firmware_start = DEFINED(__fw_export_end_text) ? __fw_export_end_text : ORIGIN(REGION_CODE); -__ldm_start = DEFINED(__fw_export_ldm_end) ? __fw_export_ldm_end : ORIGIN(REGION_DATA); - -OUTPUT_FORMAT("elf32-littleriscv", "elf32-littleriscv", - "elf32-littleriscv") -OUTPUT_ARCH(riscv) -ENTRY(_start) -SEARCH_DIR("/opt/riscv32i/riscv32-unknown-elf/lib"); -SECTIONS -{ - /* Read-only sections, merged into text segment: */ - PROVIDE (__executable_start = __firmware_start); - .init __firmware_start : - { - KEEP (*(SORT_NONE(.init))) - } > REGION_CODE - .text : - { - *(.text.unlikely .text.*_unlikely .text.unlikely.*) - *(.text.exit .text.exit.*) - *(.text.startup .text.startup.*) - *(.text.hot .text.hot.*) - *(.text .stub .text.* .gnu.linkonce.t.*) - /* .gnu.warning sections are handled specially by elf32.em. */ - *(.gnu.warning) - } > REGION_CODE - .fini : - { - KEEP (*(SORT_NONE(.fini))) - } > REGION_CODE - - l1_data : - { - *(l1_data) - } > REGION_CODE - l1_data_noinit (NOLOAD) : - { - *(l1_data_noinit) - } > REGION_CODE - - /* Do NOT modify the following two lines. - FW must align to 32 byte boundary so Kernel begins aligned to meet noc - alignment constraints. FW and Kernel must also have >= 32 Byte gap. */ - . += 31; - . = ALIGN(32); - - PROVIDE (__etext = .); - PROVIDE (_etext = .); - PROVIDE (etext = .); - __fw_export_end_text = DEFINED(__fw_export_end_text) ? __fw_export_end_text : .; - - PROVIDE(__global_pointer$ = ORIGIN(REGION_DATA) + 0x800); - .ldm_data __ldm_start : - { - /* ldm is copied in 4 byte chunks */ - . = ALIGN(4); - __ldm_data_start = .; - *(.rodata .rodata.* .gnu.linkonce.r.*) - *(.rodata1) - PROVIDE_HIDDEN (__preinit_array_start = .); - KEEP (*(.preinit_array)) - PROVIDE_HIDDEN (__preinit_array_end = .); - PROVIDE_HIDDEN (__init_array_start = .); - KEEP (*(SORT_BY_INIT_PRIORITY(.init_array.*) SORT_BY_INIT_PRIORITY(.ctors.*))) - KEEP (*(.init_array EXCLUDE_FILE (*crtbegin.o *crtbegin?.o *crtend.o *crtend?.o ) .ctors)) - PROVIDE_HIDDEN (__init_array_end = .); - PROVIDE_HIDDEN (__fini_array_start = .); - KEEP (*(SORT_BY_INIT_PRIORITY(.fini_array.*) SORT_BY_INIT_PRIORITY(.dtors.*))) - KEEP (*(.fini_array EXCLUDE_FILE (*crtbegin.o *crtbegin?.o *crtend.o *crtend?.o ) .dtors)) - PROVIDE_HIDDEN (__fini_array_end = .); - KEEP (*crtbegin.o(.ctors)) - KEEP (*crtbegin?.o(.ctors)) - KEEP (*(EXCLUDE_FILE (*crtend.o *crtend?.o ) .ctors)) - KEEP (*(SORT(.ctors.*))) - KEEP (*(.ctors)) - KEEP (*crtbegin.o(.dtors)) - KEEP (*crtbegin?.o(.dtors)) - KEEP (*(EXCLUDE_FILE (*crtend.o *crtend?.o ) .dtors)) - KEEP (*(SORT(.dtors.*))) - KEEP (*(.dtors)) - *(.dynamic) - *(.data.rel.ro.local* .gnu.linkonce.d.rel.ro.local.*) *(.data.rel.ro .data.rel.ro.* .gnu.linkonce.d.rel.ro.*) - *(.srodata.cst16) *(.srodata.cst8) *(.srodata.cst4) *(.srodata.cst2) *(.srodata .srodata.*) - *(.sdata .sdata.* .gnu.linkonce.s.*) - *(.sdata2 .sdata2.* .gnu.linkonce.s2.*) - *(.data .data.* .gnu.linkonce.d.*) - SORT(CONSTRUCTORS) - *(.data1) - *(.got.plt) *(.igot.plt) *(.got) *(.igot) - - /* bss is initialized with 4 byte writes */ - . = ALIGN(4); - __ldm_data_end = .; - __ldm_bss_start = .; - *(.sbss2 .sbss2.* .gnu.linkonce.sb2.*) - *(.dynsbss) - *(.sbss .sbss.* .gnu.linkonce.sb.*) - *(.scommon) - . = ALIGN(4); - *(.dynbss) - *(.bss .bss.* .gnu.linkonce.b.*) - *(COMMON) - . = ALIGN(4); - __ldm_bss_end = .; - } > REGION_DATA - - /* Use __ldm_bss_end to pick up where the last REGION_DATA ended - This is needed because of the way kernel REGION_DATA picks up where firmware - ended. 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- -#include "idle-erisc-sections.ld" - -_Z11kernel_initv = _etext; diff --git a/tt_metal/hw/toolchain/main.ld b/tt_metal/hw/toolchain/main.ld new file mode 100644 index 00000000000..e3371911d46 --- /dev/null +++ b/tt_metal/hw/toolchain/main.ld @@ -0,0 +1,24 @@ +#include "dev_mem_map.h" +#include "memory.ld" + +#define EXPAND_TARGET_CODE(x, y) x##_##y##_CODE +#define TARGET_CODE(x, y) EXPAND_TARGET_CODE(x, y) + +#define EXPAND_TARGET_LOCAL_DATA_MEM(x) x##_LOCAL_DATA_MEM +#define TARGET_LOCAL_DATA_MEM(x) EXPAND_TARGET_LOCAL_DATA_MEM(x) + +#define EXPAND_TARGET_STACK_MEM(x) x##_STACK_MEM +#define TARGET_STACK_MEM(x) EXPAND_TARGET_STACK_MEM(x) + +#define EXPAND_TARGET_STACK_SIZE(x) MEM_##x##_STACK_SIZE +#define TARGET_STACK_SIZE(x) EXPAND_TARGET_STACK_SIZE(x) + +REGION_ALIAS("REGION_CODE", TARGET_CODE(LD_TARGET, LD_TYPE)) +REGION_ALIAS("REGION_DATA", TARGET_LOCAL_DATA_MEM(LD_TARGET)) +REGION_ALIAS("REGION_STACK", TARGET_STACK_MEM(LD_TARGET)) + +__firmware_stack_size = TARGET_STACK_SIZE(LD_TARGET); + +#include "sections.ld" + +_Z11kernel_initv = _etext; diff --git a/tt_metal/hw/toolchain/tensix-memory.ld b/tt_metal/hw/toolchain/memory.ld similarity index 55% rename from tt_metal/hw/toolchain/tensix-memory.ld rename to tt_metal/hw/toolchain/memory.ld index e48a874175d..ca2ad523019 100644 --- a/tt_metal/hw/toolchain/tensix-memory.ld +++ b/tt_metal/hw/toolchain/memory.ld @@ -5,17 +5,19 @@ MEMORY TRISC1_LOCAL_DATA_MEM : ORIGIN = MEM_LOCAL_BASE, LENGTH = MEM_TRISC_LOCAL_SIZE - MEM_TRISC1_STACK_SIZE TRISC2_LOCAL_DATA_MEM : ORIGIN = MEM_LOCAL_BASE, LENGTH = MEM_TRISC_LOCAL_SIZE - MEM_TRISC2_STACK_SIZE NCRISC_LOCAL_DATA_MEM : ORIGIN = MEM_LOCAL_BASE, LENGTH = MEM_NCRISC_LOCAL_SIZE - MEM_NCRISC_STACK_SIZE + IERISC_LOCAL_DATA_MEM : ORIGIN = MEM_LOCAL_BASE, LENGTH = MEM_IERISC_LOCAL_SIZE - MEM_IERISC_STACK_SIZE BRISC_STACK_MEM : ORIGIN = MEM_BRISC_STACK_BASE, LENGTH = MEM_BRISC_STACK_SIZE TRISC0_STACK_MEM : ORIGIN = MEM_TRISC0_STACK_BASE, LENGTH = MEM_TRISC0_STACK_SIZE TRISC1_STACK_MEM : ORIGIN = MEM_TRISC1_STACK_BASE, LENGTH = MEM_TRISC1_STACK_SIZE TRISC2_STACK_MEM : ORIGIN = MEM_TRISC2_STACK_BASE, LENGTH = MEM_TRISC2_STACK_SIZE NCRISC_STACK_MEM : ORIGIN = MEM_NCRISC_STACK_BASE, LENGTH = MEM_NCRISC_STACK_SIZE + IERISC_STACK_MEM : ORIGIN = MEM_IERISC_STACK_BASE, LENGTH = MEM_IERISC_STACK_SIZE - BRISC_CODE : ORIGIN = MEM_BRISC_FIRMWARE_BASE, LENGTH = MEM_BRISC_FIRMWARE_SIZE - TRISC0_CODE : ORIGIN = MEM_TRISC0_BASE, LENGTH = MEM_TRISC0_SIZE - TRISC1_CODE : ORIGIN = MEM_TRISC1_BASE, LENGTH = MEM_TRISC1_SIZE - TRISC2_CODE : ORIGIN = MEM_TRISC2_BASE, LENGTH = MEM_TRISC2_SIZE - NCRISC_CODE : ORIGIN = MEM_NCRISC_FIRMWARE_BASE, LENGTH = MEM_NCRISC_FIRMWARE_SIZE - + BRISC_FIRMWARE_CODE : ORIGIN = MEM_BRISC_FIRMWARE_BASE, LENGTH = MEM_BRISC_FIRMWARE_SIZE + TRISC0_FIRMWARE_CODE : ORIGIN = MEM_TRISC0_FIRMWARE_BASE, LENGTH = MEM_TRISC0_FIRMWARE_SIZE + TRISC1_FIRMWARE_CODE : ORIGIN = MEM_TRISC1_FIRMWARE_BASE, LENGTH = MEM_TRISC1_FIRMWARE_SIZE + TRISC2_FIRMWARE_CODE : ORIGIN = MEM_TRISC2_FIRMWARE_BASE, LENGTH = MEM_TRISC2_FIRMWARE_SIZE + NCRISC_FIRMWARE_CODE : ORIGIN = MEM_NCRISC_FIRMWARE_BASE, LENGTH = MEM_NCRISC_FIRMWARE_SIZE + IERISC_FIRMWARE_CODE : ORIGIN = MEM_IERISC_FIRMWARE_BASE, LENGTH = MEM_IERISC_FIRMWARE_SIZE } diff --git a/tt_metal/hw/toolchain/module.mk b/tt_metal/hw/toolchain/module.mk deleted file mode 100644 index 4d926bdf364..00000000000 --- a/tt_metal/hw/toolchain/module.mk +++ /dev/null @@ -1,20 +0,0 @@ -OUTPUT_DIR=$(TT_METAL_HOME)/build/hw/toolchain - -ifeq ("$(ARCH_NAME)", "wormhole_b0") - DEV_MEM_MAP=$(TT_METAL_HOME)/tt_metal/hw/inc/wormhole/dev_mem_map.h - INCLUDES = -I$(TT_METAL_HOME)/tt_metal/hw/inc/wormhole -else - DEV_MEM_MAP=$(TT_METAL_HOME)/tt_metal/hw/inc/$(ARCH_NAME)/dev_mem_map.h - INCLUDES = -I$(TT_METAL_HOME)/tt_metal/hw/inc/$(ARCH_NAME) -endif - -hw/toolchain: $(OUTPUT_DIR)/idle-erisc.ld $(OUTPUT_DIR)/brisc.ld $(OUTPUT_DIR)/ncrisc.ld $(OUTPUT_DIR)/trisc0.ld $(OUTPUT_DIR)/trisc1.ld $(OUTPUT_DIR)/trisc2.ld - -hw/toolchain/clean: - rm -rf $(OUTPUT_DIR) - -$(OUTPUT_DIR)/%.ld: toolchain/%.ld $(DEV_MAM_MAP) | $(OUTPUT_DIR) - $(CXX) $(DEFINES) $(DEFS) $(INCLUDES) -E -P -x c -o $@ $< - -$(OUTPUT_DIR): - mkdir -p $(OUTPUT_DIR) diff --git a/tt_metal/hw/toolchain/ncrisc.ld b/tt_metal/hw/toolchain/ncrisc.ld deleted file mode 100644 index 95f7e90d3aa..00000000000 --- a/tt_metal/hw/toolchain/ncrisc.ld +++ /dev/null @@ -1,19 +0,0 @@ -#include "dev_mem_map.h" -#include "tensix-memory.ld" - -#if DEBUG_MODE == 1 -// TODO(pgk); -REGION_ALIAS("REGION_CODE", NCRISC_L1_CODE) -REGION_ALIAS("REGION_DATA", NCRISC_L1_CODE) -REGION_ALIAS("REGION_STACK", NCRISC_L1_CODE) -#else -REGION_ALIAS("REGION_CODE", NCRISC_CODE) -REGION_ALIAS("REGION_DATA", NCRISC_LOCAL_DATA_MEM) -REGION_ALIAS("REGION_STACK", NCRISC_STACK_MEM) -#endif - -__firmware_stack_size = MEM_NCRISC_STACK_SIZE; - -#include "tensix-sections.ld" - -_Z11kernel_initv = _etext; diff --git a/tt_metal/hw/toolchain/tensix-sections.ld b/tt_metal/hw/toolchain/sections.ld similarity index 100% rename from tt_metal/hw/toolchain/tensix-sections.ld rename to tt_metal/hw/toolchain/sections.ld diff --git a/tt_metal/hw/toolchain/trisc0.ld b/tt_metal/hw/toolchain/trisc0.ld deleted file mode 100644 index 3c18230f2d5..00000000000 --- a/tt_metal/hw/toolchain/trisc0.ld +++ /dev/null @@ -1,12 +0,0 @@ -#include "dev_mem_map.h" -#include "tensix-memory.ld" - -REGION_ALIAS("REGION_CODE", TRISC0_CODE) -REGION_ALIAS("REGION_DATA", TRISC0_LOCAL_DATA_MEM) -REGION_ALIAS("REGION_STACK", TRISC0_STACK_MEM) - -__firmware_stack_size = MEM_TRISC0_STACK_SIZE; - -#include "tensix-sections.ld" - -_Z11kernel_initv = _etext; diff --git a/tt_metal/hw/toolchain/trisc1.ld b/tt_metal/hw/toolchain/trisc1.ld deleted file mode 100644 index 0e774759098..00000000000 --- a/tt_metal/hw/toolchain/trisc1.ld +++ /dev/null @@ -1,12 +0,0 @@ -#include "dev_mem_map.h" -#include "tensix-memory.ld" - -REGION_ALIAS("REGION_CODE", TRISC1_CODE) -REGION_ALIAS("REGION_DATA", TRISC1_LOCAL_DATA_MEM) -REGION_ALIAS("REGION_STACK", TRISC1_STACK_MEM) - -__firmware_stack_size = MEM_TRISC1_STACK_SIZE; - -#include "tensix-sections.ld" - -_Z11kernel_initv = _etext; diff --git a/tt_metal/hw/toolchain/trisc2.ld b/tt_metal/hw/toolchain/trisc2.ld deleted file mode 100644 index 15acb79c1da..00000000000 --- a/tt_metal/hw/toolchain/trisc2.ld +++ /dev/null @@ -1,12 +0,0 @@ -#include "dev_mem_map.h" -#include "tensix-memory.ld" - -REGION_ALIAS("REGION_CODE", TRISC2_CODE) -REGION_ALIAS("REGION_DATA", TRISC2_LOCAL_DATA_MEM) -REGION_ALIAS("REGION_STACK", TRISC2_STACK_MEM) - -__firmware_stack_size = MEM_TRISC2_STACK_SIZE; - -#include "tensix-sections.ld" - -_Z11kernel_initv = _etext; diff --git a/tt_metal/jit_build/build.cpp b/tt_metal/jit_build/build.cpp index ab3c76a5503..244fea1c766 100644 --- a/tt_metal/jit_build/build.cpp +++ b/tt_metal/jit_build/build.cpp @@ -377,7 +377,7 @@ JitBuildEthernet::JitBuildEthernet(const JitBuildEnv& env, int which, bool is_fw this->srcs_.push_back("tt_metal/hw/firmware/src/idle_erisck.cc"); } this->lflags_ = env_.lflags_ + "-Os "; - this->lflags_ += "-T" + env_.root_ + "runtime/hw/toolchain/idle-erisc.ld "; + this->lflags_ += "-T" + env_.root_ + "runtime/hw/toolchain/ierisc.ld "; break; } this->process_defines_at_compile = true; diff --git a/tt_metal/llrt/llrt.cpp b/tt_metal/llrt/llrt.cpp index df1b572d1ed..b72cdd9cae1 100644 --- a/tt_metal/llrt/llrt.cpp +++ b/tt_metal/llrt/llrt.cpp @@ -85,16 +85,16 @@ uint16_t get_binary_code_size16(const ll_api::memory& mem, int riscv_id) { range_max = MEM_NCRISC_FIRMWARE_BASE + MEM_NCRISC_FIRMWARE_SIZE; break; case 2: - range_min = MEM_TRISC0_BASE; - range_max = MEM_TRISC0_BASE + MEM_TRISC0_SIZE; + range_min = MEM_TRISC0_FIRMWARE_BASE; + range_max = MEM_TRISC0_FIRMWARE_BASE + MEM_TRISC0_FIRMWARE_SIZE; break; case 3: - range_min = MEM_TRISC1_BASE; - range_max = MEM_TRISC1_BASE + MEM_TRISC1_SIZE; + range_min = MEM_TRISC1_FIRMWARE_BASE; + range_max = MEM_TRISC1_FIRMWARE_BASE + MEM_TRISC1_FIRMWARE_SIZE; break; case 4: - range_min = MEM_TRISC2_BASE; - range_max = MEM_TRISC2_BASE + MEM_TRISC2_SIZE; + range_min = MEM_TRISC2_FIRMWARE_BASE; + range_max = MEM_TRISC2_FIRMWARE_BASE + MEM_TRISC2_FIRMWARE_SIZE; break; case 5: range_min = eth_l1_mem::address_map::FIRMWARE_BASE; diff --git a/tt_metal/llrt/tt_cluster.hpp b/tt_metal/llrt/tt_cluster.hpp index a53724499d6..1ddd625e360 100644 --- a/tt_metal/llrt/tt_cluster.hpp +++ b/tt_metal/llrt/tt_cluster.hpp @@ -305,10 +305,10 @@ class Cluster { tt_device_l1_address_params l1_address_params = { (uint32_t)MEM_NCRISC_FIRMWARE_BASE, (uint32_t)MEM_BRISC_FIRMWARE_BASE, - (uint32_t)MEM_TRISC0_SIZE, - (uint32_t)MEM_TRISC1_SIZE, - (uint32_t)MEM_TRISC2_SIZE, - (uint32_t)MEM_TRISC0_BASE, + (uint32_t)MEM_TRISC0_FIRMWARE_SIZE, + (uint32_t)MEM_TRISC1_FIRMWARE_SIZE, + (uint32_t)MEM_TRISC2_FIRMWARE_SIZE, + (uint32_t)MEM_TRISC0_FIRMWARE_BASE, (uint32_t)GET_MAILBOX_ADDRESS_HOST(l1_barrier), (uint32_t)eth_l1_mem::address_map::ERISC_BARRIER_BASE, (uint32_t)eth_l1_mem::address_map::FW_VERSION_ADDR,