diff --git a/_trainees/skkwan.md b/_trainees/skkwan.md index 69ad246..6a6b2d0 100644 --- a/_trainees/skkwan.md +++ b/_trainees/skkwan.md @@ -15,11 +15,12 @@ presentations: --- ### Biography -I am a fifth-year graduate student in the Princeton University CMS experiment group advised by Prof. Isobel Ojalvo. I am currently based in Geneva at CERN. - -Formerly I was an undergraduate at Caltech, and was supported by the NSF GRFP during part of my graduate program. +I am an an alumni of the TAC-HEP Progam. I participated in 2022-2024. I got my PhD from Princeton Universityin CMS experiment group advised by Prof. Isobel Ojalvo. Formerly I was an undergraduate at Caltech, and was supported by the NSF GRFP during part of my graduate program. ### Project interests -My current projects include a search for new physics (exotic Higgs decays to pseudoscalars to two b-quarks and two tau leptons), and developing improved high-granularity algorithms for reconstructing electrons and photons in the Level-1 Trigger of the CMS Experiment for the Phase 2 High-Luminosity LHC upgrade. -I am interested in learning how advances in computing techniques and tools can be harnessed to meet the demands and enhance the capabilities of current and future physics experiments. +I am very interested in High Level Synthesis and FPGAs. My research includes a search for new physics (exotic Higgs decays to pseudoscalars to two b-quarks and two tau leptons), and developing improved high-granularity algorithms for reconstructing electrons and photons in the Level-1 Trigger of the CMS Experiment for the Phase 2 High-Luminosity LHC upgrade. + +As a summer project I developed a GELU (Gaussian Error Linear Unit) activation function for a Transformer on an FPGA using HLS. This involved creating high-level descriptions of the key components in C/C++ and using HLS tools to synthesize them into HDL code. The GELU function and Transformer’s self-attention mechanism serve as examples of how to approach this complex task. Properly designing and optimizing these components for FPGA resources and performance is crucial for an efficient implementation. I compared different methods for implementation: one using look up tables and one using DSPs and compared the resource utilization for each method. + +Mentors: Jennifer Ngadiuba (Fermilab), Adrian Pol (Princeton, IRIS-HEP)