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Add Varun Sharma as collaborator & FPGA lectures #29

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24 changes: 24 additions & 0 deletions _collaborators/varuns23.md
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@@ -0,0 +1,24 @@
---
layout: collaborator
active: true
e-mail: [email protected]
institutionkey: wisconsin
institution: University of Wisconsin–Madison
name: Varun Sharma
photo: "/assets/images/team/Varun-Sharma.png"
shortname: varuns23
github-username: varuns23
title:
website: https://www.physics.wisc.edu/directory/sharma-varun/
presentations:
---

### Biography
Varun Sharma is a research scientist in the Department of Physics at the University of Wisconsin–Madison. He has been an active member of the Compact Muon Solenoid (CMS) experiment at the Large Hadron Collider (LHC) since 2011. He received his Ph.D. from the Department of Physics & Astrophysics, University of Delhi, India, for his work on the substructure of quarks.
Sharma's current research focuses on physics beyond the Standard Model, specifically dark matter searches and its possible connection to the Higgs sector. He has also been searching for lepton-flavor violating decays of the Higgs boson. He is the co-convener of the Hadronic/Photon subgroup of the Searches for new physics in final states with Unbalanced transverse momentum and Standard objects (SUS) Physics Analysis group in the CMS experiment.
Sharma has been involved with the CMS trigger system and served as the trigger technical coordinator of the experiment from 2019 to 2022. He ensured the efficient operations of the CMS experiment calorimeter trigger system and designed valuable algorithm upgrades for its future. He used the Xilinx Vivado High Level synthesis (HLS) tool to develop firmware and demonstrate its performance on prototype boards. In 2022, he was awarded the CMS Achievement Award for his crucial coordination and exceptional commitment to the operations of the Level-1 Trigger system.

### Project interests
- Develop and implement new machine learning techniques to improve the accuracy and reach of physics results
- Use machine learning to improve the performance of current FPGA-based level-1 trigger algorithms.
- Find new physics to help understand the unsolved mysteries of nature
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22 changes: 17 additions & 5 deletions pages/training-modules/uw-gpu-fpga.md
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Expand Up @@ -6,11 +6,11 @@ title: GPU FPGA training

# GPU and FPGA training module
<p align="justify">
This training module aims to introduce the students to the concept of hardware accelerators and programming of heterogeneous systems. The training is split in two parts, one dedicated to GPU programming and the second dedicated to FPGA programming.
This training module aims to introduce the students to the concept of hardware accelerators and programming of heterogeneous systems. The training is split in two parts, one dedicated to GPU programming and the second dedicated to introduction to FPGAs and Xilinx Vivado High Level Synthesis (HLS) tool to develop firmware for FPGA.
The duration of this training is 1 semester (14 weeks). The detailed syllabus and series of lectures can be found below.
</p>
- [Course syllabus]({{ site.baseurl }}/training-modules/uw-gpu-fpga/syllabus)
- Series of lectures :
- Series of lectures for GPU part:
- [Lecture 1]({{ site.baseurl }}/assets/pdf/uw-gpu-fpga/TAC-HEP_trainingModule_Week1_Lecture1.pdf) Introduction to hardware accelerators
- [Lecture 2]({{ site.baseurl }}/assets/pdf/uw-gpu-fpga/TAC-HEP_trainingModule_Week1_Lecture2.pdf) The GPU and its applications in HEP
- [Lecture 3]({{ site.baseurl }}/assets/pdf/uw-gpu-fpga/TAC-HEP_trainingModule_Week2_Lecture3.pdf) Introduction to C++ : Core syntax, variables operators, flow control instructions and functions.
Expand All @@ -27,6 +27,18 @@ The duration of this training is 1 semester (14 weeks). The detailed syllabus an
- [Lecture 14]({{ site.baseurl }}/assets/pdf/uw-gpu-fpga/TAC-HEP_An_introduction_to_alpaka_Part_1.pdf) Introduction to Alpaka : Performance portability, Alpaka platforms, devices, queues and events
- [Lecture 15]({{ site.baseurl }}/assets/pdf/uw-gpu-fpga/TAC-HEP_An_introduction_to_alpaka_Part_2.pdf) Introduction to Alpaka : Memory managment, device functions and kernels, work division




- Series of lectures for FGPA/HLS part:
- [Lecture 1]({{ site.baseurl }}/assets/pdf/uw-gpu-fpga/2023-03-21-FPGA-HLS-Lecture-1.pdf) Introduction to FPGA and its architecture
- [Lecture 2]({{ site.baseurl }}/assets/pdf/uw-gpu-fpga/2023-03-22-FPGA-HLS-Lecture-2.pdf) FPGA: Parallelism in program execution
- [Lecture 3]({{ site.baseurl }}/assets/pdf/uw-gpu-fpga/2023-03-28-FPGA-HLS-Lecture-3.pdf) FPGA: Clock Frequency, Latency, Pipelining
- [Lecture 4]({{ site.baseurl }}/assets/pdf/uw-gpu-fpga/2023-03-29-FPGA-HLS-Lecture-4.pdf) Introduction to Vivado HLS, Setup
- [Lecture 5]({{ site.baseurl }}/assets/pdf/uw-gpu-fpga/2023-04-04-FPGA-HLS-Lecture-5.pdf) Hands-on with vivado_hls, output review
- [Lecture 6]({{ site.baseurl }}/assets/pdf/uw-gpu-fpga/2023-04-05-FPGA-HLS-Lecture-6.pdf) Hands-on with vivado_hls, Introduction to Pragmas
- [Lecture 7]({{ site.baseurl }}/assets/pdf/uw-gpu-fpga/2023-04-11-FPGA-HLS-Lecture-7.pdf) Vivado HLS: Pragmas & more examples
- [Lecture 8]({{ site.baseurl }}/assets/pdf/uw-gpu-fpga/2023-04-12-FPGA-HLS-Lecture-8.pdf) Vivado HLS: Pragma’s effect on performance
- [Lecture 9]({{ site.baseurl }}/assets/pdf/uw-gpu-fpga/2023-04-18-FPGA-HLS-Lecture-9.pdf) Vivado HLS: More pragmas and Do’s & Don’ts
- [Lecture 10]({{ site.baseurl }}/assets/pdf/uw-gpu-fpga/2023-04-19-FPGA-HLS-Lecture-10.pdf) Vivado HLS: More pragmas and HLS coding styles
- [Lecture 11]({{ site.baseurl }}/assets/pdf/uw-gpu-fpga/2023-04-25-FPGA-HLS-Lecture-11.pdf) LHC, CMS Level-1 Trigger, Project
- [Lecture 12]({{ site.baseurl }}/assets/pdf/uw-gpu-fpga/2023-04-26-FPGA-HLS-Lecture-12.pdf) Project: Re-designing RCT
- [Lecture 13]({{ site.baseurl }}/assets/pdf/uw-gpu-fpga/2023-05-02-FPGA-HLS-Lecture-13.pdf) Introduction to VHDL
- [Lecture 14]({{ site.baseurl }}/assets/pdf/uw-gpu-fpga/2023-05-03-FPGA-HLS-Lecture-14.pdf) Introduction to VHDL contd.