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Use LL libraries for C071R(8-B)T clock config
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Also add support for Generic C071R8Tx
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thernstig committed Nov 9, 2024
1 parent eb0596d commit 09367c2
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Showing 3 changed files with 33 additions and 25 deletions.
2 changes: 1 addition & 1 deletion README.md
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Expand Up @@ -214,7 +214,7 @@ User can add a STM32 based board following this [wiki](https://github.com/stm32d
| :green_heart: | STM32C011J4<br>STM32C011J6 | Generic Board | *2.8.0* | |
| :green_heart: | STM32C031C4<br>STM32C031C6 | Generic Board | *2.5.0* | |
| :green_heart: | STM32C031F4<br>STM32C031F6 | Generic Board | *2.6.0* | |
| :green_heart: | STM32G071RB | Generic Board | *2.9.0* | |
| :yellow_heart: | STM32C071R8<br>STM32C071RB | Generic Board | **2.9.0** | |

### Generic STM32F0 boards

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8 changes: 8 additions & 0 deletions boards.txt
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Expand Up @@ -1668,6 +1668,14 @@ GenC0.menu.pnum.GENERIC_C031F6PX.build.product_line=STM32C031xx
GenC0.menu.pnum.GENERIC_C031F6PX.build.variant=STM32C0xx/C011D6Y_C011F(4-6)(P-U)_C031F(4-6)P
GenC0.menu.pnum.GENERIC_C031F6PX.debug.svd_file={runtime.tools.STM32_SVD.path}/svd/STM32C0xx/STM32C031.svd

# Generic C071R8Tx
GenC0.menu.pnum.GENERIC_C071R8TX=Generic C071R8Tx
GenC0.menu.pnum.GENERIC_C071R8TX.upload.maximum_size=65536
GenC0.menu.pnum.GENERIC_C071R8TX.upload.maximum_data_size=24576
GenC0.menu.pnum.GENERIC_C071R8TX.build.board=GENERIC_C071R8TX
GenC0.menu.pnum.GENERIC_C071R8TX.build.product_line=STM32C071xx
GenC0.menu.pnum.GENERIC_C071R8TX.build.variant=STM32C0xx/C071R(8-B)T

# Generic C071RBTx
GenC0.menu.pnum.GENERIC_C071RBTX=Generic C071RBTx
GenC0.menu.pnum.GENERIC_C071RBTX.upload.maximum_size=131072
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48 changes: 24 additions & 24 deletions variants/STM32C0xx/C071R(8-B)T/generic_clock.c
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Expand Up @@ -14,38 +14,38 @@
#include "pins_arduino.h"

/**
* @brief System Clock Configuration
* @param None
* @retval None
*/
* @brief System Clock Configuration
* @param None
* @retval None
*/
WEAK void SystemClock_Config(void)
{
RCC_OscInitTypeDef RCC_OscInitStruct = {};
RCC_ClkInitTypeDef RCC_ClkInitStruct = {};
LL_FLASH_SetLatency(LL_FLASH_LATENCY_1);

/** Initializes the RCC Oscillators according to the specified parameters
* in the RCC_OscInitTypeDef structure.
*/
RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_HSI | RCC_OSCILLATORTYPE_HSI48;
RCC_OscInitStruct.HSIState = RCC_HSI_ON;
RCC_OscInitStruct.HSIDiv = RCC_HSI_DIV1;
RCC_OscInitStruct.HSICalibrationValue = RCC_HSICALIBRATION_DEFAULT;
RCC_OscInitStruct.HSI48State = RCC_HSI48_ON;
/* HSI configuration and activation */
LL_RCC_HSI_Enable();
while (LL_RCC_HSI_IsReady() != 1)
{
}

if (HAL_RCC_OscConfig(&RCC_OscInitStruct) != HAL_OK)
LL_RCC_HSI_SetCalibTrimming(64);
LL_RCC_SetHSIDiv(LL_RCC_HSI_DIV_1);
/* Set AHB prescaler*/
LL_RCC_SetAHBPrescaler(LL_RCC_HCLK_DIV_1);

/* Sysclk activation on the HSI */
LL_RCC_SetSysClkSource(LL_RCC_SYS_CLKSOURCE_HSI);
while (LL_RCC_GetSysClkSource() != LL_RCC_SYS_CLKSOURCE_STATUS_HSI)
{
Error_Handler();
}

/** Initializes the CPU, AHB and APB buses clocks
*/
RCC_ClkInitStruct.ClockType = RCC_CLOCKTYPE_HCLK | RCC_CLOCKTYPE_SYSCLK | RCC_CLOCKTYPE_PCLK1;
RCC_ClkInitStruct.SYSCLKSource = RCC_SYSCLKSOURCE_HSI;
RCC_ClkInitStruct.SYSCLKDivider = RCC_SYSCLK_DIV1;
RCC_ClkInitStruct.AHBCLKDivider = RCC_HCLK_DIV1;
RCC_ClkInitStruct.APB1CLKDivider = RCC_APB1_DIV1;
/* Set APB1 prescaler*/
LL_RCC_SetAPB1Prescaler(LL_RCC_APB1_DIV_1);
/* Update CMSIS variable (which can be updated also through SystemCoreClockUpdate function) */
LL_SetSystemCoreClock(48000000);

if (HAL_RCC_ClockConfig(&RCC_ClkInitStruct, FLASH_LATENCY_1) != HAL_OK)
/* Update the time base */
if (HAL_InitTick(TICK_INT_PRIORITY) != HAL_OK)
{
Error_Handler();
}
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