Plans for libhsdaoh: SDR or multi-purpose?

[Stefan-Olt]

Hi,
as I would like to use hsdaoh for MISRC the questions is: Is libhsdaoh going to be a general-purpose library designed for handling the data produced by the hsdaoh FPGA code and interfacing the HDMI capture devices or is it specifically targeting SDR applications in the future, because the SDR branch contains SDR-specific functions, like data conversion to float and DC balance, but also setting sample rates (that's also something good for MISRC, but I have to use the external PLL as the internal one cannot generate 40 MHz with the 27 MHz reference).
In this case I would just copy libhsdaoh and modify it for my needs. But if the SDR branch is just an experiment and the goal is for example to have a general-purpose libhsdaoh, while the SDR-specific processing is done in a libhsdaohsdr, I would try to use an unmodified libhsdaoh and create pull requests if needed (for example handing over the pack_state to the callback function).

I would prefer the second approach, as this would make the entire idea more universal (other use case could be a logic analyzer for sigrok) and adding for example new HDMI capture devices in the future could be done in a single place and would not require to back-port any changes.

Best regards
Stefan

[steve-m]

The idea was for it to be a general purpose library, and the sdr branch is more or the less a hack. So yeah, the second approach would be the cleanest.

Btw, which FPGA board are you using? Since you're talking about the external PLL I assume the nano 20K.
With my tests the external PLL had more spurs than the internal PLL unfortunately.
Would be nice if the CLKDIV allowed /3, then you could use the 120 MHz.

[Stefan-Olt]

That's great to here. I'm planning to use the 20K, because I need 160 MB/s and it just has enough pins for 32 Bit input (there are some additional on the sd card that are not on the pin headers). It has not yet arrived.

Maybe I'll use a fixed external clock then if the PLL is not that great