diff --git a/.gitignore b/.gitignore index bb79471..32c0ecf 100644 --- a/.gitignore +++ b/.gitignore @@ -11,6 +11,7 @@ __pycache__ *.a !artemis/bsp/gcc/bin/libam_bsp.a !artemis_dk/bsp/gcc/bin/libam_bsp.a +!artemis_mm_pb/bsp/gcc/bin/libam_bsp.a !artemis_thing_plus/bsp/gcc/bin/libam_bsp.a !artmbed/bsp/gcc/bin/libam_bsp.a !edge/bsp/gcc/bin/libam_bsp.a diff --git a/artemis_mm_pb/bsp/am_bsp.c b/artemis_mm_pb/bsp/am_bsp.c new file mode 100644 index 0000000..ff97924 --- /dev/null +++ b/artemis_mm_pb/bsp/am_bsp.c @@ -0,0 +1,1062 @@ +//***************************************************************************** +// +// am_bsp.c +//! @file +//! +//! @brief Top level functions for performing board initialization. +//! +//! @addtogroup BSP Board Support Package (BSP) +//! @addtogroup apollo3_eb_bsp BSP for the Apollo3 Engineering Board +//! @ingroup BSP +//! @{ +// +//***************************************************************************** + +//***************************************************************************** +// +// Copyright (c) 2019, Ambiq Micro +// All rights reserved. +// +// Redistribution and use in source and binary forms, with or without +// modification, are permitted provided that the following conditions are met: +// +// 1. Redistributions of source code must retain the above copyright notice, +// this list of conditions and the following disclaimer. +// +// 2. Redistributions in binary form must reproduce the above copyright +// notice, this list of conditions and the following disclaimer in the +// documentation and/or other materials provided with the distribution. +// +// 3. Neither the name of the copyright holder nor the names of its +// contributors may be used to endorse or promote products derived from this +// software without specific prior written permission. +// +// Third party software included in this distribution is subject to the +// additional license terms as defined in the /docs/licenses directory. +// +// THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" +// AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE +// IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE +// ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE +// LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR +// CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF +// SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS +// INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN +// CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) +// ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE +// POSSIBILITY OF SUCH DAMAGE. +// +// This is part of revision v2.0.0 of the AmbiqSuite Development Package. +// +//***************************************************************************** + +#include "am_bsp.h" +#include "am_util.h" + +//***************************************************************************** +// +// Power tracking structures for IOM and UART +// +//***************************************************************************** +am_bsp_uart_pwrsave_t am_bsp_uart_pwrsave[AM_REG_UART_NUM_MODULES]; + +//***************************************************************************** +// +// LEDs +// +//***************************************************************************** +#ifdef AM_BSP_NUM_LEDS +am_devices_led_t am_bsp_psLEDs[AM_BSP_NUM_LEDS] = +{ + {AM_BSP_GPIO_LED0, AM_DEVICES_LED_ON_HIGH | AM_DEVICES_LED_POL_DIRECT_DRIVE_M}, +}; +#endif + +#ifdef AM_BSP_NUM_BUTTONS +//***************************************************************************** +// +// Buttons. +// +//***************************************************************************** +am_devices_button_t am_bsp_psButtons[AM_BSP_NUM_BUTTONS] = +{ + AM_DEVICES_BUTTON(AM_BSP_GPIO_BUTTON0, AM_DEVICES_BUTTON_NORMAL_HIGH) +}; +#endif + +//***************************************************************************** +// +// Print interface tracking variable. +// +//***************************************************************************** +static uint32_t g_ui32PrintInterface = AM_BSP_PRINT_INFC_UART0; + +//***************************************************************************** +// +// Default UART configuration settings. +// +//***************************************************************************** +static void *g_sCOMUART; + +static const am_hal_uart_config_t g_sBspUartConfig = +{ + // + // Standard UART settings: 115200-8-N-1 + // + .ui32BaudRate = 115200, + .ui32DataBits = AM_HAL_UART_DATA_BITS_8, + .ui32Parity = AM_HAL_UART_PARITY_NONE, + .ui32StopBits = AM_HAL_UART_ONE_STOP_BIT, + .ui32FlowControl = AM_HAL_UART_FLOW_CTRL_NONE, + + // + // Set TX and RX FIFOs to interrupt at half-full. + // + .ui32FifoLevels = (AM_HAL_UART_TX_FIFO_1_2 | + AM_HAL_UART_RX_FIFO_1_2), + + // + // The default interface will just use polling instead of buffers. + // + .pui8TxBuffer = 0, + .ui32TxBufferSize = 0, + .pui8RxBuffer = 0, + .ui32RxBufferSize = 0, +}; + +#ifndef AM_BSP_DISABLE_BUFFERED_UART +//***************************************************************************** +// +// Default UART configuration settings if using buffers. +// +//***************************************************************************** +#define AM_BSP_UART_BUFFER_SIZE 1024 +static uint8_t pui8UartTxBuffer[AM_BSP_UART_BUFFER_SIZE]; +static uint8_t pui8UartRxBuffer[AM_BSP_UART_BUFFER_SIZE]; + +static am_hal_uart_config_t g_sBspUartBufferedConfig = +{ + // + // Standard UART settings: 115200-8-N-1 + // + .ui32BaudRate = 115200, + .ui32DataBits = AM_HAL_UART_DATA_BITS_8, + .ui32Parity = AM_HAL_UART_PARITY_NONE, + .ui32StopBits = AM_HAL_UART_ONE_STOP_BIT, + .ui32FlowControl = AM_HAL_UART_FLOW_CTRL_NONE, + + // + // Set TX and RX FIFOs to interrupt at half-full. + // + .ui32FifoLevels = (AM_HAL_UART_TX_FIFO_1_2 | + AM_HAL_UART_RX_FIFO_1_2), + + // + // The default interface will just use polling instead of buffers. + // + .pui8TxBuffer = pui8UartTxBuffer, + .ui32TxBufferSize = sizeof(pui8UartTxBuffer), + .pui8RxBuffer = pui8UartRxBuffer, + .ui32RxBufferSize = sizeof(pui8UartRxBuffer), +}; +#endif // AM_BSP_DISABLE_BUFFERED_UART + +//***************************************************************************** +// +//! @brief Prepare the MCU for low power operation. +//! +//! This function enables several power-saving features of the MCU, and +//! disables some of the less-frequently used peripherals. It also sets the +//! system clock to 24 MHz. +//! +//! @return None. +// +//***************************************************************************** +void +am_bsp_low_power_init(void) +{ + // + // Initialize for low power in the power control block + // + am_hal_pwrctrl_low_power_init(); + + // + // Disable the RTC. + // + am_hal_rtc_osc_disable(); + + // + // Stop the XTAL. + // + am_hal_clkgen_control(AM_HAL_CLKGEN_CONTROL_XTAL_STOP, 0); + + // + // Make sure SWO/ITM/TPIU is disabled. + // SBL may not get it completely shut down. + // + am_bsp_itm_printf_disable(); + +#ifdef AM_BSP_NUM_LEDS + // + // Initialize the LEDs. + // On the apollo3_evb, when the GPIO outputs are disabled (the default at + // power up), the FET gates are floating and partially illuminating the LEDs. + // + uint32_t ux, ui32GPIONumber; + for (ux = 0; ux < AM_BSP_NUM_LEDS; ux++) + { + ui32GPIONumber = am_bsp_psLEDs[ux].ui32GPIONumber; + + // + // Configure the pin as a push-pull GPIO output + // (aka AM_DEVICES_LED_POL_DIRECT_DRIVE_M). + // + am_hal_gpio_pinconfig(ui32GPIONumber, g_AM_HAL_GPIO_OUTPUT); + + // + // Turn off the LED. + // + am_hal_gpio_state_write(ui32GPIONumber, AM_HAL_GPIO_OUTPUT_TRISTATE_DISABLE); + am_hal_gpio_state_write(ui32GPIONumber, AM_HAL_GPIO_OUTPUT_CLEAR); + } +#endif // AM_BSP_NUM_LEDS + +} // am_bsp_low_power_init() + +//***************************************************************************** +// +//! @brief Enable the TPIU and ITM for debug printf messages. +//! +//! This function enables TPIU registers for debug printf messages and enables +//! ITM GPIO pin to SWO mode. This function should be called after reset and +//! after waking up from deep sleep. +//! +//! @return None. +// +//***************************************************************************** +void +am_bsp_debug_printf_enable(void) +{ + if (g_ui32PrintInterface == AM_BSP_PRINT_INFC_SWO) + { +#ifdef AM_BSP_GPIO_ITM_SWO + am_bsp_itm_printf_enable(); +#endif + } + else if (g_ui32PrintInterface == AM_BSP_PRINT_INFC_UART0) + { + am_bsp_uart_printf_enable(); + } +#ifndef AM_BSP_DISABLE_BUFFERED_UART + else if (g_ui32PrintInterface == AM_BSP_PRINT_INFC_BUFFERED_UART0) + { + am_bsp_buffered_uart_printf_enable(); + } +#endif // AM_BSP_DISABLE_BUFFERED_UART +} // am_bsp_debug_printf_enable() + +//***************************************************************************** +// +//! @brief Enable the TPIU and ITM for debug printf messages. +//! +//! This function disables TPIU registers for debug printf messages and +//! enables ITM GPIO pin to GPIO mode and prepares the MCU to go to deep sleep. +//! +//! @return None. +// +//***************************************************************************** +void +am_bsp_debug_printf_disable(void) +{ + if (g_ui32PrintInterface == AM_BSP_PRINT_INFC_SWO) + { + am_bsp_itm_printf_disable(); + } + else if (g_ui32PrintInterface == AM_BSP_PRINT_INFC_UART0) + { + am_bsp_uart_printf_disable(); + } +} // am_bsp_debug_printf_disable() + +//***************************************************************************** +// +// @brief Enable printing over ITM. +// +//***************************************************************************** +void +#ifdef AM_BSP_GPIO_ITM_SWO +am_bsp_itm_printf_enable(void) +#else +am_bsp_itm_printf_enable(uint32_t ui32Pin, am_hal_gpio_pincfg_t sPincfg) +#endif +{ + am_hal_tpiu_config_t TPIUcfg; + + // + // Set the global print interface. + // + g_ui32PrintInterface = AM_BSP_PRINT_INFC_SWO; + + // + // Enable the ITM interface and the SWO pin. + // + am_hal_itm_enable(); + + // + // Enable the ITM and TPIU + // Set the BAUD clock for 1M + // + TPIUcfg.ui32SetItmBaud = AM_HAL_TPIU_BAUD_2M; + am_hal_tpiu_enable(&TPIUcfg); + #ifdef AM_BSP_GPIO_ITM_SWO + am_hal_gpio_pinconfig(AM_BSP_GPIO_ITM_SWO, g_AM_BSP_GPIO_ITM_SWO); + #else + am_hal_gpio_pinconfig(ui32Pin, sPincfg); + #endif + + // + // Attach the ITM to the STDIO driver. + // + am_util_stdio_printf_init(am_hal_itm_print); +} // am_bsp_itm_printf_enable() + +//***************************************************************************** +// +//! @brief ITM-based string print function. +//! +//! This function is used for printing a string via the ITM. +//! +//! @return None. +// +//***************************************************************************** +void +am_bsp_itm_string_print(char *pcString) +{ + am_hal_itm_print(pcString); +} + +//***************************************************************************** +// +// @brief Disable printing over ITM. +// +//***************************************************************************** +void +am_bsp_itm_printf_disable(void) +{ + // + // Disable the ITM/TPIU + // + am_hal_itm_disable(); + + // + // Detach the ITM interface from the STDIO driver. + // + am_util_stdio_printf_init(0); + + // // + // // Disconnect the SWO pin + // // + // am_hal_gpio_pinconfig(AM_BSP_GPIO_ITM_SWO, g_AM_HAL_GPIO_DISABLE); +} // am_bsp_itm_printf_disable() + +//***************************************************************************** +// +//! @brief Set up the IOM pins based on mode and module. +//! +//! This function configures up to 10-pins for MSPI serial, dual, quad, +//! dual-quad, and octal operation. +//! +//! @return None. +// +//***************************************************************************** +void +am_bsp_iom_pins_enable(uint32_t ui32Module, am_hal_iom_mode_e eIOMMode) +{ + uint32_t ui32Combined; + + // + // Validate parameters + // + if ( ui32Module >= AM_REG_IOM_NUM_MODULES ) + { + // + // FPGA supports only IOM0 and 1. + // + return; + } + + ui32Combined = ((ui32Module << 2) | eIOMMode); + + switch ( ui32Combined ) + { + case ((0 << 2) | AM_HAL_IOM_SPI_MODE): + am_hal_gpio_pinconfig(AM_BSP_GPIO_IOM0_SCK, g_AM_BSP_GPIO_IOM0_SCK); + am_hal_gpio_pinconfig(AM_BSP_GPIO_IOM0_MISO, g_AM_BSP_GPIO_IOM0_MISO); + am_hal_gpio_pinconfig(AM_BSP_GPIO_IOM0_MOSI, g_AM_BSP_GPIO_IOM0_MOSI); + am_hal_gpio_pinconfig(AM_BSP_GPIO_IOM0_CS, g_AM_BSP_GPIO_IOM0_CS); + break; + + case ((1 << 2) | AM_HAL_IOM_SPI_MODE): + am_hal_gpio_pinconfig(AM_BSP_GPIO_IOM1_SCK, g_AM_BSP_GPIO_IOM1_SCK); + am_hal_gpio_pinconfig(AM_BSP_GPIO_IOM1_MISO, g_AM_BSP_GPIO_IOM1_MISO); + am_hal_gpio_pinconfig(AM_BSP_GPIO_IOM1_MOSI, g_AM_BSP_GPIO_IOM1_MOSI); + am_hal_gpio_pinconfig(AM_BSP_GPIO_IOM1_CS, g_AM_BSP_GPIO_IOM1_CS); + break; + + case ((2 << 2) | AM_HAL_IOM_SPI_MODE): + am_hal_gpio_pinconfig(AM_BSP_GPIO_IOM2_SCK, g_AM_BSP_GPIO_IOM2_SCK); + am_hal_gpio_pinconfig(AM_BSP_GPIO_IOM2_MISO, g_AM_BSP_GPIO_IOM2_MISO); + am_hal_gpio_pinconfig(AM_BSP_GPIO_IOM2_MOSI, g_AM_BSP_GPIO_IOM2_MOSI); + am_hal_gpio_pinconfig(AM_BSP_GPIO_IOM2_CS, g_AM_BSP_GPIO_IOM2_CS); + break; + + case ((3 << 2) | AM_HAL_IOM_SPI_MODE): + am_hal_gpio_pinconfig(AM_BSP_GPIO_IOM3_SCK, g_AM_BSP_GPIO_IOM3_SCK); + am_hal_gpio_pinconfig(AM_BSP_GPIO_IOM3_MISO, g_AM_BSP_GPIO_IOM3_MISO); + am_hal_gpio_pinconfig(AM_BSP_GPIO_IOM3_MOSI, g_AM_BSP_GPIO_IOM3_MOSI); + am_hal_gpio_pinconfig(AM_BSP_GPIO_IOM3_CS, g_AM_BSP_GPIO_IOM3_CS); + break; + + case ((4 << 2) | AM_HAL_IOM_SPI_MODE): + am_hal_gpio_pinconfig(AM_BSP_GPIO_IOM4_SCK, g_AM_BSP_GPIO_IOM4_SCK); + am_hal_gpio_pinconfig(AM_BSP_GPIO_IOM4_MISO, g_AM_BSP_GPIO_IOM4_MISO); + am_hal_gpio_pinconfig(AM_BSP_GPIO_IOM4_MOSI, g_AM_BSP_GPIO_IOM4_MOSI); + am_hal_gpio_pinconfig(AM_BSP_GPIO_IOM4_CS, g_AM_BSP_GPIO_IOM4_CS); + break; + + case ((5 << 2) | AM_HAL_IOM_SPI_MODE): + am_hal_gpio_pinconfig(AM_BSP_GPIO_IOM5_SCK, g_AM_BSP_GPIO_IOM5_SCK); + am_hal_gpio_pinconfig(AM_BSP_GPIO_IOM5_MISO, g_AM_BSP_GPIO_IOM5_MISO); + am_hal_gpio_pinconfig(AM_BSP_GPIO_IOM5_MOSI, g_AM_BSP_GPIO_IOM5_MOSI); + am_hal_gpio_pinconfig(AM_BSP_GPIO_IOM5_CS, g_AM_BSP_GPIO_IOM5_CS); + break; + + case ((0 << 2) | AM_HAL_IOM_I2C_MODE): + am_hal_gpio_pinconfig(AM_BSP_GPIO_IOM0_SCL, g_AM_BSP_GPIO_IOM0_SCL); + am_hal_gpio_pinconfig(AM_BSP_GPIO_IOM0_SDA, g_AM_BSP_GPIO_IOM0_SDA); + break; + + case ((1 << 2) | AM_HAL_IOM_I2C_MODE): + am_hal_gpio_pinconfig(AM_BSP_GPIO_IOM1_SCL, g_AM_BSP_GPIO_IOM1_SCL); + am_hal_gpio_pinconfig(AM_BSP_GPIO_IOM1_SDA, g_AM_BSP_GPIO_IOM1_SDA); + break; + + case ((2 << 2) | AM_HAL_IOM_I2C_MODE): + am_hal_gpio_pinconfig(AM_BSP_GPIO_IOM2_SCL, g_AM_BSP_GPIO_IOM2_SCL); + am_hal_gpio_pinconfig(AM_BSP_GPIO_IOM2_SDA, g_AM_BSP_GPIO_IOM2_SDA); + break; + + case ((3 << 2) | AM_HAL_IOM_I2C_MODE): + am_hal_gpio_pinconfig(AM_BSP_GPIO_IOM3_SCL, g_AM_BSP_GPIO_IOM3_SCL); + am_hal_gpio_pinconfig(AM_BSP_GPIO_IOM3_SDA, g_AM_BSP_GPIO_IOM3_SDA); + break; + + case ((4 << 2) | AM_HAL_IOM_I2C_MODE): + am_hal_gpio_pinconfig(AM_BSP_GPIO_IOM4_SCL, g_AM_BSP_GPIO_IOM4_SCL); + am_hal_gpio_pinconfig(AM_BSP_GPIO_IOM4_SDA, g_AM_BSP_GPIO_IOM4_SDA); + break; + + case ((5 << 2) | AM_HAL_IOM_I2C_MODE): + am_hal_gpio_pinconfig(AM_BSP_GPIO_IOM5_SCL, g_AM_BSP_GPIO_IOM5_SCL); + am_hal_gpio_pinconfig(AM_BSP_GPIO_IOM5_SDA, g_AM_BSP_GPIO_IOM5_SDA); + break; + + default: + break; + } +} // am_bsp_iom_pins_enable() + +//***************************************************************************** +// +//! @brief Disable the IOM pins based on mode and module. +//! +//! @return None. +// +//***************************************************************************** +void +am_bsp_iom_pins_disable(uint32_t ui32Module, am_hal_iom_mode_e eIOMMode) +{ + uint32_t ui32Combined; + + // + // Validate parameters + // + if ( ui32Module >= AM_REG_IOM_NUM_MODULES ) + { + // + // FPGA supports only IOM0 and 1. + // + return; + } + + ui32Combined = ((ui32Module << 2) | eIOMMode); + + switch ( ui32Combined ) + { + case ((0 << 2) | AM_HAL_IOM_SPI_MODE): + am_hal_gpio_pinconfig(AM_BSP_GPIO_IOM0_SCK, g_AM_HAL_GPIO_DISABLE); + am_hal_gpio_pinconfig(AM_BSP_GPIO_IOM0_MISO, g_AM_HAL_GPIO_DISABLE); + am_hal_gpio_pinconfig(AM_BSP_GPIO_IOM0_MOSI, g_AM_HAL_GPIO_DISABLE); + am_hal_gpio_pinconfig(AM_BSP_GPIO_IOM0_CS, g_AM_HAL_GPIO_DISABLE); + break; + + case ((1 << 2) | AM_HAL_IOM_SPI_MODE): + am_hal_gpio_pinconfig(AM_BSP_GPIO_IOM1_SCK, g_AM_HAL_GPIO_DISABLE); + am_hal_gpio_pinconfig(AM_BSP_GPIO_IOM1_MISO, g_AM_HAL_GPIO_DISABLE); + am_hal_gpio_pinconfig(AM_BSP_GPIO_IOM1_MOSI, g_AM_HAL_GPIO_DISABLE); + am_hal_gpio_pinconfig(AM_BSP_GPIO_IOM1_CS, g_AM_HAL_GPIO_DISABLE); + break; + + case ((2 << 2) | AM_HAL_IOM_SPI_MODE): + am_hal_gpio_pinconfig(AM_BSP_GPIO_IOM2_SCK, g_AM_HAL_GPIO_DISABLE); + am_hal_gpio_pinconfig(AM_BSP_GPIO_IOM2_MISO, g_AM_HAL_GPIO_DISABLE); + am_hal_gpio_pinconfig(AM_BSP_GPIO_IOM2_MOSI, g_AM_HAL_GPIO_DISABLE); + am_hal_gpio_pinconfig(AM_BSP_GPIO_IOM2_CS, g_AM_HAL_GPIO_DISABLE); + break; + + case ((3 << 2) | AM_HAL_IOM_SPI_MODE): + am_hal_gpio_pinconfig(AM_BSP_GPIO_IOM3_SCK, g_AM_HAL_GPIO_DISABLE); + am_hal_gpio_pinconfig(AM_BSP_GPIO_IOM3_MISO, g_AM_HAL_GPIO_DISABLE); + am_hal_gpio_pinconfig(AM_BSP_GPIO_IOM3_MOSI, g_AM_HAL_GPIO_DISABLE); + am_hal_gpio_pinconfig(AM_BSP_GPIO_IOM3_CS, g_AM_HAL_GPIO_DISABLE); + break; + + case ((4 << 2) | AM_HAL_IOM_SPI_MODE): + am_hal_gpio_pinconfig(AM_BSP_GPIO_IOM4_SCK, g_AM_HAL_GPIO_DISABLE); + am_hal_gpio_pinconfig(AM_BSP_GPIO_IOM4_MISO, g_AM_HAL_GPIO_DISABLE); + am_hal_gpio_pinconfig(AM_BSP_GPIO_IOM4_MOSI, g_AM_HAL_GPIO_DISABLE); + am_hal_gpio_pinconfig(AM_BSP_GPIO_IOM4_CS, g_AM_HAL_GPIO_DISABLE); + break; + + case ((5 << 2) | AM_HAL_IOM_SPI_MODE): + am_hal_gpio_pinconfig(AM_BSP_GPIO_IOM5_SCK, g_AM_HAL_GPIO_DISABLE); + am_hal_gpio_pinconfig(AM_BSP_GPIO_IOM5_MISO, g_AM_HAL_GPIO_DISABLE); + am_hal_gpio_pinconfig(AM_BSP_GPIO_IOM5_MOSI, g_AM_HAL_GPIO_DISABLE); + am_hal_gpio_pinconfig(AM_BSP_GPIO_IOM5_CS, g_AM_HAL_GPIO_DISABLE); + break; + + case ((0 << 2) | AM_HAL_IOM_I2C_MODE): + am_hal_gpio_pinconfig(AM_BSP_GPIO_IOM0_SCL, g_AM_HAL_GPIO_DISABLE); + am_hal_gpio_pinconfig(AM_BSP_GPIO_IOM0_SDA, g_AM_HAL_GPIO_DISABLE); + break; + + case ((1 << 2) | AM_HAL_IOM_I2C_MODE): + am_hal_gpio_pinconfig(AM_BSP_GPIO_IOM1_SCL, g_AM_HAL_GPIO_DISABLE); + am_hal_gpio_pinconfig(AM_BSP_GPIO_IOM1_SDA, g_AM_HAL_GPIO_DISABLE); + break; + + case ((2 << 2) | AM_HAL_IOM_I2C_MODE): + am_hal_gpio_pinconfig(AM_BSP_GPIO_IOM2_SCL, g_AM_HAL_GPIO_DISABLE); + am_hal_gpio_pinconfig(AM_BSP_GPIO_IOM2_SDA, g_AM_HAL_GPIO_DISABLE); + break; + + case ((3 << 2) | AM_HAL_IOM_I2C_MODE): + am_hal_gpio_pinconfig(AM_BSP_GPIO_IOM3_SCL, g_AM_HAL_GPIO_DISABLE); + am_hal_gpio_pinconfig(AM_BSP_GPIO_IOM3_SDA, g_AM_HAL_GPIO_DISABLE); + break; + + case ((4 << 2) | AM_HAL_IOM_I2C_MODE): + am_hal_gpio_pinconfig(AM_BSP_GPIO_IOM4_SCL, g_AM_HAL_GPIO_DISABLE); + am_hal_gpio_pinconfig(AM_BSP_GPIO_IOM4_SDA, g_AM_HAL_GPIO_DISABLE); + break; + + case ((5 << 2) | AM_HAL_IOM_I2C_MODE): + am_hal_gpio_pinconfig(AM_BSP_GPIO_IOM5_SCL, g_AM_HAL_GPIO_DISABLE); + am_hal_gpio_pinconfig(AM_BSP_GPIO_IOM5_SDA, g_AM_HAL_GPIO_DISABLE); + break; + default: + break; + } +} // am_bsp_iom_pins_disable() + +//***************************************************************************** +// +//! @brief Set up the MSPI pins based on the external flash device type. +//! +//! This function configures up to 10-pins for MSPI serial, dual, quad, +//! dual-quad, and octal operation. +//! +//! @return None. +// +//***************************************************************************** +void +am_bsp_mspi_pins_enable(am_hal_mspi_device_e eMSPIDevice) +{ + switch ( eMSPIDevice ) + { + case AM_HAL_MSPI_FLASH_SERIAL_CE0: + am_hal_gpio_pinconfig(AM_BSP_GPIO_MSPI_CE0, g_AM_BSP_GPIO_MSPI_CE0); + am_hal_gpio_pinconfig(AM_BSP_GPIO_MSPI_D0, g_AM_BSP_GPIO_MSPI_D0); + am_hal_gpio_pinconfig(AM_BSP_GPIO_MSPI_D1, g_AM_BSP_GPIO_MSPI_D1); + am_hal_gpio_pinconfig(AM_BSP_GPIO_MSPI_SCK, g_AM_BSP_GPIO_MSPI_SCK); + break; + case AM_HAL_MSPI_FLASH_SERIAL_CE1: + am_hal_gpio_pinconfig(AM_BSP_GPIO_MSPI_CE1, g_AM_BSP_GPIO_MSPI_CE1); + am_hal_gpio_pinconfig(AM_BSP_GPIO_MSPI_D4, g_AM_BSP_GPIO_MSPI_D4); + am_hal_gpio_pinconfig(AM_BSP_GPIO_MSPI_D5, g_AM_BSP_GPIO_MSPI_D5); + am_hal_gpio_pinconfig(AM_BSP_GPIO_MSPI_SCK, g_AM_BSP_GPIO_MSPI_SCK); + break; + case AM_HAL_MSPI_FLASH_DUAL_CE0: + am_hal_gpio_pinconfig(AM_BSP_GPIO_MSPI_CE0, g_AM_BSP_GPIO_MSPI_CE0); + am_hal_gpio_pinconfig(AM_BSP_GPIO_MSPI_D0, g_AM_BSP_GPIO_MSPI_D0); + am_hal_gpio_pinconfig(AM_BSP_GPIO_MSPI_D1, g_AM_BSP_GPIO_MSPI_D1); + am_hal_gpio_pinconfig(AM_BSP_GPIO_MSPI_SCK, g_AM_BSP_GPIO_MSPI_SCK); + break; + case AM_HAL_MSPI_FLASH_DUAL_CE1: + am_hal_gpio_pinconfig(AM_BSP_GPIO_MSPI_CE1, g_AM_BSP_GPIO_MSPI_CE1); + am_hal_gpio_pinconfig(AM_BSP_GPIO_MSPI_D4, g_AM_BSP_GPIO_MSPI_D4); + am_hal_gpio_pinconfig(AM_BSP_GPIO_MSPI_D5, g_AM_BSP_GPIO_MSPI_D5); + am_hal_gpio_pinconfig(AM_BSP_GPIO_MSPI_SCK, g_AM_BSP_GPIO_MSPI_SCK); + break; + case AM_HAL_MSPI_FLASH_QUAD_CE0: + am_hal_gpio_pinconfig(AM_BSP_GPIO_MSPI_CE0, g_AM_BSP_GPIO_MSPI_CE0); + am_hal_gpio_pinconfig(AM_BSP_GPIO_MSPI_D0, g_AM_BSP_GPIO_MSPI_D0); + am_hal_gpio_pinconfig(AM_BSP_GPIO_MSPI_D1, g_AM_BSP_GPIO_MSPI_D1); + am_hal_gpio_pinconfig(AM_BSP_GPIO_MSPI_D2, g_AM_BSP_GPIO_MSPI_D2); + am_hal_gpio_pinconfig(AM_BSP_GPIO_MSPI_D3, g_AM_BSP_GPIO_MSPI_D3); + am_hal_gpio_pinconfig(AM_BSP_GPIO_MSPI_SCK, g_AM_BSP_GPIO_MSPI_SCK); + break; + case AM_HAL_MSPI_FLASH_QUAD_CE1: + am_hal_gpio_pinconfig(AM_BSP_GPIO_MSPI_CE1, g_AM_BSP_GPIO_MSPI_CE1); + am_hal_gpio_pinconfig(AM_BSP_GPIO_MSPI_D4, g_AM_BSP_GPIO_MSPI_D4); + am_hal_gpio_pinconfig(AM_BSP_GPIO_MSPI_D5, g_AM_BSP_GPIO_MSPI_D5); + am_hal_gpio_pinconfig(AM_BSP_GPIO_MSPI_D6, g_AM_BSP_GPIO_MSPI_D6); + am_hal_gpio_pinconfig(AM_BSP_GPIO_MSPI_D7, g_AM_BSP_GPIO_MSPI_D7); + am_hal_gpio_pinconfig(AM_BSP_GPIO_MSPI_SCK, g_AM_BSP_GPIO_MSPI_SCK); + break; + case AM_HAL_MSPI_FLASH_OCTAL_CE0: + am_hal_gpio_pinconfig(AM_BSP_GPIO_MSPI_CE0, g_AM_BSP_GPIO_MSPI_CE0); + am_hal_gpio_pinconfig(AM_BSP_GPIO_MSPI_D0, g_AM_BSP_GPIO_MSPI_D0); + am_hal_gpio_pinconfig(AM_BSP_GPIO_MSPI_D1, g_AM_BSP_GPIO_MSPI_D1); + am_hal_gpio_pinconfig(AM_BSP_GPIO_MSPI_D2, g_AM_BSP_GPIO_MSPI_D2); + am_hal_gpio_pinconfig(AM_BSP_GPIO_MSPI_D3, g_AM_BSP_GPIO_MSPI_D3); + am_hal_gpio_pinconfig(AM_BSP_GPIO_MSPI_D4, g_AM_BSP_GPIO_MSPI_D4); + am_hal_gpio_pinconfig(AM_BSP_GPIO_MSPI_D5, g_AM_BSP_GPIO_MSPI_D5); + am_hal_gpio_pinconfig(AM_BSP_GPIO_MSPI_D6, g_AM_BSP_GPIO_MSPI_D6); + am_hal_gpio_pinconfig(AM_BSP_GPIO_MSPI_D7, g_AM_BSP_GPIO_MSPI_D7); + am_hal_gpio_pinconfig(AM_BSP_GPIO_MSPI_SCK, g_AM_BSP_GPIO_MSPI_SCK); + break; + case AM_HAL_MSPI_FLASH_OCTAL_CE1: + am_hal_gpio_pinconfig(AM_BSP_GPIO_MSPI_CE1, g_AM_BSP_GPIO_MSPI_CE1); + am_hal_gpio_pinconfig(AM_BSP_GPIO_MSPI_D0, g_AM_BSP_GPIO_MSPI_D0); + am_hal_gpio_pinconfig(AM_BSP_GPIO_MSPI_D1, g_AM_BSP_GPIO_MSPI_D1); + am_hal_gpio_pinconfig(AM_BSP_GPIO_MSPI_D2, g_AM_BSP_GPIO_MSPI_D2); + am_hal_gpio_pinconfig(AM_BSP_GPIO_MSPI_D3, g_AM_BSP_GPIO_MSPI_D3); + am_hal_gpio_pinconfig(AM_BSP_GPIO_MSPI_D4, g_AM_BSP_GPIO_MSPI_D4); + am_hal_gpio_pinconfig(AM_BSP_GPIO_MSPI_D5, g_AM_BSP_GPIO_MSPI_D5); + am_hal_gpio_pinconfig(AM_BSP_GPIO_MSPI_D6, g_AM_BSP_GPIO_MSPI_D6); + am_hal_gpio_pinconfig(AM_BSP_GPIO_MSPI_D7, g_AM_BSP_GPIO_MSPI_D7); + am_hal_gpio_pinconfig(AM_BSP_GPIO_MSPI_SCK, g_AM_BSP_GPIO_MSPI_SCK); + break; + case AM_HAL_MSPI_FLASH_QUADPAIRED: + case AM_HAL_MSPI_FLASH_QUADPAIRED_SERIAL: + am_hal_gpio_pinconfig(AM_BSP_GPIO_MSPI_CE0, g_AM_BSP_GPIO_MSPI_CE0); + am_hal_gpio_pinconfig(AM_BSP_GPIO_MSPI_CE1, g_AM_BSP_GPIO_MSPI_CE1); + am_hal_gpio_pinconfig(AM_BSP_GPIO_MSPI_D0, g_AM_BSP_GPIO_MSPI_D0); + am_hal_gpio_pinconfig(AM_BSP_GPIO_MSPI_D1, g_AM_BSP_GPIO_MSPI_D1); + am_hal_gpio_pinconfig(AM_BSP_GPIO_MSPI_D2, g_AM_BSP_GPIO_MSPI_D2); + am_hal_gpio_pinconfig(AM_BSP_GPIO_MSPI_D3, g_AM_BSP_GPIO_MSPI_D3); + am_hal_gpio_pinconfig(AM_BSP_GPIO_MSPI_D4, g_AM_BSP_GPIO_MSPI_D4); + am_hal_gpio_pinconfig(AM_BSP_GPIO_MSPI_D5, g_AM_BSP_GPIO_MSPI_D5); + am_hal_gpio_pinconfig(AM_BSP_GPIO_MSPI_D6, g_AM_BSP_GPIO_MSPI_D6); + am_hal_gpio_pinconfig(AM_BSP_GPIO_MSPI_D7, g_AM_BSP_GPIO_MSPI_D7); + am_hal_gpio_pinconfig(AM_BSP_GPIO_MSPI_SCK, g_AM_BSP_GPIO_MSPI_SCK); + break; + } +} // am_bsp_mspi_pins_enable() + +//***************************************************************************** +// +//! @brief Disable the MSPI pins based on the external flash device type. +//! +//! This function configures up to 10-pins for MSPI serial, dual, quad, +//! dual-quad, and octal operation. +//! +//! @return None. +// +//***************************************************************************** +void +am_bsp_mspi_pins_disable(am_hal_mspi_device_e eMSPIDevice) +{ + switch ( eMSPIDevice ) + { + case AM_HAL_MSPI_FLASH_SERIAL_CE0: + am_hal_gpio_pinconfig(AM_BSP_GPIO_MSPI_CE0, g_AM_HAL_GPIO_DISABLE); + am_hal_gpio_pinconfig(AM_BSP_GPIO_MSPI_D0, g_AM_HAL_GPIO_DISABLE); + am_hal_gpio_pinconfig(AM_BSP_GPIO_MSPI_D1, g_AM_HAL_GPIO_DISABLE); + am_hal_gpio_pinconfig(AM_BSP_GPIO_MSPI_SCK, g_AM_HAL_GPIO_DISABLE); + break; + case AM_HAL_MSPI_FLASH_SERIAL_CE1: + am_hal_gpio_pinconfig(AM_BSP_GPIO_MSPI_CE1, g_AM_HAL_GPIO_DISABLE); + am_hal_gpio_pinconfig(AM_BSP_GPIO_MSPI_D4, g_AM_HAL_GPIO_DISABLE); + am_hal_gpio_pinconfig(AM_BSP_GPIO_MSPI_D5, g_AM_HAL_GPIO_DISABLE); + am_hal_gpio_pinconfig(AM_BSP_GPIO_MSPI_SCK, g_AM_HAL_GPIO_DISABLE); + break; + case AM_HAL_MSPI_FLASH_DUAL_CE0: + am_hal_gpio_pinconfig(AM_BSP_GPIO_MSPI_CE0, g_AM_HAL_GPIO_DISABLE); + am_hal_gpio_pinconfig(AM_BSP_GPIO_MSPI_D0, g_AM_HAL_GPIO_DISABLE); + am_hal_gpio_pinconfig(AM_BSP_GPIO_MSPI_D1, g_AM_HAL_GPIO_DISABLE); + am_hal_gpio_pinconfig(AM_BSP_GPIO_MSPI_SCK, g_AM_HAL_GPIO_DISABLE); + break; + case AM_HAL_MSPI_FLASH_DUAL_CE1: + am_hal_gpio_pinconfig(AM_BSP_GPIO_MSPI_CE1, g_AM_HAL_GPIO_DISABLE); + am_hal_gpio_pinconfig(AM_BSP_GPIO_MSPI_D4, g_AM_HAL_GPIO_DISABLE); + am_hal_gpio_pinconfig(AM_BSP_GPIO_MSPI_D5, g_AM_HAL_GPIO_DISABLE); + am_hal_gpio_pinconfig(AM_BSP_GPIO_MSPI_SCK, g_AM_HAL_GPIO_DISABLE); + break; + case AM_HAL_MSPI_FLASH_QUAD_CE0: + am_hal_gpio_pinconfig(AM_BSP_GPIO_MSPI_CE0, g_AM_HAL_GPIO_DISABLE); + am_hal_gpio_pinconfig(AM_BSP_GPIO_MSPI_D0, g_AM_HAL_GPIO_DISABLE); + am_hal_gpio_pinconfig(AM_BSP_GPIO_MSPI_D1, g_AM_HAL_GPIO_DISABLE); + am_hal_gpio_pinconfig(AM_BSP_GPIO_MSPI_D2, g_AM_HAL_GPIO_DISABLE); + am_hal_gpio_pinconfig(AM_BSP_GPIO_MSPI_D3, g_AM_HAL_GPIO_DISABLE); + am_hal_gpio_pinconfig(AM_BSP_GPIO_MSPI_SCK, g_AM_HAL_GPIO_DISABLE); + break; + case AM_HAL_MSPI_FLASH_QUAD_CE1: + am_hal_gpio_pinconfig(AM_BSP_GPIO_MSPI_CE1, g_AM_HAL_GPIO_DISABLE); + am_hal_gpio_pinconfig(AM_BSP_GPIO_MSPI_D4, g_AM_HAL_GPIO_DISABLE); + am_hal_gpio_pinconfig(AM_BSP_GPIO_MSPI_D5, g_AM_HAL_GPIO_DISABLE); + am_hal_gpio_pinconfig(AM_BSP_GPIO_MSPI_D6, g_AM_HAL_GPIO_DISABLE); + am_hal_gpio_pinconfig(AM_BSP_GPIO_MSPI_D7, g_AM_HAL_GPIO_DISABLE); + am_hal_gpio_pinconfig(AM_BSP_GPIO_MSPI_SCK, g_AM_HAL_GPIO_DISABLE); + break; + case AM_HAL_MSPI_FLASH_OCTAL_CE0: + am_hal_gpio_pinconfig(AM_BSP_GPIO_MSPI_CE0, g_AM_HAL_GPIO_DISABLE); + am_hal_gpio_pinconfig(AM_BSP_GPIO_MSPI_D0, g_AM_HAL_GPIO_DISABLE); + am_hal_gpio_pinconfig(AM_BSP_GPIO_MSPI_D1, g_AM_HAL_GPIO_DISABLE); + am_hal_gpio_pinconfig(AM_BSP_GPIO_MSPI_D2, g_AM_HAL_GPIO_DISABLE); + am_hal_gpio_pinconfig(AM_BSP_GPIO_MSPI_D3, g_AM_HAL_GPIO_DISABLE); + am_hal_gpio_pinconfig(AM_BSP_GPIO_MSPI_D4, g_AM_HAL_GPIO_DISABLE); + am_hal_gpio_pinconfig(AM_BSP_GPIO_MSPI_D5, g_AM_HAL_GPIO_DISABLE); + am_hal_gpio_pinconfig(AM_BSP_GPIO_MSPI_D6, g_AM_HAL_GPIO_DISABLE); + am_hal_gpio_pinconfig(AM_BSP_GPIO_MSPI_D7, g_AM_HAL_GPIO_DISABLE); + am_hal_gpio_pinconfig(AM_BSP_GPIO_MSPI_SCK, g_AM_HAL_GPIO_DISABLE); + break; + case AM_HAL_MSPI_FLASH_OCTAL_CE1: + am_hal_gpio_pinconfig(AM_BSP_GPIO_MSPI_CE1, g_AM_HAL_GPIO_DISABLE); + am_hal_gpio_pinconfig(AM_BSP_GPIO_MSPI_D0, g_AM_HAL_GPIO_DISABLE); + am_hal_gpio_pinconfig(AM_BSP_GPIO_MSPI_D1, g_AM_HAL_GPIO_DISABLE); + am_hal_gpio_pinconfig(AM_BSP_GPIO_MSPI_D2, g_AM_HAL_GPIO_DISABLE); + am_hal_gpio_pinconfig(AM_BSP_GPIO_MSPI_D3, g_AM_HAL_GPIO_DISABLE); + am_hal_gpio_pinconfig(AM_BSP_GPIO_MSPI_D4, g_AM_HAL_GPIO_DISABLE); + am_hal_gpio_pinconfig(AM_BSP_GPIO_MSPI_D5, g_AM_HAL_GPIO_DISABLE); + am_hal_gpio_pinconfig(AM_BSP_GPIO_MSPI_D6, g_AM_HAL_GPIO_DISABLE); + am_hal_gpio_pinconfig(AM_BSP_GPIO_MSPI_D7, g_AM_HAL_GPIO_DISABLE); + am_hal_gpio_pinconfig(AM_BSP_GPIO_MSPI_SCK, g_AM_HAL_GPIO_DISABLE); + break; + case AM_HAL_MSPI_FLASH_QUADPAIRED: + case AM_HAL_MSPI_FLASH_QUADPAIRED_SERIAL: + am_hal_gpio_pinconfig(AM_BSP_GPIO_MSPI_CE0, g_AM_HAL_GPIO_DISABLE); + am_hal_gpio_pinconfig(AM_BSP_GPIO_MSPI_CE1, g_AM_HAL_GPIO_DISABLE); + am_hal_gpio_pinconfig(AM_BSP_GPIO_MSPI_D0, g_AM_HAL_GPIO_DISABLE); + am_hal_gpio_pinconfig(AM_BSP_GPIO_MSPI_D1, g_AM_HAL_GPIO_DISABLE); + am_hal_gpio_pinconfig(AM_BSP_GPIO_MSPI_D2, g_AM_HAL_GPIO_DISABLE); + am_hal_gpio_pinconfig(AM_BSP_GPIO_MSPI_D3, g_AM_HAL_GPIO_DISABLE); + am_hal_gpio_pinconfig(AM_BSP_GPIO_MSPI_D4, g_AM_HAL_GPIO_DISABLE); + am_hal_gpio_pinconfig(AM_BSP_GPIO_MSPI_D5, g_AM_HAL_GPIO_DISABLE); + am_hal_gpio_pinconfig(AM_BSP_GPIO_MSPI_D6, g_AM_HAL_GPIO_DISABLE); + am_hal_gpio_pinconfig(AM_BSP_GPIO_MSPI_D7, g_AM_HAL_GPIO_DISABLE); + am_hal_gpio_pinconfig(AM_BSP_GPIO_MSPI_SCK, g_AM_HAL_GPIO_DISABLE); + break; + } +} // am_bsp_mspi_pins_disable() + +//***************************************************************************** +// +//! @brief Set up the IOS pins based on mode and module. +//! +//! @return None. +// +//***************************************************************************** +void am_bsp_ios_pins_enable(uint32_t ui32Module, uint32_t ui32IOSMode) +{ + uint32_t ui32Combined; + + // + // Validate parameters + // + if ( ui32Module >= AM_REG_IOSLAVE_NUM_MODULES ) + { + return; + } + + ui32Combined = ((ui32Module << 2) | ui32IOSMode); + + switch ( ui32Combined ) + { + case ((0 << 2) | AM_HAL_IOS_USE_SPI): + am_hal_gpio_pinconfig(AM_BSP_GPIO_IOS_SCK, g_AM_BSP_GPIO_IOS_SCK); + am_hal_gpio_pinconfig(AM_BSP_GPIO_IOS_MISO, g_AM_BSP_GPIO_IOS_MISO); + am_hal_gpio_pinconfig(AM_BSP_GPIO_IOS_MOSI, g_AM_BSP_GPIO_IOS_MOSI); + am_hal_gpio_pinconfig(AM_BSP_GPIO_IOS_CE, g_AM_BSP_GPIO_IOS_CE); + break; + + case ((0 << 2) | AM_HAL_IOS_USE_I2C): + am_hal_gpio_pinconfig(AM_BSP_GPIO_IOS_SCL, g_AM_BSP_GPIO_IOS_SCL); + am_hal_gpio_pinconfig(AM_BSP_GPIO_IOS_SDA, g_AM_BSP_GPIO_IOS_SDA); + break; + default: + break; + } +} // am_bsp_ios_pins_enable() + +//***************************************************************************** +// +//! @brief Disable the IOS pins based on mode and module. +//! +//! @return None. +// +//***************************************************************************** +void am_bsp_ios_pins_disable(uint32_t ui32Module, uint32_t ui32IOSMode) +{ + uint32_t ui32Combined; + + // + // Validate parameters + // + if ( ui32Module >= AM_REG_IOSLAVE_NUM_MODULES ) + { + return; + } + + ui32Combined = ((ui32Module << 2) | ui32IOSMode); + + switch ( ui32Combined ) + { + case ((0 << 2) | AM_HAL_IOS_USE_SPI): + am_hal_gpio_pinconfig(AM_BSP_GPIO_IOS_SCK, g_AM_HAL_GPIO_DISABLE); + am_hal_gpio_pinconfig(AM_BSP_GPIO_IOS_MISO, g_AM_HAL_GPIO_DISABLE); + am_hal_gpio_pinconfig(AM_BSP_GPIO_IOS_MOSI, g_AM_HAL_GPIO_DISABLE); + am_hal_gpio_pinconfig(AM_BSP_GPIO_IOS_CE, g_AM_HAL_GPIO_DISABLE); + break; + + case ((0 << 2) | AM_HAL_IOS_USE_I2C): + am_hal_gpio_pinconfig(AM_BSP_GPIO_IOS_SCL, g_AM_HAL_GPIO_DISABLE); + am_hal_gpio_pinconfig(AM_BSP_GPIO_IOS_SDA, g_AM_HAL_GPIO_DISABLE); + break; + default: + break; + } +} // am_bsp_ios_pins_disable() + +//***************************************************************************** +// +//! @brief UART-based string print function. +//! +//! This function is used for printing a string via the UART, which for some +//! MCU devices may be multi-module. +//! +//! @return None. +// +//***************************************************************************** +void +am_bsp_uart_string_print(char *pcString) +{ + uint32_t ui32StrLen = 0; + uint32_t ui32BytesWritten = 0; + + // + // Measure the length of the string. + // + while (pcString[ui32StrLen] != 0) + { + ui32StrLen++; + } + + // + // Print the string via the UART. + // + const am_hal_uart_transfer_t sUartWrite = + { + .ui32Direction = AM_HAL_UART_WRITE, + .pui8Data = (uint8_t *) pcString, + .ui32NumBytes = ui32StrLen, + .ui32TimeoutMs = AM_HAL_UART_WAIT_FOREVER, + .pui32BytesTransferred = &ui32BytesWritten, + }; + + am_hal_uart_transfer(g_sCOMUART, &sUartWrite); + + if (ui32BytesWritten != ui32StrLen) + { + // + // Couldn't send the whole string!! + // + while(1); + } +} // am_bsp_uart_string_print() + +//***************************************************************************** +// +// Pass-through function to let applications access the COM UART. +// +//***************************************************************************** +uint32_t +am_bsp_com_uart_transfer(const am_hal_uart_transfer_t *psTransfer) +{ + return am_hal_uart_transfer(g_sCOMUART, psTransfer); +} // am_bsp_com_uart_transfer() + +//***************************************************************************** +// +// Initialize and configure the UART +// +//***************************************************************************** +void +am_bsp_uart_printf_enable(void) +{ + // + // Save the information that we're using the UART for printing. + // + g_ui32PrintInterface = AM_BSP_PRINT_INFC_UART0; + + // + // Initialize, power up, and configure the communication UART. Use the + // custom configuration if it was provided. Otherwise, just use the default + // configuration. + // + am_hal_uart_initialize(AM_BSP_UART_PRINT_INST, &g_sCOMUART); + am_hal_uart_power_control(g_sCOMUART, AM_HAL_SYSCTRL_WAKE, false); + am_hal_uart_configure(g_sCOMUART, &g_sBspUartConfig); + + // + // Enable the UART pins. + // + am_hal_gpio_pinconfig(AM_BSP_GPIO_COM_UART_TX, g_AM_BSP_GPIO_COM_UART_TX); + am_hal_gpio_pinconfig(AM_BSP_GPIO_COM_UART_RX, g_AM_BSP_GPIO_COM_UART_RX); + + // + // Register the BSP print function to the STDIO driver. + // + am_util_stdio_printf_init(am_bsp_uart_string_print); +} // am_bsp_uart_printf_enable() + +//***************************************************************************** +// +// Initialize and configure the UART with a custom configuration +// +//***************************************************************************** +void +am_bsp_uart_printf_enable_custom(const am_hal_uart_config_t* p_config) +{ + // + // Save the information that we're using the UART for printing. + // + g_ui32PrintInterface = AM_BSP_PRINT_INFC_UART0; + + // + // Initialize, power up, and configure the communication UART. Use the + // custom configuration if it was provided. Otherwise, just use the default + // configuration. + // + am_hal_uart_initialize(AM_BSP_UART_PRINT_INST, &g_sCOMUART); + am_hal_uart_power_control(g_sCOMUART, AM_HAL_SYSCTRL_WAKE, false); + am_hal_uart_configure(g_sCOMUART, p_config); + + // + // Enable the UART pins. + // + am_hal_gpio_pinconfig(AM_BSP_GPIO_COM_UART_TX, g_AM_BSP_GPIO_COM_UART_TX); + am_hal_gpio_pinconfig(AM_BSP_GPIO_COM_UART_RX, g_AM_BSP_GPIO_COM_UART_RX); + + // + // Register the BSP print function to the STDIO driver. + // + am_util_stdio_printf_init(am_bsp_uart_string_print); +} // am_bsp_uart_printf_enable() + +//***************************************************************************** +// +// Disable the UART +// +//***************************************************************************** +void +am_bsp_uart_printf_disable(void) +{ + // + // Make sure the UART has finished sending everything it's going to send. + // + am_hal_uart_tx_flush(g_sCOMUART); + + // + // Detach the UART from the stdio driver. + // + am_util_stdio_printf_init(0); + + // + // Power down the UART, and surrender the handle. + // + am_hal_uart_power_control(g_sCOMUART, AM_HAL_SYSCTRL_DEEPSLEEP, false); + am_hal_uart_deinitialize(g_sCOMUART); + + // + // Disable the UART pins. + // + am_hal_gpio_pinconfig(AM_BSP_GPIO_COM_UART_TX, g_AM_HAL_GPIO_DISABLE); + am_hal_gpio_pinconfig(AM_BSP_GPIO_COM_UART_RX, g_AM_HAL_GPIO_DISABLE); + +} // am_bsp_uart_printf_disable() + +#ifndef AM_BSP_DISABLE_BUFFERED_UART +//***************************************************************************** +// +// Initialize and configure the UART +// +//***************************************************************************** +void +am_bsp_buffered_uart_printf_enable(void) +{ + // + // Save the information that we're using the UART for printing. + // + g_ui32PrintInterface = AM_BSP_PRINT_INFC_UART0; + + // + // Initialize, power up, and configure the communication UART. Use the + // custom configuration if it was provided. Otherwise, just use the default + // configuration. + // + am_hal_uart_initialize(AM_BSP_UART_PRINT_INST, &g_sCOMUART); + am_hal_uart_power_control(g_sCOMUART, AM_HAL_SYSCTRL_WAKE, false); + am_hal_uart_configure(g_sCOMUART, &g_sBspUartBufferedConfig); + + // + // Enable the UART pins. + // + am_hal_gpio_pinconfig(AM_BSP_GPIO_COM_UART_TX, g_AM_BSP_GPIO_COM_UART_TX); + am_hal_gpio_pinconfig(AM_BSP_GPIO_COM_UART_RX, g_AM_BSP_GPIO_COM_UART_RX); + + // + // Register the BSP print function to the STDIO driver. + // + am_util_stdio_printf_init(am_bsp_uart_string_print); + + // + // Enable the interrupts for the UART. + // + NVIC_EnableIRQ((IRQn_Type)(UART0_IRQn + AM_BSP_UART_PRINT_INST)); +} // am_bsp_buffered_uart_printf_enable() + +//***************************************************************************** +// +// Interrupt routine for the buffered UART interface. +// +//***************************************************************************** +void +am_bsp_buffered_uart_service(void) +{ + uint32_t ui32Status, ui32Idle; + am_hal_uart_interrupt_status_get(g_sCOMUART, &ui32Status, true); + am_hal_uart_interrupt_clear(g_sCOMUART, ui32Status); + am_hal_uart_interrupt_service(g_sCOMUART, ui32Status, &ui32Idle); +} // am_bsp_buffered_uart_service() +#endif // AM_BSP_DISABLE_BUFFERED_UART + + + +//***************************************************************************** +// +// End Doxygen group. +//! @} +// +//***************************************************************************** diff --git a/artemis_mm_pb/bsp/am_bsp.h b/artemis_mm_pb/bsp/am_bsp.h new file mode 100644 index 0000000..60c2156 --- /dev/null +++ b/artemis_mm_pb/bsp/am_bsp.h @@ -0,0 +1,232 @@ +//***************************************************************************** +// +// am_bsp.h +//! @file +//! +//! @brief Functions to aid with configuring the GPIOs. +//! +//! @addtogroup BSP Board Support Package (BSP) +//! @ingroup BSP +//! @{ +// +//***************************************************************************** + +#ifndef AM_BSP_H +#define AM_BSP_H + +#include +#include +#include "am_mcu_apollo.h" +#include "am_bsp_pins.h" + +// +// Make individual includes to not require full port before usage. +//#include "am_devices.h" +// +#include "am_devices_led.h" +#include "am_devices_button.h" + +#ifdef __cplusplus +extern "C" +{ +#endif + +//***************************************************************************** +// +// Begin User Modifiable Area +// +//***************************************************************************** + +//***************************************************************************** +// +// Primary I2C. +// +//***************************************************************************** +#define AM_BSP_PRIM_I2C_IOM 4 +#define AM_BSP_PRIM_I2C_SDA_PIN AM_BSP_GPIO_SDA +#define AM_BSP_PRIM_I2C_SCL_PIN AM_BSP_GPIO_SCL +#define g_AM_BSP_PRIM_I2C_SDA g_AM_BSP_GPIO_SDA +#define g_AM_BSP_PRIM_I2C_SCL g_AM_BSP_GPIO_SCL + +//***************************************************************************** +// +// Primary SPI Pins +// +//***************************************************************************** +#define AM_BSP_PRIM_SPI_IOM 4 +#define AM_BSP_PRIM_SPI_CLK_PIN AM_BSP_GPIO_SPI_SCK +#define AM_BSP_PRIM_SPI_SDO_PIN AM_BSP_GPIO_SPI_SDO +#define AM_BSP_PRIM_SPI_SDI_PIN AM_BSP_GPIO_SPI_SDI +#define g_AM_BSP_PRIM_SPI_CLK g_AM_BSP_GPIO_SPI_SCK +#define g_AM_BSP_PRIM_SPI_SDO g_AM_BSP_GPIO_SPI_SDO +#define g_AM_BSP_PRIM_SPI_SDI g_AM_BSP_GPIO_SPI_SDI + +//***************************************************************************** +// +// Primary UART Pins +// +//***************************************************************************** +#define AM_BSP_PRIM_UART_TX_PIN AM_BSP_GPIO_COM_UART_TX +#define AM_BSP_PRIM_UART_RX_PIN AM_BSP_GPIO_COM_UART_RX +#define g_AM_BSP_PRIM_UART_TX g_AM_BSP_GPIO_COM_UART_TX +#define g_AM_BSP_PRIM_UART_RX g_AM_BSP_GPIO_COM_UART_RX + +//***************************************************************************** +// +// LED definitions. +// +//***************************************************************************** +#define AM_BSP_NUM_LEDS 1 +extern am_devices_led_t am_bsp_psLEDs[AM_BSP_NUM_LEDS]; + +// LED Device Array Indices +#define AM_BSP_LED0 0 +#define AM_BSP_LED_BLUE AM_BSP_LED0 + +// Corresponding GPIO Numbers +#define AM_BSP_GPIO_LED0 AM_BSP_GPIO_LED_BLUE +#define AM_BSP_GPIO_LED23 AM_BSP_GPIO_LED_BLUE +#define AM_BSP_GPIO_LED_STAT AM_BSP_GPIO_LED_BLUE + +//***************************************************************************** +// +// PWM_LED peripheral assignments. +// +//***************************************************************************** +// +// The Artemis MM PB LED0 is pad 19 +// +#define AM_BSP_PIN_PWM_LED AM_BSP_GPIO_LED0 +#define AM_BSP_PWM_LED_TIMER 1 +#define AM_BSP_PWM_LED_TIMER_SEG AM_HAL_CTIMER_TIMERB +#define AM_BSP_PWM_LED_TIMER_INT AM_HAL_CTIMER_INT_TIMERB1C0 + +//***************************************************************************** +// +// UART definitions. +// +//***************************************************************************** +// +// Apollo3 has two UART instances. +// AM_BSP_UART_PRINT_INST should correspond to COM_UART. +// +#define AM_BSP_UART_IOS_INST 0 +#define AM_BSP_UART_PRINT_INST 0 +#define AM_BSP_UART_BOOTLOADER_INST 0 + +//***************************************************************************** +// +// Machine Learning Carrier Board Defs +// +//***************************************************************************** +#define AM_BSP_PDM_CHANNEL AM_HAL_PDM_CHANNEL_RIGHT +#define AM_BSP_PDM_DATA_PIN AM_BSP_GPIO_MIC_DATA +#define AM_BSP_PDM_CLOCK_PIN AM_BSP_GPIO_MIC_CLK +#define g_AM_BSP_PDM_DATA g_AM_BSP_GPIO_MIC_DATA +#define g_AM_BSP_PDM_CLOCK g_AM_BSP_GPIO_MIC_CLK + +#define AM_BSP_ACCELEROMETER_I2C_IOM AM_BSP_PRIM_I2C_IOM +#define AM_BSP_ACCELEROMETER_I2C_ADDRESS 0x19 +#define AM_BSP_ACCELEROMETER_I2C_SDA_PIN AM_BSP_PRIM_I2C_SDA_PIN +#define AM_BSP_ACCELEROMETER_I2C_SCL_PIN AM_BSP_PRIM_I2C_SCL_PIN +#define g_AM_BSP_ACCELEROMETER_I2C_SDA g_AM_BSP_PRIM_I2C_SDA +#define g_AM_BSP_ACCELEROMETER_I2C_SCL g_AM_BSP_PRIM_I2C_SCL + +#define AM_BSP_GPIO_CAMERA_HM01B0_DVDDEN AM_BSP_GPIO_PWM1 +#define AM_BSP_CAMERA_HM01B0_I2C_IOM AM_BSP_PRIM_I2C_IOM +#define AM_BSP_CAMERA_HM01B0_I2C_SCL_PIN AM_BSP_PRIM_I2C_SCL_PIN +#define AM_BSP_CAMERA_HM01B0_I2C_SDA_PIN AM_BSP_PRIM_I2C_SDA_PIN +#define AM_BSP_GPIO_CAMERA_HM01B0_D0 AM_BSP_GPIO_G0 +#define AM_BSP_GPIO_CAMERA_HM01B0_D1 AM_BSP_GPIO_G1 +#define AM_BSP_GPIO_CAMERA_HM01B0_D2 AM_BSP_GPIO_G2 +#define AM_BSP_GPIO_CAMERA_HM01B0_D3 AM_BSP_GPIO_G3 +#define AM_BSP_GPIO_CAMERA_HM01B0_D4 AM_BSP_GPIO_G4 +#define AM_BSP_GPIO_CAMERA_HM01B0_D5 AM_BSP_GPIO_G5 +#define AM_BSP_GPIO_CAMERA_HM01B0_D6 AM_BSP_GPIO_G6 +#define AM_BSP_GPIO_CAMERA_HM01B0_D7 AM_BSP_GPIO_G7 +#define AM_BSP_CAMERA_HM01B0_MCLK_GEN_MOD 1 +#define AM_BSP_CAMERA_HM01B0_MCLK_GEN_SEG AM_HAL_CTIMER_TIMERA +#define AM_BSP_CAMERA_HM01B0_MCLK_PIN AM_BSP_GPIO_AUD_OUT +#define AM_BSP_GPIO_CAMERA_HM01B0_VSYNC AM_BSP_GPIO_G10 +#define AM_BSP_GPIO_CAMERA_HM01B0_HSYNC AM_BSP_GPIO_G9 +#define AM_BSP_GPIO_CAMERA_HM01B0_PCLK AM_BSP_GPIO_AUD_IN +#define AM_BSP_GPIO_CAMERA_HM01B0_TRIG AM_BSP_GPIO_D1 +#define AM_BSP_GPIO_CAMERA_HM01B0_INT AM_BSP_GPIO_I2C_INT + +//***************************************************************************** +// +// End User Modifiable Area +// +//***************************************************************************** + +//***************************************************************************** +// +// Print interface type +// +//***************************************************************************** +#define AM_BSP_PRINT_INFC_NONE 0 +#define AM_BSP_PRINT_INFC_SWO 1 +#define AM_BSP_PRINT_INFC_UART0 2 +#define AM_BSP_PRINT_INFC_BUFFERED_UART0 3 + + +//***************************************************************************** +// +//! Structure containing UART configuration information while it is powered down. +// +//***************************************************************************** +typedef struct +{ + bool bSaved; + uint32_t ui32TxPinNum; + uint32_t ui32TxPinCfg; +} +am_bsp_uart_pwrsave_t; + +//***************************************************************************** +// +// External data definitions. +// +//***************************************************************************** +extern am_bsp_uart_pwrsave_t am_bsp_uart_pwrsave[AM_REG_UART_NUM_MODULES]; + +//***************************************************************************** +// +// External function definitions. +// +//***************************************************************************** +extern void am_bsp_low_power_init(void); +extern void am_bsp_iom_pins_enable(uint32_t ui32Module, am_hal_iom_mode_e eIOMMode); +extern void am_bsp_iom_pins_disable(uint32_t ui32Module, am_hal_iom_mode_e eIOMMode); +extern void am_bsp_mspi_pins_enable(am_hal_mspi_device_e eMSPIDevice); +extern void am_bsp_mspi_pins_disable(am_hal_mspi_device_e eMSPIDevice); + +extern void am_bsp_ios_pins_enable(uint32_t ui32Module, uint32_t ui32IOSMode); // SparkFun Edge does not expose IO Slave Clock signal, so hiding these functions +extern void am_bsp_ios_pins_disable(uint32_t ui32Module, uint32_t ui32IOSMode); + +extern void am_bsp_debug_printf_enable(void); +extern void am_bsp_debug_printf_disable(void); + +#ifdef AM_BSP_GPIO_ITM_SWO +extern void am_bsp_itm_printf_enable(void); +#else +extern void am_bsp_itm_printf_enable(uint32_t ui32Pin, am_hal_gpio_pincfg_t sPincfg); +#endif +extern void am_bsp_itm_string_print(char *pcString); +extern void am_bsp_itm_printf_disable(void); + +extern void am_bsp_uart_string_print(char *pcString); +extern void am_bsp_uart_printf_enable(void); +extern void am_bsp_uart_printf_enable_custom(const am_hal_uart_config_t* p_config); +extern void am_bsp_uart_printf_disable(void); + +extern void am_bsp_buffered_uart_printf_enable(void); +extern void am_bsp_buffered_uart_service(void); + +extern uint32_t am_bsp_com_uart_transfer(const am_hal_uart_transfer_t *psTransfer); + +#ifdef __cplusplus +} +#endif + +#endif // AM_BSP_H diff --git a/artemis_mm_pb/bsp/am_bsp_pins.c b/artemis_mm_pb/bsp/am_bsp_pins.c new file mode 100644 index 0000000..06eae03 --- /dev/null +++ b/artemis_mm_pb/bsp/am_bsp_pins.c @@ -0,0 +1,1390 @@ +//***************************************************************************** +// +// am_bsp_pins.c +//! @file +//! +//! @brief BSP pin configuration definitions. +//! +//! @addtogroup BSP Board Support Package (BSP) +//! @addtogroup apollo3_evb_bsp BSP for the Apollo3 Engineering Board +//! @ingroup BSP +//! @{ +// +//***************************************************************************** + +//***************************************************************************** +// +// Copyright (c) 2019, Ambiq Micro +// All rights reserved. +// +// Redistribution and use in source and binary forms, with or without +// modification, are permitted provided that the following conditions are met: +// +// 1. Redistributions of source code must retain the above copyright notice, +// this list of conditions and the following disclaimer. +// +// 2. Redistributions in binary form must reproduce the above copyright +// notice, this list of conditions and the following disclaimer in the +// documentation and/or other materials provided with the distribution. +// +// 3. Neither the name of the copyright holder nor the names of its +// contributors may be used to endorse or promote products derived from this +// software without specific prior written permission. +// +// Third party software included in this distribution is subject to the +// additional license terms as defined in the /docs/licenses directory. +// +// THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" +// AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE +// IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE +// ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE +// LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR +// CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF +// SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS +// INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN +// CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) +// ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE +// POSSIBILITY OF SUCH DAMAGE. +// +// This is part of revision 2.2.0-hotfix-2.2.1 of the AmbiqSuite Development Package. +// +//***************************************************************************** + +#include "am_bsp.h" + +//***************************************************************************** +// +// AUD_MCLK pin. +// +//***************************************************************************** +const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_AUD_MCLK = +{ + .uFuncSel = AM_HAL_PIN_18_GPIO, + .eDriveStrength = AM_HAL_GPIO_PIN_DRIVESTRENGTH_2MA, + .eGPInput = AM_HAL_GPIO_PIN_INPUT_NONE +}; + +//***************************************************************************** +// +// AUD_OUT pin. +// +//***************************************************************************** +const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_AUD_OUT = +{ + .uFuncSel = AM_HAL_PIN_18_GPIO, + .eDriveStrength = AM_HAL_GPIO_PIN_DRIVESTRENGTH_2MA, + .eGPInput = AM_HAL_GPIO_PIN_INPUT_NONE +}; + +//***************************************************************************** +// +// AUD_IN pin. +// +//***************************************************************************** +const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_AUD_IN = +{ + .uFuncSel = AM_HAL_PIN_11_GPIO, + .eDriveStrength = AM_HAL_GPIO_PIN_DRIVESTRENGTH_2MA, + .eGPInput = AM_HAL_GPIO_PIN_INPUT_ENABLE +}; + +//***************************************************************************** +// +// AUD_LRCLK pin. +// +//***************************************************************************** +const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_AUD_LRCLK = +{ + .uFuncSel = AM_HAL_PIN_36_GPIO +}; + +//***************************************************************************** +// +// AUD_BCLK pin. +// +//***************************************************************************** +const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_AUD_BCLK = +{ + .uFuncSel = AM_HAL_PIN_37_GPIO +}; + +//***************************************************************************** +// +// SCL pin: I/O Master 4 I2C clock signal. +// +//***************************************************************************** +const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_SCL = +{ + .uFuncSel = AM_HAL_PIN_39_M4SCL, + .ePullup = AM_HAL_GPIO_PIN_PULLUP_1_5K, + .eDriveStrength = AM_HAL_GPIO_PIN_DRIVESTRENGTH_12MA, + .eGPOutcfg = AM_HAL_GPIO_PIN_OUTCFG_OPENDRAIN, + .uIOMnum = 4 +}; + +//***************************************************************************** +// +// SDA pin: I/O Master 4 I2C data signal. +// +//***************************************************************************** +const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_SDA = +{ + .uFuncSel = AM_HAL_PIN_40_M4SDAWIR3, + .ePullup = AM_HAL_GPIO_PIN_PULLUP_1_5K, + .eDriveStrength = AM_HAL_GPIO_PIN_DRIVESTRENGTH_12MA, + .eGPOutcfg = AM_HAL_GPIO_PIN_OUTCFG_OPENDRAIN, + .uIOMnum = 4 +}; + +//***************************************************************************** +// +// I2C_INT pin. +// +//***************************************************************************** +const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_I2C_INT = +{ + .uFuncSel = AM_HAL_PIN_2_GPIO, + .eDriveStrength = AM_HAL_GPIO_PIN_DRIVESTRENGTH_2MA, + .eGPInput = AM_HAL_GPIO_PIN_INPUT_ENABLE +}; + +//***************************************************************************** +// +// SCL1 pin: I/O Master 1 I2C clock signal. +// +//***************************************************************************** +const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_SCL1 = +{ + .uFuncSel = AM_HAL_PIN_8_M1SCL, + .ePullup = AM_HAL_GPIO_PIN_PULLUP_1_5K, + .eDriveStrength = AM_HAL_GPIO_PIN_DRIVESTRENGTH_12MA, + .eGPOutcfg = AM_HAL_GPIO_PIN_OUTCFG_OPENDRAIN, + .uIOMnum = 1 +}; + +//***************************************************************************** +// +// SDA1 pin: I/O Master 1 I2C data signal. +// +//***************************************************************************** +const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_SDA1 = +{ + .uFuncSel = AM_HAL_PIN_9_M1SDAWIR3, + .ePullup = AM_HAL_GPIO_PIN_PULLUP_1_5K, + .eDriveStrength = AM_HAL_GPIO_PIN_DRIVESTRENGTH_12MA, + .eGPOutcfg = AM_HAL_GPIO_PIN_OUTCFG_OPENDRAIN, + .uIOMnum = 1 +}; + +//***************************************************************************** +// +// BATT_VIN pin. +// +//***************************************************************************** +const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_BATT_VIN = +{ + .uFuncSel = AM_HAL_PIN_31_GPIO, + .eDriveStrength = AM_HAL_GPIO_PIN_DRIVESTRENGTH_2MA, + .eGPInput = AM_HAL_GPIO_PIN_INPUT_ENABLE +}; + +//***************************************************************************** +// +// SDIO_CLK pin: I/O Master 0 SPI SCK signal. +// +//***************************************************************************** +const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_SDIO_CLK = +{ + .uFuncSel = AM_HAL_PIN_5_M0SCK, + .eDriveStrength = AM_HAL_GPIO_PIN_DRIVESTRENGTH_12MA, + .uIOMnum = 0 +}; + +//***************************************************************************** +// +// SDIO_CMD pin: I/O Master 0 SPI SDO signal. +// +//***************************************************************************** +const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_SDIO_CMD = +{ + .uFuncSel = AM_HAL_PIN_7_M0MOSI, + .eDriveStrength = AM_HAL_GPIO_PIN_DRIVESTRENGTH_12MA, + .uIOMnum = 0 +}; + +//***************************************************************************** +// +// SDIO_DATA0 pin: I/O Master 0 SPI SDI signal. +// +//***************************************************************************** +const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_SDIO_DATA0 = +{ + .uFuncSel = AM_HAL_PIN_6_M0MISO, + .uIOMnum = 0 +}; + +//***************************************************************************** +// +// SDIO_DATA1 pin: QSPI data1 signal. +// +//***************************************************************************** +const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_SDIO_DATA1 = +{ + .uFuncSel = AM_HAL_PIN_26_MSPI1 +}; + +//***************************************************************************** +// +// SDIO_DATA2 pin: QSPI data2 signal. +// +//***************************************************************************** +const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_SDIO_DATA2 = +{ + .uFuncSel = AM_HAL_PIN_4_MSPI2 +}; + +//***************************************************************************** +// +// SDIO_DATA3 pin: QSPI data3 signal. +// +//***************************************************************************** +const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_SDIO_DATA3 = +{ + .uFuncSel = AM_HAL_PIN_23_MSPI3 +}; + +//***************************************************************************** +// +// SPI_SDI pin: I/O Master 3 SPI SDI signal. +// +//***************************************************************************** +const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_SPI_SDI = +{ + .uFuncSel = AM_HAL_PIN_43_M3MISO, + .uIOMnum = 3 +}; + +//***************************************************************************** +// +// SPI_SDO pin: I/O Master 3 SPI SDO signal. +// +//***************************************************************************** +const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_SPI_SDO = +{ + .uFuncSel = AM_HAL_PIN_38_M3MOSI, + .eDriveStrength = AM_HAL_GPIO_PIN_DRIVESTRENGTH_12MA, + .uIOMnum = 3 +}; + +//***************************************************************************** +// +// SPI_SCK pin: I/O Master 3 SPI SCK signal. +// +//***************************************************************************** +const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_SPI_SCK = +{ + .uFuncSel = AM_HAL_PIN_42_M3SCK, + .eDriveStrength = AM_HAL_GPIO_PIN_DRIVESTRENGTH_12MA, + .uIOMnum = 3 +}; + +//***************************************************************************** +// +// SPI_CS pin: SPI CS signal. +// +//***************************************************************************** +const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_SPI_CS = +{ + .uFuncSel = AM_HAL_PIN_41_NCE41, + .uIOMnum = 3, + .uNCE = 0, + .eCEpol = AM_HAL_GPIO_PIN_CEPOL_ACTIVELOW +}; + +//***************************************************************************** +// +// SPI_SDI1 pin: I/O Master 0 SPI SDI signal. +// +//***************************************************************************** +const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_SPI_SDI1 = +{ + .uFuncSel = AM_HAL_PIN_6_M0MISO, + .uIOMnum = 0 +}; + +//***************************************************************************** +// +// SPI_SDO1 pin: I/O Master 0 SPI SDO signal. +// +//***************************************************************************** +const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_SPI_SDO1 = +{ + .uFuncSel = AM_HAL_PIN_7_M0MOSI, + .eDriveStrength = AM_HAL_GPIO_PIN_DRIVESTRENGTH_12MA, + .uIOMnum = 0 +}; + +//***************************************************************************** +// +// SPI_SCK1 pin: I/O Master 0 SPI SCK signal. +// +//***************************************************************************** +const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_SPI_SCK1 = +{ + .uFuncSel = AM_HAL_PIN_5_M0SCK, + .eDriveStrength = AM_HAL_GPIO_PIN_DRIVESTRENGTH_12MA, + .uIOMnum = 0 +}; + +//***************************************************************************** +// +// SPI_CS1 pin: SPI1 CS signal. +// +//***************************************************************************** +const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_SPI_CS1 = +{ + .uFuncSel = AM_HAL_PIN_23_NCE23, + .uIOMnum = 0, + .uNCE = 0, + .eCEpol = AM_HAL_GPIO_PIN_CEPOL_ACTIVELOW +}; + +//***************************************************************************** +// +// A0 pin. +// +//***************************************************************************** +const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_A0 = +{ + .uFuncSel = AM_HAL_PIN_32_GPIO, + .eDriveStrength = AM_HAL_GPIO_PIN_DRIVESTRENGTH_2MA, + .eGPInput = AM_HAL_GPIO_PIN_INPUT_ENABLE +}; + +//***************************************************************************** +// +// A1 pin. +// +//***************************************************************************** +const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_A1 = +{ + .uFuncSel = AM_HAL_PIN_35_GPIO, + .eDriveStrength = AM_HAL_GPIO_PIN_DRIVESTRENGTH_2MA, + .eGPInput = AM_HAL_GPIO_PIN_INPUT_ENABLE +}; + +//***************************************************************************** +// +// PWM0 pin. +// +//***************************************************************************** +const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_PWM0 = +{ + .uFuncSel = AM_HAL_PIN_44_CTIM20, + .eDriveStrength = AM_HAL_GPIO_PIN_DRIVESTRENGTH_2MA, + .eGPInput = AM_HAL_GPIO_PIN_INPUT_NONE +}; + +//***************************************************************************** +// +// PWM1 pin. +// +//***************************************************************************** +const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_PWM1 = +{ + .uFuncSel = AM_HAL_PIN_45_CTIM22, + .eDriveStrength = AM_HAL_GPIO_PIN_DRIVESTRENGTH_2MA, + .eGPInput = AM_HAL_GPIO_PIN_INPUT_NONE +}; + +//***************************************************************************** +// +// D0 pin. +// +//***************************************************************************** +const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_D0 = +{ + .uFuncSel = AM_HAL_PIN_0_GPIO, + .eDriveStrength = AM_HAL_GPIO_PIN_DRIVESTRENGTH_12MA, + .eGPInput = AM_HAL_GPIO_PIN_INPUT_NONE +}; + +//***************************************************************************** +// +// D1 pin. +// +//***************************************************************************** +const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_D1 = +{ + .uFuncSel = AM_HAL_PIN_1_GPIO, + .eDriveStrength = AM_HAL_GPIO_PIN_DRIVESTRENGTH_12MA, + .eGPInput = AM_HAL_GPIO_PIN_INPUT_NONE +}; + +//***************************************************************************** +// +// TX1 pin: This pin is the UART1 transmit pin. +// +//***************************************************************************** +const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_TX1 = +{ + .uFuncSel = AM_HAL_PIN_12_UART1TX, + .eDriveStrength = AM_HAL_GPIO_PIN_DRIVESTRENGTH_2MA +}; + +//***************************************************************************** +// +// RX1 pin: This pin is the UART1 receive pin. +// +//***************************************************************************** +const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_RX1 = +{ + .uFuncSel = AM_HAL_PIN_25_UART1RX +}; + +//***************************************************************************** +// +// RTS1 pin: This pin is the UART1 rts pin. +// +//***************************************************************************** +const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_RTS1 = +{ + .uFuncSel = AM_HAL_PIN_10_UART1RTS +}; + +//***************************************************************************** +// +// CTS1 pin: This pin is the UART1 cts pin. +// +//***************************************************************************** +const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_CTS1 = +{ + .uFuncSel = AM_HAL_PIN_17_UART1CTS +}; + +//***************************************************************************** +// +// G0 pin. +// +//***************************************************************************** +const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_G0 = +{ + .uFuncSel = AM_HAL_PIN_16_GPIO, + .eDriveStrength = AM_HAL_GPIO_PIN_DRIVESTRENGTH_12MA, + .eGPInput = AM_HAL_GPIO_PIN_INPUT_ENABLE +}; + +//***************************************************************************** +// +// G1 pin. +// +//***************************************************************************** +const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_G1 = +{ + .uFuncSel = AM_HAL_PIN_33_GPIO, + .eDriveStrength = AM_HAL_GPIO_PIN_DRIVESTRENGTH_12MA, + .eGPInput = AM_HAL_GPIO_PIN_INPUT_ENABLE +}; + +//***************************************************************************** +// +// G2 pin. +// +//***************************************************************************** +const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_G2 = +{ + .uFuncSel = AM_HAL_PIN_34_GPIO, + .eDriveStrength = AM_HAL_GPIO_PIN_DRIVESTRENGTH_12MA, + .eGPInput = AM_HAL_GPIO_PIN_INPUT_ENABLE +}; + +//***************************************************************************** +// +// G3 pin. +// +//***************************************************************************** +const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_G3 = +{ + .uFuncSel = AM_HAL_PIN_27_GPIO, + .eDriveStrength = AM_HAL_GPIO_PIN_DRIVESTRENGTH_12MA, + .eGPInput = AM_HAL_GPIO_PIN_INPUT_ENABLE +}; + +//***************************************************************************** +// +// G4 pin. +// +//***************************************************************************** +const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_G4 = +{ + .uFuncSel = AM_HAL_PIN_28_GPIO, + .eDriveStrength = AM_HAL_GPIO_PIN_DRIVESTRENGTH_12MA, + .eGPInput = AM_HAL_GPIO_PIN_INPUT_ENABLE +}; + +//***************************************************************************** +// +// G5 pin. +// +//***************************************************************************** +const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_G5 = +{ + .uFuncSel = AM_HAL_PIN_29_GPIO, + .eDriveStrength = AM_HAL_GPIO_PIN_DRIVESTRENGTH_12MA, + .eGPInput = AM_HAL_GPIO_PIN_INPUT_ENABLE +}; + +//***************************************************************************** +// +// G6 pin. +// +//***************************************************************************** +const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_G6 = +{ + .uFuncSel = AM_HAL_PIN_14_GPIO, + .eDriveStrength = AM_HAL_GPIO_PIN_DRIVESTRENGTH_12MA, + .eGPInput = AM_HAL_GPIO_PIN_INPUT_ENABLE +}; + +//***************************************************************************** +// +// G7 pin. +// +//***************************************************************************** +const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_G7 = +{ + .uFuncSel = AM_HAL_PIN_15_GPIO, + .eDriveStrength = AM_HAL_GPIO_PIN_DRIVESTRENGTH_12MA, + .eGPInput = AM_HAL_GPIO_PIN_INPUT_ENABLE +}; + +//***************************************************************************** +// +// G9 pin. +// +//***************************************************************************** +const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_G9 = +{ + .uFuncSel = AM_HAL_PIN_12_GPIO, + .eDriveStrength = AM_HAL_GPIO_PIN_DRIVESTRENGTH_12MA, + .eGPInput = AM_HAL_GPIO_PIN_INPUT_ENABLE +}; + +//***************************************************************************** +// +// G10 pin. +// +//***************************************************************************** +const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_G10 = +{ + .uFuncSel = AM_HAL_PIN_13_GPIO, + .eDriveStrength = AM_HAL_GPIO_PIN_DRIVESTRENGTH_12MA, + .eGPInput = AM_HAL_GPIO_PIN_INPUT_ENABLE +}; + +//***************************************************************************** +// +// MIC_DATA pin: Data line for PDM microphones. +// +//***************************************************************************** +const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_MIC_DATA = +{ + .uFuncSel = AM_HAL_PIN_36_PDMDATA +}; + +//***************************************************************************** +// +// MIC_CLK pin: Clock line for PDM microphones. +// +//***************************************************************************** +const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_MIC_CLK = +{ + .uFuncSel = AM_HAL_PIN_37_PDMCLK +}; + +//***************************************************************************** +// +// LED_BLUE pin: The BLUE LED labeled STAT. +// +//***************************************************************************** +const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_LED_BLUE = +{ + .uFuncSel = AM_HAL_PIN_19_GPIO, + .eDriveStrength = AM_HAL_GPIO_PIN_DRIVESTRENGTH_12MA +}; + +//***************************************************************************** +// +// COM_UART_TX pin: This pin is the COM_UART transmit pin. +// +//***************************************************************************** +const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_COM_UART_TX = +{ + .uFuncSel = AM_HAL_PIN_48_UART0TX, + .eDriveStrength = AM_HAL_GPIO_PIN_DRIVESTRENGTH_2MA +}; + +//***************************************************************************** +// +// COM_UART_RX pin: This pin is the COM_UART receive pin. +// +//***************************************************************************** +const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_COM_UART_RX = +{ + .uFuncSel = AM_HAL_PIN_49_UART0RX +}; + +//***************************************************************************** +// +// IOM0_CS pin: I/O Master 0 chip select. +// +//***************************************************************************** +const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_IOM0_CS = +{ + .uFuncSel = AM_HAL_PIN_11_NCE11, + .eDriveStrength = AM_HAL_GPIO_PIN_DRIVESTRENGTH_12MA, + .eGPOutcfg = AM_HAL_GPIO_PIN_OUTCFG_PUSHPULL, + .eGPInput = AM_HAL_GPIO_PIN_INPUT_NONE, + .eIntDir = AM_HAL_GPIO_PIN_INTDIR_LO2HI, + .uIOMnum = 0, + .uNCE = 0, + .eCEpol = AM_HAL_GPIO_PIN_CEPOL_ACTIVELOW +}; + +//***************************************************************************** +// +// IOM0_CS3 pin: I/O Master 0 chip select. +// +//***************************************************************************** +const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_IOM0_CS3 = +{ + .uFuncSel = AM_HAL_PIN_15_NCE15, + .eDriveStrength = AM_HAL_GPIO_PIN_DRIVESTRENGTH_12MA, + .eGPOutcfg = AM_HAL_GPIO_PIN_OUTCFG_PUSHPULL, + .eGPInput = AM_HAL_GPIO_PIN_INPUT_NONE, + .eIntDir = AM_HAL_GPIO_PIN_INTDIR_LO2HI, + .uIOMnum = 0, + .uNCE = 3, + .eCEpol = AM_HAL_GPIO_PIN_CEPOL_ACTIVELOW +}; + +//***************************************************************************** +// +// IOM0_MISO pin: I/O Master 0 SPI MISO signal. +// +//***************************************************************************** +const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_IOM0_MISO = +{ + .uFuncSel = AM_HAL_PIN_6_M0MISO, + .uIOMnum = 0 +}; + +//***************************************************************************** +// +// IOM0_MOSI pin: I/O Master 0 SPI MOSI signal. +// +//***************************************************************************** +const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_IOM0_MOSI = +{ + .uFuncSel = AM_HAL_PIN_7_M0MOSI, + .eDriveStrength = AM_HAL_GPIO_PIN_DRIVESTRENGTH_12MA, + .uIOMnum = 0 +}; + +//***************************************************************************** +// +// IOM0_SCK pin: I/O Master 0 SPI SCK signal. +// +//***************************************************************************** +const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_IOM0_SCK = +{ + .uFuncSel = AM_HAL_PIN_5_M0SCK, + .eDriveStrength = AM_HAL_GPIO_PIN_DRIVESTRENGTH_12MA, + .uIOMnum = 0 +}; + +//***************************************************************************** +// +// IOM0_SCL pin: I/O Master 0 I2C clock signal. +// +//***************************************************************************** +const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_IOM0_SCL = +{ + .uFuncSel = AM_HAL_PIN_5_M0SCL, + .ePullup = AM_HAL_GPIO_PIN_PULLUP_1_5K, + .eDriveStrength = AM_HAL_GPIO_PIN_DRIVESTRENGTH_12MA, + .eGPOutcfg = AM_HAL_GPIO_PIN_OUTCFG_OPENDRAIN, + .uIOMnum = 0 +}; + +//***************************************************************************** +// +// IOM0_SDA pin: I/O Master 0 I2C data signal. +// +//***************************************************************************** +const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_IOM0_SDA = +{ + .uFuncSel = AM_HAL_PIN_6_M0SDAWIR3, + .ePullup = AM_HAL_GPIO_PIN_PULLUP_1_5K, + .eDriveStrength = AM_HAL_GPIO_PIN_DRIVESTRENGTH_12MA, + .eGPOutcfg = AM_HAL_GPIO_PIN_OUTCFG_OPENDRAIN, + .uIOMnum = 0 +}; + +//***************************************************************************** +// +// IOM1_CS pin: I/O Master 1 chip select. +// +//***************************************************************************** +const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_IOM1_CS = +{ + .uFuncSel = AM_HAL_PIN_14_NCE14, + .eDriveStrength = AM_HAL_GPIO_PIN_DRIVESTRENGTH_12MA, + .eGPOutcfg = AM_HAL_GPIO_PIN_OUTCFG_PUSHPULL, + .eGPInput = AM_HAL_GPIO_PIN_INPUT_NONE, + .eIntDir = AM_HAL_GPIO_PIN_INTDIR_LO2HI, + .uIOMnum = 1, + .uNCE = 2, + .eCEpol = AM_HAL_GPIO_PIN_CEPOL_ACTIVELOW +}; + +//***************************************************************************** +// +// IOM1_MISO pin: I/O Master 1 SPI MISO signal. +// +//***************************************************************************** +const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_IOM1_MISO = +{ + .uFuncSel = AM_HAL_PIN_9_M1MISO, + .uIOMnum = 1 +}; + +//***************************************************************************** +// +// IOM1_MOSI pin: I/O Master 1 SPI MOSI signal. +// +//***************************************************************************** +const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_IOM1_MOSI = +{ + .uFuncSel = AM_HAL_PIN_10_M1MOSI, + .eDriveStrength = AM_HAL_GPIO_PIN_DRIVESTRENGTH_12MA, + .uIOMnum = 1 +}; + +//***************************************************************************** +// +// IOM1_SCK pin: I/O Master 1 SPI SCK signal. +// +//***************************************************************************** +const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_IOM1_SCK = +{ + .uFuncSel = AM_HAL_PIN_8_M1SCK, + .eDriveStrength = AM_HAL_GPIO_PIN_DRIVESTRENGTH_12MA, + .uIOMnum = 1 +}; + +//***************************************************************************** +// +// IOM1_SCL pin: I/O Master 1 I2C clock signal. +// +//***************************************************************************** +const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_IOM1_SCL = +{ + .uFuncSel = AM_HAL_PIN_8_M1SCL, + .ePullup = AM_HAL_GPIO_PIN_PULLUP_1_5K, + .eDriveStrength = AM_HAL_GPIO_PIN_DRIVESTRENGTH_12MA, + .eGPOutcfg = AM_HAL_GPIO_PIN_OUTCFG_OPENDRAIN, + .uIOMnum = 1 +}; + +//***************************************************************************** +// +// IOM1_SDA pin: I/O Master 1 I2C data signal. +// +//***************************************************************************** +const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_IOM1_SDA = +{ + .uFuncSel = AM_HAL_PIN_9_M1SDAWIR3, + .ePullup = AM_HAL_GPIO_PIN_PULLUP_1_5K, + .eDriveStrength = AM_HAL_GPIO_PIN_DRIVESTRENGTH_12MA, + .eGPOutcfg = AM_HAL_GPIO_PIN_OUTCFG_OPENDRAIN, + .uIOMnum = 1 +}; + +//***************************************************************************** +// +// IOM2_CS pin: I/O Master 2 chip select. +// +//***************************************************************************** +const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_IOM2_CS = +{ + .uFuncSel = AM_HAL_PIN_15_NCE15, + .eDriveStrength = AM_HAL_GPIO_PIN_DRIVESTRENGTH_12MA, + .eGPOutcfg = AM_HAL_GPIO_PIN_OUTCFG_PUSHPULL, + .eGPInput = AM_HAL_GPIO_PIN_INPUT_NONE, + .eIntDir = AM_HAL_GPIO_PIN_INTDIR_LO2HI, + .uIOMnum = 2, + .uNCE = 3, + .eCEpol = AM_HAL_GPIO_PIN_CEPOL_ACTIVELOW +}; + +//***************************************************************************** +// +// IOM2_MISO pin: I/O Master 2 SPI MISO signal. +// +//***************************************************************************** +const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_IOM2_MISO = +{ + .uFuncSel = AM_HAL_PIN_25_M2MISO, + .uIOMnum = 2 +}; + +//***************************************************************************** +// +// IOM2_MOSI pin: I/O Master 2 SPI MOSI signal. +// +//***************************************************************************** +const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_IOM2_MOSI = +{ + .uFuncSel = AM_HAL_PIN_28_M2MOSI, + .eDriveStrength = AM_HAL_GPIO_PIN_DRIVESTRENGTH_12MA, + .uIOMnum = 2 +}; + +//***************************************************************************** +// +// IOM2_SCK pin: I/O Master 2 SPI SCK signal. +// +//***************************************************************************** +const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_IOM2_SCK = +{ + .uFuncSel = AM_HAL_PIN_27_M2SCK, + .eDriveStrength = AM_HAL_GPIO_PIN_DRIVESTRENGTH_12MA, + .uIOMnum = 2 +}; + +//***************************************************************************** +// +// IOM2_SCL pin: I/O Master 2 I2C clock signal. +// +//***************************************************************************** +const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_IOM2_SCL = +{ + .uFuncSel = AM_HAL_PIN_27_M2SCL, + .ePullup = AM_HAL_GPIO_PIN_PULLUP_1_5K, + .eDriveStrength = AM_HAL_GPIO_PIN_DRIVESTRENGTH_12MA, + .eGPOutcfg = AM_HAL_GPIO_PIN_OUTCFG_OPENDRAIN, + .uIOMnum = 2 +}; + +//***************************************************************************** +// +// IOM2_SDA pin: I/O Master 2 I2C data signal. +// +//***************************************************************************** +const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_IOM2_SDA = +{ + .uFuncSel = AM_HAL_PIN_25_M2SDAWIR3, + .ePullup = AM_HAL_GPIO_PIN_PULLUP_1_5K, + .eDriveStrength = AM_HAL_GPIO_PIN_DRIVESTRENGTH_12MA, + .eGPOutcfg = AM_HAL_GPIO_PIN_OUTCFG_OPENDRAIN, + .uIOMnum = 2 +}; + +//***************************************************************************** +// +// IOM3_CS pin: I/O Master 3 chip select. +// +//***************************************************************************** +const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_IOM3_CS = +{ + .uFuncSel = AM_HAL_PIN_12_NCE12, + .eDriveStrength = AM_HAL_GPIO_PIN_DRIVESTRENGTH_12MA, + .eGPOutcfg = AM_HAL_GPIO_PIN_OUTCFG_PUSHPULL, + .eGPInput = AM_HAL_GPIO_PIN_INPUT_NONE, + .eIntDir = AM_HAL_GPIO_PIN_INTDIR_LO2HI, + .uIOMnum = 3, + .uNCE = 0, + .eCEpol = AM_HAL_GPIO_PIN_CEPOL_ACTIVELOW +}; + +//***************************************************************************** +// +// IOM3_MISO pin: I/O Master 3 SPI MISO signal. +// +//***************************************************************************** +const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_IOM3_MISO = +{ + .uFuncSel = AM_HAL_PIN_43_M3MISO, + .uIOMnum = 3 +}; + +//***************************************************************************** +// +// IOM3_MOSI pin: I/O Master 3 SPI MOSI signal. +// +//***************************************************************************** +const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_IOM3_MOSI = +{ + .uFuncSel = AM_HAL_PIN_38_M3MOSI, + .eDriveStrength = AM_HAL_GPIO_PIN_DRIVESTRENGTH_12MA, + .uIOMnum = 3 +}; + +//***************************************************************************** +// +// IOM3_SCK pin: I/O Master 3 SPI SCK signal. +// +//***************************************************************************** +const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_IOM3_SCK = +{ + .uFuncSel = AM_HAL_PIN_42_M3SCK, + .eDriveStrength = AM_HAL_GPIO_PIN_DRIVESTRENGTH_12MA, + .uIOMnum = 3 +}; + +//***************************************************************************** +// +// IOM3_SCL pin: I/O Master 3 I2C clock signal. +// +//***************************************************************************** +const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_IOM3_SCL = +{ + .uFuncSel = AM_HAL_PIN_42_M3SCL, + .ePullup = AM_HAL_GPIO_PIN_PULLUP_1_5K, + .eDriveStrength = AM_HAL_GPIO_PIN_DRIVESTRENGTH_12MA, + .eGPOutcfg = AM_HAL_GPIO_PIN_OUTCFG_OPENDRAIN, + .uIOMnum = 3 +}; + +//***************************************************************************** +// +// IOM3_SDA pin: I/O Master 3 I2C data signal. +// +//***************************************************************************** +const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_IOM3_SDA = +{ + .uFuncSel = AM_HAL_PIN_43_M3SDAWIR3, + .ePullup = AM_HAL_GPIO_PIN_PULLUP_1_5K, + .eDriveStrength = AM_HAL_GPIO_PIN_DRIVESTRENGTH_12MA, + .eGPOutcfg = AM_HAL_GPIO_PIN_OUTCFG_OPENDRAIN, + .uIOMnum = 3 +}; + +//***************************************************************************** +// +// IOM4_CS pin: I/O Master 4 chip select. +// +//***************************************************************************** +const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_IOM4_CS = +{ + .uFuncSel = AM_HAL_PIN_13_NCE13, + .eDriveStrength = AM_HAL_GPIO_PIN_DRIVESTRENGTH_12MA, + .eGPOutcfg = AM_HAL_GPIO_PIN_OUTCFG_PUSHPULL, + .eGPInput = AM_HAL_GPIO_PIN_INPUT_NONE, + .eIntDir = AM_HAL_GPIO_PIN_INTDIR_LO2HI, + .uIOMnum = 4, + .uNCE = 1, + .eCEpol = AM_HAL_GPIO_PIN_CEPOL_ACTIVELOW +}; + +//***************************************************************************** +// +// IOM4_MISO pin: I/O Master 4 SPI MISO signal. +// +//***************************************************************************** +const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_IOM4_MISO = +{ + .uFuncSel = AM_HAL_PIN_40_M4MISO, + .uIOMnum = 4 +}; + +//***************************************************************************** +// +// IOM4_MOSI pin: I/O Master 4 SPI MOSI signal. +// +//***************************************************************************** +const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_IOM4_MOSI = +{ + .uFuncSel = AM_HAL_PIN_44_M4MOSI, + .eDriveStrength = AM_HAL_GPIO_PIN_DRIVESTRENGTH_12MA, + .uIOMnum = 4 +}; + +//***************************************************************************** +// +// IOM4_SCK pin: I/O Master 4 SPI SCK signal. +// +//***************************************************************************** +const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_IOM4_SCK = +{ + .uFuncSel = AM_HAL_PIN_39_M4SCK, + .eDriveStrength = AM_HAL_GPIO_PIN_DRIVESTRENGTH_12MA, + .uIOMnum = 4 +}; + +//***************************************************************************** +// +// IOM4_SCL pin: I/O Master 4 I2C clock signal. +// +//***************************************************************************** +const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_IOM4_SCL = +{ + .uFuncSel = AM_HAL_PIN_39_M4SCL, + .ePullup = AM_HAL_GPIO_PIN_PULLUP_1_5K, + .eDriveStrength = AM_HAL_GPIO_PIN_DRIVESTRENGTH_12MA, + .eGPOutcfg = AM_HAL_GPIO_PIN_OUTCFG_OPENDRAIN, + .uIOMnum = 4 +}; + +//***************************************************************************** +// +// IOM4_SDA pin: I/O Master 4 I2C data signal. +// +//***************************************************************************** +const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_IOM4_SDA = +{ + .uFuncSel = AM_HAL_PIN_40_M4SDAWIR3, + .ePullup = AM_HAL_GPIO_PIN_PULLUP_1_5K, + .eDriveStrength = AM_HAL_GPIO_PIN_DRIVESTRENGTH_12MA, + .eGPOutcfg = AM_HAL_GPIO_PIN_OUTCFG_OPENDRAIN, + .uIOMnum = 4 +}; + +//***************************************************************************** +// +// IOM5_CS pin: I/O Master 5 chip select. +// +//***************************************************************************** +const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_IOM5_CS = +{ + .uFuncSel = AM_HAL_PIN_16_NCE16, + .eDriveStrength = AM_HAL_GPIO_PIN_DRIVESTRENGTH_12MA, + .eGPOutcfg = AM_HAL_GPIO_PIN_OUTCFG_PUSHPULL, + .eGPInput = AM_HAL_GPIO_PIN_INPUT_NONE, + .eIntDir = AM_HAL_GPIO_PIN_INTDIR_LO2HI, + .uIOMnum = 5, + .uNCE = 0, + .eCEpol = AM_HAL_GPIO_PIN_CEPOL_ACTIVELOW +}; + +//***************************************************************************** +// +// IOM5_MISO pin: I/O Master 5 SPI MISO signal. +// +//***************************************************************************** +const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_IOM5_MISO = +{ + .uFuncSel = AM_HAL_PIN_49_M5MISO, + .uIOMnum = 5 +}; + +//***************************************************************************** +// +// IOM5_MOSI pin: I/O Master 5 SPI MOSI signal. +// +//***************************************************************************** +const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_IOM5_MOSI = +{ + .uFuncSel = AM_HAL_PIN_47_M5MOSI, + .eDriveStrength = AM_HAL_GPIO_PIN_DRIVESTRENGTH_12MA, + .uIOMnum = 5 +}; + +//***************************************************************************** +// +// IOM5_SCK pin: I/O Master 5 SPI SCK signal. +// +//***************************************************************************** +const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_IOM5_SCK = +{ + .uFuncSel = AM_HAL_PIN_48_M5SCK, + .eDriveStrength = AM_HAL_GPIO_PIN_DRIVESTRENGTH_12MA, + .uIOMnum = 5 +}; + +//***************************************************************************** +// +// IOM5_SCL pin: I/O Master 5 I2C clock signal. +// +//***************************************************************************** +const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_IOM5_SCL = +{ + .uFuncSel = AM_HAL_PIN_48_M5SCL, + .ePullup = AM_HAL_GPIO_PIN_PULLUP_1_5K, + .eDriveStrength = AM_HAL_GPIO_PIN_DRIVESTRENGTH_12MA, + .eGPOutcfg = AM_HAL_GPIO_PIN_OUTCFG_OPENDRAIN, + .uIOMnum = 5 +}; + +//***************************************************************************** +// +// IOM5_SDA pin: I/O Master 5 I2C data signal. +// +//***************************************************************************** +const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_IOM5_SDA = +{ + .uFuncSel = AM_HAL_PIN_49_M5SDAWIR3, + .ePullup = AM_HAL_GPIO_PIN_PULLUP_1_5K, + .eDriveStrength = AM_HAL_GPIO_PIN_DRIVESTRENGTH_12MA, + .eGPOutcfg = AM_HAL_GPIO_PIN_OUTCFG_OPENDRAIN, + .uIOMnum = 5 +}; + +//***************************************************************************** +// +// MSPI_CE0 pin: MSPI chip select. +// +//***************************************************************************** +const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_MSPI_CE0 = +{ + .uFuncSel = AM_HAL_PIN_19_NCE19, + .eDriveStrength = AM_HAL_GPIO_PIN_DRIVESTRENGTH_12MA, + .eGPOutcfg = AM_HAL_GPIO_PIN_OUTCFG_PUSHPULL, + .eGPInput = AM_HAL_GPIO_PIN_INPUT_NONE, + .eIntDir = AM_HAL_GPIO_PIN_INTDIR_LO2HI, + .uIOMnum = 6, + .uNCE = 0, + .eCEpol = AM_HAL_GPIO_PIN_CEPOL_ACTIVELOW +}; + +//***************************************************************************** +// +// MSPI_CE1 pin: MSPI chip select. +// +//***************************************************************************** +const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_MSPI_CE1 = +{ + .uFuncSel = AM_HAL_PIN_41_NCE41, + .eDriveStrength = AM_HAL_GPIO_PIN_DRIVESTRENGTH_12MA, + .eGPOutcfg = AM_HAL_GPIO_PIN_OUTCFG_PUSHPULL, + .eGPInput = AM_HAL_GPIO_PIN_INPUT_NONE, + .eIntDir = AM_HAL_GPIO_PIN_INTDIR_LO2HI, + .uIOMnum = 6, + .uNCE = 1, + .eCEpol = AM_HAL_GPIO_PIN_CEPOL_ACTIVELOW +}; + +//***************************************************************************** +// +// MSPI_D0 pin: MSPI data 0. +// +//***************************************************************************** +const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_MSPI_D0 = +{ + .uFuncSel = AM_HAL_PIN_22_MSPI0, + .eDriveStrength = AM_HAL_GPIO_PIN_DRIVESTRENGTH_8MA, + .eIntDir = AM_HAL_GPIO_PIN_INTDIR_LO2HI, + .uIOMnum = 6 +}; + +//***************************************************************************** +// +// MSPI_D1 pin: MSPI data 1. +// +//***************************************************************************** +const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_MSPI_D1 = +{ + .uFuncSel = AM_HAL_PIN_26_MSPI1, + .eDriveStrength = AM_HAL_GPIO_PIN_DRIVESTRENGTH_8MA, + .eIntDir = AM_HAL_GPIO_PIN_INTDIR_LO2HI, + .uIOMnum = 6 +}; + +//***************************************************************************** +// +// MSPI_D2 pin: MSPI data 2. +// +//***************************************************************************** +const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_MSPI_D2 = +{ + .uFuncSel = AM_HAL_PIN_4_MSPI2, + .eDriveStrength = AM_HAL_GPIO_PIN_DRIVESTRENGTH_8MA, + .eIntDir = AM_HAL_GPIO_PIN_INTDIR_LO2HI, + .uIOMnum = 6 +}; + +//***************************************************************************** +// +// MSPI_D3 pin: MSPI data 3. +// +//***************************************************************************** +const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_MSPI_D3 = +{ + .uFuncSel = AM_HAL_PIN_23_MSPI3, + .eDriveStrength = AM_HAL_GPIO_PIN_DRIVESTRENGTH_8MA, + .eIntDir = AM_HAL_GPIO_PIN_INTDIR_LO2HI, + .uIOMnum = 6 +}; + +//***************************************************************************** +// +// MSPI_D4 pin: MSPI data 4. +// +//***************************************************************************** +const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_MSPI_D4 = +{ + .uFuncSel = AM_HAL_PIN_0_MSPI4, + .eDriveStrength = AM_HAL_GPIO_PIN_DRIVESTRENGTH_8MA, + .eIntDir = AM_HAL_GPIO_PIN_INTDIR_LO2HI, + .uIOMnum = 6 +}; + +//***************************************************************************** +// +// MSPI_D5 pin: MSPI data 5. +// +//***************************************************************************** +const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_MSPI_D5 = +{ + .uFuncSel = AM_HAL_PIN_1_MSPI5, + .eDriveStrength = AM_HAL_GPIO_PIN_DRIVESTRENGTH_8MA, + .eIntDir = AM_HAL_GPIO_PIN_INTDIR_LO2HI, + .uIOMnum = 6 +}; + +//***************************************************************************** +// +// MSPI_D6 pin: MSPI data 6. +// +//***************************************************************************** +const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_MSPI_D6 = +{ + .uFuncSel = AM_HAL_PIN_2_MSPI6, + .eDriveStrength = AM_HAL_GPIO_PIN_DRIVESTRENGTH_8MA, + .eIntDir = AM_HAL_GPIO_PIN_INTDIR_LO2HI, + .uIOMnum = 6 +}; + +//***************************************************************************** +// +// MSPI_D7 pin: MSPI data 7. +// +//***************************************************************************** +const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_MSPI_D7 = +{ + .uFuncSel = AM_HAL_PIN_3_MSPI7, + .eDriveStrength = AM_HAL_GPIO_PIN_DRIVESTRENGTH_8MA, + .eIntDir = AM_HAL_GPIO_PIN_INTDIR_LO2HI, + .uIOMnum = 6 +}; + +//***************************************************************************** +// +// MSPI_SCK pin: MSPI clock. +// +//***************************************************************************** +const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_MSPI_SCK = +{ + .uFuncSel = AM_HAL_PIN_24_MSPI8, + .eDriveStrength = AM_HAL_GPIO_PIN_DRIVESTRENGTH_12MA, + .eIntDir = AM_HAL_GPIO_PIN_INTDIR_LO2HI, + .uIOMnum = 6 +}; + +//***************************************************************************** +// +// IOS_CE pin: I/O Slave chip select. +// +//***************************************************************************** +const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_IOS_CE = +{ + .uFuncSel = AM_HAL_PIN_3_SLnCE, + .eGPInput = AM_HAL_GPIO_PIN_INPUT_ENABLE, + .uNCE = 0, + .eCEpol = AM_HAL_GPIO_PIN_CEPOL_ACTIVELOW +}; + +//***************************************************************************** +// +// IOS_MISO pin: I/O Slave SPI MISO signal. +// +//***************************************************************************** +const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_IOS_MISO = +{ + .uFuncSel = AM_HAL_PIN_2_SLMISO, + .eDriveStrength = AM_HAL_GPIO_PIN_DRIVESTRENGTH_12MA +}; + +//***************************************************************************** +// +// IOS_MOSI pin: I/O Slave SPI MOSI signal. +// +//***************************************************************************** +const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_IOS_MOSI = +{ + .uFuncSel = AM_HAL_PIN_1_SLMOSI, + .eGPInput = AM_HAL_GPIO_PIN_INPUT_ENABLE +}; + +//***************************************************************************** +// +// IOS_SCK pin: I/O Slave SPI SCK signal. +// +//***************************************************************************** +const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_IOS_SCK = +{ + .uFuncSel = AM_HAL_PIN_0_SLSCK, + .eGPInput = AM_HAL_GPIO_PIN_INPUT_ENABLE +}; + +//***************************************************************************** +// +// IOS_SCL pin: I/O Slave I2C clock signal. +// +//***************************************************************************** +const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_IOS_SCL = +{ + .uFuncSel = AM_HAL_PIN_0_SLSCL, + .eGPInput = AM_HAL_GPIO_PIN_INPUT_ENABLE +}; + +//***************************************************************************** +// +// IOS_SDA pin: I/O Slave I2C data signal. +// +//***************************************************************************** +const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_IOS_SDA = +{ + .uFuncSel = AM_HAL_PIN_1_SLSDAWIR3, + .ePullup = AM_HAL_GPIO_PIN_PULLUP_1_5K, + .eGPOutcfg = AM_HAL_GPIO_PIN_OUTCFG_OPENDRAIN +}; + +//***************************************************************************** +// +// ITM_SWO pin: ITM Serial Wire Output. +// +//***************************************************************************** +const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_ITM_SWO = +{ + .uFuncSel = AM_HAL_PIN_22_SWO, + .eDriveStrength = AM_HAL_GPIO_PIN_DRIVESTRENGTH_2MA +}; + +//***************************************************************************** +// +// SWDCK pin: Cortex Serial Wire DCK. +// +//***************************************************************************** +const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_SWDCK = +{ + .uFuncSel = AM_HAL_PIN_20_SWDCK +}; + +//***************************************************************************** +// +// SWDIO pin: Cortex Serial Wire DIO. +// +//***************************************************************************** +const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_SWDIO = +{ + .uFuncSel = AM_HAL_PIN_21_SWDIO +}; + +//***************************************************************************** +// +// End Doxygen group. +//! @} +// +//***************************************************************************** diff --git a/artemis_mm_pb/bsp/am_bsp_pins.h b/artemis_mm_pb/bsp/am_bsp_pins.h new file mode 100644 index 0000000..30f7e41 --- /dev/null +++ b/artemis_mm_pb/bsp/am_bsp_pins.h @@ -0,0 +1,945 @@ +//***************************************************************************** +// +// am_bsp_pins.h +//! @file +//! +//! @brief BSP pin configuration definitions. +//! +//! @addtogroup BSP Board Support Package (BSP) +//! @addtogroup apollo3_bsp BSP for the Apollo3 EVB. +//! @ingroup BSP +//! @{ +// +//***************************************************************************** + +//***************************************************************************** +// +// Copyright (c) 2019, Ambiq Micro +// All rights reserved. +// +// Redistribution and use in source and binary forms, with or without +// modification, are permitted provided that the following conditions are met: +// +// 1. Redistributions of source code must retain the above copyright notice, +// this list of conditions and the following disclaimer. +// +// 2. Redistributions in binary form must reproduce the above copyright +// notice, this list of conditions and the following disclaimer in the +// documentation and/or other materials provided with the distribution. +// +// 3. Neither the name of the copyright holder nor the names of its +// contributors may be used to endorse or promote products derived from this +// software without specific prior written permission. +// +// Third party software included in this distribution is subject to the +// additional license terms as defined in the /docs/licenses directory. +// +// THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" +// AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE +// IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE +// ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE +// LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR +// CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF +// SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS +// INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN +// CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) +// ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE +// POSSIBILITY OF SUCH DAMAGE. +// +// This is part of revision 2.2.0-hotfix-2.2.1 of the AmbiqSuite Development Package. +// +//***************************************************************************** + +#ifndef AM_BSP_PINS_H +#define AM_BSP_PINS_H + +#include +#include +#include "am_mcu_apollo.h" + +#ifdef __cplusplus +extern "C" +{ +#endif + +//***************************************************************************** +// +// AUD_MCLK pin. +// +//***************************************************************************** +#define AM_BSP_GPIO_AUD_MCLK 18 +extern const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_AUD_MCLK; + +//***************************************************************************** +// +// AUD_OUT pin. +// +//***************************************************************************** +#define AM_BSP_GPIO_AUD_OUT 18 +extern const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_AUD_OUT; + +//***************************************************************************** +// +// AUD_IN pin. +// +//***************************************************************************** +#define AM_BSP_GPIO_AUD_IN 11 +extern const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_AUD_IN; + +//***************************************************************************** +// +// AUD_LRCLK pin. +// +//***************************************************************************** +#define AM_BSP_GPIO_AUD_LRCLK 36 +extern const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_AUD_LRCLK; + +//***************************************************************************** +// +// AUD_BCLK pin. +// +//***************************************************************************** +#define AM_BSP_GPIO_AUD_BCLK 37 +extern const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_AUD_BCLK; + +//***************************************************************************** +// +// SCL pin: I/O Master 4 I2C clock signal. +// +//***************************************************************************** +#define AM_BSP_GPIO_SCL 39 +extern const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_SCL; + +//***************************************************************************** +// +// SDA pin: I/O Master 4 I2C data signal. +// +//***************************************************************************** +#define AM_BSP_GPIO_SDA 40 +extern const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_SDA; + +//***************************************************************************** +// +// I2C_INT pin. +// +//***************************************************************************** +#define AM_BSP_GPIO_I2C_INT 2 +extern const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_I2C_INT; + +//***************************************************************************** +// +// SCL1 pin: I/O Master 1 I2C clock signal. +// +//***************************************************************************** +#define AM_BSP_GPIO_SCL1 8 +extern const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_SCL1; + +//***************************************************************************** +// +// SDA1 pin: I/O Master 1 I2C data signal. +// +//***************************************************************************** +#define AM_BSP_GPIO_SDA1 9 +extern const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_SDA1; + +//***************************************************************************** +// +// BATT_VIN pin. +// +//***************************************************************************** +#define AM_BSP_GPIO_BATT_VIN 31 +extern const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_BATT_VIN; + +//***************************************************************************** +// +// SDIO_CLK pin: I/O Master 0 SPI SCK signal. +// +//***************************************************************************** +#define AM_BSP_GPIO_SDIO_CLK 5 +extern const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_SDIO_CLK; + +//***************************************************************************** +// +// SDIO_CMD pin: I/O Master 0 SPI SDO signal. +// +//***************************************************************************** +#define AM_BSP_GPIO_SDIO_CMD 7 +extern const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_SDIO_CMD; + +//***************************************************************************** +// +// SDIO_DATA0 pin: I/O Master 0 SPI SDI signal. +// +//***************************************************************************** +#define AM_BSP_GPIO_SDIO_DATA0 6 +extern const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_SDIO_DATA0; + +//***************************************************************************** +// +// SDIO_DATA1 pin: QSPI data1 signal. +// +//***************************************************************************** +#define AM_BSP_GPIO_SDIO_DATA1 26 +extern const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_SDIO_DATA1; + +//***************************************************************************** +// +// SDIO_DATA2 pin: QSPI data2 signal. +// +//***************************************************************************** +#define AM_BSP_GPIO_SDIO_DATA2 4 +extern const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_SDIO_DATA2; + +//***************************************************************************** +// +// SDIO_DATA3 pin: QSPI data3 signal. +// +//***************************************************************************** +#define AM_BSP_GPIO_SDIO_DATA3 23 +extern const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_SDIO_DATA3; + +//***************************************************************************** +// +// SPI_SDI pin: I/O Master 3 SPI SDI signal. +// +//***************************************************************************** +#define AM_BSP_GPIO_SPI_SDI 43 +extern const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_SPI_SDI; + +//***************************************************************************** +// +// SPI_SDO pin: I/O Master 3 SPI SDO signal. +// +//***************************************************************************** +#define AM_BSP_GPIO_SPI_SDO 38 +extern const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_SPI_SDO; + +//***************************************************************************** +// +// SPI_SCK pin: I/O Master 3 SPI SCK signal. +// +//***************************************************************************** +#define AM_BSP_GPIO_SPI_SCK 42 +extern const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_SPI_SCK; + +//***************************************************************************** +// +// SPI_CS pin: SPI CS signal. +// +//***************************************************************************** +#define AM_BSP_GPIO_SPI_CS 41 +extern const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_SPI_CS; +#define AM_BSP_GPIO_SPI_CS_CHNL 0 + +//***************************************************************************** +// +// SPI_SDI1 pin: I/O Master 0 SPI SDI signal. +// +//***************************************************************************** +#define AM_BSP_GPIO_SPI_SDI1 6 +extern const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_SPI_SDI1; + +//***************************************************************************** +// +// SPI_SDO1 pin: I/O Master 0 SPI SDO signal. +// +//***************************************************************************** +#define AM_BSP_GPIO_SPI_SDO1 7 +extern const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_SPI_SDO1; + +//***************************************************************************** +// +// SPI_SCK1 pin: I/O Master 0 SPI SCK signal. +// +//***************************************************************************** +#define AM_BSP_GPIO_SPI_SCK1 5 +extern const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_SPI_SCK1; + +//***************************************************************************** +// +// SPI_CS1 pin: SPI1 CS signal. +// +//***************************************************************************** +#define AM_BSP_GPIO_SPI_CS1 23 +extern const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_SPI_CS1; +#define AM_BSP_GPIO_SPI_CS1_CHNL 0 + +//***************************************************************************** +// +// A0 pin. +// +//***************************************************************************** +#define AM_BSP_GPIO_A0 32 +extern const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_A0; + +//***************************************************************************** +// +// A1 pin. +// +//***************************************************************************** +#define AM_BSP_GPIO_A1 35 +extern const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_A1; + +//***************************************************************************** +// +// PWM0 pin. +// +//***************************************************************************** +#define AM_BSP_GPIO_PWM0 44 +extern const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_PWM0; + +//***************************************************************************** +// +// PWM1 pin. +// +//***************************************************************************** +#define AM_BSP_GPIO_PWM1 45 +extern const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_PWM1; + +//***************************************************************************** +// +// D0 pin. +// +//***************************************************************************** +#define AM_BSP_GPIO_D0 0 +extern const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_D0; + +//***************************************************************************** +// +// D1 pin. +// +//***************************************************************************** +#define AM_BSP_GPIO_D1 1 +extern const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_D1; + +//***************************************************************************** +// +// TX1 pin: This pin is the UART1 transmit pin. +// +//***************************************************************************** +#define AM_BSP_GPIO_TX1 12 +extern const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_TX1; + +//***************************************************************************** +// +// RX1 pin: This pin is the UART1 receive pin. +// +//***************************************************************************** +#define AM_BSP_GPIO_RX1 25 +extern const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_RX1; + +//***************************************************************************** +// +// RTS1 pin: This pin is the UART1 rts pin. +// +//***************************************************************************** +#define AM_BSP_GPIO_RTS1 10 +extern const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_RTS1; + +//***************************************************************************** +// +// CTS1 pin: This pin is the UART1 cts pin. +// +//***************************************************************************** +#define AM_BSP_GPIO_CTS1 17 +extern const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_CTS1; + +//***************************************************************************** +// +// G0 pin. +// +//***************************************************************************** +#define AM_BSP_GPIO_G0 16 +extern const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_G0; + +//***************************************************************************** +// +// G1 pin. +// +//***************************************************************************** +#define AM_BSP_GPIO_G1 33 +extern const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_G1; + +//***************************************************************************** +// +// G2 pin. +// +//***************************************************************************** +#define AM_BSP_GPIO_G2 34 +extern const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_G2; + +//***************************************************************************** +// +// G3 pin. +// +//***************************************************************************** +#define AM_BSP_GPIO_G3 27 +extern const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_G3; + +//***************************************************************************** +// +// G4 pin. +// +//***************************************************************************** +#define AM_BSP_GPIO_G4 28 +extern const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_G4; + +//***************************************************************************** +// +// G5 pin. +// +//***************************************************************************** +#define AM_BSP_GPIO_G5 29 +extern const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_G5; + +//***************************************************************************** +// +// G6 pin. +// +//***************************************************************************** +#define AM_BSP_GPIO_G6 14 +extern const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_G6; + +//***************************************************************************** +// +// G7 pin. +// +//***************************************************************************** +#define AM_BSP_GPIO_G7 15 +extern const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_G7; + +//***************************************************************************** +// +// G9 pin. +// +//***************************************************************************** +#define AM_BSP_GPIO_G9 12 +extern const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_G9; + +//***************************************************************************** +// +// G10 pin. +// +//***************************************************************************** +#define AM_BSP_GPIO_G10 13 +extern const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_G10; + +//***************************************************************************** +// +// MIC_DATA pin: Data line for PDM microphones. +// +//***************************************************************************** +#define AM_BSP_GPIO_MIC_DATA 36 +extern const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_MIC_DATA; + +//***************************************************************************** +// +// MIC_CLK pin: Clock line for PDM microphones. +// +//***************************************************************************** +#define AM_BSP_GPIO_MIC_CLK 37 +extern const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_MIC_CLK; + +//***************************************************************************** +// +// LED_BLUE pin: The BLUE LED labeled STAT. +// +//***************************************************************************** +#define AM_BSP_GPIO_LED_BLUE 19 +extern const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_LED_BLUE; + +//***************************************************************************** +// +// COM_UART_TX pin: This pin is the COM_UART transmit pin. +// +//***************************************************************************** +#define AM_BSP_GPIO_COM_UART_TX 48 +extern const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_COM_UART_TX; + +//***************************************************************************** +// +// COM_UART_RX pin: This pin is the COM_UART receive pin. +// +//***************************************************************************** +#define AM_BSP_GPIO_COM_UART_RX 49 +extern const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_COM_UART_RX; + +//***************************************************************************** +// +// IOM0_CS pin: I/O Master 0 chip select. +// +//***************************************************************************** +#define AM_BSP_GPIO_IOM0_CS 11 +extern const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_IOM0_CS; +#define AM_BSP_GPIO_IOM0_CS_CHNL 0 + +//***************************************************************************** +// +// IOM0_CS3 pin: I/O Master 0 chip select. +// +//***************************************************************************** +#define AM_BSP_GPIO_IOM0_CS3 15 +extern const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_IOM0_CS3; +#define AM_BSP_GPIO_IOM0_CS3_CHNL 3 + +//***************************************************************************** +// +// IOM0_MISO pin: I/O Master 0 SPI MISO signal. +// +//***************************************************************************** +#define AM_BSP_GPIO_IOM0_MISO 6 +extern const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_IOM0_MISO; + +//***************************************************************************** +// +// IOM0_MOSI pin: I/O Master 0 SPI MOSI signal. +// +//***************************************************************************** +#define AM_BSP_GPIO_IOM0_MOSI 7 +extern const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_IOM0_MOSI; + +//***************************************************************************** +// +// IOM0_SCK pin: I/O Master 0 SPI SCK signal. +// +//***************************************************************************** +#define AM_BSP_GPIO_IOM0_SCK 5 +extern const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_IOM0_SCK; + +//***************************************************************************** +// +// IOM0_SCL pin: I/O Master 0 I2C clock signal. +// +//***************************************************************************** +#define AM_BSP_GPIO_IOM0_SCL 5 +extern const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_IOM0_SCL; + +//***************************************************************************** +// +// IOM0_SDA pin: I/O Master 0 I2C data signal. +// +//***************************************************************************** +#define AM_BSP_GPIO_IOM0_SDA 6 +extern const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_IOM0_SDA; + +//***************************************************************************** +// +// IOM1_CS pin: I/O Master 1 chip select. +// +//***************************************************************************** +#define AM_BSP_GPIO_IOM1_CS 14 +extern const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_IOM1_CS; +#define AM_BSP_GPIO_IOM1_CS_CHNL 2 + +//***************************************************************************** +// +// IOM1_MISO pin: I/O Master 1 SPI MISO signal. +// +//***************************************************************************** +#define AM_BSP_GPIO_IOM1_MISO 9 +extern const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_IOM1_MISO; + +//***************************************************************************** +// +// IOM1_MOSI pin: I/O Master 1 SPI MOSI signal. +// +//***************************************************************************** +#define AM_BSP_GPIO_IOM1_MOSI 10 +extern const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_IOM1_MOSI; + +//***************************************************************************** +// +// IOM1_SCK pin: I/O Master 1 SPI SCK signal. +// +//***************************************************************************** +#define AM_BSP_GPIO_IOM1_SCK 8 +extern const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_IOM1_SCK; + +//***************************************************************************** +// +// IOM1_SCL pin: I/O Master 1 I2C clock signal. +// +//***************************************************************************** +#define AM_BSP_GPIO_IOM1_SCL 8 +extern const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_IOM1_SCL; + +//***************************************************************************** +// +// IOM1_SDA pin: I/O Master 1 I2C data signal. +// +//***************************************************************************** +#define AM_BSP_GPIO_IOM1_SDA 9 +extern const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_IOM1_SDA; + +//***************************************************************************** +// +// IOM2_CS pin: I/O Master 2 chip select. +// +//***************************************************************************** +#define AM_BSP_GPIO_IOM2_CS 15 +extern const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_IOM2_CS; +#define AM_BSP_GPIO_IOM2_CS_CHNL 3 + +//***************************************************************************** +// +// IOM2_MISO pin: I/O Master 2 SPI MISO signal. +// +//***************************************************************************** +#define AM_BSP_GPIO_IOM2_MISO 25 +extern const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_IOM2_MISO; + +//***************************************************************************** +// +// IOM2_MOSI pin: I/O Master 2 SPI MOSI signal. +// +//***************************************************************************** +#define AM_BSP_GPIO_IOM2_MOSI 28 +extern const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_IOM2_MOSI; + +//***************************************************************************** +// +// IOM2_SCK pin: I/O Master 2 SPI SCK signal. +// +//***************************************************************************** +#define AM_BSP_GPIO_IOM2_SCK 27 +extern const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_IOM2_SCK; + +//***************************************************************************** +// +// IOM2_SCL pin: I/O Master 2 I2C clock signal. +// +//***************************************************************************** +#define AM_BSP_GPIO_IOM2_SCL 27 +extern const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_IOM2_SCL; + +//***************************************************************************** +// +// IOM2_SDA pin: I/O Master 2 I2C data signal. +// +//***************************************************************************** +#define AM_BSP_GPIO_IOM2_SDA 25 +extern const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_IOM2_SDA; + +//***************************************************************************** +// +// IOM3_CS pin: I/O Master 3 chip select. +// +//***************************************************************************** +#define AM_BSP_GPIO_IOM3_CS 12 +extern const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_IOM3_CS; +#define AM_BSP_GPIO_IOM3_CS_CHNL 0 + +//***************************************************************************** +// +// IOM3_MISO pin: I/O Master 3 SPI MISO signal. +// +//***************************************************************************** +#define AM_BSP_GPIO_IOM3_MISO 43 +extern const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_IOM3_MISO; + +//***************************************************************************** +// +// IOM3_MOSI pin: I/O Master 3 SPI MOSI signal. +// +//***************************************************************************** +#define AM_BSP_GPIO_IOM3_MOSI 38 +extern const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_IOM3_MOSI; + +//***************************************************************************** +// +// IOM3_SCK pin: I/O Master 3 SPI SCK signal. +// +//***************************************************************************** +#define AM_BSP_GPIO_IOM3_SCK 42 +extern const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_IOM3_SCK; + +//***************************************************************************** +// +// IOM3_SCL pin: I/O Master 3 I2C clock signal. +// +//***************************************************************************** +#define AM_BSP_GPIO_IOM3_SCL 42 +extern const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_IOM3_SCL; + +//***************************************************************************** +// +// IOM3_SDA pin: I/O Master 3 I2C data signal. +// +//***************************************************************************** +#define AM_BSP_GPIO_IOM3_SDA 43 +extern const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_IOM3_SDA; + +//***************************************************************************** +// +// IOM4_CS pin: I/O Master 4 chip select. +// +//***************************************************************************** +#define AM_BSP_GPIO_IOM4_CS 13 +extern const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_IOM4_CS; +#define AM_BSP_GPIO_IOM4_CS_CHNL 1 + +//***************************************************************************** +// +// IOM4_MISO pin: I/O Master 4 SPI MISO signal. +// +//***************************************************************************** +#define AM_BSP_GPIO_IOM4_MISO 40 +extern const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_IOM4_MISO; + +//***************************************************************************** +// +// IOM4_MOSI pin: I/O Master 4 SPI MOSI signal. +// +//***************************************************************************** +#define AM_BSP_GPIO_IOM4_MOSI 44 +extern const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_IOM4_MOSI; + +//***************************************************************************** +// +// IOM4_SCK pin: I/O Master 4 SPI SCK signal. +// +//***************************************************************************** +#define AM_BSP_GPIO_IOM4_SCK 39 +extern const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_IOM4_SCK; + +//***************************************************************************** +// +// IOM4_SCL pin: I/O Master 4 I2C clock signal. +// +//***************************************************************************** +#define AM_BSP_GPIO_IOM4_SCL 39 +extern const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_IOM4_SCL; + +//***************************************************************************** +// +// IOM4_SDA pin: I/O Master 4 I2C data signal. +// +//***************************************************************************** +#define AM_BSP_GPIO_IOM4_SDA 40 +extern const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_IOM4_SDA; + +//***************************************************************************** +// +// IOM5_CS pin: I/O Master 5 chip select. +// +//***************************************************************************** +#define AM_BSP_GPIO_IOM5_CS 16 +extern const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_IOM5_CS; +#define AM_BSP_GPIO_IOM5_CS_CHNL 0 + +//***************************************************************************** +// +// IOM5_MISO pin: I/O Master 5 SPI MISO signal. +// +//***************************************************************************** +#define AM_BSP_GPIO_IOM5_MISO 49 +extern const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_IOM5_MISO; + +//***************************************************************************** +// +// IOM5_MOSI pin: I/O Master 5 SPI MOSI signal. +// +//***************************************************************************** +#define AM_BSP_GPIO_IOM5_MOSI 47 +extern const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_IOM5_MOSI; + +//***************************************************************************** +// +// IOM5_SCK pin: I/O Master 5 SPI SCK signal. +// +//***************************************************************************** +#define AM_BSP_GPIO_IOM5_SCK 48 +extern const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_IOM5_SCK; + +//***************************************************************************** +// +// IOM5_SCL pin: I/O Master 5 I2C clock signal. +// +//***************************************************************************** +#define AM_BSP_GPIO_IOM5_SCL 48 +extern const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_IOM5_SCL; + +//***************************************************************************** +// +// IOM5_SDA pin: I/O Master 5 I2C data signal. +// +//***************************************************************************** +#define AM_BSP_GPIO_IOM5_SDA 49 +extern const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_IOM5_SDA; + +//***************************************************************************** +// +// MSPI_CE0 pin: MSPI chip select. +// +//***************************************************************************** +#define AM_BSP_GPIO_MSPI_CE0 19 +extern const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_MSPI_CE0; +#define AM_BSP_GPIO_MSPI_CE0_CHNL 0 + +//***************************************************************************** +// +// MSPI_CE1 pin: MSPI chip select. +// +//***************************************************************************** +#define AM_BSP_GPIO_MSPI_CE1 41 +extern const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_MSPI_CE1; +#define AM_BSP_GPIO_MSPI_CE1_CHNL 1 + +//***************************************************************************** +// +// MSPI_D0 pin: MSPI data 0. +// +//***************************************************************************** +#define AM_BSP_GPIO_MSPI_D0 22 +extern const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_MSPI_D0; + +//***************************************************************************** +// +// MSPI_D1 pin: MSPI data 1. +// +//***************************************************************************** +#define AM_BSP_GPIO_MSPI_D1 26 +extern const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_MSPI_D1; + +//***************************************************************************** +// +// MSPI_D2 pin: MSPI data 2. +// +//***************************************************************************** +#define AM_BSP_GPIO_MSPI_D2 4 +extern const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_MSPI_D2; + +//***************************************************************************** +// +// MSPI_D3 pin: MSPI data 3. +// +//***************************************************************************** +#define AM_BSP_GPIO_MSPI_D3 23 +extern const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_MSPI_D3; + +//***************************************************************************** +// +// MSPI_D4 pin: MSPI data 4. +// +//***************************************************************************** +#define AM_BSP_GPIO_MSPI_D4 0 +extern const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_MSPI_D4; + +//***************************************************************************** +// +// MSPI_D5 pin: MSPI data 5. +// +//***************************************************************************** +#define AM_BSP_GPIO_MSPI_D5 1 +extern const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_MSPI_D5; + +//***************************************************************************** +// +// MSPI_D6 pin: MSPI data 6. +// +//***************************************************************************** +#define AM_BSP_GPIO_MSPI_D6 2 +extern const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_MSPI_D6; + +//***************************************************************************** +// +// MSPI_D7 pin: MSPI data 7. +// +//***************************************************************************** +#define AM_BSP_GPIO_MSPI_D7 3 +extern const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_MSPI_D7; + +//***************************************************************************** +// +// MSPI_SCK pin: MSPI clock. +// +//***************************************************************************** +#define AM_BSP_GPIO_MSPI_SCK 24 +extern const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_MSPI_SCK; + +//***************************************************************************** +// +// IOS_CE pin: I/O Slave chip select. +// +//***************************************************************************** +#define AM_BSP_GPIO_IOS_CE 3 +extern const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_IOS_CE; +#define AM_BSP_GPIO_IOS_CE_CHNL 0 + +//***************************************************************************** +// +// IOS_MISO pin: I/O Slave SPI MISO signal. +// +//***************************************************************************** +#define AM_BSP_GPIO_IOS_MISO 2 +extern const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_IOS_MISO; + +//***************************************************************************** +// +// IOS_MOSI pin: I/O Slave SPI MOSI signal. +// +//***************************************************************************** +#define AM_BSP_GPIO_IOS_MOSI 1 +extern const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_IOS_MOSI; + +//***************************************************************************** +// +// IOS_SCK pin: I/O Slave SPI SCK signal. +// +//***************************************************************************** +#define AM_BSP_GPIO_IOS_SCK 0 +extern const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_IOS_SCK; + +//***************************************************************************** +// +// IOS_SCL pin: I/O Slave I2C clock signal. +// +//***************************************************************************** +#define AM_BSP_GPIO_IOS_SCL 0 +extern const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_IOS_SCL; + +//***************************************************************************** +// +// IOS_SDA pin: I/O Slave I2C data signal. +// +//***************************************************************************** +#define AM_BSP_GPIO_IOS_SDA 1 +extern const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_IOS_SDA; + +//***************************************************************************** +// +// ITM_SWO pin: ITM Serial Wire Output. +// +//***************************************************************************** +#define AM_BSP_GPIO_ITM_SWO 22 +extern const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_ITM_SWO; + +//***************************************************************************** +// +// SWDCK pin: Cortex Serial Wire DCK. +// +//***************************************************************************** +#define AM_BSP_GPIO_SWDCK 20 +extern const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_SWDCK; + +//***************************************************************************** +// +// SWDIO pin: Cortex Serial Wire DIO. +// +//***************************************************************************** +#define AM_BSP_GPIO_SWDIO 21 +extern const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_SWDIO; + + +#ifdef __cplusplus +} +#endif + +#endif // AM_BSP_PINS_H + +//***************************************************************************** +// +// End Doxygen group. +//! @} +// +//***************************************************************************** diff --git a/artemis_mm_pb/bsp/bsp_pins.src b/artemis_mm_pb/bsp/bsp_pins.src new file mode 100644 index 0000000..f8a3eff --- /dev/null +++ b/artemis_mm_pb/bsp/bsp_pins.src @@ -0,0 +1,1039 @@ +#******************************************************************************* +# * +# File: bsp_pins.src * +# * +# Title: SparkFun Artemis Micro Mod Processor Board Pin Definitions * +# * +#******************************************************************************* +# * +# This file contains descriptors for the various BSP pin definitions. * +# After completing the pin descriptors, the file is processed by a * +# Python script to generate the appropriate C and header file. * +# * +# NOTEs: * +# - This file should contain NO TAB characters, only spaces. * +# - Indentation is required, but the amount of indentation is not critical, * +# only the consistency of indentation. * +# - Comment lines always begin with a '#' sign. * +# - Letter case of keywords (left side of equal) is not important. * +# Letter case of the value (right side of equal) is not important when * +# processing standard values (e.g. "lo2hi"). However, letter case is * +# maintained when used for creating defines. * +# * +# Keywords: * +# All of the following keywords should begin in column 4. * +# name The name to be used for the pin. This name will be used as a * +# base for generating defines. Each pin name must be unique. * +# desc Optional: A description, if provided, will appear in the * +# generated header file. * +# funcsel A value 0-7, or the equivalent AM_HAL_PIN_nn_xxxx macro. * +# The AM_HAL_PIN_nn_xxxx nomenclature is preferred. * +# pinnum The pin number for the pin being defined (0-49). * +# drvstrength One of: 2, 4, 8, or 12. If not provided, 2 is default. * +# GPOutcfg Typically used if the pin is being defined as GPIO (funcsel=3).* +# One of: disable, pushpull, opendrain, tristate. * +# Also acceptable is a value 0-3, or a macro. * +# GPinput Only used if the pin is being defined as GPIO (funcsel=3). * +# One of: true, false. * +# GPRdZero One of readpin, zero (or true or false). * +# intdir One of: none, lo2hi, hi2lo, either. * +# Note - does not enable any interrupt. Only configures the * +# direction for when it is enabled. * +# pullup One of: none, 1_5K, 6K, 12K, 24K, weak, pulldown. * +# 1_5K - 24K: valid on I2C pins. * +# weak: Valid for pullups on all other (non-I2C) pins. * +# pulldown: Valid for pin 20 only. * +# Also acceptable is a macro (e.g. AM_HAL_GPIO_PIN_PULLUP_1_5K). * +# PowerSw One of: VDD or VSS. * +# Also acceptable is a macro (e.g. AM_HAL_GPIO_PIN_POWERSW_VDD). * +# * +# The following 3 parameters are used when the pin is being defined as a * +# chip enable, i.e. for SPI or MSPI. * +# IOMnum The IOM number pertaining to the CE. 0-5 for SPI, 6 for MSPI. * +# Also acceptable is a macro (e.g. one defined in am_bsp.h). * +# CEnum A value from 0-3. * +# If a value 0-3, a macro is created of the form: * +# #define AM_BSP__CHNL * +# Also acceptable is a macro (e.g. one defined in am_bsp.h), * +# in this case no other macro is created. * +# CEpol Chip enable polarity, active low or active high. * +# One of: LOW (default) or HIGH. * +# * +# ****************************************************************************** + + + +# ***************************************************************************** +# +# MICRO MOD +# +# ***************************************************************************** + + + +# ***************************************************************************** +# MicroMod AUDIO +# ***************************************************************************** +pin + name = AUD_MCLK + pinnum = 18 + func_sel = AM_HAL_PIN_18_GPIO + drvstrength = 2 + GPinput = false + +pin + name = AUD_OUT + pinnum = 18 + func_sel = AM_HAL_PIN_18_GPIO + drvstrength = 2 + GPinput = false + +pin + name = AUD_IN + pinnum = 11 + func_sel = AM_HAL_PIN_11_GPIO + drvstrength = 2 + GPinput = true + +pin + name = AUD_LRCLK + pinnum = 36 + func_sel = AM_HAL_PIN_36_GPIO + +pin + name = AUD_BCLK + pinnum = 37 + func_sel = AM_HAL_PIN_37_GPIO + +# ***************************************************************************** +# MicroMod I2C +# ***************************************************************************** +pin + name = SCL + desc = I/O Master 4 I2C clock signal. + pinnum = 39 + func_sel = AM_HAL_PIN_39_M4SCL + GPOutcfg = opendrain + drvstrength = 12 + pullup = 1_5K + IOMnum = 4 + +pin + name = SDA + desc = I/O Master 4 I2C data signal. + pinnum = 40 + func_sel = AM_HAL_PIN_40_M4SDAWIR3 + GPOutcfg = opendrain + drvstrength = 12 + pullup = 1_5K + IOMnum = 4 + +pin + name = I2C_INT + pinnum = 2 + func_sel = AM_HAL_PIN_2_GPIO + drvstrength = 2 + GPinput = true + # todo: add interrupt capabilities + +pin + name = SCL1 + desc = I/O Master 1 I2C clock signal. + pinnum = 8 + func_sel = AM_HAL_PIN_8_M1SCL + GPOutcfg = opendrain + drvstrength = 12 + pullup = 1_5K + IOMnum = 1 + +pin + name = SDA1 + desc = I/O Master 1 I2C data signal. + pinnum = 9 + func_sel = AM_HAL_PIN_9_M1SDAWIR3 + GPOutcfg = opendrain + drvstrength = 12 + pullup = 1_5K + IOMnum = 1 + +# ***************************************************************************** +# MicroMod Batt VIN +# ***************************************************************************** +pin + name = BATT_VIN + pinnum = 31 + func_sel = AM_HAL_PIN_31_GPIO + drvstrength = 2 + GPinput = true + # todo: move to analog input capabilities + +# ***************************************************************************** +# MicroMod SDIO +# ***************************************************************************** +pin + name = SDIO_CLK + desc = I/O Master 0 SPI SCK signal. + pinnum = 5 + func_sel = AM_HAL_PIN_5_M0SCK + drvstrength = 12 + IOMnum = 0 + +pin + name = SDIO_CMD + desc = I/O Master 0 SPI SDO signal. + pinnum = 7 + func_sel = AM_HAL_PIN_7_M0MOSI + drvstrength = 12 + IOMnum = 0 + +pin + name = SDIO_DATA0 + desc = I/O Master 0 SPI SDI signal. + pinnum = 6 + func_sel = AM_HAL_PIN_6_M0MISO + IOMnum = 0 + +pin + name = SDIO_DATA1 + desc = QSPI data1 signal + pinnum = 26 + func_sel = AM_HAL_PIN_26_MSPI1 + +pin + name = SDIO_DATA2 + desc = QSPI data2 signal + pinnum = 4 + func_sel = AM_HAL_PIN_4_MSPI2 + +pin + name = SDIO_DATA3 + desc = QSPI data3 signal + pinnum = 23 + func_sel = AM_HAL_PIN_23_MSPI3 + +# ***************************************************************************** +# MicroMod SPI +# ***************************************************************************** +pin + name = SPI_SDI + desc = I/O Master 3 SPI SDI signal. + pinnum = 43 + func_sel = AM_HAL_PIN_43_M3MISO + IOMnum = 3 + +pin + name = SPI_SDO + desc = I/O Master 3 SPI SDO signal. + pinnum = 38 + func_sel = AM_HAL_PIN_38_M3MOSI + drvstrength = 12 + IOMnum = 3 + +pin + name = SPI_SCK + desc = I/O Master 3 SPI SCK signal. + pinnum = 42 + func_sel = AM_HAL_PIN_42_M3SCK + drvstrength = 12 + IOMnum = 3 + +pin + name = SPI_CS + desc = SPI CS signal + pinnum = 41 + func_sel = AM_HAL_PIN_41_NCE41 + IOMnum = 3 + CEnum = 0 + CEpol = LOW + +pin + name = SPI_SDI1 + desc = I/O Master 0 SPI SDI signal. + pinnum = 6 + func_sel = AM_HAL_PIN_6_M0MISO + IOMnum = 0 + +pin + name = SPI_SDO1 + desc = I/O Master 0 SPI SDO signal. + pinnum = 7 + func_sel = AM_HAL_PIN_7_M0MOSI + drvstrength = 12 + IOMnum = 0 + +pin + name = SPI_SCK1 + desc = I/O Master 0 SPI SCK signal. + pinnum = 5 + func_sel = AM_HAL_PIN_5_M0SCK + drvstrength = 12 + IOMnum = 0 + +pin + name = SPI_CS1 + desc = SPI1 CS signal + pinnum = 23 + func_sel = AM_HAL_PIN_23_NCE23 + IOMnum = 0 + CEnum = 0 + CEpol = LOW + +# ***************************************************************************** +# MicroMod Analog +# ***************************************************************************** +pin + name = A0 + pinnum = 32 + func_sel = AM_HAL_PIN_32_GPIO + drvstrength = 2 + GPinput = true + # todo: set up analog input capabilities + +pin + name = A1 + pinnum = 35 + func_sel = AM_HAL_PIN_35_GPIO + drvstrength = 2 + GPinput = true + # todo: set up analog input capabilities + +# ***************************************************************************** +# MicroMod PWM +# ***************************************************************************** +pin + name = PWM0 + pinnum = 44 + func_sel = AM_HAL_PIN_44_CTIM20 + drvstrength = 2 + GPinput = false + # todo: set up pwm output capabilities + +pin + name = PWM1 + pinnum = 45 + func_sel = AM_HAL_PIN_45_CTIM22 + drvstrength = 2 + GPinput = false + # todo: set up pwm output capabilities + +# ***************************************************************************** +# MicroMod Digital +# ***************************************************************************** +pin + name = D0 + pinnum = 0 + func_sel = AM_HAL_PIN_0_GPIO + drvstrength = 12 + GPinput = false + +pin + name = D1 + pinnum = 1 + func_sel = AM_HAL_PIN_1_GPIO + drvstrength = 12 + GPinput = false + +# ***************************************************************************** +# MicroMod UART +# ***************************************************************************** +pin + name = TX1 + desc = This pin is the UART1 transmit pin. + pinnum = 12 + func_sel = AM_HAL_PIN_12_UART1TX + drvstrength = 2 + +pin + name = RX1 + desc = This pin is the UART1 receive pin. + pinnum = 25 + func_sel = AM_HAL_PIN_25_UART1RX + +pin + name = RTS1 + desc = This pin is the UART1 rts pin. + pinnum = 10 + func_sel = AM_HAL_PIN_10_UART1RTS + +pin + name = CTS1 + desc = This pin is the UART1 cts pin. + pinnum = 17 + func_sel = AM_HAL_PIN_17_UART1CTS + +# ***************************************************************************** +# MicroMod GPIO / BUS +# ***************************************************************************** +pin + name = G0 + pinnum = 16 + func_sel = AM_HAL_PIN_16_GPIO + drvstrength = 12 + GPinput = true + +pin + name = G1 + pinnum = 33 + func_sel = AM_HAL_PIN_33_GPIO + drvstrength = 12 + GPinput = true + +pin + name = G2 + pinnum = 34 + func_sel = AM_HAL_PIN_34_GPIO + drvstrength = 12 + GPinput = true + +pin + name = G3 + pinnum = 27 + func_sel = AM_HAL_PIN_27_GPIO + drvstrength = 12 + GPinput = true + +pin + name = G4 + pinnum = 28 + func_sel = AM_HAL_PIN_28_GPIO + drvstrength = 12 + GPinput = true + +pin + name = G5 + pinnum = 29 + func_sel = AM_HAL_PIN_29_GPIO + drvstrength = 12 + GPinput = true + +pin + name = G6 + pinnum = 14 + func_sel = AM_HAL_PIN_14_GPIO + drvstrength = 12 + GPinput = true + +pin + name = G7 + pinnum = 15 + func_sel = AM_HAL_PIN_15_GPIO + drvstrength = 12 + GPinput = true + +pin + name = G9 + pinnum = 12 + func_sel = AM_HAL_PIN_12_GPIO + drvstrength = 12 + GPinput = true + +pin + name = G10 + pinnum = 13 + func_sel = AM_HAL_PIN_13_GPIO + drvstrength = 12 + GPinput = true + + + + +# ***************************************************************************** +# +# SFE BSPs +# +# ***************************************************************************** + +# ***************************************************************************** +# PDM Microphone Lines +# ***************************************************************************** +pin + name = MIC_DATA + desc = Data line for PDM microphones + pinnum = 36 + func_sel = AM_HAL_PIN_36_PDMDATA + +pin + name = MIC_CLK + desc = Clock line for PDM microphones + pinnum = 37 + func_sel = AM_HAL_PIN_37_PDMCLK + + +# ***************************************************************************** +# LEDs and buttons +# ***************************************************************************** +pin + name = LED_BLUE + desc = The BLUE LED labeled STAT + pinnum = 19 + func_sel = AM_HAL_PIN_19_GPIO + drvstrength = 12 + + +# ***************************************************************************** +# COM UART pins (UART0). +# ***************************************************************************** +pin + name = COM_UART_TX + desc = This pin is the COM_UART transmit pin. + pinnum = 48 + func_sel = AM_HAL_PIN_48_UART0TX + drvstrength = 2 + +pin + name = COM_UART_RX + desc = This pin is the COM_UART receive pin. + pinnum = 49 + func_sel = AM_HAL_PIN_49_UART0RX + + +# ***************************************************************************** +# IOM0 pins. +# ***************************************************************************** +pin + name = IOM0_CS + desc = I/O Master 0 chip select. + pinnum = 11 + func_sel = AM_HAL_PIN_11_NCE11 + drvstrength = 12 + intdir = lo2hi + GPOutcfg = pushpull + GPinput = false + IOMnum = 0 + CEnum = 0 + CEpol = low + +pin + name = IOM0_CS3 + desc = I/O Master 0 chip select. + pinnum = 15 + func_sel = AM_HAL_PIN_15_NCE15 + drvstrength = 12 + intdir = lo2hi + GPOutcfg = pushpull + GPinput = false + IOMnum = 0 + CEnum = 3 + CEpol = low + +pin + name = IOM0_MISO + desc = I/O Master 0 SPI MISO signal. + pinnum = 6 + func_sel = AM_HAL_PIN_6_M0MISO + IOMnum = 0 + +pin + name = IOM0_MOSI + desc = I/O Master 0 SPI MOSI signal. + pinnum = 7 + func_sel = AM_HAL_PIN_7_M0MOSI + drvstrength = 12 + IOMnum = 0 + +pin + name = IOM0_SCK + desc = I/O Master 0 SPI SCK signal. + pinnum = 5 + func_sel = AM_HAL_PIN_5_M0SCK + drvstrength = 12 + IOMnum = 0 + +pin + name = IOM0_SCL + desc = I/O Master 0 I2C clock signal. + pinnum = 5 + func_sel = AM_HAL_PIN_5_M0SCL + GPOutcfg = opendrain + drvstrength = 12 + pullup = 1_5K + IOMnum = 0 + +pin + name = IOM0_SDA + desc = I/O Master 0 I2C data signal. + pinnum = 6 + func_sel = AM_HAL_PIN_6_M0SDAWIR3 + GPOutcfg = opendrain + drvstrength = 12 + pullup = 1_5K + IOMnum = 0 + +# ***************************************************************************** +# IOM1 pins. +# ***************************************************************************** +pin + name = IOM1_CS + desc = I/O Master 1 chip select. + pinnum = 14 + func_sel = AM_HAL_PIN_14_NCE14 + drvstrength = 12 + intdir = lo2hi + GPOutcfg = pushpull + GPinput = false + IOMnum = 1 + CEnum = 2 + CEpol = low + +pin + name = IOM1_MISO + desc = I/O Master 1 SPI MISO signal. + pinnum = 9 + func_sel = AM_HAL_PIN_9_M1MISO + IOMnum = 1 + +pin + name = IOM1_MOSI + desc = I/O Master 1 SPI MOSI signal. + pinnum = 10 + func_sel = AM_HAL_PIN_10_M1MOSI + drvstrength = 12 + IOMnum = 1 + +pin + name = IOM1_SCK + desc = I/O Master 1 SPI SCK signal. + pinnum = 8 + func_sel = AM_HAL_PIN_8_M1SCK + drvstrength = 12 + IOMnum = 1 + +pin + name = IOM1_SCL + desc = I/O Master 1 I2C clock signal. + pinnum = 8 + func_sel = AM_HAL_PIN_8_M1SCL + GPOutcfg = opendrain + drvstrength = 12 + pullup = 1_5K + IOMnum = 1 + +pin + name = IOM1_SDA + desc = I/O Master 1 I2C data signal. + pinnum = 9 + func_sel = AM_HAL_PIN_9_M1SDAWIR3 + GPOutcfg = opendrain + drvstrength = 12 + pullup = 1_5K + IOMnum = 1 + +# ***************************************************************************** +# IOM2 pins. +# ***************************************************************************** +pin + name = IOM2_CS + desc = I/O Master 2 chip select. + pinnum = 15 + func_sel = AM_HAL_PIN_15_NCE15 + drvstrength = 12 + intdir = lo2hi + GPOutcfg = pushpull + GPinput = false + IOMnum = 2 + CEnum = 3 + CEpol = low + +pin + name = IOM2_MISO + desc = I/O Master 2 SPI MISO signal. + pinnum = 25 + func_sel = AM_HAL_PIN_25_M2MISO + IOMnum = 2 + +pin + name = IOM2_MOSI + desc = I/O Master 2 SPI MOSI signal. + pinnum = 28 + func_sel = AM_HAL_PIN_28_M2MOSI + drvstrength = 12 + IOMnum = 2 + +pin + name = IOM2_SCK + desc = I/O Master 2 SPI SCK signal. + pinnum = 27 + func_sel = AM_HAL_PIN_27_M2SCK + drvstrength = 12 + IOMnum = 2 + +pin + name = IOM2_SCL + desc = I/O Master 2 I2C clock signal. + pinnum = 27 + func_sel = AM_HAL_PIN_27_M2SCL + GPOutcfg = opendrain + drvstrength = 12 + pullup = 1_5K + IOMnum = 2 + +pin + name = IOM2_SDA + desc = I/O Master 2 I2C data signal. + pinnum = 25 + func_sel = AM_HAL_PIN_25_M2SDAWIR3 + GPOutcfg = opendrain + drvstrength = 12 + pullup = 1_5K + IOMnum = 2 + +# ***************************************************************************** +# IOM3 pins. +# ***************************************************************************** +pin + name = IOM3_CS + desc = I/O Master 3 chip select. + pinnum = 12 + func_sel = AM_HAL_PIN_12_NCE12 + drvstrength = 12 + intdir = lo2hi + GPOutcfg = pushpull + GPinput = false + IOMnum = 3 + CEnum = 0 + CEpol = low + +pin + name = IOM3_MISO + desc = I/O Master 3 SPI MISO signal. + pinnum = 43 + func_sel = AM_HAL_PIN_43_M3MISO + IOMnum = 3 + +pin + name = IOM3_MOSI + desc = I/O Master 3 SPI MOSI signal. + pinnum = 38 + func_sel = AM_HAL_PIN_38_M3MOSI + drvstrength = 12 + IOMnum = 3 + +pin + name = IOM3_SCK + desc = I/O Master 3 SPI SCK signal. + pinnum = 42 + func_sel = AM_HAL_PIN_42_M3SCK + drvstrength = 12 + IOMnum = 3 + +pin + name = IOM3_SCL + desc = I/O Master 3 I2C clock signal. + pinnum = 42 + func_sel = AM_HAL_PIN_42_M3SCL + GPOutcfg = opendrain + drvstrength = 12 + pullup = 1_5K + IOMnum = 3 + +pin + name = IOM3_SDA + desc = I/O Master 3 I2C data signal. + pinnum = 43 + func_sel = AM_HAL_PIN_43_M3SDAWIR3 + GPOutcfg = opendrain + drvstrength = 12 + pullup = 1_5K + IOMnum = 3 + +# ***************************************************************************** +# IOM4 pins. +# ***************************************************************************** +pin + name = IOM4_CS + desc = I/O Master 4 chip select. + pinnum = 13 + func_sel = AM_HAL_PIN_13_NCE13 + drvstrength = 12 + intdir = lo2hi + GPOutcfg = pushpull + GPinput = false + IOMnum = 4 + CEnum = 1 + CEpol = low + +pin + name = IOM4_MISO + desc = I/O Master 4 SPI MISO signal. + pinnum = 40 + func_sel = AM_HAL_PIN_40_M4MISO + IOMnum = 4 + +pin + name = IOM4_MOSI + desc = I/O Master 4 SPI MOSI signal. + pinnum = 44 + func_sel = AM_HAL_PIN_44_M4MOSI + drvstrength = 12 + IOMnum = 4 + +pin + name = IOM4_SCK + desc = I/O Master 4 SPI SCK signal. + pinnum = 39 + func_sel = AM_HAL_PIN_39_M4SCK + drvstrength = 12 + IOMnum = 4 + +pin + name = IOM4_SCL + desc = I/O Master 4 I2C clock signal. + pinnum = 39 + func_sel = AM_HAL_PIN_39_M4SCL + GPOutcfg = opendrain + drvstrength = 12 + pullup = 1_5K + IOMnum = 4 + +pin + name = IOM4_SDA + desc = I/O Master 4 I2C data signal. + pinnum = 40 + func_sel = AM_HAL_PIN_40_M4SDAWIR3 + GPOutcfg = opendrain + drvstrength = 12 + pullup = 1_5K + IOMnum = 4 + +# ***************************************************************************** +# IOM5 pins. +# ***************************************************************************** +pin + name = IOM5_CS + desc = I/O Master 5 chip select. + pinnum = 16 + func_sel = AM_HAL_PIN_16_NCE16 + drvstrength = 12 + intdir = lo2hi + GPOutcfg = pushpull + GPinput = false + IOMnum = 5 + CEnum = 0 + CEpol = low + +pin + name = IOM5_MISO + desc = I/O Master 5 SPI MISO signal. + pinnum = 49 + func_sel = AM_HAL_PIN_49_M5MISO + IOMnum = 5 + +pin + name = IOM5_MOSI + desc = I/O Master 5 SPI MOSI signal. + pinnum = 47 + func_sel = AM_HAL_PIN_47_M5MOSI + drvstrength = 12 + IOMnum = 5 + +pin + name = IOM5_SCK + desc = I/O Master 5 SPI SCK signal. + pinnum = 48 + func_sel = AM_HAL_PIN_48_M5SCK + drvstrength = 12 + IOMnum = 5 + +pin + name = IOM5_SCL + desc = I/O Master 5 I2C clock signal. + pinnum = 48 + func_sel = AM_HAL_PIN_48_M5SCL + GPOutcfg = opendrain + drvstrength = 12 + pullup = 1_5K + IOMnum = 5 + +pin + name = IOM5_SDA + desc = I/O Master 5 I2C data signal. + pinnum = 49 + func_sel = AM_HAL_PIN_49_M5SDAWIR3 + GPOutcfg = opendrain + drvstrength = 12 + pullup = 1_5K + IOMnum = 5 + +# ***************************************************************************** +# MSPI pins. +# ***************************************************************************** +pin + name = MSPI_CE0 + desc = MSPI chip select. + pinnum = 19 + func_sel = AM_HAL_PIN_19_NCE19 + drvstrength = 12 + intdir = lo2hi + GPOutcfg = pushpull + GPinput = false + IOMnum = 6 + CEnum = 0 + CEpol = low + +pin + name = MSPI_CE1 + desc = MSPI chip select. + pinnum = 41 + func_sel = AM_HAL_PIN_41_NCE41 + drvstrength = 12 + intdir = lo2hi + GPOutcfg = pushpull + GPinput = false + IOMnum = 6 + CEnum = 1 + CEpol = low + +pin + name = MSPI_D0 + desc = MSPI data 0. + pinnum = 22 + func_sel = AM_HAL_PIN_22_MSPI0 + drvstrength = 8 + intdir = lo2hi + IOMnum = 6 + +pin + name = MSPI_D1 + desc = MSPI data 1. + pinnum = 26 + func_sel = AM_HAL_PIN_26_MSPI1 + drvstrength = 8 + intdir = lo2hi + IOMnum = 6 + +pin + name = MSPI_D2 + desc = MSPI data 2. + pinnum = 4 + func_sel = AM_HAL_PIN_4_MSPI2 + drvstrength = 8 + intdir = lo2hi + IOMnum = 6 + +pin + name = MSPI_D3 + desc = MSPI data 3. + pinnum = 23 + func_sel = AM_HAL_PIN_23_MSPI3 + drvstrength = 8 + intdir = lo2hi + IOMnum = 6 + +pin + name = MSPI_D4 + desc = MSPI data 4. + pinnum = 0 + func_sel = AM_HAL_PIN_0_MSPI4 + drvstrength = 8 + intdir = lo2hi + IOMnum = 6 + +pin + name = MSPI_D5 + desc = MSPI data 5. + pinnum = 1 + func_sel = AM_HAL_PIN_1_MSPI5 + drvstrength = 8 + intdir = lo2hi + IOMnum = 6 + +pin + name = MSPI_D6 + desc = MSPI data 6. + pinnum = 2 + func_sel = AM_HAL_PIN_2_MSPI6 + drvstrength = 8 + intdir = lo2hi + IOMnum = 6 + +pin + name = MSPI_D7 + desc = MSPI data 7. + pinnum = 3 + func_sel = AM_HAL_PIN_3_MSPI7 + drvstrength = 8 + intdir = lo2hi + IOMnum = 6 + +pin + name = MSPI_SCK + desc = MSPI clock. + pinnum = 24 + func_sel = AM_HAL_PIN_24_MSPI8 + drvstrength = 12 + intdir = lo2hi + IOMnum = 6 + + +# ***************************************************************************** +# IOS pins. +# ***************************************************************************** +pin + name = IOS_CE + desc = I/O Slave chip select. + pinnum = 3 + func_sel = AM_HAL_PIN_3_SLnCE + GPinput = true + CEnum = 0 + CEpol = low + +pin + name = IOS_MISO + desc = I/O Slave SPI MISO signal. + pinnum = 2 + func_sel = AM_HAL_PIN_2_SLMISO + drvstrength = 12 + +pin + name = IOS_MOSI + desc = I/O Slave SPI MOSI signal. + pinnum = 1 + func_sel = AM_HAL_PIN_1_SLMOSI + GPinput = true + +pin + name = IOS_SCK + desc = I/O Slave SPI SCK signal. + pinnum = 0 + func_sel = AM_HAL_PIN_0_SLSCK + GPinput = true + +pin + name = IOS_SCL + desc = I/O Slave I2C clock signal. + pinnum = 0 + func_sel = AM_HAL_PIN_0_SLSCL + GPinput = true + +pin + name = IOS_SDA + desc = I/O Slave I2C data signal. + pinnum = 1 + func_sel = AM_HAL_PIN_1_SLSDAWIR3 + GPOutcfg = opendrain + pullup = 1_5K + +# ***************************************************************************** +# ITM pins. +# ***************************************************************************** +pin + name = ITM_SWO + desc = ITM Serial Wire Output. + pinnum = 22 + func_sel = AM_HAL_PIN_22_SWO + drvstrength = 2 + +# ***************************************************************************** +# CORE pins. +# ***************************************************************************** +pin + name = SWDCK + desc = Cortex Serial Wire DCK. + pinnum = 20 + func_sel = AM_HAL_PIN_20_SWDCK + +pin + name = SWDIO + desc = Cortex Serial Wire DIO. + pinnum = 21 + func_sel = AM_HAL_PIN_21_SWDIO diff --git a/artemis_mm_pb/bsp/gcc/Makefile b/artemis_mm_pb/bsp/gcc/Makefile new file mode 100644 index 0000000..ed568cd --- /dev/null +++ b/artemis_mm_pb/bsp/gcc/Makefile @@ -0,0 +1,151 @@ +#****************************************************************************** +# +# Makefile - Rules for building the libraries, examples and docs. +# +# Copyright (c) 2019, Ambiq Micro +# All rights reserved. +# +# Redistribution and use in source and binary forms, with or without +# modification, are permitted provided that the following conditions are met: +# +# 1. Redistributions of source code must retain the above copyright notice, +# this list of conditions and the following disclaimer. +# +# 2. Redistributions in binary form must reproduce the above copyright +# notice, this list of conditions and the following disclaimer in the +# documentation and/or other materials provided with the distribution. +# +# 3. Neither the name of the copyright holder nor the names of its +# contributors may be used to endorse or promote products derived from this +# software without specific prior written permission. +# +# Third party software included in this distribution is subject to the +# additional license terms as defined in the /docs/licenses directory. +# +# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" +# AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE +# IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE +# ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE +# LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR +# CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF +# SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS +# INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN +# CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) +# ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE +# POSSIBILITY OF SUCH DAMAGE. +# +# This is part of revision 2.1.0 of the AmbiqSuite Development Package. +# +#****************************************************************************** + +# Pull in exported paths +SDKPATH?=../../../.. +BOARDPATH?=../.. + +TARGET := libam_bsp +COMPILERNAME := gcc +PROJECT := libam_bsp_gcc +CONFIG := bin + +SHELL:=/bin/bash +#### Setup #### + +TOOLCHAIN ?= arm-none-eabi +PART = apollo3 +CPU = cortex-m4 +FPU = fpv4-sp-d16 +# Default to FPU hardware calling convention. However, some customers and/or +# applications may need the software calling convention. +#FABI = softfp +FABI = hard + +#### Required Executables #### +CC = $(TOOLCHAIN)-gcc +GCC = $(TOOLCHAIN)-gcc +CPP = $(TOOLCHAIN)-cpp +LD = $(TOOLCHAIN)-ld +CP = $(TOOLCHAIN)-objcopy +OD = $(TOOLCHAIN)-objdump +RD = $(TOOLCHAIN)-readelf +AR = $(TOOLCHAIN)-ar +SIZE = $(TOOLCHAIN)-size +RM = $(shell which rm 2>/dev/null) + +EXECUTABLES = CC LD CP OD AR RD SIZE GCC +K := $(foreach exec,$(EXECUTABLES),\ + $(if $(shell which $($(exec)) 2>/dev/null),,\ + $(info $(exec) not found on PATH ($($(exec))).)$(exec))) +$(if $(strip $(value K)),$(info Required Program(s) $(strip $(value K)) not found)) + +ifneq ($(strip $(value K)),) +all clean: + $(info Tools $(TOOLCHAIN)-$(COMPILERNAME) not installed.) + $(RM) -rf bin +else + +DEFINES = -DAM_PACKAGE_BGA +DEFINES+= -DAM_PART_APOLLO3 + +INCLUDES = -I$(SDKPATH)/utils +INCLUDES+= -I$(SDKPATH)/CMSIS/AmbiqMicro/Include +INCLUDES+= -I$(SDKPATH)/devices +INCLUDES+= -I$(SDKPATH)/mcu/apollo3 +INCLUDES+= -I$(SDKPATH)/CMSIS/ARM/Include + +VPATH = .. + +SRC = am_bsp.c +SRC += am_bsp_pins.c + +CSRC = $(filter %.c,$(SRC)) +ASRC = $(filter %.s,$(SRC)) + +OBJS = $(CSRC:%.c=$(CONFIG)/%.o) +OBJS+= $(ASRC:%.s=$(CONFIG)/%.o) + +DEPS = $(CSRC:%.c=$(CONFIG)/%.d) +DEPS+= $(ASRC:%.s=$(CONFIG)/%.d) + +CFLAGS = -mthumb -mcpu=$(CPU) -mfpu=$(FPU) -mfloat-abi=$(FABI) +CFLAGS+= -ffunction-sections -fdata-sections +CFLAGS+= -MMD -MP -std=c99 -Wall +# Libraries O3 for production, examples O0 for debug. +CFLAGS+= -O3 +CFLAGS+= $(DEFINES) +CFLAGS+= $(INCLUDES) +CFLAGS+= + +# Additional user specified CFLAGS +CFLAGS+=$(EXTRA_CFLAGS) + +ODFLAGS = -S + +#### Rules #### +all: directories $(CONFIG)/$(TARGET).a + +directories: + @mkdir -p $(CONFIG) + +$(CONFIG)/%.o: %.c $(CONFIG)/%.d $(INCS) + @echo " Compiling $(COMPILERNAME) $<" ;\ + $(CC) -c $(CFLAGS) $< -o $@ + +$(CONFIG)/%.o: %.s $(CONFIG)/%.d $(INCS) + @echo " Assembling $(COMPILERNAME) $<" ;\ + $(CC) -c $(CFLAGS) $< -o $@ + +$(CONFIG)/$(TARGET).a: $(OBJS) + @echo " Library $(COMPILERNAME) $@" ;\ + $(AR) rsvc $@ $(OBJS) + +clean: + @echo "Cleaning..." ;\ + $(RM) -f $(OBJS) $(DEPS) \ + $(CONFIG)/$(TARGET).a + +$(CONFIG)/%.d: ; + +# Automatically include any generated dependencies +-include $(DEPS) +endif +.PHONY: all clean directories diff --git a/artemis_mm_pb/bsp/gcc/bin/libam_bsp.a b/artemis_mm_pb/bsp/gcc/bin/libam_bsp.a new file mode 100644 index 0000000..3294521 Binary files /dev/null and b/artemis_mm_pb/bsp/gcc/bin/libam_bsp.a differ diff --git a/common/tools_sfe/asb b/common/tools_sfe/asb index 1afa180..90b4b1e 160000 --- a/common/tools_sfe/asb +++ b/common/tools_sfe/asb @@ -1 +1 @@ -Subproject commit 1afa18014cadb9d28de2624a6f198b81172b0236 +Subproject commit 90b4b1e9d2d2da82b8d7aa26d6fe250167ea8840 diff --git a/common/tools_sfe/scripts/configuration/boards.sh b/common/tools_sfe/scripts/configuration/boards.sh index cbdac92..9e82a9c 100644 --- a/common/tools_sfe/scripts/configuration/boards.sh +++ b/common/tools_sfe/scripts/configuration/boards.sh @@ -1 +1 @@ -export BOARDS="edge edge2 artemis_module artemis_thing_plus redboard_artemis redboard_artemis_atp redboard_artemis_nano artemis_dk" +export BOARDS="edge edge2 artemis_module artemis_thing_plus redboard_artemis redboard_artemis_atp redboard_artemis_nano artemis_dk artemis_mm_pb"