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Query about exception handling #4

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bit-hack opened this issue Dec 16, 2024 · 3 comments
Open

Query about exception handling #4

bit-hack opened this issue Dec 16, 2024 · 3 comments

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@bit-hack
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I am looking for some clarification with regards to recording exception handling.

I am running the following test program, and trying to produce an STF trace file when executing it:

0000000000001000 <_start>:
    1000:	00000097            auipc   ra,0x0
    1004:	01008093            addi    ra,ra,16 # 1010 <_start+0x10>
    1008:	30509073            csrw    mtvec,ra
    100c:	9002                ebreak
    100e:	a001                j       100e <_start+0xe>
    1010:	341020f3            csrr    ra,mepc
    1014:	0089                addi    ra,ra,2
    1016:	34109073            csrw    mepc,ra
    101a:	30200073            mret

Currently I produce the following STF records for the program (HRG isn't shown):

      STF_INST_REG 1 49(DST|GPR) 0x1000
 STF_INST_OPCODE32 0x00000097
      STF_INST_REG 1 49(DST|GPR) 0x1010
 STF_INST_OPCODE32 0x01008093
      STF_INST_REG 773 52(DST|CSR) 0x1010
 STF_INST_OPCODE32 0x30509073
      STF_INST_REG 768 52(DST|CSR) 0xa00001800
      STF_INST_REG 833 52(DST|CSR) 0x100c
      STF_INST_REG 834 52(DST|CSR) 0x3
      STF_INST_REG 835 52(DST|CSR) 0x100c
 STF_INST_OPCODE16 0x9002
      STF_FORCE_PC 0x1010                         <---- control flow change to MTVEC due to ebreak
      STF_INST_REG 1 49(DST|GPR) 0x100c
 STF_INST_OPCODE32 0x341020f3
      STF_INST_REG 1 49(DST|GPR) 0x100e
 STF_INST_OPCODE16 0x0089
      STF_INST_REG 833 52(DST|CSR) 0x100e
 STF_INST_OPCODE32 0x34109073
      STF_INST_REG 768 52(DST|CSR) 0xa00000080
STF_INST_PC_TARGET 0x100e
 STF_INST_OPCODE32 0x30200073
STF_INST_PC_TARGET 0x100e
 STF_INST_OPCODE16 0xa001
STF_INST_PC_TARGET 0x100e
 STF_INST_OPCODE16 0xa001
STF_INST_PC_TARGET 0x100e
 STF_INST_OPCODE16 0xa001

Once the ebreak instruction executes, an exception is raised and the processor will change control flow to the MTVEC address 0x1010.
I have use an STF_FORCE_PC record to describe this change of control flow.

There are a few things in the spec which are not clear to me:

From the "Terminology / Definitions" section of the spec:

COF is logged in the trace using the STF_INST_PC_TARGET record for deterministic and with STF_FORCE_PC, STF_INST_EXCEPTION_PC_TARGET and STF_EVENT_PC_TARGET for non-deterministic cases.
...
Non-deterministic COF cases: These COF cases happen due to interruptions in a program thread due to exceptions being raised either by the program thread context itself or due to external interruptions.

This makes it seem like STF_FORCE_PC can be used to describe this.
I cant find any other mention of the STF_INST_EXCEPTION_PC_TARGET or STF_EVENT_PC_TARGET records, are they from an older version?

My STF file seems to parse okay through the stf_dump utility, however stf_check is less happy with this:

stf_check -n trace.stf 
...
stf_check: ERROR PC_DISCONTINUITY: PC discontinuity found between instruction #4 and 5 first pc value: 000000000000100c second pc value: 0000000000001010

The stf_check tool doesn't seems to take into account an STF_FORCE_PC record during its valid_jump check here: https://github.com/sparcians/stf_tools/blob/ddbdc3598bdcec9e5136f16531a8e29a88b94af4/tools/stf_check/stf_check.cpp#L317
Only events seem to be factored in here, is there just a missing piece of logic here, or is my approach just wrong?

Attached is a .zip version of my trace.stf file used in this issue:
trace.zip

Your help would be appreciated, thanks!

@bdutro
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bdutro commented Dec 16, 2024

To record an exception, you need to issue two records:

This is also the preferred method for recording execution mode changes that aren't caused by an exception (e.g. ecall/sret/mret/etc.), but in this case the EventRecord should have a type of STF_EVENT_MODE_CHANGE.

@bdutro
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bdutro commented Dec 16, 2024

I cant find any other mention of the STF_INST_EXCEPTION_PC_TARGET or STF_EVENT_PC_TARGET records, are they from an older version?

STF_INST_EXCEPTION_PC_TARGET is from a deprecated version of the spec. I'll remove it from the documentation.

@bit-hack
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Thanks for clarifying, I'll update my code to use the EVENT records and see how I get on 👍

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