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In the DMA channel CFG register there are two fields: DST_PER (bit pos 44) and SRC_PER (bit pos. 39). Also called as DMA hanshaking interface. They are probably 5-bit wide, and probably every peripheral require a specific number here. For example for the UART3_TX you need DST_PER=19 (i have tested this one). For SPI2_TX it is maybe 5 (i did not tes this yet).
This information is crucial to use the DMA properly. Could you add this to the reference manual?
Is there any source available somwhere with this information?
br.
nvitya
The text was updated successfully, but these errors were encountered:
Hi,
In the DMA channel CFG register there are two fields: DST_PER (bit pos 44) and SRC_PER (bit pos. 39). Also called as DMA hanshaking interface. They are probably 5-bit wide, and probably every peripheral require a specific number here. For example for the UART3_TX you need DST_PER=19 (i have tested this one). For SPI2_TX it is maybe 5 (i did not tes this yet).
This information is crucial to use the DMA properly. Could you add this to the reference manual?
Is there any source available somwhere with this information?
br.
nvitya
The text was updated successfully, but these errors were encountered: