From 0206859f77c12ded5b28ecbe041aa11bdc4e0b5d Mon Sep 17 00:00:00 2001 From: Benjamin Reese Date: Mon, 29 Apr 2024 11:14:45 -0700 Subject: [PATCH] Run clang-format --- include/rogue/hardware/drivers/AxisDriver.h | 30 +- include/rogue/hardware/drivers/DmaDriver.h | 563 +++++++++--------- src/rogue/interfaces/ZmqClient.cpp | 27 +- src/rogue/interfaces/memory/Variable.cpp | 109 ++-- src/rogue/interfaces/stream/Slave.cpp | 2 +- .../protocols/packetizer/ControllerV2.cpp | 5 +- tests/api_test/src/api_test.cpp | 59 +- 7 files changed, 404 insertions(+), 391 deletions(-) diff --git a/include/rogue/hardware/drivers/AxisDriver.h b/include/rogue/hardware/drivers/AxisDriver.h index 104b98289..21107b3d5 100644 --- a/include/rogue/hardware/drivers/AxisDriver.h +++ b/include/rogue/hardware/drivers/AxisDriver.h @@ -25,8 +25,8 @@ #include "DmaDriver.h" // Command definitions -#define AXIS_Read_Ack 0x2001 // Command to acknowledge read -#define AXIS_Write_ReqMissed 0x2002 // Command to indicate a missed write request +#define AXIS_Read_Ack 0x2001 // Command to acknowledge read +#define AXIS_Write_ReqMissed 0x2002 // Command to indicate a missed write request // Only define the following if not compiling for kernel space #ifndef DMA_IN_KERNEL @@ -41,14 +41,14 @@ * @return The combined flags value. */ static inline uint32_t axisSetFlags(uint32_t fuser, uint32_t luser, uint32_t cont) { - uint32_t flags; + uint32_t flags; - // Set flags based on input parameters, ensuring each is in its correct position - flags = fuser & 0xFF; // First user-defined flag - flags |= (luser << 8) & 0xFF00; // Last user-defined flag - flags |= (cont << 16) & 0x10000; // Continuation flag + // Set flags based on input parameters, ensuring each is in its correct position + flags = fuser & 0xFF; // First user-defined flag + flags |= (luser << 8) & 0xFF00; // Last user-defined flag + flags |= (cont << 16) & 0x10000; // Continuation flag - return flags; + return flags; } /** @@ -59,7 +59,7 @@ static inline uint32_t axisSetFlags(uint32_t fuser, uint32_t luser, uint32_t con * @return The first user-defined flag. */ static inline uint32_t axisGetFuser(uint32_t flags) { - return flags & 0xFF; + return flags & 0xFF; } /** @@ -70,7 +70,7 @@ static inline uint32_t axisGetFuser(uint32_t flags) { * @return The last user-defined flag. */ static inline uint32_t axisGetLuser(uint32_t flags) { - return (flags >> 8) & 0xFF; + return (flags >> 8) & 0xFF; } /** @@ -81,7 +81,7 @@ static inline uint32_t axisGetLuser(uint32_t flags) { * @return The continuation flag. */ static inline uint32_t axisGetCont(uint32_t flags) { - return (flags >> 16) & 0x1; + return (flags >> 16) & 0x1; } /** @@ -90,7 +90,7 @@ static inline uint32_t axisGetCont(uint32_t flags) { * @param fd File descriptor for the AXIS device. */ static inline void axisReadAck(int32_t fd) { - ioctl(fd, AXIS_Read_Ack, 0); + ioctl(fd, AXIS_Read_Ack, 0); } /** @@ -99,8 +99,8 @@ static inline void axisReadAck(int32_t fd) { * @param fd File descriptor for the AXIS device. */ static inline void axisWriteReqMissed(int32_t fd) { - ioctl(fd, AXIS_Write_ReqMissed, 0); + ioctl(fd, AXIS_Write_ReqMissed, 0); } -#endif // !DMA_IN_KERNEL -#endif // __ASIS_DRIVER_H__ +#endif // !DMA_IN_KERNEL +#endif // __ASIS_DRIVER_H__ diff --git a/include/rogue/hardware/drivers/DmaDriver.h b/include/rogue/hardware/drivers/DmaDriver.h index d07214c92..accc3bb94 100644 --- a/include/rogue/hardware/drivers/DmaDriver.h +++ b/include/rogue/hardware/drivers/DmaDriver.h @@ -17,19 +17,19 @@ * copied, modified, propagated, or distributed except according to the terms * contained in the LICENSE.txt file. * ---------------------------------------------------------------------------- -**/ + **/ #ifndef __DMA_DRIVER_H__ #define __DMA_DRIVER_H__ #ifdef DMA_IN_KERNEL - #include +#include #else - #include +#include #endif /* API Version */ -#define DMA_VERSION 0x06 +#define DMA_VERSION 0x06 /* Error values */ #define DMA_ERR_FIFO 0x01 @@ -38,29 +38,29 @@ #define DMA_ERR_BUS 0x08 /* Commands */ -#define DMA_Get_Buff_Count 0x1001 -#define DMA_Get_Buff_Size 0x1002 -#define DMA_Set_Debug 0x1003 -#define DMA_Set_Mask 0x1004 -#define DMA_Ret_Index 0x1005 -#define DMA_Get_Index 0x1006 -#define DMA_Read_Ready 0x1007 -#define DMA_Set_MaskBytes 0x1008 -#define DMA_Get_Version 0x1009 -#define DMA_Write_Register 0x100A -#define DMA_Read_Register 0x100B -#define DMA_Get_RxBuff_Count 0x100C -#define DMA_Get_TxBuff_Count 0x100D -#define DMA_Get_TxBuffinUser_Count 0x100F -#define DMA_Get_TxBuffinHW_Count 0x1010 +#define DMA_Get_Buff_Count 0x1001 +#define DMA_Get_Buff_Size 0x1002 +#define DMA_Set_Debug 0x1003 +#define DMA_Set_Mask 0x1004 +#define DMA_Ret_Index 0x1005 +#define DMA_Get_Index 0x1006 +#define DMA_Read_Ready 0x1007 +#define DMA_Set_MaskBytes 0x1008 +#define DMA_Get_Version 0x1009 +#define DMA_Write_Register 0x100A +#define DMA_Read_Register 0x100B +#define DMA_Get_RxBuff_Count 0x100C +#define DMA_Get_TxBuff_Count 0x100D +#define DMA_Get_TxBuffinUser_Count 0x100F +#define DMA_Get_TxBuffinHW_Count 0x1010 #define DMA_Get_TxBuffinPreHWQ_Count 0x1011 -#define DMA_Get_TxBuffinSWQ_Count 0x1012 -#define DMA_Get_TxBuffMiss_Count 0x1013 -#define DMA_Get_RxBuffinUser_Count 0x1014 -#define DMA_Get_RxBuffinHW_Count 0x1015 +#define DMA_Get_TxBuffinSWQ_Count 0x1012 +#define DMA_Get_TxBuffMiss_Count 0x1013 +#define DMA_Get_RxBuffinUser_Count 0x1014 +#define DMA_Get_RxBuffinHW_Count 0x1015 #define DMA_Get_RxBuffinPreHWQ_Count 0x1016 -#define DMA_Get_RxBuffinSWQ_Count 0x1017 -#define DMA_Get_RxBuffMiss_Count 0x1018 +#define DMA_Get_RxBuffinSWQ_Count 0x1017 +#define DMA_Get_RxBuffMiss_Count 0x1018 /* Mask size */ #define DMA_MASK_SIZE 512 @@ -80,13 +80,13 @@ * control flags. */ struct DmaWriteData { - uint64_t data; - uint32_t dest; - uint32_t flags; - uint32_t index; - uint32_t size; - uint32_t is32; - uint32_t pad; + uint64_t data; + uint32_t dest; + uint32_t flags; + uint32_t index; + uint32_t size; + uint32_t is32; + uint32_t pad; }; /** @@ -105,14 +105,14 @@ struct DmaWriteData { * and various control flags. */ struct DmaReadData { - uint64_t data; - uint32_t dest; - uint32_t flags; - uint32_t index; - uint32_t error; - uint32_t size; - uint32_t is32; - int32_t ret; + uint64_t data; + uint32_t dest; + uint32_t flags; + uint32_t index; + uint32_t error; + uint32_t size; + uint32_t is32; + int32_t ret; }; /** @@ -124,22 +124,22 @@ struct DmaReadData { * within a DMA context. */ struct DmaRegisterData { - uint64_t address; - uint32_t data; + uint64_t address; + uint32_t data; }; // Conditional inclusion for non-kernel environments #ifndef DMA_IN_KERNEL +#include +#include #include #include -#include -#include -#include -#include +#include #include +#include #include -#include #include +#include /** * dmaWrite - Writes data to a DMA channel. @@ -156,17 +156,17 @@ struct DmaRegisterData { * * Return: Number of bytes written, or a negative error code on failure. */ -static inline ssize_t dmaWrite(int32_t fd, const void *buf, size_t size, uint32_t flags, uint32_t dest) { - struct DmaWriteData w; +static inline ssize_t dmaWrite(int32_t fd, const void* buf, size_t size, uint32_t flags, uint32_t dest) { + struct DmaWriteData w; - memset(&w, 0, sizeof(struct DmaWriteData)); - w.dest = dest; - w.flags = flags; - w.size = size; - w.is32 = (sizeof(void *) == 4); - w.data = (uint64_t)buf; + memset(&w, 0, sizeof(struct DmaWriteData)); + w.dest = dest; + w.flags = flags; + w.size = size; + w.is32 = (sizeof(void*) == 4); + w.data = (uint64_t)buf; - return(write(fd, &w, sizeof(struct DmaWriteData))); + return (write(fd, &w, sizeof(struct DmaWriteData))); } /** @@ -184,16 +184,16 @@ static inline ssize_t dmaWrite(int32_t fd, const void *buf, size_t size, uint32_ * Return: Number of bytes written, or a negative error code on failure. */ static inline ssize_t dmaWriteIndex(int32_t fd, uint32_t index, size_t size, uint32_t flags, uint32_t dest) { - struct DmaWriteData w; + struct DmaWriteData w; - memset(&w, 0, sizeof(struct DmaWriteData)); - w.dest = dest; - w.flags = flags; - w.size = size; - w.is32 = (sizeof(void *) == 4); - w.index = index; + memset(&w, 0, sizeof(struct DmaWriteData)); + w.dest = dest; + w.flags = flags; + w.size = size; + w.is32 = (sizeof(void*) == 4); + w.index = index; - return(write(fd, &w, sizeof(struct DmaWriteData))); + return (write(fd, &w, sizeof(struct DmaWriteData))); } /** @@ -214,32 +214,40 @@ static inline ssize_t dmaWriteIndex(int32_t fd, uint32_t index, size_t size, uin * * Return: Total number of bytes written, or a negative error code on failure. */ -static inline ssize_t dmaWriteVector(int32_t fd, struct iovec *iov, size_t iovlen, - uint32_t begFlags, uint32_t midFlags, uint32_t endFlags, uint32_t dest) { - uint32_t x; - ssize_t ret; - ssize_t res; - struct DmaWriteData w; - - ret = 0; - - for (x=0; x < iovlen; x++) { - memset(&w,0,sizeof(struct DmaWriteData)); - w.dest = dest; - w.flags = (x==0)?begFlags:((x==(iovlen-1))?endFlags:midFlags); - w.size = iov[x].iov_len; - w.is32 = (sizeof(void *)==4); - w.data = (uint64_t)iov[x].iov_base; - - do { - res = write(fd,&w,sizeof(struct DmaWriteData)); - - if ( res < 0 ) return(res); - else if ( res == 0 ) usleep(10); - else ret += res; - } while (res == 0); - } - return(ret); +static inline ssize_t dmaWriteVector(int32_t fd, + struct iovec* iov, + size_t iovlen, + uint32_t begFlags, + uint32_t midFlags, + uint32_t endFlags, + uint32_t dest) { + uint32_t x; + ssize_t ret; + ssize_t res; + struct DmaWriteData w; + + ret = 0; + + for (x = 0; x < iovlen; x++) { + memset(&w, 0, sizeof(struct DmaWriteData)); + w.dest = dest; + w.flags = (x == 0) ? begFlags : ((x == (iovlen - 1)) ? endFlags : midFlags); + w.size = iov[x].iov_len; + w.is32 = (sizeof(void*) == 4); + w.data = (uint64_t)iov[x].iov_base; + + do { + res = write(fd, &w, sizeof(struct DmaWriteData)); + + if (res < 0) + return (res); + else if (res == 0) + usleep(10); + else + ret += res; + } while (res == 0); + } + return (ret); } /** @@ -257,32 +265,40 @@ static inline ssize_t dmaWriteVector(int32_t fd, struct iovec *iov, size_t iovle * * Return: Total number of bytes written, or negative on failure. */ -static inline ssize_t dmaWriteIndexVector(int32_t fd, struct iovec *iov, size_t iovlen, - uint32_t begFlags, uint32_t midFlags, uint32_t endFlags, uint32_t dest) { - uint32_t x; - ssize_t ret; - ssize_t res; - struct DmaWriteData w; - - ret = 0; - - for (x = 0; x < iovlen; x++) { - memset(&w, 0, sizeof(struct DmaWriteData)); - w.dest = dest; - w.flags = (x == 0) ? begFlags : ((x == (iovlen - 1)) ? endFlags : midFlags); - w.size = iov[x].iov_len; - w.is32 = (sizeof(void *) == 4); - w.index = (uint32_t)(((uint64_t)iov[x].iov_base) & 0xFFFFFFFF); - - do { - res = write(fd, &w, sizeof(struct DmaWriteData)); - - if (res < 0) return(res); - else if (res == 0) usleep(10); - else ret += res; - } while (res == 0); - } - return(ret); +static inline ssize_t dmaWriteIndexVector(int32_t fd, + struct iovec* iov, + size_t iovlen, + uint32_t begFlags, + uint32_t midFlags, + uint32_t endFlags, + uint32_t dest) { + uint32_t x; + ssize_t ret; + ssize_t res; + struct DmaWriteData w; + + ret = 0; + + for (x = 0; x < iovlen; x++) { + memset(&w, 0, sizeof(struct DmaWriteData)); + w.dest = dest; + w.flags = (x == 0) ? begFlags : ((x == (iovlen - 1)) ? endFlags : midFlags); + w.size = iov[x].iov_len; + w.is32 = (sizeof(void*) == 4); + w.index = (uint32_t)(((uint64_t)iov[x].iov_base) & 0xFFFFFFFF); + + do { + res = write(fd, &w, sizeof(struct DmaWriteData)); + + if (res < 0) + return (res); + else if (res == 0) + usleep(10); + else + ret += res; + } while (res == 0); + } + return (ret); } /** @@ -298,24 +314,24 @@ static inline ssize_t dmaWriteIndexVector(int32_t fd, struct iovec *iov, size_t * * Return: Size of the data received, or negative on failure. */ -static inline ssize_t dmaRead(int32_t fd, void *buf, size_t maxSize, uint32_t *flags, uint32_t *error, uint32_t *dest) { - struct DmaReadData r; - ssize_t ret; +static inline ssize_t dmaRead(int32_t fd, void* buf, size_t maxSize, uint32_t* flags, uint32_t* error, uint32_t* dest) { + struct DmaReadData r; + ssize_t ret; - memset(&r, 0, sizeof(struct DmaReadData)); - r.size = maxSize; - r.is32 = (sizeof(void *) == 4); - r.data = (uint64_t)buf; + memset(&r, 0, sizeof(struct DmaReadData)); + r.size = maxSize; + r.is32 = (sizeof(void*) == 4); + r.data = (uint64_t)buf; - ret = read(fd, &r, sizeof(struct DmaReadData)); + ret = read(fd, &r, sizeof(struct DmaReadData)); - if (ret <= 0) return(ret); + if (ret <= 0) return (ret); - if (dest != NULL) *dest = r.dest; - if (flags != NULL) *flags = r.flags; - if (error != NULL) *error = r.error; + if (dest != NULL) *dest = r.dest; + if (flags != NULL) *flags = r.flags; + if (error != NULL) *error = r.error; - return(r.ret); + return (r.ret); } /** @@ -331,22 +347,22 @@ static inline ssize_t dmaRead(int32_t fd, void *buf, size_t maxSize, uint32_t *f * * Return: Size of the data received, or negative on failure. */ -static inline ssize_t dmaReadIndex(int32_t fd, uint32_t *index, uint32_t *flags, uint32_t *error, uint32_t *dest) { - struct DmaReadData r; - size_t ret; +static inline ssize_t dmaReadIndex(int32_t fd, uint32_t* index, uint32_t* flags, uint32_t* error, uint32_t* dest) { + struct DmaReadData r; + size_t ret; - memset(&r, 0, sizeof(struct DmaReadData)); + memset(&r, 0, sizeof(struct DmaReadData)); - ret = read(fd, &r, sizeof(struct DmaReadData)); + ret = read(fd, &r, sizeof(struct DmaReadData)); - if (ret <= 0) return(ret); + if (ret <= 0) return (ret); - if (dest != NULL) *dest = r.dest; - if (flags != NULL) *flags = r.flags; - if (error != NULL) *error = r.error; + if (dest != NULL) *dest = r.dest; + if (flags != NULL) *flags = r.flags; + if (error != NULL) *error = r.error; - *index = r.index; - return(r.ret); + *index = r.index; + return (r.ret); } /** @@ -365,25 +381,30 @@ static inline ssize_t dmaReadIndex(int32_t fd, uint32_t *index, uint32_t *flags, * * Returns: The number of bytes read. */ -static inline ssize_t dmaReadBulkIndex(int32_t fd, uint32_t count, int32_t *ret, uint32_t *index, - uint32_t *flags, uint32_t *error, uint32_t *dest) { - struct DmaReadData r[count]; - size_t res; - size_t x; - - memset(r, 0, count * sizeof(struct DmaReadData)); - - res = read(fd, r, count * sizeof(struct DmaReadData)); - - for (x = 0; x < res; ++x) { - if (dest != NULL) dest[x] = r[x].dest; - if (flags != NULL) flags[x] = r[x].flags; - if (error != NULL) error[x] = r[x].error; - - index[x] = r[x].index; - ret[x] = r[x].ret; - } - return(res); +static inline ssize_t dmaReadBulkIndex(int32_t fd, + uint32_t count, + int32_t* ret, + uint32_t* index, + uint32_t* flags, + uint32_t* error, + uint32_t* dest) { + struct DmaReadData r[count]; + size_t res; + size_t x; + + memset(r, 0, count * sizeof(struct DmaReadData)); + + res = read(fd, r, count * sizeof(struct DmaReadData)); + + for (x = 0; x < res; ++x) { + if (dest != NULL) dest[x] = r[x].dest; + if (flags != NULL) flags[x] = r[x].flags; + if (error != NULL) error[x] = r[x].error; + + index[x] = r[x].index; + ret[x] = r[x].ret; + } + return (res); } /** @@ -397,9 +418,9 @@ static inline ssize_t dmaReadBulkIndex(int32_t fd, uint32_t count, int32_t *ret, * Returns: Result of the IOCTL operation. */ static inline ssize_t dmaRetIndex(int32_t fd, uint32_t index) { - uint32_t cmd = DMA_Ret_Index | 0x10000; + uint32_t cmd = DMA_Ret_Index | 0x10000; - return(ioctl(fd, cmd, &index)); + return (ioctl(fd, cmd, &index)); } /** @@ -413,10 +434,10 @@ static inline ssize_t dmaRetIndex(int32_t fd, uint32_t index) { * * Returns: Result of the IOCTL operation. */ -static inline ssize_t dmaRetIndexes(int32_t fd, uint32_t count, uint32_t *indexes) { - uint32_t cmd = DMA_Ret_Index | ((count << 16) & 0xFFFF0000); +static inline ssize_t dmaRetIndexes(int32_t fd, uint32_t count, uint32_t* indexes) { + uint32_t cmd = DMA_Ret_Index | ((count << 16) & 0xFFFF0000); - return(ioctl(fd, cmd, indexes)); + return (ioctl(fd, cmd, indexes)); } /** @@ -428,7 +449,7 @@ static inline ssize_t dmaRetIndexes(int32_t fd, uint32_t count, uint32_t *indexe * Returns: The current write buffer index. */ static inline uint32_t dmaGetIndex(int32_t fd) { - return(ioctl(fd, DMA_Get_Index, 0)); + return (ioctl(fd, DMA_Get_Index, 0)); } /** @@ -440,7 +461,7 @@ static inline uint32_t dmaGetIndex(int32_t fd) { * Returns: Result of the IOCTL operation, indicating read readiness. */ static inline ssize_t dmaReadReady(int32_t fd) { - return(ioctl(fd, DMA_Read_Ready, 0)); + return (ioctl(fd, DMA_Read_Ready, 0)); } /** @@ -452,7 +473,7 @@ static inline ssize_t dmaReadReady(int32_t fd) { * Returns: The count of receive buffers. */ static inline ssize_t dmaGetRxBuffCount(int32_t fd) { - return(ioctl(fd, DMA_Get_RxBuff_Count, 0)); + return (ioctl(fd, DMA_Get_RxBuff_Count, 0)); } /** @@ -464,7 +485,7 @@ static inline ssize_t dmaGetRxBuffCount(int32_t fd) { * Returns: The count of transmit buffers. */ static inline ssize_t dmaGetTxBuffCount(int32_t fd) { - return(ioctl(fd, DMA_Get_TxBuff_Count, 0)); + return (ioctl(fd, DMA_Get_TxBuff_Count, 0)); } /** @@ -476,7 +497,7 @@ static inline ssize_t dmaGetTxBuffCount(int32_t fd) { * Returns: The size of DMA buffers. */ static inline ssize_t dmaGetBuffSize(int32_t fd) { - return(ioctl(fd, DMA_Get_Buff_Size, 0)); + return (ioctl(fd, DMA_Get_Buff_Size, 0)); } /** @@ -489,38 +510,38 @@ static inline ssize_t dmaGetBuffSize(int32_t fd) { * * Returns: Pointer to an array of pointers to the mapped buffers, or NULL on failure. */ -static inline void **dmaMapDma(int32_t fd, uint32_t *count, uint32_t *size) { - void *temp; - void **ret; - uint32_t bCount; - uint32_t gCount; - uint32_t bSize; - off_t offset; - - bSize = ioctl(fd, DMA_Get_Buff_Size, 0); - bCount = ioctl(fd, DMA_Get_Buff_Count, 0); - - if (count != NULL) *count = bCount; - if (size != NULL) *size = bSize; - - if ( (ret = (void **)malloc(sizeof(void *) * bCount)) == 0 ) return(NULL); - - // Attempt to map - gCount = 0; - while (gCount < bCount) { - offset = (off_t)bSize * (off_t)gCount; - - if ((temp = mmap(0, bSize, PROT_READ | PROT_WRITE, MAP_SHARED, fd, offset)) == MAP_FAILED) break; - ret[gCount++] = temp; - } - - // Map failed - if (gCount != bCount) { - while (gCount != 0) munmap(ret[--gCount], bSize); - free(ret); - ret = NULL; - } - return(ret); +static inline void** dmaMapDma(int32_t fd, uint32_t* count, uint32_t* size) { + void* temp; + void** ret; + uint32_t bCount; + uint32_t gCount; + uint32_t bSize; + off_t offset; + + bSize = ioctl(fd, DMA_Get_Buff_Size, 0); + bCount = ioctl(fd, DMA_Get_Buff_Count, 0); + + if (count != NULL) *count = bCount; + if (size != NULL) *size = bSize; + + if ((ret = (void**)malloc(sizeof(void*) * bCount)) == 0) return (NULL); + + // Attempt to map + gCount = 0; + while (gCount < bCount) { + offset = (off_t)bSize * (off_t)gCount; + + if ((temp = mmap(0, bSize, PROT_READ | PROT_WRITE, MAP_SHARED, fd, offset)) == MAP_FAILED) break; + ret[gCount++] = temp; + } + + // Map failed + if (gCount != bCount) { + while (gCount != 0) munmap(ret[--gCount], bSize); + free(ret); + ret = NULL; + } + return (ret); } /** @@ -532,18 +553,18 @@ static inline void **dmaMapDma(int32_t fd, uint32_t *count, uint32_t *size) { * * Returns: 0 on success. */ -static inline ssize_t dmaUnMapDma(int32_t fd, void **buffer) { - uint32_t bCount; - uint32_t bSize; - uint32_t x; +static inline ssize_t dmaUnMapDma(int32_t fd, void** buffer) { + uint32_t bCount; + uint32_t bSize; + uint32_t x; - bCount = ioctl(fd, DMA_Get_Buff_Count, 0); - bSize = ioctl(fd, DMA_Get_Buff_Size, 0); + bCount = ioctl(fd, DMA_Get_Buff_Count, 0); + bSize = ioctl(fd, DMA_Get_Buff_Size, 0); - for (x = 0; x < bCount; x++) munmap(buffer[x], bSize); + for (x = 0; x < bCount; x++) munmap(buffer[x], bSize); - free(buffer); - return(0); + free(buffer); + return (0); } /** @@ -557,7 +578,7 @@ static inline ssize_t dmaUnMapDma(int32_t fd, void **buffer) { * Return: Result from the IOCTL call. */ static inline ssize_t dmaSetDebug(int32_t fd, uint32_t level) { - return(ioctl(fd, DMA_Set_Debug, level)); + return (ioctl(fd, DMA_Set_Debug, level)); } /** @@ -570,17 +591,17 @@ static inline ssize_t dmaSetDebug(int32_t fd, uint32_t level) { * receive signals for asynchronous I/O. */ static inline void dmaAssignHandler(int32_t fd, void (*handler)(int32_t)) { - struct sigaction act; - int32_t oflags; + struct sigaction act; + int32_t oflags; - act.sa_handler = handler; - sigemptyset(&act.sa_mask); - act.sa_flags = 0; + act.sa_handler = handler; + sigemptyset(&act.sa_mask); + act.sa_flags = 0; - sigaction(SIGIO, &act, NULL); - fcntl(fd, F_SETOWN, getpid()); - oflags = fcntl(fd, F_GETFL); - fcntl(fd, F_SETFL, oflags | FASYNC); + sigaction(SIGIO, &act, NULL); + fcntl(fd, F_SETOWN, getpid()); + oflags = fcntl(fd, F_GETFL); + fcntl(fd, F_SETFL, oflags | FASYNC); } /** @@ -593,7 +614,7 @@ static inline void dmaAssignHandler(int32_t fd, void (*handler)(int32_t)) { * Return: Result from the IOCTL call. */ static inline ssize_t dmaSetMask(int32_t fd, uint32_t mask) { - return(ioctl(fd, DMA_Set_Mask, mask)); + return (ioctl(fd, DMA_Set_Mask, mask)); } /** @@ -602,8 +623,8 @@ static inline ssize_t dmaSetMask(int32_t fd, uint32_t mask) { * * Initializes the DMA mask byte array to zeros. */ -static inline void dmaInitMaskBytes(uint8_t *mask) { - memset(mask, 0, DMA_MASK_SIZE); +static inline void dmaInitMaskBytes(uint8_t* mask) { + memset(mask, 0, DMA_MASK_SIZE); } /** @@ -614,15 +635,15 @@ static inline void dmaInitMaskBytes(uint8_t *mask) { * Adds a destination to the DMA mask byte array by setting the appropriate * bit based on the destination index. */ -static inline void dmaAddMaskBytes(uint8_t *mask, uint32_t dest) { - uint32_t byte; - uint32_t bit; - - if (dest < 8 * (DMA_MASK_SIZE)) { - byte = dest / 8; - bit = dest % 8; - mask[byte] += (1 << bit); - } +static inline void dmaAddMaskBytes(uint8_t* mask, uint32_t dest) { + uint32_t byte; + uint32_t bit; + + if (dest < 8 * (DMA_MASK_SIZE)) { + byte = dest / 8; + bit = dest % 8; + mask[byte] += (1 << bit); + } } /** @@ -634,8 +655,8 @@ static inline void dmaAddMaskBytes(uint8_t *mask, uint32_t dest) { * * Return: Result from the IOCTL call. */ -static inline ssize_t dmaSetMaskBytes(int32_t fd, uint8_t *mask) { - return(ioctl(fd, DMA_Set_MaskBytes, mask)); +static inline ssize_t dmaSetMaskBytes(int32_t fd, uint8_t* mask) { + return (ioctl(fd, DMA_Set_MaskBytes, mask)); } /** @@ -647,9 +668,9 @@ static inline ssize_t dmaSetMaskBytes(int32_t fd, uint8_t *mask) { * Return: 0 if the version matches, -1 otherwise. */ static inline ssize_t dmaCheckVersion(int32_t fd) { - int32_t version; - version = ioctl(fd, DMA_Get_Version); - return((version == DMA_VERSION) ? 0 : -1); + int32_t version; + version = ioctl(fd, DMA_Get_Version); + return ((version == DMA_VERSION) ? 0 : -1); } /** @@ -663,11 +684,11 @@ static inline ssize_t dmaCheckVersion(int32_t fd) { * Return: Result from the IOCTL call. */ static inline ssize_t dmaWriteRegister(int32_t fd, uint64_t address, uint32_t data) { - struct DmaRegisterData reg; + struct DmaRegisterData reg; - reg.address = address; - reg.data = data; - return(ioctl(fd, DMA_Write_Register, ®)); + reg.address = address; + reg.data = data; + return (ioctl(fd, DMA_Write_Register, ®)); } /** @@ -681,23 +702,21 @@ static inline ssize_t dmaWriteRegister(int32_t fd, uint64_t address, uint32_t da * * Return: The result of the ioctl operation, indicating success or failure. */ -static inline ssize_t dmaReadRegister(int32_t fd, uint64_t address, uint32_t *data) -{ - struct DmaRegisterData reg; - ssize_t res; +static inline ssize_t dmaReadRegister(int32_t fd, uint64_t address, uint32_t* data) { + struct DmaRegisterData reg; + ssize_t res; - // Initialize register data structure - reg.address = address; - reg.data = 0; + // Initialize register data structure + reg.address = address; + reg.data = 0; - // Perform ioctl to read the register - res = ioctl(fd, DMA_Read_Register, ®); + // Perform ioctl to read the register + res = ioctl(fd, DMA_Read_Register, ®); - // If data pointer is valid, update it with the read value - if (data != NULL) - *data = reg.data; + // If data pointer is valid, update it with the read value + if (data != NULL) *data = reg.data; - return res; + return res; } /** @@ -712,21 +731,20 @@ static inline ssize_t dmaReadRegister(int32_t fd, uint64_t address, uint32_t *da * * Return: A pointer to the mapped memory region in user space, or MAP_FAILED on failure. */ -static inline void *dmaMapRegister(int32_t fd, off_t offset, uint32_t size) -{ - uint32_t bSize; - uint32_t bCount; - off_t intOffset; +static inline void* dmaMapRegister(int32_t fd, off_t offset, uint32_t size) { + uint32_t bSize; + uint32_t bCount; + off_t intOffset; - // Obtain buffer size and count from the DMA device - bSize = ioctl(fd, DMA_Get_Buff_Size, 0); - bCount = ioctl(fd, DMA_Get_Buff_Count, 0); + // Obtain buffer size and count from the DMA device + bSize = ioctl(fd, DMA_Get_Buff_Size, 0); + bCount = ioctl(fd, DMA_Get_Buff_Count, 0); - // Calculate internal offset - intOffset = (bSize * bCount) + offset; + // Calculate internal offset + intOffset = (bSize * bCount) + offset; - // Attempt to map the memory region into user space - return mmap(0, size, PROT_READ | PROT_WRITE, MAP_SHARED, fd, intOffset); + // Attempt to map the memory region into user space + return mmap(0, size, PROT_READ | PROT_WRITE, MAP_SHARED, fd, intOffset); } /** @@ -740,12 +758,11 @@ static inline void *dmaMapRegister(int32_t fd, off_t offset, uint32_t size) * * Return: Always returns 0 indicating success. */ -static inline ssize_t dmaUnMapRegister(int32_t fd, void *ptr, uint32_t size) -{ - // Unmap the memory region - munmap(ptr, size); - return 0; +static inline ssize_t dmaUnMapRegister(int32_t fd, void* ptr, uint32_t size) { + // Unmap the memory region + munmap(ptr, size); + return 0; } -#endif // !DMA_IN_KERNEL -#endif // __DMA_DRIVER_H__ +#endif // !DMA_IN_KERNEL +#endif // __DMA_DRIVER_H__ diff --git a/src/rogue/interfaces/ZmqClient.cpp b/src/rogue/interfaces/ZmqClient.cpp index f496a760b..58e01fd65 100644 --- a/src/rogue/interfaces/ZmqClient.cpp +++ b/src/rogue/interfaces/ZmqClient.cpp @@ -183,19 +183,20 @@ std::string rogue::interfaces::ZmqClient::sendString(std::string path, std::stri rogue::GilRelease noGil; zmq_send(this->zmqReq_, snd.c_str(), snd.size(), 0); - while (1) { - zmq_msg_init(&msg); - if ( zmq_recvmsg(this->zmqReq_,&msg,0) <= 0 ) { - seconds += (float)timeout_ / 1000.0; - if ( waitRetry_ ) { - log_->error("Timeout waiting for response after %f Seconds, server may be busy! Waiting...", seconds); - zmq_msg_close(&msg); - } - else - throw rogue::GeneralError::create("ZmqClient::sendString","Timeout waiting for response after %f Seconds.",seconds); - } - else break; - } + while (1) { + zmq_msg_init(&msg); + if (zmq_recvmsg(this->zmqReq_, &msg, 0) <= 0) { + seconds += (float)timeout_ / 1000.0; + if (waitRetry_) { + log_->error("Timeout waiting for response after %f Seconds, server may be busy! Waiting...", seconds); + zmq_msg_close(&msg); + } else + throw rogue::GeneralError::create("ZmqClient::sendString", + "Timeout waiting for response after %f Seconds.", + seconds); + } else + break; + } if (seconds != 0) log_->error("Finally got response from server after %f seconds!", seconds); diff --git a/src/rogue/interfaces/memory/Variable.cpp b/src/rogue/interfaces/memory/Variable.cpp index 01934be9b..cfb92dc56 100644 --- a/src/rogue/interfaces/memory/Variable.cpp +++ b/src/rogue/interfaces/memory/Variable.cpp @@ -43,68 +43,65 @@ namespace bp = boost::python; #endif //! Class factory which returns a pointer to a Variable (VariablePtr) -rim::VariablePtr rim::Variable::create( - std::string name, - std::string mode, - double minimum, - double maximum, - uint64_t offset, - std::vector bitOffset, - std::vector bitSize, - bool overlapEn, - bool verify, - bool bulkOpEn, - bool updateNotify, - uint32_t modelId, - bool byteReverse, - bool bitReverse, - uint32_t binPoint, - uint32_t numValues, - uint32_t valueBits, - uint32_t valueStride, - uint32_t retryCount) { - rim::VariablePtr v = std::make_shared( - name, - mode, - minimum, - maximum, - offset, - bitOffset, - bitSize, - overlapEn, - verify, - bulkOpEn, - updateNotify, - modelId, - byteReverse, - bitReverse, - binPoint, - numValues, - valueBits, - valueStride, - retryCount); +rim::VariablePtr rim::Variable::create(std::string name, + std::string mode, + double minimum, + double maximum, + uint64_t offset, + std::vector bitOffset, + std::vector bitSize, + bool overlapEn, + bool verify, + bool bulkOpEn, + bool updateNotify, + uint32_t modelId, + bool byteReverse, + bool bitReverse, + uint32_t binPoint, + uint32_t numValues, + uint32_t valueBits, + uint32_t valueStride, + uint32_t retryCount) { + rim::VariablePtr v = std::make_shared(name, + mode, + minimum, + maximum, + offset, + bitOffset, + bitSize, + overlapEn, + verify, + bulkOpEn, + updateNotify, + modelId, + byteReverse, + bitReverse, + binPoint, + numValues, + valueBits, + valueStride, + retryCount); return (v); } // Setup class for use in python void rim::Variable::setup_python() { #ifndef NO_PYTHON - bp::class_( - "Variable", - bp::init()) + bp::class_("Variable", + bp::init()) .def("_varBytes", &rim::Variable::varBytes) .def("_offset", &rim::Variable::offset) .def("_shiftOffsetDown", &rim::Variable::shiftOffsetDown) diff --git a/src/rogue/interfaces/stream/Slave.cpp b/src/rogue/interfaces/stream/Slave.cpp index 3ba5107c7..1aee647b1 100644 --- a/src/rogue/interfaces/stream/Slave.cpp +++ b/src/rogue/interfaces/stream/Slave.cpp @@ -171,7 +171,7 @@ bool ris::Slave::ensureSingleBuffer(ris::FramePtr& frame, bool reqEn) { // Process a local frame request ris::FramePtr ris::Slave::reqLocalFrame(uint32_t size, bool zeroCopyEn) { - return ris::Pool::acceptReq(size,zeroCopyEn); + return ris::Pool::acceptReq(size, zeroCopyEn); } void ris::Slave::setup_python() { diff --git a/src/rogue/protocols/packetizer/ControllerV2.cpp b/src/rogue/protocols/packetizer/ControllerV2.cpp index 84b4019af..210f1882c 100644 --- a/src/rogue/protocols/packetizer/ControllerV2.cpp +++ b/src/rogue/protocols/packetizer/ControllerV2.cpp @@ -235,8 +235,7 @@ void rpp::ControllerV2::transportRx(ris::FramePtr frame) { tranFrame_[tmpDest]->setLastUser(tmpLuser); transSof_[tmpDest] = true; tranCount_[tmpDest] = 0; - if (app_[tmpDest]) { - app_[tmpDest]->pushFrame(tranFrame_[tmpDest]); } + if (app_[tmpDest]) { app_[tmpDest]->pushFrame(tranFrame_[tmpDest]); } tranFrame_[tmpDest].reset(); // Detect SSI error @@ -359,7 +358,7 @@ void rpp::ControllerV2::applicationRx(ris::FramePtr frame, uint8_t tDest) { fUser, tDest, segment, - data[7]>>7, + data[7] >> 7, lUser, data[size - 7], last); diff --git a/tests/api_test/src/api_test.cpp b/tests/api_test/src/api_test.cpp index 6cfbb78d6..0e1523c2a 100644 --- a/tests/api_test/src/api_test.cpp +++ b/tests/api_test/src/api_test.cpp @@ -9,7 +9,7 @@ * ---------------------------------------------------------------------------- **/ -#include +#include "rogue/interfaces/api/Bsp.h" void varListener(std::string path, std::string value) { printf("Var Listener: %s = %s\n", path.c_str(), value.c_str()); @@ -20,42 +20,41 @@ void varDone() { } int main(int argc, char** argv) { - try { + try { + rogue::interfaces::api::Bsp bsp("pyrogue.examples", "ExampleRoot"); + bsp.addVarListener(&varListener, &varDone); - rogue::interfaces::api::Bsp bsp("pyrogue.examples", "ExampleRoot"); - bsp.addVarListener(&varListener, &varDone); + // Get running uptime clock + printf("LocalTime = %s\n", bsp["LocalTime"].get().c_str()); - // Get running uptime clock - printf("LocalTime = %s\n", bsp["LocalTime"].get().c_str()); + // Set and get scratchpad + bsp["AxiVersion"]["ScratchPad"].setWrite("0x1111"); + printf("ScratchPad = %s\n", bsp["AxiVersion"]["ScratchPad"].readGet().c_str()); - // Set and get scratchpad - bsp["AxiVersion"]["ScratchPad"].setWrite("0x1111"); - printf("ScratchPad = %s\n", bsp["AxiVersion"]["ScratchPad"].readGet().c_str()); + // Get object as a pointer using full path, and get scratchpad + printf("ScratchPad = %s\n", bsp.getNode("ExampleRoot.AxiVersion.ScratchPad")->get().c_str()); - // Get object as a pointer using full path, and get scratchpad - printf("ScratchPad = %s\n", bsp.getNode("ExampleRoot.AxiVersion.ScratchPad")->get().c_str()); + // Get yaml config + std::string cfg = bsp["GetYamlConfig"]("True"); + printf("Config = %s\n", cfg.c_str()); - // Get yaml config - std::string cfg = bsp["GetYamlConfig"]("True"); - printf("Config = %s\n", cfg.c_str()); + // Set yaml config, example + // bsp["SetYamlConfig"]("Some Yaml String"); - // Set yaml config, example - // bsp["SetYamlConfig"]("Some Yaml String"); + // Write Entrire Tree + bsp["WriteAll"](); - // Write Entrire Tree - bsp["WriteAll"](); + // Read Entrire Tree + bsp["ReadAll"](); - // Read Entrire Tree - bsp["ReadAll"](); + Py_BEGIN_ALLOW_THREADS; + sleep(60); + Py_END_ALLOW_THREADS; - Py_BEGIN_ALLOW_THREADS; - sleep(60); - Py_END_ALLOW_THREADS; - - } catch (...) { - fprintf(stderr, "Found error running API example:\n"); - PyErr_Print(); - return -1; - } - return 0; + } catch (...) { + fprintf(stderr, "Found error running API example:\n"); + PyErr_Print(); + return -1; + } + return 0; }