diff --git a/debugger/cmake/CMakeLists.txt b/debugger/cmake/CMakeLists.txt index b91e16d07..01764ad5b 100644 --- a/debugger/cmake/CMakeLists.txt +++ b/debugger/cmake/CMakeLists.txt @@ -1,4 +1,4 @@ -cmake_minimum_required(VERSION 3.6) +cmake_minimum_required(VERSION 3.10) project(riscvdebugger) add_definitions(-DREPO_PATH="${CMAKE_CURRENT_SOURCE_DIR}/..") diff --git a/debugger/cmake/cpu_arm_plugin/CMakeLists.txt b/debugger/cmake/cpu_arm_plugin/CMakeLists.txt index 180f5ab7a..3c2ccd8a1 100644 --- a/debugger/cmake/cpu_arm_plugin/CMakeLists.txt +++ b/debugger/cmake/cpu_arm_plugin/CMakeLists.txt @@ -1,4 +1,4 @@ -cmake_minimum_required(VERSION 3.6) +cmake_minimum_required(VERSION 3.10) project(cpu_arm_plugin DESCRIPTION "cpu_arm_plugin shared library") set(src_top "${CMAKE_CURRENT_SOURCE_DIR}/../../src") diff --git a/debugger/cmake/cpu_fnc_plugin/CMakeLists.txt b/debugger/cmake/cpu_fnc_plugin/CMakeLists.txt index dd9ba0c69..7be91bfd5 100644 --- a/debugger/cmake/cpu_fnc_plugin/CMakeLists.txt +++ b/debugger/cmake/cpu_fnc_plugin/CMakeLists.txt @@ -1,4 +1,4 @@ -cmake_minimum_required(VERSION 3.6) +cmake_minimum_required(VERSION 3.10) project(cpu_fnc_plugin DESCRIPTION "cpu_fnc_plugin shared library") set(src_top "${CMAKE_CURRENT_SOURCE_DIR}/../../src") diff --git a/debugger/cmake/cpu_sysc_plugin/CMakeLists.txt b/debugger/cmake/cpu_sysc_plugin/CMakeLists.txt index 5f509993c..cc8230dcd 100644 --- a/debugger/cmake/cpu_sysc_plugin/CMakeLists.txt +++ b/debugger/cmake/cpu_sysc_plugin/CMakeLists.txt @@ -1,4 +1,4 @@ -cmake_minimum_required(VERSION 3.6) +cmake_minimum_required(VERSION 3.10) project(cpu_sysc_plugin DESCRIPTION "cpu_sysc_plugin shared library") if (NOT DEFINED ENV{SYSTEMC_SRC} OR NOT DEFINED ENV{SYSTEMC_LIB}) @@ -10,6 +10,7 @@ set(src_top "${CMAKE_CURRENT_SOURCE_DIR}/../../..") if(UNIX) set(LIBRARY_OUTPUT_PATH "../linuxbuild/bin/plugins") else() + add_definitions(-DNOMINMAX) add_definitions(-D_UNICODE) add_definitions(-DUNICODE) set(CMAKE_CXX_FLAGS_RELEASE "${CMAKE_CXX_FLAGS_RELEASE} /MT") @@ -63,6 +64,7 @@ add_library(cpu_sysc_plugin SHARED ${cpu_sysc_plugin_src} ) +set_property(TARGET cpu_sysc_plugin PROPERTY CXX_STANDARD 17) if(UNIX) set_target_properties(cpu_sysc_plugin PROPERTIES PREFIX "") else() diff --git a/debugger/cmake/gui_plugin/CMakeLists.txt b/debugger/cmake/gui_plugin/CMakeLists.txt index cee4da34d..51b3ddc7d 100644 --- a/debugger/cmake/gui_plugin/CMakeLists.txt +++ b/debugger/cmake/gui_plugin/CMakeLists.txt @@ -1,4 +1,4 @@ -cmake_minimum_required(VERSION 3.6) +cmake_minimum_required(VERSION 3.10) project(gui_plugin DESCRIPTION "gui_plugin shared library") set(CMAKE_AUTOMOC ON) diff --git a/debugger/cmake/libdbg64g/CMakeLists.txt b/debugger/cmake/libdbg64g/CMakeLists.txt index e42f99f77..17665a246 100644 --- a/debugger/cmake/libdbg64g/CMakeLists.txt +++ b/debugger/cmake/libdbg64g/CMakeLists.txt @@ -1,4 +1,4 @@ -cmake_minimum_required(VERSION 3.6) +cmake_minimum_required(VERSION 3.10) project(libdbg64g DESCRIPTION "libdbg64g shared library") set(src_top "${CMAKE_CURRENT_SOURCE_DIR}/../../src") diff --git a/debugger/cmake/simple_plugin/CMakeLists.txt b/debugger/cmake/simple_plugin/CMakeLists.txt index c641c1949..856523576 100644 --- a/debugger/cmake/simple_plugin/CMakeLists.txt +++ b/debugger/cmake/simple_plugin/CMakeLists.txt @@ -1,4 +1,4 @@ -cmake_minimum_required(VERSION 3.6) +cmake_minimum_required(VERSION 3.10) project(simple_plugin DESCRIPTION "simple_plugin shared library") set(src_top "${CMAKE_CURRENT_SOURCE_DIR}/../../src") diff --git a/debugger/cmake/socsim_plugin/CMakeLists.txt b/debugger/cmake/socsim_plugin/CMakeLists.txt index 38e7d0149..b0aca5607 100644 --- a/debugger/cmake/socsim_plugin/CMakeLists.txt +++ b/debugger/cmake/socsim_plugin/CMakeLists.txt @@ -1,4 +1,4 @@ -cmake_minimum_required(VERSION 3.6) +cmake_minimum_required(VERSION 3.10) project(socsim_plugin DESCRIPTION "socsim_plugin shared library") set(src_top "${CMAKE_CURRENT_SOURCE_DIR}/../../src") diff --git a/sc/rtl/techmap/cdc/cdc_afifo.h b/sc/rtl/techmap/cdc/cdc_afifo.h new file mode 100644 index 000000000..3c3537700 --- /dev/null +++ b/sc/rtl/techmap/cdc/cdc_afifo.h @@ -0,0 +1,263 @@ +// +// Copyright 2022 Sergey Khabarov, sergeykhbr@gmail.com +// +// Licensed under the Apache License, Version 2.0 (the "License"); +// you may not use this file except in compliance with the License. +// You may obtain a copy of the License at +// +// http://www.apache.org/licenses/LICENSE-2.0 +// +// Unless required by applicable law or agreed to in writing, software +// distributed under the License is distributed on an "AS IS" BASIS, +// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. +// See the License for the specific language governing permissions and +// limitations under the License. +// +#pragma once + +#include +#include "api_core.h" + +namespace debugger { + +template // payload width +SC_MODULE(cdc_afifo) { + public: + sc_in i_wclk; // clock write + sc_in i_wrstn; // write reset active LOW + sc_in i_wr; // write enable strob + sc_in> i_wdata; // write data + sc_out o_wfull; // fifo is full in wclk domain + sc_in i_rclk; // read clock + sc_in i_rrstn; // read reset active LOW + sc_in i_rd; // read enable strob + sc_out> o_rdata; // fifo payload read + sc_out o_rempty; // fifo is empty it rclk domain + + void comb(); + void registers(); + void r2egisters(); + void rx2egisters(); + + SC_HAS_PROCESS(cdc_afifo); + + cdc_afifo(sc_module_name name); + + void generateVCD(sc_trace_file *i_vcd, sc_trace_file *o_vcd); + + private: + static const int DEPTH = (1 << abits); + + struct cdc_afifo_registers { + sc_signal> wgray; + sc_signal> wbin; + sc_signal> wq2_rgray; + sc_signal> wq1_rgray; + sc_signal wfull; + } v, r; + + void cdc_afifo_r_reset(cdc_afifo_registers &iv) { + iv.wgray = 0; + iv.wbin = 0; + iv.wq2_rgray = 0; + iv.wq1_rgray = 0; + iv.wfull = 0; + } + + struct cdc_afifo_r2egisters { + sc_signal> rgray; + sc_signal> rbin; + sc_signal> rq2_wgray; + sc_signal> rq1_wgray; + sc_signal rempty; + } v2, r2; + + void cdc_afifo_r2_reset(cdc_afifo_r2egisters &iv) { + iv.rgray = 0; + iv.rbin = 0; + iv.rq2_wgray = 0; + iv.rq1_wgray = 0; + iv.rempty = 1; + } + + struct cdc_afifo_rx2egisters { + sc_signal> mem[DEPTH]; + } vx2, rx2; + +}; + +template +cdc_afifo::cdc_afifo(sc_module_name name) + : sc_module(name), + i_wclk("i_wclk"), + i_wrstn("i_wrstn"), + i_wr("i_wr"), + i_wdata("i_wdata"), + o_wfull("o_wfull"), + i_rclk("i_rclk"), + i_rrstn("i_rrstn"), + i_rd("i_rd"), + o_rdata("o_rdata"), + o_rempty("o_rempty") { + + + SC_METHOD(comb); + sensitive << i_wclk; + sensitive << i_wrstn; + sensitive << i_wr; + sensitive << i_wdata; + sensitive << i_rclk; + sensitive << i_rrstn; + sensitive << i_rd; + sensitive << r.wgray; + sensitive << r.wbin; + sensitive << r.wq2_rgray; + sensitive << r.wq1_rgray; + sensitive << r.wfull; + sensitive << r2.rgray; + sensitive << r2.rbin; + sensitive << r2.rq2_wgray; + sensitive << r2.rq1_wgray; + sensitive << r2.rempty; + for (int i = 0; i < DEPTH; i++) { + sensitive << rx2.mem[i]; + } + + SC_METHOD(registers); + sensitive << i_wrstn; + sensitive << i_wclk.pos(); + + SC_METHOD(r2egisters); + sensitive << i_rrstn; + sensitive << i_rclk.pos(); + + SC_METHOD(rx2egisters); + sensitive << i_wclk.pos(); +} + +template +void cdc_afifo::generateVCD(sc_trace_file *i_vcd, sc_trace_file *o_vcd) { + std::string pn(name()); + if (o_vcd) { + sc_trace(o_vcd, i_wclk, i_wclk.name()); + sc_trace(o_vcd, i_wrstn, i_wrstn.name()); + sc_trace(o_vcd, i_wr, i_wr.name()); + sc_trace(o_vcd, i_wdata, i_wdata.name()); + sc_trace(o_vcd, o_wfull, o_wfull.name()); + sc_trace(o_vcd, i_rclk, i_rclk.name()); + sc_trace(o_vcd, i_rrstn, i_rrstn.name()); + sc_trace(o_vcd, i_rd, i_rd.name()); + sc_trace(o_vcd, o_rdata, o_rdata.name()); + sc_trace(o_vcd, o_rempty, o_rempty.name()); + sc_trace(o_vcd, r.wgray, pn + ".r_wgray"); + sc_trace(o_vcd, r.wbin, pn + ".r_wbin"); + sc_trace(o_vcd, r.wq2_rgray, pn + ".r_wq2_rgray"); + sc_trace(o_vcd, r.wq1_rgray, pn + ".r_wq1_rgray"); + sc_trace(o_vcd, r.wfull, pn + ".r_wfull"); + sc_trace(o_vcd, r2.rgray, pn + ".r2_rgray"); + sc_trace(o_vcd, r2.rbin, pn + ".r2_rbin"); + sc_trace(o_vcd, r2.rq2_wgray, pn + ".r2_rq2_wgray"); + sc_trace(o_vcd, r2.rq1_wgray, pn + ".r2_rq1_wgray"); + sc_trace(o_vcd, r2.rempty, pn + ".r2_rempty"); + for (int i = 0; i < DEPTH; i++) { + char tstr[1024]; + RISCV_sprintf(tstr, sizeof(tstr), "%s.rx2_mem%d", pn.c_str(), i); + sc_trace(o_vcd, rx2.mem[i], tstr); + } + } + +} + +template +void cdc_afifo::comb() { + sc_uint vb_waddr; + sc_uint vb_raddr; + bool v_wfull_next; + bool v_rempty_next; + sc_uint<(abits + 1)> vb_wgraynext; + sc_uint<(abits + 1)> vb_wbinnext; + sc_uint<(abits + 1)> vb_rgraynext; + sc_uint<(abits + 1)> vb_rbinnext; + + vb_waddr = 0; + vb_raddr = 0; + v_wfull_next = 0; + v_rempty_next = 0; + vb_wgraynext = 0; + vb_wbinnext = 0; + vb_rgraynext = 0; + vb_rbinnext = 0; + + v = r; + v2 = r2; + for (int i = 0; i < DEPTH; i++) { + vx2.mem[i] = rx2.mem[i]; + } + + // Cross the Gray pointer to write clock domain: + v.wq1_rgray = r2.rgray; + v.wq2_rgray = r.wq1_rgray; + + // Next write address and Gray write pointer + vb_wbinnext = (r.wbin.read() + (0, (i_wr.read() && (!r.wfull.read())))); + vb_wgraynext = ((vb_wbinnext >> 1) ^ vb_wbinnext); + vb_waddr = r.wbin.read()((abits - 1), 0); + v.wgray = vb_wgraynext; + v.wbin = vb_wbinnext; + + if (vb_wgraynext == ((~r.wq2_rgray.read()(abits, (abits - 1))), r.wq2_rgray.read()((abits - 2), 0))) { + v_wfull_next = 1; + } + v.wfull = v_wfull_next; + + if ((i_wr.read() && (!r.wfull.read())) == 1) { + vx2.mem[vb_waddr.to_int()] = i_wdata; + } + + // Write Gray pointer into read clock domain + v2.rq1_wgray = r.wgray; + v2.rq2_wgray = r2.rq1_wgray; + vb_rbinnext = (r2.rbin.read() + (0, (i_rd.read() && (!r2.rempty.read())))); + vb_rgraynext = ((vb_rbinnext >> 1) ^ vb_rbinnext); + v2.rgray = vb_rgraynext; + v2.rbin = vb_rbinnext; + vb_raddr = r2.rbin.read()((abits - 1), 0); + + if (vb_rgraynext == r2.rq2_wgray.read()) { + v_rempty_next = 1; + } + v2.rempty = v_rempty_next; + + o_wfull = r.wfull; + o_rempty = r2.rempty; + o_rdata = rx2.mem[vb_raddr.to_int()]; +} + +template +void cdc_afifo::registers() { + if (i_wrstn.read() == 0) { + cdc_afifo_r_reset(r); + } else { + r = v; + } +} + +template +void cdc_afifo::r2egisters() { + if (i_rrstn.read() == 0) { + cdc_afifo_r2_reset(r2); + } else { + r2 = v2; + } +} + +template +void cdc_afifo::rx2egisters() { + for (int i = 0; i < DEPTH; i++) { + rx2.mem[i] = vx2.mem[i]; + } +} + +} // namespace debugger +