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Hardware debug API: Extend to aarch64 and add single stepping test #111
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Looks good, thanks.
seL4/seL4#1162 is about ARMv7, not ARMv8. Wrong pull?
#define TEST_SS_LABEL_ONE label_one | ||
#define TEST_SS_LABEL_TWO label_two |
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Not sure why this indirection is done, but anyway, I would call it TEST_SS_BREAKPOINT1
and 2.
/* NOTHING BELOW SHOULD EVER BE REACHED */ | ||
int *ptr = NULL; | ||
*ptr = 0xBEEF; | ||
return 0; |
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Maybe say something like: "Should not be reached, but if it does, it wakes up the handler thread".
if (label == seL4_Fault_DebugException && | ||
fault_data.reason == seL4_SingleStep && | ||
fault_data.vaddr == (seL4_Word) &TEST_SS_LABEL_TWO) { |
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You could add this check for 'TEST_SS_LABEL_ONE' above too. If the test passes it doesn't matter, but if something went wrong with the initial breakpoint it would make debugging a lot easier.
/* Check that it is a breakpoint exception */ | ||
if (label != seL4_Fault_DebugException || | ||
seL4_GetMR(seL4_DebugException_ExceptionReason) != seL4_InstructionBreakpoint) { | ||
ZF_LOGV("Received exception other than instruction breakpoint exception.\n"); |
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Maybe explicitly test for NULL and say that single stepping doesn't work.
With 1162 in mind, I think it would be good to test whether code actually gets executed instead of only checking if the instruction pointer advances, so instead of nops just add a value to a register and check if it's correct at the second label. |
Good point. In that case, I'll port the equivalent x86 test, which seems to be more robust. |
At first glance I don't really see anything x86 specific in there, perhaps make that test cross-platform with some arch specific helper functions or defines to paper over the differences? That definitely seems to be the current intention. You'd need to move the test to some common place and make sure it still gets executed on x86. |
Yeah, should be simple. I do recall seeing a comment somewhere in the code about something being missing or not ready in ARM, but I'll see if I run into any issues. Didn't spot anything that immediately stood out. |
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@Indanz I moved the x86 single-stepping test into the arch-independent breakpoints file and it just worked. |
It looks like the Edit: it doesn't seem to be working on the seL4 repo any more either. Looks like something changed in the infrastructure. Edit 2: looking more closely, it did actually work. It's just not showing them in the PR summary panel. It is showing them in the "Check" tab of the PR. |
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The Sabre clang fails with:
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I verified that it still runs and passes on x86 and some 32 bit ARMs, it doesn't yet run on Aarch64 though. I think we should remove the lines around https://github.com/seL4/seL4/blob/cc3205ea486f6ce3da3a64d8a99e166f047b8419/src/arch/arm/config.cmake#L226. |
So do we want to remove @alwin-joshy, did you test this on aarch64 yet? |
Yep, that will be necessary for getting the test to run on AARCH64 eventually but there are other substantial changes required for this. I've been working on this and am close to done (alwin-joshy/seL4#7) but there are still a few problems related to ARMv8 32-bit and ARM hyp mode that I want to iron out before submitting a proper PR. |
I think to merge this first and remove the KernelHardwareDebugAPIUnsupported in the PR when I have the hardware debug API fully ported to aarch64 |
#define TEST_SOFTWARE_BREAK_ASM() \ | ||
asm volatile( \ | ||
".global sbreak, post_sbreak\n\t" \ | ||
".type post_sbreak, function\n\t" \ | ||
"sbreak:\n\t" \ | ||
"bkpt\n\t") | ||
#else |
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Perhaps make it an explicit check for AARCH64, to make it clearer what's happening.
#else | |
#elif CONFIG_ARCH_AARCH64 |
If you tested this assembly locally I'm happy to merge this PR.
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Yep, the test passes with the changes I've made in alwin-joshy/seL4#7
Ported software breakpoint test to aarch64 and moved single stepping test from x86-only to arch-independent. Signed-off-by: Alwin Joshy <[email protected]>
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seL4's hardware debug API is currently only implemented for ARMv7 and x86. I am currently implementing it for AARCH64 and as a part of this, have ported the software breakpoint test to AARCH64.
I have also implemented a new test to check that single stepping works on ARM. In doing so, I believe I have found a bug in the implementation which I will make another pull request for soon. This test is simpler than the existing x86 equivalent but I think it should be sufficient. If not, I can port the existing x86 test for single stepping to ARM.
Test with: seL4/seL4#1162