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feat/impl riscv ADD instruction#85

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KimiWu123 wants to merge 16 commits intoscroll-tech:masterscroll-tech/ceno:masterfrom KimiWu123:feat/impl_rv_addKimiWu123/ceno:feat/impl_rv_addCopy head branch name to clipboard

+2,402-3,249

Commits

Commits on Jul 5, 2024

• impl risc-v add instruction

  KimiWu123

  committed
  5e4a45f

Commits on Jul 10, 2024

• fix incorrect type assignment in the testing and rename

  KimiWu123

  committed
  f4478a8

• remove register_ts bcs it's the same as memory_ts

  KimiWu123

  committed
  55ac80a

• add next_memory_ts

  KimiWu123

  committed
  461eaab

Commits on Jul 11, 2024

• add benchmark case back

  KimiWu123

  committed
  26554f2

Commits on Jul 12, 2024

• move rv_add to riscv isolated pacakge

  KimiWu123

  committed
  4a35061

Commits on Jul 14, 2024

• move risc-v stuff to insolated ones

  KimiWu123

  committed
  83cd8b0

Commits on Jul 17, 2024

• Merge remote-tracking branch 'upstream/master' into feat/impl_rv_add

  KimiWu123

  committed
  f26d9ba

• fix failed cases after mergine main

  KimiWu123

  committed
  c6c7226

Commits on Jul 18, 2024

• add example/riscv/add.rs

  KimiWu123

  committed
  2291a34

Commits on Jul 26, 2024

• Merge remote-tracking branch 'upstream/master' into feat/impl_rv_add

  KimiWu123

  committed
  1c9c855

• add sanity check back in circuit_witness

  KimiWu123

  committed
  276fc16

• fix register chip for offline mem checking

  KimiWu123

  committed
  53de2b2

Commits on Jul 30, 2024

• adding missing witness prev_rd_value

  KimiWu123

  committed
  9fc2d1c

Commits on Aug 2, 2024

• lint fixing

  KimiWu123

  committed
  cfe21fc

• follow load-store naming rule, renaming register_read to register_load

  KimiWu123

  committed
  3037902