follow load-store naming rule, renaming register_read to register_load

scroll-tech · Aug 2, 2024 · 3037902 · 3037902
1 parent cfe21fc
commit 3037902
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Showing 3 changed files with 4 additions and 4 deletions.
diff --git a/singer-utils/src/chip_handler.rs b/singer-utils/src/chip_handler.rs
@@ -38,7 +38,7 @@ pub trait StackChipOperations<Ext: ExtensionField>: OAMOperations<Ext> {
 }
 
 pub trait RegisterChipOperations<Ext: ExtensionField>: OAMOperations<Ext> {
-    fn register_read(
+    fn register_load(
         &mut self,
         circuit_builder: &mut CircuitBuilder<Ext>,
         register_id: &[CellId],

diff --git a/singer-utils/src/chip_handler/register.rs b/singer-utils/src/chip_handler/register.rs
@@ -8,7 +8,7 @@ use crate::structs::{RAMHandler, RAMType};
 use super::{RAMOperations, RegisterChipOperations};
 
 impl<Ext: ExtensionField> RegisterChipOperations<Ext> for RAMHandler<Ext> {
-    fn register_read(
+    fn register_load(
         &mut self,
         circuit_builder: &mut CircuitBuilder<Ext>,
         register_id: &[CellId],

diff --git a/singer/src/instructions/riscv/add.rs b/singer/src/instructions/riscv/add.rs
@@ -147,14 +147,14 @@ impl<E: ExtensionField> Instruction<E> for AddInstruction {
         let rs2 = &phase0[Self::phase0_rs2()];
         let rd = &phase0[Self::phase0_rd()];
         let prev_rd_value = &phase0[Self::phase0_prev_rd_value()];
-        ram_handler.register_read(
+        ram_handler.register_load(
             &mut circuit_builder,
             rs1,
             prev_rs1_ts.values(),
             memory_ts.values(),
             &phase0[Self::phase0_addend_0()],
         );
-        ram_handler.register_read(
+        ram_handler.register_load(
             &mut circuit_builder,
             rs2,
             prev_rs2_ts.values(),