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Merge branch 'master' into matthias/remove-broken-non_pow2_rayon_thread
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matthiasgoergens authored Dec 12, 2024
2 parents f4d572d + 2cd6a6d commit 0964e14
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Showing 7 changed files with 36 additions and 27 deletions.
2 changes: 1 addition & 1 deletion .github/workflows/lints.yml
Original file line number Diff line number Diff line change
Expand Up @@ -63,7 +63,7 @@ jobs:
run: |
cargo make --version || cargo install cargo-make
- name: Check code format
run: cargo make fmt-all-check
run: cargo fmt --all --check

- name: Run clippy
env:
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15 changes: 0 additions & 15 deletions Makefile.toml
Original file line number Diff line number Diff line change
Expand Up @@ -29,26 +29,11 @@ args = [
command = "cargo"
workspace = false

[tasks.fmt-all-check]
args = ["fmt", "--all", "--", "--check"]
command = "cargo"
workspace = false

[tasks.fmt-all]
args = ["fmt", "--all"]
command = "cargo"
workspace = false

[tasks.clippy-all]
args = ["clippy", "--all-features", "--all-targets", "--", "-D", "warnings"]
command = "cargo"
workspace = false

[tasks.fmt]
args = ["fmt", "-p", "ceno_zkvm", "--", "--check"]
command = "cargo"
workspace = false

[tasks.riscv_stats]
args = ["run", "--bin", "riscv_stats"]
command = "cargo"
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2 changes: 1 addition & 1 deletion ceno_zkvm/src/instructions/riscv.rs
Original file line number Diff line number Diff line change
Expand Up @@ -11,7 +11,7 @@ pub mod arith_imm;
pub mod branch;
pub mod config;
pub mod constants;
pub mod divu;
pub mod div;
pub mod dummy;
pub mod ecall;
pub mod jump;
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Original file line number Diff line number Diff line change
Expand Up @@ -181,7 +181,7 @@ mod test {
circuit_builder::{CircuitBuilder, ConstraintSystem},
instructions::{
Instruction,
riscv::{constants::UInt, divu::DivUInstruction},
riscv::{constants::UInt, div::DivUInstruction},
},
scheme::mock_prover::{MOCK_PC_START, MockProver},
};
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4 changes: 1 addition & 3 deletions ceno_zkvm/src/instructions/riscv/mul.rs
Original file line number Diff line number Diff line change
Expand Up @@ -432,9 +432,7 @@ impl<E: ExtensionField> Signed<E> {
lkm,
*val.as_u16_limbs().last().unwrap() as u64,
)?;
let signed_val = val.as_u32() as i32;

Ok(signed_val)
Ok(i32::from(val))
}

pub fn expr(&self) -> Expression<E> {
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4 changes: 2 additions & 2 deletions ceno_zkvm/src/instructions/riscv/rv32im.rs
Original file line number Diff line number Diff line change
Expand Up @@ -7,7 +7,7 @@ use crate::{
branch::{
BeqInstruction, BgeInstruction, BgeuInstruction, BltInstruction, BneInstruction,
},
divu::DivUInstruction,
div::DivUInstruction,
logic::{AndInstruction, OrInstruction, XorInstruction},
logic_imm::{AndiInstruction, OriInstruction, XoriInstruction},
mul::MulhuInstruction,
Expand All @@ -27,7 +27,7 @@ use ceno_emul::{
InsnKind::{self, *},
Platform, StepRecord,
};
use divu::{DivDummy, RemDummy, RemuDummy};
use div::{DivDummy, RemDummy, RemuDummy};
use ecall::EcallDummy;
use ff_ext::ExtensionField;
use itertools::Itertools;
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34 changes: 30 additions & 4 deletions ceno_zkvm/src/uint.rs
Original file line number Diff line number Diff line change
Expand Up @@ -606,6 +606,30 @@ pub struct Value<'a, T: Into<u64> + From<u32> + Copy + Default> {
pub limbs: Cow<'a, [u16]>,
}

impl<'a, T: Into<u64> + From<u32> + Copy + Default> From<&'a Value<'a, T>> for &'a [u16] {
fn from(v: &'a Value<'a, T>) -> Self {
v.as_u16_limbs()
}
}

impl<'a, T: Into<u64> + From<u32> + Copy + Default> From<&Value<'a, T>> for u64 {
fn from(v: &Value<'a, T>) -> Self {
v.as_u64()
}
}

impl<'a, T: Into<u64> + From<u32> + Copy + Default> From<&Value<'a, T>> for u32 {
fn from(v: &Value<'a, T>) -> Self {
v.as_u32()
}
}

impl<'a, T: Into<u64> + From<u32> + Copy + Default> From<&Value<'a, T>> for i32 {
fn from(v: &Value<'a, T>) -> Self {
v.as_i32()
}
}

// TODO generalize to support non 16 bit limbs
// TODO optimize api with fixed size array
impl<'a, T: Into<u64> + From<u32> + Copy + Default> Value<'a, T> {
Expand All @@ -616,10 +640,7 @@ impl<'a, T: Into<u64> + From<u32> + Copy + Default> Value<'a, T> {
const LIMBS: usize = (Self::M + 15) / 16;

pub fn new(val: T, lkm: &mut LkMultiplicity) -> Self {
let uint = Value::<T> {
val,
limbs: Cow::Owned(Self::split_to_u16(val)),
};
let uint = Self::new_unchecked(val);
Self::assert_u16(&uint.limbs, lkm);
uint
}
Expand Down Expand Up @@ -684,6 +705,11 @@ impl<'a, T: Into<u64> + From<u32> + Copy + Default> Value<'a, T> {
self.as_u64() as u32
}

/// Convert the limbs to an i32 value
pub fn as_i32(&self) -> i32 {
self.as_u32() as i32
}

pub fn u16_fields<F: SmallField>(&self) -> Vec<F> {
self.limbs.iter().map(|v| F::from(*v as u64)).collect_vec()
}
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