From 0713aba9daaf2341191efacd31d51d303e97edbc Mon Sep 17 00:00:00 2001 From: kunxian xia Date: Thu, 26 Sep 2024 01:27:04 +0800 Subject: [PATCH] set pc = 0 after ecall/halt in ceno_emul --- ceno_emul/src/vm_state.rs | 1 + ceno_zkvm/src/instructions/riscv/ecall/halt.rs | 2 +- 2 files changed, 2 insertions(+), 1 deletion(-) diff --git a/ceno_emul/src/vm_state.rs b/ceno_emul/src/vm_state.rs index 3d8c70a03..f57a76762 100644 --- a/ceno_emul/src/vm_state.rs +++ b/ceno_emul/src/vm_state.rs @@ -95,6 +95,7 @@ impl EmuContext for VMState { let function = self.load_register(self.platform.reg_ecall())?; let argument = self.load_register(self.platform.reg_arg0())?; if function == self.platform.ecall_halt() && argument == self.platform.code_success() { + self.set_pc(ByteAddr(0)); self.succeeded = true; Ok(true) } else { diff --git a/ceno_zkvm/src/instructions/riscv/ecall/halt.rs b/ceno_zkvm/src/instructions/riscv/ecall/halt.rs index bb1d15cce..db4987249 100644 --- a/ceno_zkvm/src/instructions/riscv/ecall/halt.rs +++ b/ceno_zkvm/src/instructions/riscv/ecall/halt.rs @@ -74,7 +74,7 @@ impl Instruction for HaltInstruction { step.rs1().unwrap().value, (ECALL_HALT[0] + (ECALL_HALT[1] << 16)) as u32 ); - assert_eq!(step.pc().after.0, 0); + assert_eq!(step.pc().after.0, 0, "pc after ecall/halt {:x}", step.pc().after.0); set_val!( instance,