Verification - Unified Processing Engine.ipynb

{
 "cells": [
  {
   "cell_type": "markdown",
   "metadata": {},
   "source": [
    "# Unified Processing Engine\n",
    "#### Verification | Version 0.6.2 | Updated 2018.7.31\n",
    "___"
   ]
  },
  {
   "cell_type": "markdown",
   "metadata": {},
   "source": [
    "## Setup"
   ]
  },
  {
   "cell_type": "code",
   "execution_count": 1,
   "metadata": {},
   "outputs": [
    {
     "data": {
      "text/plain": [
       "\u001b[36mpath\u001b[39m: \u001b[32mString\u001b[39m = \u001b[32m\"\"\"\n",
       "C:\\Users\\RyanL\\OneDrive\\Research\\SEAL\\processing-engine/source/load-ivy.sc\n",
       "\"\"\"\u001b[39m"
      ]
     },
     "execution_count": 1,
     "metadata": {},
     "output_type": "execute_result"
    }
   ],
   "source": [
    "val path = System.getProperty(\"user.dir\") + \"/source/load-ivy.sc\"\n",
    "interp.load.module(ammonite.ops.Path(java.nio.file.FileSystems.getDefault().getPath(path)))"
   ]
  },
  {
   "cell_type": "code",
   "execution_count": 2,
   "metadata": {},
   "outputs": [
    {
     "data": {
      "text/plain": [
       "\u001b[32mimport \u001b[39m\u001b[36mchisel3._\r\n",
       "\u001b[39m\r\n",
       "\u001b[32mimport \u001b[39m\u001b[36mchisel3.util._\r\n",
       "\u001b[39m\r\n",
       "\u001b[32mimport \u001b[39m\u001b[36mchisel3.iotesters.{ChiselFlatSpec, Driver, PeekPokeTester}\r\n",
       "\r\n",
       "\u001b[39m\r\n",
       "\u001b[32mimport \u001b[39m\u001b[36mscala.math.pow\u001b[39m"
      ]
     },
     "execution_count": 2,
     "metadata": {},
     "output_type": "execute_result"
    }
   ],
   "source": [
    "import chisel3._\n",
    "import chisel3.util._\n",
    "import chisel3.iotesters.{ChiselFlatSpec, Driver, PeekPokeTester}\n",
    "\n",
    "import scala.math.pow"
   ]
  },
  {
   "cell_type": "markdown",
   "metadata": {},
   "source": [
    "## Register File"
   ]
  },
  {
   "cell_type": "markdown",
   "metadata": {},
   "source": [
    "##### Definition"
   ]
  },
  {
   "cell_type": "code",
   "execution_count": 4,
   "metadata": {},
   "outputs": [
    {
     "data": {
      "text/plain": [
       "defined \u001b[32mclass\u001b[39m \u001b[36mPartialRFConfig\u001b[39m\r\n",
       "defined \u001b[32mclass\u001b[39m \u001b[36mPartialRFControl\u001b[39m\r\n",
       "defined \u001b[32mclass\u001b[39m \u001b[36mRFConfig\u001b[39m\r\n",
       "defined \u001b[32mclass\u001b[39m \u001b[36mRFControl\u001b[39m\r\n",
       "defined \u001b[32mclass\u001b[39m \u001b[36mRF\u001b[39m"
      ]
     },
     "execution_count": 4,
     "metadata": {},
     "output_type": "execute_result"
    }
   ],
   "source": [
    "class PartialRFConfig(\n",
    "        val numInputs: Int,\n",
    "        val numOutputs: Int,\n",
    "        val numCrossInputs: Int,\n",
    "        val addrWidth: Int,\n",
    "        val bpSoft: Boolean,\n",
    "        val bpFirm: Boolean)\n",
    "\n",
    "class PartialRFControl(c: PartialRFConfig) extends Bundle {\n",
    "    val wEnable = Vec(c.numInputs, Bool())\n",
    "    val rEnable = Vec(c.numOutputs, Bool())\n",
    "    val wAddr = if (!c.bpFirm) Some(Vec(c.numInputs, UInt(c.addrWidth.W))) else None\n",
    "    val rAddr = if (!c.bpFirm) Some(Vec(c.numOutputs, UInt(c.addrWidth.W))) else None\n",
    "    // Each output can select which input of the opposite bus to bypass from\n",
    "    val bpSel = if (c.bpSoft || c.bpFirm) Some(Vec(c.numOutputs, Vec(c.numCrossInputs, Bool()))) else None\n",
    "}\n",
    "\n",
    "class RFConfig(\n",
    "        val numIntInputs: Int,\n",
    "        val numExtInputs: Int,\n",
    "        val numIntOutputs: Int,\n",
    "        val numExtOutputs: Int,\n",
    "        val addrWidth: Int,\n",
    "        val dataWidth: Int,\n",
    "        val bpType: String) {\n",
    "    \n",
    "    val bpNone = (bpType == \"None\")\n",
    "    val bpSoft = (bpType == \"Soft\")\n",
    "    val bpFirm = (bpType == \"Firm\")\n",
    "    \n",
    "    require(bpNone || bpSoft || bpFirm, \"Invalid Bypass type.\\n\")\n",
    "    require(numIntInputs > 0 || numExtInputs > 0, \"Must have at least one input.\\n\")\n",
    "    require(numIntOutputs > 0 || numExtOutputs > 0, \"Must have at least one output.\\n\")\n",
    "    require(dataWidth > 0, \"Data bitwidth must be at least one.\\n\") \n",
    "    if (bpFirm) { require(addrWidth == 0, \"Address width must be 0 when Firm Bypassing.\\n\") }\n",
    "    \n",
    "    val intConfig = new PartialRFConfig(\n",
    "        numIntInputs, numIntOutputs, numExtOutputs, addrWidth, bpSoft, bpFirm)\n",
    "    \n",
    "    val extConfig = new PartialRFConfig(\n",
    "        numExtInputs, numExtOutputs, numIntOutputs, addrWidth, bpSoft, bpFirm)\n",
    "}\n",
    "\n",
    "class RFControl(c: RFConfig) extends Bundle {\n",
    "    \n",
    "    override def cloneType = (new RFControl(c)).asInstanceOf[this.type]\n",
    "    \n",
    "    val internal = if (c.numIntInputs > 0 || c.numIntOutputs > 0)\n",
    "        Some(new PartialRFControl(c.intConfig)) else None\n",
    "    val external = if (c.numExtInputs > 0 || c.numExtOutputs > 0)\n",
    "        Some(new PartialRFControl(c.extConfig)) else None\n",
    "}\n",
    "\n",
    "class RF(c: RFConfig) extends Module {\n",
    "    \n",
    "    val io = IO(new Bundle {\n",
    "        val control = Input(new RFControl(c))\n",
    "        val wInternal = Input(Vec(c.numIntInputs, SInt(c.dataWidth.W))) \n",
    "        val wExternal = Input(Vec(c.numExtInputs, SInt(c.dataWidth.W)))\n",
    "        val rInternal = Output(Vec(c.numIntOutputs, SInt(c.dataWidth.W)))\n",
    "        val rExternal = Output(Vec(c.numExtOutputs, SInt(c.dataWidth.W)))\n",
    "    })\n",
    "    \n",
    "    val dataRegister = if (!c.bpFirm) \n",
    "        Some(RegInit(Vec.fill(pow(2, c.addrWidth).toInt){0.S(c.dataWidth.W)})) else None\n",
    "    \n",
    "    // Need to bypass through a register to prevent combinational loops\n",
    "    val bpAny = c.bpSoft || c.bpFirm\n",
    "    val bpRegisterInt = if (bpAny && c.numIntInputs > 0)\n",
    "        Some(RegInit(Vec.fill(c.numIntInputs){0.S(c.dataWidth.W)})) else None\n",
    "    val bpRegisterExt = if (bpAny && c.numExtInputs > 0)\n",
    "        Some(RegInit(Vec.fill(c.numExtInputs){0.S(c.dataWidth.W)})) else None\n",
    "    \n",
    "    for (i <- 0 until c.numIntInputs) {\n",
    "        when (io.control.internal.get.wEnable(i)) {\n",
    "            if (!c.bpFirm) { dataRegister.get(io.control.internal.get.wAddr.get(i)) := io.wInternal(i) }\n",
    "            if (bpRegisterInt.isDefined) { bpRegisterInt.get(i) := io.wInternal(i) }\n",
    "        }\n",
    "    }\n",
    "    \n",
    "    for (i <- 0 until c.numExtInputs) {\n",
    "        when (io.control.external.get.wEnable(i)) {\n",
    "            if (!c.bpFirm) { dataRegister.get(io.control.external.get.wAddr.get(i)) := io.wExternal(i) }\n",
    "            if (bpRegisterExt.isDefined) { bpRegisterExt.get(i) := io.wExternal(i) }\n",
    "        }\n",
    "    }\n",
    "    \n",
    "    for (i <- 0 until c.numIntOutputs) {\n",
    "        when (io.control.internal.get.rEnable(i)) {\n",
    "            if (c.bpFirm) {\n",
    "                io.rInternal(i) := PriorityMux(io.control.internal.get.bpSel.get(i), bpRegisterExt.get)\n",
    "            } else if (c.bpSoft) {\n",
    "                when (io.control.internal.get.bpSel.get(i).contains(true.B)) {\n",
    "                    // External write bypasses to Internal read\n",
    "                    io.rInternal(i) := PriorityMux(io.control.internal.get.bpSel.get(i), bpRegisterExt.get)\n",
    "                } .otherwise {\n",
    "                    io.rInternal(i) := dataRegister.get(io.control.internal.get.rAddr.get(i))\n",
    "                }\n",
    "            } else {\n",
    "                io.rInternal(i) := dataRegister.get(io.control.internal.get.rAddr.get(i))\n",
    "            }\n",
    "        } .otherwise {\n",
    "            io.rInternal(i) := 0.S\n",
    "        }\n",
    "    }\n",
    "    \n",
    "    for (i <- 0 until c.numExtOutputs) {\n",
    "        when (io.control.external.get.rEnable(i)) {\n",
    "            if (c.bpFirm) {\n",
    "                io.rExternal(i) := PriorityMux(io.control.external.get.bpSel.get(i), bpRegisterInt.get)\n",
    "            } else if (c.bpSoft) {\n",
    "                when (io.control.external.get.bpSel.get(i).contains(true.B)) {\n",
    "                    // Internal write bypasses to External read\n",
    "                    io.rExternal(i) := PriorityMux(io.control.external.get.bpSel.get(i), bpRegisterInt.get)\n",
    "                } .otherwise {\n",
    "                    io.rExternal(i) := dataRegister.get(io.control.external.get.rAddr.get(i))\n",
    "                }\n",
    "            } else {\n",
    "                io.rExternal(i) := dataRegister.get(io.control.external.get.rAddr.get(i))\n",
    "            }\n",
    "        } .otherwise {\n",
    "            io.rExternal(i) := 0.S\n",
    "        }\n",
    "    }\n",
    "}"
   ]
  },
  {
   "cell_type": "markdown",
   "metadata": {},
   "source": [
    "##### Verification"
   ]
  },
  {
   "cell_type": "code",
   "execution_count": 5,
   "metadata": {},
   "outputs": [
    {
     "name": "stdout",
     "output_type": "stream",
     "text": [
      "[\u001b[35minfo\u001b[0m] [0.001] Elaborating design...\n",
      "[\u001b[35minfo\u001b[0m] [0.089] Done elaborating.\n",
      "Total FIRRTL Compile Time: 374.2 ms\n",
      "Total FIRRTL Compile Time: 149.2 ms\n",
      "End of dependency graph\n",
      "Circuit state created\n",
      "[\u001b[35minfo\u001b[0m] [0.002] SEED 1533862079968\n",
      "test cmd3WrapperHelperRF Success: 8 tests passed in 6 cycles taking 0.052909 seconds\n",
      "[\u001b[35minfo\u001b[0m] [0.017] RAN 1 CYCLES PASSED\n",
      "[\u001b[35minfo\u001b[0m] [0.001] Elaborating design...\n",
      "[\u001b[35minfo\u001b[0m] [0.010] Done elaborating.\n",
      "Total FIRRTL Compile Time: 104.5 ms\n",
      "Total FIRRTL Compile Time: 98.8 ms\n",
      "End of dependency graph\n",
      "Circuit state created\n",
      "[\u001b[35minfo\u001b[0m] [0.000] SEED 1533862081153\n",
      "test cmd3WrapperHelperRF Success: 8 tests passed in 6 cycles taking 0.020892 seconds\n",
      "[\u001b[35minfo\u001b[0m] [0.011] RAN 1 CYCLES PASSED\n",
      "[\u001b[35minfo\u001b[0m] [0.000] Elaborating design...\n",
      "[\u001b[35minfo\u001b[0m] [0.013] Done elaborating.\n",
      "Total FIRRTL Compile Time: 121.6 ms\n",
      "Total FIRRTL Compile Time: 111.8 ms\n",
      "End of dependency graph\n",
      "Circuit state created\n",
      "[\u001b[35minfo\u001b[0m] [0.000] SEED 1533862081452\n",
      "test cmd3WrapperHelperRF Success: 4 tests passed in 6 cycles taking 0.012841 seconds\n",
      "[\u001b[35minfo\u001b[0m] [0.007] RAN 1 CYCLES PASSED\n",
      "[\u001b[35minfo\u001b[0m] [0.000] Elaborating design...\n",
      "[\u001b[35minfo\u001b[0m] [0.011] Done elaborating.\n",
      "Total FIRRTL Compile Time: 75.2 ms\n",
      "Total FIRRTL Compile Time: 105.8 ms\n",
      "End of dependency graph\n",
      "Circuit state created\n",
      "[\u001b[35minfo\u001b[0m] [0.000] SEED 1533862081792\n",
      "test cmd3WrapperHelperRF Success: 4 tests passed in 6 cycles taking 0.010551 seconds\n",
      "[\u001b[35minfo\u001b[0m] [0.006] RAN 1 CYCLES PASSED\n",
      "[\u001b[35minfo\u001b[0m] [0.000] Elaborating design...\n",
      "[\u001b[35minfo\u001b[0m] [0.008] Done elaborating.\n",
      "Total FIRRTL Compile Time: 98.1 ms\n",
      "Total FIRRTL Compile Time: 107.2 ms\n",
      "End of dependency graph\n",
      "Circuit state created\n",
      "[\u001b[35minfo\u001b[0m] [0.000] SEED 1533862082045\n",
      "test cmd3WrapperHelperRF Success: 0 tests passed in 5 cycles taking 0.012647 seconds\n",
      "[\u001b[35minfo\u001b[0m] [0.001] RAN 0 CYCLES PASSED\n",
      "[\u001b[35minfo\u001b[0m] [0.000] Elaborating design...\n",
      "[\u001b[35minfo\u001b[0m] [0.050] Done elaborating.\n",
      "Total FIRRTL Compile Time: 158.0 ms\n",
      "Total FIRRTL Compile Time: 128.0 ms\n",
      "End of dependency graph\n",
      "Circuit state created\n",
      "[\u001b[35minfo\u001b[0m] [0.000] SEED 1533862082344\n",
      "test cmd3WrapperHelperRF Success: 0 tests passed in 5 cycles taking 0.006862 seconds\n",
      "[\u001b[35minfo\u001b[0m] [0.000] RAN 0 CYCLES PASSED\n",
      "[\u001b[35minfo\u001b[0m] [0.000] Elaborating design...\n",
      "[\u001b[35minfo\u001b[0m] [0.005] Done elaborating.\n",
      "Total FIRRTL Compile Time: 28.9 ms\n",
      "Total FIRRTL Compile Time: 15.9 ms\n",
      "End of dependency graph\n",
      "Circuit state created\n",
      "[\u001b[35minfo\u001b[0m] [0.000] SEED 1533862082758\n",
      "test cmd3WrapperHelperRF Success: 0 tests passed in 5 cycles taking 0.001937 seconds\n",
      "[\u001b[35minfo\u001b[0m] [0.001] RAN 0 CYCLES PASSED\n"
     ]
    },
    {
     "data": {
      "text/plain": [
       "\u001b[36mexRFConfigNoIntWrite\u001b[39m: \u001b[32mRFConfig\u001b[39m = $sess.cmd3Wrapper$Helper$RFConfig@76371286\r\n",
       "\u001b[36mexRFConfigNoExtWrite\u001b[39m: \u001b[32mRFConfig\u001b[39m = $sess.cmd3Wrapper$Helper$RFConfig@54e86250\r\n",
       "\u001b[36mexRFConfigNoIntRead\u001b[39m: \u001b[32mRFConfig\u001b[39m = $sess.cmd3Wrapper$Helper$RFConfig@6e633646\r\n",
       "\u001b[36mexRFConfigNoExtRead\u001b[39m: \u001b[32mRFConfig\u001b[39m = $sess.cmd3Wrapper$Helper$RFConfig@2f190714\r\n",
       "\u001b[36mexRFConfigNoBypass\u001b[39m: \u001b[32mRFConfig\u001b[39m = $sess.cmd3Wrapper$Helper$RFConfig@61749353\r\n",
       "\u001b[36mexRFConfigSoftBypass\u001b[39m: \u001b[32mRFConfig\u001b[39m = $sess.cmd3Wrapper$Helper$RFConfig@769987cf\r\n",
       "\u001b[36mexRFConfigHardBypass\u001b[39m: \u001b[32mRFConfig\u001b[39m = $sess.cmd3Wrapper$Helper$RFConfig@13f5e5c\r\n",
       "\u001b[36mnoIntWriteTest\u001b[39m: \u001b[32mBoolean\u001b[39m = \u001b[32mtrue\u001b[39m\r\n",
       "\u001b[36mnoExtWriteTest\u001b[39m: \u001b[32mBoolean\u001b[39m = \u001b[32mtrue\u001b[39m\r\n",
       "\u001b[36mnoIntReadTest\u001b[39m: \u001b[32mBoolean\u001b[39m = \u001b[32mtrue\u001b[39m\r\n",
       "\u001b[36mnoExtReadTest\u001b[39m: \u001b[32mBoolean\u001b[39m = \u001b[32mtrue\u001b[39m\r\n",
       "\u001b[36mnoBypassTest\u001b[39m: \u001b[32mBoolean\u001b[39m = \u001b[32mtrue\u001b[39m\r\n",
       "\u001b[36msoftBypassTest\u001b[39m: \u001b[32mBoolean\u001b[39m = \u001b[32mtrue\u001b[39m\r\n",
       "\u001b[36mhardBypassTest\u001b[39m: \u001b[32mBoolean\u001b[39m = \u001b[32mtrue\u001b[39m"
      ]
     },
     "execution_count": 5,
     "metadata": {},
     "output_type": "execute_result"
    }
   ],
   "source": [
    "/*\n",
    "Basic Test Checklist:\n",
    "[x] Optional Hardware\n",
    "    [x] No Internal Read Port\n",
    "    [x] No External Read Port\n",
    "    [x] No Internal Write Port\n",
    "    [x] No External Write Port\n",
    "\n",
    "[-] No Bypass\n",
    "    [x] Standard Read/Write\n",
    "    [x] Port Independence \n",
    "    [x] Read Enable\n",
    "    [x] Write Enable\n",
    "\n",
    "[-] Soft Bypass\n",
    "    [-] Standard Read/Write\n",
    "    [-] Port Independence\n",
    "    [-] Read Enable\n",
    "    [-] Write Enable \n",
    "    [-] Bypass Enable/Select\n",
    "    \n",
    "[-] Hard Bypass\n",
    "    [-] Bypass Enable/Select\n",
    "    \n",
    "[x] Enable\n",
    "    [x] Read\n",
    "    [x] Write\n",
    "\n",
    "Better would be to check these together.\n",
    "Even better would be to use Golden Model...\n",
    "*/\n",
    "\n",
    "// TODO: Do this.\n",
    "val exRFConfigNoIntWrite = new RFConfig(0, 2, 2, 2, 4, 8, \"None\")\n",
    "val exRFConfigNoExtWrite = new RFConfig(2, 0, 2, 2, 4, 8, \"None\")\n",
    "val exRFConfigNoIntRead = new RFConfig(2, 2, 0, 2, 4, 8, \"None\")\n",
    "val exRFConfigNoExtRead = new RFConfig(2, 2, 2, 0, 4, 8, \"None\")\n",
    "\n",
    "val exRFConfigNoBypass = new RFConfig(2, 2, 2, 2, 4, 8, \"None\")\n",
    "val exRFConfigSoftBypass = new RFConfig(2, 2, 2, 2, 4, 8, \"Soft\")\n",
    "val exRFConfigHardBypass = new RFConfig(2, 2, 2, 2, 0, 8, \"Firm\")\n",
    "\n",
    "// There has to be a better way than these monolithic blocks of code..\n",
    "\n",
    "val noIntWriteTest = Driver(() => new RF(exRFConfigNoIntWrite)) {\n",
    "    uut => new PeekPokeTester(uut) {\n",
    "        poke(uut.io.control.external.get.wEnable(0), true)\n",
    "        poke(uut.io.control.external.get.wEnable(1), false)\n",
    "        poke(uut.io.control.external.get.rEnable(0), false)\n",
    "        poke(uut.io.control.external.get.rEnable(1), false)\n",
    "        poke(uut.io.control.external.get.wAddr.get(0), 0)\n",
    "        poke(uut.io.control.external.get.wAddr.get(1), 1)\n",
    "        poke(uut.io.control.external.get.rAddr.get(0), 0)\n",
    "        poke(uut.io.control.external.get.rAddr.get(1), 1)\n",
    "        \n",
    "        poke(uut.io.wExternal(0), 10)\n",
    "        poke(uut.io.wExternal(1), 11)\n",
    "        \n",
    "        poke(uut.io.control.internal.get.rEnable(0), false)\n",
    "        poke(uut.io.control.internal.get.rEnable(1), false)\n",
    "        poke(uut.io.control.internal.get.rAddr.get(0), 0)\n",
    "        poke(uut.io.control.internal.get.rAddr.get(1), 1)\n",
    "        \n",
    "        step(1)\n",
    "        \n",
    "        expect(uut.io.rInternal(0), 0)\n",
    "        expect(uut.io.rInternal(1), 0)\n",
    "        expect(uut.io.rExternal(0), 0)\n",
    "        expect(uut.io.rExternal(1), 0)\n",
    "        \n",
    "        poke(uut.io.control.internal.get.rEnable(0), true)\n",
    "        poke(uut.io.control.internal.get.rEnable(1), true)\n",
    "        poke(uut.io.control.external.get.rEnable(0), true)\n",
    "        poke(uut.io.control.external.get.rEnable(1), true)\n",
    "        \n",
    "        expect(uut.io.rInternal(0), 10)\n",
    "        expect(uut.io.rInternal(1), 0)\n",
    "        expect(uut.io.rExternal(0), 10)\n",
    "        expect(uut.io.rExternal(1), 0)\n",
    "    }\n",
    "}\n",
    "\n",
    "val noExtWriteTest = Driver(() => new RF(exRFConfigNoExtWrite)) {\n",
    "    uut => new PeekPokeTester(uut) {\n",
    "        poke(uut.io.control.internal.get.wEnable(0), true)\n",
    "        poke(uut.io.control.internal.get.wEnable(1), false)\n",
    "        poke(uut.io.control.internal.get.rEnable(0), false)\n",
    "        poke(uut.io.control.internal.get.rEnable(1), false)\n",
    "        poke(uut.io.control.internal.get.wAddr.get(0), 0)\n",
    "        poke(uut.io.control.internal.get.wAddr.get(1), 1)\n",
    "        poke(uut.io.control.internal.get.rAddr.get(0), 0)\n",
    "        poke(uut.io.control.internal.get.rAddr.get(1), 1)\n",
    "        \n",
    "        poke(uut.io.wInternal(0), 10)\n",
    "        poke(uut.io.wInternal(1), 11)\n",
    "        \n",
    "        poke(uut.io.control.external.get.rEnable(0), false)\n",
    "        poke(uut.io.control.external.get.rEnable(1), false)\n",
    "        poke(uut.io.control.external.get.rAddr.get(0), 0)\n",
    "        poke(uut.io.control.external.get.rAddr.get(1), 1)\n",
    "        \n",
    "        step(1)\n",
    "        \n",
    "        expect(uut.io.rInternal(0), 0)\n",
    "        expect(uut.io.rInternal(1), 0)\n",
    "        expect(uut.io.rExternal(0), 0)\n",
    "        expect(uut.io.rExternal(1), 0)\n",
    "        \n",
    "        poke(uut.io.control.internal.get.rEnable(0), true)\n",
    "        poke(uut.io.control.internal.get.rEnable(1), true)\n",
    "        poke(uut.io.control.external.get.rEnable(0), true)\n",
    "        poke(uut.io.control.external.get.rEnable(1), true)\n",
    "        \n",
    "        expect(uut.io.rInternal(0), 10)\n",
    "        expect(uut.io.rInternal(1), 0)\n",
    "        expect(uut.io.rExternal(0), 10)\n",
    "        expect(uut.io.rExternal(1), 0)\n",
    "    }\n",
    "}\n",
    "\n",
    "val noIntReadTest = Driver(() => new RF(exRFConfigNoIntRead)) {\n",
    "    uut => new PeekPokeTester(uut) {\n",
    "        poke(uut.io.control.internal.get.wEnable(0), true)\n",
    "        poke(uut.io.control.internal.get.wEnable(1), true)\n",
    "        poke(uut.io.control.internal.get.wAddr.get(0), 0)\n",
    "        poke(uut.io.control.internal.get.wAddr.get(1), 1)\n",
    "        \n",
    "        poke(uut.io.wInternal(0), 10)\n",
    "        poke(uut.io.wInternal(1), 11)\n",
    "        \n",
    "        poke(uut.io.control.external.get.wEnable(0), true)\n",
    "        poke(uut.io.control.external.get.wEnable(1), true)\n",
    "        poke(uut.io.control.external.get.rEnable(0), false)\n",
    "        poke(uut.io.control.external.get.rEnable(1), false)\n",
    "        poke(uut.io.control.external.get.wAddr.get(0), 2)\n",
    "        poke(uut.io.control.external.get.wAddr.get(1), 3)\n",
    "        poke(uut.io.control.external.get.rAddr.get(0), 2)\n",
    "        poke(uut.io.control.external.get.rAddr.get(1), 3)\n",
    "        \n",
    "        poke(uut.io.wExternal(0), 12)\n",
    "        poke(uut.io.wExternal(1), 13)\n",
    "        \n",
    "        step(1)\n",
    "        \n",
    "        expect(uut.io.rExternal(0), 0)\n",
    "        expect(uut.io.rExternal(1), 0)\n",
    "        \n",
    "        poke(uut.io.control.external.get.rEnable(0), true)\n",
    "        poke(uut.io.control.external.get.rEnable(1), true)\n",
    "        \n",
    "        expect(uut.io.rExternal(0), 12)\n",
    "        expect(uut.io.rExternal(1), 13)\n",
    "    }\n",
    "}\n",
    "\n",
    "val noExtReadTest = Driver(() => new RF(exRFConfigNoExtRead)) {\n",
    "    uut => new PeekPokeTester(uut) {\n",
    "        poke(uut.io.control.external.get.wEnable(0), true)\n",
    "        poke(uut.io.control.external.get.wEnable(1), true)\n",
    "        poke(uut.io.control.external.get.wAddr.get(0), 0)\n",
    "        poke(uut.io.control.external.get.wAddr.get(1), 1)\n",
    "        \n",
    "        poke(uut.io.wExternal(0), 10)\n",
    "        poke(uut.io.wExternal(1), 11)\n",
    "        \n",
    "        poke(uut.io.control.internal.get.wEnable(0), true)\n",
    "        poke(uut.io.control.internal.get.wEnable(1), true)\n",
    "        poke(uut.io.control.internal.get.rEnable(0), false)\n",
    "        poke(uut.io.control.internal.get.rEnable(1), false)\n",
    "        poke(uut.io.control.internal.get.wAddr.get(0), 2)\n",
    "        poke(uut.io.control.internal.get.wAddr.get(1), 3)\n",
    "        poke(uut.io.control.internal.get.rAddr.get(0), 2)\n",
    "        poke(uut.io.control.internal.get.rAddr.get(1), 3)\n",
    "        \n",
    "        poke(uut.io.wInternal(0), 12)\n",
    "        poke(uut.io.wInternal(1), 13)\n",
    "        \n",
    "        step(1)\n",
    "        \n",
    "        expect(uut.io.rInternal(0), 0)\n",
    "        expect(uut.io.rInternal(1), 0)\n",
    "        \n",
    "        poke(uut.io.control.internal.get.rEnable(0), true)\n",
    "        poke(uut.io.control.internal.get.rEnable(1), true)\n",
    "        \n",
    "        expect(uut.io.rInternal(0), 12)\n",
    "        expect(uut.io.rInternal(1), 13)\n",
    "    }\n",
    "}\n",
    "\n",
    "val noBypassTest = Driver(() => new RF(exRFConfigNoBypass)) {\n",
    "    uut => new PeekPokeTester(uut) {\n",
    "        // TODO\n",
    "    }\n",
    "}\n",
    "\n",
    "val softBypassTest = Driver(() => new RF(exRFConfigSoftBypass)) {\n",
    "    uut => new PeekPokeTester(uut) {\n",
    "        // TODO\n",
    "    }\n",
    "}\n",
    "\n",
    "val hardBypassTest = Driver(() => new RF(exRFConfigHardBypass)) {\n",
    "    uut => new PeekPokeTester(uut) {\n",
    "        // TODO\n",
    "    }\n",
    "}\n",
    "                          "
   ]
  },
  {
   "cell_type": "markdown",
   "metadata": {},
   "source": [
    "## Inner Product Unit"
   ]
  },
  {
   "cell_type": "markdown",
   "metadata": {},
   "source": [
    "##### Definition"
   ]
  },
  {
   "cell_type": "code",
   "execution_count": 6,
   "metadata": {},
   "outputs": [
    {
     "data": {
      "text/plain": [
       "defined \u001b[32mclass\u001b[39m \u001b[36mIPUConfig\u001b[39m\r\n",
       "defined \u001b[32mclass\u001b[39m \u001b[36mIPUOutput\u001b[39m\r\n",
       "defined \u001b[32mclass\u001b[39m \u001b[36mIPU\u001b[39m"
      ]
     },
     "execution_count": 6,
     "metadata": {},
     "output_type": "execute_result"
    }
   ],
   "source": [
    "class IPUConfig(val width: Int, val inBitWidth: Int, val outBitWidth: Int, val bpType: String) {\n",
    "    \n",
    "    require(width >= 1, \"Width must be at least one.\\n\")\n",
    "    require(List(\"None\", \"Firm\").contains(bpType), \"Bypass must be \\\"None\\\" or \\\"Firm\\\".\\n\")\n",
    "    require(inBitWidth > 0 && outBitWidth > 0, \"Data bitwidth must be greater than 0\\n\")\n",
    "    \n",
    "    val bpFirm = (bpType == \"Firm\")\n",
    "}\n",
    "\n",
    "class IPUOutput(outBitWidth: Int, bp: Boolean) extends Bundle {\n",
    "    \n",
    "    override def cloneType = (new IPUOutput(outBitWidth, bp)).asInstanceOf[this.type]\n",
    "    \n",
    "    val innerProd = SInt(outBitWidth.W)\n",
    "    // Extending the bitwidths for consistency\n",
    "    val bpWeight = if (bp) Some(SInt(outBitWidth.W)) else None\n",
    "    val bpActvtn = if (bp) Some(SInt(outBitWidth.W)) else None\n",
    "}\n",
    "\n",
    "\n",
    "class IPU(c: IPUConfig) extends Module {\n",
    "\n",
    "    val io = IO(new Bundle {\n",
    "        val bpSel = if (c.bpFirm) Some(Input(Vec(c.width, Bool()))) else None\n",
    "        val weightIn = Input(Vec(c.width, SInt(c.inBitWidth.W)))\n",
    "        val actvtnIn = Input(Vec(c.width, SInt(c.inBitWidth.W)))\n",
    "        val out = Output(new IPUOutput(c.outBitWidth, c.bpFirm))\n",
    "    })\n",
    "    \n",
    "    private class PMult extends Module {\n",
    "        val io = IO(new Bundle {\n",
    "            val weightVec = Input(Vec(c.width, SInt(c.inBitWidth.W)))\n",
    "            val actvtnVec = Input(Vec(c.width, SInt(c.inBitWidth.W)))\n",
    "            val pairwiseProd = Output(Vec(c.width, SInt(c.outBitWidth.W)))\n",
    "        })\n",
    "        io.pairwiseProd := (io.weightVec zip io.actvtnVec).map { case(a, b) => a * b }\n",
    "    }\n",
    "    \n",
    "    private class SumTree extends Module {\n",
    "        val io = IO(new Bundle {\n",
    "            val inVec = Input(Vec(c.width, SInt(c.outBitWidth.W)))\n",
    "            val sum = Output(SInt(c.outBitWidth.W))\n",
    "        })\n",
    "        \n",
    "        // Recursively creates a balanced syntax tree\n",
    "        private def adjReduce[A](xs: List[A], op: (A, A) => A): A = xs match {\n",
    "            case List(single) => single\n",
    "            case default => {\n",
    "                val grouped = default.grouped(2).toList\n",
    "                val result = for (g <- grouped) yield { g match {\n",
    "                    case List(a, b) => op(a, b)\n",
    "                    case List(x) => x\n",
    "                }}\n",
    "                adjReduce(result, op)\n",
    "            }\n",
    "        }\n",
    "        \n",
    "        io.sum := adjReduce(io.inVec.toList, (x: SInt, y: SInt) => x + y)\n",
    "    }\n",
    "    \n",
    "    private val pMult = Module(new PMult)\n",
    "    pMult.io.weightVec := io.weightIn\n",
    "    pMult.io.actvtnVec := io.actvtnIn\n",
    "    \n",
    "    private val sumTree = Module(new SumTree)\n",
    "    sumTree.io.inVec := pMult.io.pairwiseProd\n",
    "    \n",
    "    io.out.innerProd := sumTree.io.sum\n",
    "    \n",
    "    if (c.bpFirm) {\n",
    "        io.out.bpWeight.get := PriorityMux(io.bpSel.get, io.weightIn)\n",
    "        io.out.bpActvtn.get := PriorityMux(io.bpSel.get, io.actvtnIn)\n",
    "    }\n",
    "}"
   ]
  },
  {
   "cell_type": "markdown",
   "metadata": {},
   "source": [
    "#### Verification"
   ]
  },
  {
   "cell_type": "code",
   "execution_count": 7,
   "metadata": {},
   "outputs": [
    {
     "name": "stdout",
     "output_type": "stream",
     "text": [
      "[\u001b[35minfo\u001b[0m] [0.000] Elaborating design...\n",
      "[\u001b[35minfo\u001b[0m] [0.025] Done elaborating.\n",
      "Total FIRRTL Compile Time: 39.8 ms\n",
      "Total FIRRTL Compile Time: 22.7 ms\n",
      "End of dependency graph\n",
      "Circuit state created\n",
      "[\u001b[35minfo\u001b[0m] [0.000] SEED 1533862091419\n",
      "test cmd5WrapperHelperIPU Success: 0 tests passed in 5 cycles taking 0.005219 seconds\n",
      "[\u001b[35minfo\u001b[0m] [0.001] RAN 0 CYCLES PASSED\n",
      "[\u001b[35minfo\u001b[0m] [0.000] Elaborating design...\n",
      "[\u001b[35minfo\u001b[0m] [0.006] Done elaborating.\n",
      "Total FIRRTL Compile Time: 28.4 ms\n",
      "Total FIRRTL Compile Time: 32.2 ms\n",
      "End of dependency graph\n",
      "Circuit state created\n",
      "[\u001b[35minfo\u001b[0m] [0.000] SEED 1533862091544\n",
      "test cmd5WrapperHelperIPU Success: 0 tests passed in 5 cycles taking 0.007576 seconds\n",
      "[\u001b[35minfo\u001b[0m] [0.000] RAN 0 CYCLES PASSED\n",
      "[\u001b[35minfo\u001b[0m] [0.000] Elaborating design...\n",
      "[\u001b[35minfo\u001b[0m] [0.009] Done elaborating.\n",
      "Total FIRRTL Compile Time: 25.0 ms\n",
      "Total FIRRTL Compile Time: 19.3 ms\n",
      "End of dependency graph\n",
      "Circuit state created\n",
      "[\u001b[35minfo\u001b[0m] [0.000] SEED 1533862091639\n",
      "test cmd5WrapperHelperIPU Success: 0 tests passed in 5 cycles taking 0.002383 seconds\n",
      "[\u001b[35minfo\u001b[0m] [0.000] RAN 0 CYCLES PASSED\n",
      "[\u001b[35minfo\u001b[0m] [0.000] Elaborating design...\n",
      "[\u001b[35minfo\u001b[0m] [0.004] Done elaborating.\n",
      "Total FIRRTL Compile Time: 24.4 ms\n",
      "Total FIRRTL Compile Time: 18.8 ms\n",
      "End of dependency graph\n",
      "Circuit state created\n",
      "[\u001b[35minfo\u001b[0m] [0.000] SEED 1533862091711\n",
      "test cmd5WrapperHelperIPU Success: 0 tests passed in 5 cycles taking 0.002613 seconds\n",
      "[\u001b[35minfo\u001b[0m] [0.000] RAN 0 CYCLES PASSED\n"
     ]
    },
    {
     "data": {
      "text/plain": [
       "\u001b[36mexIPUConfigNoBypass\u001b[39m: \u001b[32mIPUConfig\u001b[39m = $sess.cmd5Wrapper$Helper$IPUConfig@57534974\r\n",
       "\u001b[36mexIPUConfigFirmBypass\u001b[39m: \u001b[32mIPUConfig\u001b[39m = $sess.cmd5Wrapper$Helper$IPUConfig@6dad91c6\r\n",
       "\u001b[36mexIPUConfigDiffBW1\u001b[39m: \u001b[32mIPUConfig\u001b[39m = $sess.cmd5Wrapper$Helper$IPUConfig@4f296458\r\n",
       "\u001b[36mexIPUConfigDiffBW2\u001b[39m: \u001b[32mIPUConfig\u001b[39m = $sess.cmd5Wrapper$Helper$IPUConfig@45450a5f\r\n",
       "\u001b[36mres6_4\u001b[39m: \u001b[32mBoolean\u001b[39m = \u001b[32mtrue\u001b[39m\r\n",
       "\u001b[36mres6_5\u001b[39m: \u001b[32mBoolean\u001b[39m = \u001b[32mtrue\u001b[39m\r\n",
       "\u001b[36mres6_6\u001b[39m: \u001b[32mBoolean\u001b[39m = \u001b[32mtrue\u001b[39m\r\n",
       "\u001b[36mres6_7\u001b[39m: \u001b[32mBoolean\u001b[39m = \u001b[32mtrue\u001b[39m"
      ]
     },
     "execution_count": 7,
     "metadata": {},
     "output_type": "execute_result"
    }
   ],
   "source": [
    "/*\n",
    "Basic Test Checklist:\n",
    "[-] Inner Products\n",
    "\n",
    "[-] None Bypass\n",
    "\n",
    "[-] Firm Bypass\n",
    "    [-] Bypass Select\n",
    "\n",
    "[-] Differing bitwidths\n",
    "    [-] Small -> Large\n",
    "    [-] Large -> Small\n",
    "    [-] Bypass bitwidth\n",
    "\n",
    "Better would be to check these together.\n",
    "Even better would be to use Golden Model...\n",
    "*/\n",
    "\n",
    "val exIPUConfigNoBypass = new IPUConfig(4, 8, 8, \"None\")\n",
    "val exIPUConfigFirmBypass = new IPUConfig(4, 8, 8, \"Firm\")\n",
    "val exIPUConfigDiffBW1 = new IPUConfig(4, 4, 8, \"None\")\n",
    "val exIPUConfigDiffBW2 = new IPUConfig(4, 8, 4, \"None\")\n",
    "\n",
    "Driver(() => new IPU(exIPUConfigNoBypass)) {\n",
    "    uut => new PeekPokeTester(uut) {\n",
    "        // TODO\n",
    "    }\n",
    "}\n",
    "\n",
    "Driver(() => new IPU(exIPUConfigFirmBypass)) {\n",
    "    uut => new PeekPokeTester(uut) {\n",
    "        // TODO\n",
    "    }\n",
    "}\n",
    "\n",
    "Driver(() => new IPU(exIPUConfigDiffBW1)) {\n",
    "    uut => new PeekPokeTester(uut) {\n",
    "        // TODO\n",
    "    }\n",
    "}\n",
    "\n",
    "Driver(() => new IPU(exIPUConfigDiffBW2)) {\n",
    "    uut => new PeekPokeTester(uut) {\n",
    "        // TODO\n",
    "    }\n",
    "}"
   ]
  },
  {
   "cell_type": "markdown",
   "metadata": {},
   "source": [
    "## ALU"
   ]
  },
  {
   "cell_type": "markdown",
   "metadata": {},
   "source": [
    "#### Definition"
   ]
  },
  {
   "cell_type": "code",
   "execution_count": 8,
   "metadata": {},
   "outputs": [
    {
     "data": {
      "text/plain": [
       "defined \u001b[32mclass\u001b[39m \u001b[36mALUConfig\u001b[39m\r\n",
       "defined \u001b[32mclass\u001b[39m \u001b[36mALUFSel\u001b[39m\r\n",
       "defined \u001b[32mclass\u001b[39m \u001b[36mALU\u001b[39m"
      ]
     },
     "execution_count": 8,
     "metadata": {},
     "output_type": "execute_result"
    }
   ],
   "source": [
    "class ALUConfig(val dataWidth: Int, val funcs: List[String]) {\n",
    "    \n",
    "    require(funcs.length > 0, \"Must support at least one function.\")\n",
    "    for(x <- funcs) { \n",
    "        require(List(\"Identity\", \"Add\", \"Max\", \"Accumulate\").contains(x), \"Unsupported function.\")\n",
    "    }\n",
    "    \n",
    "    val idnSupp = funcs.contains(\"Identity\")\n",
    "    val addSupp = funcs.contains(\"Add\")\n",
    "    val maxSupp = funcs.contains(\"Max\")\n",
    "    val accSupp = funcs.contains(\"Accumulate\")\n",
    "    val addBypassIn = addSupp || maxSupp\n",
    "}\n",
    "\n",
    "class ALUFSel(c: ALUConfig) extends Bundle {\n",
    "    \n",
    "    override def cloneType = (new ALUFSel(c)).asInstanceOf[this.type]\n",
    "    \n",
    "    // Priority is given from top to bottom\n",
    "    val idnEnable = if (c.idnSupp) Some(Bool()) else None\n",
    "    val addEnable = if (c.addSupp) Some(Bool()) else None\n",
    "    val maxEnable = if (c.maxSupp) Some(Bool()) else None\n",
    "    val accEnable = if (c.accSupp) Some(Bool()) else None\n",
    "}\n",
    "\n",
    "class ALU(c: ALUConfig) extends Module {\n",
    " \n",
    "    val io = IO(new Bundle {\n",
    "        val fSel = Input(new ALUFSel(c))\n",
    "        val ipu = Input(new IPUOutput(c.dataWidth, c.addBypassIn))\n",
    "        val rf = if (c.accSupp) Some(Input(SInt(c.dataWidth.W))) else None\n",
    "        val out = Output(SInt(c.dataWidth.W))\n",
    "    })\n",
    "    \n",
    "    // The inner \"OrElse\" clauses are logically unnecessary,\n",
    "    // but Chisel can't infer that.\n",
    "    when (io.fSel.idnEnable.getOrElse(false.B)) {\n",
    "        io.out := io.ipu.innerProd\n",
    "    } .elsewhen (io.fSel.addEnable.getOrElse(false.B)) {\n",
    "        io.out := io.ipu.bpWeight.getOrElse(0.S) + io.ipu.bpActvtn.getOrElse(0.S)\n",
    "    } .elsewhen (io.fSel.maxEnable.getOrElse(false.B)) {\n",
    "        when (io.ipu.bpWeight.getOrElse(0.S) > io.ipu.bpActvtn.getOrElse(0.S)) {\n",
    "            io.out := io.ipu.bpWeight.getOrElse(0.S)\n",
    "        } .otherwise {\n",
    "            io.out := io.ipu.bpActvtn.getOrElse(0.S)\n",
    "        }\n",
    "    } .elsewhen (io.fSel.accEnable.getOrElse(false.B)) {\n",
    "        io.out := io.ipu.innerProd + io.rf.getOrElse(0.S)\n",
    "    } .otherwise {\n",
    "        io.out := 0.S\n",
    "    }\n",
    "}"
   ]
  },
  {
   "cell_type": "markdown",
   "metadata": {},
   "source": [
    "#### Verification"
   ]
  },
  {
   "cell_type": "code",
   "execution_count": 9,
   "metadata": {},
   "outputs": [
    {
     "name": "stdout",
     "output_type": "stream",
     "text": [
      "[\u001b[35minfo\u001b[0m] [0.000] Elaborating design...\n",
      "[\u001b[35minfo\u001b[0m] [0.015] Done elaborating.\n",
      "Total FIRRTL Compile Time: 13.7 ms\n",
      "Total FIRRTL Compile Time: 10.5 ms\n",
      "End of dependency graph\n",
      "Circuit state created\n",
      "[\u001b[35minfo\u001b[0m] [0.000] SEED 1533862100653\n",
      "test cmd7WrapperHelperALU Success: 0 tests passed in 5 cycles taking 0.001040 seconds\n",
      "[\u001b[35minfo\u001b[0m] [0.000] RAN 0 CYCLES PASSED\n",
      "[\u001b[35minfo\u001b[0m] [0.000] Elaborating design...\n",
      "[\u001b[35minfo\u001b[0m] [0.002] Done elaborating.\n",
      "Total FIRRTL Compile Time: 12.2 ms\n",
      "Total FIRRTL Compile Time: 9.1 ms\n",
      "End of dependency graph\n",
      "Circuit state created\n",
      "[\u001b[35minfo\u001b[0m] [0.000] SEED 1533862100706\n",
      "test cmd7WrapperHelperALU Success: 0 tests passed in 5 cycles taking 0.001181 seconds\n",
      "[\u001b[35minfo\u001b[0m] [0.001] RAN 0 CYCLES PASSED\n",
      "[\u001b[35minfo\u001b[0m] [0.000] Elaborating design...\n",
      "[\u001b[35minfo\u001b[0m] [0.003] Done elaborating.\n",
      "Total FIRRTL Compile Time: 10.7 ms\n",
      "Total FIRRTL Compile Time: 9.3 ms\n",
      "End of dependency graph\n",
      "Circuit state created\n",
      "[\u001b[35minfo\u001b[0m] [0.000] SEED 1533862100752\n",
      "test cmd7WrapperHelperALU Success: 0 tests passed in 5 cycles taking 0.001039 seconds\n",
      "[\u001b[35minfo\u001b[0m] [0.000] RAN 0 CYCLES PASSED\n",
      "[\u001b[35minfo\u001b[0m] [0.000] Elaborating design...\n",
      "[\u001b[35minfo\u001b[0m] [0.003] Done elaborating.\n",
      "Total FIRRTL Compile Time: 12.5 ms\n",
      "Total FIRRTL Compile Time: 8.4 ms\n",
      "End of dependency graph\n",
      "Circuit state created\n",
      "[\u001b[35minfo\u001b[0m] [0.000] SEED 1533862100790\n",
      "test cmd7WrapperHelperALU Success: 0 tests passed in 5 cycles taking 0.000993 seconds\n",
      "[\u001b[35minfo\u001b[0m] [0.000] RAN 0 CYCLES PASSED\n",
      "[\u001b[35minfo\u001b[0m] [0.000] Elaborating design...\n",
      "[\u001b[35minfo\u001b[0m] [0.003] Done elaborating.\n",
      "Total FIRRTL Compile Time: 15.4 ms\n",
      "Total FIRRTL Compile Time: 8.9 ms\n",
      "End of dependency graph\n",
      "Circuit state created\n",
      "[\u001b[35minfo\u001b[0m] [0.000] SEED 1533862100830\n",
      "test cmd7WrapperHelperALU Success: 0 tests passed in 5 cycles taking 0.001183 seconds\n",
      "[\u001b[35minfo\u001b[0m] [0.001] RAN 0 CYCLES PASSED\n"
     ]
    },
    {
     "data": {
      "text/plain": [
       "\u001b[36mexALUConfigIdn\u001b[39m: \u001b[32mALUConfig\u001b[39m = $sess.cmd7Wrapper$Helper$ALUConfig@5a5e4f7e\r\n",
       "\u001b[36mexALUConfigAdd\u001b[39m: \u001b[32mALUConfig\u001b[39m = $sess.cmd7Wrapper$Helper$ALUConfig@71d3b19b\r\n",
       "\u001b[36mexALUConfigMax\u001b[39m: \u001b[32mALUConfig\u001b[39m = $sess.cmd7Wrapper$Helper$ALUConfig@1c6517a3\r\n",
       "\u001b[36mexALUConfigAcc\u001b[39m: \u001b[32mALUConfig\u001b[39m = $sess.cmd7Wrapper$Helper$ALUConfig@2dc6a6cd\r\n",
       "\u001b[36mexALUConfigAll\u001b[39m: \u001b[32mALUConfig\u001b[39m = $sess.cmd7Wrapper$Helper$ALUConfig@54b39b4\r\n",
       "\u001b[36mres8_5\u001b[39m: \u001b[32mBoolean\u001b[39m = \u001b[32mtrue\u001b[39m\r\n",
       "\u001b[36mres8_6\u001b[39m: \u001b[32mBoolean\u001b[39m = \u001b[32mtrue\u001b[39m\r\n",
       "\u001b[36mres8_7\u001b[39m: \u001b[32mBoolean\u001b[39m = \u001b[32mtrue\u001b[39m\r\n",
       "\u001b[36mres8_8\u001b[39m: \u001b[32mBoolean\u001b[39m = \u001b[32mtrue\u001b[39m\r\n",
       "\u001b[36mres8_9\u001b[39m: \u001b[32mBoolean\u001b[39m = \u001b[32mtrue\u001b[39m"
      ]
     },
     "execution_count": 9,
     "metadata": {},
     "output_type": "execute_result"
    }
   ],
   "source": [
    "/*\n",
    "Basic Test Checklist:\n",
    "[-] Alone\n",
    "    [-] Identity\n",
    "    [-] Add\n",
    "    [-] Max\n",
    "    [-] Accumulate\n",
    "\n",
    "[-] All functions together\n",
    "    [-] Identity\n",
    "    [-] Add\n",
    "    [-] Max\n",
    "    [-] Accumulate\n",
    "    [-] Priority\n",
    "\n",
    "Better would be to check these together.\n",
    "Even better would be to use Golden Model...\n",
    "*/\n",
    "\n",
    "val exALUConfigIdn = new ALUConfig(8, List(\"Identity\"))\n",
    "val exALUConfigAdd = new ALUConfig(8, List(\"Add\"))\n",
    "val exALUConfigMax = new ALUConfig(8, List(\"Max\"))\n",
    "val exALUConfigAcc = new ALUConfig(8, List(\"Accumulate\"))\n",
    "val exALUConfigAll = new ALUConfig(8, List(\"Identity\", \"Add\", \"Max\", \"Accumulate\"))\n",
    "\n",
    "\n",
    "Driver(() => new ALU(exALUConfigIdn)) {\n",
    "    uut => new PeekPokeTester(uut) {\n",
    "        // TODO\n",
    "    }\n",
    "}\n",
    "\n",
    "Driver(() => new ALU(exALUConfigAdd)) {\n",
    "    uut => new PeekPokeTester(uut) {\n",
    "        // TODO\n",
    "    }\n",
    "}\n",
    "\n",
    "Driver(() => new ALU(exALUConfigMax)) {\n",
    "    uut => new PeekPokeTester(uut) {\n",
    "        // TODO\n",
    "    }\n",
    "}\n",
    "\n",
    "Driver(() => new ALU(exALUConfigAcc)) {\n",
    "    uut => new PeekPokeTester(uut) {\n",
    "        // TODO\n",
    "    }\n",
    "}\n",
    "\n",
    "Driver(() => new ALU(exALUConfigAll)) {\n",
    "    uut => new PeekPokeTester(uut) {\n",
    "        // TODO\n",
    "    }\n",
    "}"
   ]
  },
  {
   "cell_type": "markdown",
   "metadata": {},
   "source": [
    "## Nonlinear Unit"
   ]
  },
  {
   "cell_type": "code",
   "execution_count": 10,
   "metadata": {},
   "outputs": [
    {
     "data": {
      "text/plain": [
       "defined \u001b[32mclass\u001b[39m \u001b[36mNLUConfig\u001b[39m\r\n",
       "defined \u001b[32mclass\u001b[39m \u001b[36mNLUFSel\u001b[39m\r\n",
       "defined \u001b[32mclass\u001b[39m \u001b[36mNLU\u001b[39m"
      ]
     },
     "execution_count": 10,
     "metadata": {},
     "output_type": "execute_result"
    }
   ],
   "source": [
    "class NLUConfig(val inBitWidth: Int, val outBitWidth: Int, val funcs: List[String]) {\n",
    "    \n",
    "    for(x <- funcs) {\n",
    "        require(List(\"Identity\", \"ReLu\").contains(x), \"Unsupported Function\")\n",
    "    }\n",
    "    \n",
    "    val idSupp = funcs.contains(\"Identity\")\n",
    "    val reluSupp = funcs.contains(\"ReLu\")\n",
    "    val tanhSupp = false //funcs.contains(\"tanh\")\n",
    "    val sinhSupp = false //funcs.contains(\"sinh\")\n",
    "}\n",
    "\n",
    "class NLUFSel(c: NLUConfig) extends Bundle {\n",
    "    \n",
    "    override def cloneType = (new NLUFSel(c)).asInstanceOf[this.type]\n",
    "    \n",
    "    val idEnable = if (c.idSupp) Some(Bool()) else None\n",
    "    val reluEnable = if (c.reluSupp) Some(Bool()) else None\n",
    "    val tanhEnable = if (c.tanhSupp) Some(Bool()) else None \n",
    "    val sinhEnable = if (c.sinhSupp) Some(Bool()) else None\n",
    "}\n",
    "\n",
    "class NLU(c: NLUConfig) extends Module {\n",
    "    \n",
    "    val io = IO(new Bundle {\n",
    "        val fSel = Input(new NLUFSel(c))\n",
    "        val in = Input(SInt(c.inBitWidth.W))\n",
    "        val out = Output(SInt(c.outBitWidth.W))\n",
    "    })\n",
    "    \n",
    "    when (io.fSel.idEnable.getOrElse(false.B)) {\n",
    "        io.out := io.in\n",
    "    } .elsewhen (io.fSel.reluEnable.getOrElse(false.B)) {\n",
    "        when (io.in.data > 0.S) {\n",
    "            io.out := io.in.data\n",
    "        } .otherwise {\n",
    "            io.out := 0.S\n",
    "        }\n",
    "    } .elsewhen (io.fSel.tanhEnable.getOrElse(false.B)) {\n",
    "        // TODO\n",
    "        io.out := 0.S\n",
    "    } .elsewhen (io.fSel.sinhEnable.getOrElse(false.B)) {\n",
    "        // TODO\n",
    "        io.out := 0.S\n",
    "    } .otherwise {\n",
    "        io.out := 0.S\n",
    "    }\n",
    "}"
   ]
  },
  {
   "cell_type": "code",
   "execution_count": 11,
   "metadata": {},
   "outputs": [
    {
     "name": "stdout",
     "output_type": "stream",
     "text": [
      "[\u001b[35minfo\u001b[0m] [0.000] Elaborating design...\n",
      "[\u001b[35minfo\u001b[0m] [0.012] Done elaborating.\n",
      "Total FIRRTL Compile Time: 6.4 ms\n",
      "Total FIRRTL Compile Time: 5.2 ms\n",
      "End of dependency graph\n",
      "Circuit state created\n",
      "[\u001b[35minfo\u001b[0m] [0.000] SEED 1533862114359\n",
      "test cmd9WrapperHelperNLU Success: 0 tests passed in 5 cycles taking 0.000944 seconds\n",
      "[\u001b[35minfo\u001b[0m] [0.000] RAN 0 CYCLES PASSED\n",
      "[\u001b[35minfo\u001b[0m] [0.000] Elaborating design...\n",
      "[\u001b[35minfo\u001b[0m] [0.004] Done elaborating.\n",
      "Total FIRRTL Compile Time: 6.9 ms\n",
      "Total FIRRTL Compile Time: 5.1 ms\n",
      "End of dependency graph\n",
      "Circuit state created\n",
      "[\u001b[35minfo\u001b[0m] [0.000] SEED 1533862114396\n",
      "test cmd9WrapperHelperNLU Success: 0 tests passed in 5 cycles taking 0.000946 seconds\n",
      "[\u001b[35minfo\u001b[0m] [0.001] RAN 0 CYCLES PASSED\n",
      "[\u001b[35minfo\u001b[0m] [0.000] Elaborating design...\n",
      "[\u001b[35minfo\u001b[0m] [0.002] Done elaborating.\n",
      "Total FIRRTL Compile Time: 6.6 ms\n",
      "Total FIRRTL Compile Time: 4.9 ms\n",
      "End of dependency graph\n",
      "Circuit state created\n",
      "[\u001b[35minfo\u001b[0m] [0.000] SEED 1533862114425\n",
      "test cmd9WrapperHelperNLU Success: 0 tests passed in 5 cycles taking 0.000797 seconds\n",
      "[\u001b[35minfo\u001b[0m] [0.000] RAN 0 CYCLES PASSED\n"
     ]
    },
    {
     "data": {
      "text/plain": [
       "\u001b[36mexNLUConfigId\u001b[39m: \u001b[32mNLUConfig\u001b[39m = $sess.cmd9Wrapper$Helper$NLUConfig@148d5998\r\n",
       "\u001b[36mexNLUConfigReLu\u001b[39m: \u001b[32mNLUConfig\u001b[39m = $sess.cmd9Wrapper$Helper$NLUConfig@4c568f91\r\n",
       "\u001b[36mexNLUConfigIdReLu\u001b[39m: \u001b[32mNLUConfig\u001b[39m = $sess.cmd9Wrapper$Helper$NLUConfig@2b6e493c\r\n",
       "\u001b[36mres10_3\u001b[39m: \u001b[32mBoolean\u001b[39m = \u001b[32mtrue\u001b[39m\r\n",
       "\u001b[36mres10_4\u001b[39m: \u001b[32mBoolean\u001b[39m = \u001b[32mtrue\u001b[39m\r\n",
       "\u001b[36mres10_5\u001b[39m: \u001b[32mBoolean\u001b[39m = \u001b[32mtrue\u001b[39m"
      ]
     },
     "execution_count": 11,
     "metadata": {},
     "output_type": "execute_result"
    }
   ],
   "source": [
    "/*\n",
    "Basic Test Checklist:\n",
    "[ ] Alone\n",
    "    [ ] Identity\n",
    "    [ ] ReLu\n",
    "    [ ] tanh\n",
    "    [ ] sinh\n",
    "\n",
    "[ ] All functions together\n",
    "    [ ] Identity works\n",
    "    [ ] ReLu works\n",
    "    [ ] tanh works\n",
    "    [ ] sinh works\n",
    "    [ ] Correct Priority\n",
    "\n",
    "Better would be to check these together.\n",
    "Even better would be to use Golden Model...\n",
    "*/\n",
    "\n",
    "val exNLUConfigId = new NLUConfig(8, 8, List(\"Identity\"))\n",
    "val exNLUConfigReLu = new NLUConfig(8, 8, List(\"ReLu\"))\n",
    "val exNLUConfigIdReLu = new NLUConfig(8, 8, List(\"Identity\", \"ReLu\"))\n",
    "\n",
    "Driver(() => new NLU(exNLUConfigId)) {\n",
    "    uut => new PeekPokeTester(uut) {\n",
    "\n",
    "    }\n",
    "}\n",
    "\n",
    "Driver(() => new NLU(exNLUConfigReLu)) {\n",
    "    uut => new PeekPokeTester(uut) {\n",
    "\n",
    "    }\n",
    "}\n",
    "\n",
    "Driver(() => new NLU(exNLUConfigIdReLu)) {\n",
    "    uut => new PeekPokeTester(uut) {\n",
    "\n",
    "    }\n",
    "}"
   ]
  },
  {
   "cell_type": "markdown",
   "metadata": {},
   "source": [
    "## Control"
   ]
  },
  {
   "cell_type": "markdown",
   "metadata": {},
   "source": [
    "### Decoder"
   ]
  },
  {
   "cell_type": "markdown",
   "metadata": {},
   "source": [
    "#### Definition"
   ]
  },
  {
   "cell_type": "code",
   "execution_count": 12,
   "metadata": {},
   "outputs": [
    {
     "data": {
      "text/plain": [
       "defined \u001b[32mclass\u001b[39m \u001b[36mPEConfig\u001b[39m\r\n",
       "defined \u001b[32mclass\u001b[39m \u001b[36mMemoryControl\u001b[39m\r\n",
       "defined \u001b[32mclass\u001b[39m \u001b[36mProcessControl\u001b[39m\r\n",
       "defined \u001b[32mclass\u001b[39m \u001b[36mDecoder\u001b[39m"
      ]
     },
     "execution_count": 12,
     "metadata": {},
     "output_type": "execute_result"
    }
   ],
   "source": [
    "class PEConfig(\n",
    "        val weightRFConfig: RFConfig,\n",
    "        val actvtnRFConfig: RFConfig,\n",
    "        val scratchRFConfig: RFConfig,\n",
    "        val ipuConfig: IPUConfig,\n",
    "        val aluConfig: ALUConfig,\n",
    "        val nluConfig: NLUConfig,\n",
    "        //val smConfig: StateMachineConfig,\n",
    "        val smWidth: Int,\n",
    "        val decodeWeightRF: (UInt, RFConfig) => Data,\n",
    "        val decodeActvtnRF: (UInt, RFConfig) => Data,\n",
    "        val decodeScratchRF: (UInt, RFConfig) => Data,\n",
    "        val decodeIPU: (UInt, IPUConfig) => Data,\n",
    "        val decodeALU: (UInt, ALUConfig) => Data,\n",
    "        val decodeNLU: (UInt, NLUConfig) => Data) {\n",
    "\n",
    "    require(ipuConfig.width == weightRFConfig.numIntOutputs, \n",
    "        \"IPU input width not equal to Weight RF Internal Output width.\\n\")\n",
    "    require(ipuConfig.width == actvtnRFConfig.numIntOutputs,\n",
    "        \"IPU input width not equal to Activation RF Internal Output width.\\n\")\n",
    "    \n",
    "    if(ipuConfig.bpFirm) {\n",
    "        require(aluConfig.addSupp || aluConfig.maxSupp,\n",
    "            \"Incompatible ALU and IPU Configurations\")\n",
    "    }\n",
    "}\n",
    "\n",
    "class MemoryControl(c: PEConfig) extends Bundle {\n",
    "    \n",
    "    override def cloneType = (new MemoryControl(c)).asInstanceOf[this.type]\n",
    "    \n",
    "    val weightRF = new RFControl(c.weightRFConfig)\n",
    "    val actvtnRF = new RFControl(c.actvtnRFConfig)\n",
    "    val scratchRF = new RFControl(c.scratchRFConfig)\n",
    "}\n",
    "\n",
    "class ProcessControl(c: PEConfig) extends Bundle {\n",
    "    \n",
    "    override def cloneType = (new ProcessControl(c)).asInstanceOf[this.type]\n",
    "    \n",
    "    val aluFSel = Output(new ALUFSel(c.aluConfig))\n",
    "    val nluFSel = Output(new NLUFSel(c.nluConfig))\n",
    "    \n",
    "    val ipuBpSel = if (c.ipuConfig.bpFirm) Some(Output(Vec(c.ipuConfig.width, Bool()))) else None\n",
    "}\n",
    "\n",
    "class Decoder(c: PEConfig) extends Module {\n",
    "    \n",
    "    val io = IO(new Bundle {\n",
    "        val state = Input(UInt(c.smWidth.W))\n",
    "        val mem = Output(new MemoryControl(c))\n",
    "        val proc = Output(new ProcessControl(c))\n",
    "    })\n",
    "    \n",
    "    io.mem.weightRF <> c.decodeWeightRF(io.state, c.weightRFConfig)\n",
    "    io.mem.actvtnRF <> c.decodeActvtnRF(io.state, c.actvtnRFConfig)\n",
    "    io.mem.scratchRF <> c.decodeScratchRF(io.state, c.scratchRFConfig)\n",
    "    \n",
    "    if (c.ipuConfig.bpFirm) { \n",
    "        io.proc.ipuBpSel.get := c.decodeIPU(io.state, c.ipuConfig)\n",
    "    }\n",
    "    \n",
    "    io.proc.aluFSel <> c.decodeALU(io.state, c.aluConfig)\n",
    "    io.proc.nluFSel <> c.decodeNLU(io.state, c.nluConfig)\n",
    "}"
   ]
  },
  {
   "cell_type": "markdown",
   "metadata": {},
   "source": [
    "#### Example"
   ]
  },
  {
   "cell_type": "code",
   "execution_count": 15,
   "metadata": {},
   "outputs": [
    {
     "data": {
      "text/plain": [
       "\u001b[36mexampleDecodeWeightRF\u001b[39m: (\u001b[32mUInt\u001b[39m, \u001b[32mRFConfig\u001b[39m) => \u001b[32mRFControl\u001b[39m = <function2>\r\n",
       "\u001b[36mexampleDecodeActvtnRF\u001b[39m: (\u001b[32mUInt\u001b[39m, \u001b[32mRFConfig\u001b[39m) => \u001b[32mRFControl\u001b[39m = <function2>\r\n",
       "\u001b[36mexampleDecodeScratchRF\u001b[39m: (\u001b[32mUInt\u001b[39m, \u001b[32mRFConfig\u001b[39m) => \u001b[32mRFControl\u001b[39m = <function2>\r\n",
       "defined \u001b[32mfunction\u001b[39m \u001b[36mexampleDecodeIPU\u001b[39m\r\n",
       "defined \u001b[32mfunction\u001b[39m \u001b[36mexampleDecodeALU\u001b[39m\r\n",
       "defined \u001b[32mfunction\u001b[39m \u001b[36mexampleDecodeNLU\u001b[39m"
      ]
     },
     "execution_count": 15,
     "metadata": {},
     "output_type": "execute_result"
    }
   ],
   "source": [
    "val exampleDecodeWeightRF = (state: UInt, c: RFConfig) => {\n",
    "    \n",
    "    val data = Wire(new RFControl(c))\n",
    "    \n",
    "    val ic = c.intConfig\n",
    "    val ec = c.extConfig\n",
    "    \n",
    "    when (state === 0.U) {\n",
    "        \n",
    "        // Can't call Vec.fill on size 0.\n",
    "        // You shouldn't be doing anything like this since you know\n",
    "        // the shape of the RFs in advanced. Also, this is just terrible.\n",
    "        if (ic.numInputs > 0) {\n",
    "            data.internal.get.wEnable := Vec.fill(ic.numInputs){true.B}\n",
    "            data.internal.get.wAddr.get := Vec.fill(ic.numInputs){1.U}\n",
    "        }\n",
    "        \n",
    "        if (ic.numOutputs > 0) {\n",
    "            data.internal.get.rEnable := Vec.fill(ic.numOutputs){true.B}\n",
    "            data.internal.get.rAddr.get := Vec.fill(ic.numOutputs){2.U}\n",
    "            if (ic.numCrossInputs > 0) {\n",
    "                data.internal.get.bpSel.get := Vec.fill(ic.numOutputs){\n",
    "                    Vec.fill(ic.numCrossInputs){true.B}}\n",
    "            }\n",
    "        }\n",
    "        \n",
    "        if (ec.numInputs > 0) {\n",
    "            data.external.get.wEnable := Vec.fill(ec.numInputs){true.B}\n",
    "            data.external.get.wAddr.get := Vec.fill(ec.numInputs){3.U}\n",
    "        }\n",
    "        \n",
    "        if (ec.numOutputs > 0) {\n",
    "            data.external.get.rEnable := Vec.fill(ec.numOutputs){true.B}\n",
    "            data.external.get.rAddr.get := Vec.fill(ec.numOutputs){4.U}\n",
    "            if (ec.numCrossInputs > 0) {\n",
    "                data.external.get.bpSel.get := Vec.fill(ec.numOutputs){\n",
    "                    Vec.fill(ec.numCrossInputs){true.B}}\n",
    "            }\n",
    "        }\n",
    "        \n",
    "    } .otherwise {\n",
    "        \n",
    "        if (ic.numInputs > 0) {\n",
    "            data.internal.get.wAddr.get := Vec.fill(ic.numInputs){5.U}\n",
    "            data.internal.get.wEnable := Vec.fill(ic.numInputs){false.B}\n",
    "        }\n",
    "        \n",
    "        if (ic.numOutputs > 0) {\n",
    "            data.internal.get.rEnable := Vec.fill(ic.numOutputs){false.B}\n",
    "            data.internal.get.rAddr.get := Vec.fill(ic.numOutputs){6.U}\n",
    "            if(ic.numCrossInputs > 0) {\n",
    "                data.internal.get.bpSel.get := Vec.fill(ic.numOutputs){\n",
    "                    Vec.fill(ic.numCrossInputs){false.B}}\n",
    "            }\n",
    "        }\n",
    "        \n",
    "        if (ec.numInputs > 0) {\n",
    "            data.external.get.wEnable := Vec.fill(ec.numInputs){false.B}\n",
    "            data.external.get.wAddr.get := Vec.fill(ec.numInputs){7.U}\n",
    "        }\n",
    "        \n",
    "        if(ec.numOutputs > 0) {\n",
    "            data.external.get.rEnable := Vec.fill(ec.numOutputs){false.B}\n",
    "            data.external.get.rAddr.get := Vec.fill(ec.numOutputs){8.U}\n",
    "            if(ec.numCrossInputs > 0) {\n",
    "                data.external.get.bpSel.get := Vec.fill(ec.numOutputs){\n",
    "                    Vec.fill(ec.numCrossInputs){false.B}}\n",
    "        \n",
    "            }\n",
    "        }\n",
    "    }\n",
    "    \n",
    "    data\n",
    "}\n",
    "\n",
    "val exampleDecodeActvtnRF = exampleDecodeWeightRF\n",
    "val exampleDecodeScratchRF = exampleDecodeWeightRF\n",
    "\n",
    "def exampleDecodeIPU(state: UInt, c: IPUConfig) = {\n",
    "    \n",
    "    val data = Wire(Vec(c.width, Bool()))\n",
    "    \n",
    "    when (state === 0.U) {\n",
    "        data := Vec(false.B :: true.B :: Nil)\n",
    "    } .otherwise {\n",
    "        data := Vec(true.B :: false.B :: Nil)\n",
    "    }\n",
    "    \n",
    "    data\n",
    "}\n",
    "\n",
    "def exampleDecodeALU(state: UInt, c: ALUConfig) = {\n",
    "    \n",
    "    val data = Wire(new ALUFSel(c))\n",
    "    \n",
    "    when (state === 0.U) {\n",
    "        data.idnEnable.get := true.B\n",
    "        data.addEnable.get := false.B\n",
    "        data.maxEnable.get := false.B\n",
    "        data.accEnable.get := false.B\n",
    "    } .otherwise {\n",
    "        data.idnEnable.get := false.B\n",
    "        data.addEnable.get := true.B\n",
    "        data.maxEnable.get := false.B\n",
    "        data.accEnable.get := false.B\n",
    "    }\n",
    "    \n",
    "    data\n",
    "}\n",
    "\n",
    "def exampleDecodeNLU(state: UInt, c: NLUConfig) = {\n",
    "    \n",
    "    val data = Wire(new NLUFSel(c))\n",
    "    \n",
    "    when (state === 0.U) {\n",
    "        data.idEnable.get := true.B\n",
    "        data.reluEnable.get := false.B\n",
    "    } .otherwise {\n",
    "        data.idEnable.get := false.B\n",
    "        data.reluEnable.get := true.B\n",
    "    }\n",
    "    \n",
    "    data\n",
    "}\n"
   ]
  },
  {
   "cell_type": "markdown",
   "metadata": {},
   "source": [
    "#### Verification"
   ]
  },
  {
   "cell_type": "code",
   "execution_count": 16,
   "metadata": {},
   "outputs": [
    {
     "name": "stdout",
     "output_type": "stream",
     "text": [
      "[\u001b[35minfo\u001b[0m] [0.000] Elaborating design...\n",
      "[\u001b[35minfo\u001b[0m] [0.051] Done elaborating.\n",
      "Total FIRRTL Compile Time: 81.5 ms\n",
      "Total FIRRTL Compile Time: 43.2 ms\n",
      "End of dependency graph\n",
      "Circuit state created\n",
      "[\u001b[35minfo\u001b[0m] [0.000] SEED 1533145921179\n",
      "test cmd13WrapperHelperDecoder Success: 76 tests passed in 7 cycles taking 0.028451 seconds\n",
      "[\u001b[35minfo\u001b[0m] [0.022] RAN 2 CYCLES PASSED\n"
     ]
    },
    {
     "data": {
      "text/plain": [
       "\u001b[36mexamplePEConfigForDecoder\u001b[39m: \u001b[32mPEConfig\u001b[39m = $sess.cmd13Wrapper$Helper$PEConfig@25ee56ff\r\n",
       "\u001b[36mres15_1\u001b[39m: \u001b[32mBoolean\u001b[39m = \u001b[32mtrue\u001b[39m"
      ]
     },
     "execution_count": 16,
     "metadata": {},
     "output_type": "execute_result"
    }
   ],
   "source": [
    "val examplePEConfigForDecoder = new PEConfig(\n",
    "    new RFConfig(1, 1, 2, 1, 4, 8, \"Soft\"),\n",
    "    new RFConfig(1, 1, 2, 1, 4, 8, \"Soft\"),\n",
    "    new RFConfig(1, 1, 1, 1, 4, 8, \"Soft\"),\n",
    "    new IPUConfig(2, 8, 8, \"Firm\"),\n",
    "    new ALUConfig(8, List(\"Identity\", \"Add\", \"Max\", \"Accumulate\")),\n",
    "    new NLUConfig(8, 8, List(\"Identity\", \"ReLu\")),\n",
    "    new StateMachineConfig(4, 4, exampleStateMap),\n",
    "    exampleDecodeWeightRF,\n",
    "    exampleDecodeActvtnRF,\n",
    "    exampleDecodeScratchRF,\n",
    "    exampleDecodeIPU,\n",
    "    exampleDecodeALU,\n",
    "    exampleDecodeNLU\n",
    ")\n",
    "\n",
    "\n",
    "Driver(() => new Decoder(examplePEConfigForDecoder)) {\n",
    "    \n",
    "    uut => new PeekPokeTester(uut) {\n",
    "        \n",
    "        poke(uut.io.state, 0.U)\n",
    "        step(1)\n",
    "        \n",
    "        expect(uut.io.mem.weightRF.internal.get.wEnable(0), true.B)\n",
    "        expect(uut.io.mem.weightRF.internal.get.rEnable(0), true.B)\n",
    "        expect(uut.io.mem.weightRF.internal.get.wAddr.get(0), 1.U)\n",
    "        expect(uut.io.mem.weightRF.internal.get.rAddr.get(0), 2.U)\n",
    "        expect(uut.io.mem.weightRF.internal.get.bpSel.get(0)(0), true.B)\n",
    "        \n",
    "        expect(uut.io.mem.weightRF.external.get.wEnable(0), true.B)\n",
    "        expect(uut.io.mem.weightRF.external.get.rEnable(0), true.B)\n",
    "        expect(uut.io.mem.weightRF.external.get.wAddr.get(0), 3.U)\n",
    "        expect(uut.io.mem.weightRF.external.get.rAddr.get(0), 4.U)\n",
    "        expect(uut.io.mem.weightRF.external.get.bpSel.get(0)(0), true.B)\n",
    "        \n",
    "        expect(uut.io.mem.actvtnRF.internal.get.wEnable(0), true.B)\n",
    "        expect(uut.io.mem.actvtnRF.internal.get.rEnable(0), true.B)\n",
    "        expect(uut.io.mem.actvtnRF.internal.get.wAddr.get(0), 1.U)\n",
    "        expect(uut.io.mem.actvtnRF.internal.get.rAddr.get(0), 2.U)\n",
    "        expect(uut.io.mem.actvtnRF.internal.get.bpSel.get(0)(0), true.B)\n",
    "        \n",
    "        expect(uut.io.mem.actvtnRF.external.get.wEnable(0), true.B)\n",
    "        expect(uut.io.mem.actvtnRF.external.get.rEnable(0), true.B)\n",
    "        expect(uut.io.mem.actvtnRF.external.get.wAddr.get(0), 3.U)\n",
    "        expect(uut.io.mem.actvtnRF.external.get.rAddr.get(0), 4.U)\n",
    "        expect(uut.io.mem.actvtnRF.external.get.bpSel.get(0)(0), true.B)\n",
    "        \n",
    "        expect(uut.io.proc.ipuBpSel.get(0), 0)\n",
    "        expect(uut.io.proc.ipuBpSel.get(1), 1)\n",
    "        \n",
    "        expect(uut.io.proc.aluFSel.idnEnable.get, 1)\n",
    "        expect(uut.io.proc.aluFSel.addEnable.get, 0)\n",
    "        expect(uut.io.proc.aluFSel.maxEnable.get, 0)\n",
    "        expect(uut.io.proc.aluFSel.accEnable.get, 0)\n",
    "        \n",
    "        expect(uut.io.mem.scratchRF.internal.get.wEnable(0), true.B)\n",
    "        expect(uut.io.mem.scratchRF.internal.get.rEnable(0), true.B)\n",
    "        expect(uut.io.mem.scratchRF.internal.get.wAddr.get(0), 1.U)\n",
    "        expect(uut.io.mem.scratchRF.internal.get.rAddr.get(0), 2.U)\n",
    "        expect(uut.io.mem.scratchRF.internal.get.bpSel.get(0)(0), true.B)\n",
    "        \n",
    "        expect(uut.io.mem.scratchRF.external.get.wEnable(0), true.B)\n",
    "        expect(uut.io.mem.scratchRF.external.get.rEnable(0), true.B)\n",
    "        expect(uut.io.mem.scratchRF.external.get.wAddr.get(0), 3.U)\n",
    "        expect(uut.io.mem.scratchRF.external.get.rAddr.get(0), 4.U)\n",
    "        expect(uut.io.mem.scratchRF.external.get.bpSel.get(0)(0), true.B)\n",
    "\n",
    "        expect(uut.io.proc.nluFSel.idEnable.get, 1)\n",
    "        expect(uut.io.proc.nluFSel.reluEnable.get, 0)\n",
    "        \n",
    "        poke(uut.io.state, 1.U) \n",
    "        step(1)\n",
    "        \n",
    "        expect(uut.io.mem.weightRF.internal.get.wEnable(0), false.B)\n",
    "        expect(uut.io.mem.weightRF.internal.get.rEnable(0), false.B)\n",
    "        expect(uut.io.mem.weightRF.internal.get.wAddr.get(0), 5.U)\n",
    "        expect(uut.io.mem.weightRF.internal.get.rAddr.get(0), 6.U)\n",
    "        expect(uut.io.mem.weightRF.internal.get.bpSel.get(0)(0), false.B)\n",
    "        \n",
    "        expect(uut.io.mem.weightRF.external.get.wEnable(0), false.B)\n",
    "        expect(uut.io.mem.weightRF.external.get.rEnable(0), false.B)\n",
    "        expect(uut.io.mem.weightRF.external.get.wAddr.get(0), 7.U)\n",
    "        expect(uut.io.mem.weightRF.external.get.rAddr.get(0), 8.U)\n",
    "        expect(uut.io.mem.weightRF.external.get.bpSel.get(0)(0), false.B)\n",
    "        \n",
    "        expect(uut.io.mem.actvtnRF.internal.get.wEnable(0), false.B)\n",
    "        expect(uut.io.mem.actvtnRF.internal.get.rEnable(0), false.B)\n",
    "        expect(uut.io.mem.actvtnRF.internal.get.wAddr.get(0), 5.U)\n",
    "        expect(uut.io.mem.actvtnRF.internal.get.rAddr.get(0), 6.U)\n",
    "        expect(uut.io.mem.actvtnRF.internal.get.bpSel.get(0)(0), false.B)\n",
    "        \n",
    "        expect(uut.io.mem.actvtnRF.external.get.wEnable(0), false.B)\n",
    "        expect(uut.io.mem.actvtnRF.external.get.rEnable(0), false.B)\n",
    "        expect(uut.io.mem.actvtnRF.external.get.wAddr.get(0), 7.U)\n",
    "        expect(uut.io.mem.actvtnRF.external.get.rAddr.get(0), 8.U)\n",
    "        expect(uut.io.mem.actvtnRF.external.get.bpSel.get(0)(0), false.B)\n",
    "        \n",
    "        expect(uut.io.proc.ipuBpSel.get(0), 1)\n",
    "        expect(uut.io.proc.ipuBpSel.get(1), 0)\n",
    "        \n",
    "        expect(uut.io.proc.aluFSel.idnEnable.get, 0)\n",
    "        expect(uut.io.proc.aluFSel.addEnable.get, 1)\n",
    "        expect(uut.io.proc.aluFSel.maxEnable.get, 0)\n",
    "        expect(uut.io.proc.aluFSel.accEnable.get, 0)\n",
    "        \n",
    "        expect(uut.io.mem.scratchRF.internal.get.wEnable(0), false.B)\n",
    "        expect(uut.io.mem.scratchRF.internal.get.rEnable(0), false.B)\n",
    "        expect(uut.io.mem.scratchRF.internal.get.wAddr.get(0), 5.U)\n",
    "        expect(uut.io.mem.scratchRF.internal.get.rAddr.get(0), 6.U)\n",
    "        expect(uut.io.mem.scratchRF.internal.get.bpSel.get(0)(0), false.B)\n",
    "        \n",
    "        expect(uut.io.mem.scratchRF.external.get.wEnable(0), false.B)\n",
    "        expect(uut.io.mem.scratchRF.external.get.rEnable(0), false.B)\n",
    "        expect(uut.io.mem.scratchRF.external.get.wAddr.get(0), 7.U)\n",
    "        expect(uut.io.mem.scratchRF.external.get.rAddr.get(0), 8.U)\n",
    "        expect(uut.io.mem.scratchRF.external.get.bpSel.get(0)(0), false.B)\n",
    "        \n",
    "        expect(uut.io.proc.nluFSel.idEnable.get, 0)\n",
    "        expect(uut.io.proc.nluFSel.reluEnable.get, 1)\n",
    "        \n",
    "    }\n",
    "}\n"
   ]
  },
  {
   "cell_type": "markdown",
   "metadata": {},
   "source": [
    "## PE"
   ]
  },
  {
   "cell_type": "markdown",
   "metadata": {},
   "source": [
    "##### Definition"
   ]
  },
  {
   "cell_type": "code",
   "execution_count": 13,
   "metadata": {},
   "outputs": [
    {
     "data": {
      "text/plain": [
       "defined \u001b[32mclass\u001b[39m \u001b[36mPE\u001b[39m"
      ]
     },
     "execution_count": 13,
     "metadata": {},
     "output_type": "execute_result"
    }
   ],
   "source": [
    "class PE(c: PEConfig) extends Module {\n",
    "    \n",
    "    val cw = c.weightRFConfig\n",
    "    val ca = c.actvtnRFConfig\n",
    "    val cs = c.scratchRFConfig\n",
    "    \n",
    "    val io = IO(new Bundle {\n",
    "        val stateCtrl = Input(UInt(c.smWidth.W))\n",
    "        val toWeightRF = Input(Vec(cw.numExtInputs, SInt(cw.dataWidth.W))) \n",
    "        val toActvtnRF = Input(Vec(ca.numExtInputs, SInt(ca.dataWidth.W)))\n",
    "        val toScratchRF = Input(Vec(cs.numExtInputs, SInt(cs.dataWidth.W)))\n",
    "        val fromWeightRF = Output(Vec(cw.numExtOutputs, SInt(cw.dataWidth.W)))\n",
    "        val fromActvtnRF = Output(Vec(ca.numExtOutputs, SInt(ca.dataWidth.W)))\n",
    "        val fromScratchRF = Output(Vec(cs.numExtOutputs, SInt(cs.dataWidth.W)))\n",
    "        val totalOutput = Output(SInt(c.nluConfig.outBitWidth.W))\n",
    "    })\n",
    "    \n",
    "    val decoder = Module(new Decoder(c))\n",
    "    decoder.io.state := io.stateCtrl\n",
    "    \n",
    "    val weightRF = Module(new RF(cw))\n",
    "    weightRF.io.control <> decoder.io.mem.weightRF\n",
    "    weightRF.io.wExternal := io.toWeightRF\n",
    "    io.fromWeightRF := weightRF.io.rExternal\n",
    "    \n",
    "    val actvtnRF = Module(new RF(ca))\n",
    "    actvtnRF.io.control <> decoder.io.mem.actvtnRF\n",
    "    actvtnRF.io.wExternal := io.toActvtnRF\n",
    "    io.fromActvtnRF := actvtnRF.io.rExternal\n",
    "       \n",
    "    val ipu = Module(new IPU(c.ipuConfig))\n",
    "    if (ipu.io.bpSel.isDefined) { \n",
    "        ipu.io.bpSel.get := decoder.io.proc.ipuBpSel.get \n",
    "    }\n",
    "    ipu.io.weightIn := weightRF.io.rInternal\n",
    "    ipu.io.actvtnIn := actvtnRF.io.rInternal\n",
    "\n",
    "    val alu = Module(new ALU(c.aluConfig))\n",
    "    alu.io.fSel <> decoder.io.proc.aluFSel\n",
    "    alu.io.ipu <> ipu.io.out\n",
    "    \n",
    "    val scratchRF = Module(new RF(cs))\n",
    "    scratchRF.io.control <> decoder.io.mem.scratchRF\n",
    "    scratchRF.io.wExternal := io.toScratchRF\n",
    "    scratchRF.io.wInternal(0) := alu.io.out // TODO: Add Req. for this\n",
    "    io.fromScratchRF := scratchRF.io.rExternal\n",
    "    if(alu.io.rf.isDefined) { \n",
    "        alu.io.rf.get := scratchRF.io.rInternal(0) // TODO: Add Req. for this\n",
    "    }\n",
    "    \n",
    "    val nlu = Module(new NLU(c.nluConfig))\n",
    "    nlu.io.fSel <> decoder.io.proc.nluFSel\n",
    "    nlu.io.in := scratchRF.io.rInternal(0) // TODO: Add Req. for this\n",
    "    \n",
    "    io.totalOutput := nlu.io.out\n",
    "}"
   ]
  },
  {
   "cell_type": "markdown",
   "metadata": {},
   "source": [
    "##### Verification"
   ]
  },
  {
   "cell_type": "code",
   "execution_count": 20,
   "metadata": {},
   "outputs": [
    {
     "name": "stdout",
     "output_type": "stream",
     "text": [
      "[\u001b[35minfo\u001b[0m] [0.000] Elaborating design...\n",
      "[\u001b[35minfo\u001b[0m] [0.047] Done elaborating.\n",
      "Total FIRRTL Compile Time: 164.2 ms\n",
      "Total FIRRTL Compile Time: 125.6 ms\n",
      "End of dependency graph\n",
      "Circuit state created\n",
      "[\u001b[35minfo\u001b[0m] [0.000] SEED 1533165266381\n",
      "test cmd16WrapperHelperPE Success: 0 tests passed in 5 cycles taking 0.012225 seconds\n",
      "[\u001b[35minfo\u001b[0m] [0.000] RAN 0 CYCLES PASSED\n"
     ]
    },
    {
     "data": {
      "text/plain": [
       "\u001b[36mrsDecodeWeightRF\u001b[39m: (\u001b[32mUInt\u001b[39m, \u001b[32mRFConfig\u001b[39m) => \u001b[32mRFControl\u001b[39m = <function2>\r\n",
       "\u001b[36mrsDecodeActvtnRF\u001b[39m: (\u001b[32mUInt\u001b[39m, \u001b[32mRFConfig\u001b[39m) => \u001b[32mRFControl\u001b[39m = <function2>\r\n",
       "\u001b[36mrsDecodeScratchRF\u001b[39m: (\u001b[32mUInt\u001b[39m, \u001b[32mRFConfig\u001b[39m) => \u001b[32mRFControl\u001b[39m = <function2>\r\n",
       "\u001b[36mrsDecodeIPU\u001b[39m: (\u001b[32mUInt\u001b[39m, \u001b[32mIPUConfig\u001b[39m) => \u001b[32mVec\u001b[39m[\u001b[32mBool\u001b[39m] = <function2>\r\n",
       "\u001b[36mrsDecodeALU\u001b[39m: (\u001b[32mUInt\u001b[39m, \u001b[32mALUConfig\u001b[39m) => \u001b[32mALUFSel\u001b[39m = <function2>\r\n",
       "\u001b[36mrsDecodeNLU\u001b[39m: (\u001b[32mUInt\u001b[39m, \u001b[32mNLUConfig\u001b[39m) => \u001b[32mNLUFSel\u001b[39m = <function2>\r\n",
       "\u001b[36mrsStateMap\u001b[39m: (\u001b[32mUInt\u001b[39m, \u001b[32mUInt\u001b[39m, \u001b[32mStateMachineConfig\u001b[39m) => \u001b[32mUInt\u001b[39m = <function3>\r\n",
       "\u001b[36mrsPEConfig\u001b[39m: \u001b[32mPEConfig\u001b[39m = $sess.cmd13Wrapper$Helper$PEConfig@503f5e58\r\n",
       "\u001b[36mres19_8\u001b[39m: \u001b[32mBoolean\u001b[39m = \u001b[32mtrue\u001b[39m"
      ]
     },
     "execution_count": 20,
     "metadata": {},
     "output_type": "execute_result"
    }
   ],
   "source": [
    "/*\n",
    " * Row stationary 1D convolution\n",
    " *\n",
    " * (1, 2, 3) * (1, 2, 3, 4, 5) = (14, 20, 26)\n",
    " */\n",
    "\n",
    "val rsDecodeWeightRF = (state: UInt, c: RFConfig) => {\n",
    "    \n",
    "    val ctrl = Wire(new RFControl(c))\n",
    "    \n",
    "    when (state === 0.U || state === 1.U || state === 2.U) {\n",
    "        ctrl.external.get.wEnable(0) := true.B\n",
    "        ctrl.external.get.wAddr.get(0) := state\n",
    "    } .otherwise {\n",
    "        ctrl.external.get.wEnable(0) := false.B\n",
    "        ctrl.external.get.wAddr.get(0) := DontCare\n",
    "    }\n",
    "    \n",
    "    when (state >= 1.U && state <= 9.U) {\n",
    "        ctrl.internal.get.rEnable(0) := true.B\n",
    "        ctrl.internal.get.rAddr.get(0) := (state - 1.U) % 3.U\n",
    "    } .otherwise {\n",
    "        ctrl.internal.get.rEnable(0) := false.B\n",
    "        ctrl.internal.get.rAddr.get(0) := DontCare\n",
    "    }\n",
    "\n",
    "    ctrl\n",
    "}\n",
    "\n",
    "val rsDecodeActvtnRF = (state: UInt, c: RFConfig) => {\n",
    "    \n",
    "    val ctrl = Wire(new RFControl(c))\n",
    "    \n",
    "    when (state <= 8.U) {\n",
    "        ctrl.external.get.wEnable(0) := true.B\n",
    "        ctrl.external.get.wAddr.get(0) := state % 3.U\n",
    "    } .otherwise {\n",
    "        ctrl.external.get.wEnable(0) := false.B\n",
    "        ctrl.external.get.wAddr.get(0) := DontCare\n",
    "    }\n",
    "    \n",
    "    when (state >= 1.U && state <= 9.U) {\n",
    "        ctrl.internal.get.rEnable(0) := true.B\n",
    "        ctrl.internal.get.rAddr.get(0) := (state - 1.U) % 3.U\n",
    "    } .otherwise {\n",
    "        ctrl.internal.get.rEnable(0) := false.B\n",
    "        ctrl.internal.get.rAddr.get(0) := DontCare\n",
    "    }\n",
    "    \n",
    "    ctrl\n",
    "}\n",
    "\n",
    "val rsDecodeScratchRF = (state: UInt, c: RFConfig) => {\n",
    "    \n",
    "    val ctrl = Wire(new RFControl(c))\n",
    "    \n",
    "    when (state >= 1.U && state <= 9.U) {\n",
    "        ctrl.internal.get.wEnable(0) := true.B\n",
    "    } .otherwise {\n",
    "        ctrl.internal.get.wEnable(0) := false.B\n",
    "    }\n",
    "    \n",
    "    when (state >= 1.U && state <= 10.U && state =/= 4.U && state =/= 7.U) {\n",
    "        ctrl.internal.get.rEnable(0) := true.B\n",
    "    } .otherwise {\n",
    "        ctrl.internal.get.rEnable(0) := false.B\n",
    "    }\n",
    "    \n",
    "    when (state === 1.U) {\n",
    "        ctrl.internal.get.rAddr.get(0) := DontCare\n",
    "        ctrl.internal.get.wAddr.get(0) := 0.U\n",
    "    } .elsewhen (state === 2.U) {\n",
    "        ctrl.internal.get.rAddr.get(0) := 0.U\n",
    "        ctrl.internal.get.wAddr.get(0) := 1.U\n",
    "    } .elsewhen (state === 3.U) {\n",
    "        ctrl.internal.get.rAddr.get(0) := 1.U\n",
    "        ctrl.internal.get.wAddr.get(0) := 0.U\n",
    "    } .elsewhen (state === 4.U) {\n",
    "        ctrl.internal.get.rAddr.get(0) := DontCare\n",
    "        ctrl.internal.get.wAddr.get(0) := 1.U\n",
    "    } .elsewhen (state === 5.U) {\n",
    "        ctrl.internal.get.rAddr.get(0) := 1.U\n",
    "        ctrl.internal.get.wAddr.get(0) := 2.U\n",
    "    } .elsewhen (state === 6.U) {\n",
    "        ctrl.internal.get.rAddr.get(0) := 2.U\n",
    "        ctrl.internal.get.wAddr.get(0) := 1.U\n",
    "    } .elsewhen (state === 7.U) {\n",
    "        ctrl.internal.get.rAddr.get(0) := DontCare\n",
    "        ctrl.internal.get.wAddr.get(0) := 2.U\n",
    "    } .elsewhen (state === 8.U) {\n",
    "        ctrl.internal.get.rAddr.get(0) := 2.U\n",
    "        ctrl.internal.get.wAddr.get(0) := 3.U\n",
    "    } .elsewhen (state === 9.U) {\n",
    "        ctrl.internal.get.rAddr.get(0) := 3.U\n",
    "        ctrl.internal.get.wAddr.get(0) := 2.U\n",
    "    } .elsewhen (state === 10.U) {\n",
    "        ctrl.internal.get.rAddr.get(0) := 2.U\n",
    "        ctrl.internal.get.wAddr.get(0) := DontCare\n",
    "    } .otherwise {\n",
    "        ctrl.internal.get.rAddr.get(0) := DontCare\n",
    "        ctrl.internal.get.wAddr.get(0) := DontCare\n",
    "    }\n",
    "    \n",
    "    ctrl\n",
    "}\n",
    "\n",
    "val rsDecodeIPU = (state: UInt, c: IPUConfig) => {\n",
    "    val bpSel = Wire(Vec(c.width, Bool()))\n",
    "    bpSel\n",
    "}\n",
    "\n",
    "val rsDecodeALU = (state: UInt, c: ALUConfig) => {\n",
    "    val fSel = Wire(new ALUFSel(c)) \n",
    "    when (state === 1.U || state === 4.U || state === 7.U) {\n",
    "        fSel.idnEnable.get := true.B\n",
    "        fSel.accEnable.get := false.B\n",
    "    } .elsewhen (state > 1.U && state < 10.U) {\n",
    "        fSel.idnEnable.get := false.B\n",
    "        fSel.accEnable.get := true.B\n",
    "    } .otherwise {\n",
    "        fSel.idnEnable.get := false.B\n",
    "        fSel.accEnable.get := false.B\n",
    "    }\n",
    "    fSel\n",
    "}\n",
    "\n",
    "val rsDecodeNLU = (state: UInt, c: NLUConfig) => {\n",
    "    val fSel = Wire(new NLUFSel(c))\n",
    "    fSel.idEnable.get := true.B\n",
    "    fSel\n",
    "}\n",
    "\n",
    "val rsStateMap = (state: UInt, control: UInt, c: StateMachineConfig) => {\n",
    "    \n",
    "    val nextState = Wire(UInt(c.stateWidth.W))\n",
    "    \n",
    "    when(control === 1.U && state < 10.U) {\n",
    "        nextState := state + 1.U\n",
    "    } .otherwise {\n",
    "        nextState := state\n",
    "    }\n",
    "    \n",
    "    nextState\n",
    "}\n",
    "\n",
    "val rsPEConfig = new PEConfig(\n",
    "    new RFConfig(0, 1, 1, 0, 4, 16, \"None\"),\n",
    "    new RFConfig(0, 1, 1, 0, 4, 16, \"None\"),\n",
    "    new RFConfig(1, 0, 1, 0, 4, 16, \"None\"),\n",
    "    new IPUConfig(1, 16, 16, \"None\"),\n",
    "    new ALUConfig(8, List(\"Identity\", \"Accumulate\")),\n",
    "    new NLUConfig(8, 8, List(\"Identity\")),\n",
    "    new StateMachineConfig(4, 4, rsStateMap),\n",
    "    rsDecodeWeightRF,\n",
    "    rsDecodeActvtnRF,\n",
    "    rsDecodeScratchRF,\n",
    "    rsDecodeIPU,\n",
    "    rsDecodeALU,\n",
    "    rsDecodeNLU\n",
    ")\n",
    "\n",
    "Driver(() => new PE(rsPEConfig)) {\n",
    "    uut => new PeekPokeTester(uut) {\n",
    "        \n",
    "    }\n",
    "}"
   ]
  }
 ],
 "metadata": {
  "kernelspec": {
   "display_name": "Scala",
   "language": "scala",
   "name": "scala"
  },
  "language_info": {
   "codemirror_mode": "text/x-scala",
   "file_extension": ".scala",
   "mimetype": "text/x-scala",
   "name": "scala211",
   "nbconvert_exporter": "script",
   "pygments_lexer": "scala",
   "version": "2.11.11"
  }
 },
 "nbformat": 4,
 "nbformat_minor": 2
}