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riscv: redefine CSR registers with new helper macros #229
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I would like to do a release soon with all the new changes so people can start playing with it and detect any potential issues. We can leave these changes for the next release (hopefully before 2025). In fact, what do you think about nominating issues and working on them for the next milestone? |
That sounds great! Would you like me to create an issue for each CSR register, just to keep things modular? Alternatively, I could add checkboxes to this issue with each CSR, and check them off as implementations are completed. |
I nominated a few issues to be part of the riscv 0.13.0 milestone. In each issue, we should write a checkbox list to keep track of advances. We can also open a new issue (e.g., riscv 0.13.0), and each of us can assign one issue to work on. Another option is using GitHub projects. It is a kind of Trello but strongly coupled to the repo. Let me know what you prefer! |
This works for me. I'll go through the crate, and add a checkbox for each CSR. |
Currently, when compiling
I think all these fields, in their |
I agree, thanks for bringing this to my attention. When I get to the We can either extend the helper macros, or use conditional compilation like: #[cfg(target_arch = "riscv64")]
read_write_csr_field! {
Mstatus,
/// MBE docs
mbe: 37,
}
impl Mstatus {
#[cfg(target_arch = "riscv32")]
pub fn set_mbe(&mut self, _endianness: Endianess) {
unimplemented!("only available on RV64");
}
// ...
} |
I would go for something more like: impl Mstatus {
#[cfg_attr(not(target_arch = "riscv64"), allow(unused_variables))]
pub fn try_set_mbe(&mut self, endianness: Endianess) → Result<()> {
match () {
#[cfg(target_arch = "riscv64")]
_ => {...},
#[cfg(not(target_arch = "riscv64"))]
_ => Err(Error::Unimplemented),
}
}
pub fn set_mbe(&mut self, endianness: Endianess) { try_set_mbe(endianness).unwrap(); }
} I wouldn't bother to add this to macros, I think it is a special case that should be handled by a manual implementation. |
Existing CSR registers could be redefined using the new helper macros to gain extra functionality, and consistent definitions across the crate.
Part of the
0.13.0
milestone.Registers to redefine:
(*) Currently uses
NonZeroUsize
sentinel
value for checking implementation statusRemaining registers are all simple value registers with no bitfields.
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