From 2c0336a51dc73db06ab9a6f33b404e474140c73e Mon Sep 17 00:00:00 2001
From: Lokathor <zefria@gmail.com>
Date: Mon, 3 Jun 2024 15:15:53 -0600
Subject: [PATCH] a32 halt functions

---
 src/bios.rs | 30 ++++++++++++++++++++++++++++++
 1 file changed, 30 insertions(+)

diff --git a/src/bios.rs b/src/bios.rs
index dbbbe6a..d4b8630 100644
--- a/src/bios.rs
+++ b/src/bios.rs
@@ -45,6 +45,21 @@ pub fn IntrWait(ignore_existing: bool, target_irqs: IrqBits) {
   });
 }
 
+/// As [`IntrWait`], but using the `a32` instruction set.
+#[inline]
+#[cfg_attr(feature = "on_gba", instruction_set(arm::a32))]
+pub fn a32_IntrWait(ignore_existing: bool, target_irqs: IrqBits) {
+  on_gba_or_unimplemented!(unsafe {
+    core::arch::asm! {
+      "swi #(0x04 << 24)",
+      inout("r0") ignore_existing as u32 => _,
+      inout("r1") target_irqs.0 => _,
+      out("r3") _,
+      options(preserves_flags),
+    }
+  });
+}
+
 /// `0x05`: Builtin shorthand for [`IntrWait(true, IrqBits::VBLANK)`](IntrWait)
 #[inline]
 #[cfg_attr(feature = "on_gba", instruction_set(arm::t32))]
@@ -60,6 +75,21 @@ pub fn VBlankIntrWait() {
   });
 }
 
+/// As [`VBlankIntrWait`], but using the `a32` instruction set.
+#[inline]
+#[cfg_attr(feature = "on_gba", instruction_set(arm::t32))]
+pub fn a32_VBlankIntrWait() {
+  on_gba_or_unimplemented!(unsafe {
+    core::arch::asm! {
+      "swi #(0x05 << 24)",
+      out("r0") _,
+      out("r1") _,
+      out("r3") _,
+      options(preserves_flags),
+    }
+  });
+}
+
 /// `0x09`: Arc tangent.
 ///
 /// * **Returns:** The output is in the range +/- `pi/2`, but accuracy is worse