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This repository has been archived by the owner on Mar 20, 2024. It is now read-only.
I would like to evalute the V vector extension to compare it with other vector ISA, such as ARM SVE, or other SIMD architectures.
Is there any representative benchmark for this task?
The text was updated successfully, but these errors were encountered:
I've got results from the only two currently generally available CPUs with rvv support (C906 and C920), but note that they implement the pre ratification version 0.7.1 of the extension.
Here is one but not quite there yet https://github.com/RALC88/riscv-vectorized-benchmark-suite
and here is what they say "Current implementation is targeting RISC-V Architectures; however, it can be easily ported to any Vector/SIMD ISA thanks to a wrapper library which we developed to map vector intrinsics and math functions to the target architecture."
Hope it helps
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I would like to evalute the V vector extension to compare it with other vector ISA, such as ARM SVE, or other SIMD architectures.
Is there any representative benchmark for this task?
The text was updated successfully, but these errors were encountered: