From 56dce1948f1a522b53e9c5dc9bc486ae97dba97b Mon Sep 17 00:00:00 2001 From: Franz Fuchs Date: Mon, 9 Dec 2024 12:58:46 +0000 Subject: [PATCH 1/2] Added missing description of changes to the hedeleg register --- src/hypervisor-integration.adoc | 8 ++++++++ 1 file changed, 8 insertions(+) diff --git a/src/hypervisor-integration.adoc b/src/hypervisor-integration.adoc index 0d5170c1..fda39f02 100644 --- a/src/hypervisor-integration.adoc +++ b/src/hypervisor-integration.adoc @@ -50,6 +50,14 @@ VU-mode as described in xref:section_cheri_disable[xrefstyle=short]. The reset value is 0. +[#hedeleg,reftext="hedeleg"] +=== Hypervisor Exception Delegation Register (hedeleg) + +The <> register operates as described in the RISC-V Privileged +Specification. At position 28, a new bit is added to <> +when the implementation supports {cheri_base_ext_name}. This allows CHERI +exceptions to be delegated to VS mode. + [#htval,reftext="htval"] === Hypervisor Trap Value Register (htval) From 45f726a88be1a8be08f084ef11c1293306eda2f3 Mon Sep 17 00:00:00 2001 From: Franz Fuchs Date: Thu, 12 Dec 2024 08:38:57 +0000 Subject: [PATCH 2/2] Changed description of hedeleg --- src/hypervisor-integration.adoc | 6 ++---- 1 file changed, 2 insertions(+), 4 deletions(-) diff --git a/src/hypervisor-integration.adoc b/src/hypervisor-integration.adoc index fda39f02..917a7bee 100644 --- a/src/hypervisor-integration.adoc +++ b/src/hypervisor-integration.adoc @@ -53,10 +53,8 @@ The reset value is 0. [#hedeleg,reftext="hedeleg"] === Hypervisor Exception Delegation Register (hedeleg) -The <> register operates as described in the RISC-V Privileged -Specification. At position 28, a new bit is added to <> -when the implementation supports {cheri_base_ext_name}. This allows CHERI -exceptions to be delegated to VS mode. +Bit 28 of <> now refers to a valid exception and so can be used to +delegate CHERI exceptions to virtual supervisor mode. [#htval,reftext="htval"] === Hypervisor Trap Value Register (htval)