From 7ad57f9de0f2c75de8a4ab45f6d53de991468000 Mon Sep 17 00:00:00 2001
From: Tom Aird <thomas.aird@codasip.com>
Date: Tue, 22 Oct 2024 14:21:24 +0100
Subject: [PATCH 1/2] Add SL description to all store cap instructions

---
 src/insns/atomic_exceptions.adoc    | 1 +
 src/insns/store_cond_cap_32bit.adoc | 2 ++
 2 files changed, 3 insertions(+)

diff --git a/src/insns/atomic_exceptions.adoc b/src/insns/atomic_exceptions.adoc
index 6969e952..14549718 100644
--- a/src/insns/atomic_exceptions.adoc
+++ b/src/insns/atomic_exceptions.adoc
@@ -10,6 +10,7 @@ If the authorizing capability does not grant <<lm_perm>>, and the tag of `cd` is
 +
 If the authorizing capability does not grant <<el_perm>>, and the tag of `cd` is 1, then an implicit <<ACPERM>> clearing <<el_perm>> and restricting <<section_cap_level>> to the level of the authorizing capability is performed to obtain the final permissions on `cd` (see <<LC>>).
 +
+The stored tag is also set to zero if the authorizing capability does not have <<sl_perm>> set but the stored data has a <<section_cap_level>> of 0 (see <<SC>>).
 endif::[]
 ifndef::cap_atomic[]
 Requires <<r_perm>> and <<w_perm>> in the authorising capability.
diff --git a/src/insns/store_cond_cap_32bit.adoc b/src/insns/store_cond_cap_32bit.adoc
index 8beddb27..088784b5 100644
--- a/src/insns/store_cond_cap_32bit.adoc
+++ b/src/insns/store_cond_cap_32bit.adoc
@@ -27,6 +27,8 @@ Store conditional instructions, authorised by the capability in <<ddc>>.
 
 :store_cond:
 
+include::store_tag_perms.adoc[]
+
 include::malformed_no_check.adoc[]
 
 include::store_exceptions.adoc[]

From 207d1342f28775c7b504f39d83a4d2d3921b1f0b Mon Sep 17 00:00:00 2001
From: Tariq Kurd <tariq.kurd@codasip.com>
Date: Tue, 29 Oct 2024 10:48:03 +0100
Subject: [PATCH 2/2] C.SC was also missing the text, and needed further
 cleanup

---
 src/insns/store_16bit_cap_sprel.adoc     | 15 +++++++++++++--
 src/insns/store_cap_cap_description.adoc |  2 --
 2 files changed, 13 insertions(+), 4 deletions(-)
 delete mode 100644 src/insns/store_cap_cap_description.adoc

diff --git a/src/insns/store_16bit_cap_sprel.adoc b/src/insns/store_16bit_cap_sprel.adoc
index 01f53ded..ce8d14af 100644
--- a/src/insns/store_16bit_cap_sprel.adoc
+++ b/src/insns/store_16bit_cap_sprel.adoc
@@ -24,11 +24,22 @@ include::xlen_variable_warning.adoc[]
 Encoding::
 include::wavedrom/c-sp-store-cap.adoc[]
 
-include::store_cap_cap_description.adoc[]
+{cheri_cap_mode_name} Description::
+Store the CLEN+1 bit value in `cs2'` to memory. The capability in `cs1/csp`
+authorizes the operation. The effective address of the memory access is
+obtained by adding the address of `cs1/csp` to the sign-extended 12-bit offset.
 
 NOTE: These mnemonics do not exist in {cheri_int_mode_name}.
 
-:cap_store:
+Tag of the written capability value::
+
+The capability written to memory has the tag set to 0 if the tag of `cs2'` is 0 or if the authorizing capability (`cs1/csp`) does not grant <<c_perm>>.
++
+The stored tag is also set to zero if the authorizing capability does not have <<sl_perm>> set but the stored data has a <<section_cap_level>> of 0 (_local_).
+
+include::malformed_no_check.adoc[]
+
+:has_cap_data:
 include::store_exceptions.adoc[]
 
 Prerequisites::
diff --git a/src/insns/store_cap_cap_description.adoc b/src/insns/store_cap_cap_description.adoc
deleted file mode 100644
index a2617a4e..00000000
--- a/src/insns/store_cap_cap_description.adoc
+++ /dev/null
@@ -1,2 +0,0 @@
-{cheri_cap_mode_name} Description::
-Store capability instruction, authorised by the capability in `cs1`. Take a store/AMO address misaligned exception if not naturally aligned.