diff --git a/src/insns/csrrw_32bit.adoc b/src/insns/csrrw_32bit.adoc
index e0e55934..10f55505 100644
--- a/src/insns/csrrw_32bit.adoc
+++ b/src/insns/csrrw_32bit.adoc
@@ -40,7 +40,7 @@ The assembler pseudo-instruction to write a capability CSR in {cheri_cap_mode_na
 +
 Access to XLEN-wide CSRs from other extensions is as specified by RISC-V.
 
-NOTE: When writing `cs1`, if the bounds are <<section_cap_malformed,malformed>>, any reserved bits are set
+NOTE: When writing `cs1`, if the bounds are <<section_cap_malformed,malformed>>, any reserved bits are set,
 or the permission could not have been produced by <<ACPERM>> then clear the tag before writing to the CSR.
 
 Permissions::