From cb78046de29491b2be29d4d8c91f728c2811aba9 Mon Sep 17 00:00:00 2001 From: Isaac David <61389980+orion160@users.noreply.github.com> Date: Thu, 28 Nov 2024 17:45:49 -0500 Subject: [PATCH] [Vector] Add test traces (#227) --- .../vector/traces/add_vl256_e32_m1_ta.json | 43 ++++++ .../traces/img_filter_vl256_e32_m1_ta.json | 100 +++++++++++++ test/core/vector/traces/mma_e32_m1_vta.json | 33 +++++ .../traces/mma_kernel_vl256_e32_m1_ta.json | 133 +++++++++++++++++ .../traces/mma_kernel_vl256_e32_m4_ta.json | 138 ++++++++++++++++++ .../vector/traces/norm_vl256_e32_m1_ta.json | 51 +++++++ .../relu_destructive_vl256_e32_m1_ta.json | 34 +++++ .../vector/traces/relu_vl256_e32_m1_ta.json | 34 +++++ .../traces/saxpy_fma_vl256_r32_m1_ta.json | 43 ++++++ .../vector/traces/saxpy_vl256_e32_m1_ta.json | 49 +++++++ 10 files changed, 658 insertions(+) create mode 100644 test/core/vector/traces/add_vl256_e32_m1_ta.json create mode 100644 test/core/vector/traces/img_filter_vl256_e32_m1_ta.json create mode 100644 test/core/vector/traces/mma_e32_m1_vta.json create mode 100644 test/core/vector/traces/mma_kernel_vl256_e32_m1_ta.json create mode 100644 test/core/vector/traces/mma_kernel_vl256_e32_m4_ta.json create mode 100644 test/core/vector/traces/norm_vl256_e32_m1_ta.json create mode 100644 test/core/vector/traces/relu_destructive_vl256_e32_m1_ta.json create mode 100644 test/core/vector/traces/relu_vl256_e32_m1_ta.json create mode 100644 test/core/vector/traces/saxpy_fma_vl256_r32_m1_ta.json create mode 100644 test/core/vector/traces/saxpy_vl256_e32_m1_ta.json diff --git a/test/core/vector/traces/add_vl256_e32_m1_ta.json b/test/core/vector/traces/add_vl256_e32_m1_ta.json new file mode 100644 index 00000000..c30c4a37 --- /dev/null +++ b/test/core/vector/traces/add_vl256_e32_m1_ta.json @@ -0,0 +1,43 @@ +[ + { + "mnemonic": "vsetvli", + "vtype": "0x2", + "rd": 0, + "rs1": 13, + "vl": 256, + "vta": 1 + }, + { + "mnemonic": "vle32.v", + "vd": 0, + "rs1": 10, + "vaddr": "0xdaedbeef", + "mop": 0, + "eew": 32, + "stride": 32 + }, + { + "mnemonic": "vle32.v", + "vd": 1, + "rs1": 11, + "vaddr": "0xdaadbeef", + "mop": 0, + "eew": 32, + "stride": 32 + }, + { + "mnemonic": "vadd.v", + "vd": 2, + "vs2": 0, + "vs1": 1 + }, + { + "mnemonic": "vse32.v", + "vs3": 2, + "rs1": 12, + "vaddr": "0xdeadbeef", + "mop": 0, + "eew": 32, + "stride": 32 + } +] diff --git a/test/core/vector/traces/img_filter_vl256_e32_m1_ta.json b/test/core/vector/traces/img_filter_vl256_e32_m1_ta.json new file mode 100644 index 00000000..a3a0c169 --- /dev/null +++ b/test/core/vector/traces/img_filter_vl256_e32_m1_ta.json @@ -0,0 +1,100 @@ +[ + { + "mnemonic": "vsetvli", + "vtype": "0x2", + "rd": 0, + "rs1": 14, + "vl": 256, + "vta": 1 + }, + { + "mnemonic": "flw", + "fd": 0, + "rs1": 13, + "imm": 0 + }, + { + "mnemonic": "flw", + "fd": 1, + "rs1": 13, + "imm": 4 + }, + { + "mnemonic": "flw", + "fd": 2, + "rs1": 13, + "imm": 8 + }, + { + "mnemonic": "vle32.v", + "vd": 0, + "rs1": 10, + "vaddr": "0xdaadbeef", + "mop": 0, + "eew": 32, + "stride": 32 + }, + { + "mnemonic": "vle32.v", + "vd": 1, + "rs1": 11, + "vaddr": "0xdeadbeef", + "mop": 0, + "eew": 32, + "stride": 32 + }, + { + "mnemonic": "vle32.v", + "vd": 2, + "rs1": 12, + "vaddr": "0xdaedbeef", + "mop": 0, + "eew": 32, + "stride": 32 + }, + { + "mnemonic": "vfmul.vf", + "vd": 0, + "vs2": 0, + "rs1": 0 + }, + { + "mnemonic": "vfmul.vf", + "vd": 1, + "vs2": 1, + "rs1": 1 + }, + { + "mnemonic": "vfmul.vf", + "vd": 1, + "vs2": 1, + "rs1": 1 + }, + { + "mnemonic": "vse32.v", + "vs3": 0, + "rs1": 10, + "vaddr": "0xdaadbeef", + "mop": 0, + "eew": 32, + "stride": 32 + }, + { + "mnemonic": "vse32.v", + "vs3": 1, + "rs1": 11, + "vaddr": "0xdeadbeef", + "mop": 0, + "eew": 32, + "stride": 32 + }, + { + "mnemonic": "vse32.v", + "vs3": 2, + "rs1": 12, + "vaddr": "0xdaedbeef", + "mop": 0, + "eew": 32, + "stride": 32 + } +] diff --git a/test/core/vector/traces/mma_e32_m1_vta.json b/test/core/vector/traces/mma_e32_m1_vta.json new file mode 100644 index 00000000..c6ca2536 --- /dev/null +++ b/test/core/vector/traces/mma_e32_m1_vta.json @@ -0,0 +1,33 @@ +[ + { + "mnemonic": "li", + "rs1": 10, + "imm": 32 + }, + { + "mnemonic": "vsetvli", + "rs1": 10, + "vtype": "0x10", + "rd": 0, + "vl": 32, + "vta": 1 + }, + { + "mnemonic": "flw", + "fd": 15, + "rs1": 11, + "imm": 0 + }, + { + "mnemonic": "flw", + "fd": 16, + "rs1": 17, + "imm": 0 + }, + { + "mnemonic": "vfmacc.vf", + "vd": 8, + "fs1": 15, + "vs1": 16 + } +] diff --git a/test/core/vector/traces/mma_kernel_vl256_e32_m1_ta.json b/test/core/vector/traces/mma_kernel_vl256_e32_m1_ta.json new file mode 100644 index 00000000..07cabe33 --- /dev/null +++ b/test/core/vector/traces/mma_kernel_vl256_e32_m1_ta.json @@ -0,0 +1,133 @@ +[ + { + "mnemonic": "li", + "rd": 12, + "imm": 128 + }, + { + "mnemonic": "vsetvli", + "vtype": "0x2", + "rd": 0, + "rs1": 12, + "vl": 256, + "vta": 0 + }, + { + "mnemonic": "vle32.v", + "vd": 8, + "rs1": 19, + "vaddr": "0xdeadbeef", + "mop": 0, + "eew": 32, + "stride": 32 + }, + { + "mnemonic": "ld", + "rd": 12, + "rs1": 8, + "imm": -144, + "vaddr": "0xdeedbeef", + "mop": 0, + "eew": 32, + "stride": 32 + }, + { + "mnemonic": "vle32.v", + "vd": 0, + "rs1": 31, + "vaddr": "0xdaadbeef", + "mop": 0, + "eew": 32, + "stride": 32 + }, + { + "mnemonic": "flw", + "fd": 15, + "rs1": 17, + "imm": 0 + }, + { + "mnemonic": "flw", + "fd": 14, + "rs1": 5, + "imm": 0 + }, + { + "mnemonic": "flw", + "fd": 13, + "rs1": 18, + "imm": 0 + }, + { + "mnemonic": "add", + "rd": 5, + "rs2": 17, + "rs1": 9 + }, + { + "mnemonic": "vfmacc.vf", + "vd": 8, + "rs1": 15, + "vs2": 0 + }, + { + "mnemonic": "vfmacc.vf", + "vd": 12, + "rs1": 14, + "vs2": 0 + }, + { + "mnemonic": "vfmacc.vf", + "vd": 16, + "rs1": 13, + "vs2": 0 + }, + { + "mnemonic": "flw", + "fd": 15, + "rs1": 5, + "imm": 0 + }, + { + "mnemonic": "flw", + "fd": 14, + "rs1": 16, + "imm": 0 + }, + { + "mnemonic": "flw", + "fd": 13, + "rs1": 30, + "imm": 0 + }, + { + "mnemonic": "flw", + "fd": 12, + "rs1": 29, + "imm": 0 + }, + { + "mnemonic": "vfmacc.vf", + "vd": 20, + "rs1": 15, + "vs2": 0 + }, + { + "mnemonic": "vfmacc.vf", + "vd": 28, + "rs1": 14, + "vs2": 0 + }, + { + "mnemonic": "vfmacc.vf", + "vd": 4, + "rs1": 13, + "vs2": 0 + }, + { + "mnemonic": "vfmacc.vf", + "vd": 24, + "rs1": 12, + "vs2": 0 + } +] diff --git a/test/core/vector/traces/mma_kernel_vl256_e32_m4_ta.json b/test/core/vector/traces/mma_kernel_vl256_e32_m4_ta.json new file mode 100644 index 00000000..78fbc3bb --- /dev/null +++ b/test/core/vector/traces/mma_kernel_vl256_e32_m4_ta.json @@ -0,0 +1,138 @@ +[ + { + "mnemonic": "li", + "rd": 0, + "imm": "32" + }, + { + "mnemonic": "vsetvli", + "vtype": "0x12", + "rd": 0, + "vl": 256, + "vta": 0 + }, + { + "mnemonic": "vle32.v", + "vd": 8, + "rs1": 14, + "vaddr": "0xdeadbeef", + "mop": 0, + "eew": 32, + "stride": 32 + }, + { + "mnemonic": "ld", + "rd": 10, + "rs1": 8, + "imm": -128, + "vaddr": "0xdeedbeef", + "mop": 0, + "eew": 32, + "stride": 32 + }, + { + "mnemonic": "vle32.v", + "vd": 16, + "rs1": 30, + "vaddr": "0xdaadbeef", + "mop": 0, + "eew": 32, + "stride": 32 + }, + { + "mnemonic": "flw", + "fd": 15, + "rs1": 16, + "imm": 0 + }, + { + "mnemonic": "flw", + "fd": 14, + "rs1": 17, + "imm": 0 + }, + { + "mnemonic": "flw", + "fd": 13, + "rs1": 9, + "imm": 0 + }, + { + "mnemonic": "flw", + "fd": 12, + "rs1": 31, + "imm": 0 + }, + { + "mnemonic": "vfmacc.vf", + "vd": 8, + "rs1": 15, + "vs2": 16 + }, + { + "mnemonic": "vfmacc.vf", + "vd": 9, + "rs1": 14, + "vs2": 16 + }, + { + "mnemonic": "vfmacc.vf", + "vd": 10, + "rs1": 13, + "vs2": 16 + }, + { + "mnemonic": "vfmacc.vf", + "vd": 11, + "rs1": 12, + "vs2": 16 + }, + { + "mnemonic": "flw", + "fd": 15, + "rs1": 15, + "imm": 0 + }, + { + "mnemonic": "flw", + "fd": 14, + "rs1": 29, + "imm": 0 + }, + { + "mnemonic": "flw", + "fd": 13, + "rs1": 28, + "imm": 0 + }, + { + "mnemonic": "flw", + "fd": 12, + "rs1": 7, + "imm": 0 + }, + { + "mnemonic": "vfmacc.vf", + "vd": 12, + "rs1": 15, + "vs2": 16 + }, + { + "mnemonic": "vfmacc.vf", + "vd": 14, + "rs1": 14, + "vs2": 16 + }, + { + "mnemonic": "vfmacc.vf", + "vd": 15, + "rs1": 13, + "vs2": 16 + }, + { + "mnemonic": "vfmacc.vf", + "vd": 13, + "rs1": 12, + "vs2": 16 + } +] diff --git a/test/core/vector/traces/norm_vl256_e32_m1_ta.json b/test/core/vector/traces/norm_vl256_e32_m1_ta.json new file mode 100644 index 00000000..ae4c31c1 --- /dev/null +++ b/test/core/vector/traces/norm_vl256_e32_m1_ta.json @@ -0,0 +1,51 @@ +[ + { + "mnemonic": "vsetvli", + "vtype": "0x2", + "rd": 0, + "rs1": 12, + "vl": 256, + "vta": 1 + }, + { + "mnemonic": "vlseg3e32.v", + "vd": 0, + "rs1": 11, + "vaddr": "0xdaadbeef", + "mop": 0, + "eew": 32, + "stride": 32 + }, + { + "mnemonic": "vfmul.vv", + "vd": 3, + "vs2": 0, + "vs1": 0 + }, + { + "mnemonic": "vfmacc.vv", + "vd": 3, + "vs2": 1, + "vs1": 1 + }, + { + "mnemonic": "vfmacc.vv", + "vd": 3, + "vs2": 2, + "vs1": 2 + }, + { + "mnemonic": "vfsqrt.v", + "vd": 3, + "vs2": 3 + }, + { + "mnemonic": "vse32.v", + "vs3": 3, + "rs1": 12, + "vaddr": "0xdeadbeef", + "mop": 0, + "eew": 32, + "stride": 32 + } +] diff --git a/test/core/vector/traces/relu_destructive_vl256_e32_m1_ta.json b/test/core/vector/traces/relu_destructive_vl256_e32_m1_ta.json new file mode 100644 index 00000000..4cdb9b7e --- /dev/null +++ b/test/core/vector/traces/relu_destructive_vl256_e32_m1_ta.json @@ -0,0 +1,34 @@ +[ + { + "mnemonic": "vsetvli", + "vtype": "0x2", + "rd": 0, + "rs1": 12, + "vl": 256, + "vta": 1 + }, + { + "mnemonic": "vle32.v", + "vd": 0, + "rs1": 10, + "vaddr": "0xdaadbeef", + "mop": 0, + "eew": 32, + "stride": 32 + }, + { + "mnemonic": "vmax.vx", + "vd": 0, + "vs2": 0, + "rs1": 0 + }, + { + "mnemonic": "vse32.v", + "vs3": 0, + "rs1": 11, + "vaddr": "0xdeadbeef", + "mop": 0, + "eew": 32, + "stride": 32 + } +] diff --git a/test/core/vector/traces/relu_vl256_e32_m1_ta.json b/test/core/vector/traces/relu_vl256_e32_m1_ta.json new file mode 100644 index 00000000..5a1886a0 --- /dev/null +++ b/test/core/vector/traces/relu_vl256_e32_m1_ta.json @@ -0,0 +1,34 @@ +[ + { + "mnemonic": "vsetvli", + "vtype": "0x2", + "rd": 0, + "rs1": 12, + "vl": 256, + "vta": 1 + }, + { + "mnemonic": "vle32.v", + "vd": 0, + "rs1": 10, + "vaddr": "0xdaadbeef", + "mop": 0, + "eew": 32, + "stride": 32 + }, + { + "mnemonic": "vmax.vx", + "vd": 1, + "vs2": 0, + "rs1": 0 + }, + { + "mnemonic": "vse32.v", + "vs3": 1, + "rs1": 11, + "vaddr": "0xdeadbeef", + "mop": 0, + "eew": 32, + "stride": 32 + } +] diff --git a/test/core/vector/traces/saxpy_fma_vl256_r32_m1_ta.json b/test/core/vector/traces/saxpy_fma_vl256_r32_m1_ta.json new file mode 100644 index 00000000..14d57f33 --- /dev/null +++ b/test/core/vector/traces/saxpy_fma_vl256_r32_m1_ta.json @@ -0,0 +1,43 @@ +[ + { + "mnemonic": "vsetvli", + "vtype": "0x2", + "rd": 0, + "rs1": 14, + "vl": 256, + "vta": 1 + }, + { + "mnemonic": "vle32.v", + "vd": 0, + "rs1": 10, + "vaddr": "0xdaedbeef", + "mop": 0, + "eew": 32, + "stride": 32 + }, + { + "mnemonic": "vle32.v", + "vd": 1, + "rs1": 11, + "vaddr": "0xdaadbeef", + "mop": 0, + "eew": 32, + "stride": 32 + }, + { + "mnemonic": "vfmacc.vf", + "vd": 1, + "rs1": 10, + "vs2": 0 + }, + { + "mnemonic": "vse32.v", + "vs3": 1, + "rs1": 13, + "vaddr": "0xdeadbeef", + "mop": 0, + "eew": 32, + "stride": 32 + } +] diff --git a/test/core/vector/traces/saxpy_vl256_e32_m1_ta.json b/test/core/vector/traces/saxpy_vl256_e32_m1_ta.json new file mode 100644 index 00000000..981dd85f --- /dev/null +++ b/test/core/vector/traces/saxpy_vl256_e32_m1_ta.json @@ -0,0 +1,49 @@ +[ + { + "mnemonic": "vsetvli", + "vtype": "0x2", + "rd": 0, + "rs1": 14, + "vl": 256, + "vta": 1 + }, + { + "mnemonic": "vle32.v", + "vd": 0, + "rs1": 10, + "vaddr": "0xdaedbeef", + "mop": 0, + "eew": 32, + "stride": 32 + }, + { + "mnemonic": "vle32.v", + "vd": 1, + "rs1": 11, + "vaddr": "0xdaadbeef", + "mop": 0, + "eew": 32, + "stride": 32 + }, + { + "mnemonic": "vfmul.vf", + "vd": 2, + "vs2": 0, + "rs1": 10 + }, + { + "mnemonic": "vfadd.v", + "vd": 3, + "vs2": 1, + "vs1": 2 + }, + { + "mnemonic": "vse32.v", + "vs3": 3, + "rs1": 13, + "vaddr": "0xdeadbeef", + "mop": 0, + "eew": 32, + "stride": 32 + } +]