From 515e160913d0c1a4115cc0aa8b0905e82ee3198b Mon Sep 17 00:00:00 2001 From: Shobhit Date: Sat, 19 Oct 2024 17:08:58 +0530 Subject: [PATCH] updated EXPECTED files and ../core/Inst.hpp for whitespace between pid and status --- core/Inst.hpp | 2 +- .../expected_output/arbitrate.out.EXPECTED | 86 +++---- .../expected_output/big_core.out.EXPECTED | 202 ++++++++-------- .../expected_output/medium_core.out.EXPECTED | 210 ++++++++--------- .../expected_output/small_core.out.EXPECTED | 220 +++++++++--------- .../expected_output/hit_case.out.EXPECTED | 70 +++--- .../single_access.out.EXPECTED | 46 ++-- .../expected_output/big_core.out.EXPECTED | 40 ++-- .../big_core_small_rename.out.EXPECTED | 38 +-- .../expected_output/medium_core.out.EXPECTED | 40 ++-- .../expected_output/small_core.out.EXPECTED | 40 ++-- 11 files changed, 497 insertions(+), 497 deletions(-) diff --git a/core/Inst.hpp b/core/Inst.hpp index 12157976..78f8afb1 100644 --- a/core/Inst.hpp +++ b/core/Inst.hpp @@ -531,7 +531,7 @@ namespace olympia // - any changes here will break EXPECT inline std::ostream & operator<<(std::ostream & os, const Inst & inst) { - os << "uid:" << inst.getUniqueID() << std::setw(10) << inst.getStatus() << " " + os << "uid:" << inst.getUniqueID() << " " << std::setw(10) << inst.getStatus() << " " << std::hex << inst.getPC() << std::dec << " pid:" << inst.getProgramID() << " uopid:" << inst.getUOpID() << " '" << inst.getDisasm() << "' "; return os; diff --git a/test/core/dcache/expected_output/arbitrate.out.EXPECTED b/test/core/dcache/expected_output/arbitrate.out.EXPECTED index 56419b63..fb2b71ae 100644 --- a/test/core/dcache/expected_output/arbitrate.out.EXPECTED +++ b/test/core/dcache/expected_output/arbitrate.out.EXPECTED @@ -3,70 +3,70 @@ #Exe: #SimulatorVersion: #Repro: -#Start: Tuesday Tue Oct 8 16:49:19 2024 -#Elapsed: 0.00278s -{0000000000 00000000 top.lsu info} req_inst_: Instruction: 'uid:0 FETCHED 0 pid:1 uopid:0 'lw 5,3' ' Requested -{0000000000 00000000 top.dcache info} receiveMemReqFromLSU_: Received memory access request from LSU memptr: uid:0 FETCHED 0 pid:1 uopid:0 'lw 5,3' -{0000000000 00000000 top.dcache info} arbitrateL2LsuReq_: Received LSU request memptr: uid:0 FETCHED 0 pid:1 uopid:0 'lw 5,3' +#Start: Saturday Sat Oct 19 15:35:23 2024 +#Elapsed: 0.002073s +{0000000000 00000000 top.lsu info} req_inst_: Instruction: 'uid:0 BEFORE_FETCH 0 pid:1 uopid:0 'lw 5,3' ' Requested +{0000000000 00000000 top.dcache info} receiveMemReqFromLSU_: Received memory access request from LSU memptr: deadbeef uid:0 BEFORE_FETCH 0 pid:1 uopid:0 'lw 5,3' +{0000000000 00000000 top.dcache info} arbitrateL2LsuReq_: Received LSU request memptr: deadbeef uid:0 BEFORE_FETCH 0 pid:1 uopid:0 'lw 5,3' {0000000001 00000001 top.dcache info} handleLookup_: Lookup stage -{0000000001 00000001 top.dcache info} handleLookup_: memptr: uid:0 FETCHED 0 pid:1 uopid:0 'lw 5,3' in Lookup stage +{0000000001 00000001 top.dcache info} handleLookup_: memptr: deadbeef uid:0 BEFORE_FETCH 0 pid:1 uopid:0 'lw 5,3' in Lookup stage {0000000001 00000001 top.dcache info} dataLookup_: DL1 DCache MISS: phyAddr=0xdeadbeef -{0000000001 00000001 top.dcache info} handleLookup_: memptr: uid:0 FETCHED 0 pid:1 uopid:0 'lw 5,3' performing lookup 0 -{0000000001 00000001 top.dcache info} handleLookup_: Creating new MSHR Entry memptr: uid:0 FETCHED 0 pid:1 uopid:0 'lw 5,3' +{0000000001 00000001 top.dcache info} handleLookup_: memptr: deadbeef uid:0 BEFORE_FETCH 0 pid:1 uopid:0 'lw 5,3' performing lookup 0 +{0000000001 00000001 top.dcache info} handleLookup_: Creating new MSHR Entry memptr: deadbeef uid:0 BEFORE_FETCH 0 pid:1 uopid:0 'lw 5,3' {0000000001 00000001 top.dcache info} handleLookup_: Load miss inst to LMQ; block address:0xdeadbee0 -{0000000001 00000001 top.lsu info} ReceiveAck_: Ack: 'memptr: uid:0 FETCHED 0 pid:1 uopid:0 'lw 5,3' ' Received +{0000000001 00000001 top.lsu info} ReceiveAck_: Ack: 'memptr: deadbeef uid:0 BEFORE_FETCH 0 pid:1 uopid:0 'lw 5,3' ' Received {0000000001 00000001 top.dcache info} mshrRequest_: Send mshr req -{0000000001 00000001 top.dcache info} mshrRequest_: Sending mshr request when not busy memptr: uid:0 FETCHED 0 pid:1 uopid:0 'lw 5,3' -{0000000002 00000002 top.next_lvl info} sinkInst_: Instruction: 'uid:0 FETCHED 0 pid:1 uopid:0 'lw 5,3' ' sinked +{0000000001 00000001 top.dcache info} mshrRequest_: Sending mshr request when not busy memptr: deadbeef uid:0 BEFORE_FETCH 0 pid:1 uopid:0 'lw 5,3' +{0000000002 00000002 top.next_lvl info} sinkInst_: Instruction: 'uid:0 BEFORE_FETCH 0 pid:1 uopid:0 'lw 5,3' ' sinked {0000000002 00000002 top.dcache info} handleDataRead_: Data Read stage -{0000000002 00000002 top.dcache info} handleDataRead_: memptr: uid:0 FETCHED 0 pid:1 uopid:0 'lw 5,3' in read stage -{0000000002 00000002 top.lsu info} ReceiveAck_: Ack: 'memptr: uid:0 FETCHED 0 pid:1 uopid:0 'lw 5,3' ' Received +{0000000002 00000002 top.dcache info} handleDataRead_: memptr: deadbeef uid:0 BEFORE_FETCH 0 pid:1 uopid:0 'lw 5,3' in read stage +{0000000002 00000002 top.lsu info} ReceiveAck_: Ack: 'memptr: deadbeef uid:0 BEFORE_FETCH 0 pid:1 uopid:0 'lw 5,3' ' Received {0000000003 00000003 top.dcache info} handleDeallocate_: Data Dellocate stage -{0000000003 00000003 top.dcache info} handleDeallocate_: memptr: uid:0 FETCHED 0 pid:1 uopid:0 'lw 5,3' in deallocate stage -{0000000003 00000003 top.dcache info} handleDeallocate_: Deallocating pipeline for memptr: uid:0 FETCHED 0 pid:1 uopid:0 'lw 5,3' +{0000000003 00000003 top.dcache info} handleDeallocate_: memptr: deadbeef uid:0 BEFORE_FETCH 0 pid:1 uopid:0 'lw 5,3' in deallocate stage +{0000000003 00000003 top.dcache info} handleDeallocate_: Deallocating pipeline for memptr: deadbeef uid:0 BEFORE_FETCH 0 pid:1 uopid:0 'lw 5,3' {0000000003 00000003 top.dcache info} mshrRequest_: Send mshr req -{0000000007 00000007 top.dcache info} receiveRespFromL2Cache_: Received cache refill memptr: uid:0 FETCHED 0 pid:1 uopid:0 'lw 5,3' -{0000000007 00000007 top.dcache info} receiveRespFromL2Cache_: Removing mshr entry for memptr: uid:0 FETCHED 0 pid:1 uopid:0 'lw 5,3' -{0000000007 00000007 top.dcache info} arbitrateL2LsuReq_: Received Refill request memptr: uid:0 FETCHED 0 pid:1 uopid:0 'lw 5,3' +{0000000007 00000007 top.dcache info} receiveRespFromL2Cache_: Received cache refill memptr: deadbeef uid:0 BEFORE_FETCH 0 pid:1 uopid:0 'lw 5,3' +{0000000007 00000007 top.dcache info} receiveRespFromL2Cache_: Removing mshr entry for memptr: deadbeef uid:0 BEFORE_FETCH 0 pid:1 uopid:0 'lw 5,3' +{0000000007 00000007 top.dcache info} arbitrateL2LsuReq_: Received Refill request memptr: deadbeef uid:0 BEFORE_FETCH 0 pid:1 uopid:0 'lw 5,3' {0000000008 00000008 top.dcache info} handleLookup_: Lookup stage -{0000000008 00000008 top.dcache info} handleLookup_: memptr: uid:0 FETCHED 0 pid:1 uopid:0 'lw 5,3' in Lookup stage -{0000000008 00000008 top.dcache info} handleLookup_: Incoming cache refill memptr: uid:0 FETCHED 0 pid:1 uopid:0 'lw 5,3' -{0000000008 00000008 top.lsu info} req_inst_: Instruction: 'uid:1 FETCHED 0 pid:2 uopid:0 'lw 5,3' ' Requested -{0000000008 00000008 top.dcache info} receiveMemReqFromLSU_: Received memory access request from LSU memptr: uid:1 FETCHED 0 pid:2 uopid:0 'lw 5,3' +{0000000008 00000008 top.dcache info} handleLookup_: memptr: deadbeef uid:0 BEFORE_FETCH 0 pid:1 uopid:0 'lw 5,3' in Lookup stage +{0000000008 00000008 top.dcache info} handleLookup_: Incoming cache refill memptr: deadbeef uid:0 BEFORE_FETCH 0 pid:1 uopid:0 'lw 5,3' +{0000000008 00000008 top.lsu info} req_inst_: Instruction: 'uid:1 BEFORE_FETCH 0 pid:2 uopid:0 'lw 5,3' ' Requested +{0000000008 00000008 top.dcache info} receiveMemReqFromLSU_: Received memory access request from LSU memptr: deedbeef uid:1 BEFORE_FETCH 0 pid:2 uopid:0 'lw 5,3' {0000000008 00000008 top.dcache info} mshrRequest_: Send mshr req -{0000000008 00000008 top.dcache info} arbitrateL2LsuReq_: Received LSU request memptr: uid:1 FETCHED 0 pid:2 uopid:0 'lw 5,3' +{0000000008 00000008 top.dcache info} arbitrateL2LsuReq_: Received LSU request memptr: deedbeef uid:1 BEFORE_FETCH 0 pid:2 uopid:0 'lw 5,3' {0000000009 00000009 top.dcache info} handleLookup_: Lookup stage -{0000000009 00000009 top.dcache info} handleLookup_: memptr: uid:1 FETCHED 0 pid:2 uopid:0 'lw 5,3' in Lookup stage +{0000000009 00000009 top.dcache info} handleLookup_: memptr: deedbeef uid:1 BEFORE_FETCH 0 pid:2 uopid:0 'lw 5,3' in Lookup stage {0000000009 00000009 top.dcache info} dataLookup_: DL1 DCache MISS: phyAddr=0xdeedbeef -{0000000009 00000009 top.dcache info} handleLookup_: memptr: uid:1 FETCHED 0 pid:2 uopid:0 'lw 5,3' performing lookup 0 -{0000000009 00000009 top.dcache info} handleLookup_: Creating new MSHR Entry memptr: uid:1 FETCHED 0 pid:2 uopid:0 'lw 5,3' +{0000000009 00000009 top.dcache info} handleLookup_: memptr: deedbeef uid:1 BEFORE_FETCH 0 pid:2 uopid:0 'lw 5,3' performing lookup 0 +{0000000009 00000009 top.dcache info} handleLookup_: Creating new MSHR Entry memptr: deedbeef uid:1 BEFORE_FETCH 0 pid:2 uopid:0 'lw 5,3' {0000000009 00000009 top.dcache info} handleLookup_: Load miss inst to LMQ; block address:0xdeedbee0 -{0000000009 00000009 top.lsu info} ReceiveAck_: Ack: 'memptr: uid:1 FETCHED 0 pid:2 uopid:0 'lw 5,3' ' Received +{0000000009 00000009 top.lsu info} ReceiveAck_: Ack: 'memptr: deedbeef uid:1 BEFORE_FETCH 0 pid:2 uopid:0 'lw 5,3' ' Received {0000000009 00000009 top.dcache info} handleDataRead_: Data Read stage -{0000000009 00000009 top.dcache info} handleDataRead_: memptr: uid:0 FETCHED 0 pid:1 uopid:0 'lw 5,3' in read stage +{0000000009 00000009 top.dcache info} handleDataRead_: memptr: deadbeef uid:0 BEFORE_FETCH 0 pid:1 uopid:0 'lw 5,3' in read stage {0000000009 00000009 top.dcache info} reloadCache_: DCache reload complete! {0000000009 00000009 top.dcache info} mshrRequest_: Send mshr req -{0000000009 00000009 top.dcache info} mshrRequest_: Sending mshr request when not busy memptr: uid:1 FETCHED 0 pid:2 uopid:0 'lw 5,3' -{0000000010 00000010 top.next_lvl info} sinkInst_: Instruction: 'uid:1 FETCHED 0 pid:2 uopid:0 'lw 5,3' ' sinked +{0000000009 00000009 top.dcache info} mshrRequest_: Sending mshr request when not busy memptr: deedbeef uid:1 BEFORE_FETCH 0 pid:2 uopid:0 'lw 5,3' +{0000000010 00000010 top.next_lvl info} sinkInst_: Instruction: 'uid:1 BEFORE_FETCH 0 pid:2 uopid:0 'lw 5,3' ' sinked {0000000010 00000010 top.dcache info} handleDataRead_: Data Read stage -{0000000010 00000010 top.dcache info} handleDataRead_: memptr: uid:1 FETCHED 0 pid:2 uopid:0 'lw 5,3' in read stage -{0000000010 00000010 top.lsu info} ReceiveAck_: Ack: 'memptr: uid:1 FETCHED 0 pid:2 uopid:0 'lw 5,3' ' Received +{0000000010 00000010 top.dcache info} handleDataRead_: memptr: deedbeef uid:1 BEFORE_FETCH 0 pid:2 uopid:0 'lw 5,3' in read stage +{0000000010 00000010 top.lsu info} ReceiveAck_: Ack: 'memptr: deedbeef uid:1 BEFORE_FETCH 0 pid:2 uopid:0 'lw 5,3' ' Received {0000000010 00000010 top.dcache info} handleDeallocate_: Data Dellocate stage -{0000000010 00000010 top.dcache info} handleDeallocate_: memptr: uid:0 FETCHED 0 pid:1 uopid:0 'lw 5,3' in deallocate stage -{0000000010 00000010 top.lsu info} ReceiveAck_: Ack: 'memptr: uid:1 FETCHED 0 pid:2 uopid:0 'lw 5,3' ' Received -{0000000010 00000010 top.dcache info} handleDeallocate_: Removing mshr entry for memptr: uid:0 FETCHED 0 pid:1 uopid:0 'lw 5,3' +{0000000010 00000010 top.dcache info} handleDeallocate_: memptr: deadbeef uid:0 BEFORE_FETCH 0 pid:1 uopid:0 'lw 5,3' in deallocate stage +{0000000010 00000010 top.lsu info} ReceiveAck_: Ack: 'memptr: deedbeef uid:1 BEFORE_FETCH 0 pid:2 uopid:0 'lw 5,3' ' Received +{0000000010 00000010 top.dcache info} handleDeallocate_: Removing mshr entry for memptr: deadbeef uid:0 BEFORE_FETCH 0 pid:1 uopid:0 'lw 5,3' {0000000011 00000011 top.dcache info} handleDeallocate_: Data Dellocate stage -{0000000011 00000011 top.dcache info} handleDeallocate_: memptr: uid:1 FETCHED 0 pid:2 uopid:0 'lw 5,3' in deallocate stage -{0000000011 00000011 top.dcache info} handleDeallocate_: Deallocating pipeline for memptr: uid:1 FETCHED 0 pid:2 uopid:0 'lw 5,3' +{0000000011 00000011 top.dcache info} handleDeallocate_: memptr: deedbeef uid:1 BEFORE_FETCH 0 pid:2 uopid:0 'lw 5,3' in deallocate stage +{0000000011 00000011 top.dcache info} handleDeallocate_: Deallocating pipeline for memptr: deedbeef uid:1 BEFORE_FETCH 0 pid:2 uopid:0 'lw 5,3' {0000000011 00000011 top.dcache info} mshrRequest_: Send mshr req -{0000000015 00000015 top.dcache info} receiveRespFromL2Cache_: Received cache refill memptr: uid:1 FETCHED 0 pid:2 uopid:0 'lw 5,3' -{0000000015 00000015 top.dcache info} arbitrateL2LsuReq_: Received Refill request memptr: uid:1 FETCHED 0 pid:2 uopid:0 'lw 5,3' +{0000000015 00000015 top.dcache info} receiveRespFromL2Cache_: Received cache refill memptr: deedbeef uid:1 BEFORE_FETCH 0 pid:2 uopid:0 'lw 5,3' +{0000000015 00000015 top.dcache info} arbitrateL2LsuReq_: Received Refill request memptr: deedbeef uid:1 BEFORE_FETCH 0 pid:2 uopid:0 'lw 5,3' {0000000016 00000016 top.dcache info} handleLookup_: Lookup stage -{0000000016 00000016 top.dcache info} handleLookup_: memptr: uid:1 FETCHED 0 pid:2 uopid:0 'lw 5,3' in Lookup stage -{0000000016 00000016 top.dcache info} handleLookup_: Incoming cache refill memptr: uid:1 FETCHED 0 pid:2 uopid:0 'lw 5,3' +{0000000016 00000016 top.dcache info} handleLookup_: memptr: deedbeef uid:1 BEFORE_FETCH 0 pid:2 uopid:0 'lw 5,3' in Lookup stage +{0000000016 00000016 top.dcache info} handleLookup_: Incoming cache refill memptr: deedbeef uid:1 BEFORE_FETCH 0 pid:2 uopid:0 'lw 5,3' {0000000016 00000016 top.dcache info} mshrRequest_: Send mshr req {0000000017 00000017 top.dcache info} handleDataRead_: Data Read stage -{0000000017 00000017 top.dcache info} handleDataRead_: memptr: uid:1 FETCHED 0 pid:2 uopid:0 'lw 5,3' in read stage +{0000000017 00000017 top.dcache info} handleDataRead_: memptr: deedbeef uid:1 BEFORE_FETCH 0 pid:2 uopid:0 'lw 5,3' in read stage {0000000017 00000017 top.dcache info} reloadCache_: DCache reload complete! {0000000018 00000018 top.dcache info} handleDeallocate_: Data Dellocate stage -{0000000018 00000018 top.dcache info} handleDeallocate_: memptr: uid:1 FETCHED 0 pid:2 uopid:0 'lw 5,3' in deallocate stage +{0000000018 00000018 top.dcache info} handleDeallocate_: memptr: deedbeef uid:1 BEFORE_FETCH 0 pid:2 uopid:0 'lw 5,3' in deallocate stage diff --git a/test/core/dispatch/expected_output/big_core.out.EXPECTED b/test/core/dispatch/expected_output/big_core.out.EXPECTED index b54f664a..b6b0ad67 100644 --- a/test/core/dispatch/expected_output/big_core.out.EXPECTED +++ b/test/core/dispatch/expected_output/big_core.out.EXPECTED @@ -3,8 +3,8 @@ #Exe: #SimulatorVersion: #Repro: -#Start: Tuesday Tue Oct 8 16:46:24 2024 -#Elapsed: 0.00175s +#Start: Saturday Sat Oct 19 16:01:55 2024 +#Elapsed: 0.001359s {0000000000 00000000 top.dispatch info} Dispatch: mapping target: INTiq0 {0000000000 00000000 top.dispatch info} Dispatch: mapping target: DIViq0 {0000000000 00000000 top.dispatch info} Dispatch: mapping target: INTiq1 @@ -51,18 +51,18 @@ {0000000000 00000000 top.decode info} inCredits: Got credits from dut: 10 {0000000000 00000000 top.decode info} Sending group: 0x00000000 UID(0) PID(0) add, 0x00000000 UID(1) PID(0) add, 0x00000000 UID(2) PID(0) add, 0x00000000 UID(3) PID(0) add, 0x00000000 UID(4) PID(0) add, 0x00000000 UID(5) PID(0) add, 0x00000000 UID(6) PID(0) add, 0x00000000 UID(7) PID(0) add, 0x00000000 UID(8) PID(0) add, 0x00000000 UID(9) PID(0) add {0000000001 00000001 top.rename info} scheduleRenaming_: current stall: NOT_STALLED -{0000000001 00000001 top.rename info} renameInstructions_: sending inst to dispatch: uid:0 RENAMED 0 pid:0 uopid:0 'add 2,0,1' +{0000000001 00000001 top.rename info} renameInstructions_: sending inst to dispatch: uid:0 RENAMED 0 pid:0 uopid:0 'add 2,0,1' {0000000001 00000001 top.rename info} renameInstructions_: setup source register bit mask [1] for 'integer' scoreboard {0000000001 00000001 top.rename info} renameInstructions_: setup destination register bit mask [0] for 'integer' scoreboard -{0000000001 00000001 top.rename info} renameInstructions_: sending inst to dispatch: uid:1 RENAMED 0 pid:0 uopid:0 'add 4,2,3' +{0000000001 00000001 top.rename info} renameInstructions_: sending inst to dispatch: uid:1 RENAMED 0 pid:0 uopid:0 'add 4,2,3' {0000000001 00000001 top.rename info} renameInstructions_: setup source register bit mask [0] for 'integer' scoreboard {0000000001 00000001 top.rename info} renameInstructions_: setup source register bit mask [0,3] for 'integer' scoreboard {0000000001 00000001 top.rename info} renameInstructions_: setup destination register bit mask [32] for 'integer' scoreboard -{0000000001 00000001 top.rename info} renameInstructions_: sending inst to dispatch: uid:2 RENAMED 0 pid:0 uopid:0 'add 6,4,5' +{0000000001 00000001 top.rename info} renameInstructions_: sending inst to dispatch: uid:2 RENAMED 0 pid:0 uopid:0 'add 6,4,5' {0000000001 00000001 top.rename info} renameInstructions_: setup source register bit mask [32] for 'integer' scoreboard {0000000001 00000001 top.rename info} renameInstructions_: setup source register bit mask [5,32] for 'integer' scoreboard {0000000001 00000001 top.rename info} renameInstructions_: setup destination register bit mask [33] for 'integer' scoreboard -{0000000001 00000001 top.rename info} renameInstructions_: sending inst to dispatch: uid:3 RENAMED 0 pid:0 uopid:0 'add 8,6,7' +{0000000001 00000001 top.rename info} renameInstructions_: sending inst to dispatch: uid:3 RENAMED 0 pid:0 uopid:0 'add 8,6,7' {0000000001 00000001 top.rename info} renameInstructions_: setup source register bit mask [33] for 'integer' scoreboard {0000000001 00000001 top.rename info} renameInstructions_: setup source register bit mask [7,33] for 'integer' scoreboard {0000000001 00000001 top.rename info} renameInstructions_: setup destination register bit mask [34] for 'integer' scoreboard @@ -70,182 +70,182 @@ {0000000001 00000001 top.decode info} Sending group: 0x00000000 UID(10) PID(0) add, 0x00000000 UID(11) PID(0) add, 0x00000000 UID(12) PID(0) add, 0x00000000 UID(13) PID(0) add {0000000002 00000002 top.dispatch info} dispatchQueueAppended_: queue appended: 0x00000000 UID(0) PID(0) add, 0x00000000 UID(1) PID(0) add, 0x00000000 UID(2) PID(0) add, 0x00000000 UID(3) PID(0) add {0000000002 00000002 top.dispatch info} dispatchInstructions_: Num to dispatch: 3 -{0000000002 00000002 top.dispatch info} acceptInst: iq0: dispatching uid:0 RENAMED 0 pid:0 uopid:0 'add 2,0,1' -{0000000002 00000002 top.dispatch info} dispatchInstructions_: Sending instruction: uid:0DISPATCHED 0 pid:0 uopid:0 'add 2,0,1' to iq0 of target type: INT -{0000000002 00000002 top.dispatch info} acceptInst: iq1: dispatching uid:1 RENAMED 0 pid:0 uopid:0 'add 4,2,3' -{0000000002 00000002 top.dispatch info} dispatchInstructions_: Sending instruction: uid:1DISPATCHED 0 pid:0 uopid:0 'add 4,2,3' to iq1 of target type: INT -{0000000002 00000002 top.dispatch info} acceptInst: iq2: dispatching uid:2 RENAMED 0 pid:0 uopid:0 'add 6,4,5' -{0000000002 00000002 top.dispatch info} dispatchInstructions_: Sending instruction: uid:2DISPATCHED 0 pid:0 uopid:0 'add 6,4,5' to iq2 of target type: INT +{0000000002 00000002 top.dispatch info} acceptInst: iq0: dispatching uid:0 RENAMED 0 pid:0 uopid:0 'add 2,0,1' +{0000000002 00000002 top.dispatch info} dispatchInstructions_: Sending instruction: uid:0 DISPATCHED 0 pid:0 uopid:0 'add 2,0,1' to iq0 of target type: INT +{0000000002 00000002 top.dispatch info} acceptInst: iq1: dispatching uid:1 RENAMED 0 pid:0 uopid:0 'add 4,2,3' +{0000000002 00000002 top.dispatch info} dispatchInstructions_: Sending instruction: uid:1 DISPATCHED 0 pid:0 uopid:0 'add 4,2,3' to iq1 of target type: INT +{0000000002 00000002 top.dispatch info} acceptInst: iq2: dispatching uid:2 RENAMED 0 pid:0 uopid:0 'add 6,4,5' +{0000000002 00000002 top.dispatch info} dispatchInstructions_: Sending instruction: uid:2 DISPATCHED 0 pid:0 uopid:0 'add 6,4,5' to iq2 of target type: INT {0000000002 00000002 top.rename info} scheduleRenaming_: current stall: NOT_STALLED -{0000000002 00000002 top.rename info} renameInstructions_: sending inst to dispatch: uid:4 RENAMED 0 pid:0 uopid:0 'add 10,8,9' +{0000000002 00000002 top.rename info} renameInstructions_: sending inst to dispatch: uid:4 RENAMED 0 pid:0 uopid:0 'add 10,8,9' {0000000002 00000002 top.rename info} renameInstructions_: setup source register bit mask [34] for 'integer' scoreboard {0000000002 00000002 top.rename info} renameInstructions_: setup source register bit mask [9,34] for 'integer' scoreboard {0000000002 00000002 top.rename info} renameInstructions_: setup destination register bit mask [35] for 'integer' scoreboard -{0000000002 00000002 top.rename info} renameInstructions_: sending inst to dispatch: uid:5 RENAMED 0 pid:0 uopid:0 'add 12,10,11' +{0000000002 00000002 top.rename info} renameInstructions_: sending inst to dispatch: uid:5 RENAMED 0 pid:0 uopid:0 'add 12,10,11' {0000000002 00000002 top.rename info} renameInstructions_: setup source register bit mask [35] for 'integer' scoreboard {0000000002 00000002 top.rename info} renameInstructions_: setup source register bit mask [11,35] for 'integer' scoreboard {0000000002 00000002 top.rename info} renameInstructions_: setup destination register bit mask [36] for 'integer' scoreboard -{0000000002 00000002 top.rename info} renameInstructions_: sending inst to dispatch: uid:6 RENAMED 0 pid:0 uopid:0 'add 14,12,13' +{0000000002 00000002 top.rename info} renameInstructions_: sending inst to dispatch: uid:6 RENAMED 0 pid:0 uopid:0 'add 14,12,13' {0000000002 00000002 top.rename info} renameInstructions_: setup source register bit mask [36] for 'integer' scoreboard {0000000002 00000002 top.rename info} renameInstructions_: setup source register bit mask [13,36] for 'integer' scoreboard {0000000002 00000002 top.rename info} renameInstructions_: setup destination register bit mask [37] for 'integer' scoreboard -{0000000002 00000002 top.rename info} renameInstructions_: sending inst to dispatch: uid:7 RENAMED 0 pid:0 uopid:0 'add 16,14,15' +{0000000002 00000002 top.rename info} renameInstructions_: sending inst to dispatch: uid:7 RENAMED 0 pid:0 uopid:0 'add 16,14,15' {0000000002 00000002 top.rename info} renameInstructions_: setup source register bit mask [37] for 'integer' scoreboard {0000000002 00000002 top.rename info} renameInstructions_: setup source register bit mask [15,37] for 'integer' scoreboard {0000000002 00000002 top.rename info} renameInstructions_: setup destination register bit mask [38] for 'integer' scoreboard {0000000002 00000002 top.decode info} inCredits: Got credits from dut: 4 {0000000002 00000002 top.decode info} Sending group: 0x00000000 UID(14) PID(0) add, 0x00000000 UID(15) PID(0) add, 0x00000000 UID(16) PID(0) add, 0x00000000 UID(17) PID(0) add -{0000000003 00000003 top.execute.iq0 info} handleOperandIssueCheck_: Sending to issue queue uid:0DISPATCHED 0 pid:0 uopid:0 'add 2,0,1' -{0000000003 00000003 top.execute.iq1 info} handleOperandIssueCheck_: Instruction NOT ready: uid:1DISPATCHED 0 pid:0 uopid:0 'add 4,2,3' Bits needed:[0,3] rf: integer -{0000000003 00000003 top.execute.iq2 info} handleOperandIssueCheck_: Instruction NOT ready: uid:2DISPATCHED 0 pid:0 uopid:0 'add 6,4,5' Bits needed:[5,32] rf: integer +{0000000003 00000003 top.execute.iq0 info} handleOperandIssueCheck_: Sending to issue queue uid:0 DISPATCHED 0 pid:0 uopid:0 'add 2,0,1' +{0000000003 00000003 top.execute.iq1 info} handleOperandIssueCheck_: Instruction NOT ready: uid:1 DISPATCHED 0 pid:0 uopid:0 'add 4,2,3' Bits needed:[0,3] rf: integer +{0000000003 00000003 top.execute.iq2 info} handleOperandIssueCheck_: Instruction NOT ready: uid:2 DISPATCHED 0 pid:0 uopid:0 'add 6,4,5' Bits needed:[5,32] rf: integer {0000000003 00000003 top.dispatch info} dispatchQueueAppended_: queue appended: 0x00000000 UID(4) PID(0) add, 0x00000000 UID(5) PID(0) add, 0x00000000 UID(6) PID(0) add, 0x00000000 UID(7) PID(0) add -{0000000003 00000003 top.execute.iq0 info} sendReadyInsts_: Sending instruction uid:0DISPATCHED 0 pid:0 uopid:0 'add 2,0,1' to exe_pipe exe0 -{0000000003 00000003 top.execute.exe0 info} insertInst: Executing: uid:0 SCHEDULED 0 pid:0 uopid:0 'add 2,0,1' for 4 +{0000000003 00000003 top.execute.iq0 info} sendReadyInsts_: Sending instruction uid:0 DISPATCHED 0 pid:0 uopid:0 'add 2,0,1' to exe_pipe exe0 +{0000000003 00000003 top.execute.exe0 info} insertInst: Executing: uid:0 SCHEDULED 0 pid:0 uopid:0 'add 2,0,1' for 4 {0000000003 00000003 top.dispatch info} receiveCredits_: iq0 got 1 credits, total: 8 {0000000003 00000003 top.dispatch info} dispatchInstructions_: Num to dispatch: 3 -{0000000003 00000003 top.dispatch info} acceptInst: iq0: dispatching uid:3 RENAMED 0 pid:0 uopid:0 'add 8,6,7' -{0000000003 00000003 top.dispatch info} dispatchInstructions_: Sending instruction: uid:3DISPATCHED 0 pid:0 uopid:0 'add 8,6,7' to iq0 of target type: INT -{0000000003 00000003 top.dispatch info} acceptInst: iq1: dispatching uid:4 RENAMED 0 pid:0 uopid:0 'add 10,8,9' -{0000000003 00000003 top.dispatch info} dispatchInstructions_: Sending instruction: uid:4DISPATCHED 0 pid:0 uopid:0 'add 10,8,9' to iq1 of target type: INT -{0000000003 00000003 top.dispatch info} acceptInst: iq2: dispatching uid:5 RENAMED 0 pid:0 uopid:0 'add 12,10,11' -{0000000003 00000003 top.dispatch info} dispatchInstructions_: Sending instruction: uid:5DISPATCHED 0 pid:0 uopid:0 'add 12,10,11' to iq2 of target type: INT +{0000000003 00000003 top.dispatch info} acceptInst: iq0: dispatching uid:3 RENAMED 0 pid:0 uopid:0 'add 8,6,7' +{0000000003 00000003 top.dispatch info} dispatchInstructions_: Sending instruction: uid:3 DISPATCHED 0 pid:0 uopid:0 'add 8,6,7' to iq0 of target type: INT +{0000000003 00000003 top.dispatch info} acceptInst: iq1: dispatching uid:4 RENAMED 0 pid:0 uopid:0 'add 10,8,9' +{0000000003 00000003 top.dispatch info} dispatchInstructions_: Sending instruction: uid:4 DISPATCHED 0 pid:0 uopid:0 'add 10,8,9' to iq1 of target type: INT +{0000000003 00000003 top.dispatch info} acceptInst: iq2: dispatching uid:5 RENAMED 0 pid:0 uopid:0 'add 12,10,11' +{0000000003 00000003 top.dispatch info} dispatchInstructions_: Sending instruction: uid:5 DISPATCHED 0 pid:0 uopid:0 'add 12,10,11' to iq2 of target type: INT {0000000003 00000003 top.rename info} scheduleRenaming_: current stall: NOT_STALLED -{0000000003 00000003 top.rename info} renameInstructions_: sending inst to dispatch: uid:8 RENAMED 0 pid:0 uopid:0 'add 18,16,17' +{0000000003 00000003 top.rename info} renameInstructions_: sending inst to dispatch: uid:8 RENAMED 0 pid:0 uopid:0 'add 18,16,17' {0000000003 00000003 top.rename info} renameInstructions_: setup source register bit mask [38] for 'integer' scoreboard {0000000003 00000003 top.rename info} renameInstructions_: setup source register bit mask [17,38] for 'integer' scoreboard {0000000003 00000003 top.rename info} renameInstructions_: setup destination register bit mask [39] for 'integer' scoreboard -{0000000003 00000003 top.rename info} renameInstructions_: sending inst to dispatch: uid:9 RENAMED 0 pid:0 uopid:0 'add 20,18,19' +{0000000003 00000003 top.rename info} renameInstructions_: sending inst to dispatch: uid:9 RENAMED 0 pid:0 uopid:0 'add 20,18,19' {0000000003 00000003 top.rename info} renameInstructions_: setup source register bit mask [39] for 'integer' scoreboard {0000000003 00000003 top.rename info} renameInstructions_: setup source register bit mask [19,39] for 'integer' scoreboard {0000000003 00000003 top.rename info} renameInstructions_: setup destination register bit mask [40] for 'integer' scoreboard -{0000000003 00000003 top.rename info} renameInstructions_: sending inst to dispatch: uid:10 RENAMED 0 pid:0 uopid:0 'add 22,20,21' +{0000000003 00000003 top.rename info} renameInstructions_: sending inst to dispatch: uid:10 RENAMED 0 pid:0 uopid:0 'add 22,20,21' {0000000003 00000003 top.rename info} renameInstructions_: setup source register bit mask [40] for 'integer' scoreboard {0000000003 00000003 top.rename info} renameInstructions_: setup source register bit mask [21,40] for 'integer' scoreboard {0000000003 00000003 top.rename info} renameInstructions_: setup destination register bit mask [41] for 'integer' scoreboard -{0000000003 00000003 top.rename info} renameInstructions_: sending inst to dispatch: uid:11 RENAMED 0 pid:0 uopid:0 'add 24,22,23' +{0000000003 00000003 top.rename info} renameInstructions_: sending inst to dispatch: uid:11 RENAMED 0 pid:0 uopid:0 'add 24,22,23' {0000000003 00000003 top.rename info} renameInstructions_: setup source register bit mask [41] for 'integer' scoreboard {0000000003 00000003 top.rename info} renameInstructions_: setup source register bit mask [23,41] for 'integer' scoreboard {0000000003 00000003 top.rename info} renameInstructions_: setup destination register bit mask [42] for 'integer' scoreboard {0000000003 00000003 top.decode info} inCredits: Got credits from dut: 4 {0000000003 00000003 top.decode info} Sending group: 0x00000000 UID(18) PID(0) add, 0x00000000 UID(19) PID(0) add, 0x00000000 UID(20) PID(0) add, 0x00000000 UID(21) PID(0) add -{0000000004 00000004 top.execute.iq0 info} handleOperandIssueCheck_: Instruction NOT ready: uid:3DISPATCHED 0 pid:0 uopid:0 'add 8,6,7' Bits needed:[7,33] rf: integer -{0000000004 00000004 top.execute.iq1 info} handleOperandIssueCheck_: Instruction NOT ready: uid:4DISPATCHED 0 pid:0 uopid:0 'add 10,8,9' Bits needed:[9,34] rf: integer -{0000000004 00000004 top.execute.iq2 info} handleOperandIssueCheck_: Instruction NOT ready: uid:5DISPATCHED 0 pid:0 uopid:0 'add 12,10,11' Bits needed:[11,35] rf: integer +{0000000004 00000004 top.execute.iq0 info} handleOperandIssueCheck_: Instruction NOT ready: uid:3 DISPATCHED 0 pid:0 uopid:0 'add 8,6,7' Bits needed:[7,33] rf: integer +{0000000004 00000004 top.execute.iq1 info} handleOperandIssueCheck_: Instruction NOT ready: uid:4 DISPATCHED 0 pid:0 uopid:0 'add 10,8,9' Bits needed:[9,34] rf: integer +{0000000004 00000004 top.execute.iq2 info} handleOperandIssueCheck_: Instruction NOT ready: uid:5 DISPATCHED 0 pid:0 uopid:0 'add 12,10,11' Bits needed:[11,35] rf: integer {0000000004 00000004 top.dispatch info} dispatchQueueAppended_: queue appended: 0x00000000 UID(8) PID(0) add, 0x00000000 UID(9) PID(0) add, 0x00000000 UID(10) PID(0) add, 0x00000000 UID(11) PID(0) add -{0000000004 00000004 top.execute.exe0 info} executeInst_: Executed inst: uid:0 SCHEDULED 0 pid:0 uopid:0 'add 2,0,1' +{0000000004 00000004 top.execute.exe0 info} executeInst_: Executed inst: uid:0 SCHEDULED 0 pid:0 uopid:0 'add 2,0,1' {0000000004 00000004 top.dispatch info} dispatchInstructions_: Num to dispatch: 3 -{0000000004 00000004 top.dispatch info} acceptInst: iq0: dispatching uid:6 RENAMED 0 pid:0 uopid:0 'add 14,12,13' -{0000000004 00000004 top.dispatch info} dispatchInstructions_: Sending instruction: uid:6DISPATCHED 0 pid:0 uopid:0 'add 14,12,13' to iq0 of target type: INT -{0000000004 00000004 top.dispatch info} acceptInst: iq1: dispatching uid:7 RENAMED 0 pid:0 uopid:0 'add 16,14,15' -{0000000004 00000004 top.dispatch info} dispatchInstructions_: Sending instruction: uid:7DISPATCHED 0 pid:0 uopid:0 'add 16,14,15' to iq1 of target type: INT -{0000000004 00000004 top.dispatch info} acceptInst: iq2: dispatching uid:8 RENAMED 0 pid:0 uopid:0 'add 18,16,17' -{0000000004 00000004 top.dispatch info} dispatchInstructions_: Sending instruction: uid:8DISPATCHED 0 pid:0 uopid:0 'add 18,16,17' to iq2 of target type: INT +{0000000004 00000004 top.dispatch info} acceptInst: iq0: dispatching uid:6 RENAMED 0 pid:0 uopid:0 'add 14,12,13' +{0000000004 00000004 top.dispatch info} dispatchInstructions_: Sending instruction: uid:6 DISPATCHED 0 pid:0 uopid:0 'add 14,12,13' to iq0 of target type: INT +{0000000004 00000004 top.dispatch info} acceptInst: iq1: dispatching uid:7 RENAMED 0 pid:0 uopid:0 'add 16,14,15' +{0000000004 00000004 top.dispatch info} dispatchInstructions_: Sending instruction: uid:7 DISPATCHED 0 pid:0 uopid:0 'add 16,14,15' to iq1 of target type: INT +{0000000004 00000004 top.dispatch info} acceptInst: iq2: dispatching uid:8 RENAMED 0 pid:0 uopid:0 'add 18,16,17' +{0000000004 00000004 top.dispatch info} dispatchInstructions_: Sending instruction: uid:8 DISPATCHED 0 pid:0 uopid:0 'add 18,16,17' to iq2 of target type: INT {0000000004 00000004 top.rename info} scheduleRenaming_: current stall: NOT_STALLED -{0000000004 00000004 top.rename info} renameInstructions_: sending inst to dispatch: uid:12 RENAMED 0 pid:0 uopid:0 'add 26,24,25' +{0000000004 00000004 top.rename info} renameInstructions_: sending inst to dispatch: uid:12 RENAMED 0 pid:0 uopid:0 'add 26,24,25' {0000000004 00000004 top.rename info} renameInstructions_: setup source register bit mask [42] for 'integer' scoreboard {0000000004 00000004 top.rename info} renameInstructions_: setup source register bit mask [25,42] for 'integer' scoreboard {0000000004 00000004 top.rename info} renameInstructions_: setup destination register bit mask [43] for 'integer' scoreboard -{0000000004 00000004 top.rename info} renameInstructions_: sending inst to dispatch: uid:13 RENAMED 0 pid:0 uopid:0 'add 28,26,27' +{0000000004 00000004 top.rename info} renameInstructions_: sending inst to dispatch: uid:13 RENAMED 0 pid:0 uopid:0 'add 28,26,27' {0000000004 00000004 top.rename info} renameInstructions_: setup source register bit mask [43] for 'integer' scoreboard {0000000004 00000004 top.rename info} renameInstructions_: setup source register bit mask [27,43] for 'integer' scoreboard {0000000004 00000004 top.rename info} renameInstructions_: setup destination register bit mask [44] for 'integer' scoreboard -{0000000004 00000004 top.rename info} renameInstructions_: sending inst to dispatch: uid:14 RENAMED 0 pid:0 uopid:0 'add 30,28,29' +{0000000004 00000004 top.rename info} renameInstructions_: sending inst to dispatch: uid:14 RENAMED 0 pid:0 uopid:0 'add 30,28,29' {0000000004 00000004 top.rename info} renameInstructions_: setup source register bit mask [44] for 'integer' scoreboard {0000000004 00000004 top.rename info} renameInstructions_: setup source register bit mask [29,44] for 'integer' scoreboard {0000000004 00000004 top.rename info} renameInstructions_: setup destination register bit mask [45] for 'integer' scoreboard -{0000000004 00000004 top.rename info} renameInstructions_: sending inst to dispatch: uid:15 RENAMED 0 pid:0 uopid:0 'add 0,30,31' +{0000000004 00000004 top.rename info} renameInstructions_: sending inst to dispatch: uid:15 RENAMED 0 pid:0 uopid:0 'add 0,30,31' {0000000004 00000004 top.rename info} renameInstructions_: setup source register bit mask [45] for 'integer' scoreboard {0000000004 00000004 top.rename info} renameInstructions_: setup source register bit mask [31,45] for 'integer' scoreboard {0000000004 00000004 top.decode info} inCredits: Got credits from dut: 4 {0000000004 00000004 top.decode info} Sending group: 0x00000000 UID(22) PID(0) add, 0x00000000 UID(23) PID(0) add, 0x00000000 UID(24) PID(0) add, 0x00000000 UID(25) PID(0) add -{0000000005 00000005 top.execute.iq1 info} handleOperandIssueCheck_: Sending to issue queue uid:1DISPATCHED 0 pid:0 uopid:0 'add 4,2,3' -{0000000005 00000005 top.execute.iq0 info} handleOperandIssueCheck_: Instruction NOT ready: uid:6DISPATCHED 0 pid:0 uopid:0 'add 14,12,13' Bits needed:[13,36] rf: integer -{0000000005 00000005 top.execute.iq1 info} handleOperandIssueCheck_: Instruction NOT ready: uid:7DISPATCHED 0 pid:0 uopid:0 'add 16,14,15' Bits needed:[15,37] rf: integer -{0000000005 00000005 top.execute.iq2 info} handleOperandIssueCheck_: Instruction NOT ready: uid:8DISPATCHED 0 pid:0 uopid:0 'add 18,16,17' Bits needed:[17,38] rf: integer +{0000000005 00000005 top.execute.iq1 info} handleOperandIssueCheck_: Sending to issue queue uid:1 DISPATCHED 0 pid:0 uopid:0 'add 4,2,3' +{0000000005 00000005 top.execute.iq0 info} handleOperandIssueCheck_: Instruction NOT ready: uid:6 DISPATCHED 0 pid:0 uopid:0 'add 14,12,13' Bits needed:[13,36] rf: integer +{0000000005 00000005 top.execute.iq1 info} handleOperandIssueCheck_: Instruction NOT ready: uid:7 DISPATCHED 0 pid:0 uopid:0 'add 16,14,15' Bits needed:[15,37] rf: integer +{0000000005 00000005 top.execute.iq2 info} handleOperandIssueCheck_: Instruction NOT ready: uid:8 DISPATCHED 0 pid:0 uopid:0 'add 18,16,17' Bits needed:[17,38] rf: integer {0000000005 00000005 top.dispatch info} dispatchQueueAppended_: queue appended: 0x00000000 UID(12) PID(0) add, 0x00000000 UID(13) PID(0) add, 0x00000000 UID(14) PID(0) add, 0x00000000 UID(15) PID(0) add -{0000000005 00000005 top.execute.exe0 info} completeInst_: Completing inst: uid:0 COMPLETED 0 pid:0 uopid:0 'add 2,0,1' -{0000000005 00000005 top.execute.iq1 info} sendReadyInsts_: Sending instruction uid:1DISPATCHED 0 pid:0 uopid:0 'add 4,2,3' to exe_pipe exe2 -{0000000005 00000005 top.execute.exe2 info} insertInst: Executing: uid:1 SCHEDULED 0 pid:0 uopid:0 'add 4,2,3' for 6 +{0000000005 00000005 top.execute.exe0 info} completeInst_: Completing inst: uid:0 COMPLETED 0 pid:0 uopid:0 'add 2,0,1' +{0000000005 00000005 top.execute.iq1 info} sendReadyInsts_: Sending instruction uid:1 DISPATCHED 0 pid:0 uopid:0 'add 4,2,3' to exe_pipe exe2 +{0000000005 00000005 top.execute.exe2 info} insertInst: Executing: uid:1 SCHEDULED 0 pid:0 uopid:0 'add 4,2,3' for 6 {0000000005 00000005 top.dispatch info} receiveCredits_: iq1 got 1 credits, total: 6 {0000000005 00000005 top.dispatch info} dispatchInstructions_: Num to dispatch: 1 -{0000000005 00000005 top.dispatch info} acceptInst: iq0: dispatching uid:9 RENAMED 0 pid:0 uopid:0 'add 20,18,19' -{0000000005 00000005 top.dispatch info} dispatchInstructions_: Sending instruction: uid:9DISPATCHED 0 pid:0 uopid:0 'add 20,18,19' to iq0 of target type: INT +{0000000005 00000005 top.dispatch info} acceptInst: iq0: dispatching uid:9 RENAMED 0 pid:0 uopid:0 'add 20,18,19' +{0000000005 00000005 top.dispatch info} dispatchInstructions_: Sending instruction: uid:9 DISPATCHED 0 pid:0 uopid:0 'add 20,18,19' to iq0 of target type: INT {0000000005 00000005 top.rename info} scheduleRenaming_: current stall: NOT_STALLED -{0000000005 00000005 top.rename info} renameInstructions_: sending inst to dispatch: uid:16 RENAMED 0 pid:0 uopid:0 'add 2,0,1' +{0000000005 00000005 top.rename info} renameInstructions_: sending inst to dispatch: uid:16 RENAMED 0 pid:0 uopid:0 'add 2,0,1' {0000000005 00000005 top.rename info} renameInstructions_: setup source register bit mask [1] for 'integer' scoreboard {0000000005 00000005 top.rename info} renameInstructions_: setup destination register bit mask [46] for 'integer' scoreboard -{0000000005 00000005 top.rename info} renameInstructions_: sending inst to dispatch: uid:17 RENAMED 0 pid:0 uopid:0 'add 4,2,3' +{0000000005 00000005 top.rename info} renameInstructions_: sending inst to dispatch: uid:17 RENAMED 0 pid:0 uopid:0 'add 4,2,3' {0000000005 00000005 top.rename info} renameInstructions_: setup source register bit mask [46] for 'integer' scoreboard {0000000005 00000005 top.rename info} renameInstructions_: setup source register bit mask [3,46] for 'integer' scoreboard {0000000005 00000005 top.rename info} renameInstructions_: setup destination register bit mask [47] for 'integer' scoreboard -{0000000005 00000005 top.rename info} renameInstructions_: sending inst to dispatch: uid:18 RENAMED 0 pid:0 uopid:0 'add 6,4,5' +{0000000005 00000005 top.rename info} renameInstructions_: sending inst to dispatch: uid:18 RENAMED 0 pid:0 uopid:0 'add 6,4,5' {0000000005 00000005 top.rename info} renameInstructions_: setup source register bit mask [47] for 'integer' scoreboard {0000000005 00000005 top.rename info} renameInstructions_: setup source register bit mask [5,47] for 'integer' scoreboard {0000000005 00000005 top.rename info} renameInstructions_: setup destination register bit mask [48] for 'integer' scoreboard -{0000000005 00000005 top.rename info} renameInstructions_: sending inst to dispatch: uid:19 RENAMED 0 pid:0 uopid:0 'add 8,6,7' +{0000000005 00000005 top.rename info} renameInstructions_: sending inst to dispatch: uid:19 RENAMED 0 pid:0 uopid:0 'add 8,6,7' {0000000005 00000005 top.rename info} renameInstructions_: setup source register bit mask [48] for 'integer' scoreboard {0000000005 00000005 top.rename info} renameInstructions_: setup source register bit mask [7,48] for 'integer' scoreboard {0000000005 00000005 top.rename info} renameInstructions_: setup destination register bit mask [49] for 'integer' scoreboard {0000000005 00000005 top.decode info} inCredits: Got credits from dut: 4 {0000000005 00000005 top.decode info} Sending group: 0x00000000 UID(26) PID(0) add, 0x00000000 UID(27) PID(0) add, 0x00000000 UID(28) PID(0) add, 0x00000000 UID(29) PID(0) add -{0000000006 00000006 top.execute.iq0 info} handleOperandIssueCheck_: Instruction NOT ready: uid:9DISPATCHED 0 pid:0 uopid:0 'add 20,18,19' Bits needed:[19,39] rf: integer +{0000000006 00000006 top.execute.iq0 info} handleOperandIssueCheck_: Instruction NOT ready: uid:9 DISPATCHED 0 pid:0 uopid:0 'add 20,18,19' Bits needed:[19,39] rf: integer {0000000006 00000006 top.dispatch info} dispatchQueueAppended_: queue appended: 0x00000000 UID(16) PID(0) add, 0x00000000 UID(17) PID(0) add, 0x00000000 UID(18) PID(0) add, 0x00000000 UID(19) PID(0) add {0000000006 00000006 top.dispatch info} scheduleDispatchSession: no rob credits or no instructions to process -{0000000006 00000006 top.execute.exe2 info} executeInst_: Executed inst: uid:1 SCHEDULED 0 pid:0 uopid:0 'add 4,2,3' -{0000000007 00000007 top.execute.iq2 info} handleOperandIssueCheck_: Sending to issue queue uid:2DISPATCHED 0 pid:0 uopid:0 'add 6,4,5' -{0000000007 00000007 top.execute.exe2 info} completeInst_: Completing inst: uid:1 COMPLETED 0 pid:0 uopid:0 'add 4,2,3' -{0000000007 00000007 top.execute.iq2 info} sendReadyInsts_: Sending instruction uid:2DISPATCHED 0 pid:0 uopid:0 'add 6,4,5' to exe_pipe exe4 -{0000000007 00000007 top.execute.exe4 info} insertInst: Executing: uid:2 SCHEDULED 0 pid:0 uopid:0 'add 6,4,5' for 8 +{0000000006 00000006 top.execute.exe2 info} executeInst_: Executed inst: uid:1 SCHEDULED 0 pid:0 uopid:0 'add 4,2,3' +{0000000007 00000007 top.execute.iq2 info} handleOperandIssueCheck_: Sending to issue queue uid:2 DISPATCHED 0 pid:0 uopid:0 'add 6,4,5' +{0000000007 00000007 top.execute.exe2 info} completeInst_: Completing inst: uid:1 COMPLETED 0 pid:0 uopid:0 'add 4,2,3' +{0000000007 00000007 top.execute.iq2 info} sendReadyInsts_: Sending instruction uid:2 DISPATCHED 0 pid:0 uopid:0 'add 6,4,5' to exe_pipe exe4 +{0000000007 00000007 top.execute.exe4 info} insertInst: Executing: uid:2 SCHEDULED 0 pid:0 uopid:0 'add 6,4,5' for 8 {0000000007 00000007 top.dispatch info} receiveCredits_: iq2 got 1 credits, total: 6 {0000000007 00000007 top.dispatch info} scheduleDispatchSession: no rob credits or no instructions to process -{0000000008 00000008 top.execute.exe4 info} executeInst_: Executed inst: uid:2 SCHEDULED 0 pid:0 uopid:0 'add 6,4,5' -{0000000009 00000009 top.execute.iq0 info} handleOperandIssueCheck_: Sending to issue queue uid:3DISPATCHED 0 pid:0 uopid:0 'add 8,6,7' -{0000000009 00000009 top.execute.exe4 info} completeInst_: Completing inst: uid:2 COMPLETED 0 pid:0 uopid:0 'add 6,4,5' -{0000000009 00000009 top.execute.iq0 info} sendReadyInsts_: Sending instruction uid:3DISPATCHED 0 pid:0 uopid:0 'add 8,6,7' to exe_pipe exe0 -{0000000009 00000009 top.execute.exe0 info} insertInst: Executing: uid:3 SCHEDULED 0 pid:0 uopid:0 'add 8,6,7' for 10 +{0000000008 00000008 top.execute.exe4 info} executeInst_: Executed inst: uid:2 SCHEDULED 0 pid:0 uopid:0 'add 6,4,5' +{0000000009 00000009 top.execute.iq0 info} handleOperandIssueCheck_: Sending to issue queue uid:3 DISPATCHED 0 pid:0 uopid:0 'add 8,6,7' +{0000000009 00000009 top.execute.exe4 info} completeInst_: Completing inst: uid:2 COMPLETED 0 pid:0 uopid:0 'add 6,4,5' +{0000000009 00000009 top.execute.iq0 info} sendReadyInsts_: Sending instruction uid:3 DISPATCHED 0 pid:0 uopid:0 'add 8,6,7' to exe_pipe exe0 +{0000000009 00000009 top.execute.exe0 info} insertInst: Executing: uid:3 SCHEDULED 0 pid:0 uopid:0 'add 8,6,7' for 10 {0000000009 00000009 top.dispatch info} receiveCredits_: iq0 got 1 credits, total: 6 {0000000009 00000009 top.dispatch info} scheduleDispatchSession: no rob credits or no instructions to process -{0000000010 00000010 top.execute.exe0 info} executeInst_: Executed inst: uid:3 SCHEDULED 0 pid:0 uopid:0 'add 8,6,7' -{0000000011 00000011 top.execute.iq1 info} handleOperandIssueCheck_: Sending to issue queue uid:4DISPATCHED 0 pid:0 uopid:0 'add 10,8,9' -{0000000011 00000011 top.execute.exe0 info} completeInst_: Completing inst: uid:3 COMPLETED 0 pid:0 uopid:0 'add 8,6,7' -{0000000011 00000011 top.execute.iq1 info} sendReadyInsts_: Sending instruction uid:4DISPATCHED 0 pid:0 uopid:0 'add 10,8,9' to exe_pipe exe2 -{0000000011 00000011 top.execute.exe2 info} insertInst: Executing: uid:4 SCHEDULED 0 pid:0 uopid:0 'add 10,8,9' for 12 +{0000000010 00000010 top.execute.exe0 info} executeInst_: Executed inst: uid:3 SCHEDULED 0 pid:0 uopid:0 'add 8,6,7' +{0000000011 00000011 top.execute.iq1 info} handleOperandIssueCheck_: Sending to issue queue uid:4 DISPATCHED 0 pid:0 uopid:0 'add 10,8,9' +{0000000011 00000011 top.execute.exe0 info} completeInst_: Completing inst: uid:3 COMPLETED 0 pid:0 uopid:0 'add 8,6,7' +{0000000011 00000011 top.execute.iq1 info} sendReadyInsts_: Sending instruction uid:4 DISPATCHED 0 pid:0 uopid:0 'add 10,8,9' to exe_pipe exe2 +{0000000011 00000011 top.execute.exe2 info} insertInst: Executing: uid:4 SCHEDULED 0 pid:0 uopid:0 'add 10,8,9' for 12 {0000000011 00000011 top.dispatch info} receiveCredits_: iq1 got 1 credits, total: 7 {0000000011 00000011 top.dispatch info} scheduleDispatchSession: no rob credits or no instructions to process -{0000000012 00000012 top.execute.exe2 info} executeInst_: Executed inst: uid:4 SCHEDULED 0 pid:0 uopid:0 'add 10,8,9' -{0000000013 00000013 top.execute.iq2 info} handleOperandIssueCheck_: Sending to issue queue uid:5DISPATCHED 0 pid:0 uopid:0 'add 12,10,11' -{0000000013 00000013 top.execute.exe2 info} completeInst_: Completing inst: uid:4 COMPLETED 0 pid:0 uopid:0 'add 10,8,9' -{0000000013 00000013 top.execute.iq2 info} sendReadyInsts_: Sending instruction uid:5DISPATCHED 0 pid:0 uopid:0 'add 12,10,11' to exe_pipe exe4 -{0000000013 00000013 top.execute.exe4 info} insertInst: Executing: uid:5 SCHEDULED 0 pid:0 uopid:0 'add 12,10,11' for 14 +{0000000012 00000012 top.execute.exe2 info} executeInst_: Executed inst: uid:4 SCHEDULED 0 pid:0 uopid:0 'add 10,8,9' +{0000000013 00000013 top.execute.iq2 info} handleOperandIssueCheck_: Sending to issue queue uid:5 DISPATCHED 0 pid:0 uopid:0 'add 12,10,11' +{0000000013 00000013 top.execute.exe2 info} completeInst_: Completing inst: uid:4 COMPLETED 0 pid:0 uopid:0 'add 10,8,9' +{0000000013 00000013 top.execute.iq2 info} sendReadyInsts_: Sending instruction uid:5 DISPATCHED 0 pid:0 uopid:0 'add 12,10,11' to exe_pipe exe4 +{0000000013 00000013 top.execute.exe4 info} insertInst: Executing: uid:5 SCHEDULED 0 pid:0 uopid:0 'add 12,10,11' for 14 {0000000013 00000013 top.dispatch info} receiveCredits_: iq2 got 1 credits, total: 7 {0000000013 00000013 top.dispatch info} scheduleDispatchSession: no rob credits or no instructions to process -{0000000014 00000014 top.execute.exe4 info} executeInst_: Executed inst: uid:5 SCHEDULED 0 pid:0 uopid:0 'add 12,10,11' -{0000000015 00000015 top.execute.iq0 info} handleOperandIssueCheck_: Sending to issue queue uid:6DISPATCHED 0 pid:0 uopid:0 'add 14,12,13' -{0000000015 00000015 top.execute.exe4 info} completeInst_: Completing inst: uid:5 COMPLETED 0 pid:0 uopid:0 'add 12,10,11' -{0000000015 00000015 top.execute.iq0 info} sendReadyInsts_: Sending instruction uid:6DISPATCHED 0 pid:0 uopid:0 'add 14,12,13' to exe_pipe exe0 -{0000000015 00000015 top.execute.exe0 info} insertInst: Executing: uid:6 SCHEDULED 0 pid:0 uopid:0 'add 14,12,13' for 16 +{0000000014 00000014 top.execute.exe4 info} executeInst_: Executed inst: uid:5 SCHEDULED 0 pid:0 uopid:0 'add 12,10,11' +{0000000015 00000015 top.execute.iq0 info} handleOperandIssueCheck_: Sending to issue queue uid:6 DISPATCHED 0 pid:0 uopid:0 'add 14,12,13' +{0000000015 00000015 top.execute.exe4 info} completeInst_: Completing inst: uid:5 COMPLETED 0 pid:0 uopid:0 'add 12,10,11' +{0000000015 00000015 top.execute.iq0 info} sendReadyInsts_: Sending instruction uid:6 DISPATCHED 0 pid:0 uopid:0 'add 14,12,13' to exe_pipe exe0 +{0000000015 00000015 top.execute.exe0 info} insertInst: Executing: uid:6 SCHEDULED 0 pid:0 uopid:0 'add 14,12,13' for 16 {0000000015 00000015 top.dispatch info} receiveCredits_: iq0 got 1 credits, total: 7 {0000000015 00000015 top.dispatch info} scheduleDispatchSession: no rob credits or no instructions to process -{0000000016 00000016 top.execute.exe0 info} executeInst_: Executed inst: uid:6 SCHEDULED 0 pid:0 uopid:0 'add 14,12,13' -{0000000017 00000017 top.execute.iq1 info} handleOperandIssueCheck_: Sending to issue queue uid:7DISPATCHED 0 pid:0 uopid:0 'add 16,14,15' -{0000000017 00000017 top.execute.exe0 info} completeInst_: Completing inst: uid:6 COMPLETED 0 pid:0 uopid:0 'add 14,12,13' -{0000000017 00000017 top.execute.iq1 info} sendReadyInsts_: Sending instruction uid:7DISPATCHED 0 pid:0 uopid:0 'add 16,14,15' to exe_pipe exe2 -{0000000017 00000017 top.execute.exe2 info} insertInst: Executing: uid:7 SCHEDULED 0 pid:0 uopid:0 'add 16,14,15' for 18 +{0000000016 00000016 top.execute.exe0 info} executeInst_: Executed inst: uid:6 SCHEDULED 0 pid:0 uopid:0 'add 14,12,13' +{0000000017 00000017 top.execute.iq1 info} handleOperandIssueCheck_: Sending to issue queue uid:7 DISPATCHED 0 pid:0 uopid:0 'add 16,14,15' +{0000000017 00000017 top.execute.exe0 info} completeInst_: Completing inst: uid:6 COMPLETED 0 pid:0 uopid:0 'add 14,12,13' +{0000000017 00000017 top.execute.iq1 info} sendReadyInsts_: Sending instruction uid:7 DISPATCHED 0 pid:0 uopid:0 'add 16,14,15' to exe_pipe exe2 +{0000000017 00000017 top.execute.exe2 info} insertInst: Executing: uid:7 SCHEDULED 0 pid:0 uopid:0 'add 16,14,15' for 18 {0000000017 00000017 top.dispatch info} receiveCredits_: iq1 got 1 credits, total: 8 {0000000017 00000017 top.dispatch info} scheduleDispatchSession: no rob credits or no instructions to process -{0000000018 00000018 top.execute.exe2 info} executeInst_: Executed inst: uid:7 SCHEDULED 0 pid:0 uopid:0 'add 16,14,15' -{0000000019 00000019 top.execute.iq2 info} handleOperandIssueCheck_: Sending to issue queue uid:8DISPATCHED 0 pid:0 uopid:0 'add 18,16,17' -{0000000019 00000019 top.execute.exe2 info} completeInst_: Completing inst: uid:7 COMPLETED 0 pid:0 uopid:0 'add 16,14,15' -{0000000019 00000019 top.execute.iq2 info} sendReadyInsts_: Sending instruction uid:8DISPATCHED 0 pid:0 uopid:0 'add 18,16,17' to exe_pipe exe4 -{0000000019 00000019 top.execute.exe4 info} insertInst: Executing: uid:8 SCHEDULED 0 pid:0 uopid:0 'add 18,16,17' for 20 +{0000000018 00000018 top.execute.exe2 info} executeInst_: Executed inst: uid:7 SCHEDULED 0 pid:0 uopid:0 'add 16,14,15' +{0000000019 00000019 top.execute.iq2 info} handleOperandIssueCheck_: Sending to issue queue uid:8 DISPATCHED 0 pid:0 uopid:0 'add 18,16,17' +{0000000019 00000019 top.execute.exe2 info} completeInst_: Completing inst: uid:7 COMPLETED 0 pid:0 uopid:0 'add 16,14,15' +{0000000019 00000019 top.execute.iq2 info} sendReadyInsts_: Sending instruction uid:8 DISPATCHED 0 pid:0 uopid:0 'add 18,16,17' to exe_pipe exe4 +{0000000019 00000019 top.execute.exe4 info} insertInst: Executing: uid:8 SCHEDULED 0 pid:0 uopid:0 'add 18,16,17' for 20 {0000000019 00000019 top.dispatch info} receiveCredits_: iq2 got 1 credits, total: 8 {0000000019 00000019 top.dispatch info} scheduleDispatchSession: no rob credits or no instructions to process -{0000000020 00000020 top.execute.exe4 info} executeInst_: Executed inst: uid:8 SCHEDULED 0 pid:0 uopid:0 'add 18,16,17' -{0000000021 00000021 top.execute.iq0 info} handleOperandIssueCheck_: Sending to issue queue uid:9DISPATCHED 0 pid:0 uopid:0 'add 20,18,19' -{0000000021 00000021 top.execute.exe4 info} completeInst_: Completing inst: uid:8 COMPLETED 0 pid:0 uopid:0 'add 18,16,17' -{0000000021 00000021 top.execute.iq0 info} sendReadyInsts_: Sending instruction uid:9DISPATCHED 0 pid:0 uopid:0 'add 20,18,19' to exe_pipe exe0 -{0000000021 00000021 top.execute.exe0 info} insertInst: Executing: uid:9 SCHEDULED 0 pid:0 uopid:0 'add 20,18,19' for 22 +{0000000020 00000020 top.execute.exe4 info} executeInst_: Executed inst: uid:8 SCHEDULED 0 pid:0 uopid:0 'add 18,16,17' +{0000000021 00000021 top.execute.iq0 info} handleOperandIssueCheck_: Sending to issue queue uid:9 DISPATCHED 0 pid:0 uopid:0 'add 20,18,19' +{0000000021 00000021 top.execute.exe4 info} completeInst_: Completing inst: uid:8 COMPLETED 0 pid:0 uopid:0 'add 18,16,17' +{0000000021 00000021 top.execute.iq0 info} sendReadyInsts_: Sending instruction uid:9 DISPATCHED 0 pid:0 uopid:0 'add 20,18,19' to exe_pipe exe0 +{0000000021 00000021 top.execute.exe0 info} insertInst: Executing: uid:9 SCHEDULED 0 pid:0 uopid:0 'add 20,18,19' for 22 {0000000021 00000021 top.dispatch info} receiveCredits_: iq0 got 1 credits, total: 8 {0000000021 00000021 top.dispatch info} scheduleDispatchSession: no rob credits or no instructions to process -{0000000022 00000022 top.execute.exe0 info} executeInst_: Executed inst: uid:9 SCHEDULED 0 pid:0 uopid:0 'add 20,18,19' -{0000000023 00000023 top.execute.exe0 info} completeInst_: Completing inst: uid:9 COMPLETED 0 pid:0 uopid:0 'add 20,18,19' +{0000000022 00000022 top.execute.exe0 info} executeInst_: Executed inst: uid:9 SCHEDULED 0 pid:0 uopid:0 'add 20,18,19' +{0000000023 00000023 top.execute.exe0 info} completeInst_: Completing inst: uid:9 COMPLETED 0 pid:0 uopid:0 'add 20,18,19' diff --git a/test/core/dispatch/expected_output/medium_core.out.EXPECTED b/test/core/dispatch/expected_output/medium_core.out.EXPECTED index b999934f..617d2ed0 100644 --- a/test/core/dispatch/expected_output/medium_core.out.EXPECTED +++ b/test/core/dispatch/expected_output/medium_core.out.EXPECTED @@ -3,8 +3,8 @@ #Exe: #SimulatorVersion: #Repro: -#Start: Tuesday Tue Oct 8 16:46:24 2024 -#Elapsed: 0.001696s +#Start: Saturday Sat Oct 19 16:01:55 2024 +#Elapsed: 0.001281s {0000000000 00000000 top.dispatch info} Dispatch: mapping target: INTiq0 {0000000000 00000000 top.dispatch info} Dispatch: mapping target: MULiq0 {0000000000 00000000 top.dispatch info} Dispatch: mapping target: I2Fiq0 @@ -44,18 +44,18 @@ {0000000000 00000000 top.decode info} inCredits: Got credits from dut: 10 {0000000000 00000000 top.decode info} Sending group: 0x00000000 UID(0) PID(0) add, 0x00000000 UID(1) PID(0) add, 0x00000000 UID(2) PID(0) add, 0x00000000 UID(3) PID(0) add, 0x00000000 UID(4) PID(0) add, 0x00000000 UID(5) PID(0) add, 0x00000000 UID(6) PID(0) add, 0x00000000 UID(7) PID(0) add, 0x00000000 UID(8) PID(0) add, 0x00000000 UID(9) PID(0) add {0000000001 00000001 top.rename info} scheduleRenaming_: current stall: NOT_STALLED -{0000000001 00000001 top.rename info} renameInstructions_: sending inst to dispatch: uid:0 RENAMED 0 pid:0 uopid:0 'add 2,0,1' +{0000000001 00000001 top.rename info} renameInstructions_: sending inst to dispatch: uid:0 RENAMED 0 pid:0 uopid:0 'add 2,0,1' {0000000001 00000001 top.rename info} renameInstructions_: setup source register bit mask [1] for 'integer' scoreboard {0000000001 00000001 top.rename info} renameInstructions_: setup destination register bit mask [0] for 'integer' scoreboard -{0000000001 00000001 top.rename info} renameInstructions_: sending inst to dispatch: uid:1 RENAMED 0 pid:0 uopid:0 'add 4,2,3' +{0000000001 00000001 top.rename info} renameInstructions_: sending inst to dispatch: uid:1 RENAMED 0 pid:0 uopid:0 'add 4,2,3' {0000000001 00000001 top.rename info} renameInstructions_: setup source register bit mask [0] for 'integer' scoreboard {0000000001 00000001 top.rename info} renameInstructions_: setup source register bit mask [0,3] for 'integer' scoreboard {0000000001 00000001 top.rename info} renameInstructions_: setup destination register bit mask [32] for 'integer' scoreboard -{0000000001 00000001 top.rename info} renameInstructions_: sending inst to dispatch: uid:2 RENAMED 0 pid:0 uopid:0 'add 6,4,5' +{0000000001 00000001 top.rename info} renameInstructions_: sending inst to dispatch: uid:2 RENAMED 0 pid:0 uopid:0 'add 6,4,5' {0000000001 00000001 top.rename info} renameInstructions_: setup source register bit mask [32] for 'integer' scoreboard {0000000001 00000001 top.rename info} renameInstructions_: setup source register bit mask [5,32] for 'integer' scoreboard {0000000001 00000001 top.rename info} renameInstructions_: setup destination register bit mask [33] for 'integer' scoreboard -{0000000001 00000001 top.rename info} renameInstructions_: sending inst to dispatch: uid:3 RENAMED 0 pid:0 uopid:0 'add 8,6,7' +{0000000001 00000001 top.rename info} renameInstructions_: sending inst to dispatch: uid:3 RENAMED 0 pid:0 uopid:0 'add 8,6,7' {0000000001 00000001 top.rename info} renameInstructions_: setup source register bit mask [33] for 'integer' scoreboard {0000000001 00000001 top.rename info} renameInstructions_: setup source register bit mask [7,33] for 'integer' scoreboard {0000000001 00000001 top.rename info} renameInstructions_: setup destination register bit mask [34] for 'integer' scoreboard @@ -63,191 +63,191 @@ {0000000001 00000001 top.decode info} Sending group: 0x00000000 UID(10) PID(0) add, 0x00000000 UID(11) PID(0) add, 0x00000000 UID(12) PID(0) add, 0x00000000 UID(13) PID(0) add {0000000002 00000002 top.dispatch info} dispatchQueueAppended_: queue appended: 0x00000000 UID(0) PID(0) add, 0x00000000 UID(1) PID(0) add, 0x00000000 UID(2) PID(0) add, 0x00000000 UID(3) PID(0) add {0000000002 00000002 top.dispatch info} dispatchInstructions_: Num to dispatch: 3 -{0000000002 00000002 top.dispatch info} acceptInst: iq0: dispatching uid:0 RENAMED 0 pid:0 uopid:0 'add 2,0,1' -{0000000002 00000002 top.dispatch info} dispatchInstructions_: Sending instruction: uid:0DISPATCHED 0 pid:0 uopid:0 'add 2,0,1' to iq0 of target type: INT -{0000000002 00000002 top.dispatch info} acceptInst: iq1: dispatching uid:1 RENAMED 0 pid:0 uopid:0 'add 4,2,3' -{0000000002 00000002 top.dispatch info} dispatchInstructions_: Sending instruction: uid:1DISPATCHED 0 pid:0 uopid:0 'add 4,2,3' to iq1 of target type: INT -{0000000002 00000002 top.dispatch info} dispatchInstructions_: Could not dispatch: uid:2 RENAMED 0 pid:0 uopid:0 'add 6,4,5' stall: INT_BUSY +{0000000002 00000002 top.dispatch info} acceptInst: iq0: dispatching uid:0 RENAMED 0 pid:0 uopid:0 'add 2,0,1' +{0000000002 00000002 top.dispatch info} dispatchInstructions_: Sending instruction: uid:0 DISPATCHED 0 pid:0 uopid:0 'add 2,0,1' to iq0 of target type: INT +{0000000002 00000002 top.dispatch info} acceptInst: iq1: dispatching uid:1 RENAMED 0 pid:0 uopid:0 'add 4,2,3' +{0000000002 00000002 top.dispatch info} dispatchInstructions_: Sending instruction: uid:1 DISPATCHED 0 pid:0 uopid:0 'add 4,2,3' to iq1 of target type: INT +{0000000002 00000002 top.dispatch info} dispatchInstructions_: Could not dispatch: uid:2 RENAMED 0 pid:0 uopid:0 'add 6,4,5' stall: INT_BUSY {0000000002 00000002 top.rename info} scheduleRenaming_: current stall: NOT_STALLED -{0000000002 00000002 top.rename info} renameInstructions_: sending inst to dispatch: uid:4 RENAMED 0 pid:0 uopid:0 'add 10,8,9' +{0000000002 00000002 top.rename info} renameInstructions_: sending inst to dispatch: uid:4 RENAMED 0 pid:0 uopid:0 'add 10,8,9' {0000000002 00000002 top.rename info} renameInstructions_: setup source register bit mask [34] for 'integer' scoreboard {0000000002 00000002 top.rename info} renameInstructions_: setup source register bit mask [9,34] for 'integer' scoreboard {0000000002 00000002 top.rename info} renameInstructions_: setup destination register bit mask [35] for 'integer' scoreboard -{0000000002 00000002 top.rename info} renameInstructions_: sending inst to dispatch: uid:5 RENAMED 0 pid:0 uopid:0 'add 12,10,11' +{0000000002 00000002 top.rename info} renameInstructions_: sending inst to dispatch: uid:5 RENAMED 0 pid:0 uopid:0 'add 12,10,11' {0000000002 00000002 top.rename info} renameInstructions_: setup source register bit mask [35] for 'integer' scoreboard {0000000002 00000002 top.rename info} renameInstructions_: setup source register bit mask [11,35] for 'integer' scoreboard {0000000002 00000002 top.rename info} renameInstructions_: setup destination register bit mask [36] for 'integer' scoreboard -{0000000002 00000002 top.rename info} renameInstructions_: sending inst to dispatch: uid:6 RENAMED 0 pid:0 uopid:0 'add 14,12,13' +{0000000002 00000002 top.rename info} renameInstructions_: sending inst to dispatch: uid:6 RENAMED 0 pid:0 uopid:0 'add 14,12,13' {0000000002 00000002 top.rename info} renameInstructions_: setup source register bit mask [36] for 'integer' scoreboard {0000000002 00000002 top.rename info} renameInstructions_: setup source register bit mask [13,36] for 'integer' scoreboard {0000000002 00000002 top.rename info} renameInstructions_: setup destination register bit mask [37] for 'integer' scoreboard -{0000000002 00000002 top.rename info} renameInstructions_: sending inst to dispatch: uid:7 RENAMED 0 pid:0 uopid:0 'add 16,14,15' +{0000000002 00000002 top.rename info} renameInstructions_: sending inst to dispatch: uid:7 RENAMED 0 pid:0 uopid:0 'add 16,14,15' {0000000002 00000002 top.rename info} renameInstructions_: setup source register bit mask [37] for 'integer' scoreboard {0000000002 00000002 top.rename info} renameInstructions_: setup source register bit mask [15,37] for 'integer' scoreboard {0000000002 00000002 top.rename info} renameInstructions_: setup destination register bit mask [38] for 'integer' scoreboard {0000000002 00000002 top.decode info} inCredits: Got credits from dut: 4 {0000000002 00000002 top.decode info} Sending group: 0x00000000 UID(14) PID(0) add, 0x00000000 UID(15) PID(0) add, 0x00000000 UID(16) PID(0) add, 0x00000000 UID(17) PID(0) add -{0000000003 00000003 top.execute.iq0 info} handleOperandIssueCheck_: Sending to issue queue uid:0DISPATCHED 0 pid:0 uopid:0 'add 2,0,1' -{0000000003 00000003 top.execute.iq1 info} handleOperandIssueCheck_: Instruction NOT ready: uid:1DISPATCHED 0 pid:0 uopid:0 'add 4,2,3' Bits needed:[0,3] rf: integer +{0000000003 00000003 top.execute.iq0 info} handleOperandIssueCheck_: Sending to issue queue uid:0 DISPATCHED 0 pid:0 uopid:0 'add 2,0,1' +{0000000003 00000003 top.execute.iq1 info} handleOperandIssueCheck_: Instruction NOT ready: uid:1 DISPATCHED 0 pid:0 uopid:0 'add 4,2,3' Bits needed:[0,3] rf: integer {0000000003 00000003 top.dispatch info} dispatchQueueAppended_: queue appended: 0x00000000 UID(4) PID(0) add, 0x00000000 UID(5) PID(0) add, 0x00000000 UID(6) PID(0) add, 0x00000000 UID(7) PID(0) add -{0000000003 00000003 top.execute.iq0 info} sendReadyInsts_: Sending instruction uid:0DISPATCHED 0 pid:0 uopid:0 'add 2,0,1' to exe_pipe exe0 -{0000000003 00000003 top.execute.exe0 info} insertInst: Executing: uid:0 SCHEDULED 0 pid:0 uopid:0 'add 2,0,1' for 4 +{0000000003 00000003 top.execute.iq0 info} sendReadyInsts_: Sending instruction uid:0 DISPATCHED 0 pid:0 uopid:0 'add 2,0,1' to exe_pipe exe0 +{0000000003 00000003 top.execute.exe0 info} insertInst: Executing: uid:0 SCHEDULED 0 pid:0 uopid:0 'add 2,0,1' for 4 {0000000003 00000003 top.dispatch info} receiveCredits_: iq0 got 1 credits, total: 8 {0000000003 00000003 top.dispatch info} dispatchInstructions_: Num to dispatch: 3 -{0000000003 00000003 top.dispatch info} acceptInst: iq0: dispatching uid:2 RENAMED 0 pid:0 uopid:0 'add 6,4,5' -{0000000003 00000003 top.dispatch info} dispatchInstructions_: Sending instruction: uid:2DISPATCHED 0 pid:0 uopid:0 'add 6,4,5' to iq0 of target type: INT -{0000000003 00000003 top.dispatch info} acceptInst: iq1: dispatching uid:3 RENAMED 0 pid:0 uopid:0 'add 8,6,7' -{0000000003 00000003 top.dispatch info} dispatchInstructions_: Sending instruction: uid:3DISPATCHED 0 pid:0 uopid:0 'add 8,6,7' to iq1 of target type: INT -{0000000003 00000003 top.dispatch info} dispatchInstructions_: Could not dispatch: uid:4 RENAMED 0 pid:0 uopid:0 'add 10,8,9' stall: INT_BUSY +{0000000003 00000003 top.dispatch info} acceptInst: iq0: dispatching uid:2 RENAMED 0 pid:0 uopid:0 'add 6,4,5' +{0000000003 00000003 top.dispatch info} dispatchInstructions_: Sending instruction: uid:2 DISPATCHED 0 pid:0 uopid:0 'add 6,4,5' to iq0 of target type: INT +{0000000003 00000003 top.dispatch info} acceptInst: iq1: dispatching uid:3 RENAMED 0 pid:0 uopid:0 'add 8,6,7' +{0000000003 00000003 top.dispatch info} dispatchInstructions_: Sending instruction: uid:3 DISPATCHED 0 pid:0 uopid:0 'add 8,6,7' to iq1 of target type: INT +{0000000003 00000003 top.dispatch info} dispatchInstructions_: Could not dispatch: uid:4 RENAMED 0 pid:0 uopid:0 'add 10,8,9' stall: INT_BUSY {0000000003 00000003 top.rename info} scheduleRenaming_: current stall: NOT_STALLED -{0000000003 00000003 top.rename info} renameInstructions_: sending inst to dispatch: uid:8 RENAMED 0 pid:0 uopid:0 'add 18,16,17' +{0000000003 00000003 top.rename info} renameInstructions_: sending inst to dispatch: uid:8 RENAMED 0 pid:0 uopid:0 'add 18,16,17' {0000000003 00000003 top.rename info} renameInstructions_: setup source register bit mask [38] for 'integer' scoreboard {0000000003 00000003 top.rename info} renameInstructions_: setup source register bit mask [17,38] for 'integer' scoreboard {0000000003 00000003 top.rename info} renameInstructions_: setup destination register bit mask [39] for 'integer' scoreboard -{0000000003 00000003 top.rename info} renameInstructions_: sending inst to dispatch: uid:9 RENAMED 0 pid:0 uopid:0 'add 20,18,19' +{0000000003 00000003 top.rename info} renameInstructions_: sending inst to dispatch: uid:9 RENAMED 0 pid:0 uopid:0 'add 20,18,19' {0000000003 00000003 top.rename info} renameInstructions_: setup source register bit mask [39] for 'integer' scoreboard {0000000003 00000003 top.rename info} renameInstructions_: setup source register bit mask [19,39] for 'integer' scoreboard {0000000003 00000003 top.rename info} renameInstructions_: setup destination register bit mask [40] for 'integer' scoreboard -{0000000003 00000003 top.rename info} renameInstructions_: sending inst to dispatch: uid:10 RENAMED 0 pid:0 uopid:0 'add 22,20,21' +{0000000003 00000003 top.rename info} renameInstructions_: sending inst to dispatch: uid:10 RENAMED 0 pid:0 uopid:0 'add 22,20,21' {0000000003 00000003 top.rename info} renameInstructions_: setup source register bit mask [40] for 'integer' scoreboard {0000000003 00000003 top.rename info} renameInstructions_: setup source register bit mask [21,40] for 'integer' scoreboard {0000000003 00000003 top.rename info} renameInstructions_: setup destination register bit mask [41] for 'integer' scoreboard -{0000000003 00000003 top.rename info} renameInstructions_: sending inst to dispatch: uid:11 RENAMED 0 pid:0 uopid:0 'add 24,22,23' +{0000000003 00000003 top.rename info} renameInstructions_: sending inst to dispatch: uid:11 RENAMED 0 pid:0 uopid:0 'add 24,22,23' {0000000003 00000003 top.rename info} renameInstructions_: setup source register bit mask [41] for 'integer' scoreboard {0000000003 00000003 top.rename info} renameInstructions_: setup source register bit mask [23,41] for 'integer' scoreboard {0000000003 00000003 top.rename info} renameInstructions_: setup destination register bit mask [42] for 'integer' scoreboard {0000000003 00000003 top.decode info} inCredits: Got credits from dut: 4 {0000000003 00000003 top.decode info} Sending group: 0x00000000 UID(18) PID(0) add, 0x00000000 UID(19) PID(0) add, 0x00000000 UID(20) PID(0) add, 0x00000000 UID(21) PID(0) add -{0000000004 00000004 top.execute.iq0 info} handleOperandIssueCheck_: Instruction NOT ready: uid:2DISPATCHED 0 pid:0 uopid:0 'add 6,4,5' Bits needed:[5,32] rf: integer -{0000000004 00000004 top.execute.iq1 info} handleOperandIssueCheck_: Instruction NOT ready: uid:3DISPATCHED 0 pid:0 uopid:0 'add 8,6,7' Bits needed:[7,33] rf: integer +{0000000004 00000004 top.execute.iq0 info} handleOperandIssueCheck_: Instruction NOT ready: uid:2 DISPATCHED 0 pid:0 uopid:0 'add 6,4,5' Bits needed:[5,32] rf: integer +{0000000004 00000004 top.execute.iq1 info} handleOperandIssueCheck_: Instruction NOT ready: uid:3 DISPATCHED 0 pid:0 uopid:0 'add 8,6,7' Bits needed:[7,33] rf: integer {0000000004 00000004 top.dispatch info} dispatchQueueAppended_: queue appended: 0x00000000 UID(8) PID(0) add, 0x00000000 UID(9) PID(0) add, 0x00000000 UID(10) PID(0) add, 0x00000000 UID(11) PID(0) add -{0000000004 00000004 top.execute.exe0 info} executeInst_: Executed inst: uid:0 SCHEDULED 0 pid:0 uopid:0 'add 2,0,1' +{0000000004 00000004 top.execute.exe0 info} executeInst_: Executed inst: uid:0 SCHEDULED 0 pid:0 uopid:0 'add 2,0,1' {0000000004 00000004 top.dispatch info} dispatchInstructions_: Num to dispatch: 3 -{0000000004 00000004 top.dispatch info} acceptInst: iq0: dispatching uid:4 RENAMED 0 pid:0 uopid:0 'add 10,8,9' -{0000000004 00000004 top.dispatch info} dispatchInstructions_: Sending instruction: uid:4DISPATCHED 0 pid:0 uopid:0 'add 10,8,9' to iq0 of target type: INT -{0000000004 00000004 top.dispatch info} acceptInst: iq1: dispatching uid:5 RENAMED 0 pid:0 uopid:0 'add 12,10,11' -{0000000004 00000004 top.dispatch info} dispatchInstructions_: Sending instruction: uid:5DISPATCHED 0 pid:0 uopid:0 'add 12,10,11' to iq1 of target type: INT -{0000000004 00000004 top.dispatch info} dispatchInstructions_: Could not dispatch: uid:6 RENAMED 0 pid:0 uopid:0 'add 14,12,13' stall: INT_BUSY +{0000000004 00000004 top.dispatch info} acceptInst: iq0: dispatching uid:4 RENAMED 0 pid:0 uopid:0 'add 10,8,9' +{0000000004 00000004 top.dispatch info} dispatchInstructions_: Sending instruction: uid:4 DISPATCHED 0 pid:0 uopid:0 'add 10,8,9' to iq0 of target type: INT +{0000000004 00000004 top.dispatch info} acceptInst: iq1: dispatching uid:5 RENAMED 0 pid:0 uopid:0 'add 12,10,11' +{0000000004 00000004 top.dispatch info} dispatchInstructions_: Sending instruction: uid:5 DISPATCHED 0 pid:0 uopid:0 'add 12,10,11' to iq1 of target type: INT +{0000000004 00000004 top.dispatch info} dispatchInstructions_: Could not dispatch: uid:6 RENAMED 0 pid:0 uopid:0 'add 14,12,13' stall: INT_BUSY {0000000004 00000004 top.rename info} scheduleRenaming_: current stall: NOT_STALLED -{0000000004 00000004 top.rename info} renameInstructions_: sending inst to dispatch: uid:12 RENAMED 0 pid:0 uopid:0 'add 26,24,25' +{0000000004 00000004 top.rename info} renameInstructions_: sending inst to dispatch: uid:12 RENAMED 0 pid:0 uopid:0 'add 26,24,25' {0000000004 00000004 top.rename info} renameInstructions_: setup source register bit mask [42] for 'integer' scoreboard {0000000004 00000004 top.rename info} renameInstructions_: setup source register bit mask [25,42] for 'integer' scoreboard {0000000004 00000004 top.rename info} renameInstructions_: setup destination register bit mask [43] for 'integer' scoreboard -{0000000004 00000004 top.rename info} renameInstructions_: sending inst to dispatch: uid:13 RENAMED 0 pid:0 uopid:0 'add 28,26,27' +{0000000004 00000004 top.rename info} renameInstructions_: sending inst to dispatch: uid:13 RENAMED 0 pid:0 uopid:0 'add 28,26,27' {0000000004 00000004 top.rename info} renameInstructions_: setup source register bit mask [43] for 'integer' scoreboard {0000000004 00000004 top.rename info} renameInstructions_: setup source register bit mask [27,43] for 'integer' scoreboard {0000000004 00000004 top.rename info} renameInstructions_: setup destination register bit mask [44] for 'integer' scoreboard -{0000000004 00000004 top.rename info} renameInstructions_: sending inst to dispatch: uid:14 RENAMED 0 pid:0 uopid:0 'add 30,28,29' +{0000000004 00000004 top.rename info} renameInstructions_: sending inst to dispatch: uid:14 RENAMED 0 pid:0 uopid:0 'add 30,28,29' {0000000004 00000004 top.rename info} renameInstructions_: setup source register bit mask [44] for 'integer' scoreboard {0000000004 00000004 top.rename info} renameInstructions_: setup source register bit mask [29,44] for 'integer' scoreboard {0000000004 00000004 top.rename info} renameInstructions_: setup destination register bit mask [45] for 'integer' scoreboard -{0000000004 00000004 top.rename info} renameInstructions_: sending inst to dispatch: uid:15 RENAMED 0 pid:0 uopid:0 'add 0,30,31' +{0000000004 00000004 top.rename info} renameInstructions_: sending inst to dispatch: uid:15 RENAMED 0 pid:0 uopid:0 'add 0,30,31' {0000000004 00000004 top.rename info} renameInstructions_: setup source register bit mask [45] for 'integer' scoreboard {0000000004 00000004 top.rename info} renameInstructions_: setup source register bit mask [31,45] for 'integer' scoreboard {0000000004 00000004 top.decode info} inCredits: Got credits from dut: 4 {0000000004 00000004 top.decode info} Sending group: 0x00000000 UID(22) PID(0) add, 0x00000000 UID(23) PID(0) add, 0x00000000 UID(24) PID(0) add, 0x00000000 UID(25) PID(0) add -{0000000005 00000005 top.execute.iq1 info} handleOperandIssueCheck_: Sending to issue queue uid:1DISPATCHED 0 pid:0 uopid:0 'add 4,2,3' -{0000000005 00000005 top.execute.iq0 info} handleOperandIssueCheck_: Instruction NOT ready: uid:4DISPATCHED 0 pid:0 uopid:0 'add 10,8,9' Bits needed:[9,34] rf: integer -{0000000005 00000005 top.execute.iq1 info} handleOperandIssueCheck_: Instruction NOT ready: uid:5DISPATCHED 0 pid:0 uopid:0 'add 12,10,11' Bits needed:[11,35] rf: integer +{0000000005 00000005 top.execute.iq1 info} handleOperandIssueCheck_: Sending to issue queue uid:1 DISPATCHED 0 pid:0 uopid:0 'add 4,2,3' +{0000000005 00000005 top.execute.iq0 info} handleOperandIssueCheck_: Instruction NOT ready: uid:4 DISPATCHED 0 pid:0 uopid:0 'add 10,8,9' Bits needed:[9,34] rf: integer +{0000000005 00000005 top.execute.iq1 info} handleOperandIssueCheck_: Instruction NOT ready: uid:5 DISPATCHED 0 pid:0 uopid:0 'add 12,10,11' Bits needed:[11,35] rf: integer {0000000005 00000005 top.dispatch info} dispatchQueueAppended_: queue appended: 0x00000000 UID(12) PID(0) add, 0x00000000 UID(13) PID(0) add, 0x00000000 UID(14) PID(0) add, 0x00000000 UID(15) PID(0) add -{0000000005 00000005 top.execute.exe0 info} completeInst_: Completing inst: uid:0 COMPLETED 0 pid:0 uopid:0 'add 2,0,1' -{0000000005 00000005 top.execute.iq1 info} sendReadyInsts_: Sending instruction uid:1DISPATCHED 0 pid:0 uopid:0 'add 4,2,3' to exe_pipe exe1 -{0000000005 00000005 top.execute.exe1 info} insertInst: Executing: uid:1 SCHEDULED 0 pid:0 uopid:0 'add 4,2,3' for 6 +{0000000005 00000005 top.execute.exe0 info} completeInst_: Completing inst: uid:0 COMPLETED 0 pid:0 uopid:0 'add 2,0,1' +{0000000005 00000005 top.execute.iq1 info} sendReadyInsts_: Sending instruction uid:1 DISPATCHED 0 pid:0 uopid:0 'add 4,2,3' to exe_pipe exe1 +{0000000005 00000005 top.execute.exe1 info} insertInst: Executing: uid:1 SCHEDULED 0 pid:0 uopid:0 'add 4,2,3' for 6 {0000000005 00000005 top.dispatch info} receiveCredits_: iq1 got 1 credits, total: 6 {0000000005 00000005 top.dispatch info} dispatchInstructions_: Num to dispatch: 3 -{0000000005 00000005 top.dispatch info} acceptInst: iq0: dispatching uid:6 RENAMED 0 pid:0 uopid:0 'add 14,12,13' -{0000000005 00000005 top.dispatch info} dispatchInstructions_: Sending instruction: uid:6DISPATCHED 0 pid:0 uopid:0 'add 14,12,13' to iq0 of target type: INT -{0000000005 00000005 top.dispatch info} acceptInst: iq1: dispatching uid:7 RENAMED 0 pid:0 uopid:0 'add 16,14,15' -{0000000005 00000005 top.dispatch info} dispatchInstructions_: Sending instruction: uid:7DISPATCHED 0 pid:0 uopid:0 'add 16,14,15' to iq1 of target type: INT -{0000000005 00000005 top.dispatch info} dispatchInstructions_: Could not dispatch: uid:8 RENAMED 0 pid:0 uopid:0 'add 18,16,17' stall: INT_BUSY +{0000000005 00000005 top.dispatch info} acceptInst: iq0: dispatching uid:6 RENAMED 0 pid:0 uopid:0 'add 14,12,13' +{0000000005 00000005 top.dispatch info} dispatchInstructions_: Sending instruction: uid:6 DISPATCHED 0 pid:0 uopid:0 'add 14,12,13' to iq0 of target type: INT +{0000000005 00000005 top.dispatch info} acceptInst: iq1: dispatching uid:7 RENAMED 0 pid:0 uopid:0 'add 16,14,15' +{0000000005 00000005 top.dispatch info} dispatchInstructions_: Sending instruction: uid:7 DISPATCHED 0 pid:0 uopid:0 'add 16,14,15' to iq1 of target type: INT +{0000000005 00000005 top.dispatch info} dispatchInstructions_: Could not dispatch: uid:8 RENAMED 0 pid:0 uopid:0 'add 18,16,17' stall: INT_BUSY {0000000005 00000005 top.rename info} scheduleRenaming_: current stall: NOT_STALLED -{0000000005 00000005 top.rename info} renameInstructions_: sending inst to dispatch: uid:16 RENAMED 0 pid:0 uopid:0 'add 2,0,1' +{0000000005 00000005 top.rename info} renameInstructions_: sending inst to dispatch: uid:16 RENAMED 0 pid:0 uopid:0 'add 2,0,1' {0000000005 00000005 top.rename info} renameInstructions_: setup source register bit mask [1] for 'integer' scoreboard {0000000005 00000005 top.rename info} renameInstructions_: setup destination register bit mask [46] for 'integer' scoreboard -{0000000005 00000005 top.rename info} renameInstructions_: sending inst to dispatch: uid:17 RENAMED 0 pid:0 uopid:0 'add 4,2,3' +{0000000005 00000005 top.rename info} renameInstructions_: sending inst to dispatch: uid:17 RENAMED 0 pid:0 uopid:0 'add 4,2,3' {0000000005 00000005 top.rename info} renameInstructions_: setup source register bit mask [46] for 'integer' scoreboard {0000000005 00000005 top.rename info} renameInstructions_: setup source register bit mask [3,46] for 'integer' scoreboard {0000000005 00000005 top.rename info} renameInstructions_: setup destination register bit mask [47] for 'integer' scoreboard {0000000005 00000005 top.decode info} inCredits: Got credits from dut: 2 {0000000005 00000005 top.decode info} Sending group: 0x00000000 UID(26) PID(0) add, 0x00000000 UID(27) PID(0) add -{0000000006 00000006 top.execute.iq0 info} handleOperandIssueCheck_: Instruction NOT ready: uid:6DISPATCHED 0 pid:0 uopid:0 'add 14,12,13' Bits needed:[13,36] rf: integer -{0000000006 00000006 top.execute.iq1 info} handleOperandIssueCheck_: Instruction NOT ready: uid:7DISPATCHED 0 pid:0 uopid:0 'add 16,14,15' Bits needed:[15,37] rf: integer +{0000000006 00000006 top.execute.iq0 info} handleOperandIssueCheck_: Instruction NOT ready: uid:6 DISPATCHED 0 pid:0 uopid:0 'add 14,12,13' Bits needed:[13,36] rf: integer +{0000000006 00000006 top.execute.iq1 info} handleOperandIssueCheck_: Instruction NOT ready: uid:7 DISPATCHED 0 pid:0 uopid:0 'add 16,14,15' Bits needed:[15,37] rf: integer {0000000006 00000006 top.dispatch info} dispatchQueueAppended_: queue appended: 0x00000000 UID(16) PID(0) add, 0x00000000 UID(17) PID(0) add -{0000000006 00000006 top.execute.exe1 info} executeInst_: Executed inst: uid:1 SCHEDULED 0 pid:0 uopid:0 'add 4,2,3' +{0000000006 00000006 top.execute.exe1 info} executeInst_: Executed inst: uid:1 SCHEDULED 0 pid:0 uopid:0 'add 4,2,3' {0000000006 00000006 top.dispatch info} dispatchInstructions_: Num to dispatch: 2 -{0000000006 00000006 top.dispatch info} acceptInst: iq0: dispatching uid:8 RENAMED 0 pid:0 uopid:0 'add 18,16,17' -{0000000006 00000006 top.dispatch info} dispatchInstructions_: Sending instruction: uid:8DISPATCHED 0 pid:0 uopid:0 'add 18,16,17' to iq0 of target type: INT -{0000000006 00000006 top.dispatch info} acceptInst: iq1: dispatching uid:9 RENAMED 0 pid:0 uopid:0 'add 20,18,19' -{0000000006 00000006 top.dispatch info} dispatchInstructions_: Sending instruction: uid:9DISPATCHED 0 pid:0 uopid:0 'add 20,18,19' to iq1 of target type: INT +{0000000006 00000006 top.dispatch info} acceptInst: iq0: dispatching uid:8 RENAMED 0 pid:0 uopid:0 'add 18,16,17' +{0000000006 00000006 top.dispatch info} dispatchInstructions_: Sending instruction: uid:8 DISPATCHED 0 pid:0 uopid:0 'add 18,16,17' to iq0 of target type: INT +{0000000006 00000006 top.dispatch info} acceptInst: iq1: dispatching uid:9 RENAMED 0 pid:0 uopid:0 'add 20,18,19' +{0000000006 00000006 top.dispatch info} dispatchInstructions_: Sending instruction: uid:9 DISPATCHED 0 pid:0 uopid:0 'add 20,18,19' to iq1 of target type: INT {0000000006 00000006 top.rename info} scheduleRenaming_: current stall: NOT_STALLED -{0000000006 00000006 top.rename info} renameInstructions_: sending inst to dispatch: uid:18 RENAMED 0 pid:0 uopid:0 'add 6,4,5' +{0000000006 00000006 top.rename info} renameInstructions_: sending inst to dispatch: uid:18 RENAMED 0 pid:0 uopid:0 'add 6,4,5' {0000000006 00000006 top.rename info} renameInstructions_: setup source register bit mask [47] for 'integer' scoreboard {0000000006 00000006 top.rename info} renameInstructions_: setup source register bit mask [5,47] for 'integer' scoreboard {0000000006 00000006 top.rename info} renameInstructions_: setup destination register bit mask [48] for 'integer' scoreboard -{0000000006 00000006 top.rename info} renameInstructions_: sending inst to dispatch: uid:19 RENAMED 0 pid:0 uopid:0 'add 8,6,7' +{0000000006 00000006 top.rename info} renameInstructions_: sending inst to dispatch: uid:19 RENAMED 0 pid:0 uopid:0 'add 8,6,7' {0000000006 00000006 top.rename info} renameInstructions_: setup source register bit mask [48] for 'integer' scoreboard {0000000006 00000006 top.rename info} renameInstructions_: setup source register bit mask [7,48] for 'integer' scoreboard {0000000006 00000006 top.rename info} renameInstructions_: setup destination register bit mask [49] for 'integer' scoreboard {0000000006 00000006 top.decode info} inCredits: Got credits from dut: 2 {0000000006 00000006 top.decode info} Sending group: 0x00000000 UID(28) PID(0) add, 0x00000000 UID(29) PID(0) add -{0000000007 00000007 top.execute.iq0 info} handleOperandIssueCheck_: Sending to issue queue uid:2DISPATCHED 0 pid:0 uopid:0 'add 6,4,5' -{0000000007 00000007 top.execute.iq0 info} handleOperandIssueCheck_: Instruction NOT ready: uid:8DISPATCHED 0 pid:0 uopid:0 'add 18,16,17' Bits needed:[17,38] rf: integer -{0000000007 00000007 top.execute.iq1 info} handleOperandIssueCheck_: Instruction NOT ready: uid:9DISPATCHED 0 pid:0 uopid:0 'add 20,18,19' Bits needed:[19,39] rf: integer +{0000000007 00000007 top.execute.iq0 info} handleOperandIssueCheck_: Sending to issue queue uid:2 DISPATCHED 0 pid:0 uopid:0 'add 6,4,5' +{0000000007 00000007 top.execute.iq0 info} handleOperandIssueCheck_: Instruction NOT ready: uid:8 DISPATCHED 0 pid:0 uopid:0 'add 18,16,17' Bits needed:[17,38] rf: integer +{0000000007 00000007 top.execute.iq1 info} handleOperandIssueCheck_: Instruction NOT ready: uid:9 DISPATCHED 0 pid:0 uopid:0 'add 20,18,19' Bits needed:[19,39] rf: integer {0000000007 00000007 top.dispatch info} dispatchQueueAppended_: queue appended: 0x00000000 UID(18) PID(0) add, 0x00000000 UID(19) PID(0) add {0000000007 00000007 top.dispatch info} scheduleDispatchSession: no rob credits or no instructions to process -{0000000007 00000007 top.execute.exe1 info} completeInst_: Completing inst: uid:1 COMPLETED 0 pid:0 uopid:0 'add 4,2,3' -{0000000007 00000007 top.execute.iq0 info} sendReadyInsts_: Sending instruction uid:2DISPATCHED 0 pid:0 uopid:0 'add 6,4,5' to exe_pipe exe0 -{0000000007 00000007 top.execute.exe0 info} insertInst: Executing: uid:2 SCHEDULED 0 pid:0 uopid:0 'add 6,4,5' for 8 +{0000000007 00000007 top.execute.exe1 info} completeInst_: Completing inst: uid:1 COMPLETED 0 pid:0 uopid:0 'add 4,2,3' +{0000000007 00000007 top.execute.iq0 info} sendReadyInsts_: Sending instruction uid:2 DISPATCHED 0 pid:0 uopid:0 'add 6,4,5' to exe_pipe exe0 +{0000000007 00000007 top.execute.exe0 info} insertInst: Executing: uid:2 SCHEDULED 0 pid:0 uopid:0 'add 6,4,5' for 8 {0000000007 00000007 top.dispatch info} receiveCredits_: iq0 got 1 credits, total: 5 {0000000007 00000007 top.dispatch info} scheduleDispatchSession: no rob credits or no instructions to process -{0000000008 00000008 top.execute.exe0 info} executeInst_: Executed inst: uid:2 SCHEDULED 0 pid:0 uopid:0 'add 6,4,5' -{0000000009 00000009 top.execute.iq1 info} handleOperandIssueCheck_: Sending to issue queue uid:3DISPATCHED 0 pid:0 uopid:0 'add 8,6,7' -{0000000009 00000009 top.execute.exe0 info} completeInst_: Completing inst: uid:2 COMPLETED 0 pid:0 uopid:0 'add 6,4,5' -{0000000009 00000009 top.execute.iq1 info} sendReadyInsts_: Sending instruction uid:3DISPATCHED 0 pid:0 uopid:0 'add 8,6,7' to exe_pipe exe1 -{0000000009 00000009 top.execute.exe1 info} insertInst: Executing: uid:3 SCHEDULED 0 pid:0 uopid:0 'add 8,6,7' for 10 +{0000000008 00000008 top.execute.exe0 info} executeInst_: Executed inst: uid:2 SCHEDULED 0 pid:0 uopid:0 'add 6,4,5' +{0000000009 00000009 top.execute.iq1 info} handleOperandIssueCheck_: Sending to issue queue uid:3 DISPATCHED 0 pid:0 uopid:0 'add 8,6,7' +{0000000009 00000009 top.execute.exe0 info} completeInst_: Completing inst: uid:2 COMPLETED 0 pid:0 uopid:0 'add 6,4,5' +{0000000009 00000009 top.execute.iq1 info} sendReadyInsts_: Sending instruction uid:3 DISPATCHED 0 pid:0 uopid:0 'add 8,6,7' to exe_pipe exe1 +{0000000009 00000009 top.execute.exe1 info} insertInst: Executing: uid:3 SCHEDULED 0 pid:0 uopid:0 'add 8,6,7' for 10 {0000000009 00000009 top.dispatch info} receiveCredits_: iq1 got 1 credits, total: 5 {0000000009 00000009 top.dispatch info} scheduleDispatchSession: no rob credits or no instructions to process -{0000000010 00000010 top.execute.exe1 info} executeInst_: Executed inst: uid:3 SCHEDULED 0 pid:0 uopid:0 'add 8,6,7' -{0000000011 00000011 top.execute.iq0 info} handleOperandIssueCheck_: Sending to issue queue uid:4DISPATCHED 0 pid:0 uopid:0 'add 10,8,9' -{0000000011 00000011 top.execute.exe1 info} completeInst_: Completing inst: uid:3 COMPLETED 0 pid:0 uopid:0 'add 8,6,7' -{0000000011 00000011 top.execute.iq0 info} sendReadyInsts_: Sending instruction uid:4DISPATCHED 0 pid:0 uopid:0 'add 10,8,9' to exe_pipe exe0 -{0000000011 00000011 top.execute.exe0 info} insertInst: Executing: uid:4 SCHEDULED 0 pid:0 uopid:0 'add 10,8,9' for 12 +{0000000010 00000010 top.execute.exe1 info} executeInst_: Executed inst: uid:3 SCHEDULED 0 pid:0 uopid:0 'add 8,6,7' +{0000000011 00000011 top.execute.iq0 info} handleOperandIssueCheck_: Sending to issue queue uid:4 DISPATCHED 0 pid:0 uopid:0 'add 10,8,9' +{0000000011 00000011 top.execute.exe1 info} completeInst_: Completing inst: uid:3 COMPLETED 0 pid:0 uopid:0 'add 8,6,7' +{0000000011 00000011 top.execute.iq0 info} sendReadyInsts_: Sending instruction uid:4 DISPATCHED 0 pid:0 uopid:0 'add 10,8,9' to exe_pipe exe0 +{0000000011 00000011 top.execute.exe0 info} insertInst: Executing: uid:4 SCHEDULED 0 pid:0 uopid:0 'add 10,8,9' for 12 {0000000011 00000011 top.dispatch info} receiveCredits_: iq0 got 1 credits, total: 6 {0000000011 00000011 top.dispatch info} scheduleDispatchSession: no rob credits or no instructions to process -{0000000012 00000012 top.execute.exe0 info} executeInst_: Executed inst: uid:4 SCHEDULED 0 pid:0 uopid:0 'add 10,8,9' -{0000000013 00000013 top.execute.iq1 info} handleOperandIssueCheck_: Sending to issue queue uid:5DISPATCHED 0 pid:0 uopid:0 'add 12,10,11' -{0000000013 00000013 top.execute.exe0 info} completeInst_: Completing inst: uid:4 COMPLETED 0 pid:0 uopid:0 'add 10,8,9' -{0000000013 00000013 top.execute.iq1 info} sendReadyInsts_: Sending instruction uid:5DISPATCHED 0 pid:0 uopid:0 'add 12,10,11' to exe_pipe exe1 -{0000000013 00000013 top.execute.exe1 info} insertInst: Executing: uid:5 SCHEDULED 0 pid:0 uopid:0 'add 12,10,11' for 14 +{0000000012 00000012 top.execute.exe0 info} executeInst_: Executed inst: uid:4 SCHEDULED 0 pid:0 uopid:0 'add 10,8,9' +{0000000013 00000013 top.execute.iq1 info} handleOperandIssueCheck_: Sending to issue queue uid:5 DISPATCHED 0 pid:0 uopid:0 'add 12,10,11' +{0000000013 00000013 top.execute.exe0 info} completeInst_: Completing inst: uid:4 COMPLETED 0 pid:0 uopid:0 'add 10,8,9' +{0000000013 00000013 top.execute.iq1 info} sendReadyInsts_: Sending instruction uid:5 DISPATCHED 0 pid:0 uopid:0 'add 12,10,11' to exe_pipe exe1 +{0000000013 00000013 top.execute.exe1 info} insertInst: Executing: uid:5 SCHEDULED 0 pid:0 uopid:0 'add 12,10,11' for 14 {0000000013 00000013 top.dispatch info} receiveCredits_: iq1 got 1 credits, total: 6 {0000000013 00000013 top.dispatch info} scheduleDispatchSession: no rob credits or no instructions to process -{0000000014 00000014 top.execute.exe1 info} executeInst_: Executed inst: uid:5 SCHEDULED 0 pid:0 uopid:0 'add 12,10,11' -{0000000015 00000015 top.execute.iq0 info} handleOperandIssueCheck_: Sending to issue queue uid:6DISPATCHED 0 pid:0 uopid:0 'add 14,12,13' -{0000000015 00000015 top.execute.exe1 info} completeInst_: Completing inst: uid:5 COMPLETED 0 pid:0 uopid:0 'add 12,10,11' -{0000000015 00000015 top.execute.iq0 info} sendReadyInsts_: Sending instruction uid:6DISPATCHED 0 pid:0 uopid:0 'add 14,12,13' to exe_pipe exe0 -{0000000015 00000015 top.execute.exe0 info} insertInst: Executing: uid:6 SCHEDULED 0 pid:0 uopid:0 'add 14,12,13' for 16 +{0000000014 00000014 top.execute.exe1 info} executeInst_: Executed inst: uid:5 SCHEDULED 0 pid:0 uopid:0 'add 12,10,11' +{0000000015 00000015 top.execute.iq0 info} handleOperandIssueCheck_: Sending to issue queue uid:6 DISPATCHED 0 pid:0 uopid:0 'add 14,12,13' +{0000000015 00000015 top.execute.exe1 info} completeInst_: Completing inst: uid:5 COMPLETED 0 pid:0 uopid:0 'add 12,10,11' +{0000000015 00000015 top.execute.iq0 info} sendReadyInsts_: Sending instruction uid:6 DISPATCHED 0 pid:0 uopid:0 'add 14,12,13' to exe_pipe exe0 +{0000000015 00000015 top.execute.exe0 info} insertInst: Executing: uid:6 SCHEDULED 0 pid:0 uopid:0 'add 14,12,13' for 16 {0000000015 00000015 top.dispatch info} receiveCredits_: iq0 got 1 credits, total: 7 {0000000015 00000015 top.dispatch info} scheduleDispatchSession: no rob credits or no instructions to process -{0000000016 00000016 top.execute.exe0 info} executeInst_: Executed inst: uid:6 SCHEDULED 0 pid:0 uopid:0 'add 14,12,13' -{0000000017 00000017 top.execute.iq1 info} handleOperandIssueCheck_: Sending to issue queue uid:7DISPATCHED 0 pid:0 uopid:0 'add 16,14,15' -{0000000017 00000017 top.execute.exe0 info} completeInst_: Completing inst: uid:6 COMPLETED 0 pid:0 uopid:0 'add 14,12,13' -{0000000017 00000017 top.execute.iq1 info} sendReadyInsts_: Sending instruction uid:7DISPATCHED 0 pid:0 uopid:0 'add 16,14,15' to exe_pipe exe1 -{0000000017 00000017 top.execute.exe1 info} insertInst: Executing: uid:7 SCHEDULED 0 pid:0 uopid:0 'add 16,14,15' for 18 +{0000000016 00000016 top.execute.exe0 info} executeInst_: Executed inst: uid:6 SCHEDULED 0 pid:0 uopid:0 'add 14,12,13' +{0000000017 00000017 top.execute.iq1 info} handleOperandIssueCheck_: Sending to issue queue uid:7 DISPATCHED 0 pid:0 uopid:0 'add 16,14,15' +{0000000017 00000017 top.execute.exe0 info} completeInst_: Completing inst: uid:6 COMPLETED 0 pid:0 uopid:0 'add 14,12,13' +{0000000017 00000017 top.execute.iq1 info} sendReadyInsts_: Sending instruction uid:7 DISPATCHED 0 pid:0 uopid:0 'add 16,14,15' to exe_pipe exe1 +{0000000017 00000017 top.execute.exe1 info} insertInst: Executing: uid:7 SCHEDULED 0 pid:0 uopid:0 'add 16,14,15' for 18 {0000000017 00000017 top.dispatch info} receiveCredits_: iq1 got 1 credits, total: 7 {0000000017 00000017 top.dispatch info} scheduleDispatchSession: no rob credits or no instructions to process -{0000000018 00000018 top.execute.exe1 info} executeInst_: Executed inst: uid:7 SCHEDULED 0 pid:0 uopid:0 'add 16,14,15' -{0000000019 00000019 top.execute.iq0 info} handleOperandIssueCheck_: Sending to issue queue uid:8DISPATCHED 0 pid:0 uopid:0 'add 18,16,17' -{0000000019 00000019 top.execute.exe1 info} completeInst_: Completing inst: uid:7 COMPLETED 0 pid:0 uopid:0 'add 16,14,15' -{0000000019 00000019 top.execute.iq0 info} sendReadyInsts_: Sending instruction uid:8DISPATCHED 0 pid:0 uopid:0 'add 18,16,17' to exe_pipe exe0 -{0000000019 00000019 top.execute.exe0 info} insertInst: Executing: uid:8 SCHEDULED 0 pid:0 uopid:0 'add 18,16,17' for 20 +{0000000018 00000018 top.execute.exe1 info} executeInst_: Executed inst: uid:7 SCHEDULED 0 pid:0 uopid:0 'add 16,14,15' +{0000000019 00000019 top.execute.iq0 info} handleOperandIssueCheck_: Sending to issue queue uid:8 DISPATCHED 0 pid:0 uopid:0 'add 18,16,17' +{0000000019 00000019 top.execute.exe1 info} completeInst_: Completing inst: uid:7 COMPLETED 0 pid:0 uopid:0 'add 16,14,15' +{0000000019 00000019 top.execute.iq0 info} sendReadyInsts_: Sending instruction uid:8 DISPATCHED 0 pid:0 uopid:0 'add 18,16,17' to exe_pipe exe0 +{0000000019 00000019 top.execute.exe0 info} insertInst: Executing: uid:8 SCHEDULED 0 pid:0 uopid:0 'add 18,16,17' for 20 {0000000019 00000019 top.dispatch info} receiveCredits_: iq0 got 1 credits, total: 8 {0000000019 00000019 top.dispatch info} scheduleDispatchSession: no rob credits or no instructions to process -{0000000020 00000020 top.execute.exe0 info} executeInst_: Executed inst: uid:8 SCHEDULED 0 pid:0 uopid:0 'add 18,16,17' -{0000000021 00000021 top.execute.iq1 info} handleOperandIssueCheck_: Sending to issue queue uid:9DISPATCHED 0 pid:0 uopid:0 'add 20,18,19' -{0000000021 00000021 top.execute.exe0 info} completeInst_: Completing inst: uid:8 COMPLETED 0 pid:0 uopid:0 'add 18,16,17' -{0000000021 00000021 top.execute.iq1 info} sendReadyInsts_: Sending instruction uid:9DISPATCHED 0 pid:0 uopid:0 'add 20,18,19' to exe_pipe exe1 -{0000000021 00000021 top.execute.exe1 info} insertInst: Executing: uid:9 SCHEDULED 0 pid:0 uopid:0 'add 20,18,19' for 22 +{0000000020 00000020 top.execute.exe0 info} executeInst_: Executed inst: uid:8 SCHEDULED 0 pid:0 uopid:0 'add 18,16,17' +{0000000021 00000021 top.execute.iq1 info} handleOperandIssueCheck_: Sending to issue queue uid:9 DISPATCHED 0 pid:0 uopid:0 'add 20,18,19' +{0000000021 00000021 top.execute.exe0 info} completeInst_: Completing inst: uid:8 COMPLETED 0 pid:0 uopid:0 'add 18,16,17' +{0000000021 00000021 top.execute.iq1 info} sendReadyInsts_: Sending instruction uid:9 DISPATCHED 0 pid:0 uopid:0 'add 20,18,19' to exe_pipe exe1 +{0000000021 00000021 top.execute.exe1 info} insertInst: Executing: uid:9 SCHEDULED 0 pid:0 uopid:0 'add 20,18,19' for 22 {0000000021 00000021 top.dispatch info} receiveCredits_: iq1 got 1 credits, total: 8 {0000000021 00000021 top.dispatch info} scheduleDispatchSession: no rob credits or no instructions to process -{0000000022 00000022 top.execute.exe1 info} executeInst_: Executed inst: uid:9 SCHEDULED 0 pid:0 uopid:0 'add 20,18,19' -{0000000023 00000023 top.execute.exe1 info} completeInst_: Completing inst: uid:9 COMPLETED 0 pid:0 uopid:0 'add 20,18,19' +{0000000022 00000022 top.execute.exe1 info} executeInst_: Executed inst: uid:9 SCHEDULED 0 pid:0 uopid:0 'add 20,18,19' +{0000000023 00000023 top.execute.exe1 info} completeInst_: Completing inst: uid:9 COMPLETED 0 pid:0 uopid:0 'add 20,18,19' diff --git a/test/core/dispatch/expected_output/small_core.out.EXPECTED b/test/core/dispatch/expected_output/small_core.out.EXPECTED index c5889fc6..f1f7eb08 100644 --- a/test/core/dispatch/expected_output/small_core.out.EXPECTED +++ b/test/core/dispatch/expected_output/small_core.out.EXPECTED @@ -3,8 +3,8 @@ #Exe: #SimulatorVersion: #Repro: -#Start: Tuesday Tue Oct 8 16:46:24 2024 -#Elapsed: 0.002685s +#Start: Saturday Sat Oct 19 16:01:55 2024 +#Elapsed: 0.001895s {0000000000 00000000 top.dispatch info} Dispatch: mapping target: INTiq0 {0000000000 00000000 top.dispatch info} Dispatch: mapping target: MULiq0 {0000000000 00000000 top.dispatch info} Dispatch: mapping target: I2Fiq0 @@ -38,18 +38,18 @@ {0000000000 00000000 top.decode info} inCredits: Got credits from dut: 10 {0000000000 00000000 top.decode info} Sending group: 0x00000000 UID(0) PID(0) add, 0x00000000 UID(1) PID(0) add, 0x00000000 UID(2) PID(0) add, 0x00000000 UID(3) PID(0) add, 0x00000000 UID(4) PID(0) add, 0x00000000 UID(5) PID(0) add, 0x00000000 UID(6) PID(0) add, 0x00000000 UID(7) PID(0) add, 0x00000000 UID(8) PID(0) add, 0x00000000 UID(9) PID(0) add {0000000001 00000001 top.rename info} scheduleRenaming_: current stall: NOT_STALLED -{0000000001 00000001 top.rename info} renameInstructions_: sending inst to dispatch: uid:0 RENAMED 0 pid:0 uopid:0 'add 2,0,1' +{0000000001 00000001 top.rename info} renameInstructions_: sending inst to dispatch: uid:0 RENAMED 0 pid:0 uopid:0 'add 2,0,1' {0000000001 00000001 top.rename info} renameInstructions_: setup source register bit mask [1] for 'integer' scoreboard {0000000001 00000001 top.rename info} renameInstructions_: setup destination register bit mask [0] for 'integer' scoreboard -{0000000001 00000001 top.rename info} renameInstructions_: sending inst to dispatch: uid:1 RENAMED 0 pid:0 uopid:0 'add 4,2,3' +{0000000001 00000001 top.rename info} renameInstructions_: sending inst to dispatch: uid:1 RENAMED 0 pid:0 uopid:0 'add 4,2,3' {0000000001 00000001 top.rename info} renameInstructions_: setup source register bit mask [0] for 'integer' scoreboard {0000000001 00000001 top.rename info} renameInstructions_: setup source register bit mask [0,3] for 'integer' scoreboard {0000000001 00000001 top.rename info} renameInstructions_: setup destination register bit mask [32] for 'integer' scoreboard -{0000000001 00000001 top.rename info} renameInstructions_: sending inst to dispatch: uid:2 RENAMED 0 pid:0 uopid:0 'add 6,4,5' +{0000000001 00000001 top.rename info} renameInstructions_: sending inst to dispatch: uid:2 RENAMED 0 pid:0 uopid:0 'add 6,4,5' {0000000001 00000001 top.rename info} renameInstructions_: setup source register bit mask [32] for 'integer' scoreboard {0000000001 00000001 top.rename info} renameInstructions_: setup source register bit mask [5,32] for 'integer' scoreboard {0000000001 00000001 top.rename info} renameInstructions_: setup destination register bit mask [33] for 'integer' scoreboard -{0000000001 00000001 top.rename info} renameInstructions_: sending inst to dispatch: uid:3 RENAMED 0 pid:0 uopid:0 'add 8,6,7' +{0000000001 00000001 top.rename info} renameInstructions_: sending inst to dispatch: uid:3 RENAMED 0 pid:0 uopid:0 'add 8,6,7' {0000000001 00000001 top.rename info} renameInstructions_: setup source register bit mask [33] for 'integer' scoreboard {0000000001 00000001 top.rename info} renameInstructions_: setup source register bit mask [7,33] for 'integer' scoreboard {0000000001 00000001 top.rename info} renameInstructions_: setup destination register bit mask [34] for 'integer' scoreboard @@ -57,218 +57,218 @@ {0000000001 00000001 top.decode info} Sending group: 0x00000000 UID(10) PID(0) add, 0x00000000 UID(11) PID(0) add, 0x00000000 UID(12) PID(0) add, 0x00000000 UID(13) PID(0) add {0000000002 00000002 top.dispatch info} dispatchQueueAppended_: queue appended: 0x00000000 UID(0) PID(0) add, 0x00000000 UID(1) PID(0) add, 0x00000000 UID(2) PID(0) add, 0x00000000 UID(3) PID(0) add {0000000002 00000002 top.dispatch info} dispatchInstructions_: Num to dispatch: 3 -{0000000002 00000002 top.dispatch info} acceptInst: iq0: dispatching uid:0 RENAMED 0 pid:0 uopid:0 'add 2,0,1' -{0000000002 00000002 top.dispatch info} dispatchInstructions_: Sending instruction: uid:0DISPATCHED 0 pid:0 uopid:0 'add 2,0,1' to iq0 of target type: INT -{0000000002 00000002 top.dispatch info} dispatchInstructions_: Could not dispatch: uid:1 RENAMED 0 pid:0 uopid:0 'add 4,2,3' stall: INT_BUSY +{0000000002 00000002 top.dispatch info} acceptInst: iq0: dispatching uid:0 RENAMED 0 pid:0 uopid:0 'add 2,0,1' +{0000000002 00000002 top.dispatch info} dispatchInstructions_: Sending instruction: uid:0 DISPATCHED 0 pid:0 uopid:0 'add 2,0,1' to iq0 of target type: INT +{0000000002 00000002 top.dispatch info} dispatchInstructions_: Could not dispatch: uid:1 RENAMED 0 pid:0 uopid:0 'add 4,2,3' stall: INT_BUSY {0000000002 00000002 top.rename info} scheduleRenaming_: current stall: NOT_STALLED -{0000000002 00000002 top.rename info} renameInstructions_: sending inst to dispatch: uid:4 RENAMED 0 pid:0 uopid:0 'add 10,8,9' +{0000000002 00000002 top.rename info} renameInstructions_: sending inst to dispatch: uid:4 RENAMED 0 pid:0 uopid:0 'add 10,8,9' {0000000002 00000002 top.rename info} renameInstructions_: setup source register bit mask [34] for 'integer' scoreboard {0000000002 00000002 top.rename info} renameInstructions_: setup source register bit mask [9,34] for 'integer' scoreboard {0000000002 00000002 top.rename info} renameInstructions_: setup destination register bit mask [35] for 'integer' scoreboard -{0000000002 00000002 top.rename info} renameInstructions_: sending inst to dispatch: uid:5 RENAMED 0 pid:0 uopid:0 'add 12,10,11' +{0000000002 00000002 top.rename info} renameInstructions_: sending inst to dispatch: uid:5 RENAMED 0 pid:0 uopid:0 'add 12,10,11' {0000000002 00000002 top.rename info} renameInstructions_: setup source register bit mask [35] for 'integer' scoreboard {0000000002 00000002 top.rename info} renameInstructions_: setup source register bit mask [11,35] for 'integer' scoreboard {0000000002 00000002 top.rename info} renameInstructions_: setup destination register bit mask [36] for 'integer' scoreboard -{0000000002 00000002 top.rename info} renameInstructions_: sending inst to dispatch: uid:6 RENAMED 0 pid:0 uopid:0 'add 14,12,13' +{0000000002 00000002 top.rename info} renameInstructions_: sending inst to dispatch: uid:6 RENAMED 0 pid:0 uopid:0 'add 14,12,13' {0000000002 00000002 top.rename info} renameInstructions_: setup source register bit mask [36] for 'integer' scoreboard {0000000002 00000002 top.rename info} renameInstructions_: setup source register bit mask [13,36] for 'integer' scoreboard {0000000002 00000002 top.rename info} renameInstructions_: setup destination register bit mask [37] for 'integer' scoreboard -{0000000002 00000002 top.rename info} renameInstructions_: sending inst to dispatch: uid:7 RENAMED 0 pid:0 uopid:0 'add 16,14,15' +{0000000002 00000002 top.rename info} renameInstructions_: sending inst to dispatch: uid:7 RENAMED 0 pid:0 uopid:0 'add 16,14,15' {0000000002 00000002 top.rename info} renameInstructions_: setup source register bit mask [37] for 'integer' scoreboard {0000000002 00000002 top.rename info} renameInstructions_: setup source register bit mask [15,37] for 'integer' scoreboard {0000000002 00000002 top.rename info} renameInstructions_: setup destination register bit mask [38] for 'integer' scoreboard {0000000002 00000002 top.decode info} inCredits: Got credits from dut: 4 {0000000002 00000002 top.decode info} Sending group: 0x00000000 UID(14) PID(0) add, 0x00000000 UID(15) PID(0) add, 0x00000000 UID(16) PID(0) add, 0x00000000 UID(17) PID(0) add -{0000000003 00000003 top.execute.iq0 info} handleOperandIssueCheck_: Sending to issue queue uid:0DISPATCHED 0 pid:0 uopid:0 'add 2,0,1' +{0000000003 00000003 top.execute.iq0 info} handleOperandIssueCheck_: Sending to issue queue uid:0 DISPATCHED 0 pid:0 uopid:0 'add 2,0,1' {0000000003 00000003 top.dispatch info} dispatchQueueAppended_: queue appended: 0x00000000 UID(4) PID(0) add, 0x00000000 UID(5) PID(0) add, 0x00000000 UID(6) PID(0) add, 0x00000000 UID(7) PID(0) add -{0000000003 00000003 top.execute.iq0 info} sendReadyInsts_: Sending instruction uid:0DISPATCHED 0 pid:0 uopid:0 'add 2,0,1' to exe_pipe exe0 -{0000000003 00000003 top.execute.exe0 info} insertInst: Executing: uid:0 SCHEDULED 0 pid:0 uopid:0 'add 2,0,1' for 4 +{0000000003 00000003 top.execute.iq0 info} sendReadyInsts_: Sending instruction uid:0 DISPATCHED 0 pid:0 uopid:0 'add 2,0,1' to exe_pipe exe0 +{0000000003 00000003 top.execute.exe0 info} insertInst: Executing: uid:0 SCHEDULED 0 pid:0 uopid:0 'add 2,0,1' for 4 {0000000003 00000003 top.dispatch info} receiveCredits_: iq0 got 1 credits, total: 8 {0000000003 00000003 top.dispatch info} dispatchInstructions_: Num to dispatch: 3 -{0000000003 00000003 top.dispatch info} acceptInst: iq0: dispatching uid:1 RENAMED 0 pid:0 uopid:0 'add 4,2,3' -{0000000003 00000003 top.dispatch info} dispatchInstructions_: Sending instruction: uid:1DISPATCHED 0 pid:0 uopid:0 'add 4,2,3' to iq0 of target type: INT -{0000000003 00000003 top.dispatch info} dispatchInstructions_: Could not dispatch: uid:2 RENAMED 0 pid:0 uopid:0 'add 6,4,5' stall: INT_BUSY +{0000000003 00000003 top.dispatch info} acceptInst: iq0: dispatching uid:1 RENAMED 0 pid:0 uopid:0 'add 4,2,3' +{0000000003 00000003 top.dispatch info} dispatchInstructions_: Sending instruction: uid:1 DISPATCHED 0 pid:0 uopid:0 'add 4,2,3' to iq0 of target type: INT +{0000000003 00000003 top.dispatch info} dispatchInstructions_: Could not dispatch: uid:2 RENAMED 0 pid:0 uopid:0 'add 6,4,5' stall: INT_BUSY {0000000003 00000003 top.rename info} scheduleRenaming_: current stall: NOT_STALLED -{0000000003 00000003 top.rename info} renameInstructions_: sending inst to dispatch: uid:8 RENAMED 0 pid:0 uopid:0 'add 18,16,17' +{0000000003 00000003 top.rename info} renameInstructions_: sending inst to dispatch: uid:8 RENAMED 0 pid:0 uopid:0 'add 18,16,17' {0000000003 00000003 top.rename info} renameInstructions_: setup source register bit mask [38] for 'integer' scoreboard {0000000003 00000003 top.rename info} renameInstructions_: setup source register bit mask [17,38] for 'integer' scoreboard {0000000003 00000003 top.rename info} renameInstructions_: setup destination register bit mask [39] for 'integer' scoreboard -{0000000003 00000003 top.rename info} renameInstructions_: sending inst to dispatch: uid:9 RENAMED 0 pid:0 uopid:0 'add 20,18,19' +{0000000003 00000003 top.rename info} renameInstructions_: sending inst to dispatch: uid:9 RENAMED 0 pid:0 uopid:0 'add 20,18,19' {0000000003 00000003 top.rename info} renameInstructions_: setup source register bit mask [39] for 'integer' scoreboard {0000000003 00000003 top.rename info} renameInstructions_: setup source register bit mask [19,39] for 'integer' scoreboard {0000000003 00000003 top.rename info} renameInstructions_: setup destination register bit mask [40] for 'integer' scoreboard -{0000000003 00000003 top.rename info} renameInstructions_: sending inst to dispatch: uid:10 RENAMED 0 pid:0 uopid:0 'add 22,20,21' +{0000000003 00000003 top.rename info} renameInstructions_: sending inst to dispatch: uid:10 RENAMED 0 pid:0 uopid:0 'add 22,20,21' {0000000003 00000003 top.rename info} renameInstructions_: setup source register bit mask [40] for 'integer' scoreboard {0000000003 00000003 top.rename info} renameInstructions_: setup source register bit mask [21,40] for 'integer' scoreboard {0000000003 00000003 top.rename info} renameInstructions_: setup destination register bit mask [41] for 'integer' scoreboard -{0000000003 00000003 top.rename info} renameInstructions_: sending inst to dispatch: uid:11 RENAMED 0 pid:0 uopid:0 'add 24,22,23' +{0000000003 00000003 top.rename info} renameInstructions_: sending inst to dispatch: uid:11 RENAMED 0 pid:0 uopid:0 'add 24,22,23' {0000000003 00000003 top.rename info} renameInstructions_: setup source register bit mask [41] for 'integer' scoreboard {0000000003 00000003 top.rename info} renameInstructions_: setup source register bit mask [23,41] for 'integer' scoreboard {0000000003 00000003 top.rename info} renameInstructions_: setup destination register bit mask [42] for 'integer' scoreboard {0000000003 00000003 top.decode info} inCredits: Got credits from dut: 4 {0000000003 00000003 top.decode info} Sending group: 0x00000000 UID(18) PID(0) add, 0x00000000 UID(19) PID(0) add, 0x00000000 UID(20) PID(0) add, 0x00000000 UID(21) PID(0) add -{0000000004 00000004 top.execute.iq0 info} handleOperandIssueCheck_: Instruction NOT ready: uid:1DISPATCHED 0 pid:0 uopid:0 'add 4,2,3' Bits needed:[0,3] rf: integer +{0000000004 00000004 top.execute.iq0 info} handleOperandIssueCheck_: Instruction NOT ready: uid:1 DISPATCHED 0 pid:0 uopid:0 'add 4,2,3' Bits needed:[0,3] rf: integer {0000000004 00000004 top.dispatch info} dispatchQueueAppended_: queue appended: 0x00000000 UID(8) PID(0) add, 0x00000000 UID(9) PID(0) add, 0x00000000 UID(10) PID(0) add, 0x00000000 UID(11) PID(0) add -{0000000004 00000004 top.execute.exe0 info} executeInst_: Executed inst: uid:0 SCHEDULED 0 pid:0 uopid:0 'add 2,0,1' +{0000000004 00000004 top.execute.exe0 info} executeInst_: Executed inst: uid:0 SCHEDULED 0 pid:0 uopid:0 'add 2,0,1' {0000000004 00000004 top.dispatch info} dispatchInstructions_: Num to dispatch: 3 -{0000000004 00000004 top.dispatch info} acceptInst: iq0: dispatching uid:2 RENAMED 0 pid:0 uopid:0 'add 6,4,5' -{0000000004 00000004 top.dispatch info} dispatchInstructions_: Sending instruction: uid:2DISPATCHED 0 pid:0 uopid:0 'add 6,4,5' to iq0 of target type: INT -{0000000004 00000004 top.dispatch info} dispatchInstructions_: Could not dispatch: uid:3 RENAMED 0 pid:0 uopid:0 'add 8,6,7' stall: INT_BUSY +{0000000004 00000004 top.dispatch info} acceptInst: iq0: dispatching uid:2 RENAMED 0 pid:0 uopid:0 'add 6,4,5' +{0000000004 00000004 top.dispatch info} dispatchInstructions_: Sending instruction: uid:2 DISPATCHED 0 pid:0 uopid:0 'add 6,4,5' to iq0 of target type: INT +{0000000004 00000004 top.dispatch info} dispatchInstructions_: Could not dispatch: uid:3 RENAMED 0 pid:0 uopid:0 'add 8,6,7' stall: INT_BUSY {0000000004 00000004 top.rename info} scheduleRenaming_: current stall: NOT_STALLED -{0000000004 00000004 top.rename info} renameInstructions_: sending inst to dispatch: uid:12 RENAMED 0 pid:0 uopid:0 'add 26,24,25' +{0000000004 00000004 top.rename info} renameInstructions_: sending inst to dispatch: uid:12 RENAMED 0 pid:0 uopid:0 'add 26,24,25' {0000000004 00000004 top.rename info} renameInstructions_: setup source register bit mask [42] for 'integer' scoreboard {0000000004 00000004 top.rename info} renameInstructions_: setup source register bit mask [25,42] for 'integer' scoreboard {0000000004 00000004 top.rename info} renameInstructions_: setup destination register bit mask [43] for 'integer' scoreboard {0000000004 00000004 top.decode info} inCredits: Got credits from dut: 1 {0000000004 00000004 top.decode info} Sending group: 0x00000000 UID(22) PID(0) add -{0000000005 00000005 top.execute.iq0 info} handleOperandIssueCheck_: Sending to issue queue uid:1DISPATCHED 0 pid:0 uopid:0 'add 4,2,3' -{0000000005 00000005 top.execute.iq0 info} handleOperandIssueCheck_: Instruction NOT ready: uid:2DISPATCHED 0 pid:0 uopid:0 'add 6,4,5' Bits needed:[5,32] rf: integer +{0000000005 00000005 top.execute.iq0 info} handleOperandIssueCheck_: Sending to issue queue uid:1 DISPATCHED 0 pid:0 uopid:0 'add 4,2,3' +{0000000005 00000005 top.execute.iq0 info} handleOperandIssueCheck_: Instruction NOT ready: uid:2 DISPATCHED 0 pid:0 uopid:0 'add 6,4,5' Bits needed:[5,32] rf: integer {0000000005 00000005 top.dispatch info} dispatchQueueAppended_: queue appended: 0x00000000 UID(12) PID(0) add -{0000000005 00000005 top.execute.exe0 info} completeInst_: Completing inst: uid:0 COMPLETED 0 pid:0 uopid:0 'add 2,0,1' -{0000000005 00000005 top.execute.iq0 info} sendReadyInsts_: Sending instruction uid:1DISPATCHED 0 pid:0 uopid:0 'add 4,2,3' to exe_pipe exe0 -{0000000005 00000005 top.execute.exe0 info} insertInst: Executing: uid:1 SCHEDULED 0 pid:0 uopid:0 'add 4,2,3' for 6 +{0000000005 00000005 top.execute.exe0 info} completeInst_: Completing inst: uid:0 COMPLETED 0 pid:0 uopid:0 'add 2,0,1' +{0000000005 00000005 top.execute.iq0 info} sendReadyInsts_: Sending instruction uid:1 DISPATCHED 0 pid:0 uopid:0 'add 4,2,3' to exe_pipe exe0 +{0000000005 00000005 top.execute.exe0 info} insertInst: Executing: uid:1 SCHEDULED 0 pid:0 uopid:0 'add 4,2,3' for 6 {0000000005 00000005 top.dispatch info} receiveCredits_: iq0 got 1 credits, total: 7 {0000000005 00000005 top.dispatch info} dispatchInstructions_: Num to dispatch: 3 -{0000000005 00000005 top.dispatch info} acceptInst: iq0: dispatching uid:3 RENAMED 0 pid:0 uopid:0 'add 8,6,7' -{0000000005 00000005 top.dispatch info} dispatchInstructions_: Sending instruction: uid:3DISPATCHED 0 pid:0 uopid:0 'add 8,6,7' to iq0 of target type: INT -{0000000005 00000005 top.dispatch info} dispatchInstructions_: Could not dispatch: uid:4 RENAMED 0 pid:0 uopid:0 'add 10,8,9' stall: INT_BUSY +{0000000005 00000005 top.dispatch info} acceptInst: iq0: dispatching uid:3 RENAMED 0 pid:0 uopid:0 'add 8,6,7' +{0000000005 00000005 top.dispatch info} dispatchInstructions_: Sending instruction: uid:3 DISPATCHED 0 pid:0 uopid:0 'add 8,6,7' to iq0 of target type: INT +{0000000005 00000005 top.dispatch info} dispatchInstructions_: Could not dispatch: uid:4 RENAMED 0 pid:0 uopid:0 'add 10,8,9' stall: INT_BUSY {0000000005 00000005 top.rename info} scheduleRenaming_: current stall: NOT_STALLED -{0000000005 00000005 top.rename info} renameInstructions_: sending inst to dispatch: uid:13 RENAMED 0 pid:0 uopid:0 'add 28,26,27' +{0000000005 00000005 top.rename info} renameInstructions_: sending inst to dispatch: uid:13 RENAMED 0 pid:0 uopid:0 'add 28,26,27' {0000000005 00000005 top.rename info} renameInstructions_: setup source register bit mask [43] for 'integer' scoreboard {0000000005 00000005 top.rename info} renameInstructions_: setup source register bit mask [27,43] for 'integer' scoreboard {0000000005 00000005 top.rename info} renameInstructions_: setup destination register bit mask [44] for 'integer' scoreboard {0000000005 00000005 top.decode info} inCredits: Got credits from dut: 1 {0000000005 00000005 top.decode info} Sending group: 0x00000000 UID(23) PID(0) add -{0000000006 00000006 top.execute.iq0 info} handleOperandIssueCheck_: Instruction NOT ready: uid:3DISPATCHED 0 pid:0 uopid:0 'add 8,6,7' Bits needed:[7,33] rf: integer +{0000000006 00000006 top.execute.iq0 info} handleOperandIssueCheck_: Instruction NOT ready: uid:3 DISPATCHED 0 pid:0 uopid:0 'add 8,6,7' Bits needed:[7,33] rf: integer {0000000006 00000006 top.dispatch info} dispatchQueueAppended_: queue appended: 0x00000000 UID(13) PID(0) add -{0000000006 00000006 top.execute.exe0 info} executeInst_: Executed inst: uid:1 SCHEDULED 0 pid:0 uopid:0 'add 4,2,3' +{0000000006 00000006 top.execute.exe0 info} executeInst_: Executed inst: uid:1 SCHEDULED 0 pid:0 uopid:0 'add 4,2,3' {0000000006 00000006 top.dispatch info} dispatchInstructions_: Num to dispatch: 3 -{0000000006 00000006 top.dispatch info} acceptInst: iq0: dispatching uid:4 RENAMED 0 pid:0 uopid:0 'add 10,8,9' -{0000000006 00000006 top.dispatch info} dispatchInstructions_: Sending instruction: uid:4DISPATCHED 0 pid:0 uopid:0 'add 10,8,9' to iq0 of target type: INT -{0000000006 00000006 top.dispatch info} dispatchInstructions_: Could not dispatch: uid:5 RENAMED 0 pid:0 uopid:0 'add 12,10,11' stall: INT_BUSY +{0000000006 00000006 top.dispatch info} acceptInst: iq0: dispatching uid:4 RENAMED 0 pid:0 uopid:0 'add 10,8,9' +{0000000006 00000006 top.dispatch info} dispatchInstructions_: Sending instruction: uid:4 DISPATCHED 0 pid:0 uopid:0 'add 10,8,9' to iq0 of target type: INT +{0000000006 00000006 top.dispatch info} dispatchInstructions_: Could not dispatch: uid:5 RENAMED 0 pid:0 uopid:0 'add 12,10,11' stall: INT_BUSY {0000000006 00000006 top.rename info} scheduleRenaming_: current stall: NOT_STALLED -{0000000006 00000006 top.rename info} renameInstructions_: sending inst to dispatch: uid:14 RENAMED 0 pid:0 uopid:0 'add 30,28,29' +{0000000006 00000006 top.rename info} renameInstructions_: sending inst to dispatch: uid:14 RENAMED 0 pid:0 uopid:0 'add 30,28,29' {0000000006 00000006 top.rename info} renameInstructions_: setup source register bit mask [44] for 'integer' scoreboard {0000000006 00000006 top.rename info} renameInstructions_: setup source register bit mask [29,44] for 'integer' scoreboard {0000000006 00000006 top.rename info} renameInstructions_: setup destination register bit mask [45] for 'integer' scoreboard {0000000006 00000006 top.decode info} inCredits: Got credits from dut: 1 {0000000006 00000006 top.decode info} Sending group: 0x00000000 UID(24) PID(0) add -{0000000007 00000007 top.execute.iq0 info} handleOperandIssueCheck_: Sending to issue queue uid:2DISPATCHED 0 pid:0 uopid:0 'add 6,4,5' -{0000000007 00000007 top.execute.iq0 info} handleOperandIssueCheck_: Instruction NOT ready: uid:4DISPATCHED 0 pid:0 uopid:0 'add 10,8,9' Bits needed:[9,34] rf: integer +{0000000007 00000007 top.execute.iq0 info} handleOperandIssueCheck_: Sending to issue queue uid:2 DISPATCHED 0 pid:0 uopid:0 'add 6,4,5' +{0000000007 00000007 top.execute.iq0 info} handleOperandIssueCheck_: Instruction NOT ready: uid:4 DISPATCHED 0 pid:0 uopid:0 'add 10,8,9' Bits needed:[9,34] rf: integer {0000000007 00000007 top.dispatch info} dispatchQueueAppended_: queue appended: 0x00000000 UID(14) PID(0) add -{0000000007 00000007 top.execute.exe0 info} completeInst_: Completing inst: uid:1 COMPLETED 0 pid:0 uopid:0 'add 4,2,3' -{0000000007 00000007 top.execute.iq0 info} sendReadyInsts_: Sending instruction uid:2DISPATCHED 0 pid:0 uopid:0 'add 6,4,5' to exe_pipe exe0 -{0000000007 00000007 top.execute.exe0 info} insertInst: Executing: uid:2 SCHEDULED 0 pid:0 uopid:0 'add 6,4,5' for 8 +{0000000007 00000007 top.execute.exe0 info} completeInst_: Completing inst: uid:1 COMPLETED 0 pid:0 uopid:0 'add 4,2,3' +{0000000007 00000007 top.execute.iq0 info} sendReadyInsts_: Sending instruction uid:2 DISPATCHED 0 pid:0 uopid:0 'add 6,4,5' to exe_pipe exe0 +{0000000007 00000007 top.execute.exe0 info} insertInst: Executing: uid:2 SCHEDULED 0 pid:0 uopid:0 'add 6,4,5' for 8 {0000000007 00000007 top.dispatch info} receiveCredits_: iq0 got 1 credits, total: 6 {0000000007 00000007 top.dispatch info} dispatchInstructions_: Num to dispatch: 3 -{0000000007 00000007 top.dispatch info} acceptInst: iq0: dispatching uid:5 RENAMED 0 pid:0 uopid:0 'add 12,10,11' -{0000000007 00000007 top.dispatch info} dispatchInstructions_: Sending instruction: uid:5DISPATCHED 0 pid:0 uopid:0 'add 12,10,11' to iq0 of target type: INT -{0000000007 00000007 top.dispatch info} dispatchInstructions_: Could not dispatch: uid:6 RENAMED 0 pid:0 uopid:0 'add 14,12,13' stall: INT_BUSY +{0000000007 00000007 top.dispatch info} acceptInst: iq0: dispatching uid:5 RENAMED 0 pid:0 uopid:0 'add 12,10,11' +{0000000007 00000007 top.dispatch info} dispatchInstructions_: Sending instruction: uid:5 DISPATCHED 0 pid:0 uopid:0 'add 12,10,11' to iq0 of target type: INT +{0000000007 00000007 top.dispatch info} dispatchInstructions_: Could not dispatch: uid:6 RENAMED 0 pid:0 uopid:0 'add 14,12,13' stall: INT_BUSY {0000000007 00000007 top.rename info} scheduleRenaming_: current stall: NOT_STALLED -{0000000007 00000007 top.rename info} renameInstructions_: sending inst to dispatch: uid:15 RENAMED 0 pid:0 uopid:0 'add 0,30,31' +{0000000007 00000007 top.rename info} renameInstructions_: sending inst to dispatch: uid:15 RENAMED 0 pid:0 uopid:0 'add 0,30,31' {0000000007 00000007 top.rename info} renameInstructions_: setup source register bit mask [45] for 'integer' scoreboard {0000000007 00000007 top.rename info} renameInstructions_: setup source register bit mask [31,45] for 'integer' scoreboard {0000000007 00000007 top.decode info} inCredits: Got credits from dut: 1 {0000000007 00000007 top.decode info} Sending group: 0x00000000 UID(25) PID(0) add -{0000000008 00000008 top.execute.iq0 info} handleOperandIssueCheck_: Instruction NOT ready: uid:5DISPATCHED 0 pid:0 uopid:0 'add 12,10,11' Bits needed:[11,35] rf: integer +{0000000008 00000008 top.execute.iq0 info} handleOperandIssueCheck_: Instruction NOT ready: uid:5 DISPATCHED 0 pid:0 uopid:0 'add 12,10,11' Bits needed:[11,35] rf: integer {0000000008 00000008 top.dispatch info} dispatchQueueAppended_: queue appended: 0x00000000 UID(15) PID(0) add -{0000000008 00000008 top.execute.exe0 info} executeInst_: Executed inst: uid:2 SCHEDULED 0 pid:0 uopid:0 'add 6,4,5' +{0000000008 00000008 top.execute.exe0 info} executeInst_: Executed inst: uid:2 SCHEDULED 0 pid:0 uopid:0 'add 6,4,5' {0000000008 00000008 top.dispatch info} dispatchInstructions_: Num to dispatch: 3 -{0000000008 00000008 top.dispatch info} acceptInst: iq0: dispatching uid:6 RENAMED 0 pid:0 uopid:0 'add 14,12,13' -{0000000008 00000008 top.dispatch info} dispatchInstructions_: Sending instruction: uid:6DISPATCHED 0 pid:0 uopid:0 'add 14,12,13' to iq0 of target type: INT -{0000000008 00000008 top.dispatch info} dispatchInstructions_: Could not dispatch: uid:7 RENAMED 0 pid:0 uopid:0 'add 16,14,15' stall: INT_BUSY +{0000000008 00000008 top.dispatch info} acceptInst: iq0: dispatching uid:6 RENAMED 0 pid:0 uopid:0 'add 14,12,13' +{0000000008 00000008 top.dispatch info} dispatchInstructions_: Sending instruction: uid:6 DISPATCHED 0 pid:0 uopid:0 'add 14,12,13' to iq0 of target type: INT +{0000000008 00000008 top.dispatch info} dispatchInstructions_: Could not dispatch: uid:7 RENAMED 0 pid:0 uopid:0 'add 16,14,15' stall: INT_BUSY {0000000008 00000008 top.rename info} scheduleRenaming_: current stall: NOT_STALLED -{0000000008 00000008 top.rename info} renameInstructions_: sending inst to dispatch: uid:16 RENAMED 0 pid:0 uopid:0 'add 2,0,1' +{0000000008 00000008 top.rename info} renameInstructions_: sending inst to dispatch: uid:16 RENAMED 0 pid:0 uopid:0 'add 2,0,1' {0000000008 00000008 top.rename info} renameInstructions_: setup source register bit mask [1] for 'integer' scoreboard {0000000008 00000008 top.rename info} renameInstructions_: setup destination register bit mask [46] for 'integer' scoreboard {0000000008 00000008 top.decode info} inCredits: Got credits from dut: 1 {0000000008 00000008 top.decode info} Sending group: 0x00000000 UID(26) PID(0) add -{0000000009 00000009 top.execute.iq0 info} handleOperandIssueCheck_: Sending to issue queue uid:3DISPATCHED 0 pid:0 uopid:0 'add 8,6,7' -{0000000009 00000009 top.execute.iq0 info} handleOperandIssueCheck_: Instruction NOT ready: uid:6DISPATCHED 0 pid:0 uopid:0 'add 14,12,13' Bits needed:[13,36] rf: integer +{0000000009 00000009 top.execute.iq0 info} handleOperandIssueCheck_: Sending to issue queue uid:3 DISPATCHED 0 pid:0 uopid:0 'add 8,6,7' +{0000000009 00000009 top.execute.iq0 info} handleOperandIssueCheck_: Instruction NOT ready: uid:6 DISPATCHED 0 pid:0 uopid:0 'add 14,12,13' Bits needed:[13,36] rf: integer {0000000009 00000009 top.dispatch info} dispatchQueueAppended_: queue appended: 0x00000000 UID(16) PID(0) add -{0000000009 00000009 top.execute.exe0 info} completeInst_: Completing inst: uid:2 COMPLETED 0 pid:0 uopid:0 'add 6,4,5' -{0000000009 00000009 top.execute.iq0 info} sendReadyInsts_: Sending instruction uid:3DISPATCHED 0 pid:0 uopid:0 'add 8,6,7' to exe_pipe exe0 -{0000000009 00000009 top.execute.exe0 info} insertInst: Executing: uid:3 SCHEDULED 0 pid:0 uopid:0 'add 8,6,7' for 10 +{0000000009 00000009 top.execute.exe0 info} completeInst_: Completing inst: uid:2 COMPLETED 0 pid:0 uopid:0 'add 6,4,5' +{0000000009 00000009 top.execute.iq0 info} sendReadyInsts_: Sending instruction uid:3 DISPATCHED 0 pid:0 uopid:0 'add 8,6,7' to exe_pipe exe0 +{0000000009 00000009 top.execute.exe0 info} insertInst: Executing: uid:3 SCHEDULED 0 pid:0 uopid:0 'add 8,6,7' for 10 {0000000009 00000009 top.dispatch info} receiveCredits_: iq0 got 1 credits, total: 5 {0000000009 00000009 top.dispatch info} dispatchInstructions_: Num to dispatch: 3 -{0000000009 00000009 top.dispatch info} acceptInst: iq0: dispatching uid:7 RENAMED 0 pid:0 uopid:0 'add 16,14,15' -{0000000009 00000009 top.dispatch info} dispatchInstructions_: Sending instruction: uid:7DISPATCHED 0 pid:0 uopid:0 'add 16,14,15' to iq0 of target type: INT -{0000000009 00000009 top.dispatch info} dispatchInstructions_: Could not dispatch: uid:8 RENAMED 0 pid:0 uopid:0 'add 18,16,17' stall: INT_BUSY +{0000000009 00000009 top.dispatch info} acceptInst: iq0: dispatching uid:7 RENAMED 0 pid:0 uopid:0 'add 16,14,15' +{0000000009 00000009 top.dispatch info} dispatchInstructions_: Sending instruction: uid:7 DISPATCHED 0 pid:0 uopid:0 'add 16,14,15' to iq0 of target type: INT +{0000000009 00000009 top.dispatch info} dispatchInstructions_: Could not dispatch: uid:8 RENAMED 0 pid:0 uopid:0 'add 18,16,17' stall: INT_BUSY {0000000009 00000009 top.rename info} scheduleRenaming_: current stall: NOT_STALLED -{0000000009 00000009 top.rename info} renameInstructions_: sending inst to dispatch: uid:17 RENAMED 0 pid:0 uopid:0 'add 4,2,3' +{0000000009 00000009 top.rename info} renameInstructions_: sending inst to dispatch: uid:17 RENAMED 0 pid:0 uopid:0 'add 4,2,3' {0000000009 00000009 top.rename info} renameInstructions_: setup source register bit mask [46] for 'integer' scoreboard {0000000009 00000009 top.rename info} renameInstructions_: setup source register bit mask [3,46] for 'integer' scoreboard {0000000009 00000009 top.rename info} renameInstructions_: setup destination register bit mask [47] for 'integer' scoreboard {0000000009 00000009 top.decode info} inCredits: Got credits from dut: 1 {0000000009 00000009 top.decode info} Sending group: 0x00000000 UID(27) PID(0) add -{0000000010 00000010 top.execute.iq0 info} handleOperandIssueCheck_: Instruction NOT ready: uid:7DISPATCHED 0 pid:0 uopid:0 'add 16,14,15' Bits needed:[15,37] rf: integer +{0000000010 00000010 top.execute.iq0 info} handleOperandIssueCheck_: Instruction NOT ready: uid:7 DISPATCHED 0 pid:0 uopid:0 'add 16,14,15' Bits needed:[15,37] rf: integer {0000000010 00000010 top.dispatch info} dispatchQueueAppended_: queue appended: 0x00000000 UID(17) PID(0) add -{0000000010 00000010 top.execute.exe0 info} executeInst_: Executed inst: uid:3 SCHEDULED 0 pid:0 uopid:0 'add 8,6,7' +{0000000010 00000010 top.execute.exe0 info} executeInst_: Executed inst: uid:3 SCHEDULED 0 pid:0 uopid:0 'add 8,6,7' {0000000010 00000010 top.dispatch info} dispatchInstructions_: Num to dispatch: 2 -{0000000010 00000010 top.dispatch info} acceptInst: iq0: dispatching uid:8 RENAMED 0 pid:0 uopid:0 'add 18,16,17' -{0000000010 00000010 top.dispatch info} dispatchInstructions_: Sending instruction: uid:8DISPATCHED 0 pid:0 uopid:0 'add 18,16,17' to iq0 of target type: INT -{0000000010 00000010 top.dispatch info} dispatchInstructions_: Could not dispatch: uid:9 RENAMED 0 pid:0 uopid:0 'add 20,18,19' stall: INT_BUSY +{0000000010 00000010 top.dispatch info} acceptInst: iq0: dispatching uid:8 RENAMED 0 pid:0 uopid:0 'add 18,16,17' +{0000000010 00000010 top.dispatch info} dispatchInstructions_: Sending instruction: uid:8 DISPATCHED 0 pid:0 uopid:0 'add 18,16,17' to iq0 of target type: INT +{0000000010 00000010 top.dispatch info} dispatchInstructions_: Could not dispatch: uid:9 RENAMED 0 pid:0 uopid:0 'add 20,18,19' stall: INT_BUSY {0000000010 00000010 top.rename info} scheduleRenaming_: current stall: NOT_STALLED -{0000000010 00000010 top.rename info} renameInstructions_: sending inst to dispatch: uid:18 RENAMED 0 pid:0 uopid:0 'add 6,4,5' +{0000000010 00000010 top.rename info} renameInstructions_: sending inst to dispatch: uid:18 RENAMED 0 pid:0 uopid:0 'add 6,4,5' {0000000010 00000010 top.rename info} renameInstructions_: setup source register bit mask [47] for 'integer' scoreboard {0000000010 00000010 top.rename info} renameInstructions_: setup source register bit mask [5,47] for 'integer' scoreboard {0000000010 00000010 top.rename info} renameInstructions_: setup destination register bit mask [48] for 'integer' scoreboard {0000000010 00000010 top.decode info} inCredits: Got credits from dut: 1 {0000000010 00000010 top.decode info} Sending group: 0x00000000 UID(28) PID(0) add -{0000000011 00000011 top.execute.iq0 info} handleOperandIssueCheck_: Sending to issue queue uid:4DISPATCHED 0 pid:0 uopid:0 'add 10,8,9' -{0000000011 00000011 top.execute.iq0 info} handleOperandIssueCheck_: Instruction NOT ready: uid:8DISPATCHED 0 pid:0 uopid:0 'add 18,16,17' Bits needed:[17,38] rf: integer +{0000000011 00000011 top.execute.iq0 info} handleOperandIssueCheck_: Sending to issue queue uid:4 DISPATCHED 0 pid:0 uopid:0 'add 10,8,9' +{0000000011 00000011 top.execute.iq0 info} handleOperandIssueCheck_: Instruction NOT ready: uid:8 DISPATCHED 0 pid:0 uopid:0 'add 18,16,17' Bits needed:[17,38] rf: integer {0000000011 00000011 top.dispatch info} dispatchQueueAppended_: queue appended: 0x00000000 UID(18) PID(0) add -{0000000011 00000011 top.execute.exe0 info} completeInst_: Completing inst: uid:3 COMPLETED 0 pid:0 uopid:0 'add 8,6,7' -{0000000011 00000011 top.execute.iq0 info} sendReadyInsts_: Sending instruction uid:4DISPATCHED 0 pid:0 uopid:0 'add 10,8,9' to exe_pipe exe0 -{0000000011 00000011 top.execute.exe0 info} insertInst: Executing: uid:4 SCHEDULED 0 pid:0 uopid:0 'add 10,8,9' for 12 +{0000000011 00000011 top.execute.exe0 info} completeInst_: Completing inst: uid:3 COMPLETED 0 pid:0 uopid:0 'add 8,6,7' +{0000000011 00000011 top.execute.iq0 info} sendReadyInsts_: Sending instruction uid:4 DISPATCHED 0 pid:0 uopid:0 'add 10,8,9' to exe_pipe exe0 +{0000000011 00000011 top.execute.exe0 info} insertInst: Executing: uid:4 SCHEDULED 0 pid:0 uopid:0 'add 10,8,9' for 12 {0000000011 00000011 top.dispatch info} receiveCredits_: iq0 got 1 credits, total: 4 {0000000011 00000011 top.dispatch info} dispatchInstructions_: Num to dispatch: 1 -{0000000011 00000011 top.dispatch info} acceptInst: iq0: dispatching uid:9 RENAMED 0 pid:0 uopid:0 'add 20,18,19' -{0000000011 00000011 top.dispatch info} dispatchInstructions_: Sending instruction: uid:9DISPATCHED 0 pid:0 uopid:0 'add 20,18,19' to iq0 of target type: INT +{0000000011 00000011 top.dispatch info} acceptInst: iq0: dispatching uid:9 RENAMED 0 pid:0 uopid:0 'add 20,18,19' +{0000000011 00000011 top.dispatch info} dispatchInstructions_: Sending instruction: uid:9 DISPATCHED 0 pid:0 uopid:0 'add 20,18,19' to iq0 of target type: INT {0000000011 00000011 top.rename info} scheduleRenaming_: current stall: NOT_STALLED -{0000000011 00000011 top.rename info} renameInstructions_: sending inst to dispatch: uid:19 RENAMED 0 pid:0 uopid:0 'add 8,6,7' +{0000000011 00000011 top.rename info} renameInstructions_: sending inst to dispatch: uid:19 RENAMED 0 pid:0 uopid:0 'add 8,6,7' {0000000011 00000011 top.rename info} renameInstructions_: setup source register bit mask [48] for 'integer' scoreboard {0000000011 00000011 top.rename info} renameInstructions_: setup source register bit mask [7,48] for 'integer' scoreboard {0000000011 00000011 top.rename info} renameInstructions_: setup destination register bit mask [49] for 'integer' scoreboard {0000000011 00000011 top.decode info} inCredits: Got credits from dut: 1 {0000000011 00000011 top.decode info} Sending group: 0x00000000 UID(29) PID(0) add -{0000000012 00000012 top.execute.iq0 info} handleOperandIssueCheck_: Instruction NOT ready: uid:9DISPATCHED 0 pid:0 uopid:0 'add 20,18,19' Bits needed:[19,39] rf: integer +{0000000012 00000012 top.execute.iq0 info} handleOperandIssueCheck_: Instruction NOT ready: uid:9 DISPATCHED 0 pid:0 uopid:0 'add 20,18,19' Bits needed:[19,39] rf: integer {0000000012 00000012 top.dispatch info} dispatchQueueAppended_: queue appended: 0x00000000 UID(19) PID(0) add {0000000012 00000012 top.dispatch info} scheduleDispatchSession: no rob credits or no instructions to process -{0000000012 00000012 top.execute.exe0 info} executeInst_: Executed inst: uid:4 SCHEDULED 0 pid:0 uopid:0 'add 10,8,9' -{0000000013 00000013 top.execute.iq0 info} handleOperandIssueCheck_: Sending to issue queue uid:5DISPATCHED 0 pid:0 uopid:0 'add 12,10,11' -{0000000013 00000013 top.execute.exe0 info} completeInst_: Completing inst: uid:4 COMPLETED 0 pid:0 uopid:0 'add 10,8,9' -{0000000013 00000013 top.execute.iq0 info} sendReadyInsts_: Sending instruction uid:5DISPATCHED 0 pid:0 uopid:0 'add 12,10,11' to exe_pipe exe0 -{0000000013 00000013 top.execute.exe0 info} insertInst: Executing: uid:5 SCHEDULED 0 pid:0 uopid:0 'add 12,10,11' for 14 +{0000000012 00000012 top.execute.exe0 info} executeInst_: Executed inst: uid:4 SCHEDULED 0 pid:0 uopid:0 'add 10,8,9' +{0000000013 00000013 top.execute.iq0 info} handleOperandIssueCheck_: Sending to issue queue uid:5 DISPATCHED 0 pid:0 uopid:0 'add 12,10,11' +{0000000013 00000013 top.execute.exe0 info} completeInst_: Completing inst: uid:4 COMPLETED 0 pid:0 uopid:0 'add 10,8,9' +{0000000013 00000013 top.execute.iq0 info} sendReadyInsts_: Sending instruction uid:5 DISPATCHED 0 pid:0 uopid:0 'add 12,10,11' to exe_pipe exe0 +{0000000013 00000013 top.execute.exe0 info} insertInst: Executing: uid:5 SCHEDULED 0 pid:0 uopid:0 'add 12,10,11' for 14 {0000000013 00000013 top.dispatch info} receiveCredits_: iq0 got 1 credits, total: 4 {0000000013 00000013 top.dispatch info} scheduleDispatchSession: no rob credits or no instructions to process -{0000000014 00000014 top.execute.exe0 info} executeInst_: Executed inst: uid:5 SCHEDULED 0 pid:0 uopid:0 'add 12,10,11' -{0000000015 00000015 top.execute.iq0 info} handleOperandIssueCheck_: Sending to issue queue uid:6DISPATCHED 0 pid:0 uopid:0 'add 14,12,13' -{0000000015 00000015 top.execute.exe0 info} completeInst_: Completing inst: uid:5 COMPLETED 0 pid:0 uopid:0 'add 12,10,11' -{0000000015 00000015 top.execute.iq0 info} sendReadyInsts_: Sending instruction uid:6DISPATCHED 0 pid:0 uopid:0 'add 14,12,13' to exe_pipe exe0 -{0000000015 00000015 top.execute.exe0 info} insertInst: Executing: uid:6 SCHEDULED 0 pid:0 uopid:0 'add 14,12,13' for 16 +{0000000014 00000014 top.execute.exe0 info} executeInst_: Executed inst: uid:5 SCHEDULED 0 pid:0 uopid:0 'add 12,10,11' +{0000000015 00000015 top.execute.iq0 info} handleOperandIssueCheck_: Sending to issue queue uid:6 DISPATCHED 0 pid:0 uopid:0 'add 14,12,13' +{0000000015 00000015 top.execute.exe0 info} completeInst_: Completing inst: uid:5 COMPLETED 0 pid:0 uopid:0 'add 12,10,11' +{0000000015 00000015 top.execute.iq0 info} sendReadyInsts_: Sending instruction uid:6 DISPATCHED 0 pid:0 uopid:0 'add 14,12,13' to exe_pipe exe0 +{0000000015 00000015 top.execute.exe0 info} insertInst: Executing: uid:6 SCHEDULED 0 pid:0 uopid:0 'add 14,12,13' for 16 {0000000015 00000015 top.dispatch info} receiveCredits_: iq0 got 1 credits, total: 5 {0000000015 00000015 top.dispatch info} scheduleDispatchSession: no rob credits or no instructions to process -{0000000016 00000016 top.execute.exe0 info} executeInst_: Executed inst: uid:6 SCHEDULED 0 pid:0 uopid:0 'add 14,12,13' -{0000000017 00000017 top.execute.iq0 info} handleOperandIssueCheck_: Sending to issue queue uid:7DISPATCHED 0 pid:0 uopid:0 'add 16,14,15' -{0000000017 00000017 top.execute.exe0 info} completeInst_: Completing inst: uid:6 COMPLETED 0 pid:0 uopid:0 'add 14,12,13' -{0000000017 00000017 top.execute.iq0 info} sendReadyInsts_: Sending instruction uid:7DISPATCHED 0 pid:0 uopid:0 'add 16,14,15' to exe_pipe exe0 -{0000000017 00000017 top.execute.exe0 info} insertInst: Executing: uid:7 SCHEDULED 0 pid:0 uopid:0 'add 16,14,15' for 18 +{0000000016 00000016 top.execute.exe0 info} executeInst_: Executed inst: uid:6 SCHEDULED 0 pid:0 uopid:0 'add 14,12,13' +{0000000017 00000017 top.execute.iq0 info} handleOperandIssueCheck_: Sending to issue queue uid:7 DISPATCHED 0 pid:0 uopid:0 'add 16,14,15' +{0000000017 00000017 top.execute.exe0 info} completeInst_: Completing inst: uid:6 COMPLETED 0 pid:0 uopid:0 'add 14,12,13' +{0000000017 00000017 top.execute.iq0 info} sendReadyInsts_: Sending instruction uid:7 DISPATCHED 0 pid:0 uopid:0 'add 16,14,15' to exe_pipe exe0 +{0000000017 00000017 top.execute.exe0 info} insertInst: Executing: uid:7 SCHEDULED 0 pid:0 uopid:0 'add 16,14,15' for 18 {0000000017 00000017 top.dispatch info} receiveCredits_: iq0 got 1 credits, total: 6 {0000000017 00000017 top.dispatch info} scheduleDispatchSession: no rob credits or no instructions to process -{0000000018 00000018 top.execute.exe0 info} executeInst_: Executed inst: uid:7 SCHEDULED 0 pid:0 uopid:0 'add 16,14,15' -{0000000019 00000019 top.execute.iq0 info} handleOperandIssueCheck_: Sending to issue queue uid:8DISPATCHED 0 pid:0 uopid:0 'add 18,16,17' -{0000000019 00000019 top.execute.exe0 info} completeInst_: Completing inst: uid:7 COMPLETED 0 pid:0 uopid:0 'add 16,14,15' -{0000000019 00000019 top.execute.iq0 info} sendReadyInsts_: Sending instruction uid:8DISPATCHED 0 pid:0 uopid:0 'add 18,16,17' to exe_pipe exe0 -{0000000019 00000019 top.execute.exe0 info} insertInst: Executing: uid:8 SCHEDULED 0 pid:0 uopid:0 'add 18,16,17' for 20 +{0000000018 00000018 top.execute.exe0 info} executeInst_: Executed inst: uid:7 SCHEDULED 0 pid:0 uopid:0 'add 16,14,15' +{0000000019 00000019 top.execute.iq0 info} handleOperandIssueCheck_: Sending to issue queue uid:8 DISPATCHED 0 pid:0 uopid:0 'add 18,16,17' +{0000000019 00000019 top.execute.exe0 info} completeInst_: Completing inst: uid:7 COMPLETED 0 pid:0 uopid:0 'add 16,14,15' +{0000000019 00000019 top.execute.iq0 info} sendReadyInsts_: Sending instruction uid:8 DISPATCHED 0 pid:0 uopid:0 'add 18,16,17' to exe_pipe exe0 +{0000000019 00000019 top.execute.exe0 info} insertInst: Executing: uid:8 SCHEDULED 0 pid:0 uopid:0 'add 18,16,17' for 20 {0000000019 00000019 top.dispatch info} receiveCredits_: iq0 got 1 credits, total: 7 {0000000019 00000019 top.dispatch info} scheduleDispatchSession: no rob credits or no instructions to process -{0000000020 00000020 top.execute.exe0 info} executeInst_: Executed inst: uid:8 SCHEDULED 0 pid:0 uopid:0 'add 18,16,17' -{0000000021 00000021 top.execute.iq0 info} handleOperandIssueCheck_: Sending to issue queue uid:9DISPATCHED 0 pid:0 uopid:0 'add 20,18,19' -{0000000021 00000021 top.execute.exe0 info} completeInst_: Completing inst: uid:8 COMPLETED 0 pid:0 uopid:0 'add 18,16,17' -{0000000021 00000021 top.execute.iq0 info} sendReadyInsts_: Sending instruction uid:9DISPATCHED 0 pid:0 uopid:0 'add 20,18,19' to exe_pipe exe0 -{0000000021 00000021 top.execute.exe0 info} insertInst: Executing: uid:9 SCHEDULED 0 pid:0 uopid:0 'add 20,18,19' for 22 +{0000000020 00000020 top.execute.exe0 info} executeInst_: Executed inst: uid:8 SCHEDULED 0 pid:0 uopid:0 'add 18,16,17' +{0000000021 00000021 top.execute.iq0 info} handleOperandIssueCheck_: Sending to issue queue uid:9 DISPATCHED 0 pid:0 uopid:0 'add 20,18,19' +{0000000021 00000021 top.execute.exe0 info} completeInst_: Completing inst: uid:8 COMPLETED 0 pid:0 uopid:0 'add 18,16,17' +{0000000021 00000021 top.execute.iq0 info} sendReadyInsts_: Sending instruction uid:9 DISPATCHED 0 pid:0 uopid:0 'add 20,18,19' to exe_pipe exe0 +{0000000021 00000021 top.execute.exe0 info} insertInst: Executing: uid:9 SCHEDULED 0 pid:0 uopid:0 'add 20,18,19' for 22 {0000000021 00000021 top.dispatch info} receiveCredits_: iq0 got 1 credits, total: 8 {0000000021 00000021 top.dispatch info} scheduleDispatchSession: no rob credits or no instructions to process -{0000000022 00000022 top.execute.exe0 info} executeInst_: Executed inst: uid:9 SCHEDULED 0 pid:0 uopid:0 'add 20,18,19' -{0000000023 00000023 top.execute.exe0 info} completeInst_: Completing inst: uid:9 COMPLETED 0 pid:0 uopid:0 'add 20,18,19' +{0000000022 00000022 top.execute.exe0 info} executeInst_: Executed inst: uid:9 SCHEDULED 0 pid:0 uopid:0 'add 20,18,19' +{0000000023 00000023 top.execute.exe0 info} completeInst_: Completing inst: uid:9 COMPLETED 0 pid:0 uopid:0 'add 20,18,19' diff --git a/test/core/l2cache/expected_output/hit_case.out.EXPECTED b/test/core/l2cache/expected_output/hit_case.out.EXPECTED index 94443f92..9d54cecf 100644 --- a/test/core/l2cache/expected_output/hit_case.out.EXPECTED +++ b/test/core/l2cache/expected_output/hit_case.out.EXPECTED @@ -3,43 +3,43 @@ #Exe: #SimulatorVersion: #Repro: -#Start: Tuesday Tue Oct 8 16:48:48 2024 -#Elapsed: 0.00378s +#Start: Saturday Sat Oct 19 15:35:23 2024 +#Elapsed: 0.002228s {0000000000 00000000 top.l2cache info} L2Cache: L2Cache construct: #4294967295 {0000000000 00000000 top.l2cache info} sendInitialCredits_: Sending initial credits to ICache : 8 {0000000000 00000000 top.l2cache info} sendInitialCredits_: Sending initial credits to DCache : 8 {0000000000 00000000 top.biu info} sendInitialCredits_: Sending initial credits to L2Cache : 32 -{0000000000 00000000 top.icache info} ReceiveAck_: Ack: '8' Received -{0000000000 00000000 top.dcache info} ReceiveAck_: Ack: '8' Received -{0000000000 00000000 top.dcache info} req_inst_: Instruction: 'uid:0 FETCHED 0 pid:1 uopid:0 'sw 3' ' Requested -{0000000000 00000000 top.icache info} req_inst_: Instruction: 'uid:0 FETCHED 0 pid:1 uopid:0 'sw 3' ' Requested -{0000000001 00000001 top.l2cache info} getAckFromBIU_: Ack received from BIU on the port : Current BIU credit available = 32 +{0000000000 00000000 top.icache info} ReceiveCredits_: Ack: '8' Received +{0000000000 00000000 top.dcache info} ReceiveCredits_: Ack: '8' Received +{0000000000 00000000 top.dcache info} req_inst_: Instruction: 'uid:0 BEFORE_FETCH 0 pid:1 uopid:0 'sw 3' ' Requested +{0000000000 00000000 top.icache info} req_inst_: Instruction: 'uid:0 BEFORE_FETCH 0 pid:1 uopid:0 'sw 3' ' Requested +{0000000001 00000001 top.l2cache info} getCreditsFromBIU_: Credits received from BIU on the port : Current BIU credit available = 32 {0000000001 00000001 top.l2cache info} getReqFromDCache_: Request received from DCache on the port {0000000001 00000001 top.l2cache info} appendDCacheReqQueue_: Append DCache->L2Cache request queue! {0000000001 00000001 top.l2cache info} getReqFromICache_: Request received from ICache on the port {0000000001 00000001 top.l2cache info} appendICacheReqQueue_: Append ICache->L2Cache request queue! {0000000001 00000001 top.l2cache info} arbitrateL2CacheAccessReqs_: Arbitration winner - ICache {0000000001 00000001 top.l2cache info} create_Req_: ICache request is sent to Pipeline_req_Q! -{0000000002 00000002 top.icache info} ReceiveAck_: Ack: '8' Received -{0000000002 00000002 top.l2cache info} handle_L2Cache_ICache_Ack_: L2Cache->ICache : Ack is sent. +{0000000001 00000001 top.l2cache info} create_Req_: L2Cache->ICache : Credit is sent. +{0000000002 00000002 top.icache info} ReceiveCredits_: Ack: '1' Received {0000000002 00000002 top.l2cache info} issue_Req_: Request is sent to Pipeline! SrcUnit : ICACHE {0000000002 00000002 top.l2cache info} arbitrateL2CacheAccessReqs_: Arbitration winner - DCache {0000000002 00000002 top.l2cache info} create_Req_: DCache request is sent to Pipeline_req_Q! -{0000000003 00000003 top.dcache info} ReceiveAck_: Ack: '8' Received -{0000000003 00000003 top.l2cache info} handle_L2Cache_DCache_Ack_: L2Cache->DCache : Ack is sent. +{0000000002 00000002 top.l2cache info} create_Req_: L2Cache->DCache : Credit is sent. +{0000000003 00000003 top.dcache info} ReceiveCredits_: Ack: '1' Received {0000000003 00000003 top.l2cache info} issue_Req_: Request is sent to Pipeline! SrcUnit : DCACHE -{0000000011 00000011 top.l2cache info} handleCacheAccessRequest_: Pipeline stage CACHE_LOOKUP : memptr: uid:0 FETCHED 0 pid:1 uopid:0 'sw 3' +{0000000011 00000011 top.l2cache info} handleCacheAccessRequest_: Pipeline stage CACHE_LOOKUP : memptr: deadbeef uid:0 BEFORE_FETCH 0 pid:1 uopid:0 'sw 3' {0000000011 00000011 top.l2cache info} cacheLookup_: Cache MISS: phyAddr=0xdeadbeef -{0000000012 00000012 top.l2cache info} handleCacheAccessRequest_: Pipeline stage CACHE_LOOKUP : memptr: uid:0 FETCHED 0 pid:1 uopid:0 'sw 3' +{0000000012 00000012 top.l2cache info} handleCacheAccessRequest_: Pipeline stage CACHE_LOOKUP : memptr: deadbeef uid:0 BEFORE_FETCH 0 pid:1 uopid:0 'sw 3' {0000000012 00000012 top.l2cache info} cacheLookup_: Cache MISS: phyAddr=0xdeadbeef -{0000000012 00000012 top.l2cache info} handleCacheAccessResult_: Pipeline stage HIT_MISS_HANDLING : memptr: uid:0 FETCHED 0 pid:1 uopid:0 'sw 3' +{0000000012 00000012 top.l2cache info} handleCacheAccessResult_: Pipeline stage HIT_MISS_HANDLING : memptr: deadbeef uid:0 BEFORE_FETCH 0 pid:1 uopid:0 'sw 3' {0000000012 00000012 top.l2cache info} handleCacheAccessResult_: Storing the CACHE MISS in miss_pending_buffer_ {0000000012 00000012 top.l2cache info} appendBIUReqQueue_: Append L2Cache->BIU req queue {0000000012 00000012 top.l2cache info} handle_L2Cache_BIU_Req_: L2Cache Request sent to BIU : Current BIU credit available = 31 -{0000000013 00000013 top.biu info} sinkInst_: Instruction: 'uid:0 FETCHED 0 pid:1 uopid:0 'sw 3' ' sinked -{0000000013 00000013 top.l2cache info} handleCacheAccessResult_: Pipeline stage HIT_MISS_HANDLING : memptr: uid:0 FETCHED 0 pid:1 uopid:0 'sw 3' +{0000000013 00000013 top.biu info} sinkInst_: Instruction: 'uid:0 BEFORE_FETCH 0 pid:1 uopid:0 'sw 3' ' sinked +{0000000013 00000013 top.l2cache info} handleCacheAccessResult_: Pipeline stage HIT_MISS_HANDLING : memptr: deadbeef uid:0 BEFORE_FETCH 0 pid:1 uopid:0 'sw 3' {0000000013 00000013 top.l2cache info} handleCacheAccessResult_: Storing the CACHE MISS in miss_pending_buffer_ -{0000000024 00000024 top.l2cache info} getAckFromBIU_: Ack received from BIU on the port : Current BIU credit available = 32 +{0000000024 00000024 top.l2cache info} getCreditsFromBIU_: Credits received from BIU on the port : Current BIU credit available = 32 {0000000034 00000034 top.l2cache info} getRespFromBIU_: Response received from BIU on the port {0000000034 00000034 top.l2cache info} appendBIURespQueue_: Append BIU->L2Cache resp queue! {0000000034 00000034 top.l2cache info} arbitrateL2CacheAccessReqs_: Arbitration winner - BIU @@ -48,44 +48,44 @@ {0000000035 00000035 top.l2cache info} arbitrateL2CacheAccessReqs_: Arbitration winner - BIU {0000000035 00000035 top.l2cache info} create_Req_: Request found in miss_pending_buffer_ with SrcUnit : DCACHE {0000000036 00000036 top.l2cache info} issue_Req_: Request is sent to Pipeline! SrcUnit : BIU -{0000000044 00000044 top.l2cache info} handleCacheAccessRequest_: Pipeline stage CACHE_LOOKUP : memptr: uid:0 FETCHED 0 pid:1 uopid:0 'sw 3' +{0000000044 00000044 top.l2cache info} handleCacheAccessRequest_: Pipeline stage CACHE_LOOKUP : memptr: deadbeef uid:0 BEFORE_FETCH 0 pid:1 uopid:0 'sw 3' {0000000044 00000044 top.l2cache info} cacheLookup_: Cache MISS: phyAddr=0xdeadbeef {0000000044 00000044 top.l2cache info} handleCacheAccessRequest_: Reload Complete: phyAddr=0xdeadbeef -{0000000045 00000045 top.l2cache info} handleCacheAccessRequest_: Pipeline stage CACHE_LOOKUP : memptr: uid:0 FETCHED 0 pid:1 uopid:0 'sw 3' +{0000000045 00000045 top.l2cache info} handleCacheAccessRequest_: Pipeline stage CACHE_LOOKUP : memptr: deadbeef uid:0 BEFORE_FETCH 0 pid:1 uopid:0 'sw 3' {0000000045 00000045 top.l2cache info} cacheLookup_: Cache HIT: phyAddr=0xdeadbeef -{0000000045 00000045 top.l2cache info} handleCacheAccessResult_: Pipeline stage HIT_MISS_HANDLING : memptr: uid:0 FETCHED 0 pid:1 uopid:0 'sw 3' +{0000000045 00000045 top.l2cache info} handleCacheAccessResult_: Pipeline stage HIT_MISS_HANDLING : memptr: deadbeef uid:0 BEFORE_FETCH 0 pid:1 uopid:0 'sw 3' {0000000045 00000045 top.l2cache info} appendICacheRespQueue_: Append L2Cache->ICache resp queue! {0000000045 00000045 top.l2cache info} handle_L2Cache_ICache_Resp_: L2Cache Resp is sent to ICache! -{0000000046 00000046 top.icache info} ReceiveInst_: Instruction: 'uid:0 FETCHED 0 pid:1 uopid:0 'sw 3' ' Received -{0000000046 00000046 top.l2cache info} handleCacheAccessResult_: Pipeline stage HIT_MISS_HANDLING : memptr: uid:0 FETCHED 0 pid:1 uopid:0 'sw 3' +{0000000046 00000046 top.icache info} ReceiveInst_: Instruction: 'uid:0 BEFORE_FETCH 0 pid:1 uopid:0 'sw 3' ' Received +{0000000046 00000046 top.l2cache info} handleCacheAccessResult_: Pipeline stage HIT_MISS_HANDLING : memptr: deadbeef uid:0 BEFORE_FETCH 0 pid:1 uopid:0 'sw 3' {0000000046 00000046 top.l2cache info} appendDCacheRespQueue_: Append L2Cache->DCache resp queue! {0000000046 00000046 top.l2cache info} handle_L2Cache_DCache_Resp_: L2Cache Resp is sent to DCache! -{0000000047 00000047 top.dcache info} ReceiveInst_: Instruction: 'uid:0 FETCHED 0 pid:1 uopid:0 'sw 3' ' Received -{0000000050 00000050 top.dcache info} req_inst_: Instruction: 'uid:1 FETCHED 0 pid:2 uopid:0 'lw 5,3,4' ' Requested -{0000000050 00000050 top.icache info} req_inst_: Instruction: 'uid:1 FETCHED 0 pid:2 uopid:0 'lw 5,3,4' ' Requested +{0000000047 00000047 top.dcache info} ReceiveInst_: Instruction: 'uid:0 BEFORE_FETCH 0 pid:1 uopid:0 'sw 3' ' Received +{0000000050 00000050 top.dcache info} req_inst_: Instruction: 'uid:1 BEFORE_FETCH 0 pid:2 uopid:0 'lw 5,3,4' ' Requested +{0000000050 00000050 top.icache info} req_inst_: Instruction: 'uid:1 BEFORE_FETCH 0 pid:2 uopid:0 'lw 5,3,4' ' Requested {0000000051 00000051 top.l2cache info} getReqFromDCache_: Request received from DCache on the port {0000000051 00000051 top.l2cache info} appendDCacheReqQueue_: Append DCache->L2Cache request queue! {0000000051 00000051 top.l2cache info} getReqFromICache_: Request received from ICache on the port {0000000051 00000051 top.l2cache info} appendICacheReqQueue_: Append ICache->L2Cache request queue! {0000000051 00000051 top.l2cache info} arbitrateL2CacheAccessReqs_: Arbitration winner - ICache {0000000051 00000051 top.l2cache info} create_Req_: ICache request is sent to Pipeline_req_Q! -{0000000052 00000052 top.icache info} ReceiveAck_: Ack: '8' Received -{0000000052 00000052 top.l2cache info} handle_L2Cache_ICache_Ack_: L2Cache->ICache : Ack is sent. +{0000000051 00000051 top.l2cache info} create_Req_: L2Cache->ICache : Credit is sent. +{0000000052 00000052 top.icache info} ReceiveCredits_: Ack: '1' Received {0000000052 00000052 top.l2cache info} issue_Req_: Request is sent to Pipeline! SrcUnit : ICACHE {0000000052 00000052 top.l2cache info} arbitrateL2CacheAccessReqs_: Arbitration winner - DCache {0000000052 00000052 top.l2cache info} create_Req_: DCache request is sent to Pipeline_req_Q! -{0000000053 00000053 top.dcache info} ReceiveAck_: Ack: '8' Received -{0000000053 00000053 top.l2cache info} handle_L2Cache_DCache_Ack_: L2Cache->DCache : Ack is sent. +{0000000052 00000052 top.l2cache info} create_Req_: L2Cache->DCache : Credit is sent. +{0000000053 00000053 top.dcache info} ReceiveCredits_: Ack: '1' Received {0000000053 00000053 top.l2cache info} issue_Req_: Request is sent to Pipeline! SrcUnit : DCACHE -{0000000061 00000061 top.l2cache info} handleCacheAccessRequest_: Pipeline stage CACHE_LOOKUP : memptr: uid:1 FETCHED 0 pid:2 uopid:0 'lw 5,3,4' +{0000000061 00000061 top.l2cache info} handleCacheAccessRequest_: Pipeline stage CACHE_LOOKUP : memptr: deadbeef uid:1 BEFORE_FETCH 0 pid:2 uopid:0 'lw 5,3,4' {0000000061 00000061 top.l2cache info} cacheLookup_: Cache HIT: phyAddr=0xdeadbeef -{0000000062 00000062 top.l2cache info} handleCacheAccessRequest_: Pipeline stage CACHE_LOOKUP : memptr: uid:1 FETCHED 0 pid:2 uopid:0 'lw 5,3,4' +{0000000062 00000062 top.l2cache info} handleCacheAccessRequest_: Pipeline stage CACHE_LOOKUP : memptr: deadbeef uid:1 BEFORE_FETCH 0 pid:2 uopid:0 'lw 5,3,4' {0000000062 00000062 top.l2cache info} cacheLookup_: Cache HIT: phyAddr=0xdeadbeef -{0000000062 00000062 top.l2cache info} handleCacheAccessResult_: Pipeline stage HIT_MISS_HANDLING : memptr: uid:1 FETCHED 0 pid:2 uopid:0 'lw 5,3,4' +{0000000062 00000062 top.l2cache info} handleCacheAccessResult_: Pipeline stage HIT_MISS_HANDLING : memptr: deadbeef uid:1 BEFORE_FETCH 0 pid:2 uopid:0 'lw 5,3,4' {0000000062 00000062 top.l2cache info} appendICacheRespQueue_: Append L2Cache->ICache resp queue! {0000000062 00000062 top.l2cache info} handle_L2Cache_ICache_Resp_: L2Cache Resp is sent to ICache! -{0000000063 00000063 top.icache info} ReceiveInst_: Instruction: 'uid:1 FETCHED 0 pid:2 uopid:0 'lw 5,3,4' ' Received -{0000000063 00000063 top.l2cache info} handleCacheAccessResult_: Pipeline stage HIT_MISS_HANDLING : memptr: uid:1 FETCHED 0 pid:2 uopid:0 'lw 5,3,4' +{0000000063 00000063 top.icache info} ReceiveInst_: Instruction: 'uid:1 BEFORE_FETCH 0 pid:2 uopid:0 'lw 5,3,4' ' Received +{0000000063 00000063 top.l2cache info} handleCacheAccessResult_: Pipeline stage HIT_MISS_HANDLING : memptr: deadbeef uid:1 BEFORE_FETCH 0 pid:2 uopid:0 'lw 5,3,4' {0000000063 00000063 top.l2cache info} appendDCacheRespQueue_: Append L2Cache->DCache resp queue! {0000000063 00000063 top.l2cache info} handle_L2Cache_DCache_Resp_: L2Cache Resp is sent to DCache! -{0000000064 00000064 top.dcache info} ReceiveInst_: Instruction: 'uid:1 FETCHED 0 pid:2 uopid:0 'lw 5,3,4' ' Received +{0000000064 00000064 top.dcache info} ReceiveInst_: Instruction: 'uid:1 BEFORE_FETCH 0 pid:2 uopid:0 'lw 5,3,4' ' Received diff --git a/test/core/l2cache/expected_output/single_access.out.EXPECTED b/test/core/l2cache/expected_output/single_access.out.EXPECTED index 9aa80273..0305e07a 100644 --- a/test/core/l2cache/expected_output/single_access.out.EXPECTED +++ b/test/core/l2cache/expected_output/single_access.out.EXPECTED @@ -3,43 +3,43 @@ #Exe: #SimulatorVersion: #Repro: -#Start: Tuesday Tue Oct 8 16:48:48 2024 -#Elapsed: 0.00446s +#Start: Saturday Sat Oct 19 15:35:23 2024 +#Elapsed: 0.00223s {0000000000 00000000 top.l2cache info} L2Cache: L2Cache construct: #4294967295 {0000000000 00000000 top.l2cache info} sendInitialCredits_: Sending initial credits to ICache : 8 {0000000000 00000000 top.l2cache info} sendInitialCredits_: Sending initial credits to DCache : 8 {0000000000 00000000 top.biu info} sendInitialCredits_: Sending initial credits to L2Cache : 32 -{0000000000 00000000 top.icache info} ReceiveAck_: Ack: '8' Received -{0000000000 00000000 top.dcache info} ReceiveAck_: Ack: '8' Received -{0000000000 00000000 top.dcache info} req_inst_: Instruction: 'uid:0 FETCHED 0 pid:1 uopid:0 'sw 3' ' Requested -{0000000000 00000000 top.icache info} req_inst_: Instruction: 'uid:0 FETCHED 0 pid:1 uopid:0 'sw 3' ' Requested -{0000000001 00000001 top.l2cache info} getAckFromBIU_: Ack received from BIU on the port : Current BIU credit available = 32 +{0000000000 00000000 top.icache info} ReceiveCredits_: Ack: '8' Received +{0000000000 00000000 top.dcache info} ReceiveCredits_: Ack: '8' Received +{0000000000 00000000 top.dcache info} req_inst_: Instruction: 'uid:0 BEFORE_FETCH 0 pid:1 uopid:0 'sw 3' ' Requested +{0000000000 00000000 top.icache info} req_inst_: Instruction: 'uid:0 BEFORE_FETCH 0 pid:1 uopid:0 'sw 3' ' Requested +{0000000001 00000001 top.l2cache info} getCreditsFromBIU_: Credits received from BIU on the port : Current BIU credit available = 32 {0000000001 00000001 top.l2cache info} getReqFromDCache_: Request received from DCache on the port {0000000001 00000001 top.l2cache info} appendDCacheReqQueue_: Append DCache->L2Cache request queue! {0000000001 00000001 top.l2cache info} getReqFromICache_: Request received from ICache on the port {0000000001 00000001 top.l2cache info} appendICacheReqQueue_: Append ICache->L2Cache request queue! {0000000001 00000001 top.l2cache info} arbitrateL2CacheAccessReqs_: Arbitration winner - ICache {0000000001 00000001 top.l2cache info} create_Req_: ICache request is sent to Pipeline_req_Q! -{0000000002 00000002 top.icache info} ReceiveAck_: Ack: '8' Received -{0000000002 00000002 top.l2cache info} handle_L2Cache_ICache_Ack_: L2Cache->ICache : Ack is sent. +{0000000001 00000001 top.l2cache info} create_Req_: L2Cache->ICache : Credit is sent. +{0000000002 00000002 top.icache info} ReceiveCredits_: Ack: '1' Received {0000000002 00000002 top.l2cache info} issue_Req_: Request is sent to Pipeline! SrcUnit : ICACHE {0000000002 00000002 top.l2cache info} arbitrateL2CacheAccessReqs_: Arbitration winner - DCache {0000000002 00000002 top.l2cache info} create_Req_: DCache request is sent to Pipeline_req_Q! -{0000000003 00000003 top.dcache info} ReceiveAck_: Ack: '8' Received -{0000000003 00000003 top.l2cache info} handle_L2Cache_DCache_Ack_: L2Cache->DCache : Ack is sent. +{0000000002 00000002 top.l2cache info} create_Req_: L2Cache->DCache : Credit is sent. +{0000000003 00000003 top.dcache info} ReceiveCredits_: Ack: '1' Received {0000000003 00000003 top.l2cache info} issue_Req_: Request is sent to Pipeline! SrcUnit : DCACHE -{0000000011 00000011 top.l2cache info} handleCacheAccessRequest_: Pipeline stage CACHE_LOOKUP : memptr: uid:0 FETCHED 0 pid:1 uopid:0 'sw 3' +{0000000011 00000011 top.l2cache info} handleCacheAccessRequest_: Pipeline stage CACHE_LOOKUP : memptr: deadbeef uid:0 BEFORE_FETCH 0 pid:1 uopid:0 'sw 3' {0000000011 00000011 top.l2cache info} cacheLookup_: Cache MISS: phyAddr=0xdeadbeef -{0000000012 00000012 top.l2cache info} handleCacheAccessRequest_: Pipeline stage CACHE_LOOKUP : memptr: uid:0 FETCHED 0 pid:1 uopid:0 'sw 3' +{0000000012 00000012 top.l2cache info} handleCacheAccessRequest_: Pipeline stage CACHE_LOOKUP : memptr: deadbeef uid:0 BEFORE_FETCH 0 pid:1 uopid:0 'sw 3' {0000000012 00000012 top.l2cache info} cacheLookup_: Cache MISS: phyAddr=0xdeadbeef -{0000000012 00000012 top.l2cache info} handleCacheAccessResult_: Pipeline stage HIT_MISS_HANDLING : memptr: uid:0 FETCHED 0 pid:1 uopid:0 'sw 3' +{0000000012 00000012 top.l2cache info} handleCacheAccessResult_: Pipeline stage HIT_MISS_HANDLING : memptr: deadbeef uid:0 BEFORE_FETCH 0 pid:1 uopid:0 'sw 3' {0000000012 00000012 top.l2cache info} handleCacheAccessResult_: Storing the CACHE MISS in miss_pending_buffer_ {0000000012 00000012 top.l2cache info} appendBIUReqQueue_: Append L2Cache->BIU req queue {0000000012 00000012 top.l2cache info} handle_L2Cache_BIU_Req_: L2Cache Request sent to BIU : Current BIU credit available = 31 -{0000000013 00000013 top.biu info} sinkInst_: Instruction: 'uid:0 FETCHED 0 pid:1 uopid:0 'sw 3' ' sinked -{0000000013 00000013 top.l2cache info} handleCacheAccessResult_: Pipeline stage HIT_MISS_HANDLING : memptr: uid:0 FETCHED 0 pid:1 uopid:0 'sw 3' +{0000000013 00000013 top.biu info} sinkInst_: Instruction: 'uid:0 BEFORE_FETCH 0 pid:1 uopid:0 'sw 3' ' sinked +{0000000013 00000013 top.l2cache info} handleCacheAccessResult_: Pipeline stage HIT_MISS_HANDLING : memptr: deadbeef uid:0 BEFORE_FETCH 0 pid:1 uopid:0 'sw 3' {0000000013 00000013 top.l2cache info} handleCacheAccessResult_: Storing the CACHE MISS in miss_pending_buffer_ -{0000000024 00000024 top.l2cache info} getAckFromBIU_: Ack received from BIU on the port : Current BIU credit available = 32 +{0000000024 00000024 top.l2cache info} getCreditsFromBIU_: Credits received from BIU on the port : Current BIU credit available = 32 {0000000034 00000034 top.l2cache info} getRespFromBIU_: Response received from BIU on the port {0000000034 00000034 top.l2cache info} appendBIURespQueue_: Append BIU->L2Cache resp queue! {0000000034 00000034 top.l2cache info} arbitrateL2CacheAccessReqs_: Arbitration winner - BIU @@ -48,16 +48,16 @@ {0000000035 00000035 top.l2cache info} arbitrateL2CacheAccessReqs_: Arbitration winner - BIU {0000000035 00000035 top.l2cache info} create_Req_: Request found in miss_pending_buffer_ with SrcUnit : DCACHE {0000000036 00000036 top.l2cache info} issue_Req_: Request is sent to Pipeline! SrcUnit : BIU -{0000000044 00000044 top.l2cache info} handleCacheAccessRequest_: Pipeline stage CACHE_LOOKUP : memptr: uid:0 FETCHED 0 pid:1 uopid:0 'sw 3' +{0000000044 00000044 top.l2cache info} handleCacheAccessRequest_: Pipeline stage CACHE_LOOKUP : memptr: deadbeef uid:0 BEFORE_FETCH 0 pid:1 uopid:0 'sw 3' {0000000044 00000044 top.l2cache info} cacheLookup_: Cache MISS: phyAddr=0xdeadbeef {0000000044 00000044 top.l2cache info} handleCacheAccessRequest_: Reload Complete: phyAddr=0xdeadbeef -{0000000045 00000045 top.l2cache info} handleCacheAccessRequest_: Pipeline stage CACHE_LOOKUP : memptr: uid:0 FETCHED 0 pid:1 uopid:0 'sw 3' +{0000000045 00000045 top.l2cache info} handleCacheAccessRequest_: Pipeline stage CACHE_LOOKUP : memptr: deadbeef uid:0 BEFORE_FETCH 0 pid:1 uopid:0 'sw 3' {0000000045 00000045 top.l2cache info} cacheLookup_: Cache HIT: phyAddr=0xdeadbeef -{0000000045 00000045 top.l2cache info} handleCacheAccessResult_: Pipeline stage HIT_MISS_HANDLING : memptr: uid:0 FETCHED 0 pid:1 uopid:0 'sw 3' +{0000000045 00000045 top.l2cache info} handleCacheAccessResult_: Pipeline stage HIT_MISS_HANDLING : memptr: deadbeef uid:0 BEFORE_FETCH 0 pid:1 uopid:0 'sw 3' {0000000045 00000045 top.l2cache info} appendICacheRespQueue_: Append L2Cache->ICache resp queue! {0000000045 00000045 top.l2cache info} handle_L2Cache_ICache_Resp_: L2Cache Resp is sent to ICache! -{0000000046 00000046 top.icache info} ReceiveInst_: Instruction: 'uid:0 FETCHED 0 pid:1 uopid:0 'sw 3' ' Received -{0000000046 00000046 top.l2cache info} handleCacheAccessResult_: Pipeline stage HIT_MISS_HANDLING : memptr: uid:0 FETCHED 0 pid:1 uopid:0 'sw 3' +{0000000046 00000046 top.icache info} ReceiveInst_: Instruction: 'uid:0 BEFORE_FETCH 0 pid:1 uopid:0 'sw 3' ' Received +{0000000046 00000046 top.l2cache info} handleCacheAccessResult_: Pipeline stage HIT_MISS_HANDLING : memptr: deadbeef uid:0 BEFORE_FETCH 0 pid:1 uopid:0 'sw 3' {0000000046 00000046 top.l2cache info} appendDCacheRespQueue_: Append L2Cache->DCache resp queue! {0000000046 00000046 top.l2cache info} handle_L2Cache_DCache_Resp_: L2Cache Resp is sent to DCache! -{0000000047 00000047 top.dcache info} ReceiveInst_: Instruction: 'uid:0 FETCHED 0 pid:1 uopid:0 'sw 3' ' Received +{0000000047 00000047 top.dcache info} ReceiveInst_: Instruction: 'uid:0 BEFORE_FETCH 0 pid:1 uopid:0 'sw 3' ' Received diff --git a/test/core/rename/expected_output/big_core.out.EXPECTED b/test/core/rename/expected_output/big_core.out.EXPECTED index 02c33544..7a820eb1 100644 --- a/test/core/rename/expected_output/big_core.out.EXPECTED +++ b/test/core/rename/expected_output/big_core.out.EXPECTED @@ -3,8 +3,8 @@ #Exe: #SimulatorVersion: #Repro: -#Start: Tuesday Tue Oct 8 16:47:17 2024 -#Elapsed: 0.002245s +#Start: Saturday Sat Oct 19 16:27:18 2024 +#Elapsed: 0.002659s {0000000000 00000000 top.dispatch info} Dispatch: mapping target: INTiq0 {0000000000 00000000 top.dispatch info} Dispatch: mapping target: DIViq0 {0000000000 00000000 top.dispatch info} Dispatch: mapping target: INTiq1 @@ -51,7 +51,7 @@ {0000000000 00000000 top.decode info} inCredits: Got credits from dut: 10 {0000000000 00000000 top.decode info} Sending group: 0x00000000 UID(0) PID(1) add {0000000001 00000001 top.rename info} scheduleRenaming_: current stall: NOT_STALLED -{0000000001 00000001 top.rename info} renameInstructions_: sending inst to dispatch: uid:0 RENAMED 0 pid:1 uopid:0 'add 3,1,2' +{0000000001 00000001 top.rename info} renameInstructions_: sending inst to dispatch: uid:0 RENAMED 0 pid:1 uopid:0 'add 3,1,2' {0000000001 00000001 top.rename info} renameInstructions_: setup source register bit mask [1] for 'integer' scoreboard {0000000001 00000001 top.rename info} renameInstructions_: setup source register bit mask [1-2] for 'integer' scoreboard {0000000001 00000001 top.rename info} renameInstructions_: setup destination register bit mask [0] for 'integer' scoreboard @@ -59,43 +59,43 @@ {0000000001 00000001 top.decode info} Sending group: 0x00000000 UID(1) PID(2) add {0000000002 00000002 top.dispatch info} dispatchQueueAppended_: queue appended: 0x00000000 UID(0) PID(1) add {0000000002 00000002 top.dispatch info} dispatchInstructions_: Num to dispatch: 1 -{0000000002 00000002 top.dispatch info} acceptInst: iq0: dispatching uid:0 RENAMED 0 pid:1 uopid:0 'add 3,1,2' -{0000000002 00000002 top.dispatch info} dispatchInstructions_: Sending instruction: uid:0DISPATCHED 0 pid:1 uopid:0 'add 3,1,2' to iq0 of target type: INT +{0000000002 00000002 top.dispatch info} acceptInst: iq0: dispatching uid:0 RENAMED 0 pid:1 uopid:0 'add 3,1,2' +{0000000002 00000002 top.dispatch info} dispatchInstructions_: Sending instruction: uid:0 DISPATCHED 0 pid:1 uopid:0 'add 3,1,2' to iq0 of target type: INT {0000000002 00000002 top.rename info} scheduleRenaming_: current stall: NOT_STALLED -{0000000002 00000002 top.rename info} renameInstructions_: sending inst to dispatch: uid:1 RENAMED 0 pid:2 uopid:0 'add 4,3,2' +{0000000002 00000002 top.rename info} renameInstructions_: sending inst to dispatch: uid:1 RENAMED 0 pid:2 uopid:0 'add 4,3,2' {0000000002 00000002 top.rename info} renameInstructions_: setup source register bit mask [0] for 'integer' scoreboard {0000000002 00000002 top.rename info} renameInstructions_: setup source register bit mask [0,2] for 'integer' scoreboard {0000000002 00000002 top.rename info} renameInstructions_: setup destination register bit mask [32] for 'integer' scoreboard {0000000002 00000002 top.decode info} inCredits: Got credits from dut: 1 {0000000002 00000002 top.decode info} Sending group: 0x00000000 UID(2) PID(3) mul -{0000000003 00000003 top.execute.iq0 info} handleOperandIssueCheck_: Sending to issue queue uid:0DISPATCHED 0 pid:1 uopid:0 'add 3,1,2' -{0000000003 00000003 top.rob info} robAppended_: retire appended: uid:0DISPATCHED 0 pid:1 uopid:0 'add 3,1,2' +{0000000003 00000003 top.execute.iq0 info} handleOperandIssueCheck_: Sending to issue queue uid:0 DISPATCHED 0 pid:1 uopid:0 'add 3,1,2' +{0000000003 00000003 top.rob info} robAppended_: retire appended: uid:0 DISPATCHED 0 pid:1 uopid:0 'add 3,1,2' {0000000003 00000003 top.dispatch info} dispatchQueueAppended_: queue appended: 0x00000000 UID(1) PID(2) add {0000000003 00000003 top.rob info} retireInstructions_: num to retire: 1 -{0000000003 00000003 top.rob info} retireInstructions_: set oldest: uid:0DISPATCHED 0 pid:1 uopid:0 'add 3,1,2' -{0000000003 00000003 top.execute.iq0 info} sendReadyInsts_: Sending instruction uid:0DISPATCHED 0 pid:1 uopid:0 'add 3,1,2' to exe_pipe exe0 -{0000000003 00000003 top.execute.exe0 info} insertInst: Executing: uid:0 SCHEDULED 0 pid:1 uopid:0 'add 3,1,2' for 4 +{0000000003 00000003 top.rob info} retireInstructions_: set oldest: uid:0 DISPATCHED 0 pid:1 uopid:0 'add 3,1,2' +{0000000003 00000003 top.execute.iq0 info} sendReadyInsts_: Sending instruction uid:0 DISPATCHED 0 pid:1 uopid:0 'add 3,1,2' to exe_pipe exe0 +{0000000003 00000003 top.execute.exe0 info} insertInst: Executing: uid:0 SCHEDULED 0 pid:1 uopid:0 'add 3,1,2' for 4 {0000000003 00000003 top.dispatch info} receiveCredits_: iq0 got 1 credits, total: 8 {0000000003 00000003 top.dispatch info} dispatchInstructions_: Num to dispatch: 1 -{0000000003 00000003 top.dispatch info} acceptInst: iq0: dispatching uid:1 RENAMED 0 pid:2 uopid:0 'add 4,3,2' -{0000000003 00000003 top.dispatch info} dispatchInstructions_: Sending instruction: uid:1DISPATCHED 0 pid:2 uopid:0 'add 4,3,2' to iq0 of target type: INT +{0000000003 00000003 top.dispatch info} acceptInst: iq0: dispatching uid:1 RENAMED 0 pid:2 uopid:0 'add 4,3,2' +{0000000003 00000003 top.dispatch info} dispatchInstructions_: Sending instruction: uid:1 DISPATCHED 0 pid:2 uopid:0 'add 4,3,2' to iq0 of target type: INT {0000000003 00000003 top.rename info} scheduleRenaming_: current stall: NOT_STALLED -{0000000003 00000003 top.rename info} renameInstructions_: sending inst to dispatch: uid:2 RENAMED 0 pid:3 uopid:0 'mul 13,12,11' +{0000000003 00000003 top.rename info} renameInstructions_: sending inst to dispatch: uid:2 RENAMED 0 pid:3 uopid:0 'mul 13,12,11' {0000000003 00000003 top.rename info} renameInstructions_: setup source register bit mask [12] for 'integer' scoreboard {0000000003 00000003 top.rename info} renameInstructions_: setup source register bit mask [11-12] for 'integer' scoreboard {0000000003 00000003 top.rename info} renameInstructions_: setup destination register bit mask [33] for 'integer' scoreboard {0000000003 00000003 top.decode info} inCredits: Got credits from dut: 1 {0000000003 00000003 top.decode info} Sending group: 0x00000000 UID(3) PID(4) sub -{0000000004 00000004 top.execute.iq0 info} handleOperandIssueCheck_: Instruction NOT ready: uid:1DISPATCHED 0 pid:2 uopid:0 'add 4,3,2' Bits needed:[0,2] rf: integer -{0000000004 00000004 top.rob info} robAppended_: retire appended: uid:1DISPATCHED 0 pid:2 uopid:0 'add 4,3,2' +{0000000004 00000004 top.execute.iq0 info} handleOperandIssueCheck_: Instruction NOT ready: uid:1 DISPATCHED 0 pid:2 uopid:0 'add 4,3,2' Bits needed:[0,2] rf: integer +{0000000004 00000004 top.rob info} robAppended_: retire appended: uid:1 DISPATCHED 0 pid:2 uopid:0 'add 4,3,2' {0000000004 00000004 top.dispatch info} dispatchQueueAppended_: queue appended: 0x00000000 UID(2) PID(3) mul -{0000000004 00000004 top.execute.exe0 info} executeInst_: Executed inst: uid:0 SCHEDULED 0 pid:1 uopid:0 'add 3,1,2' +{0000000004 00000004 top.execute.exe0 info} executeInst_: Executed inst: uid:0 SCHEDULED 0 pid:1 uopid:0 'add 3,1,2' {0000000004 00000004 top.rob info} retireInstructions_: num to retire: 2 {0000000004 00000004 top.dispatch info} dispatchInstructions_: Num to dispatch: 1 -{0000000004 00000004 top.dispatch info} acceptInst: iq1: dispatching uid:2 RENAMED 0 pid:3 uopid:0 'mul 13,12,11' -{0000000004 00000004 top.dispatch info} dispatchInstructions_: Sending instruction: uid:2DISPATCHED 0 pid:3 uopid:0 'mul 13,12,11' to iq1 of target type: MUL +{0000000004 00000004 top.dispatch info} acceptInst: iq1: dispatching uid:2 RENAMED 0 pid:3 uopid:0 'mul 13,12,11' +{0000000004 00000004 top.dispatch info} dispatchInstructions_: Sending instruction: uid:2 DISPATCHED 0 pid:3 uopid:0 'mul 13,12,11' to iq1 of target type: MUL {0000000004 00000004 top.rename info} scheduleRenaming_: current stall: NOT_STALLED -{0000000004 00000004 top.rename info} renameInstructions_: sending inst to dispatch: uid:3 RENAMED 0 pid:4 uopid:0 'sub 14,13,12' +{0000000004 00000004 top.rename info} renameInstructions_: sending inst to dispatch: uid:3 RENAMED 0 pid:4 uopid:0 'sub 14,13,12' {0000000004 00000004 top.rename info} renameInstructions_: setup source register bit mask [33] for 'integer' scoreboard {0000000004 00000004 top.rename info} renameInstructions_: setup source register bit mask [12,33] for 'integer' scoreboard {0000000004 00000004 top.rename info} renameInstructions_: setup destination register bit mask [34] for 'integer' scoreboard diff --git a/test/core/rename/expected_output/big_core_small_rename.out.EXPECTED b/test/core/rename/expected_output/big_core_small_rename.out.EXPECTED index f98a7fc0..f2a7c9d7 100644 --- a/test/core/rename/expected_output/big_core_small_rename.out.EXPECTED +++ b/test/core/rename/expected_output/big_core_small_rename.out.EXPECTED @@ -3,8 +3,8 @@ #Exe: #SimulatorVersion: #Repro: -#Start: Tuesday Tue Oct 8 16:47:54 2024 -#Elapsed: 0.003636s +#Start: Saturday Sat Oct 19 16:27:18 2024 +#Elapsed: 0.003002s {0000000000 00000000 top.dispatch info} Dispatch: mapping target: INTiq0 {0000000000 00000000 top.dispatch info} Dispatch: mapping target: DIViq0 {0000000000 00000000 top.dispatch info} Dispatch: mapping target: INTiq1 @@ -51,7 +51,7 @@ {0000000000 00000000 top.decode info} inCredits: Got credits from dut: 10 {0000000000 00000000 top.decode info} Sending group: 0x00000000 UID(0) PID(1) add {0000000001 00000001 top.rename info} scheduleRenaming_: current stall: NOT_STALLED -{0000000001 00000001 top.rename info} renameInstructions_: sending inst to dispatch: uid:0 RENAMED 0 pid:1 uopid:0 'add 3,1,2' +{0000000001 00000001 top.rename info} renameInstructions_: sending inst to dispatch: uid:0 RENAMED 0 pid:1 uopid:0 'add 3,1,2' {0000000001 00000001 top.rename info} renameInstructions_: setup source register bit mask [1] for 'integer' scoreboard {0000000001 00000001 top.rename info} renameInstructions_: setup source register bit mask [1-2] for 'integer' scoreboard {0000000001 00000001 top.rename info} renameInstructions_: setup destination register bit mask [0] for 'integer' scoreboard @@ -59,39 +59,39 @@ {0000000001 00000001 top.decode info} Sending group: 0x00000000 UID(1) PID(2) add {0000000002 00000002 top.dispatch info} dispatchQueueAppended_: queue appended: 0x00000000 UID(0) PID(1) add {0000000002 00000002 top.dispatch info} dispatchInstructions_: Num to dispatch: 1 -{0000000002 00000002 top.dispatch info} acceptInst: iq0: dispatching uid:0 RENAMED 0 pid:1 uopid:0 'add 3,1,2' -{0000000002 00000002 top.dispatch info} dispatchInstructions_: Sending instruction: uid:0DISPATCHED 0 pid:1 uopid:0 'add 3,1,2' to iq0 of target type: INT +{0000000002 00000002 top.dispatch info} acceptInst: iq0: dispatching uid:0 RENAMED 0 pid:1 uopid:0 'add 3,1,2' +{0000000002 00000002 top.dispatch info} dispatchInstructions_: Sending instruction: uid:0 DISPATCHED 0 pid:1 uopid:0 'add 3,1,2' to iq0 of target type: INT {0000000002 00000002 top.rename info} scheduleRenaming_: current stall: NOT_STALLED -{0000000002 00000002 top.rename info} renameInstructions_: sending inst to dispatch: uid:1 RENAMED 0 pid:2 uopid:0 'add 4,3,2' +{0000000002 00000002 top.rename info} renameInstructions_: sending inst to dispatch: uid:1 RENAMED 0 pid:2 uopid:0 'add 4,3,2' {0000000002 00000002 top.rename info} renameInstructions_: setup source register bit mask [0] for 'integer' scoreboard {0000000002 00000002 top.rename info} renameInstructions_: setup source register bit mask [0,2] for 'integer' scoreboard {0000000002 00000002 top.rename info} renameInstructions_: setup destination register bit mask [32] for 'integer' scoreboard {0000000002 00000002 top.decode info} inCredits: Got credits from dut: 1 {0000000002 00000002 top.decode info} Sending group: 0x00000000 UID(2) PID(3) mul -{0000000003 00000003 top.execute.iq0 info} handleOperandIssueCheck_: Sending to issue queue uid:0DISPATCHED 0 pid:1 uopid:0 'add 3,1,2' -{0000000003 00000003 top.rob info} robAppended_: retire appended: uid:0DISPATCHED 0 pid:1 uopid:0 'add 3,1,2' +{0000000003 00000003 top.execute.iq0 info} handleOperandIssueCheck_: Sending to issue queue uid:0 DISPATCHED 0 pid:1 uopid:0 'add 3,1,2' +{0000000003 00000003 top.rob info} robAppended_: retire appended: uid:0 DISPATCHED 0 pid:1 uopid:0 'add 3,1,2' {0000000003 00000003 top.dispatch info} dispatchQueueAppended_: queue appended: 0x00000000 UID(1) PID(2) add {0000000003 00000003 top.rob info} retireInstructions_: num to retire: 1 -{0000000003 00000003 top.rob info} retireInstructions_: set oldest: uid:0DISPATCHED 0 pid:1 uopid:0 'add 3,1,2' -{0000000003 00000003 top.execute.iq0 info} sendReadyInsts_: Sending instruction uid:0DISPATCHED 0 pid:1 uopid:0 'add 3,1,2' to exe_pipe exe0 -{0000000003 00000003 top.execute.exe0 info} insertInst: Executing: uid:0 SCHEDULED 0 pid:1 uopid:0 'add 3,1,2' for 4 +{0000000003 00000003 top.rob info} retireInstructions_: set oldest: uid:0 DISPATCHED 0 pid:1 uopid:0 'add 3,1,2' +{0000000003 00000003 top.execute.iq0 info} sendReadyInsts_: Sending instruction uid:0 DISPATCHED 0 pid:1 uopid:0 'add 3,1,2' to exe_pipe exe0 +{0000000003 00000003 top.execute.exe0 info} insertInst: Executing: uid:0 SCHEDULED 0 pid:1 uopid:0 'add 3,1,2' for 4 {0000000003 00000003 top.dispatch info} receiveCredits_: iq0 got 1 credits, total: 8 {0000000003 00000003 top.dispatch info} dispatchInstructions_: Num to dispatch: 1 -{0000000003 00000003 top.dispatch info} acceptInst: iq0: dispatching uid:1 RENAMED 0 pid:2 uopid:0 'add 4,3,2' -{0000000003 00000003 top.dispatch info} dispatchInstructions_: Sending instruction: uid:1DISPATCHED 0 pid:2 uopid:0 'add 4,3,2' to iq0 of target type: INT +{0000000003 00000003 top.dispatch info} acceptInst: iq0: dispatching uid:1 RENAMED 0 pid:2 uopid:0 'add 4,3,2' +{0000000003 00000003 top.dispatch info} dispatchInstructions_: Sending instruction: uid:1 DISPATCHED 0 pid:2 uopid:0 'add 4,3,2' to iq0 of target type: INT {0000000003 00000003 top.rename info} scheduleRenaming_: current stall: NOT_STALLED -{0000000003 00000003 top.rename info} renameInstructions_: sending inst to dispatch: uid:2 RENAMED 0 pid:3 uopid:0 'mul 13,12,11' +{0000000003 00000003 top.rename info} renameInstructions_: sending inst to dispatch: uid:2 RENAMED 0 pid:3 uopid:0 'mul 13,12,11' {0000000003 00000003 top.rename info} renameInstructions_: setup source register bit mask [12] for 'integer' scoreboard {0000000003 00000003 top.rename info} renameInstructions_: setup source register bit mask [11-12] for 'integer' scoreboard {0000000003 00000003 top.rename info} renameInstructions_: setup destination register bit mask [33] for 'integer' scoreboard {0000000003 00000003 top.decode info} inCredits: Got credits from dut: 1 {0000000003 00000003 top.decode info} Sending group: 0x00000000 UID(3) PID(4) sub -{0000000004 00000004 top.execute.iq0 info} handleOperandIssueCheck_: Instruction NOT ready: uid:1DISPATCHED 0 pid:2 uopid:0 'add 4,3,2' Bits needed:[0,2] rf: integer -{0000000004 00000004 top.rob info} robAppended_: retire appended: uid:1DISPATCHED 0 pid:2 uopid:0 'add 4,3,2' +{0000000004 00000004 top.execute.iq0 info} handleOperandIssueCheck_: Instruction NOT ready: uid:1 DISPATCHED 0 pid:2 uopid:0 'add 4,3,2' Bits needed:[0,2] rf: integer +{0000000004 00000004 top.rob info} robAppended_: retire appended: uid:1 DISPATCHED 0 pid:2 uopid:0 'add 4,3,2' {0000000004 00000004 top.dispatch info} dispatchQueueAppended_: queue appended: 0x00000000 UID(2) PID(3) mul -{0000000004 00000004 top.execute.exe0 info} executeInst_: Executed inst: uid:0 SCHEDULED 0 pid:1 uopid:0 'add 3,1,2' +{0000000004 00000004 top.execute.exe0 info} executeInst_: Executed inst: uid:0 SCHEDULED 0 pid:1 uopid:0 'add 3,1,2' {0000000004 00000004 top.rob info} retireInstructions_: num to retire: 2 {0000000004 00000004 top.dispatch info} dispatchInstructions_: Num to dispatch: 1 -{0000000004 00000004 top.dispatch info} acceptInst: iq1: dispatching uid:2 RENAMED 0 pid:3 uopid:0 'mul 13,12,11' -{0000000004 00000004 top.dispatch info} dispatchInstructions_: Sending instruction: uid:2DISPATCHED 0 pid:3 uopid:0 'mul 13,12,11' to iq1 of target type: MUL +{0000000004 00000004 top.dispatch info} acceptInst: iq1: dispatching uid:2 RENAMED 0 pid:3 uopid:0 'mul 13,12,11' +{0000000004 00000004 top.dispatch info} dispatchInstructions_: Sending instruction: uid:2 DISPATCHED 0 pid:3 uopid:0 'mul 13,12,11' to iq1 of target type: MUL {0000000004 00000004 top.rename info} scheduleRenaming_: current stall: NO_RENAMES diff --git a/test/core/rename/expected_output/medium_core.out.EXPECTED b/test/core/rename/expected_output/medium_core.out.EXPECTED index 710dddf4..efdddaf0 100644 --- a/test/core/rename/expected_output/medium_core.out.EXPECTED +++ b/test/core/rename/expected_output/medium_core.out.EXPECTED @@ -3,8 +3,8 @@ #Exe: #SimulatorVersion: #Repro: -#Start: Tuesday Tue Oct 8 16:47:05 2024 -#Elapsed: 0.003742s +#Start: Saturday Sat Oct 19 16:27:18 2024 +#Elapsed: 0.002592s {0000000000 00000000 top.dispatch info} Dispatch: mapping target: INTiq0 {0000000000 00000000 top.dispatch info} Dispatch: mapping target: MULiq0 {0000000000 00000000 top.dispatch info} Dispatch: mapping target: I2Fiq0 @@ -44,7 +44,7 @@ {0000000000 00000000 top.decode info} inCredits: Got credits from dut: 10 {0000000000 00000000 top.decode info} Sending group: 0x00000000 UID(0) PID(1) add {0000000001 00000001 top.rename info} scheduleRenaming_: current stall: NOT_STALLED -{0000000001 00000001 top.rename info} renameInstructions_: sending inst to dispatch: uid:0 RENAMED 0 pid:1 uopid:0 'add 3,1,2' +{0000000001 00000001 top.rename info} renameInstructions_: sending inst to dispatch: uid:0 RENAMED 0 pid:1 uopid:0 'add 3,1,2' {0000000001 00000001 top.rename info} renameInstructions_: setup source register bit mask [1] for 'integer' scoreboard {0000000001 00000001 top.rename info} renameInstructions_: setup source register bit mask [1-2] for 'integer' scoreboard {0000000001 00000001 top.rename info} renameInstructions_: setup destination register bit mask [0] for 'integer' scoreboard @@ -52,43 +52,43 @@ {0000000001 00000001 top.decode info} Sending group: 0x00000000 UID(1) PID(2) add {0000000002 00000002 top.dispatch info} dispatchQueueAppended_: queue appended: 0x00000000 UID(0) PID(1) add {0000000002 00000002 top.dispatch info} dispatchInstructions_: Num to dispatch: 1 -{0000000002 00000002 top.dispatch info} acceptInst: iq0: dispatching uid:0 RENAMED 0 pid:1 uopid:0 'add 3,1,2' -{0000000002 00000002 top.dispatch info} dispatchInstructions_: Sending instruction: uid:0DISPATCHED 0 pid:1 uopid:0 'add 3,1,2' to iq0 of target type: INT +{0000000002 00000002 top.dispatch info} acceptInst: iq0: dispatching uid:0 RENAMED 0 pid:1 uopid:0 'add 3,1,2' +{0000000002 00000002 top.dispatch info} dispatchInstructions_: Sending instruction: uid:0 DISPATCHED 0 pid:1 uopid:0 'add 3,1,2' to iq0 of target type: INT {0000000002 00000002 top.rename info} scheduleRenaming_: current stall: NOT_STALLED -{0000000002 00000002 top.rename info} renameInstructions_: sending inst to dispatch: uid:1 RENAMED 0 pid:2 uopid:0 'add 4,3,2' +{0000000002 00000002 top.rename info} renameInstructions_: sending inst to dispatch: uid:1 RENAMED 0 pid:2 uopid:0 'add 4,3,2' {0000000002 00000002 top.rename info} renameInstructions_: setup source register bit mask [0] for 'integer' scoreboard {0000000002 00000002 top.rename info} renameInstructions_: setup source register bit mask [0,2] for 'integer' scoreboard {0000000002 00000002 top.rename info} renameInstructions_: setup destination register bit mask [32] for 'integer' scoreboard {0000000002 00000002 top.decode info} inCredits: Got credits from dut: 1 {0000000002 00000002 top.decode info} Sending group: 0x00000000 UID(2) PID(3) mul -{0000000003 00000003 top.execute.iq0 info} handleOperandIssueCheck_: Sending to issue queue uid:0DISPATCHED 0 pid:1 uopid:0 'add 3,1,2' -{0000000003 00000003 top.rob info} robAppended_: retire appended: uid:0DISPATCHED 0 pid:1 uopid:0 'add 3,1,2' +{0000000003 00000003 top.execute.iq0 info} handleOperandIssueCheck_: Sending to issue queue uid:0 DISPATCHED 0 pid:1 uopid:0 'add 3,1,2' +{0000000003 00000003 top.rob info} robAppended_: retire appended: uid:0 DISPATCHED 0 pid:1 uopid:0 'add 3,1,2' {0000000003 00000003 top.dispatch info} dispatchQueueAppended_: queue appended: 0x00000000 UID(1) PID(2) add {0000000003 00000003 top.rob info} retireInstructions_: num to retire: 1 -{0000000003 00000003 top.rob info} retireInstructions_: set oldest: uid:0DISPATCHED 0 pid:1 uopid:0 'add 3,1,2' -{0000000003 00000003 top.execute.iq0 info} sendReadyInsts_: Sending instruction uid:0DISPATCHED 0 pid:1 uopid:0 'add 3,1,2' to exe_pipe exe0 -{0000000003 00000003 top.execute.exe0 info} insertInst: Executing: uid:0 SCHEDULED 0 pid:1 uopid:0 'add 3,1,2' for 4 +{0000000003 00000003 top.rob info} retireInstructions_: set oldest: uid:0 DISPATCHED 0 pid:1 uopid:0 'add 3,1,2' +{0000000003 00000003 top.execute.iq0 info} sendReadyInsts_: Sending instruction uid:0 DISPATCHED 0 pid:1 uopid:0 'add 3,1,2' to exe_pipe exe0 +{0000000003 00000003 top.execute.exe0 info} insertInst: Executing: uid:0 SCHEDULED 0 pid:1 uopid:0 'add 3,1,2' for 4 {0000000003 00000003 top.dispatch info} receiveCredits_: iq0 got 1 credits, total: 8 {0000000003 00000003 top.dispatch info} dispatchInstructions_: Num to dispatch: 1 -{0000000003 00000003 top.dispatch info} acceptInst: iq0: dispatching uid:1 RENAMED 0 pid:2 uopid:0 'add 4,3,2' -{0000000003 00000003 top.dispatch info} dispatchInstructions_: Sending instruction: uid:1DISPATCHED 0 pid:2 uopid:0 'add 4,3,2' to iq0 of target type: INT +{0000000003 00000003 top.dispatch info} acceptInst: iq0: dispatching uid:1 RENAMED 0 pid:2 uopid:0 'add 4,3,2' +{0000000003 00000003 top.dispatch info} dispatchInstructions_: Sending instruction: uid:1 DISPATCHED 0 pid:2 uopid:0 'add 4,3,2' to iq0 of target type: INT {0000000003 00000003 top.rename info} scheduleRenaming_: current stall: NOT_STALLED -{0000000003 00000003 top.rename info} renameInstructions_: sending inst to dispatch: uid:2 RENAMED 0 pid:3 uopid:0 'mul 13,12,11' +{0000000003 00000003 top.rename info} renameInstructions_: sending inst to dispatch: uid:2 RENAMED 0 pid:3 uopid:0 'mul 13,12,11' {0000000003 00000003 top.rename info} renameInstructions_: setup source register bit mask [12] for 'integer' scoreboard {0000000003 00000003 top.rename info} renameInstructions_: setup source register bit mask [11-12] for 'integer' scoreboard {0000000003 00000003 top.rename info} renameInstructions_: setup destination register bit mask [33] for 'integer' scoreboard {0000000003 00000003 top.decode info} inCredits: Got credits from dut: 1 {0000000003 00000003 top.decode info} Sending group: 0x00000000 UID(3) PID(4) sub -{0000000004 00000004 top.execute.iq0 info} handleOperandIssueCheck_: Instruction NOT ready: uid:1DISPATCHED 0 pid:2 uopid:0 'add 4,3,2' Bits needed:[0,2] rf: integer -{0000000004 00000004 top.rob info} robAppended_: retire appended: uid:1DISPATCHED 0 pid:2 uopid:0 'add 4,3,2' +{0000000004 00000004 top.execute.iq0 info} handleOperandIssueCheck_: Instruction NOT ready: uid:1 DISPATCHED 0 pid:2 uopid:0 'add 4,3,2' Bits needed:[0,2] rf: integer +{0000000004 00000004 top.rob info} robAppended_: retire appended: uid:1 DISPATCHED 0 pid:2 uopid:0 'add 4,3,2' {0000000004 00000004 top.dispatch info} dispatchQueueAppended_: queue appended: 0x00000000 UID(2) PID(3) mul -{0000000004 00000004 top.execute.exe0 info} executeInst_: Executed inst: uid:0 SCHEDULED 0 pid:1 uopid:0 'add 3,1,2' +{0000000004 00000004 top.execute.exe0 info} executeInst_: Executed inst: uid:0 SCHEDULED 0 pid:1 uopid:0 'add 3,1,2' {0000000004 00000004 top.rob info} retireInstructions_: num to retire: 2 {0000000004 00000004 top.dispatch info} dispatchInstructions_: Num to dispatch: 1 -{0000000004 00000004 top.dispatch info} acceptInst: iq0: dispatching uid:2 RENAMED 0 pid:3 uopid:0 'mul 13,12,11' -{0000000004 00000004 top.dispatch info} dispatchInstructions_: Sending instruction: uid:2DISPATCHED 0 pid:3 uopid:0 'mul 13,12,11' to iq0 of target type: MUL +{0000000004 00000004 top.dispatch info} acceptInst: iq0: dispatching uid:2 RENAMED 0 pid:3 uopid:0 'mul 13,12,11' +{0000000004 00000004 top.dispatch info} dispatchInstructions_: Sending instruction: uid:2 DISPATCHED 0 pid:3 uopid:0 'mul 13,12,11' to iq0 of target type: MUL {0000000004 00000004 top.rename info} scheduleRenaming_: current stall: NOT_STALLED -{0000000004 00000004 top.rename info} renameInstructions_: sending inst to dispatch: uid:3 RENAMED 0 pid:4 uopid:0 'sub 14,13,12' +{0000000004 00000004 top.rename info} renameInstructions_: sending inst to dispatch: uid:3 RENAMED 0 pid:4 uopid:0 'sub 14,13,12' {0000000004 00000004 top.rename info} renameInstructions_: setup source register bit mask [33] for 'integer' scoreboard {0000000004 00000004 top.rename info} renameInstructions_: setup source register bit mask [12,33] for 'integer' scoreboard {0000000004 00000004 top.rename info} renameInstructions_: setup destination register bit mask [34] for 'integer' scoreboard diff --git a/test/core/rename/expected_output/small_core.out.EXPECTED b/test/core/rename/expected_output/small_core.out.EXPECTED index 36d8a20b..7f7f3329 100644 --- a/test/core/rename/expected_output/small_core.out.EXPECTED +++ b/test/core/rename/expected_output/small_core.out.EXPECTED @@ -3,8 +3,8 @@ #Exe: #SimulatorVersion: #Repro: -#Start: Tuesday Tue Oct 8 16:47:26 2024 -#Elapsed: 0.003386s +#Start: Saturday Sat Oct 19 16:27:18 2024 +#Elapsed: 0.002441s {0000000000 00000000 top.dispatch info} Dispatch: mapping target: INTiq0 {0000000000 00000000 top.dispatch info} Dispatch: mapping target: MULiq0 {0000000000 00000000 top.dispatch info} Dispatch: mapping target: I2Fiq0 @@ -38,7 +38,7 @@ {0000000000 00000000 top.decode info} inCredits: Got credits from dut: 10 {0000000000 00000000 top.decode info} Sending group: 0x00000000 UID(0) PID(1) add {0000000001 00000001 top.rename info} scheduleRenaming_: current stall: NOT_STALLED -{0000000001 00000001 top.rename info} renameInstructions_: sending inst to dispatch: uid:0 RENAMED 0 pid:1 uopid:0 'add 3,1,2' +{0000000001 00000001 top.rename info} renameInstructions_: sending inst to dispatch: uid:0 RENAMED 0 pid:1 uopid:0 'add 3,1,2' {0000000001 00000001 top.rename info} renameInstructions_: setup source register bit mask [1] for 'integer' scoreboard {0000000001 00000001 top.rename info} renameInstructions_: setup source register bit mask [1-2] for 'integer' scoreboard {0000000001 00000001 top.rename info} renameInstructions_: setup destination register bit mask [0] for 'integer' scoreboard @@ -46,43 +46,43 @@ {0000000001 00000001 top.decode info} Sending group: 0x00000000 UID(1) PID(2) add {0000000002 00000002 top.dispatch info} dispatchQueueAppended_: queue appended: 0x00000000 UID(0) PID(1) add {0000000002 00000002 top.dispatch info} dispatchInstructions_: Num to dispatch: 1 -{0000000002 00000002 top.dispatch info} acceptInst: iq0: dispatching uid:0 RENAMED 0 pid:1 uopid:0 'add 3,1,2' -{0000000002 00000002 top.dispatch info} dispatchInstructions_: Sending instruction: uid:0DISPATCHED 0 pid:1 uopid:0 'add 3,1,2' to iq0 of target type: INT +{0000000002 00000002 top.dispatch info} acceptInst: iq0: dispatching uid:0 RENAMED 0 pid:1 uopid:0 'add 3,1,2' +{0000000002 00000002 top.dispatch info} dispatchInstructions_: Sending instruction: uid:0 DISPATCHED 0 pid:1 uopid:0 'add 3,1,2' to iq0 of target type: INT {0000000002 00000002 top.rename info} scheduleRenaming_: current stall: NOT_STALLED -{0000000002 00000002 top.rename info} renameInstructions_: sending inst to dispatch: uid:1 RENAMED 0 pid:2 uopid:0 'add 4,3,2' +{0000000002 00000002 top.rename info} renameInstructions_: sending inst to dispatch: uid:1 RENAMED 0 pid:2 uopid:0 'add 4,3,2' {0000000002 00000002 top.rename info} renameInstructions_: setup source register bit mask [0] for 'integer' scoreboard {0000000002 00000002 top.rename info} renameInstructions_: setup source register bit mask [0,2] for 'integer' scoreboard {0000000002 00000002 top.rename info} renameInstructions_: setup destination register bit mask [32] for 'integer' scoreboard {0000000002 00000002 top.decode info} inCredits: Got credits from dut: 1 {0000000002 00000002 top.decode info} Sending group: 0x00000000 UID(2) PID(3) mul -{0000000003 00000003 top.execute.iq0 info} handleOperandIssueCheck_: Sending to issue queue uid:0DISPATCHED 0 pid:1 uopid:0 'add 3,1,2' -{0000000003 00000003 top.rob info} robAppended_: retire appended: uid:0DISPATCHED 0 pid:1 uopid:0 'add 3,1,2' +{0000000003 00000003 top.execute.iq0 info} handleOperandIssueCheck_: Sending to issue queue uid:0 DISPATCHED 0 pid:1 uopid:0 'add 3,1,2' +{0000000003 00000003 top.rob info} robAppended_: retire appended: uid:0 DISPATCHED 0 pid:1 uopid:0 'add 3,1,2' {0000000003 00000003 top.dispatch info} dispatchQueueAppended_: queue appended: 0x00000000 UID(1) PID(2) add {0000000003 00000003 top.rob info} retireInstructions_: num to retire: 1 -{0000000003 00000003 top.rob info} retireInstructions_: set oldest: uid:0DISPATCHED 0 pid:1 uopid:0 'add 3,1,2' -{0000000003 00000003 top.execute.iq0 info} sendReadyInsts_: Sending instruction uid:0DISPATCHED 0 pid:1 uopid:0 'add 3,1,2' to exe_pipe exe0 -{0000000003 00000003 top.execute.exe0 info} insertInst: Executing: uid:0 SCHEDULED 0 pid:1 uopid:0 'add 3,1,2' for 4 +{0000000003 00000003 top.rob info} retireInstructions_: set oldest: uid:0 DISPATCHED 0 pid:1 uopid:0 'add 3,1,2' +{0000000003 00000003 top.execute.iq0 info} sendReadyInsts_: Sending instruction uid:0 DISPATCHED 0 pid:1 uopid:0 'add 3,1,2' to exe_pipe exe0 +{0000000003 00000003 top.execute.exe0 info} insertInst: Executing: uid:0 SCHEDULED 0 pid:1 uopid:0 'add 3,1,2' for 4 {0000000003 00000003 top.dispatch info} receiveCredits_: iq0 got 1 credits, total: 8 {0000000003 00000003 top.dispatch info} dispatchInstructions_: Num to dispatch: 1 -{0000000003 00000003 top.dispatch info} acceptInst: iq0: dispatching uid:1 RENAMED 0 pid:2 uopid:0 'add 4,3,2' -{0000000003 00000003 top.dispatch info} dispatchInstructions_: Sending instruction: uid:1DISPATCHED 0 pid:2 uopid:0 'add 4,3,2' to iq0 of target type: INT +{0000000003 00000003 top.dispatch info} acceptInst: iq0: dispatching uid:1 RENAMED 0 pid:2 uopid:0 'add 4,3,2' +{0000000003 00000003 top.dispatch info} dispatchInstructions_: Sending instruction: uid:1 DISPATCHED 0 pid:2 uopid:0 'add 4,3,2' to iq0 of target type: INT {0000000003 00000003 top.rename info} scheduleRenaming_: current stall: NOT_STALLED -{0000000003 00000003 top.rename info} renameInstructions_: sending inst to dispatch: uid:2 RENAMED 0 pid:3 uopid:0 'mul 13,12,11' +{0000000003 00000003 top.rename info} renameInstructions_: sending inst to dispatch: uid:2 RENAMED 0 pid:3 uopid:0 'mul 13,12,11' {0000000003 00000003 top.rename info} renameInstructions_: setup source register bit mask [12] for 'integer' scoreboard {0000000003 00000003 top.rename info} renameInstructions_: setup source register bit mask [11-12] for 'integer' scoreboard {0000000003 00000003 top.rename info} renameInstructions_: setup destination register bit mask [33] for 'integer' scoreboard {0000000003 00000003 top.decode info} inCredits: Got credits from dut: 1 {0000000003 00000003 top.decode info} Sending group: 0x00000000 UID(3) PID(4) sub -{0000000004 00000004 top.execute.iq0 info} handleOperandIssueCheck_: Instruction NOT ready: uid:1DISPATCHED 0 pid:2 uopid:0 'add 4,3,2' Bits needed:[0,2] rf: integer -{0000000004 00000004 top.rob info} robAppended_: retire appended: uid:1DISPATCHED 0 pid:2 uopid:0 'add 4,3,2' +{0000000004 00000004 top.execute.iq0 info} handleOperandIssueCheck_: Instruction NOT ready: uid:1 DISPATCHED 0 pid:2 uopid:0 'add 4,3,2' Bits needed:[0,2] rf: integer +{0000000004 00000004 top.rob info} robAppended_: retire appended: uid:1 DISPATCHED 0 pid:2 uopid:0 'add 4,3,2' {0000000004 00000004 top.dispatch info} dispatchQueueAppended_: queue appended: 0x00000000 UID(2) PID(3) mul -{0000000004 00000004 top.execute.exe0 info} executeInst_: Executed inst: uid:0 SCHEDULED 0 pid:1 uopid:0 'add 3,1,2' +{0000000004 00000004 top.execute.exe0 info} executeInst_: Executed inst: uid:0 SCHEDULED 0 pid:1 uopid:0 'add 3,1,2' {0000000004 00000004 top.rob info} retireInstructions_: num to retire: 2 {0000000004 00000004 top.dispatch info} dispatchInstructions_: Num to dispatch: 1 -{0000000004 00000004 top.dispatch info} acceptInst: iq0: dispatching uid:2 RENAMED 0 pid:3 uopid:0 'mul 13,12,11' -{0000000004 00000004 top.dispatch info} dispatchInstructions_: Sending instruction: uid:2DISPATCHED 0 pid:3 uopid:0 'mul 13,12,11' to iq0 of target type: MUL +{0000000004 00000004 top.dispatch info} acceptInst: iq0: dispatching uid:2 RENAMED 0 pid:3 uopid:0 'mul 13,12,11' +{0000000004 00000004 top.dispatch info} dispatchInstructions_: Sending instruction: uid:2 DISPATCHED 0 pid:3 uopid:0 'mul 13,12,11' to iq0 of target type: MUL {0000000004 00000004 top.rename info} scheduleRenaming_: current stall: NOT_STALLED -{0000000004 00000004 top.rename info} renameInstructions_: sending inst to dispatch: uid:3 RENAMED 0 pid:4 uopid:0 'sub 14,13,12' +{0000000004 00000004 top.rename info} renameInstructions_: sending inst to dispatch: uid:3 RENAMED 0 pid:4 uopid:0 'sub 14,13,12' {0000000004 00000004 top.rename info} renameInstructions_: setup source register bit mask [33] for 'integer' scoreboard {0000000004 00000004 top.rename info} renameInstructions_: setup source register bit mask [12,33] for 'integer' scoreboard {0000000004 00000004 top.rename info} renameInstructions_: setup destination register bit mask [34] for 'integer' scoreboard