From fa7587a9efd1ca50df091fc28d51df2e324334af Mon Sep 17 00:00:00 2001 From: Ved Shanbhogue Date: Mon, 26 Feb 2024 20:10:59 -0600 Subject: [PATCH] add cross references to security model requirements --- src/server_soc_requirements.adoc | 18 ++++++++++++++++++ 1 file changed, 18 insertions(+) diff --git a/src/server_soc_requirements.adoc b/src/server_soc_requirements.adoc index 709fb03..78e3a9f 100644 --- a/src/server_soc_requirements.adoc +++ b/src/server_soc_requirements.adoc @@ -1266,6 +1266,24 @@ data centers and enterprises. [%header, cols="5,25"] |=== | ID# ^| Requirement +| SEC_005 a| The Server SoC MUST comply with the requirements and guidelines + detailed in Reference Model, Ecosystem Security Objectives, and + the Cryptography sections of the RISC-V Security Model cite:[SEC]. + The Server SoC is classified as a complex security system for the + purposes of SR_ROT_001 and SR_ATT_002. + +| SEC_006 a| The Server SoC MUST support the Generic System Without Supervisor + Domains use case detailed in the RISC-V Security Model. The + building blocks used to implement this use case MUST comply with + the requirements specified in the RISC-V Security Building Blocks + section of the RISC-V Security Model specification. + +| SEC_007 a| The Server SoC MAY support the Confidential Computing on RISC-V + (CoVE) use detailed in the RISC-V Security Model. The building + blocks used to implement this use case MUST comply with the + requirements specified in the RISC-V Security Building Blocks + section of the RISC-V Security Model specification. + | SEC_010 | The PCIe root ports within the SoC SHOULD support PCIe Integrity and Data Encryption (IDE) capability. 2+| _The IDE extension adds optional capabilities to perform hardware encryption