diff --git a/src/server_soc.bib b/src/server_soc.bib
index 05a6511..7c8b1a6 100644
--- a/src/server_soc.bib
+++ b/src/server_soc.bib
@@ -13,6 +13,11 @@ @electronic{SEC
   url = {https://github.com/riscv-non-isa/riscv-security-model},
   year = {}
 }
+@electronic{UNPRIV,
+  title = {RISC-V Instruction Set Manual, Volume I: Unprivileged Architecture},
+  url = {https://github.com/riscv/riscv-isa-manual},
+  year = {}
+}
 @electronic{PRIV,
   title = {RISC-V Instruction Set Manual, Volume II: Privileged Architecture},
   url = {https://github.com/riscv/riscv-isa-manual},
diff --git a/src/server_soc_requirements.adoc b/src/server_soc_requirements.adoc
index c5c661f..eb929c4 100644
--- a/src/server_soc_requirements.adoc
+++ b/src/server_soc_requirements.adoc
@@ -9,7 +9,7 @@
 | CTI_010  | The `time` CSR MUST increment at a constant frequency and the count
              MUST be in units of 1 ns. The frequency at which the CSR provides
              an updated time value MUST be at least 100 MHz.
-2+| _The Zicntr extension cite:[UNPRIV] requires the real-time clocks of all
+2+a| _The Zicntr extension cite:[UNPRIV] requires the real-time clocks of all
      harts to be synchronized to within one tick of the real-time clock._
 
 | CTI_020  | The `time` counter MUST appear to be always on and MUST appear to