From d52e5a6a59b7c638da860c2bb309b6e78e752ff8 Mon Sep 17 00:00:00 2001 From: Flex Software Development Robot <flexdev@renesasgroup.onmicrosoft.com> Date: Thu, 29 Jun 2023 16:04:24 +0000 Subject: [PATCH] Release v4.5.0 --- README.md | 4 +- SUPPORTED_SOFTWARE.md | 19 +- ra/fsp/inc/{ => api}/fsp_common_api.h | 0 ra/fsp/inc/api/r_adc_api.h | 5 +- ra/fsp/inc/api/r_ioport_api.h | 13 +- ra/fsp/inc/api/r_lpm_api.h | 159 +- ra/fsp/inc/api/r_lvd_api.h | 13 + ra/fsp/inc/api/r_rtc_api.h | 27 +- ra/fsp/inc/api/r_slcdc_api.h | 23 +- ra/fsp/inc/api/r_smci_api.h | 313 ++ ra/fsp/inc/api/r_spi_flash_api.h | 107 +- ra/fsp/inc/api/rm_block_media_api.h | 1 + ra/fsp/inc/api/rm_comms_api.h | 26 +- ra/fsp/inc/api/rm_rai_data_collector_api.h | 259 ++ ra/fsp/inc/api/rm_rai_data_shipper_api.h | 150 + ra/fsp/inc/api/rm_zmod4xxx_api.h | 41 + ra/fsp/inc/fsp_version.h | 6 +- ra/fsp/inc/instances/r_adc.h | 6 +- ra/fsp/inc/instances/r_adc_b.h | 86 +- ra/fsp/inc/instances/r_agt.h | 18 +- ra/fsp/inc/instances/r_ospi.h | 38 +- ra/fsp/inc/instances/r_rtc.h | 7 + ra/fsp/inc/instances/r_sce_key_injection.h | 12 - ra/fsp/inc/instances/r_sci_smci.h | 157 + ra/fsp/inc/instances/rm_block_media_ram.h | 97 + ra/fsp/inc/instances/rm_comms_uart.h | 98 + ra/fsp/inc/instances/rm_mqtt_onchip_da16xxx.h | 165 + ra/fsp/inc/instances/rm_rai_data_collector.h | 131 + ra/fsp/inc/instances/rm_rai_data_shipper.h | 128 + ...hip_da16200.h => rm_wifi_onchip_da16xxx.h} | 250 +- ra/fsp/inc/instances/rm_zmod4xxx.h | 9 + .../cmsis/Device/RENESAS/Include/R7FA2A1AB.h | 245 +- .../cmsis/Device/RENESAS/Include/R7FA2E1A9.h | 245 +- .../cmsis/Device/RENESAS/Include/R7FA2E2A7.h | 245 +- .../cmsis/Device/RENESAS/Include/R7FA2L1AB.h | 245 +- .../cmsis/Device/RENESAS/Include/R7FA4E10D.h | 245 +- .../cmsis/Device/RENESAS/Include/R7FA4E2B9.h | 206 +- .../cmsis/Device/RENESAS/Include/R7FA4M1AB.h | 245 +- .../cmsis/Device/RENESAS/Include/R7FA4M2AD.h | 206 +- .../cmsis/Device/RENESAS/Include/R7FA4M3AF.h | 206 +- .../cmsis/Device/RENESAS/Include/R7FA4T1BB.h | 206 +- .../cmsis/Device/RENESAS/Include/R7FA4W1AD.h | 245 +- .../cmsis/Device/RENESAS/Include/R7FA6E10F.h | 206 +- .../cmsis/Device/RENESAS/Include/R7FA6E2BB.h | 206 +- .../cmsis/Device/RENESAS/Include/R7FA6M1AD.h | 206 +- .../cmsis/Device/RENESAS/Include/R7FA6M2AF.h | 206 +- .../cmsis/Device/RENESAS/Include/R7FA6M3AH.h | 206 +- .../cmsis/Device/RENESAS/Include/R7FA6M4AF.h | 206 +- .../cmsis/Device/RENESAS/Include/R7FA6M5BH.h | 206 +- .../cmsis/Device/RENESAS/Include/R7FA6T1AD.h | 206 +- .../cmsis/Device/RENESAS/Include/R7FA6T2BD.h | 219 +- .../cmsis/Device/RENESAS/Include/R7FA6T3BB.h | 206 +- .../bsp/cmsis/Device/RENESAS/Source/system.c | 241 +- ra/fsp/src/bsp/mcu/all/bsp_clocks.c | 27 +- ra/fsp/src/bsp/mcu/all/bsp_clocks.h | 19 +- ra/fsp/src/bsp/mcu/all/bsp_common.h | 5 +- ra/fsp/src/bsp/mcu/ra2a1/bsp_feature.h | 51 +- ra/fsp/src/bsp/mcu/ra2e1/bsp_feature.h | 49 +- ra/fsp/src/bsp/mcu/ra2e2/bsp_feature.h | 49 +- ra/fsp/src/bsp/mcu/ra2l1/bsp_feature.h | 51 +- ra/fsp/src/bsp/mcu/ra4e1/bsp_feature.h | 47 +- ra/fsp/src/bsp/mcu/ra4e2/bsp_feature.h | 36 +- ra/fsp/src/bsp/mcu/ra4m1/bsp_feature.h | 47 +- ra/fsp/src/bsp/mcu/ra4m2/bsp_feature.h | 49 +- ra/fsp/src/bsp/mcu/ra4m3/bsp_feature.h | 47 +- ra/fsp/src/bsp/mcu/ra4t1/bsp_feature.h | 35 +- ra/fsp/src/bsp/mcu/ra4w1/bsp_feature.h | 47 +- ra/fsp/src/bsp/mcu/ra6e1/bsp_feature.h | 47 +- ra/fsp/src/bsp/mcu/ra6e2/bsp_feature.h | 36 +- ra/fsp/src/bsp/mcu/ra6m1/bsp_feature.h | 47 +- ra/fsp/src/bsp/mcu/ra6m2/bsp_feature.h | 47 +- ra/fsp/src/bsp/mcu/ra6m3/bsp_feature.h | 47 +- ra/fsp/src/bsp/mcu/ra6m4/bsp_feature.h | 45 +- ra/fsp/src/bsp/mcu/ra6m5/bsp_feature.h | 45 +- ra/fsp/src/bsp/mcu/ra6t1/bsp_feature.h | 47 +- ra/fsp/src/bsp/mcu/ra6t2/bsp_feature.h | 52 +- ra/fsp/src/bsp/mcu/ra6t3/bsp_feature.h | 35 +- ra/fsp/src/r_adc/r_adc.c | 16 +- ra/fsp/src/r_adc_b/r_adc_b.c | 339 +- ra/fsp/src/r_agt/r_agt.c | 64 +- ...HAL Drivers##all##r_canfd####4.5.0.xml.j2} | 29 +- ra/fsp/src/r_canfd/.util/canfd_gen.py | 2 +- ra/fsp/src/r_cgc/r_cgc.c | 239 +- ra/fsp/src/r_doc/r_doc.c | 1 - ra/fsp/src/r_dtc/r_dtc.c | 12 +- ra/fsp/src/r_flash_hp/r_flash_hp.c | 26 +- ra/fsp/src/r_iic_b_slave/r_iic_b_slave.c | 6 + ra/fsp/src/r_iic_master/r_iic_master.c | 2 +- ra/fsp/src/r_iic_slave/r_iic_slave.c | 9 + ra/fsp/src/r_lvd/r_lvd.c | 507 ++- ra/fsp/src/r_ospi/r_ospi.c | 38 +- ra/fsp/src/r_rtc/r_rtc.c | 169 +- .../r_sce/aes2/adaptors/hw_sce_ra_private.h | 172 +- .../src/r_sce/aes2/adaptors/r_sce_AES_adapt.c | 741 ++++- ra/fsp/src/r_sce/aes2/ctr_mode.c | 212 ++ ra/fsp/src/r_sce/aes2/gcm_mode.c | 217 ++ .../src/sce5/plainkey/adaptors/r_sce_adapt.c | 172 + .../plainkey/private/inc/hw_sce_ra_private.h | 29 + .../src/sce5b/plainkey/adaptors/r_sce_adapt.c | 172 + .../plainkey/private/inc/hw_sce_ra_private.h | 22 + .../src/sce7/plainkey/adaptors/r_sce_adapt.c | 132 + .../plainkey/private/inc/hw_sce_ra_private.h | 22 + .../src/sce9/plainkey/adaptors/r_sce_adapt.c | 127 + .../plainkey/primitive/hw_sce_p_func304.c | 26 +- .../plainkey/primitive/hw_sce_p_func307.c | 12 +- .../plainkey/primitive/hw_sce_p_func309.c | 8 +- .../plainkey/primitive/hw_sce_p_func311.c | 8 +- .../plainkey/primitive/hw_sce_p_func325.c | 56 +- .../sce9/plainkey/primitive/hw_sce_p_p79.c | 10 +- .../sce9/plainkey/primitive/hw_sce_p_p7b.c | 4 +- .../sce9/plainkey/primitive/hw_sce_p_pa1i.c | 10 +- .../plainkey/private/inc/hw_sce_ra_private.h | 32 +- ra/fsp/src/r_sce/hw_sce_aes_private.h | 37 +- .../src/r_sce/ra2/adaptors/r_sce_AES_adapt.c | 1 - .../src/sce9/primitive/r_sce_func304.c | 26 +- .../src/sce9/primitive/r_sce_func307.c | 12 +- .../src/sce9/primitive/r_sce_func309.c | 8 +- .../src/sce9/primitive/r_sce_func311.c | 8 +- .../src/sce9/primitive/r_sce_func325.c | 56 +- .../src/sce9/primitive/r_sce_p5d.c | 12 +- .../src/sce9/primitive/r_sce_p79.c | 10 +- .../src/sce9/primitive/r_sce_p7b.c | 4 +- .../src/sce9/primitive/r_sce_p82.c | 8 +- .../src/sce9/primitive/r_sce_pa1i.c | 8 +- .../src/sce9/primitive/r_sce_pe1.c | 14 +- .../src/sce9/primitive/r_sce_pe5.c | 28 +- .../src/sce9/private/inc/r_sce_private.h | 10 +- ra/fsp/src/r_sci_b_i2c/r_sci_b_i2c.c | 19 +- ra/fsp/src/r_sci_b_spi/r_sci_b_spi.c | 4 +- ra/fsp/src/r_sci_b_uart/r_sci_b_uart.c | 4 + ra/fsp/src/r_sci_i2c/r_sci_i2c.c | 19 +- ra/fsp/src/r_sci_smci/r_sci_smci.c | 1203 +++++++ ra/fsp/src/r_slcdc/r_slcdc.c | 122 +- ra/fsp/src/r_usb_basic/r_usb_basic.c | 2 + .../src/driver/inc/r_usb_typedef.h | 19 +- ra/fsp/src/r_usb_pmsc/src/inc/r_usb_pmsc.h | 6 +- .../sockets_wrapper.c | 22 +- .../sockets_wrapper.h | 0 .../rm_block_media_ram/rm_block_media_ram.c | 765 +++++ ra/fsp/src/rm_comms_lock/rm_comms_lock.c | 215 ++ ra/fsp/src/rm_comms_lock/rm_comms_lock.h | 95 + ra/fsp/src/rm_comms_uart/rm_comms_uart.c | 428 +++ .../rm_freertos_plus_tcp/NetworkInterface.c | 2 + ra/fsp/src/rm_mbedtls/x509_crt.c | 2764 +++++++---------- .../rm_mqtt_onchip_da16xxx.c | 867 ++++++ .../inc/rm_netx_secure_crypto.h | 17 + .../rm_netx_secure_crypto/nx_crypto_aes_alt.c | 59 +- .../rm_netx_secure_crypto/nx_crypto_ccm_alt.c | 670 ++++ .../nx_crypto_ccm_alt_process.c | 448 +++ .../nx_crypto_gcm_alt_process.c | 2 + ra/fsp/src/rm_psa_crypto/aes_alt.c | 1693 +++++----- ra/fsp/src/rm_psa_crypto/ccm_alt.c | 710 +++++ ra/fsp/src/rm_psa_crypto/ccm_alt_process.c | 341 ++ ra/fsp/src/rm_psa_crypto/cipher_alt.c | 1359 ++++---- ra/fsp/src/rm_psa_crypto/cmac_alt.c | 667 ++-- ra/fsp/src/rm_psa_crypto/ctr_drbg_alt.c | 520 ++-- ra/fsp/src/rm_psa_crypto/ecdh_alt.c | 585 ++-- ra/fsp/src/rm_psa_crypto/ecdsa_alt.c | 51 +- ra/fsp/src/rm_psa_crypto/ecp_alt.c | 2761 ++++++++-------- ra/fsp/src/rm_psa_crypto/ecp_curves_alt.c | 1092 +++++-- ra/fsp/src/rm_psa_crypto/gcm_alt.c | 870 +++--- ra/fsp/src/rm_psa_crypto/inc/ccm_alt.h | 108 + ra/fsp/src/rm_psa_crypto/rsa_alt.c | 2387 +++++++------- ra/fsp/src/rm_psa_crypto/sha256_alt.c | 562 ++-- .../rm_rai_data_collector.c | 554 ++++ .../rm_rai_data_shipper/rm_rai_data_shipper.c | 336 ++ .../rm_tinycrypt_port_aes_decrypt.c | 45 +- .../rm_tinycrypt_port_aes_encrypt.c | 72 +- .../rm_tinycrypt_port_cbc_mode.c | 184 +- .../rm_tinycrypt_port_ctr_mode.c | 141 +- .../rm_tinycrypt_port_gcm_mode.c | 504 +++ ra/fsp/src/rm_usbx_port/rm_usbx_port.c | 38 +- ra/fsp/src/rm_vee_flash/rm_vee_flash.c | 69 +- .../rm_wifi_api_da16xxx.c} | 24 +- .../rm_wifi_onchip_da16xxx.c} | 1112 ++++--- .../iaq_1st_gen/rm_zmod4410_iaq_1st_gen.c | 40 + .../src/rm_zmod4xxx/iaq_2nd_gen/iaq_2nd_gen.h | 125 +- .../iaq_2nd_gen/rm_zmod4410_iaq_2nd_gen.c | 54 +- .../iaq_2nd_gen/zmod4410_config_iaq2.h | 111 +- .../iaq_2nd_gen_ulp/iaq_2nd_gen_ulp.h | 116 +- .../rm_zmod4410_iaq_2nd_gen_ulp.c | 44 +- .../zmod4410_config_iaq2_ulp.h | 114 +- .../oaq_1st_gen/rm_zmod4510_oaq_1st_gen.c | 40 + .../oaq_2nd_gen/rm_zmod4510_oaq_2nd_gen.c | 40 + .../src/rm_zmod4xxx/odor/rm_zmod4410_odor.c | 40 + ra/fsp/src/rm_zmod4xxx/pbaq/pbaq.h | 94 + .../src/rm_zmod4xxx/pbaq/rm_zmod4410_pbaq.c | 406 +++ .../rm_zmod4xxx/pbaq/zmod4410_config_pbaq.h | 92 + ra/fsp/src/rm_zmod4xxx/raq/rm_zmod4450_raq.c | 40 + ra/fsp/src/rm_zmod4xxx/rel_iaq/rel_iaq.h | 90 + .../rm_zmod4xxx/rel_iaq/rm_zmod4410_rel_iaq.c | 401 +++ .../rel_iaq/zmod4410_config_rel_iaq.h | 90 + .../src/rm_zmod4xxx/rel_iaq_ulp/rel_iaq_ulp.h | 89 + .../rel_iaq_ulp/rm_zmod4410_rel_iaq_ulp.c | 403 +++ .../rel_iaq_ulp/zmod4410_config_rel_iaq_ulp.h | 90 + ra/fsp/src/rm_zmod4xxx/rm_zmod4xxx.c | 70 + .../sulfur_odor/rm_zmod4410_sulfur_odor.c | 40 + 197 files changed, 27627 insertions(+), 11652 deletions(-) rename ra/fsp/inc/{ => api}/fsp_common_api.h (100%) create mode 100644 ra/fsp/inc/api/r_smci_api.h create mode 100644 ra/fsp/inc/api/rm_rai_data_collector_api.h create mode 100644 ra/fsp/inc/api/rm_rai_data_shipper_api.h create mode 100644 ra/fsp/inc/instances/r_sci_smci.h create mode 100644 ra/fsp/inc/instances/rm_block_media_ram.h create mode 100644 ra/fsp/inc/instances/rm_comms_uart.h create mode 100644 ra/fsp/inc/instances/rm_mqtt_onchip_da16xxx.h create mode 100644 ra/fsp/inc/instances/rm_rai_data_collector.h create mode 100644 ra/fsp/inc/instances/rm_rai_data_shipper.h rename ra/fsp/inc/instances/{rm_wifi_onchip_da16200.h => rm_wifi_onchip_da16xxx.h} (65%) rename ra/fsp/src/r_canfd/.util/{Renesas##HAL Drivers##all##r_canfd####4.4.0.xml.j2 => Renesas##HAL Drivers##all##r_canfd####4.5.0.xml.j2} (95%) create mode 100644 ra/fsp/src/r_sce/aes2/ctr_mode.c create mode 100644 ra/fsp/src/r_sce/aes2/gcm_mode.c create mode 100644 ra/fsp/src/r_sci_smci/r_sci_smci.c rename ra/fsp/src/{rm_aws_sockets_wrapper_wifi_da16200 => rm_aws_sockets_wrapper_wifi_da16xxx}/sockets_wrapper.c (94%) rename ra/fsp/src/{rm_aws_sockets_wrapper_wifi_da16200 => rm_aws_sockets_wrapper_wifi_da16xxx}/sockets_wrapper.h (100%) create mode 100644 ra/fsp/src/rm_block_media_ram/rm_block_media_ram.c create mode 100644 ra/fsp/src/rm_comms_lock/rm_comms_lock.c create mode 100644 ra/fsp/src/rm_comms_lock/rm_comms_lock.h create mode 100644 ra/fsp/src/rm_comms_uart/rm_comms_uart.c create mode 100644 ra/fsp/src/rm_mqtt_onchip_da16xxx/rm_mqtt_onchip_da16xxx.c create mode 100644 ra/fsp/src/rm_netx_secure_crypto/nx_crypto_ccm_alt.c create mode 100644 ra/fsp/src/rm_netx_secure_crypto/nx_crypto_ccm_alt_process.c create mode 100644 ra/fsp/src/rm_psa_crypto/ccm_alt.c create mode 100644 ra/fsp/src/rm_psa_crypto/ccm_alt_process.c create mode 100644 ra/fsp/src/rm_psa_crypto/inc/ccm_alt.h create mode 100644 ra/fsp/src/rm_rai_data_collector/rm_rai_data_collector.c create mode 100644 ra/fsp/src/rm_rai_data_shipper/rm_rai_data_shipper.c create mode 100644 ra/fsp/src/rm_tinycrypt_port/rm_tinycrypt_port_gcm_mode.c rename ra/fsp/src/{rm_wifi_onchip_da16200/rm_wifi_api_da16200.c => rm_wifi_onchip_da16xxx/rm_wifi_api_da16xxx.c} (94%) rename ra/fsp/src/{rm_wifi_onchip_da16200/rm_wifi_onchip_da16200.c => rm_wifi_onchip_da16xxx/rm_wifi_onchip_da16xxx.c} (74%) create mode 100644 ra/fsp/src/rm_zmod4xxx/pbaq/pbaq.h create mode 100644 ra/fsp/src/rm_zmod4xxx/pbaq/rm_zmod4410_pbaq.c create mode 100644 ra/fsp/src/rm_zmod4xxx/pbaq/zmod4410_config_pbaq.h create mode 100644 ra/fsp/src/rm_zmod4xxx/rel_iaq/rel_iaq.h create mode 100644 ra/fsp/src/rm_zmod4xxx/rel_iaq/rm_zmod4410_rel_iaq.c create mode 100644 ra/fsp/src/rm_zmod4xxx/rel_iaq/zmod4410_config_rel_iaq.h create mode 100644 ra/fsp/src/rm_zmod4xxx/rel_iaq_ulp/rel_iaq_ulp.h create mode 100644 ra/fsp/src/rm_zmod4xxx/rel_iaq_ulp/rm_zmod4410_rel_iaq_ulp.c create mode 100644 ra/fsp/src/rm_zmod4xxx/rel_iaq_ulp/zmod4410_config_rel_iaq_ulp.h diff --git a/README.md b/README.md index 5259452bf..a17ac8e4f 100644 --- a/README.md +++ b/README.md @@ -10,7 +10,7 @@ FSP uses an open software ecosystem and provides flexibility in using your prefe ### Current Release -[FSP v4.4.0](https://github.com/renesas/fsp/releases/tag/v4.4.0) +[FSP v4.5.0](https://github.com/renesas/fsp/releases/tag/v4.5.0) ### Supported RA MCU Kits @@ -80,7 +80,7 @@ When using the zipped version of the packs the zip file should be extracted into #### For new users that are using FSP with e² studio -1. Download the FSP with e² studio Installer from the Assets section of the [current release](https://github.com/renesas/fsp/releases/tag/v4.4.0). +1. Download the FSP with e² studio Installer from the Assets section of the [current release](https://github.com/renesas/fsp/releases/tag/v4.5.0). 2. Run the installer. This will install the e² studio tool, FSP packs, GCC toolchain and other tools required to use this software. No additional installations are required. #### If using RA Smart Configurator (RASC) with IAR Embedded Workbench or Keil MDK #### diff --git a/SUPPORTED_SOFTWARE.md b/SUPPORTED_SOFTWARE.md index 678a9111e..d5e5aa31a 100644 --- a/SUPPORTED_SOFTWARE.md +++ b/SUPPORTED_SOFTWARE.md @@ -13,6 +13,8 @@ * [Operational Amplifier (r_opamp)](https://renesas.github.io/fsp/group___o_p_a_m_p.html) * Artificial Intelligence * [Arm CMSIS5 NN Library Source](https://arm-software.github.io/CMSIS-NN/latest/index.html) + * [Data Collector (rm_rai_data_collector)](https://renesas.github.io/fsp/group___r_m___r_a_i__d_a_t_a___c_o_l_l_e_c_t_o_r.html) + * [Data Shipper (rm_rai_data_shipper)](https://renesas.github.io/fsp/group___r_m___r_a_i___d_a_t_a___s_h_i_p_p_e_r.html) * Audio * [ADPCM Decoder (rm_adpcm_decoder)](https://renesas.github.io/fsp/group___r_m___a_d_p_c_m___d_e_c_o_d_e_r.html) * [Audio Playback PWM (rm_audio_playback_pwm)](https://renesas.github.io/fsp/group___r_m___a_u_d_i_o___p_l_a_y_b_a_c_k___p_w_m.html) @@ -49,12 +51,14 @@ * [I2C Slave (r_iic_slave)](https://renesas.github.io/fsp/group___i_i_c___s_l_a_v_e.html) * [I2S (r_ssi)](https://renesas.github.io/fsp/group___s_s_i.html) * [I3C (r_i3c)](https://renesas.github.io/fsp/group___i3_c.html) + * [SMCI (r_sci_smci)](https://renesas.github.io/fsp/group___s_c_i___s_m_c_i.html) * [SPI (r_sci_b_spi)](https://renesas.github.io/fsp/group___s_c_i___b___s_p_i.html) * [SPI (r_sci_spi)](https://renesas.github.io/fsp/group___s_c_i___s_p_i.html) * [SPI (r_spi)](https://renesas.github.io/fsp/group___s_p_i.html) * [SPI (r_spi_b)](https://renesas.github.io/fsp/group___s_p_i___b.html) * [UART (r_sci_b_uart)](https://renesas.github.io/fsp/group___s_c_i___b___u_a_r_t.html) * [UART (r_sci_uart)](https://renesas.github.io/fsp/group___s_c_i___u_a_r_t.html) + * [UART Communication Device (rm_comms_uart)](https://renesas.github.io/fsp/group___r_m___c_o_m_m_s___u_a_r_t.html) * [USB Composite (r_usb_composite)](https://renesas.github.io/fsp/group___u_s_b.html) * [USB HCDC (r_usb_hcdc)](https://renesas.github.io/fsp/group___u_s_b___h_c_d_c.html) * [USB HHID (r_usb_hhid)](https://renesas.github.io/fsp/group___u_s_b___h_h_i_d.html) @@ -179,6 +183,7 @@ * [Azure RTOS NetX Duo IP Instance](https://docs.microsoft.com/en-us/azure/rtos/netx-duo/chapter3) * [Azure RTOS NetX Duo IoT Middleware](https://docs.microsoft.com/en-us/azure/rtos/netx-duo/overview-netx-duo) * [Azure RTOS NetX Duo MQTT Client](https://docs.microsoft.com/en-us/azure/rtos/netx-duo/netx-duo-mqtt/chapter1) + * [Azure RTOS NetX Duo NAT](https://docs.microsoft.com/en-us/azure/rtos/netx-duo/netx-duo-nat/chapter1) * [Azure RTOS NetX Duo POP3 Client](https://docs.microsoft.com/en-us/azure/rtos/netx-duo/netx-duo-pop3-client/chapter1) * [Azure RTOS NetX Duo Packet Pool Instance](https://docs.microsoft.com/en-us/azure/rtos/netx-duo/chapter3) * [Azure RTOS NetX Duo SMTP Client](https://docs.microsoft.com/en-us/azure/rtos/netx-duo/netx-duo-smtp-client/chapter1) @@ -197,6 +202,7 @@ * [Ethernet (r_ether_phy)](https://renesas.github.io/fsp/group___e_t_h_e_r___p_h_y.html) * [FreeRTOS+TCP](https://www.freertos.org/FreeRTOS-Plus/FreeRTOS_Plus_TCP/TCP_IP_Configuration.html) * [GTL BLE Abstraction (rm_ble_abs_gtl)](https://renesas.github.io/fsp/group___b_l_e___a_b_s.html) + * [MQTT Client on DA16XXX (rm_mqtt_onchip_da16xxx)](https://renesas.github.io/fsp/) * [PTP (r_ptp)](https://renesas.github.io/fsp/group___p_t_p.html) * [SPP BLE Abstraction (rm_ble_abs_spp)](https://renesas.github.io/fsp/group___b_l_e___a_b_s.html) * Power @@ -235,6 +241,7 @@ * [Azure RTOS FileX on USBX](https://docs.microsoft.com/en-us/azure/rtos/filex/overview-filex) * [Azure RTOS LevelX NOR on SPI Memory](https://docs.microsoft.com/en-us/azure/rtos/levelx/) * [Block Media Custom Implementation (rm_block_media_user)](https://renesas.github.io/fsp/group___r_m___b_l_o_c_k___m_e_d_i_a___u_s_e_r.html) + * [Block Media RAM Implementation (rm_block_media_ram)](https://renesas.github.io/fsp/group___r_m___b_l_o_c_k___m_e_d_i_a___r_a_m.html) * [Block Media SD/MMC (rm_block_media_sdmmc)](https://renesas.github.io/fsp/group___r_m___b_l_o_c_k___m_e_d_i_a___s_d_m_m_c.html) * [Block Media SPI Flash (rm_block_media_spi)](https://renesas.github.io/fsp/group___r_m___b_l_o_c_k___m_e_d_i_a___s_p_i.html) * [Block Media USB (rm_block_media_usb)](https://renesas.github.io/fsp/group___r_m___b_l_o_c_k___m_e_d_i_a___u_s_b.html) @@ -254,10 +261,10 @@ * Timers * [Port Output Enable for GPT (r_poeg)](https://renesas.github.io/fsp/group___p_o_e_g.html) * [Realtime Clock (r_rtc)](https://renesas.github.io/fsp/group___r_t_c.html) + * [Realtime Clock with Independent Power Supply (r_irtc)](https://renesas.github.io/fsp/group___i_r_t_c.html) * [Three-Phase PWM (r_gpt_three_phase)](https://renesas.github.io/fsp/group___g_p_t___t_h_r_e_e___p_h_a_s_e.html) * [Timer, General PWM (r_gpt)](https://renesas.github.io/fsp/group___g_p_t.html) * [Timer, Low-Power (r_agt)](https://renesas.github.io/fsp/group___a_g_t.html) - * [Timer, Ultra-Low-Power (r_ulpt)](https://renesas.github.io/fsp/group___u_l_p_t.html) * Transfer * [Transfer (r_dmac)](https://renesas.github.io/fsp/group___d_m_a_c.html) * [Transfer (r_dtc)](https://renesas.github.io/fsp/group___d_t_c.html) @@ -304,6 +311,7 @@ * [AWS Core HTTP](https://renesas.github.io/fsp/_f_r_e_e_r_t_o_s__m_i_g_r_a_t_i_o_n.html) * [AWS Core JSON](https://github.com/FreeRTOS/coreJSON/) * [AWS Core MQTT](https://renesas.github.io/fsp/_f_r_e_e_r_t_o_s__m_i_g_r_a_t_i_o_n.html) + * [AWS DA16xxx WiFi Sockets Wrapper (rm_aws_sockets_wrapper_da16xxx)](https://docs.aws.amazon.com/embedded-csdk/latest/lib-ref/libraries/standard/coreMQTT/docs/doxygen/output/html/mqtt_transport_interface.html) * [AWS Demo dev_mode_key_provisioning](https://docs.aws.amazon.com/freertos/latest/userguide/dev-mode-key-provisioning.html) * [AWS Demo dev_mode_key_provisioning (No Longer Supported)](https://renesas.github.io/fsp/_f_r_e_e_r_t_o_s__m_i_g_r_a_t_i_o_n.html) * [AWS FreeRTOS+TCP MbedTLS Bio](https://docs.aws.amazon.com/embedded-csdk/latest/lib-ref/libraries/standard/coreMQTT/docs/doxygen/output/html/mqtt_transport_interface.html) @@ -320,8 +328,6 @@ * [AWS Silex WiFi Sockets Wrapper (rm_aws_sockets_wrapper_silex)](https://docs.aws.amazon.com/embedded-csdk/latest/lib-ref/libraries/standard/coreMQTT/docs/doxygen/output/html/mqtt_transport_interface.html) * [AWS TCP Sockets Wrapper](https://docs.aws.amazon.com/embedded-csdk/latest/lib-ref/libraries/standard/coreMQTT/docs/doxygen/output/html/mqtt_transport_interface.html) * [AWS Transport Interface on Secure Sockets (No Longer Supported)](https://renesas.github.io/fsp/_f_r_e_e_r_t_o_s__m_i_g_r_a_t_i_o_n.html) - * [AWS WiFi Common](https://docs.aws.amazon.com/freertos/latest/userguide/freertos-wifi.html) - * [AWS da16200 WiFi Sockets Wrapper (rm_aws_sockets_wrapper_da16200)](https://docs.aws.amazon.com/embedded-csdk/latest/lib-ref/libraries/standard/coreMQTT/docs/doxygen/output/html/mqtt_transport_interface.html) * [Azure EWF Heap Allocator](https://azure.github.io/embedded-wireless-framework/html/index.html) * [Azure EWF Interface on r_uart](https://azure.github.io/embedded-wireless-framework/html/index.html) * [Azure EWF Memory Pool Allocator](https://azure.github.io/embedded-wireless-framework/html/index.html) @@ -330,7 +336,6 @@ * [Azure EWF Platform on ThreadX](https://azure.github.io/embedded-wireless-framework/html/index.html) * [Azure EWF ThreadX Allocator](https://azure.github.io/embedded-wireless-framework/html/index.html) * [Azure Embedded Wireless Framework Common](https://azure.github.io/embedded-wireless-framework/html/index.html) - * [Azure RTOS NetX Duo NAT](https://docs.microsoft.com/en-us/azure/rtos/netx-duo/netx-duo-nat/chapter1) * [BLE Driver (r_ble_balance)](https://renesas.github.io/fsp/group___b_l_e___b_a_l_a_n_c_e.html) * [BLE Driver (r_ble_balance_freertos)](https://renesas.github.io/fsp/group___b_l_e___b_a_l_a_n_c_e.html) * [BLE Driver (r_ble_balance_threadx)](https://renesas.github.io/fsp/group___b_l_e___b_a_l_a_n_c_e.html) @@ -353,8 +358,9 @@ * [NetX Duo WiFi Driver (rm_netxduo_wifi)](https://docs.microsoft.com/en-us/azure/rtos/netx-duo/chapter5) * [RYZ012 SPP Driver Layer](https://renesas.github.io/fsp/group___b_l_e___a_b_s___s_p_p.html) * [TinyCBOR](https://github.com/intel/tinycbor/) + * [WiFi Common](https://docs.aws.amazon.com/freertos/latest/userguide/freertos-wifi.html) + * [WiFi Onchip DA16xxx Driver using r_sci_uart (rm_wifi_onchip_da16xxx)](https://renesas.github.io/fsp/group___w_i_f_i___o_n_c_h_i_p___d_a16200.html) * [WiFi Onchip Silex Driver using r_sci_uart (rm_wifi_onchip_silex)](https://renesas.github.io/fsp/group___w_i_f_i___o_n_c_h_i_p___s_i_l_e_x.html) - * [WiFi Onchip da16200 Driver using r_sci_uart (rm_wifi_onchip_da16200)](https://renesas.github.io/fsp/group___w_i_f_i___o_n_c_h_i_p___d_a16200.html) * Security * [Azure RTOS NetX Crypto HW Acceleration (rm_netx_secure_crypto)](https://renesas.github.io/fsp/group___r_m___n_e_t_x___s_e_c_u_r_e___c_r_y_p_t_o.html) * [Azure RTOS NetX Crypto Software Only](https://renesas.github.io/fsp/group___r_m___n_e_t_x___s_e_c_u_r_e___c_r_y_p_t_o.html) @@ -387,6 +393,9 @@ * [ZMOD4410 IAQ 2nd Generation (rm_zmod4xxx)](https://renesas.github.io/fsp/group___r_m___z_m_o_d4_x_x_x.html) * [ZMOD4410 IAQ 2nd Generation Ultra Low Power (rm_zmod4xxx)](https://renesas.github.io/fsp/group___r_m___z_m_o_d4_x_x_x.html) * [ZMOD4410 Odor (rm_zmod4xxx)](https://renesas.github.io/fsp/group___r_m___z_m_o_d4_x_x_x.html) + * [ZMOD4410 PBAQ (rm_zmod4xxx)](https://renesas.github.io/fsp/group___r_m___z_m_o_d4_x_x_x.html) + * [ZMOD4410 Relative IAQ (rm_zmod4xxx)](https://renesas.github.io/fsp/group___r_m___z_m_o_d4_x_x_x.html) + * [ZMOD4410 Relative IAQ Ultra Low Power (rm_zmod4xxx)](https://renesas.github.io/fsp/group___r_m___z_m_o_d4_x_x_x.html) * [ZMOD4410 Sulfur-based Odor (rm_zmod4xxx)](https://renesas.github.io/fsp/group___r_m___z_m_o_d4_x_x_x.html) * [ZMOD4450 RAQ (rm_zmod4xxx)](https://renesas.github.io/fsp/group___r_m___z_m_o_d4_x_x_x.html) * [ZMOD4510 OAQ 1st Generation (rm_zmod4xxx)](https://renesas.github.io/fsp/group___r_m___z_m_o_d4_x_x_x.html) diff --git a/ra/fsp/inc/fsp_common_api.h b/ra/fsp/inc/api/fsp_common_api.h similarity index 100% rename from ra/fsp/inc/fsp_common_api.h rename to ra/fsp/inc/api/fsp_common_api.h diff --git a/ra/fsp/inc/api/r_adc_api.h b/ra/fsp/inc/api/r_adc_api.h index 54893f84e..a25f7122b 100644 --- a/ra/fsp/inc/api/r_adc_api.h +++ b/ra/fsp/inc/api/r_adc_api.h @@ -183,8 +183,9 @@ typedef enum e_adc_group_mask /** ADC states. */ typedef enum e_adc_state { - ADC_STATE_IDLE = 0, ///< ADC is idle - ADC_STATE_SCAN_IN_PROGRESS = 1, ///< ADC scan in progress + ADC_STATE_IDLE = 0, ///< ADC is idle + ADC_STATE_SCAN_IN_PROGRESS = 1, ///< ADC scan in progress + ADC_STATE_CALIBRATION_IN_PROGRESS = 2, ///< ADC calibration in progress - Not used by all ADC instances } adc_state_t; /** ADC status. */ diff --git a/ra/fsp/inc/api/r_ioport_api.h b/ra/fsp/inc/api/r_ioport_api.h index 3ebc3aaa8..03f45b2f0 100644 --- a/ra/fsp/inc/api/r_ioport_api.h +++ b/ra/fsp/inc/api/r_ioport_api.h @@ -115,14 +115,23 @@ typedef enum e_ioport_peripheral /** Pin will function as a segment LCD peripheral pin */ IOPORT_PERIPHERAL_LCDC = (0x0DUL << IOPORT_PRV_PFS_PSEL_OFFSET), +#if BSP_FEATURE_SCI_UART_DE_IS_INVERTED /** Pin will function as an SCI peripheral DEn pin */ IOPORT_PERIPHERAL_DE_SCI1_3_5_7_9 = (0x0DUL << IOPORT_PRV_PFS_PSEL_OFFSET), + /** Pin will function as an SCI DEn peripheral pin */ + IOPORT_PERIPHERAL_DE_SCI0_2_4_6_8 = (0x0EUL << IOPORT_PRV_PFS_PSEL_OFFSET), +#else + /** Pin will function as an SCI peripheral DEn pin */ + IOPORT_PERIPHERAL_DE_SCI0_2_4_6_8 = (0x0DUL << IOPORT_PRV_PFS_PSEL_OFFSET), + + /** Pin will function as an SCI DEn peripheral pin */ + IOPORT_PERIPHERAL_DE_SCI1_3_5_7_9 = (0x0EUL << IOPORT_PRV_PFS_PSEL_OFFSET), +#endif + /** Pin will function as a DALI peripheral pin */ IOPORT_PERIPHERAL_DALI = (0x0EUL << IOPORT_PRV_PFS_PSEL_OFFSET), - /** Pin will function as an SCI DEn peripheral pin */ - IOPORT_PERIPHERAL_DE_SCI0_2_4_6_8 = (0x0EUL << IOPORT_PRV_PFS_PSEL_OFFSET), /** Pin will function as a CEU peripheral pin */ IOPORT_PERIPHERAL_CEU = (0x0FUL << IOPORT_PRV_PFS_PSEL_OFFSET), diff --git a/ra/fsp/inc/api/r_lpm_api.h b/ra/fsp/inc/api/r_lpm_api.h index ad7c91140..f46377b15 100644 --- a/ra/fsp/inc/api/r_lpm_api.h +++ b/ra/fsp/inc/api/r_lpm_api.h @@ -71,33 +71,37 @@ typedef enum e_lpm_mode /** Snooze request sources */ typedef enum e_lpm_snooze_request { - LPM_SNOOZE_REQUEST_RXD0_FALLING = 0x00000000ULL, ///< Enable RXD0 falling edge snooze request - LPM_SNOOZE_REQUEST_IRQ0 = 0x00000001ULL, ///< Enable IRQ0 pin snooze request - LPM_SNOOZE_REQUEST_IRQ1 = 0x00000002ULL, ///< Enable IRQ1 pin snooze request - LPM_SNOOZE_REQUEST_IRQ2 = 0x00000004ULL, ///< Enable IRQ2 pin snooze request - LPM_SNOOZE_REQUEST_IRQ3 = 0x00000008ULL, ///< Enable IRQ3 pin snooze request - LPM_SNOOZE_REQUEST_IRQ4 = 0x00000010ULL, ///< Enable IRQ4 pin snooze request - LPM_SNOOZE_REQUEST_IRQ5 = 0x00000020ULL, ///< Enable IRQ5 pin snooze request - LPM_SNOOZE_REQUEST_IRQ6 = 0x00000040ULL, ///< Enable IRQ6 pin snooze request - LPM_SNOOZE_REQUEST_IRQ7 = 0x00000080ULL, ///< Enable IRQ7 pin snooze request - LPM_SNOOZE_REQUEST_IRQ8 = 0x00000100ULL, ///< Enable IRQ8 pin snooze request - LPM_SNOOZE_REQUEST_IRQ9 = 0x00000200ULL, ///< Enable IRQ9 pin snooze request - LPM_SNOOZE_REQUEST_IRQ10 = 0x00000400ULL, ///< Enable IRQ10 pin snooze request - LPM_SNOOZE_REQUEST_IRQ11 = 0x00000800ULL, ///< Enable IRQ11 pin snooze request - LPM_SNOOZE_REQUEST_IRQ12 = 0x00001000ULL, ///< Enable IRQ12 pin snooze request - LPM_SNOOZE_REQUEST_IRQ13 = 0x00002000ULL, ///< Enable IRQ13 pin snooze request - LPM_SNOOZE_REQUEST_IRQ14 = 0x00004000ULL, ///< Enable IRQ14 pin snooze request - LPM_SNOOZE_REQUEST_IRQ15 = 0x00008000ULL, ///< Enable IRQ15 pin snooze request - LPM_SNOOZE_REQUEST_KEY = 0x00020000ULL, ///< Enable KR snooze request - LPM_SNOOZE_REQUEST_ACMPHS0 = 0x00400000ULL, ///< Enable High-speed analog comparator 0 snooze request - LPM_SNOOZE_REQUEST_RTC_ALARM = 0x01000000ULL, ///< Enable RTC alarm snooze request - LPM_SNOOZE_REQUEST_RTC_PERIOD = 0x02000000ULL, ///< Enable RTC period snooze request - LPM_SNOOZE_REQUEST_AGT1_UNDERFLOW = 0x10000000ULL, ///< Enable AGT1 underflow snooze request - LPM_SNOOZE_REQUEST_AGT1_COMPARE_A = 0x20000000ULL, ///< Enable AGT1 compare match A snooze request - LPM_SNOOZE_REQUEST_AGT1_COMPARE_B = 0x40000000ULL, ///< Enable AGT1 compare match B snooze request - LPM_SNOOZE_REQUEST_AGT3_UNDERFLOW = 0x100000000ULL, ///< Enable AGT3 underflow snooze request - LPM_SNOOZE_REQUEST_AGT3_COMPARE_A = 0x200000000ULL, ///< Enable AGT3 compare match A snooze request - LPM_SNOOZE_REQUEST_AGT3_COMPARE_B = 0x400000000ULL, ///< Enable AGT3 compare match B snooze request + LPM_SNOOZE_REQUEST_RXD0_FALLING = 0x00000000ULL, ///< Enable RXD0 falling edge snooze request + LPM_SNOOZE_REQUEST_IRQ0 = 0x00000001ULL, ///< Enable IRQ0 pin snooze request + LPM_SNOOZE_REQUEST_IRQ1 = 0x00000002ULL, ///< Enable IRQ1 pin snooze request + LPM_SNOOZE_REQUEST_IRQ2 = 0x00000004ULL, ///< Enable IRQ2 pin snooze request + LPM_SNOOZE_REQUEST_IRQ3 = 0x00000008ULL, ///< Enable IRQ3 pin snooze request + LPM_SNOOZE_REQUEST_IRQ4 = 0x00000010ULL, ///< Enable IRQ4 pin snooze request + LPM_SNOOZE_REQUEST_IRQ5 = 0x00000020ULL, ///< Enable IRQ5 pin snooze request + LPM_SNOOZE_REQUEST_IRQ6 = 0x00000040ULL, ///< Enable IRQ6 pin snooze request + LPM_SNOOZE_REQUEST_IRQ7 = 0x00000080ULL, ///< Enable IRQ7 pin snooze request + LPM_SNOOZE_REQUEST_IRQ8 = 0x00000100ULL, ///< Enable IRQ8 pin snooze request + LPM_SNOOZE_REQUEST_IRQ9 = 0x00000200ULL, ///< Enable IRQ9 pin snooze request + LPM_SNOOZE_REQUEST_IRQ10 = 0x00000400ULL, ///< Enable IRQ10 pin snooze request + LPM_SNOOZE_REQUEST_IRQ11 = 0x00000800ULL, ///< Enable IRQ11 pin snooze request + LPM_SNOOZE_REQUEST_IRQ12 = 0x00001000ULL, ///< Enable IRQ12 pin snooze request + LPM_SNOOZE_REQUEST_IRQ13 = 0x00002000ULL, ///< Enable IRQ13 pin snooze request + LPM_SNOOZE_REQUEST_IRQ14 = 0x00004000ULL, ///< Enable IRQ14 pin snooze request + LPM_SNOOZE_REQUEST_IRQ15 = 0x00008000ULL, ///< Enable IRQ15 pin snooze request + LPM_SNOOZE_REQUEST_KEY = 0x00020000ULL, ///< Enable KR snooze request + LPM_SNOOZE_REQUEST_ACMPHS0 = 0x00400000ULL, ///< Enable High-speed analog comparator 0 snooze request + LPM_SNOOZE_REQUEST_RTC_ALARM1 = 0x00800000ULL, ///< Enable RTC alarm 1 snooze request + LPM_SNOOZE_REQUEST_RTC_ALARM = 0x01000000ULL, ///< Enable RTC alarm snooze request + LPM_SNOOZE_REQUEST_RTC_PERIOD = 0x02000000ULL, ///< Enable RTC period snooze request + LPM_SNOOZE_REQUEST_AGT1_UNDERFLOW = 0x10000000ULL, ///< Enable AGT1 underflow snooze request + LPM_SNOOZE_REQUEST_AGTW1_UNDERFLOW = 0x10000000ULL, ///< Enable AGTW1 underflow snooze request + LPM_SNOOZE_REQUEST_AGT1_COMPARE_A = 0x20000000ULL, ///< Enable AGT1 compare match A snooze request + LPM_SNOOZE_REQUEST_AGTW1_COMPARE_A = 0x20000000ULL, ///< Enable AGTW1 compare match A snooze request + LPM_SNOOZE_REQUEST_AGT1_COMPARE_B = 0x40000000ULL, ///< Enable AGT1 compare match B snooze request + LPM_SNOOZE_REQUEST_AGTW1_COMPARE_B = 0x40000000ULL, ///< Enable AGTW1 compare match B snooze request + LPM_SNOOZE_REQUEST_AGT3_UNDERFLOW = 0x100000000ULL, ///< Enable AGT3 underflow snooze request + LPM_SNOOZE_REQUEST_AGT3_COMPARE_A = 0x200000000ULL, ///< Enable AGT3 compare match A snooze request + LPM_SNOOZE_REQUEST_AGT3_COMPARE_B = 0x400000000ULL, ///< Enable AGT3 compare match B snooze request } lpm_snooze_request_t; /** Snooze end control */ @@ -105,6 +109,7 @@ typedef enum e_lpm_snooze_end { LPM_SNOOZE_END_STANDBY_WAKE_SOURCES = 0x00U, ///< Transition from Snooze to Normal mode directly LPM_SNOOZE_END_AGT1_UNDERFLOW = 0x01U, ///< AGT1 underflow + LPM_SNOOZE_END_AGTW1_UNDERFLOW = 0x01U, ///< AGTW1 underflow LPM_SNOOZE_END_DTC_TRANS_COMPLETE = 0x02U, ///< Last DTC transmission completion LPM_SNOOZE_END_DTC_TRANS_COMPLETE_NEGATED = 0x04U, ///< Not Last DTC transmission completion LPM_SNOOZE_END_ADC0_COMPARE_MATCH = 0x08U, ///< ADC Channel 0 compare match @@ -152,48 +157,64 @@ typedef enum e_lpm_snooze_dtc /** Wake from deep sleep or standby mode sources, does not apply to sleep or deep standby modes */ typedef enum e_lpm_standby_wake_source { - LPM_STANDBY_WAKE_SOURCE_IRQ0 = 0x00000001ULL, ///< IRQ0 - LPM_STANDBY_WAKE_SOURCE_IRQ1 = 0x00000002ULL, ///< IRQ1 - LPM_STANDBY_WAKE_SOURCE_IRQ2 = 0x00000004ULL, ///< IRQ2 - LPM_STANDBY_WAKE_SOURCE_IRQ3 = 0x00000008ULL, ///< IRQ3 - LPM_STANDBY_WAKE_SOURCE_IRQ4 = 0x00000010ULL, ///< IRQ4 - LPM_STANDBY_WAKE_SOURCE_IRQ5 = 0x00000020ULL, ///< IRQ5 - LPM_STANDBY_WAKE_SOURCE_IRQ6 = 0x00000040ULL, ///< IRQ6 - LPM_STANDBY_WAKE_SOURCE_IRQ7 = 0x00000080ULL, ///< IRQ7 - LPM_STANDBY_WAKE_SOURCE_IRQ8 = 0x00000100ULL, ///< IRQ8 - LPM_STANDBY_WAKE_SOURCE_IRQ9 = 0x00000200ULL, ///< IRQ9 - LPM_STANDBY_WAKE_SOURCE_IRQ10 = 0x00000400ULL, ///< IRQ10 - LPM_STANDBY_WAKE_SOURCE_IRQ11 = 0x00000800ULL, ///< IRQ11 - LPM_STANDBY_WAKE_SOURCE_IRQ12 = 0x00001000ULL, ///< IRQ12 - LPM_STANDBY_WAKE_SOURCE_IRQ13 = 0x00002000ULL, ///< IRQ13 - LPM_STANDBY_WAKE_SOURCE_IRQ14 = 0x00004000ULL, ///< IRQ14 - LPM_STANDBY_WAKE_SOURCE_IRQ15 = 0x00008000ULL, ///< IRQ15 - LPM_STANDBY_WAKE_SOURCE_IWDT = 0x00010000ULL, ///< Independent watchdog interrupt - LPM_STANDBY_WAKE_SOURCE_KEY = 0x00020000ULL, ///< Key interrupt - LPM_STANDBY_WAKE_SOURCE_LVD1 = 0x00040000ULL, ///< Low Voltage Detection 1 interrupt - LPM_STANDBY_WAKE_SOURCE_LVD2 = 0x00080000ULL, ///< Low Voltage Detection 2 interrupt - LPM_STANDBY_WAKE_SOURCE_VBATT = 0x00100000ULL, ///< VBATT Monitor interrupt - LPM_STANDBY_WAKE_SOURCE_ACMPHS0 = 0x00400000ULL, ///< Analog Comparator High-speed 0 interrupt - LPM_STANDBY_WAKE_SOURCE_ACMPLP0 = 0x00800000ULL, ///< Analog Comparator Low-speed 0 interrupt - LPM_STANDBY_WAKE_SOURCE_RTCALM = 0x01000000ULL, ///< RTC Alarm interrupt - LPM_STANDBY_WAKE_SOURCE_RTCPRD = 0x02000000ULL, ///< RTC Period interrupt - LPM_STANDBY_WAKE_SOURCE_USBHS = 0x04000000ULL, ///< USB High-speed interrupt - LPM_STANDBY_WAKE_SOURCE_USBFS = 0x08000000ULL, ///< USB Full-speed interrupt - LPM_STANDBY_WAKE_SOURCE_AGT1UD = 0x10000000ULL, ///< AGT1 underflow interrupt - LPM_STANDBY_WAKE_SOURCE_AGT1CA = 0x20000000ULL, ///< AGT1 compare match A interrupt - LPM_STANDBY_WAKE_SOURCE_AGT1CB = 0x40000000ULL, ///< AGT1 compare match B interrupt - LPM_STANDBY_WAKE_SOURCE_IIC0 = 0x80000000ULL, ///< I2C 0 interrupt - LPM_STANDBY_WAKE_SOURCE_AGT3UD = 0x100000000ULL, ///< AGT3 underflow interrupt - LPM_STANDBY_WAKE_SOURCE_AGT3CA = 0x200000000ULL, ///< AGT3 compare match A interrupt - LPM_STANDBY_WAKE_SOURCE_AGT3CB = 0x400000000ULL, ///< AGT3 compare match B interrupt - LPM_STANDBY_WAKE_SOURCE_COMPHS0 = 0x800000000ULL, ///< Comparator-HS0 Interrupt - LPM_STANDBY_WAKE_SOURCE_ULP0U = 0x10000000000ULL, ///< ULPT0 Underflow Interrupt - LPM_STANDBY_WAKE_SOURCE_ULP0A = 0x20000000000ULL, ///< ULPT0 Compare Match A Interrupt - LPM_STANDBY_WAKE_SOURCE_ULP0B = 0x40000000000ULL, ///< ULPT0 Compare Match B Interrupt - LPM_STANDBY_WAKE_SOURCE_I3C0 = 0x800000000000ULL, ///< I3C0 address match interrupt - LPM_STANDBY_WAKE_SOURCE_ULP1U = 0x1000000000000ULL, ///< ULPT1 Underflow Interrupt - LPM_STANDBY_WAKE_SOURCE_ULP1A = 0x2000000000000ULL, ///< ULPT1 Compare Match A Interrupt - LPM_STANDBY_WAKE_SOURCE_ULP1B = 0x4000000000000ULL, ///< ULPT1 Compare Match B Interrupt + LPM_STANDBY_WAKE_SOURCE_IRQ0 = 0x00000001ULL, ///< IRQ0 + LPM_STANDBY_WAKE_SOURCE_IRQ1 = 0x00000002ULL, ///< IRQ1 + LPM_STANDBY_WAKE_SOURCE_IRQ2 = 0x00000004ULL, ///< IRQ2 + LPM_STANDBY_WAKE_SOURCE_IRQ3 = 0x00000008ULL, ///< IRQ3 + LPM_STANDBY_WAKE_SOURCE_IRQ4 = 0x00000010ULL, ///< IRQ4 + LPM_STANDBY_WAKE_SOURCE_IRQ5 = 0x00000020ULL, ///< IRQ5 + LPM_STANDBY_WAKE_SOURCE_IRQ6 = 0x00000040ULL, ///< IRQ6 + LPM_STANDBY_WAKE_SOURCE_IRQ7 = 0x00000080ULL, ///< IRQ7 + LPM_STANDBY_WAKE_SOURCE_IRQ8 = 0x00000100ULL, ///< IRQ8 + LPM_STANDBY_WAKE_SOURCE_IRQ9 = 0x00000200ULL, ///< IRQ9 + LPM_STANDBY_WAKE_SOURCE_IRQ10 = 0x00000400ULL, ///< IRQ10 + LPM_STANDBY_WAKE_SOURCE_IRQ11 = 0x00000800ULL, ///< IRQ11 + LPM_STANDBY_WAKE_SOURCE_IRQ12 = 0x00001000ULL, ///< IRQ12 + LPM_STANDBY_WAKE_SOURCE_IRQ13 = 0x00002000ULL, ///< IRQ13 + LPM_STANDBY_WAKE_SOURCE_IRQ14 = 0x00004000ULL, ///< IRQ14 + LPM_STANDBY_WAKE_SOURCE_IRQ15 = 0x00008000ULL, ///< IRQ15 + LPM_STANDBY_WAKE_SOURCE_IWDT = 0x00010000ULL, ///< Independent watchdog interrupt + LPM_STANDBY_WAKE_SOURCE_KEY = 0x00020000ULL, ///< Key interrupt + LPM_STANDBY_WAKE_SOURCE_LVD1 = 0x00040000ULL, ///< Low Voltage Detection 1 interrupt + LPM_STANDBY_WAKE_SOURCE_LVD2 = 0x00080000ULL, ///< Low Voltage Detection 2 interrupt + LPM_STANDBY_WAKE_SOURCE_VBATT = 0x00100000ULL, ///< VBATT Monitor interrupt + LPM_STANDBY_WAKE_SOURCE_VRTC = 0x00200000ULL, ///< LVDVRTC interrupt + LPM_STANDBY_WAKE_SOURCE_EXLVD = 0x00400000ULL, ///< LVDEXLVD interrupt + LPM_STANDBY_WAKE_SOURCE_ACMPHS0 = 0x00400000ULL, ///< Analog Comparator High-speed 0 interrupt + LPM_STANDBY_WAKE_SOURCE_ACMPLP0 = 0x00800000ULL, ///< Analog Comparator Low-speed 0 interrupt + LPM_STANDBY_WAKE_SOURCE_RTCALM1 = 0x00800000ULL, ///< RTC Alarm interrupt 1 + LPM_STANDBY_WAKE_SOURCE_RTCALM = 0x01000000ULL, ///< RTC Alarm interrupt + LPM_STANDBY_WAKE_SOURCE_RTCPRD = 0x02000000ULL, ///< RTC Period interrupt + LPM_STANDBY_WAKE_SOURCE_USBHS = 0x04000000ULL, ///< USB High-speed interrupt + LPM_STANDBY_WAKE_SOURCE_USBFS = 0x08000000ULL, ///< USB Full-speed interrupt + LPM_STANDBY_WAKE_SOURCE_AGTW0UD = 0x08000000ULL, ///< AGTW0 Underflow interrupt + LPM_STANDBY_WAKE_SOURCE_AGTW1UD = 0x10000000ULL, ///< AGTW1 Underflow interrupt + LPM_STANDBY_WAKE_SOURCE_AGTW1CA = 0x20000000ULL, ///< AGTW1 Compare Match A interrupt + LPM_STANDBY_WAKE_SOURCE_AGTW1CB = 0x40000000ULL, ///< AGTW1 Compare Match B interrupt + LPM_STANDBY_WAKE_SOURCE_AGT1UD = 0x10000000ULL, ///< AGT1 Underflow interrupt + LPM_STANDBY_WAKE_SOURCE_AGT1CA = 0x20000000ULL, ///< AGT1 Compare Match A interrupt + LPM_STANDBY_WAKE_SOURCE_AGT1CB = 0x40000000ULL, ///< AGT1 Compare Match B interrupt + LPM_STANDBY_WAKE_SOURCE_IIC0 = 0x80000000ULL, ///< I2C 0 interrupt + LPM_STANDBY_WAKE_SOURCE_AGT0UD = 0x100000000ULL, ///< AGT0 Underflow interrupt + LPM_STANDBY_WAKE_SOURCE_AGT3UD = 0x100000000ULL, ///< AGT3 Underflow interrupt + LPM_STANDBY_WAKE_SOURCE_AGT1UD_S = 0x200000000ULL, ///< AGT1 Underflow interrupt for specific board + LPM_STANDBY_WAKE_SOURCE_AGT3CA = 0x200000000ULL, ///< AGT3 Compare Match A interrupt + LPM_STANDBY_WAKE_SOURCE_AGT2UD = 0x400000000ULL, ///< AGT2 Underflow interrupt + LPM_STANDBY_WAKE_SOURCE_AGT3CB = 0x400000000ULL, ///< AGT3 Compare Match B interrupt + LPM_STANDBY_WAKE_SOURCE_AGT3UD_S = 0x800000000ULL, ///< AGT3 Underflow interrupt for specific board + LPM_STANDBY_WAKE_SOURCE_COMPHS0 = 0x800000000ULL, ///< Comparator-HS0 Interrupt + LPM_STANDBY_WAKE_SOURCE_AGT4UD = 0x1000000000ULL, ///< AGT4 Underflow interrupt + LPM_STANDBY_WAKE_SOURCE_AGT5UD = 0x2000000000ULL, ///< AGT5 Underflow interrupt + LPM_STANDBY_WAKE_SOURCE_AGT6UD = 0x4000000000ULL, ///< AGT6 Underflow interrupt + LPM_STANDBY_WAKE_SOURCE_AGT7UD = 0x8000000000ULL, ///< AGT7 Underflow interrupt + LPM_STANDBY_WAKE_SOURCE_SOSTD = 0x10000000000ULL, ///< SOSTD interrupt + LPM_STANDBY_WAKE_SOURCE_ULP0U = 0x10000000000ULL, ///< ULPT0 Underflow Interrupt + LPM_STANDBY_WAKE_SOURCE_ULP0A = 0x20000000000ULL, ///< ULPT0 Compare Match A Interrupt + LPM_STANDBY_WAKE_SOURCE_ULP0B = 0x40000000000ULL, ///< ULPT0 Compare Match B Interrupt + LPM_STANDBY_WAKE_SOURCE_I3C0 = 0x80000000000ULL, ///< I3C0 address match interrupt + LPM_STANDBY_WAKE_SOURCE_ULP1U = 0x100000000000ULL, ///< ULPT1 Underflow Interrupt + LPM_STANDBY_WAKE_SOURCE_ULP1A = 0x200000000000ULL, ///< ULPT1 Compare Match A Interrupt + LPM_STANDBY_WAKE_SOURCE_ULP1B = 0x400000000000ULL, ///< ULPT1 Compare Match B Interrupt } lpm_standby_wake_source_t; typedef uint64_t lpm_standby_wake_source_bits_t; diff --git a/ra/fsp/inc/api/r_lvd_api.h b/ra/fsp/inc/api/r_lvd_api.h index ce9af107f..0eaf66bea 100644 --- a/ra/fsp/inc/api/r_lvd_api.h +++ b/ra/fsp/inc/api/r_lvd_api.h @@ -84,6 +84,19 @@ typedef enum LVD_THRESHOLD_MONITOR_2_LEVEL_2_99V = 0x05UL, ///< 2.99V LVD_THRESHOLD_MONITOR_2_LEVEL_2_92V = 0x06UL, ///< 2.92V LVD_THRESHOLD_MONITOR_2_LEVEL_2_85V = 0x07UL, ///< 2.85V + + LVD_THRESHOLD_EXLVDVBAT_LEVEL_3_1V = 0x06UL, ///< 3.1V + LVD_THRESHOLD_EXLVDVBAT_LEVEL_2_9V = 0x05UL, ///< 2.9V + LVD_THRESHOLD_EXLVDVBAT_LEVEL_2_8V = 0x04UL, ///< 2.8V + LVD_THRESHOLD_EXLVDVBAT_LEVEL_2_7V = 0x03UL, ///< 2.7V + LVD_THRESHOLD_EXLVDVBAT_LEVEL_2_6V = 0x02UL, ///< 2.6V + LVD_THRESHOLD_EXLVDVBAT_LEVEL_2_4V = 0x01UL, ///< 2.4V + LVD_THRESHOLD_EXLVDVBAT_LEVEL_2_2V = 0x00UL, ///< 2.2V + + LVD_THRESHOLD_LVDVRTC_LEVEL_2_8V = 0x03UL, ///< 2.8V + LVD_THRESHOLD_LVDVRTC_LEVEL_2_6V = 0x02UL, ///< 2.6V + LVD_THRESHOLD_LVDVRTC_LEVEL_2_4V = 0x01UL, ///< 2.4V + LVD_THRESHOLD_LVDVRTC_LEVEL_2_2V = 0x00UL ///< 2.2V } lvd_threshold_t; /** Response types for handling threshold crossing event. */ diff --git a/ra/fsp/inc/api/r_rtc_api.h b/ra/fsp/inc/api/r_rtc_api.h index e72958c07..cdb5fa9a7 100644 --- a/ra/fsp/inc/api/r_rtc_api.h +++ b/ra/fsp/inc/api/r_rtc_api.h @@ -61,10 +61,18 @@ FSP_HEADER /** Events that can trigger a callback function */ typedef enum e_rtc_event { - RTC_EVENT_ALARM_IRQ, ///< Real Time Clock ALARM IRQ + RTC_EVENT_ALARM_IRQ, ///< Real Time Clock ALARM 0 IRQ + RTC_EVENT_ALARM1_IRQ, ///< Real Time Clock ALARM 1 IRQ RTC_EVENT_PERIODIC_IRQ, ///< Real Time Clock PERIODIC IRQ } rtc_event_t; +/** RTC alarm channel */ +typedef enum e_rtc_alarm_channel +{ + RTC_ALARM_CHANNEL_0, + RTC_ALARM_CHANNEL_1, +} rtc_alarm_channel_t; + /** Callback function parameter data */ typedef struct st_rtc_callback_args { @@ -139,14 +147,15 @@ typedef struct tm rtc_time_t; /** Alarm time setting structure */ typedef struct st_rtc_alarm_time { - rtc_time_t time; ///< Time structure - bool sec_match; ///< Enable the alarm based on a match of the seconds field - bool min_match; ///< Enable the alarm based on a match of the minutes field - bool hour_match; ///< Enable the alarm based on a match of the hours field - bool mday_match; ///< Enable the alarm based on a match of the days field - bool mon_match; ///< Enable the alarm based on a match of the months field - bool year_match; ///< Enable the alarm based on a match of the years field - bool dayofweek_match; ///< Enable the alarm based on a match of the dayofweek field + rtc_time_t time; ///< Time structure + bool sec_match; ///< Enable the alarm based on a match of the seconds field + bool min_match; ///< Enable the alarm based on a match of the minutes field + bool hour_match; ///< Enable the alarm based on a match of the hours field + bool mday_match; ///< Enable the alarm based on a match of the days field + bool mon_match; ///< Enable the alarm based on a match of the months field + bool year_match; ///< Enable the alarm based on a match of the years field + bool dayofweek_match; ///< Enable the alarm based on a match of the dayofweek field + rtc_alarm_channel_t channel; ///< Select alarm 0 or alarm 1 } rtc_alarm_time_t; /** RTC Information Structure for information returned by infoGet() */ diff --git a/ra/fsp/inc/api/r_slcdc_api.h b/ra/fsp/inc/api/r_slcdc_api.h index 41083504c..2c8057397 100644 --- a/ra/fsp/inc/api/r_slcdc_api.h +++ b/ra/fsp/inc/api/r_slcdc_api.h @@ -62,6 +62,7 @@ typedef enum e_slcd_time_slice SLCDC_SLICE_2 = 1, ///< 2-time slice SLCDC_SLICE_3 = 2, ///< 3-time slice SLCDC_SLICE_4 = 3, ///< 4-time slice + SLCDC_SLICE_6 = 4, ///< 6-time slice SLCDC_SLICE_8 = 5, ///< 8-time slice } slcdc_time_slice_t; @@ -80,6 +81,16 @@ typedef enum e_slcd_drive_volt_gen SLCDC_VOLT_CAPACITOR, ///< Capacitor split method } slcdc_drive_volt_gen_t; +/** LCD Reference Voltage Selection.*/ +typedef enum e_slcd_ref_volt_sel +{ + ///< Select VL1 reference for internal voltage or VCC reference for capacitor split or external division + SLCDC_REF_INTERNAL_VL1_CAPACITOR_VCC_EXTERNAL = 0, + + ///< Select VL2 reference for internal voltage or VL4 reference for capacitor split + SLCDC_REF_INTERNAL_VL2_CAPACITOR_VL4 = 1, +} slcdc_ref_volt_sel_t; + /** Display Data Area Control*/ typedef enum e_slcd_display_area_control_blink { @@ -113,7 +124,14 @@ typedef enum e_slcd_contrast SLCDC_CONTRAST_12, ///< Contrast level 12 SLCDC_CONTRAST_13, ///< Contrast level 13 SLCDC_CONTRAST_14, ///< Contrast level 14 - SLCDC_CONTRAST_15 ///< Contrast level 15 + SLCDC_CONTRAST_15, ///< Contrast level 15 + SLCDC_CONTRAST_16, ///< Contrast level 16 + SLCDC_CONTRAST_17, ///< Contrast level 17 + SLCDC_CONTRAST_18, ///< Contrast level 18 + SLCDC_CONTRAST_19, ///< Contrast level 19 + SLCDC_CONTRAST_20, ///< Contrast level 20 + SLCDC_CONTRAST_21, ///< Contrast level 21 + SLCDC_CONTRAST_22, ///< Contrast level 22 } slcdc_contrast_t; /** LCD Display Enable/Disable*/ @@ -137,6 +155,7 @@ typedef enum e_slcd_display_clock SLCDC_CLOCK_SOSC = 0x01, ///< Display clock source SOSC SLCDC_CLOCK_MOSC = 0x02, ///< Display clock source MOSC SLCDC_CLOCK_HOCO = 0x03, ///< Display clock source HOCO + SLCDC_CLOCK_MOCO = 0x04, ///< Display clock source MOCO } slcdc_display_clock_t; /** LCD clock settings */ @@ -165,6 +184,7 @@ typedef enum e_slcdc_clk_div SLCDC_CLK_DIVISOR_HOCO_262144, ///< HOCO Clock/262144 SLCDC_CLK_DIVISOR_HOCO_524288 = 0x2B, ///< HOCO Clock/524288 + SLCDC_CLK_DIVISOR_HOCO_1048576 = 0x3B, ///< HOCO Clock/1048576 } slcdc_clk_div_t; /** SLCDC configuration block */ @@ -177,6 +197,7 @@ typedef struct st_slcdc_cfg slcdc_waveform_t waveform; ///< LCD display waveform select (LWAVE bit) slcdc_drive_volt_gen_t drive_volt_gen; ///< LCD Drive Voltage Generator Select (MDSET bit) slcdc_contrast_t contrast; ///< LCD Boost Level (contrast setting) + slcdc_ref_volt_sel_t ref_volt_sel; ///< LCD reference voltage selection (MDSET2 bit) } slcdc_cfg_t; /** SLCDC control block. Allocate an instance specific control block to pass into the SLCDC API calls. diff --git a/ra/fsp/inc/api/r_smci_api.h b/ra/fsp/inc/api/r_smci_api.h new file mode 100644 index 000000000..6e0df9e3f --- /dev/null +++ b/ra/fsp/inc/api/r_smci_api.h @@ -0,0 +1,313 @@ +/*********************************************************************************************************************** + * Copyright [2020-2023] Renesas Electronics Corporation and/or its affiliates. All Rights Reserved. + * + * This software and documentation are supplied by Renesas Electronics America Inc. and may only be used with products + * of Renesas Electronics Corp. and its affiliates ("Renesas"). No other uses are authorized. Renesas products are + * sold pursuant to Renesas terms and conditions of sale. Purchasers are solely responsible for the selection and use + * of Renesas products and Renesas assumes no liability. No license, express or implied, to any intellectual property + * right is granted by Renesas. This software is protected under all applicable laws, including copyright laws. Renesas + * reserves the right to change or discontinue this software and/or this documentation. THE SOFTWARE AND DOCUMENTATION + * IS DELIVERED TO YOU "AS IS," AND RENESAS MAKES NO REPRESENTATIONS OR WARRANTIES, AND TO THE FULLEST EXTENT + * PERMISSIBLE UNDER APPLICABLE LAW, DISCLAIMS ALL WARRANTIES, WHETHER EXPLICITLY OR IMPLICITLY, INCLUDING WARRANTIES + * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, AND NONINFRINGEMENT, WITH RESPECT TO THE SOFTWARE OR + * DOCUMENTATION. RENESAS SHALL HAVE NO LIABILITY ARISING OUT OF ANY SECURITY VULNERABILITY OR BREACH. TO THE MAXIMUM + * EXTENT PERMITTED BY LAW, IN NO EVENT WILL RENESAS BE LIABLE TO YOU IN CONNECTION WITH THE SOFTWARE OR DOCUMENTATION + * (OR ANY PERSON OR ENTITY CLAIMING RIGHTS DERIVED FROM YOU) FOR ANY LOSS, DAMAGES, OR CLAIMS WHATSOEVER, INCLUDING, + * WITHOUT LIMITATION, ANY DIRECT, CONSEQUENTIAL, SPECIAL, INDIRECT, PUNITIVE, OR INCIDENTAL DAMAGES; ANY LOST PROFITS, + * OTHER ECONOMIC DAMAGE, PROPERTY DAMAGE, OR PERSONAL INJURY; AND EVEN IF RENESAS HAS BEEN ADVISED OF THE POSSIBILITY + * OF SUCH LOSS, DAMAGES, CLAIMS OR COSTS. + **********************************************************************************************************************/ + +/*******************************************************************************************************************//** + * @ingroup RENESAS_INTERFACES + * @defgroup SMCI_API SMCI Interface + * @brief Interface for SMCI communications. + * + * @section SMCI_INTERFACE_SUMMARY Summary + * The SMCI interface provides common APIs for SMCI HAL drivers. The SMCI interface supports the following features: + * - Interrupt driven transmit/receive processing + * - Callback function with returned event code + * - Runtime baud-rate change (baud = 1/ETU) + * - Hardware resource locking during a transaction + * + * Implemented by: + * - @ref SCI_SMCI + * + * @{ + **********************************************************************************************************************/ + +#ifndef R_SMCI_API_H +#define R_SMCI_API_H + +/*********************************************************************************************************************** + * Includes + **********************************************************************************************************************/ + +/* Includes board and MCU related header files. */ +#include "bsp_api.h" + +/* Common macro for FSP header files. There is also a corresponding FSP_FOOTER macro at the end of this file. */ +FSP_HEADER + +/********************************************************************************************************************** + * Macro definitions + **********************************************************************************************************************/ + +/********************************************************************************************************************** + * Typedef definitions + **********************************************************************************************************************/ + +typedef enum e_smci_state +{ + SMCI_STATE_IDLE_CLOCK_OFF = 0U, ///< SMCI idle state with no clock output + SMCI_STATE_TX_RX_IDLE = 1U, ///< SMCI is in idle state, clock is active + SMCI_STATE_TX_PROGRESSING = 2U, ///< Transmission is in progress + SMCI_STATE_RX_PROGRESSING = 3U, ///< Reception is in progress +} smci_state_t; + +/** SMCI Event codes */ +typedef enum e_smci_event +{ + SMCI_EVENT_RX_COMPLETE = (1UL << 0), ///< Receive complete event + SMCI_EVENT_TX_COMPLETE = (1UL << 1), ///< Transmit complete event + SMCI_EVENT_RX_CHAR = (1UL << 2), ///< Character transfer is completed + SMCI_EVENT_ERR_PARITY = (1UL << 3), ///< Parity error event + SMCI_EVENT_ERR_LOW_SIGNAL = (1UL << 4), ///< Low error signal response occurred event + SMCI_EVENT_ERR_OVERRUN = (1UL << 5), ///< Overrun error event + SMCI_EVENT_BREAK_DETECT = (1UL << 6), ///< Character received + SMCI_EVENT_TX_DATA_EMPTY = (1UL << 7), ///< Last byte is transmitting, ready for more data +} smci_event_t; + +typedef enum e_smci_convention_type +{ + SMCI_CONVENTION_TYPE_DIRECT = 0U, ///< Direct convention type (LSB First, High=1) + SMCI_CONVENTION_TYPE_INVERSE = 1U, ///< Inverse convention type (MSB First, Low=1) +} smci_convention_type_t; + +/* This table matches Table 7 from ISO/IEC7816-3 Third edition 2006-11-01 */ +typedef enum e_smci_clock_conversion_integer +{ + SMCI_CLOCK_CONVERSION_INTEGER_372_4 = 0U, ///< 372 base cycles for 1-bit period, max freq = 4Mhz + SMCI_CLOCK_CONVERSION_INTEGER_372_5 = 1U, ///< 372 base cycles for 1-bit period, max freq = 5Mhz + SMCI_CLOCK_CONVERSION_INTEGER_558_6 = 2U, ///< 558 base cycles for 1-bit period, max freq = 6Mhz + SMCI_CLOCK_CONVERSION_INTEGER_744_8 = 3U, ///< 744 base cycles for 1-bit period, max freq = 8Mhz + SMCI_CLOCK_CONVERSION_INTEGER_1116_12 = 4U, ///< 1116 base cycles for 1-bit period, max freq = 12Mhz + SMCI_CLOCK_CONVERSION_INTEGER_1488_16 = 5U, ///< 1488 base cycles for 1-bit period, max freq = 16Mhz + SMCI_CLOCK_CONVERSION_INTEGER_1860_20 = 6U, ///< 1860 base cycles for 1-bit period, max freq = 20Mhz + SMCI_CLOCK_CONVERSION_INTEGER_UNSUPPORTED7 = 7U, ///< Unsupported Clock Cycles + SMCI_CLOCK_CONVERSION_INTEGER_UNSUPPORTED8 = 8U, ///< Unsupported Clock Cycles + SMCI_CLOCK_CONVERSION_INTEGER_512_5 = 9U, ///< 512 base cycles for 1-bit period, max freq = 5Mhz + SMCI_CLOCK_CONVERSION_INTEGER_768_75 = 10U, ///< 768 base cycles for 1-bit period, max freq = 7.5Mhz + SMCI_CLOCK_CONVERSION_INTEGER_1024_10 = 11U, ///< 1024 base cycles for 1-bit period, max freq = 10Mhz + SMCI_CLOCK_CONVERSION_INTEGER_1536_15 = 12U, ///< 1536 base cycles for 1-bit period, max freq = 15Mhz + SMCI_CLOCK_CONVERSION_INTEGER_2048_20 = 13U, ///< 2048 base cycles for 1-bit period, max freq = 20Mhz + SMCI_CLOCK_CONVERSION_INTEGER_UNSUPPORTED14 = 14U, ///< Unsupported Clock Cycles + SMCI_CLOCK_CONVERSION_INTEGER_UNSUPPORTED15 = 15U, ///< Unsupported Clock Cycles + SMCI_CLOCK_CONVERSION_INTEGER_MAX = 16U +} smci_clock_conversion_integer_t; + +/* This table matches Table 7 from ISO/IEC7816-3 Third edition 2006-11-01 */ +typedef enum e_smci_baudrate_adjustment_integer +{ + SMCI_BAUDRATE_ADJUSTMENT_INTEGER_RFU0 = 0U, ///< RESERVED + SMCI_BAUDRATE_ADJUSTMENT_INTEGER_1 = 1U, ///< Di=1 + SMCI_BAUDRATE_ADJUSTMENT_INTEGER_2 = 2U, ///< Di=2 + SMCI_BAUDRATE_ADJUSTMENT_INTEGER_4 = 3U, ///< Di=4 + SMCI_BAUDRATE_ADJUSTMENT_INTEGER_8 = 4U, ///< Di=8 + SMCI_BAUDRATE_ADJUSTMENT_INTEGER_16 = 5U, ///< Di=16 + SMCI_BAUDRATE_ADJUSTMENT_INTEGER_32 = 6U, ///< Di=32 + SMCI_BAUDRATE_ADJUSTMENT_INTEGER_64 = 7U, ///< Di=64 + SMCI_BAUDRATE_ADJUSTMENT_INTEGER_12 = 8U, ///< Di=12 + SMCI_BAUDRATE_ADJUSTMENT_INTEGER_20 = 9U, ///< Di=20 + SMCI_BAUDRATE_ADJUSTMENT_INTEGER_RFU10 = 10U, ///< RESERVED + SMCI_BAUDRATE_ADJUSTMENT_INTEGER_RFU11 = 11U, ///< RESERVED + SMCI_BAUDRATE_ADJUSTMENT_INTEGER_RFU12 = 12U, ///< RESERVED + SMCI_BAUDRATE_ADJUSTMENT_INTEGER_RFU13 = 13U, ///< RESERVED + SMCI_BAUDRATE_ADJUSTMENT_INTEGER_RFU14 = 14U, ///< RESERVED + SMCI_BAUDRATE_ADJUSTMENT_INTEGER_RFU15 = 15U, ///< RESERVED + SMCI_BAUDRATE_ADJUSTMENT_INTEGER_MAX = 16U +} smci_baudrate_adjustment_integer_t; + +/** SMCI Protocol Type according to ISO7816-3 */ +typedef enum e_smci_protocol_type +{ + SMCI_PROTOCOL_TYPE_T0 = 0U, ///< Normal mode operation (Protocol T = 0) + SMCI_PROTOCOL_TYPE_T1 = 1U, ///< Block transfer mode operation (Protocol T = 1) +} smci_protocol_type_t; + +/** SMCI driver specific information */ +typedef struct st_smci_status +{ + smci_state_t smci_state; ///< State ot the smci state machine + uint32_t bytes_recvd; ///< Bytes read into receive buffer since read was called +} smci_status_t; + +/** SMCI Transfer Mode settings */ +typedef struct st_smci_transfer_mode +{ + smci_protocol_type_t protocol; ///< Protocol (Normal t=0, or Block t=1) + smci_convention_type_t convention; ///< Convention Direct or Inverse + bool gsm_mode; ///< True=GMS Mode, false=Normal +} smci_transfer_mode_t; + +/** SMCI settings that are used as inputs to register setting calculations */ +typedef struct st_smci_speed_params +{ + uint32_t baudrate; ///< Bits per second requested, 1/ETU + smci_baudrate_adjustment_integer_t di; ///< Referred to as D in ISO spec (from Table 8 in ISO7816-3 3rd Edition) + smci_clock_conversion_integer_t fi; ///< Index of in ISO spec (from Table 8 in ISO7816-3 3rd Edition) +} smci_speed_params_t; + +/** SMCI Callback parameter definition */ +typedef struct st_smci_callback_args +{ + uint32_t channel; ///< Device channel number + smci_event_t event; ///< Event code + + /** Contains the next character received for the events SMCI_EVENT_RX_CHAR, SMCI_EVENT_ERR_PARITY, + * SMCI_EVENT_ERR_LOW_SIGNAL, or SMCI_EVENT_ERR_OVERRUN. Otherwise unused. */ + uint8_t data; ///< Data Byte to process + void const * p_context; ///< Context provided to user during callback +} smci_callback_args_t; + +/** Configuration Structure for SMCI */ +typedef struct st_smci_cfg +{ + /* SMCI configuration */ + uint8_t channel; ///< Channel number of the hardware. + uint8_t rxi_ipl; ///< Receive interrupt priority + uint8_t txi_ipl; ///< Transmit interrupt priority + uint8_t eri_ipl; ///< Error interrupt priority + IRQn_Type rxi_irq; ///< Receive interrupt IRQ number + IRQn_Type txi_irq; ///< Transmit interrupt IRQ number + IRQn_Type eri_irq; ///< Error interrupt IRQ number + + /* Configuration for SMCI Event processing */ + void (* p_callback)(smci_callback_args_t * p_args); ///< Pointer to callback function + void const * p_context; ///< User defined context passed into callback function + + /* Pointer to SMCI peripheral specific configuration */ + void const * p_extend; ///< SMCI hardware dependent configuration +} smci_cfg_t; + +/** Smart Card Interface control block. Allocate an instance specific control block to pass into the SMCI API calls. + * @par Implemented as + * - smci_instance_ctrl_t + */ +typedef void smci_ctrl_t; + +/** Shared Interface definition for SMCI */ +typedef struct st_smci_api +{ + /** Open Smart Card Interface Mode (SMCI) + * @par Implemented as + * - @ref R_SCI_SMCI_Open() + * + * @param[in,out] p_ctrl Pointer to the SMCI control block. Must be declared by user. Value set here. + * @param[in] smci_cfg_t Pointer to SMCI configuration structure. All elements of this structure must be set by + * user. + */ + fsp_err_t (* open)(smci_ctrl_t * const p_ctrl, smci_cfg_t const * const p_cfg); + + /** Read from Smart Card device. The read buffer is used until the read is complete. When a transfer is complete, + * the callback is called with event SMCI_EVENT_RX_COMPLETE. Bytes received outside an active transfer are received + * in the callback function with event SMCI_EVENT_RX_CHAR. + * @par Implemented as + * - @ref R_SCI_SMCI_Read() + * + * @param[in] p_ctrl Pointer to the SMCI control block for the channel. + * @param[in] p_dest Destination address to read data from. + * @param[in] bytes Read data length. + */ + fsp_err_t (* read)(smci_ctrl_t * const p_ctrl, uint8_t * const p_dest, uint32_t const bytes); + + /** Write to Smart Card device. The write buffer is used until write is complete. Do not overwrite write buffer + * contents until the write is finished. When the write is complete (all bytes are fully transmitted on the wire), + * the callback called with event SMCI_EVENT_TX_COMPLETE. + * @par Implemented as + * - @ref R_SCI_SMCI_Write() + * + * @param[in] p_ctrl Pointer to the SMCI control block. + * @param[in] p_src Source address to write data to. + * @param[in] bytes Write data length. + */ + fsp_err_t (* write)(smci_ctrl_t * const p_ctrl, uint8_t const * const p_src, uint32_t const bytes); + + /** Change the peripheral settings based on provided transfer mode and data convention type + * @par Implemented as + * - @ref R_SCI_SMCI_TransferModeSet() + * + * @param[in] p_ctrl Pointer to the SMCI control block. + * @param[in] p_transfer_mode_params Pointer to SMCI setting like protocol, convention, and gsm_mode + */ + fsp_err_t (* transferModeSet)(smci_ctrl_t * const p_ctrl, + smci_transfer_mode_t const * const p_transfer_mode_params); + + /** Change baud rate. + * @warning Calling this API aborts any in-progress transmission and disables reception until the new baud + * settings have been applied. + * + * @par Implemented as + * - @ref R_SCI_SMCI_BaudSet() + * + * @param[in] p_ctrl Pointer to the SMCI control block. + * @param[in] p_baud_setting Pointer to module specific setting for configuring baud rate. + */ + fsp_err_t (* baudSet)(smci_ctrl_t * const p_ctrl, void const * const p_baud_setting); + + /** Get the driver specific information. + * @par Implemented as + * - @ref R_SCI_SMCI_StatusGet() + * + * @param[in] p_ctrl Pointer to the SMCI control block. + * @param[out] p_status State info for the driver. + */ + fsp_err_t (* statusGet)(smci_ctrl_t * const p_ctrl, smci_status_t * const p_status); + + /** + * Enable or disable the SMCI clock to control the start of the activation or de-activation + * @par Implemented as + * - @ref R_SCI_SMCI_ClockControl() + * + * @param[in] p_ctrl Pointer to the SMCI control block. + * @param[in] clock_enable True: enables clock output, False disables it + */ + fsp_err_t (* clockControl)(smci_ctrl_t * const p_ctrl, bool clock_enable); + + /** + * Specify callback function and optional context pointer and callback memory pointer. + * @par Implemented as + * - SMCI_CallbackSet() + * + * @param[in] p_ctrl Pointer to the SMCI control block. + * @param[in] p_callback Callback function + * @param[in] p_context Pointer to send to callback function + * @param[in] p_callback_memory Pointer to volatile memory where callback structure can be allocated. + * Callback arguments allocated here are only valid during the callback. + */ + fsp_err_t (* callbackSet)(smci_ctrl_t * const p_api_ctrl, void (* p_callback)(smci_callback_args_t *), + void const * const p_context, smci_callback_args_t * const p_callback_memory); + + /** Close SMCI device. + * @par Implemented as + * - @ref R_SCI_SMCI_Close() + * + * @param[in] p_ctrl Pointer to the SMCI control block. + */ + fsp_err_t (* close)(smci_ctrl_t * const p_ctrl); +} smci_api_t; + +/** This structure encompasses everything that is needed to use an instance of this interface. */ +typedef struct st_smci_instance +{ + smci_ctrl_t * p_ctrl; ///< Pointer to the control structure for this instance + smci_cfg_t const * p_cfg; ///< Pointer to the configuration structure for this instance + smci_api_t const * p_api; ///< Pointer to the API structure for this instance +} smci_instance_t; + +/** @} (end defgroup SMCI_API) */ + +/* Common macro for FSP header files. There is also a corresponding FSP_HEADER macro at the top of this file. */ +FSP_FOOTER + +#endif /* R_SMCI_API_H */ diff --git a/ra/fsp/inc/api/r_spi_flash_api.h b/ra/fsp/inc/api/r_spi_flash_api.h index 733d793a0..20be993f3 100644 --- a/ra/fsp/inc/api/r_spi_flash_api.h +++ b/ra/fsp/inc/api/r_spi_flash_api.h @@ -25,10 +25,6 @@ * * @section SPI_FLASH_API_SUMMARY Summary * The SPI flash API provides an interface that configures, writes, and erases sectors in SPI flash devices. - * - * Implemented by: - * - @ref OSPI - * - @ref QSPI * @{ **********************************************************************************************************************/ @@ -69,16 +65,35 @@ typedef enum e_spi_flash_read_mode /** SPI protocol. */ typedef enum e_spi_flash_protocol { - SPI_FLASH_PROTOCOL_EXTENDED_SPI = 0, ///< Extended SPI mode (commands on 1 line) + /** Extended SPI mode (commands on 1 line) or 1S-1S-1S protocol mode on OSPI_B. */ + SPI_FLASH_PROTOCOL_EXTENDED_SPI = 0x000, /** QPI mode (commands on 4 lines). Note that the application must ensure the device is in QPI mode. */ - SPI_FLASH_PROTOCOL_QPI = 2, + SPI_FLASH_PROTOCOL_QPI = 0x002, /** SOPI mode (command and data on 8 lines). Note that the application must ensure the device is in SOPI mode. */ - SPI_FLASH_PROTOCOL_SOPI = 3, + SPI_FLASH_PROTOCOL_SOPI = 0x003, /** DOPI mode (command and data on 8 lines, dual data rate). Note that the application must ensure the device is in DOPI mode. */ - SPI_FLASH_PROTOCOL_DOPI = 4, + SPI_FLASH_PROTOCOL_DOPI = 0x004, + + /** 4S-4D-4D protocol mode on OSPI_B. */ + SPI_FLASH_PROTOCOL_4S_4D_4D = 0x3B2, + + /** 8D-8D-8D protocol mode on OSPI_B. */ + SPI_FLASH_PROTOCOL_8D_8D_8D = 0x3FF, + + /** 1S-2S-2S protocol mode on OSPI_B. */ + SPI_FLASH_PROTOCOL_1S_2S_2S = 0x048, + + /** 2S-2S-2S protocol mode on OSPI_B. */ + SPI_FLASH_PROTOCOL_2S_2S_2S = 0x049, + + /** 1S-4S-4S protocol mode on OSPI_B. */ + SPI_FLASH_PROTOCOL_1S_4S_4S = 0x090, + + /** 4S-4S-4S protocol mode on OSPI_B. */ + SPI_FLASH_PROTOCOL_4S_4S_4S = 0x092 } spi_flash_protocol_t; /** Number of bytes in the address. */ @@ -142,12 +157,16 @@ typedef struct st_spi_flash_erase_command /** Structure to define a direct transfer. */ typedef struct st_spi_flash_direct_transfer { + union + { + uint64_t data_u64; ///< Data (64-bit) + uint32_t data; ///< Data + }; uint32_t address; ///< Starting address - uint32_t data; ///< Data uint16_t command; ///< Transfer command uint8_t dummy_cycles; ///< Number of dummy cycles uint8_t command_length; ///< Command length - uint8_t address_length; ///< Address lengrh + uint8_t address_length; ///< Address length uint8_t data_length; ///< Data length } spi_flash_direct_transfer_t; @@ -177,9 +196,6 @@ typedef struct st_spi_flash_cfg } spi_flash_cfg_t; /** SPI flash control block. Allocate an instance specific control block to pass into the SPI flash API calls. - * @par Implemented as - * - qspi_instance_ctrl_t - * - ospi_instance_ctrl_t */ typedef void spi_flash_ctrl_t; @@ -195,19 +211,13 @@ typedef struct st_spi_flash_status typedef struct st_spi_flash_api { /** Open the SPI flash driver module. - * @par Implemented as - * - @ref R_OSPI_Open() - * - @ref R_QSPI_Open() * * @param[in] p_ctrl Pointer to a driver handle * @param[in] p_cfg Pointer to a configuration structure **/ - fsp_err_t (* open)(spi_flash_ctrl_t * p_ctrl, spi_flash_cfg_t const * const p_cfg); + fsp_err_t (* open)(spi_flash_ctrl_t * const p_ctrl, spi_flash_cfg_t const * const p_cfg); /** Write raw data to the SPI flash. - * @par Implemented as - * - @ref R_OSPI_DirectWrite() - * - @ref R_QSPI_DirectWrite() * * @param[in] p_ctrl Pointer to a driver handle * @param[in] p_src Pointer to raw data to write, must include any required command/address @@ -217,122 +227,89 @@ typedef struct st_spi_flash_api * memory mapped access is possible after this function returns if the device * is not busy. **/ - fsp_err_t (* directWrite)(spi_flash_ctrl_t * p_ctrl, uint8_t const * const p_src, uint32_t const bytes, + fsp_err_t (* directWrite)(spi_flash_ctrl_t * const p_ctrl, uint8_t const * const p_src, uint32_t const bytes, bool const read_after_write); /** Read raw data from the SPI flash. Must follow a call to @ref spi_flash_api_t::directWrite. - * @par Implemented as - * - @ref R_OSPI_DirectRead() - * - @ref R_QSPI_DirectRead() * * @param[in] p_ctrl Pointer to a driver handle * @param[out] p_dest Pointer to read raw data into * @param[in] bytes Number of bytes to read **/ - fsp_err_t (* directRead)(spi_flash_ctrl_t * p_ctrl, uint8_t * const p_dest, uint32_t const bytes); + fsp_err_t (* directRead)(spi_flash_ctrl_t * const p_ctrl, uint8_t * const p_dest, uint32_t const bytes); /** Direct Read/Write raw data to the SPI flash. - * @par Implemented as - * - @ref R_OSPI_DirectTransfer() - * - @ref R_QSPI_DirectTransfer() * * @param[in] p_ctrl Pointer to a driver handle * @param[in] p_data Pointer to command, address and data values and lengths * @param[in] direction Direct Read/Write **/ - fsp_err_t (* directTransfer)(spi_flash_ctrl_t * p_ctrl, spi_flash_direct_transfer_t * const p_transfer, + fsp_err_t (* directTransfer)(spi_flash_ctrl_t * const p_ctrl, spi_flash_direct_transfer_t * const p_transfer, spi_flash_direct_transfer_dir_t direction); /** Change the SPI protocol in the driver. The application must change the SPI protocol on the device. - * @par Implemented as - * - @ref R_OSPI_SpiProtocolSet() - * - @ref R_QSPI_SpiProtocolSet() * * @param[in] p_ctrl Pointer to a driver handle * @param[in] spi_protocol Desired SPI protocol **/ - fsp_err_t (* spiProtocolSet)(spi_flash_ctrl_t * p_ctrl, spi_flash_protocol_t spi_protocol); + fsp_err_t (* spiProtocolSet)(spi_flash_ctrl_t * const p_ctrl, spi_flash_protocol_t spi_protocol); /** Program a page of data to the flash. - * @par Implemented as - * - @ref R_OSPI_Write() - * - @ref R_QSPI_Write() * * @param[in] p_ctrl Pointer to a driver handle * @param[in] p_src The memory address of the data to write to the flash device * @param[in] p_dest The location in the flash device address space to write the data to * @param[in] byte_count The number of bytes to write **/ - fsp_err_t (* write)(spi_flash_ctrl_t * p_ctrl, uint8_t const * const p_src, uint8_t * const p_dest, + fsp_err_t (* write)(spi_flash_ctrl_t * const p_ctrl, uint8_t const * const p_src, uint8_t * const p_dest, uint32_t byte_count); /** Erase a certain number of bytes of the flash. - * @par Implemented as - * - @ref R_OSPI_Erase() - * - @ref R_QSPI_Erase() * * @param[in] p_ctrl Pointer to a driver handle * @param[in] p_device_address The location in the flash device address space to start the erase from * @param[in] byte_count The number of bytes to erase. Set to SPI_FLASH_ERASE_SIZE_CHIP_ERASE to erase entire * chip. **/ - fsp_err_t (* erase)(spi_flash_ctrl_t * p_ctrl, uint8_t * const p_device_address, uint32_t byte_count); + fsp_err_t (* erase)(spi_flash_ctrl_t * const p_ctrl, uint8_t * const p_device_address, uint32_t byte_count); /** Get the write or erase status of the flash. - * @par Implemented as - * - @ref R_OSPI_StatusGet() - * - @ref R_QSPI_StatusGet() * * @param[in] p_ctrl Pointer to a driver handle * @param[out] p_status Current status of the SPI flash device stored here. **/ - fsp_err_t (* statusGet)(spi_flash_ctrl_t * p_ctrl, spi_flash_status_t * const p_status); + fsp_err_t (* statusGet)(spi_flash_ctrl_t * const p_ctrl, spi_flash_status_t * const p_status); /** Enter XIP mode. - * @par Implemented as - * - @ref R_OSPI_XipEnter() - * - @ref R_QSPI_XipEnter() * * @param[in] p_ctrl Pointer to a driver handle **/ - fsp_err_t (* xipEnter)(spi_flash_ctrl_t * p_ctrl); + fsp_err_t (* xipEnter)(spi_flash_ctrl_t * const p_ctrl); /** Exit XIP mode. - * @par Implemented as - * - @ref R_OSPI_XipExit() - * - @ref R_QSPI_XipExit() * * @param[in] p_ctrl Pointer to a driver handle **/ - fsp_err_t (* xipExit)(spi_flash_ctrl_t * p_ctrl); + fsp_err_t (* xipExit)(spi_flash_ctrl_t * const p_ctrl); /** Select the bank to access. See implementation for details. - * @par Implemented as - * - @ref R_OSPI_BankSet() - * - @ref R_QSPI_BankSet() * * @param[in] p_ctrl Pointer to a driver handle * @param[in] bank The bank number **/ - fsp_err_t (* bankSet)(spi_flash_ctrl_t * p_ctrl, uint32_t bank); + fsp_err_t (* bankSet)(spi_flash_ctrl_t * const p_ctrl, uint32_t bank); /** AutoCalibrate the SPI flash driver module. Expected to be used when auto-calibrating OSPI RAM device. - * @par Implemented as - * - @ref R_OSPI_AutoCalibrate() - * - @ref R_QSPI_AutoCalibrate() * * @param[in] p_ctrl Pointer to a driver handle **/ - fsp_err_t (* autoCalibrate)(spi_flash_ctrl_t * p_ctrl); + fsp_err_t (* autoCalibrate)(spi_flash_ctrl_t * const p_ctrl); /** Close the SPI flash driver module. - * @par Implemented as - * - @ref R_OSPI_Close() - * - @ref R_QSPI_Close() * * @param[in] p_ctrl Pointer to a driver handle **/ - fsp_err_t (* close)(spi_flash_ctrl_t * p_ctrl); + fsp_err_t (* close)(spi_flash_ctrl_t * const p_ctrl); } spi_flash_api_t; /** This structure encompasses everything that is needed to use an instance of this interface. */ diff --git a/ra/fsp/inc/api/rm_block_media_api.h b/ra/fsp/inc/api/rm_block_media_api.h index 82542dde4..921043c1a 100644 --- a/ra/fsp/inc/api/rm_block_media_api.h +++ b/ra/fsp/inc/api/rm_block_media_api.h @@ -34,6 +34,7 @@ * - @ref RM_BLOCK_MEDIA_SDMMC * - @ref RM_BLOCK_MEDIA_SPI * - @ref RM_BLOCK_MEDIA_USB + * - @ref RM_BLOCK_MEDIA_RAM * * @{ **********************************************************************************************************************/ diff --git a/ra/fsp/inc/api/rm_comms_api.h b/ra/fsp/inc/api/rm_comms_api.h index c50108b19..09004b2e3 100644 --- a/ra/fsp/inc/api/rm_comms_api.h +++ b/ra/fsp/inc/api/rm_comms_api.h @@ -69,6 +69,8 @@ FSP_HEADER typedef enum e_rm_comms_event { RM_COMMS_EVENT_OPERATION_COMPLETE = 0, + RM_COMMS_EVENT_TX_OPERATION_COMPLETE, + RM_COMMS_EVENT_RX_OPERATION_COMPLETE, RM_COMMS_EVENT_ERROR, } rm_comms_event_t; @@ -91,11 +93,13 @@ typedef struct st_rm_comms_callback_args /** Communications middleware configuration block */ typedef struct st_rm_comms_cfg { - uint32_t semaphore_timeout; ///< timeout for callback. - void (* p_callback)(rm_comms_callback_args_t * p_args); ///< Pointer to callback function, mostly used if using non-blocking functionality. - void const * p_lower_level_cfg; ///< Pointer to lower level driver configuration structure. + uint32_t semaphore_timeout; ///< Timeout for read/write. + void const * p_extend; ///< Pointer to extended configuration by instance of interface. + void const * p_lower_level_cfg; ///< Pointer to lower level driver configuration structure. + void const * p_context; ///< Pointer to the user-provided context + void (* p_callback)(rm_comms_callback_args_t * p_args); ///< Pointer to callback function, mostly used if using non-blocking functionality. } rm_comms_cfg_t; /** Communications control block. Allocate an instance specific control block to pass into the Communications API calls. @@ -110,6 +114,7 @@ typedef struct st_rm_comms_api /** Open driver. * @par Implemented as * - @ref RM_COMMS_I2C_Open() + * - @ref RM_COMMS_UART_Open() * * @param[in] p_ctrl Pointer to control structure. * @param[in] p_cfg Pointer to configuration structure. @@ -119,6 +124,7 @@ typedef struct st_rm_comms_api /** Close driver. * @par Implemented as * - @ref RM_COMMS_I2C_Close() + * - @ref RM_COMMS_UART_Close() * * @param[in] p_ctrl Pointer to control structure. */ @@ -127,6 +133,7 @@ typedef struct st_rm_comms_api /** Read data. * @par Implemented as * - @ref RM_COMMS_I2C_Read() + * - @ref RM_COMMS_UART_Read() * * @param[in] p_ctrl Pointer to control structure. * @param[in] p_dest Pointer to the location to store read data. @@ -137,6 +144,7 @@ typedef struct st_rm_comms_api /** Write data. * @par Implemented as * - @ref RM_COMMS_I2C_Write() + * - @ref RM_COMMS_UART_Write() * * @param[in] p_ctrl Pointer to control structure. * @param[in] p_src Pointer to the location to get write data from. @@ -147,11 +155,23 @@ typedef struct st_rm_comms_api /** Write bytes over comms followed by a read, will have a struct for params. * @par Implemented as * - @ref RM_COMMS_I2C_WriteRead() + * - @ref RM_COMMS_UART_WriteRead() * * @param[in] p_ctrl Pointer to control structure. * @param[in] write_read_params Parameters structure. */ fsp_err_t (* writeRead)(rm_comms_ctrl_t * const p_ctrl, rm_comms_write_read_params_t write_read_params); + + /** + * Specify callback function and optional context pointer. + * @par Implemented as + * - RM_COMMS_UART_CallbackSet() + * + * @param[in] p_ctrl Pointer to the control block. + * @param[in] p_callback Callback function + * @param[in] p_context Pointer to send to callback function + */ + fsp_err_t (* callbackSet)(rm_comms_ctrl_t * const p_api_ctrl, void (* p_callback)(rm_comms_callback_args_t *), void const * const p_context); } rm_comms_api_t; /** This structure encompasses everything that is needed to use an instance of this interface. */ diff --git a/ra/fsp/inc/api/rm_rai_data_collector_api.h b/ra/fsp/inc/api/rm_rai_data_collector_api.h new file mode 100644 index 000000000..d9609f829 --- /dev/null +++ b/ra/fsp/inc/api/rm_rai_data_collector_api.h @@ -0,0 +1,259 @@ +/*********************************************************************************************************************** + * Copyright [2020-2023] Renesas Electronics Corporation and/or its affiliates. All Rights Reserved. + * + * This software and documentation are supplied by Renesas Electronics America Inc. and may only be used with products + * of Renesas Electronics Corp. and its affiliates ("Renesas"). No other uses are authorized. Renesas products are + * sold pursuant to Renesas terms and conditions of sale. Purchasers are solely responsible for the selection and use + * of Renesas products and Renesas assumes no liability. No license, express or implied, to any intellectual property + * right is granted by Renesas. This software is protected under all applicable laws, including copyright laws. Renesas + * reserves the right to change or discontinue this software and/or this documentation. THE SOFTWARE AND DOCUMENTATION + * IS DELIVERED TO YOU "AS IS," AND RENESAS MAKES NO REPRESENTATIONS OR WARRANTIES, AND TO THE FULLEST EXTENT + * PERMISSIBLE UNDER APPLICABLE LAW, DISCLAIMS ALL WARRANTIES, WHETHER EXPLICITLY OR IMPLICITLY, INCLUDING WARRANTIES + * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, AND NONINFRINGEMENT, WITH RESPECT TO THE SOFTWARE OR + * DOCUMENTATION. RENESAS SHALL HAVE NO LIABILITY ARISING OUT OF ANY SECURITY VULNERABILITY OR BREACH. TO THE MAXIMUM + * EXTENT PERMITTED BY LAW, IN NO EVENT WILL RENESAS BE LIABLE TO YOU IN CONNECTION WITH THE SOFTWARE OR DOCUMENTATION + * (OR ANY PERSON OR ENTITY CLAIMING RIGHTS DERIVED FROM YOU) FOR ANY LOSS, DAMAGES, OR CLAIMS WHATSOEVER, INCLUDING, + * WITHOUT LIMITATION, ANY DIRECT, CONSEQUENTIAL, SPECIAL, INDIRECT, PUNITIVE, OR INCIDENTAL DAMAGES; ANY LOST PROFITS, + * OTHER ECONOMIC DAMAGE, PROPERTY DAMAGE, OR PERSONAL INJURY; AND EVEN IF RENESAS HAS BEEN ADVISED OF THE POSSIBILITY + * OF SUCH LOSS, DAMAGES, CLAIMS OR COSTS. + **********************************************************************************************************************/ + +#ifndef RM_RAI_DATA_COLLECTOR_API_H +#define RM_RAI_DATA_COLLECTOR_API_H + +/*******************************************************************************************************************//** + * @ingroup RENESAS_INTERFACES + * @defgroup RM_RAI_DATA_COLLECTOR_API Data Collector Interface + * @brief Interface for RAI Data Collector + * + * @section RM_RAI_DATA_COLLECTOR_API_SUMMARY Summary + * The rai data collector interface provides functionality to collect data from differnet channels using snapshot mode, + * data feed mode or mixed mode. + * + * Implemented by: + * - @ref RM_RAI_DATA_COLLECTOR + * + * @{ + **********************************************************************************************************************/ + +/*********************************************************************************************************************** + * Includes + **********************************************************************************************************************/ + +/* Includes board and MCU related header files. */ +#include "bsp_api.h" +#include "r_timer_api.h" +#include "r_transfer_api.h" + +/* Common macro for FSP header files. There is also a corresponding FSP_FOOTER macro at the end of this file. */ +FSP_HEADER + +/********************************************************************************************************************** + * Macro definitions + **********************************************************************************************************************/ + +/********************************************************************************************************************** + * Typedef definitions + **********************************************************************************************************************/ + +/** Data types */ +typedef enum e_rai_data_collector_data_type +{ + RAI_DATA_COLLECTOR_DATA_TYPE_INT8_T = 0x01, ///< Signed 8-bit + RAI_DATA_COLLECTOR_DATA_TYPE_UINT8_T = 0x11, ///< Unsigned 8-bit + RAI_DATA_COLLECTOR_DATA_TYPE_INT16_T = 0x22, ///< Signed 16-bit + RAI_DATA_COLLECTOR_DATA_TYPE_UINT16_T = 0x32, ///< Unsigned 16-bit + RAI_DATA_COLLECTOR_DATA_TYPE_INT32_T = 0x44, ///< Signed 32-bit + RAI_DATA_COLLECTOR_DATA_TYPE_UINT32_T = 0x54, ///< Unsigned 32-bit + RAI_DATA_COLLECTOR_DATA_TYPE_FLOAT = 0x64, ///< Float + RAI_DATA_COLLECTOR_DATA_TYPE_DOUBLE = 0x78, ///< Double +} rai_data_collector_data_type_t; + +#define RAI_DATA_COLLECTOR_DATA_TYPE_SIZE_MASK (0x0F) + +/** Data Collector module error events */ +typedef enum e_rai_data_collector_error_event_type +{ + RAI_DATA_COLLECTOR_ERROR_TYPE_NONE = 0x00, + + /* E.g PING buf is not released while PONG buf is filled up */ + RAI_DATA_COLLECTOR_ERROR_TYPE_BUF_OVERRUN = 0x01, + + /* E.g PONG buf is filled up but PING buf not submitted yet (e.g some channel failed to keep pace) */ + RAI_DATA_COLLECTOR_ERROR_TYPE_BUF_OUT_OF_SYNC = 0x02, +} rai_data_collector_error_event_t; + +/** Error callback function parameter */ +typedef struct st_rai_data_collector_error_callback_args +{ + uint8_t instance_id; ///< Instance ID + rai_data_collector_error_event_t event; ///< Error event +} rai_data_collector_error_callback_args_t; + +/** Frame buffer structure */ +typedef struct st_rai_data_collector_frame_buffer_type +{ + void * p_buf; ///< Pointer to data buffer + rai_data_collector_data_type_t data_type; ///< Data samples in the buffer +} rai_data_collector_frame_buffer_t; + +/** Data ready callback function parameter */ +typedef struct st_rai_data_collector_callback_args +{ + uint8_t frames; ///< Number of frame buffers + uint8_t instance_id; ///< Instance id + uint32_t frame_buf_len; ///< Frame buffers shall have the same amount of data sample + rai_data_collector_frame_buffer_t const * p_frame_buf; ///< Array of frame buffers + void const * p_context; ///< Pointer to the user-provided context +} rai_data_collector_callback_args_t; + +/** Snapshot mode configuration */ +typedef struct st_rai_data_collector_snapshot_cfg +{ + uint8_t channels; ///< Total snapshot mode channels + uint16_t transfer_len; ///< DTC transfer length + timer_instance_t const * p_timer; ///< Pointer to timer instance + transfer_instance_t const * p_transfer; ///< Pointer to DTC instance +} rai_data_collector_snapshot_cfg_t; + +/** Data feed mode configuration */ +typedef struct st_rai_data_collector_data_feed_cfg +{ + uint8_t channels; ///< Total data feed mode channels +} rai_data_collector_data_feed_cfg_t; + +/** RAI Data Collector general configuration */ +typedef struct st_rai_data_collector_cfg +{ + uint32_t channels : 8; ///< Total number of channels + uint32_t instance_id : 8; ///< Instance id + uint32_t virt_channels : 8; ///< Virtual channels + uint32_t reserved : 8; ///< Reserved + + uint32_t channel_ready_mask; ///< Bitmask of configured channels + uint32_t required_frame_len; ///< Length of each frame buffer + rai_data_collector_snapshot_cfg_t const * p_snapshot_cfg; ///< Pointer to snapshot mode configuration structure + rai_data_collector_data_feed_cfg_t const * p_data_feed_cfg; ///< Pointer to data feed mode configuration structure + void * p_extend; ///< Pointer to extended configuration structure + + void (* p_callback)(rai_data_collector_callback_args_t const * p_args); ///< Pointer to the callback function when data is collected + void (* p_error_callback)(rai_data_collector_error_callback_args_t const * p_args); ///< Pointer to the callback function when there is an error + void const * p_context; ///< Pointer to the user-provided context +} rai_data_collector_cfg_t; + +/** Data Collector control block. Allocate an instance specific control block to pass into the Data Collector API calls. + * @par Implemented as + * - @ref rai_data_collector_instance_ctrl_t + */ +typedef void rai_data_collector_ctrl_t; + +/** RAI Data Collector interface API. */ +typedef struct st_rai_data_collector_api +{ + /** Initialize Data Collector module instance. + * @par Implemented as + * - @ref RM_RAI_DATA_COLLECTOR_Open() + * + * @note To reopen after calling this function, call @ref rai_data_collector_api_t::close first. + * @param[in] p_ctrl Pointer to control handle structure + * @param[in] p_cfg Pointer to configuration structure + */ + fsp_err_t (* open)(rai_data_collector_ctrl_t * const p_ctrl, rai_data_collector_cfg_t const * const p_cfg); + + /** Config transfer source address for snapshot mode channel + * @par Implemented as + * - @ref RM_RAI_DATA_COLLECTOR_SnapshotChannelRegister() + * + * @param[in] p_ctrl Pointer to control handle structure + * @param[in] p_src Pointer to transfer source address + * + */ + + fsp_err_t (* snapshotChannelRegister)(rai_data_collector_ctrl_t * const p_api_ctrl, uint8_t channel, + void const * p_src); + + /** Release frame buffers by upper modules + * @par Implemented as + * - @ref RM_RAI_DATA_COLLECTOR_BufferRelease() + * + * @param[in] p_ctrl Pointer to control handle structure + * @param[in] channel Which snapshot mode channel + * @param[in] p_src Chanenl source buffer address + */ + fsp_err_t (* bufferRelease)(rai_data_collector_ctrl_t * const p_ctrl); + + /** Reset internal buffers + * @par Implemented as + * - @ref RM_RAI_DATA_COLLECTOR_BufferReset() + * + * @param[in] p_ctrl Pointer to control handle structure + */ + fsp_err_t (* bufferReset)(rai_data_collector_ctrl_t * const p_ctrl); + + /** Starts snapshot mode. + * @par Implemented as + * - @ref RM_RAI_DATA_COLLECTOR_SnapshotStart() + * + * @param[in] p_ctrl Pointer to control handle structure + * + */ + fsp_err_t (* snapshotStart)(rai_data_collector_ctrl_t * const p_ctrl); + + /** Stops snapshot mode. + * @par Implemented as + * - @ref RM_RAI_DATA_COLLECTOR_SnapshotStop() + * + * @param[in] p_ctrl Pointer to control handle structure + * + */ + fsp_err_t (* snapshotStop)(rai_data_collector_ctrl_t * const p_ctrl); + + /** Get the PING or PONG buffer address for data transfer. For data feed mode only. + * @par Implemented as + * - @ref RM_RAI_DATA_COLLECTOR_ChannelBufferGet() + * + * @param[in] p_ctrl Pointer to control handle structure + * @param[in] channel Which data feed mode channel + * @param[out] pp_buf Returned buffer address + * + */ + fsp_err_t (* channelBufferGet)(rai_data_collector_ctrl_t * const p_api_ctrl, uint8_t channel, void ** pp_buf); + + /** Write data to frame buffer using CPU copy. For data feed mode only. + * @par Implemented as + * - @ref RM_RAI_DATA_COLLECTOR_ChannelWrite() + * + * @param[in] p_ctrl Pointer to control handle structure + * @param[in] channel Which data feed mode channel + * @param[in] p_buf Data buffer + * @param[in] len Length of data buffer in data samples + * + */ + fsp_err_t (* channelWrite)(rai_data_collector_ctrl_t * const p_api_ctrl, uint8_t channel, const void * p_buf, + uint32_t len); + + /** Close the specified Data Collector module instance. + * @par Implemented as + * - @ref RM_RAI_DATA_COLLECTOR_Close() + * + * @param[in] p_ctrl Pointer to control handle structure + */ + fsp_err_t (* close)(rai_data_collector_ctrl_t * const p_ctrl); +} rai_data_collector_api_t; + +/** This structure encompasses everything that is needed to use an instance of this interface. */ +typedef struct st_rai_data_collector_instance +{ + rai_data_collector_ctrl_t * p_ctrl; ///< Pointer to the control structure for this instance + rai_data_collector_cfg_t const * p_cfg; ///< Pointer to the configuration structure for this instance + rai_data_collector_api_t const * p_api; ///< Pointer to the API structure for this instance +} rai_data_collector_instance_t; + +/*******************************************************************************************************************//** + * @} (end defgroup RM_RAI_DATA_COLLECTOR_API) + **********************************************************************************************************************/ + +/* Common macro for FSP header files. There is also a corresponding FSP_HEADER macro at the top of this file. */ +FSP_FOOTER + +#endif diff --git a/ra/fsp/inc/api/rm_rai_data_shipper_api.h b/ra/fsp/inc/api/rm_rai_data_shipper_api.h new file mode 100644 index 000000000..481a88a97 --- /dev/null +++ b/ra/fsp/inc/api/rm_rai_data_shipper_api.h @@ -0,0 +1,150 @@ +/*********************************************************************************************************************** + * Copyright [2020-2023] Renesas Electronics Corporation and/or its affiliates. All Rights Reserved. + * + * This software and documentation are supplied by Renesas Electronics America Inc. and may only be used with products + * of Renesas Electronics Corp. and its affiliates ("Renesas"). No other uses are authorized. Renesas products are + * sold pursuant to Renesas terms and conditions of sale. Purchasers are solely responsible for the selection and use + * of Renesas products and Renesas assumes no liability. No license, express or implied, to any intellectual property + * right is granted by Renesas. This software is protected under all applicable laws, including copyright laws. Renesas + * reserves the right to change or discontinue this software and/or this documentation. THE SOFTWARE AND DOCUMENTATION + * IS DELIVERED TO YOU "AS IS," AND RENESAS MAKES NO REPRESENTATIONS OR WARRANTIES, AND TO THE FULLEST EXTENT + * PERMISSIBLE UNDER APPLICABLE LAW, DISCLAIMS ALL WARRANTIES, WHETHER EXPLICITLY OR IMPLICITLY, INCLUDING WARRANTIES + * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, AND NONINFRINGEMENT, WITH RESPECT TO THE SOFTWARE OR + * DOCUMENTATION. RENESAS SHALL HAVE NO LIABILITY ARISING OUT OF ANY SECURITY VULNERABILITY OR BREACH. TO THE MAXIMUM + * EXTENT PERMITTED BY LAW, IN NO EVENT WILL RENESAS BE LIABLE TO YOU IN CONNECTION WITH THE SOFTWARE OR DOCUMENTATION + * (OR ANY PERSON OR ENTITY CLAIMING RIGHTS DERIVED FROM YOU) FOR ANY LOSS, DAMAGES, OR CLAIMS WHATSOEVER, INCLUDING, + * WITHOUT LIMITATION, ANY DIRECT, CONSEQUENTIAL, SPECIAL, INDIRECT, PUNITIVE, OR INCIDENTAL DAMAGES; ANY LOST PROFITS, + * OTHER ECONOMIC DAMAGE, PROPERTY DAMAGE, OR PERSONAL INJURY; AND EVEN IF RENESAS HAS BEEN ADVISED OF THE POSSIBILITY + * OF SUCH LOSS, DAMAGES, CLAIMS OR COSTS. + **********************************************************************************************************************/ + +#ifndef RM_RAI_DATA_SHIPPER_API_H +#define RM_RAI_DATA_SHIPPER_API_H + +/*******************************************************************************************************************//** + * @ingroup RENESAS_INTERFACES + * @defgroup RM_RAI_DATA_SHIPPER_API Data Shipper Interface + * @brief Interface for RAI Data Shipper + * + * @section RM_RAI_DATA_SHIPPER_API_SUMMARY Summary + * The rai data shipper interface provides multiple communication methods. + * + * Implemented by: + * - @ref RM_RAI_DATA_SHIPPER + * + * @{ + **********************************************************************************************************************/ + +/*********************************************************************************************************************** + * Includes + **********************************************************************************************************************/ + +/* Includes board and MCU related header files. */ +#include "bsp_api.h" +#include "r_crc_api.h" +#include "rm_comms_api.h" +#include "rm_rai_data_collector_api.h" + +/* Common macro for FSP header files. There is also a corresponding FSP_FOOTER macro at the end of this file. */ +FSP_HEADER + +/********************************************************************************************************************** + * Macro definitions + **********************************************************************************************************************/ + +/********************************************************************************************************************** + * Typedef definitions + **********************************************************************************************************************/ + +/** Callback function parameter structure */ +typedef struct st_rai_data_shipper_callback_args +{ + rm_comms_event_t result; ///< Whether data is sent successfully or not + void const * p_context; ///< Pointer to the user-provided context +} rai_data_shipper_callback_args_t; + +/** Data Shipper write funciton parameter structure */ +typedef struct st_rai_data_shipper_write_params +{ + uint16_t events; ///< Events + uint16_t diagnostic_data_len; ///< Diagnostic data length + uint8_t * p_diagnostic_data; ///< Pointer to diagnostic data + rai_data_collector_callback_args_t * p_sensor_data; ///< Pointer to sensor data info +} rai_data_shipper_write_params_t; + +/** RAI Data Shipper general configuration */ +typedef struct st_rai_data_shipper_cfg +{ + uint8_t divider; ///< Send data on every (divider + 1) requests in case the interface bandwidth is not sufficient + + crc_instance_t const * p_crc; ///< Pointer to CRC instance + rm_comms_instance_t const * p_comms; ///< Pointer to COMMS API instance + + void const * p_context; ///< Pointer to the user-provided context + void (* p_callback)(rai_data_shipper_callback_args_t * p_args); ///< Pointer to the callback function on data sent or error +} rai_data_shipper_cfg_t; + +/** Data Shipper control block. Allocate an instance specific control block to pass into the Data Shipper API calls. + * @par Implemented as + * - @ref rai_data_shipper_instance_ctrl_t + */ +typedef void rai_data_shipper_ctrl_t; + +/** RAI Data Shipper interface API. */ +typedef struct st_rai_data_shipper_api +{ + /** Initialize Data Shipper module instance. + * @par Implemented as + * - @ref RM_RAI_DATA_SHIPPER_Open() + * + * @note To reopen after calling this function, call @ref rai_data_shipper_api_t::close first. + * @param[in] p_ctrl Pointer to control handle structure + * @param[in] p_cfg Pointer to configuration structure + */ + fsp_err_t (* open)(rai_data_shipper_ctrl_t * const p_ctrl, rai_data_shipper_cfg_t const * const p_cfg); + + /** Read data. + * @par Implemented as + * - @ref RM_RAI_DATA_SHIPPER_Read() + * + * @param[in] p_ctrl Pointer to control structure. + * @param[in] p_buf Pointer to the location to store read data. + * @param[in] buf_len Number of bytes to read. + */ + fsp_err_t (* read)(rai_data_shipper_ctrl_t * const p_api_ctrl, void * const p_buf, uint32_t * const buf_len); + + /** Write data. + * @par Implemented as + * - @ref RM_RAI_DATA_SHIPPER_Write() + * + * @param[in] p_ctrl Pointer to control structure. + * @param[in] write_params Pointer to write parameters structure + */ + fsp_err_t (* write)(rai_data_shipper_ctrl_t * const p_api_ctrl, + rai_data_shipper_write_params_t const * p_write_params); + + /** Close the specified Data Shipper module instance. + * @par Implemented as + * - @ref RM_RAI_DATA_SHIPPER_Close() + * + * @param[in] p_ctrl Pointer to control handle structure + */ + fsp_err_t (* close)(rai_data_shipper_ctrl_t * const p_ctrl); +} rai_data_shipper_api_t; + +/** This structure encompasses everything that is needed to use an instance of this interface. */ +typedef struct st_rai_data_shipper_instance +{ + rai_data_shipper_ctrl_t * p_ctrl; ///< Pointer to the control structure for this instance + rai_data_shipper_cfg_t const * p_cfg; ///< Pointer to the configuration structure for this instance + rai_data_shipper_api_t const * p_api; ///< Pointer to the API structure for this instance +} rai_data_shipper_instance_t; + +/*******************************************************************************************************************//** + * @} (end defgroup RM_RAI_DATA_SHIPPER_API) + **********************************************************************************************************************/ + +/* Common macro for FSP header files. There is also a corresponding FSP_HEADER macro at the top of this file. */ +FSP_FOOTER + +#endif diff --git a/ra/fsp/inc/api/rm_zmod4xxx_api.h b/ra/fsp/inc/api/rm_zmod4xxx_api.h index 06de583a7..9ab0b3cc0 100644 --- a/ra/fsp/inc/api/rm_zmod4xxx_api.h +++ b/ra/fsp/inc/api/rm_zmod4xxx_api.h @@ -160,6 +160,25 @@ typedef struct st_rm_zmod4xxx_raq_data float raq; ///< Concentration ratio for raq lib. } rm_zmod4xxx_raq_data_t; +/** ZMOD4XXX Relative IAQ data structure */ +typedef struct st_rm_zmod4xxx_rel_iaq_data +{ + float rmox[13]; ///< MOx resistances. + float rhtr; ///< heater resistance. + float rel_iaq; ///< relative IAQ index. +} rm_zmod4xxx_rel_iaq_data_t; + +/** ZMOD4XXX PBAQ data structure */ +typedef struct st_rm_zmod4xxx_pbaq_data +{ + float rmox[13]; ///< MOx resistance. + float log_rcda; ///< log10 of CDA resistance. + float rhtr; ///< heater resistance. + float temperature; ///< ambient temperature (degC). + float tvoc; ///< TVOC concentration (mg/m^3). + float etoh; ///< EtOH concentration (ppm). +} rm_zmod4xxx_pbaq_data_t; + /** ZMOD4XXX configuration block */ typedef struct st_rm_zmod4xxx_cfg { @@ -304,6 +323,28 @@ typedef struct st_rm_zmod4xxx_api fsp_err_t (* raqDataCalculate)(rm_zmod4xxx_ctrl_t * const p_api_ctrl, rm_zmod4xxx_raw_data_t * const p_raw_data, rm_zmod4xxx_raq_data_t * const p_zmod4xxx_data); + /** Calculate Relative IAQ values from ADC data. + * @par Implemented as + * - @ref RM_ZMOD4XXX_RelIaqDataCalculate() + * + * @param[in] p_api_ctrl Pointer to control structure. + * @param[in] p_raw_data Pointer to raw data. + * @param[in] p_zmod4xxx_data Pointer to ZMOD4XXXX data structure. + */ + fsp_err_t (* relIaqDataCalculate)(rm_zmod4xxx_ctrl_t * const p_api_ctrl, rm_zmod4xxx_raw_data_t * const p_raw_data, + rm_zmod4xxx_rel_iaq_data_t * const p_zmod4xxx_data); + + /** Calculate PBAQ values from ADC data. + * @par Implemented as + * - @ref RM_ZMOD4XXX_PbaqDataCalculate() + * + * @param[in] p_api_ctrl Pointer to control structure. + * @param[in] p_raw_data Pointer to raw data. + * @param[in] p_zmod4xxx_data Pointer to ZMOD4XXXX data structure. + */ + fsp_err_t (* pbaqDataCalculate)(rm_zmod4xxx_ctrl_t * const p_api_ctrl, rm_zmod4xxx_raw_data_t * const p_raw_data, + rm_zmod4xxx_pbaq_data_t * const p_zmod4xxx_data); + /** Set temperature and humidity. * @par Implemented as * - @ref RM_ZMOD4XXX_TemperatureAndHumiditySet() diff --git a/ra/fsp/inc/fsp_version.h b/ra/fsp/inc/fsp_version.h index 9b158265a..4c5c0df0c 100644 --- a/ra/fsp/inc/fsp_version.h +++ b/ra/fsp/inc/fsp_version.h @@ -45,7 +45,7 @@ extern "C" { #define FSP_VERSION_MAJOR (4U) /** FSP pack minor version. */ - #define FSP_VERSION_MINOR (4U) + #define FSP_VERSION_MINOR (5U) /** FSP pack patch version. */ #define FSP_VERSION_PATCH (0U) @@ -54,10 +54,10 @@ extern "C" { #define FSP_VERSION_BUILD (0U) /** Public FSP version name. */ - #define FSP_VERSION_STRING ("4.4.0") + #define FSP_VERSION_STRING ("4.5.0") /** Unique FSP version ID. */ - #define FSP_VERSION_BUILD_STRING ("Built with Renesas Advanced Flexible Software Package version 4.4.0") + #define FSP_VERSION_BUILD_STRING ("Built with Renesas Advanced Flexible Software Package version 4.5.0") /********************************************************************************************************************** * Typedef definitions diff --git a/ra/fsp/inc/instances/r_adc.h b/ra/fsp/inc/instances/r_adc.h index 62b6e58b7..07f1f00cf 100644 --- a/ra/fsp/inc/instances/r_adc.h +++ b/ra/fsp/inc/instances/r_adc.h @@ -97,8 +97,9 @@ typedef enum e_adc_mask ADC_MASK_CHANNEL_25 = (1U << 25U), ///< Channel 25 mask ADC_MASK_CHANNEL_26 = (1U << 26U), ///< Channel 26 mask ADC_MASK_CHANNEL_27 = (1U << 27U), ///< Channel 27 mask - ADC_MASK_TEMPERATURE = (1U << 28UL), ///< Temperature sensor channel mask - ADC_MASK_VOLT = (1U << 29UL), ///< Voltage reference channel mask + ADC_MASK_CHANNEL_28 = (1U << 28U), ///< Channel 28 mask + ADC_MASK_TEMPERATURE = (1U << 29UL), ///< Temperature sensor channel mask + ADC_MASK_VOLT = (1U << 30UL), ///< Voltage reference channel mask ADC_MASK_SENSORS = (ADC_MASK_TEMPERATURE | ADC_MASK_VOLT), ///< All sensor channel mask } adc_mask_t; @@ -217,6 +218,7 @@ typedef enum e_adc_window_b_channel ADC_WINDOW_B_CHANNEL_25, ADC_WINDOW_B_CHANNEL_26, ADC_WINDOW_B_CHANNEL_27, + ADC_WINDOW_B_CHANNEL_28, ADC_WINDOW_B_CHANNEL_TEMPERATURE = 32, ADC_WINDOW_B_CHANNEL_VOLT = 33, } adc_window_b_channel_t; diff --git a/ra/fsp/inc/instances/r_adc_b.h b/ra/fsp/inc/instances/r_adc_b.h index 91d688929..1976aac81 100644 --- a/ra/fsp/inc/instances/r_adc_b.h +++ b/ra/fsp/inc/instances/r_adc_b.h @@ -98,10 +98,10 @@ typedef enum e_adc_b_conversion_method /** ADC_B data data format definitions */ typedef enum e_adc_b_data_format { - ADC_B_DATA_FORMAT_16_BIT = 0, ///< 16 bit adc_b data format - ADC_B_DATA_FORMAT_14_BIT = 1, ///< 14 bit adc_b data format - ADC_B_DATA_FORMAT_12_BIT = 2, ///< 12 bit adc_b data format - ADC_B_DATA_FORMAT_10_BIT = 3, ///< 10 bit adc_b data format + ADC_B_DATA_FORMAT_16_BIT = 0, ///< 16 bit adc_b data format + ADC_B_DATA_FORMAT_14_BIT = 1, ///< 14 bit adc_b data format + ADC_B_DATA_FORMAT_12_BIT = 2, ///< 12 bit adc_b data format + ADC_B_DATA_FORMAT_10_BIT = 3, ///< 10 bit adc_b data format } adc_b_data_format_t; /** ADC channels */ @@ -377,6 +377,18 @@ typedef enum e_adc_b_user_offset_table_selection_id ADC_B_USER_OFFSET_TABLE_SELECTION_7 = 8, ///< User Offset table 7 } adc_b_user_offset_table_selection_id_t; +/* ADC_B Calibration Status */ +typedef enum e_adc_b_converter_state +{ + ADC_B_CONVERTER_STATE_NONE = 0, + ADC_B_CONVERTER_STATE_ADC_0_CALIBRATING = 1, + ADC_B_CONVERTER_STATE_ADC_1_CALIBRATING = 2, + ADC_B_CONVERTER_STATE_SH_0_2_CALIBRATING = 3, + ADC_B_CONVERTER_STATE_SH_4_6_CALIBRATING = 4, + ADC_B_CONVERTER_STATE_READY = 5, + ADC_B_CONVERTER_STATE_CALIBRATION_FAIL = 6, +} adc_b_converter_state_t; + /** ADC FIFO data type */ typedef struct st_adc_b_fifo_data { @@ -416,16 +428,16 @@ typedef struct st_adc_b_virtual_channel_cfg union { - uint32_t channel_control_a; ///< A/D conversion data operation control a + uint32_t channel_control_a; ///< A/D conversion data operation control a struct { uint32_t digital_filter_id : 3; ///< Digital filter table index selection uint32_t : 13; - uint32_t gain_table_id : 4; ///< User gain table selection - uint32_t : 4; - uint32_t offset_table_id : 4; ///< User offset table selection - uint32_t : 4; - } channel_control_a_bits; ///< A/D conversion data operation control a bits + uint32_t gain_table_id : 4; ///< User gain table selection + uint32_t : 4; + uint32_t offset_table_id : 4; ///< User offset table selection + uint32_t : 4; + } channel_control_a_bits; ///< A/D conversion data operation control a bits }; union @@ -584,7 +596,7 @@ typedef __PACKED_STRUCT st_adc_b_extended_cfg uint8_t : 4; } adc_b_converter_mode[2]; }; - uint32_t scan_group_enable; ///< Scan Group enable register data + uint32_t scan_group_enable; ///< Scan Group enable register data union { __PACKED_STRUCT @@ -617,19 +629,26 @@ typedef __PACKED_STRUCT st_adc_b_extended_cfg { __PACKED_STRUCT { - uint32_t fifo_interrupt_level0; ///< FIFO data threshold interrupt level register data for Group 0 and 1 - uint32_t fifo_interrupt_level1; ///< FIFO data threshold interrupt level register data for Group 2 and 3 - uint32_t fifo_interrupt_level2; ///< FIFO data threshold interrupt level register data for Group 4 and 5 - uint32_t fifo_interrupt_level3; ///< FIFO data threshold interrupt level register data for Group 6 and 7 - uint32_t fifo_interrupt_level4; ///< FIFO data threshold interrupt level register data for Group 8 + uint32_t fifo_interrupt_level0; ///< FIFO data threshold interrupt level register data for Group 0 and 1 + uint32_t fifo_interrupt_level1; ///< FIFO data threshold interrupt level register data for Group 2 and 3 + uint32_t fifo_interrupt_level2; ///< FIFO data threshold interrupt level register data for Group 4 and 5 + uint32_t fifo_interrupt_level3; ///< FIFO data threshold interrupt level register data for Group 6 and 7 + uint32_t fifo_interrupt_level4; ///< FIFO data threshold interrupt level register data for Group 8 + }; + uint16_t fifo_interrupt_level[9]; ///< FIFO data threshold interrupt level + }; + union + { + uint16_t start_trigger_delay_table[9]; + __PACKED_STRUCT + { + uint32_t start_trigger_delay_0; ///< Start trigger delay register data for group 0 and 1 + uint32_t start_trigger_delay_1; ///< Start trigger delay register data for group 2 and 3 + uint32_t start_trigger_delay_2; ///< Start trigger delay register data for group 4 and 5 + uint32_t start_trigger_delay_3; ///< Start trigger delay register data for group 6 and 7 + uint32_t start_trigger_delay_4; ///< Start trigger delay register data for group 8 }; - uint16_t fifo_interrupt_level[9]; ///< FIFO data threshold interrupt level }; - uint32_t start_trigger_delay_0; ///< Start trigger delay register data for group 0 and 1 - uint32_t start_trigger_delay_1; ///< Start trigger delay register data for group 2 and 3 - uint32_t start_trigger_delay_2; ///< Start trigger delay register data for group 4 and 5 - uint32_t start_trigger_delay_3; ///< Start trigger delay register data for group 6 and 7 - uint32_t start_trigger_delay_4; ///< Start trigger delay register data for group 8 uint32_t calibration_adc_state; ///< Calibration State register data uint32_t calibration_sample_and_hold; ///< Calibration Sample and Hold register data const adc_b_isr_cfg_t * p_isr_cfg; ///< Pointer to ISR configuration @@ -648,21 +667,20 @@ typedef __PACKED_STRUCT st_adc_b_extended_cfg uint32_t limiter_clip_tables[8]; ///< Limiter clip Table register data } adc_b_extended_cfg_t; -/*********************************************************************************************************************** - * Typedef definitions - **********************************************************************************************************************/ - /** ADC instance control block. DO NOT INITIALIZE. Initialized in @ref adc_api_t::open(). */ typedef struct st_adc_b_instance_ctrl { - uint32_t cached_adtrgenr; // Cached conversion peripheral trigger bits, used when starting and stopping scans. - uint32_t cached_adsystr; // Cached conversion software start bits, used when starting and stopping scans. - adc_cfg_t const * p_cfg; // Boolean to verify that the Unit has been initialized - void (* p_callback)(adc_callback_args_t *); // Pointer to callback that is called when an adc_b_event_t occurs. - adc_callback_args_t * p_callback_memory; // Pointer to non-secure memory that can be used to pass arguments to a callback in non-secure memory. - void const * p_context; // User defined context passed into callback function. - uint32_t initialized; // Initialized status of ADC_B. - uint32_t opened; // Open status of ADC_B. + adc_b_converter_state_t adc_state; ///< ADC 0 converter State + uint32_t cached_adtrgenr; ///< Cached conversion peripheral trigger bits, used when starting and stopping scans. + uint32_t cached_adsystr; ///< Cached conversion software start bits, used when starting and stopping scans. + uint32_t trigger_disable_wait_cycles; ///< ADC clock cycles required to wait after disabling trigger input + + adc_cfg_t const * p_cfg; ///< Boolean to verify that the Unit has been initialized + void (* p_callback)(adc_callback_args_t *); ///< Pointer to callback that is called when an adc_b_event_t occurs. + adc_callback_args_t * p_callback_memory; ///< Pointer to non-secure memory that can be used to pass arguments to a callback in non-secure memory. + void const * p_context; ///< User defined context passed into callback function. + uint32_t initialized; ///< Initialized status of ADC_B. + uint32_t opened; ///< Open status of ADC_B. } adc_b_instance_ctrl_t; /********************************************************************************************************************** diff --git a/ra/fsp/inc/instances/r_agt.h b/ra/fsp/inc/instances/r_agt.h index 26a61eb6c..957db17f9 100644 --- a/ra/fsp/inc/instances/r_agt.h +++ b/ra/fsp/inc/instances/r_agt.h @@ -120,12 +120,21 @@ typedef enum e_agt_pin_cfg AGT_PIN_CFG_START_LEVEL_HIGH = 7, ///< Pin level high } agt_pin_cfg_t; +/** Counter type to determine regsiter size */ +typedef enum e_agt_counter_bit_width +{ + AGT_COUNTER_BIT_WIDTH_DEFAULT = 0, ///< Legacy + AGT_COUNTER_BIT_WIDTH_16 = 1, ///< AGT + AGT_COUNTER_BIT_WIDTH_32 = 2, ///< AGTW +} agt_counter_bit_width_t; + /** Channel control block. DO NOT INITIALIZE. Initialization occurs when @ref timer_api_t::open is called. */ typedef struct st_agt_instance_ctrl { uint32_t open; // Whether or not channel is open const timer_cfg_t * p_cfg; // Pointer to initial configurations R_AGTX0_Type * p_reg; // Base register for this channel + bool is_agtw; // Whether or not this channel is agtw, otherwise it is agt uint32_t period; // Current timer period (counts) void (* p_callback)(timer_callback_args_t *); // Pointer to callback that is called when a timer_event_t occurs. @@ -153,10 +162,11 @@ typedef struct st_agt_extended_cfg agt_pin_cfg_t agto : 3; ///< Configure AGTO pin @note AGTIO polarity is opposite AGTO /* Input pin settings. */ - agt_measure_t measurement_mode; ///< Measurement mode - agt_agtio_filter_t agtio_filter; ///< Input filter for AGTIO - agt_enable_pin_t enable_pin; ///< Enable pin (event counting only) - agt_trigger_edge_t trigger_edge; ///< Trigger edge to start pulse period measurement or count external event + agt_measure_t measurement_mode; ///< Measurement mode + agt_agtio_filter_t agtio_filter; ///< Input filter for AGTIO + agt_enable_pin_t enable_pin; ///< Enable pin (event counting only) + agt_trigger_edge_t trigger_edge; ///< Trigger edge to start pulse period measurement or count external event + agt_counter_bit_width_t counter_bit_width; ///< Counter bit width } agt_extended_cfg_t; /********************************************************************************************************************** diff --git a/ra/fsp/inc/instances/r_ospi.h b/ra/fsp/inc/instances/r_ospi.h index c6a7d596c..b610e5fb3 100644 --- a/ra/fsp/inc/instances/r_ospi.h +++ b/ra/fsp/inc/instances/r_ospi.h @@ -172,27 +172,27 @@ extern const spi_flash_api_t g_ospi_on_spi_flash; /** @endcond */ -fsp_err_t R_OSPI_Open(spi_flash_ctrl_t * p_ctrl, spi_flash_cfg_t const * const p_cfg); -fsp_err_t R_OSPI_Close(spi_flash_ctrl_t * p_ctrl); -fsp_err_t R_OSPI_DirectWrite(spi_flash_ctrl_t * p_ctrl, - uint8_t const * const p_src, - uint32_t const bytes, - bool const read_after_write); -fsp_err_t R_OSPI_DirectRead(spi_flash_ctrl_t * p_ctrl, uint8_t * const p_dest, uint32_t const bytes); -fsp_err_t R_OSPI_DirectTransfer(spi_flash_ctrl_t * p_ctrl, +fsp_err_t R_OSPI_Open(spi_flash_ctrl_t * const p_ctrl, spi_flash_cfg_t const * const p_cfg); +fsp_err_t R_OSPI_Close(spi_flash_ctrl_t * const p_ctrl); +fsp_err_t R_OSPI_DirectWrite(spi_flash_ctrl_t * const p_ctrl, + uint8_t const * const p_src, + uint32_t const bytes, + bool const read_after_write); +fsp_err_t R_OSPI_DirectRead(spi_flash_ctrl_t * const p_ctrl, uint8_t * const p_dest, uint32_t const bytes); +fsp_err_t R_OSPI_DirectTransfer(spi_flash_ctrl_t * const p_ctrl, spi_flash_direct_transfer_t * const p_transfer, spi_flash_direct_transfer_dir_t direction); -fsp_err_t R_OSPI_SpiProtocolSet(spi_flash_ctrl_t * p_ctrl, spi_flash_protocol_t spi_protocol); -fsp_err_t R_OSPI_XipEnter(spi_flash_ctrl_t * p_ctrl); -fsp_err_t R_OSPI_XipExit(spi_flash_ctrl_t * p_ctrl); -fsp_err_t R_OSPI_Write(spi_flash_ctrl_t * p_ctrl, - uint8_t const * const p_src, - uint8_t * const p_dest, - uint32_t byte_count); -fsp_err_t R_OSPI_Erase(spi_flash_ctrl_t * p_ctrl, uint8_t * const p_device_address, uint32_t byte_count); -fsp_err_t R_OSPI_StatusGet(spi_flash_ctrl_t * p_ctrl, spi_flash_status_t * const p_status); -fsp_err_t R_OSPI_BankSet(spi_flash_ctrl_t * p_ctrl, uint32_t bank); -fsp_err_t R_OSPI_AutoCalibrate(spi_flash_ctrl_t * p_ctrl); +fsp_err_t R_OSPI_SpiProtocolSet(spi_flash_ctrl_t * const p_ctrl, spi_flash_protocol_t spi_protocol); +fsp_err_t R_OSPI_XipEnter(spi_flash_ctrl_t * const p_ctrl); +fsp_err_t R_OSPI_XipExit(spi_flash_ctrl_t * const p_ctrl); +fsp_err_t R_OSPI_Write(spi_flash_ctrl_t * const p_ctrl, + uint8_t const * const p_src, + uint8_t * const p_dest, + uint32_t byte_count); +fsp_err_t R_OSPI_Erase(spi_flash_ctrl_t * const p_ctrl, uint8_t * const p_device_address, uint32_t byte_count); +fsp_err_t R_OSPI_StatusGet(spi_flash_ctrl_t * const p_ctrl, spi_flash_status_t * const p_status); +fsp_err_t R_OSPI_BankSet(spi_flash_ctrl_t * const p_ctrl, uint32_t bank); +fsp_err_t R_OSPI_AutoCalibrate(spi_flash_ctrl_t * const p_ctrl); /* Common macro for FSP header files. There is also a corresponding FSP_HEADER macro at the top of this file. */ FSP_FOOTER diff --git a/ra/fsp/inc/instances/r_rtc.h b/ra/fsp/inc/instances/r_rtc.h index fd7a357b9..4ee77526a 100644 --- a/ra/fsp/inc/instances/r_rtc.h +++ b/ra/fsp/inc/instances/r_rtc.h @@ -47,6 +47,13 @@ FSP_HEADER * Typedef definitions **********************************************************************************************************************/ +/** RTC extend configuration */ +typedef struct st_rtc_extended_cfg +{ + uint8_t alarm1_ipl; ///< Alarm 1 interrupt priority + IRQn_Type alarm1_irq; ///< Alarm 1 interrupt vector +} rtc_extended_cfg_t; + /** Channel control block. DO NOT INITIALIZE. Initialization occurs when @ref rtc_api_t::open is called */ typedef struct st_rtc_ctrl { diff --git a/ra/fsp/inc/instances/r_sce_key_injection.h b/ra/fsp/inc/instances/r_sce_key_injection.h index d233aa169..8db252df5 100644 --- a/ra/fsp/inc/instances/r_sce_key_injection.h +++ b/ra/fsp/inc/instances/r_sce_key_injection.h @@ -116,18 +116,6 @@ fsp_err_t R_SCE_RSA2048_InitialPrivateKeyWrap(const uint8_t * const const uint8_t * const encrypted_key, sce_rsa2048_private_wrapped_key_t * const wrapped_key); -fsp_err_t R_SCE_RSA3072_InitialPrivateKeyWrap(const uint8_t * const key_type, - const uint8_t * const wrapped_user_factory_programming_key, - const uint8_t * const initial_vector, - const uint8_t * const encrypted_key, - sce_rsa3072_private_wrapped_key_t * const wrapped_key); - -fsp_err_t R_SCE_RSA4096_InitialPrivateKeyWrap(const uint8_t * const key_type, - const uint8_t * const wrapped_user_factory_programming_key, - const uint8_t * const initial_vector, - const uint8_t * const encrypted_key, - sce_rsa4096_private_wrapped_key_t * const wrapped_key); - fsp_err_t R_SCE_RSA2048_EncryptedPublicKeyWrap(const uint8_t * const initial_vector, const uint8_t * const encrypted_key, const sce_key_update_key_t * const key_update_key, diff --git a/ra/fsp/inc/instances/r_sci_smci.h b/ra/fsp/inc/instances/r_sci_smci.h new file mode 100644 index 000000000..8edf2a734 --- /dev/null +++ b/ra/fsp/inc/instances/r_sci_smci.h @@ -0,0 +1,157 @@ +/*********************************************************************************************************************** + * Copyright [2020-2023] Renesas Electronics Corporation and/or its affiliates. All Rights Reserved. + * + * This software and documentation are supplied by Renesas Electronics America Inc. and may only be used with products + * of Renesas Electronics Corp. and its affiliates ("Renesas"). No other uses are authorized. Renesas products are + * sold pursuant to Renesas terms and conditions of sale. Purchasers are solely responsible for the selection and use + * of Renesas products and Renesas assumes no liability. No license, express or implied, to any intellectual property + * right is granted by Renesas. This software is protected under all applicable laws, including copyright laws. Renesas + * reserves the right to change or discontinue this software and/or this documentation. THE SOFTWARE AND DOCUMENTATION + * IS DELIVERED TO YOU "AS IS," AND RENESAS MAKES NO REPRESENTATIONS OR WARRANTIES, AND TO THE FULLEST EXTENT + * PERMISSIBLE UNDER APPLICABLE LAW, DISCLAIMS ALL WARRANTIES, WHETHER EXPLICITLY OR IMPLICITLY, INCLUDING WARRANTIES + * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, AND NONINFRINGEMENT, WITH RESPECT TO THE SOFTWARE OR + * DOCUMENTATION. RENESAS SHALL HAVE NO LIABILITY ARISING OUT OF ANY SECURITY VULNERABILITY OR BREACH. TO THE MAXIMUM + * EXTENT PERMITTED BY LAW, IN NO EVENT WILL RENESAS BE LIABLE TO YOU IN CONNECTION WITH THE SOFTWARE OR DOCUMENTATION + * (OR ANY PERSON OR ENTITY CLAIMING RIGHTS DERIVED FROM YOU) FOR ANY LOSS, DAMAGES, OR CLAIMS WHATSOEVER, INCLUDING, + * WITHOUT LIMITATION, ANY DIRECT, CONSEQUENTIAL, SPECIAL, INDIRECT, PUNITIVE, OR INCIDENTAL DAMAGES; ANY LOST PROFITS, + * OTHER ECONOMIC DAMAGE, PROPERTY DAMAGE, OR PERSONAL INJURY; AND EVEN IF RENESAS HAS BEEN ADVISED OF THE POSSIBILITY + * OF SUCH LOSS, DAMAGES, CLAIMS OR COSTS. + **********************************************************************************************************************/ + +#ifndef R_SCI_SMCI_H +#define R_SCI_SMCI_H + +/*******************************************************************************************************************//** + * @addtogroup SCI_SMCI + * @{ + **********************************************************************************************************************/ + +/*********************************************************************************************************************** + * Includes + **********************************************************************************************************************/ +#include "bsp_api.h" +#include "r_smci_api.h" +#include "r_sci_smci_cfg.h" + +/* Common macro for FSP header files. There is also a corresponding FSP_FOOTER macro at the end of this file. */ +FSP_HEADER + +/*********************************************************************************************************************** + * Macro definitions + **********************************************************************************************************************/ + +/********************************************************************************************************************** + * Typedef definitions + **********************************************************************************************************************/ + +/** SMCI instance control block. */ +typedef struct st_sci_smci_instance_ctrl +{ + /* Used to determine if the channel is configured. */ + uint32_t open; + + /* Source buffer pointer used to fill hardware TDR from transmit ISR. */ + uint8_t const * p_tx_src; + + /* Size of source buffer pointer used to fill hardware FIFO from transmit ISR. */ + uint32_t tx_src_bytes; + + /* Destination buffer pointer used for receiving data. */ + uint8_t * p_rx_dest; + + /* Size of destination buffer pointer used for receiving data. */ + uint32_t rx_dest_bytes; + + /* Number of bytes received */ + uint32_t rx_bytes_received; + + /* Pointer to the configuration block. */ + smci_cfg_t const * p_cfg; + + /* State of this instance of the SMCI */ + smci_state_t smci_state; + + /* Base register for this channel */ + R_SCI0_Type * p_reg; + + void (* p_callback)(smci_callback_args_t *); // Pointer to callback that is called when a smci_event_t occurs. + smci_callback_args_t * p_callback_memory; // Pointer to non-secure memory that can be used to pass arguments to a callback in non-secure memory. + + /* Pointer to context to be passed into callback function */ + void const * p_context; +} sci_smci_instance_ctrl_t; + +/** Register settings to achieve a desired baud rate in Smart Card mode */ +typedef struct st_smci_baud_setting_t +{ + uint32_t computed_baud_rate; + union + { + uint8_t smr_smci_clock_bits; + + struct st_smr_smci_clock_bits_b + { + uint8_t cks : 2; ///< Clock divisor Select + uint8_t bcp01 : 2; ///< Base Clock Pulse + uint8_t : 1; + uint8_t : 1; + uint8_t : 1; + uint8_t : 1; + } smr_smci_clock_bits_b; + }; + + uint8_t scmr_bcp2 : 1; ///< BCP2 setting in Smart Card Mode Register + uint8_t brr; ///< Bit Rate Register setting +} smci_baud_setting_t; + +/** SMCI on SCI device Configuration */ +typedef struct st_sci_smci_extended_cfg +{ + smci_baud_setting_t * p_smci_baud_setting; ///< Register settings for a desired baud rate. +} sci_smci_extended_cfg_t; + +#if defined(__ARMCC_VERSION) || defined(__ICCARM__) +typedef void (BSP_CMSE_NONSECURE_CALL * sci_smci_prv_ns_callback)(smci_callback_args_t * p_args); +#elif defined(__GNUC__) +typedef BSP_CMSE_NONSECURE_CALL void (*volatile sci_smci_prv_ns_callback)(smci_callback_args_t * p_args); +#endif + +/********************************************************************************************************************** + * Exported global variables + **********************************************************************************************************************/ + +/** @cond INC_HEADER_DEFS_SEC */ +/** Filled in Interface API structure for this Instance. */ +extern const smci_api_t g_smci_on_sci; + +/** @endcond */ +fsp_err_t R_SCI_SMCI_Open(smci_ctrl_t * const p_api_ctrl, smci_cfg_t const * const p_cfg); +fsp_err_t R_SCI_SMCI_Write(smci_ctrl_t * const p_api_ctrl, uint8_t const * const p_src, uint32_t const bytes); +fsp_err_t R_SCI_SMCI_Read(smci_ctrl_t * const p_api_ctrl, uint8_t * const p_dest, uint32_t const bytes); +fsp_err_t R_SCI_SMCI_TransferModeSet(smci_ctrl_t * const p_api_ctrl, + smci_transfer_mode_t const * const p_transfer_mode_params); +fsp_err_t R_SCI_SMCI_BaudCalculate(smci_speed_params_t const * const p_speed_params, + uint32_t baud_rate_error_x_1000, + void * const p_baud_setting); + +fsp_err_t R_SCI_SMCI_BaudSet(smci_ctrl_t * const p_api_ctrl, void const * const p_baud_setting); +fsp_err_t R_SCI_SMCI_StatusGet(smci_ctrl_t * const p_api_ctrl, smci_status_t * const p_status); +fsp_err_t R_SCI_SMCI_ClockControl(smci_ctrl_t * const p_api_ctrl, bool clock_enable); +fsp_err_t R_SCI_SMCI_CallbackSet(smci_ctrl_t * const p_api_ctrl, + void ( * p_callback)(smci_callback_args_t *), + void const * const p_context, + smci_callback_args_t * const p_callback_memory); +fsp_err_t R_SCI_SMCI_Close(smci_ctrl_t * const p_api_ctrl); + +void sci_smci_rxi_isr(void); +void sci_smci_txi_isr(void); +void sci_smci_eri_isr(void); + +/*******************************************************************************************************************//** + * @} (end addtogroup SCI_SMCI) + **********************************************************************************************************************/ + +/* Common macro for FSP header files. There is also a corresponding FSP_HEADER macro at the top of this file. */ +FSP_FOOTER + +#endif /* R_SCI_SMCI_H */ diff --git a/ra/fsp/inc/instances/rm_block_media_ram.h b/ra/fsp/inc/instances/rm_block_media_ram.h new file mode 100644 index 000000000..e7463261d --- /dev/null +++ b/ra/fsp/inc/instances/rm_block_media_ram.h @@ -0,0 +1,97 @@ +/*********************************************************************************************************************** + * Copyright [2020-2023] Renesas Electronics Corporation and/or its affiliates. All Rights Reserved. + * + * This software and documentation are supplied by Renesas Electronics America Inc. and may only be used with products + * of Renesas Electronics Corp. and its affiliates ("Renesas"). No other uses are authorized. Renesas products are + * sold pursuant to Renesas terms and conditions of sale. Purchasers are solely responsible for the selection and use + * of Renesas products and Renesas assumes no liability. No license, express or implied, to any intellectual property + * right is granted by Renesas. This software is protected under all applicable laws, including copyright laws. Renesas + * reserves the right to change or discontinue this software and/or this documentation. THE SOFTWARE AND DOCUMENTATION + * IS DELIVERED TO YOU "AS IS," AND RENESAS MAKES NO REPRESENTATIONS OR WARRANTIES, AND TO THE FULLEST EXTENT + * PERMISSIBLE UNDER APPLICABLE LAW, DISCLAIMS ALL WARRANTIES, WHETHER EXPLICITLY OR IMPLICITLY, INCLUDING WARRANTIES + * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, AND NONINFRINGEMENT, WITH RESPECT TO THE SOFTWARE OR + * DOCUMENTATION. RENESAS SHALL HAVE NO LIABILITY ARISING OUT OF ANY SECURITY VULNERABILITY OR BREACH. TO THE MAXIMUM + * EXTENT PERMITTED BY LAW, IN NO EVENT WILL RENESAS BE LIABLE TO YOU IN CONNECTION WITH THE SOFTWARE OR DOCUMENTATION + * (OR ANY PERSON OR ENTITY CLAIMING RIGHTS DERIVED FROM YOU) FOR ANY LOSS, DAMAGES, OR CLAIMS WHATSOEVER, INCLUDING, + * WITHOUT LIMITATION, ANY DIRECT, CONSEQUENTIAL, SPECIAL, INDIRECT, PUNITIVE, OR INCIDENTAL DAMAGES; ANY LOST PROFITS, + * OTHER ECONOMIC DAMAGE, PROPERTY DAMAGE, OR PERSONAL INJURY; AND EVEN IF RENESAS HAS BEEN ADVISED OF THE POSSIBILITY + * OF SUCH LOSS, DAMAGES, CLAIMS OR COSTS. + **********************************************************************************************************************/ + +#ifndef RM_BLOCK_MEDIA_RAM_H +#define RM_BLOCK_MEDIA_RAM_H + +/*********************************************************************************************************************** + * Includes + **********************************************************************************************************************/ +#include "rm_block_media_api.h" + +/* Common macro for FSP header files. There is also a corresponding FSP_FOOTER macro at the end of this file. */ +FSP_HEADER + +/*******************************************************************************************************************//** + * @addtogroup RM_BLOCK_MEDIA_RAM + **********************************************************************************************************************/ + +/*********************************************************************************************************************** + * Macro definitions + **********************************************************************************************************************/ + +/*********************************************************************************************************************** + * Typedef definitions + **********************************************************************************************************************/ + +/** Instance control block. This is private to the FSP and should not be used or modified by the application. */ +typedef struct st_rm_block_media_ram_instance_ctrl +{ + uint32_t open; + rm_block_media_cfg_t const * p_cfg; + uint32_t sector_count; + uint32_t sector_size_bytes; + bool initialized; + bool write_protected; + + void (* p_callback)(rm_block_media_callback_args_t *); // Pointer to callback + rm_block_media_callback_args_t * p_callback_memory; // Pointer to optional callback argument memory + void const * p_context; // Pointer to context to be passed into callback function +} rm_block_media_ram_instance_ctrl_t; + +/********************************************************************************************************************** + * Exported global variables + **********************************************************************************************************************/ + +/** @cond INC_HEADER_DEFS_SEC */ +/** Filled in Interface API structure for this Instance. */ +extern const rm_block_media_api_t g_rm_block_media_on_ram_media; + +/** @endcond */ + +/********************************************************************************************************************** + * Function Prototypes + **********************************************************************************************************************/ +fsp_err_t RM_BLOCK_MEDIA_RAM_Open(rm_block_media_ctrl_t * const p_ctrl, rm_block_media_cfg_t const * const p_cfg); +fsp_err_t RM_BLOCK_MEDIA_RAM_MediaInit(rm_block_media_ctrl_t * const p_ctrl); +fsp_err_t RM_BLOCK_MEDIA_RAM_Read(rm_block_media_ctrl_t * const p_ctrl, + uint8_t * const p_dest_address, + uint32_t const block_address, + uint32_t const num_blocks); +fsp_err_t RM_BLOCK_MEDIA_RAM_Write(rm_block_media_ctrl_t * const p_ctrl, + uint8_t const * const p_src_address, + uint32_t const block_address, + uint32_t const num_blocks); +fsp_err_t RM_BLOCK_MEDIA_RAM_Erase(rm_block_media_ctrl_t * const p_ctrl, + uint32_t const block_address, + uint32_t const num_blocks); +fsp_err_t RM_BLOCK_MEDIA_RAM_StatusGet(rm_block_media_ctrl_t * const p_api_ctrl, + rm_block_media_status_t * const p_status); +fsp_err_t RM_BLOCK_MEDIA_RAM_InfoGet(rm_block_media_ctrl_t * const p_ctrl, rm_block_media_info_t * const p_info); +fsp_err_t RM_BLOCK_MEDIA_RAM_Close(rm_block_media_ctrl_t * const p_ctrl); + +/* Common macro for FSP header files. There is also a corresponding FSP_HEADER macro at the top of this file. */ +FSP_FOOTER + +#endif // RM_BLOCK_MEDIA_RAM_H + +/*******************************************************************************************************************//** + * @} (end addtogroup RM_BLOCK_MEDIA_RAM) + **********************************************************************************************************************/ diff --git a/ra/fsp/inc/instances/rm_comms_uart.h b/ra/fsp/inc/instances/rm_comms_uart.h new file mode 100644 index 000000000..bda60ff20 --- /dev/null +++ b/ra/fsp/inc/instances/rm_comms_uart.h @@ -0,0 +1,98 @@ +/*********************************************************************************************************************** + * Copyright [2020-2023] Renesas Electronics Corporation and/or its affiliates. All Rights Reserved. + * + * This software and documentation are supplied by Renesas Electronics America Inc. and may only be used with products + * of Renesas Electronics Corp. and its affiliates ("Renesas"). No other uses are authorized. Renesas products are + * sold pursuant to Renesas terms and conditions of sale. Purchasers are solely responsible for the selection and use + * of Renesas products and Renesas assumes no liability. No license, express or implied, to any intellectual property + * right is granted by Renesas. This software is protected under all applicable laws, including copyright laws. Renesas + * reserves the right to change or discontinue this software and/or this documentation. THE SOFTWARE AND DOCUMENTATION + * IS DELIVERED TO YOU "AS IS," AND RENESAS MAKES NO REPRESENTATIONS OR WARRANTIES, AND TO THE FULLEST EXTENT + * PERMISSIBLE UNDER APPLICABLE LAW, DISCLAIMS ALL WARRANTIES, WHETHER EXPLICITLY OR IMPLICITLY, INCLUDING WARRANTIES + * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, AND NONINFRINGEMENT, WITH RESPECT TO THE SOFTWARE OR + * DOCUMENTATION. RENESAS SHALL HAVE NO LIABILITY ARISING OUT OF ANY SECURITY VULNERABILITY OR BREACH. TO THE MAXIMUM + * EXTENT PERMITTED BY LAW, IN NO EVENT WILL RENESAS BE LIABLE TO YOU IN CONNECTION WITH THE SOFTWARE OR DOCUMENTATION + * (OR ANY PERSON OR ENTITY CLAIMING RIGHTS DERIVED FROM YOU) FOR ANY LOSS, DAMAGES, OR CLAIMS WHATSOEVER, INCLUDING, + * WITHOUT LIMITATION, ANY DIRECT, CONSEQUENTIAL, SPECIAL, INDIRECT, PUNITIVE, OR INCIDENTAL DAMAGES; ANY LOST PROFITS, + * OTHER ECONOMIC DAMAGE, PROPERTY DAMAGE, OR PERSONAL INJURY; AND EVEN IF RENESAS HAS BEEN ADVISED OF THE POSSIBILITY + * OF SUCH LOSS, DAMAGES, CLAIMS OR COSTS. + **********************************************************************************************************************/ + +/*******************************************************************************************************************//** + * @addtogroup RM_COMMS_UART + * @{ + **********************************************************************************************************************/ + +#ifndef RM_COMMS_UART_H +#define RM_COMMS_UART_H + +/*********************************************************************************************************************** + * Includes + **********************************************************************************************************************/ +#include "r_uart_api.h" +#include "rm_comms_api.h" +#include "rm_comms_uart_cfg.h" + +/* Common macro for FSP header files. There is also a corresponding FSP_FOOTER macro at the end of this file. */ +FSP_HEADER + +/********************************************************************************************************************** + * Macro definitions + **********************************************************************************************************************/ + +/*********************************************************************************************************************** + * Typedef definitions + **********************************************************************************************************************/ + +/* UART bus configuration */ +typedef struct st_rm_comms_uart_extended_cfg +{ +#if BSP_CFG_RTOS + void * const p_tx_mutex; ///< Lock device for writing. + void * const p_rx_mutex; ///< Lock device for reading. + uint32_t const mutex_timeout; ///< Timeout for locking device. + void * const p_tx_semaphore; ///< Block write operations. If this is NULL then operations will be non-blocking and require a callback. + void * const p_rx_semaphore; ///< Block read operations. If this is NULL then operations will be non-blocking and require a callback. +#endif + uart_instance_t const * p_uart; ///< Pointer to UART instance. +} rm_comms_uart_extended_cfg_t; + +/** Communications middleware control structure. */ +typedef struct st_rm_comms_uart_instance_ctrl +{ + uint32_t open; ///< Open flag. + rm_comms_cfg_t const * p_cfg; ///< Middleware configuration. + rm_comms_uart_extended_cfg_t const * p_extend; ///< Pointer to extended configuration structure + + void (* p_callback)(rm_comms_callback_args_t * p_args); ///< Pointer to callback that is called when a uart_event_t occurs. + void const * p_context; ///< Pointer to context passed into callback function +} rm_comms_uart_instance_ctrl_t; + +/********************************************************************************************************************** + * Exported global variables + **********************************************************************************************************************/ + +extern rm_comms_api_t const g_comms_on_comms_uart; + +/** @endcond */ + +/********************************************************************************************************************** + * Public Function Prototypes + **********************************************************************************************************************/ +fsp_err_t RM_COMMS_UART_Open(rm_comms_ctrl_t * const p_api_ctrl, rm_comms_cfg_t const * const p_cfg); +fsp_err_t RM_COMMS_UART_Close(rm_comms_ctrl_t * const p_api_ctrl); +fsp_err_t RM_COMMS_UART_Read(rm_comms_ctrl_t * const p_api_ctrl, uint8_t * const p_dest, uint32_t const bytes); +fsp_err_t RM_COMMS_UART_Write(rm_comms_ctrl_t * const p_api_ctrl, uint8_t * const p_src, uint32_t const bytes); +fsp_err_t RM_COMMS_UART_WriteRead(rm_comms_ctrl_t * const p_api_ctrl, + rm_comms_write_read_params_t const write_read_params); +fsp_err_t RM_COMMS_UART_CallbackSet(rm_comms_ctrl_t * const p_api_ctrl, + void ( * p_callback)(rm_comms_callback_args_t *), + void const * const p_context); + +FSP_FOOTER + +#endif /* RM_COMMS_UART_H */ + +/*******************************************************************************************************************//** + * @} (end addtogroup RM_COMMS_UART) + **********************************************************************************************************************/ diff --git a/ra/fsp/inc/instances/rm_mqtt_onchip_da16xxx.h b/ra/fsp/inc/instances/rm_mqtt_onchip_da16xxx.h new file mode 100644 index 000000000..f8bdab319 --- /dev/null +++ b/ra/fsp/inc/instances/rm_mqtt_onchip_da16xxx.h @@ -0,0 +1,165 @@ +/*********************************************************************************************************************** + * Copyright [2020-2023] Renesas Electronics Corporation and/or its affiliates. All Rights Reserved. + * + * This software and documentation are supplied by Renesas Electronics America Inc. and may only be used with products + * of Renesas Electronics Corp. and its affiliates ("Renesas"). No other uses are authorized. Renesas products are + * sold pursuant to Renesas terms and conditions of sale. Purchasers are solely responsible for the selection and use + * of Renesas products and Renesas assumes no liability. No license, express or implied, to any intellectual property + * right is granted by Renesas. This software is protected under all applicable laws, including copyright laws. Renesas + * reserves the right to change or discontinue this software and/or this documentation. THE SOFTWARE AND DOCUMENTATION + * IS DELIVERED TO YOU "AS IS," AND RENESAS MAKES NO REPRESENTATIONS OR WARRANTIES, AND TO THE FULLEST EXTENT + * PERMISSIBLE UNDER APPLICABLE LAW, DISCLAIMS ALL WARRANTIES, WHETHER EXPLICITLY OR IMPLICITLY, INCLUDING WARRANTIES + * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, AND NONINFRINGEMENT, WITH RESPECT TO THE SOFTWARE OR + * DOCUMENTATION. RENESAS SHALL HAVE NO LIABILITY ARISING OUT OF ANY SECURITY VULNERABILITY OR BREACH. TO THE MAXIMUM + * EXTENT PERMITTED BY LAW, IN NO EVENT WILL RENESAS BE LIABLE TO YOU IN CONNECTION WITH THE SOFTWARE OR DOCUMENTATION + * (OR ANY PERSON OR ENTITY CLAIMING RIGHTS DERIVED FROM YOU) FOR ANY LOSS, DAMAGES, OR CLAIMS WHATSOEVER, INCLUDING, + * WITHOUT LIMITATION, ANY DIRECT, CONSEQUENTIAL, SPECIAL, INDIRECT, PUNITIVE, OR INCIDENTAL DAMAGES; ANY LOST PROFITS, + * OTHER ECONOMIC DAMAGE, PROPERTY DAMAGE, OR PERSONAL INJURY; AND EVEN IF RENESAS HAS BEEN ADVISED OF THE POSSIBILITY + * OF SUCH LOSS, DAMAGES, CLAIMS OR COSTS. + **********************************************************************************************************************/ + +/*******************************************************************************************************************//** + * @addtogroup MQTT_ONCHIP_DA16XXX MQTT_ONCHIP_DA16XXX + * @{ + **********************************************************************************************************************/ + +#ifndef RM_MQTT_ONCHIP_DA16XXX_H_ +#define RM_MQTT_ONCHIP_DA16XXX_H_ + +#include <stdio.h> +#include <stdlib.h> +#include <string.h> + +#include "rm_mqtt_onchip_da16xxx_cfg.h" + +#define MQTT_ONCHIP_DA16XXX_MAX_ALPN (3) ///< Maximum number of ALPNs supported by DA16XXX. +#define MQTT_ONCHIP_DA16XXX_MAX_SNI_LEN (64) ///< Maximum length of SNI supported by DA16XXX. +#define MQTT_ONCHIP_DA16XXX_TLS_CIPHER_SUITE_MAX (17) ///< Maximum number of TLS cipher suites supported by DA16XXX. +#define MQTT_ONCHIP_DA16XXX_TLS_CIPHER_MAX_CNT (17) ///< Maximum number of TLS cipher suites supported by DA16XXX. +#define MQTT_ONCHIP_DA16XXX_MAX_TOPIC_LEN (64) ///< Maximum total length for topics supported by DA16XXX. +#define MQTT_ONCHIP_DA16XXX_MAX_PUBMSG_LEN (2048) ///< Maximum total length for message supported by DA16XXX. +#define MQTT_ONCHIP_DA16XXX_MAX_PUBTOPICMSG_LEN (2063) ///< Maximum total length for message + topic supported by DA16XXX. +#define MQTT_ONCHIP_DA16XXX_SUBTOPIC_MAX_CNT (32) ///< Maximum number of subscription topics allowed. + +#define MQTT_ONCHIP_DA16XXX_CFG_CMD_TX_BUF_SIZE (2048) ///< Size of the transmit buffer for the MQTT client. +#define MQTT_ONCHIP_DA16XXX_CFG_CMD_RX_BUF_SIZE (3000) ///< Size of the receive buffer for the MQTT client. + +/** MQTT Quality-of-service (QoS) levels */ +typedef enum e_mqtt_onchip_da16xxx_qos +{ + MQTT_ONCHIP_DA16XXX_QOS_0 = 0, ///< Delivery at most once. + MQTT_ONCHIP_DA16XXX_QOS_1 = 1, ///< Delivery at least once. + MQTT_ONCHIP_DA16XXX_QOS_2 = 2 ///< Delivery exactly once. +} mqtt_onchip_da16xxx_qos_t; + +/** MQTT TLS Cipher Suites */ +typedef enum e_mqtt_onchip_da16xxx_tls_cipher_suites +{ + TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA = 0xC011, ///< TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA protocol. + TLS_ECDHE_RSA_WITH_AES_256_CBC_SHA = 0xC014, ///< TLS_ECDHE_RSA_WITH_AES_256_CBC_SHA protocol. + TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256 = 0xC027, ///< TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256 protocol. + TLS_ECDHE_RSA_WITH_AES_256_CBC_SHA384 = 0xC028, ///< TLS_ECDHE_RSA_WITH_AES_256_CBC_SHA384 protocol. + TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256 = 0xC02F, ///< TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256 protocol. + TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384 = 0xC030, ///< TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384 protocol. + TLS_ECDHE_ECDSA_WITH_AES_128_CBC_SHA = 0xC009, ///< TLS_ECDHE_ECDSA_WITH_AES_128_CBC_SHA protocol. + TLS_ECDHE_ECDSA_WITH_AES_256_CBC_SHA = 0xC00A, ///< TLS_ECDHE_ECDSA_WITH_AES_256_CBC_SHA protocol. + TLS_ECDHE_ECDSA_WITH_AES_128_CBC_SHA256 = 0xC023, ///< TLS_ECDHE_ECDSA_WITH_AES_128_CBC_SHA256 protocol. + TLS_ECDHE_ECDSA_WITH_AES_256_CBC_SHA384 = 0xC024, ///< TLS_ECDHE_ECDSA_WITH_AES_256_CBC_SHA384 protocol. + TLS_ECDHE_ECDSA_WITH_AES_128_GCM_SHA256 = 0xC02B, ///< TLS_ECDHE_ECDSA_WITH_AES_128_GCM_SHA256 protocol. + TLS_ECDHE_ECDSA_WITH_AES_256_GCM_SHA384 = 0xC02C, ///< TLS_ECDHE_ECDSA_WITH_AES_256_GCM_SHA384 protocol. +} mqtt_onchip_da16xxx_tls_cipher_suites_t; + +/** MQTT SUBSCRIBE packet parameters */ +typedef struct st_mqtt_onchip_da16xxx_sub_info +{ + mqtt_onchip_da16xxx_qos_t qos; ///< Quality of Service for subscription. + const char * p_topic_filter; ///< Topic filter to subscribe to. + uint16_t topic_filter_length; ///< Length of subscription topic filter. +} mqtt_onchip_da16xxx_sub_info_t; + +/** MQTT PUBLISH packet parameters */ +typedef struct st_mqtt_onchip_da16xxx_pub_info +{ + mqtt_onchip_da16xxx_qos_t qos; ///< Quality of Service for subscription. + const char * p_topic_name; ///< Topic name on which the message is published. + uint16_t topic_name_Length; ///< Length of topic name. + const char * p_payload; ///< Message payload. + uint32_t payload_length; ///< Message payload length. +} mqtt_onchip_da16xxx_pub_info_t; + +/** MQTT Packet info structure to be passed to user callback */ +typedef struct st_mqtt_onchip_da16xxx_callback_args +{ + uint8_t * p_data; ///< Payload received from subscribed MQTT topic. + const char * p_topic; ///< Topic to which the message payload belongs to. + uint32_t data_length; ///< Length of the MQTT payload. + void const * p_context; ///< Placeholder for user data. +} mqtt_onchip_da16xxx_callback_args_t; + +/** MQTT Configuration */ +typedef struct st_mqtt_onchip_da16xxx_cfg +{ + const uint8_t use_mqtt_v311; ///< Flag to use MQTT v3.1.1. + const uint16_t rx_timeout; ///< MQTT Rx timeout in milliseconds. + const uint16_t tx_timeout; ///< MQTT Tx timeout in milliseconds. + + void (* p_callback)(mqtt_onchip_da16xxx_callback_args_t * p_args); ///< Location of user callback. + void const * p_context; ///< Placeholder for user data. Passed to the user callback in mqtt_onchip_da16xxx_callback_args_t. + uint8_t clean_session; ///< Whether to establish a new, clean session or resume a previous session. + uint8_t alpn_count; ///< ALPN Protocols count. Max value is 3. + const char * p_alpns[MQTT_ONCHIP_DA16XXX_MAX_ALPN]; ///< ALPN Protocols. + uint8_t tls_cipher_count; ///< TLS Cipher suites count. Max value is 17. + uint16_t keep_alive_seconds; ///< MQTT keep alive period. + const char * p_client_identifier; ///< MQTT Client identifier. Must be unique per client. + uint16_t client_identifier_length; ///< Length of the client identifier. + const char * p_host_name; ///< MQTT endpoint host name. + const uint16_t mqtt_port; ///< MQTT Port number. + const char * p_mqtt_user_name; ///< MQTT user name. Set to NULL if not used. + uint16_t user_name_length; ///< Length of MQTT user name. Set to 0 if not used. + const char * p_mqtt_password; ///< MQTT password. Set to NULL if not used. + uint16_t password_length; ///< Length of MQTT password. Set to 0 if not used. + const char * p_root_ca; ///< String representing a trusted server root certificate. + uint32_t root_ca_size; ///< Size associated with root CA Certificate. + const char * p_client_cert; ///< String representing a Client certificate. + uint32_t client_cert_size; ///< Size associated with Client certificate. + const char * p_client_private_key; ///< String representing Client Private Key. + uint32_t private_key_size; ///< Size associated with Client Private Key. + const char * p_will_topic; ///< String representing Will Topic. + const char * p_will_msg; ///< String representing Will Message. + const char * p_sni_name; ///< Server Name Indication. + + mqtt_onchip_da16xxx_qos_t will_qos_level; ///< Will Topic QoS level. + mqtt_onchip_da16xxx_tls_cipher_suites_t p_tls_cipher_suites[MQTT_ONCHIP_DA16XXX_TLS_CIPHER_MAX_CNT]; ///< TLS Cipher suites supported. +} mqtt_onchip_da16xxx_cfg_t; + +/** MQTT_ONCHIP_DA16XXX private control block. DO NOT MODIFY. */ +typedef struct st_mqtt_onchip_da16xxx_instance_ctrl +{ + uint8_t cmd_tx_buff[MQTT_ONCHIP_DA16XXX_CFG_CMD_TX_BUF_SIZE]; ///< Command send buffer. + uint8_t cmd_rx_buff[MQTT_ONCHIP_DA16XXX_CFG_CMD_RX_BUF_SIZE]; ///< Command receive buffer. + uint32_t open; ///< Flag to indicate if MQTT has been opened. + bool is_mqtt_connected; ///< Flag to track MQTT connection status. + mqtt_onchip_da16xxx_cfg_t const * p_cfg; ///< Pointer to p_cfg for MQTT. +} mqtt_onchip_da16xxx_instance_ctrl_t; + +/* MQTT public function prototypes */ +fsp_err_t RM_MQTT_DA16XXX_Open(mqtt_onchip_da16xxx_instance_ctrl_t * p_ctrl, + mqtt_onchip_da16xxx_cfg_t const * const p_cfg); +fsp_err_t RM_MQTT_DA16XXX_Disconnect(mqtt_onchip_da16xxx_instance_ctrl_t * p_ctrl); +fsp_err_t RM_MQTT_DA16XXX_Connect(mqtt_onchip_da16xxx_instance_ctrl_t * p_ctrl, uint32_t timeout_ms); +fsp_err_t RM_MQTT_DA16XXX_Publish(mqtt_onchip_da16xxx_instance_ctrl_t * p_ctrl, + mqtt_onchip_da16xxx_pub_info_t * const p_pub_info); +fsp_err_t RM_MQTT_DA16XXX_Subscribe(mqtt_onchip_da16xxx_instance_ctrl_t * p_ctrl, + mqtt_onchip_da16xxx_sub_info_t * const p_sub_info, + size_t subscription_count); +fsp_err_t RM_MQTT_DA16XXX_UnSubscribe(mqtt_onchip_da16xxx_instance_ctrl_t * p_ctrl, + mqtt_onchip_da16xxx_sub_info_t * const p_sub_info); +fsp_err_t RM_MQTT_DA16XXX_Receive(mqtt_onchip_da16xxx_instance_ctrl_t * p_ctrl, + mqtt_onchip_da16xxx_cfg_t const * const p_cfg); +fsp_err_t RM_MQTT_DA16XXX_Close(mqtt_onchip_da16xxx_instance_ctrl_t * p_ctrl); + +#endif /* RM_MQTT_ONCHIP_DA16XXX_H_ */ + +/*******************************************************************************************************************//** + * @} (end addtogroup MQTT_ONCHIP_DA16XXX) + **********************************************************************************************************************/ diff --git a/ra/fsp/inc/instances/rm_rai_data_collector.h b/ra/fsp/inc/instances/rm_rai_data_collector.h new file mode 100644 index 000000000..df901f148 --- /dev/null +++ b/ra/fsp/inc/instances/rm_rai_data_collector.h @@ -0,0 +1,131 @@ +/*********************************************************************************************************************** + * Copyright [2020-2023] Renesas Electronics Corporation and/or its affiliates. All Rights Reserved. + * + * This software and documentation are supplied by Renesas Electronics America Inc. and may only be used with products + * of Renesas Electronics Corp. and its affiliates ("Renesas"). No other uses are authorized. Renesas products are + * sold pursuant to Renesas terms and conditions of sale. Purchasers are solely responsible for the selection and use + * of Renesas products and Renesas assumes no liability. No license, express or implied, to any intellectual property + * right is granted by Renesas. This software is protected under all applicable laws, including copyright laws. Renesas + * reserves the right to change or discontinue this software and/or this documentation. THE SOFTWARE AND DOCUMENTATION + * IS DELIVERED TO YOU "AS IS," AND RENESAS MAKES NO REPRESENTATIONS OR WARRANTIES, AND TO THE FULLEST EXTENT + * PERMISSIBLE UNDER APPLICABLE LAW, DISCLAIMS ALL WARRANTIES, WHETHER EXPLICITLY OR IMPLICITLY, INCLUDING WARRANTIES + * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, AND NONINFRINGEMENT, WITH RESPECT TO THE SOFTWARE OR + * DOCUMENTATION. RENESAS SHALL HAVE NO LIABILITY ARISING OUT OF ANY SECURITY VULNERABILITY OR BREACH. TO THE MAXIMUM + * EXTENT PERMITTED BY LAW, IN NO EVENT WILL RENESAS BE LIABLE TO YOU IN CONNECTION WITH THE SOFTWARE OR DOCUMENTATION + * (OR ANY PERSON OR ENTITY CLAIMING RIGHTS DERIVED FROM YOU) FOR ANY LOSS, DAMAGES, OR CLAIMS WHATSOEVER, INCLUDING, + * WITHOUT LIMITATION, ANY DIRECT, CONSEQUENTIAL, SPECIAL, INDIRECT, PUNITIVE, OR INCIDENTAL DAMAGES; ANY LOST PROFITS, + * OTHER ECONOMIC DAMAGE, PROPERTY DAMAGE, OR PERSONAL INJURY; AND EVEN IF RENESAS HAS BEEN ADVISED OF THE POSSIBILITY + * OF SUCH LOSS, DAMAGES, CLAIMS OR COSTS. + **********************************************************************************************************************/ + +#ifndef RM_RAI_DATA_COLLECTOR_H +#define RM_RAI_DATA_COLLECTOR_H + +/*********************************************************************************************************************** + * Includes + **********************************************************************************************************************/ +#include <stdlib.h> + +/* Fixed width integer support. */ +#include <stdint.h> + +/* bool support */ +#include <stdbool.h> + +#include "bsp_api.h" +#include "rm_rai_data_collector_cfg.h" +#include "rm_rai_data_collector_api.h" + +/* Common macro for FSP header files. There is also a corresponding FSP_FOOTER macro at the end of this file. */ +FSP_HEADER + +/*******************************************************************************************************************//** + * @addtogroup RM_RAI_DATA_COLLECTOR + * @{ + **********************************************************************************************************************/ + +/*********************************************************************************************************************** + * Macro definitions + **********************************************************************************************************************/ + +/* PING PONG buffer is required */ +#define RAI_DATA_COLLECTOR_PING_PONG_BUFFER_SIZE (2) + +/*********************************************************************************************************************** + * Typedef definitions + **********************************************************************************************************************/ + +/* Buffer status */ +typedef enum e_rai_data_collector_buffer_status_type +{ + RAI_DATA_COLLECTOR_BUFFER_STATUS_IDLE = 0x00, // PING(or PONG) buffer is idle + RAI_DATA_COLLECTOR_BUFFER_STATUS_BUSY = 0x01, // PING(or PONG) buffer is being used + RAI_DATA_COLLECTOR_BUFFER_STATUS_OVERRUN = 0x02, // PING(or PONG) buffer is overrun +} rai_data_collector_buffer_status_t; + +/* Frame buffer (PING PONG buffer) handle */ +typedef struct st_rai_data_collector_frame_buffer_handle_type +{ + uint32_t buf_idx; // Which buffer (PING or PONG) is being used + uint32_t accumulated_len; // Data samples accumulated in each frame buffer +} rai_data_collector_frame_buffer_handle_t; + +/* RAI_DATA_COLLECTOR extended configuration */ +typedef struct st_rai_data_collector_extended_cfg +{ + transfer_info_t * p_transfer_info; // Array of DTC transfer information + rai_data_collector_frame_buffer_t * p_ping_pong_buf; // Array of PING-PONG buffers + rai_data_collector_frame_buffer_handle_t * p_ping_pong_buf_hnd; // Array of buffer handles +} rai_data_collector_extended_cfg_t; + +/** RAI_DATA_COLLECTOR instance control block. Initialization occurs when RM_RAI_DATA_COLLECTOR_Open() is called. */ +typedef struct st_rai_data_collector_instance_ctrl +{ + uint32_t opened; // Flag to determine if the module is open or not + + volatile uint32_t channel_ready; // Bit mask of channels that have frame buffers ready to submit + volatile rai_data_collector_buffer_status_t buf_status; // PING-PONG buffer status + + rai_data_collector_cfg_t const * p_cfg; // Pointer to configuration structure + rai_data_collector_extended_cfg_t * p_extend; // Pointer to extended configuration structure +} rai_data_collector_instance_ctrl_t; + +/********************************************************************************************************************** + * Exported global variables + **********************************************************************************************************************/ + +/** @cond INC_HEADER_DEFS_SEC */ +/** Interface Structure for user access */ +extern const rai_data_collector_api_t g_dc_on_rai_data_collector; + +/** @endcond */ + +/*********************************************************************************************************************** + * Public APIs + **********************************************************************************************************************/ +fsp_err_t RM_RAI_DATA_COLLECTOR_Open(rai_data_collector_ctrl_t * const p_api_ctrl, + rai_data_collector_cfg_t const * const p_cfg); +fsp_err_t RM_RAI_DATA_COLLECTOR_SnapshotChannelRegister(rai_data_collector_ctrl_t * const p_api_ctrl, + uint8_t channel, + void const * p_src); +fsp_err_t RM_RAI_DATA_COLLECTOR_BufferReset(rai_data_collector_ctrl_t * const p_api_ctrl); +fsp_err_t RM_RAI_DATA_COLLECTOR_BufferRelease(rai_data_collector_ctrl_t * const p_api_ctrl); +fsp_err_t RM_RAI_DATA_COLLECTOR_ChannelBufferGet(rai_data_collector_ctrl_t * const p_api_ctrl, + uint8_t channel, + void ** pp_buf); +fsp_err_t RM_RAI_DATA_COLLECTOR_ChannelWrite(rai_data_collector_ctrl_t * const p_api_ctrl, + uint8_t channel, + const void * p_buf, + uint32_t len); +fsp_err_t RM_RAI_DATA_COLLECTOR_SnapshotStart(rai_data_collector_ctrl_t * const p_api_ctrl); +fsp_err_t RM_RAI_DATA_COLLECTOR_SnapshotStop(rai_data_collector_ctrl_t * const p_api_ctrl); +fsp_err_t RM_RAI_DATA_COLLECTOR_Close(rai_data_collector_ctrl_t * const p_api_ctrl); + +/*******************************************************************************************************************//** + * @} (end addgroup RM_RAI_DATA_COLLECTOR) + **********************************************************************************************************************/ + +/* Common macro for FSP header files. There is also a corresponding FSP_HEADER macro at the top of this file. */ +FSP_FOOTER + +#endif diff --git a/ra/fsp/inc/instances/rm_rai_data_shipper.h b/ra/fsp/inc/instances/rm_rai_data_shipper.h new file mode 100644 index 000000000..1a395a606 --- /dev/null +++ b/ra/fsp/inc/instances/rm_rai_data_shipper.h @@ -0,0 +1,128 @@ +/*********************************************************************************************************************** + * Copyright [2020-2023] Renesas Electronics Corporation and/or its affiliates. All Rights Reserved. + * + * This software and documentation are supplied by Renesas Electronics America Inc. and may only be used with products + * of Renesas Electronics Corp. and its affiliates ("Renesas"). No other uses are authorized. Renesas products are + * sold pursuant to Renesas terms and conditions of sale. Purchasers are solely responsible for the selection and use + * of Renesas products and Renesas assumes no liability. No license, express or implied, to any intellectual property + * right is granted by Renesas. This software is protected under all applicable laws, including copyright laws. Renesas + * reserves the right to change or discontinue this software and/or this documentation. THE SOFTWARE AND DOCUMENTATION + * IS DELIVERED TO YOU "AS IS," AND RENESAS MAKES NO REPRESENTATIONS OR WARRANTIES, AND TO THE FULLEST EXTENT + * PERMISSIBLE UNDER APPLICABLE LAW, DISCLAIMS ALL WARRANTIES, WHETHER EXPLICITLY OR IMPLICITLY, INCLUDING WARRANTIES + * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, AND NONINFRINGEMENT, WITH RESPECT TO THE SOFTWARE OR + * DOCUMENTATION. RENESAS SHALL HAVE NO LIABILITY ARISING OUT OF ANY SECURITY VULNERABILITY OR BREACH. TO THE MAXIMUM + * EXTENT PERMITTED BY LAW, IN NO EVENT WILL RENESAS BE LIABLE TO YOU IN CONNECTION WITH THE SOFTWARE OR DOCUMENTATION + * (OR ANY PERSON OR ENTITY CLAIMING RIGHTS DERIVED FROM YOU) FOR ANY LOSS, DAMAGES, OR CLAIMS WHATSOEVER, INCLUDING, + * WITHOUT LIMITATION, ANY DIRECT, CONSEQUENTIAL, SPECIAL, INDIRECT, PUNITIVE, OR INCIDENTAL DAMAGES; ANY LOST PROFITS, + * OTHER ECONOMIC DAMAGE, PROPERTY DAMAGE, OR PERSONAL INJURY; AND EVEN IF RENESAS HAS BEEN ADVISED OF THE POSSIBILITY + * OF SUCH LOSS, DAMAGES, CLAIMS OR COSTS. + **********************************************************************************************************************/ + +#ifndef RM_RAI_DATA_SHIPPER_H +#define RM_RAI_DATA_SHIPPER_H + +/*********************************************************************************************************************** + * Includes + **********************************************************************************************************************/ +#include <stdlib.h> + +/* Fixed width integer support. */ +#include <stdint.h> + +/* bool support */ +#include <stdbool.h> + +#include "bsp_api.h" +#include "rm_rai_data_shipper_cfg.h" +#include "rm_rai_data_shipper_api.h" + +/* Common macro for FSP header files. There is also a corresponding FSP_FOOTER macro at the end of this file. */ +FSP_HEADER + +/*******************************************************************************************************************//** + * @addtogroup RM_RAI_DATA_SHIPPER + * @{ + **********************************************************************************************************************/ + +/*********************************************************************************************************************** + * Macro definitions + **********************************************************************************************************************/ + +/* Max number of data channels (including CRC) to be sent */ +#ifdef RM_RAI_DATA_COLLECTOR_CFG_MAX_CHANNELS + #define RM_RAI_DATA_SHIPPER_CFG_MAX_CHANNELS (RM_RAI_DATA_COLLECTOR_CFG_MAX_CHANNELS + 1) // Sensor data from Data collector + 1 channel for CRC +#else + #define RM_RAI_DATA_SHIPPER_CFG_MAX_CHANNELS (16) +#endif + +/* Header buffer structure */ +typedef __PACKED_STRUCT st_rai_data_shipper_header_buffer_type +{ + uint8_t rssn[4]; // "RSSN" for synchronization + uint8_t version; // Version + uint8_t crc_enable; // CRC enabled or not + uint8_t instance_id; // Data collector instance id + uint8_t reserved; // Reserved + uint16_t events; // Events e.g buffer overflow + uint16_t diagnostic_data_len; // Diagnostic data length in bytes + uint32_t frame_buf_len; // Frame buffer length in data samples + uint8_t channels; // Total number of sensors + uint8_t data_type[(RM_RAI_DATA_SHIPPER_CFG_MAX_CHANNELS) / 2]; // Channel data type. 4-bit for each channel. +} rai_data_shipper_header_buffer_t; + +typedef struct st_rai_data_shipper_data_buffer_type +{ + void * p_buf; // Pointer to data buffer + uint32_t len; // Data buffer length in bytes +} rai_data_shipper_data_buffer_t; + +typedef __PACKED_STRUCT st_rai_data_shipper_tx_info_type +{ + uint8_t current; // Current channel being sent + uint8_t channels; // Total number of channels + uint8_t write_requests; // Skipped write request counter + uint8_t crc; // 8-bit CRC value + + rai_data_shipper_data_buffer_t data[RM_RAI_DATA_SHIPPER_CFG_MAX_CHANNELS]; // Array of data buffers to be sent + rai_data_shipper_header_buffer_t header; // Header buffer +} rai_data_shipper_tx_info_t; + +/** RAI_DATA_SHIPPER instance control block. Initialization occurs when RM_RAI_DATA_SHIPPER_Open() is called. */ +typedef struct st_rai_data_shipper_instance_ctrl +{ + uint32_t opened; // Flag to determine if the module is open or not + rai_data_shipper_cfg_t const * p_cfg; // Pointer to configuration structure + rai_data_shipper_tx_info_t tx_info; // Tx info +} rai_data_shipper_instance_ctrl_t; + +/********************************************************************************************************************** + * Exported global variables + **********************************************************************************************************************/ + +/** @cond INC_HEADER_DEFS_SEC */ +/** Interface Structure for user access */ +extern const rai_data_shipper_api_t g_ds_on_rai_data_shipper; + +/** @endcond */ + +/*********************************************************************************************************************** + * Public APIs + **********************************************************************************************************************/ + +fsp_err_t RM_RAI_DATA_SHIPPER_Open(rai_data_shipper_ctrl_t * const p_api_ctrl, + rai_data_shipper_cfg_t const * const p_cfg); +fsp_err_t RM_RAI_DATA_SHIPPER_Read(rai_data_shipper_ctrl_t * const p_api_ctrl, + void * const p_buf, + uint32_t * const buf_len); +fsp_err_t RM_RAI_DATA_SHIPPER_Write(rai_data_shipper_ctrl_t * const p_api_ctrl, + rai_data_shipper_write_params_t const * p_write_params); +fsp_err_t RM_RAI_DATA_SHIPPER_Close(rai_data_shipper_ctrl_t * const p_api_ctrl); + +/*******************************************************************************************************************//** + * @} (end addgroup RM_RAI_DATA_SHIPPER) + **********************************************************************************************************************/ + +/* Common macro for FSP header files. There is also a corresponding FSP_HEADER macro at the top of this file. */ +FSP_FOOTER + +#endif diff --git a/ra/fsp/inc/instances/rm_wifi_onchip_da16200.h b/ra/fsp/inc/instances/rm_wifi_onchip_da16xxx.h similarity index 65% rename from ra/fsp/inc/instances/rm_wifi_onchip_da16200.h rename to ra/fsp/inc/instances/rm_wifi_onchip_da16xxx.h index 29897132e..fc1c0d224 100644 --- a/ra/fsp/inc/instances/rm_wifi_onchip_da16200.h +++ b/ra/fsp/inc/instances/rm_wifi_onchip_da16xxx.h @@ -19,59 +19,57 @@ **********************************************************************************************************************/ /*******************************************************************************************************************//** - * @addtogroup WIFI_ONCHIP_DA16200 WIFI_ONCHIP_DA16200 + * @addtogroup WIFI_ONCHIP_DA16XXX WIFI_ONCHIP_DA16XXX * @{ **********************************************************************************************************************/ -#ifndef RM_WIFI_ONCHIP_DA16200_H - #define RM_WIFI_ONCHIP_DA16200_H +#ifndef RM_WIFI_ONCHIP_DA16XXX_H +#define RM_WIFI_ONCHIP_DA16XXX_H /*********************************************************************************************************************** * Includes **********************************************************************************************************************/ /* Register definitions, common services and error codes. */ - #include <stdio.h> - #include <stdlib.h> - #include <string.h> - #include "bsp_api.h" - #include "time.h" - - #include "r_ioport_api.h" - #include "r_ioport.h" - #include "r_uart_api.h" - - #include "FreeRTOS.h" - #include "semphr.h" - #include "stream_buffer.h" - #include "rm_wifi_config.h" - #include "rm_wifi_api.h" - #include "rm_wifi_onchip_da16200_cfg.h" +#include <stdio.h> +#include <stdlib.h> +#include <string.h> +#include "bsp_api.h" +#include "time.h" + +#include "r_ioport_api.h" +#include "r_ioport.h" +#include "r_uart_api.h" + +#include "FreeRTOS.h" +#include "semphr.h" +#include "stream_buffer.h" +#include "rm_wifi_config.h" +#include "rm_wifi_api.h" +#include "rm_wifi_onchip_da16xxx_cfg.h" /** * @brief Max SSID length */ - #ifndef wificonfigMAX_SSID_LEN - #define wificonfigMAX_SSID_LEN 32 - #endif +#ifndef wificonfigMAX_SSID_LEN + #define wificonfigMAX_SSID_LEN 32 +#endif /** * @brief Max BSSID length */ - #ifndef wificonfigMAX_BSSID_LEN - #define wificonfigMAX_BSSID_LEN 6 - #endif +#ifndef wificonfigMAX_BSSID_LEN + #define wificonfigMAX_BSSID_LEN 6 +#endif /** * @brief Max passphrase length */ - #ifndef wificonfigMAX_PASSPHRASE_LEN - #define wificonfigMAX_PASSPHRASE_LEN 32 - #endif - - #ifndef rm_wifi_onchip_da16200_uart_callback -void rm_wifi_onchip_da16200_uart_callback(uart_callback_args_t * p_args); +#ifndef wificonfigMAX_PASSPHRASE_LEN + #define wificonfigMAX_PASSPHRASE_LEN 32 +#endif - #endif +#ifndef rm_wifi_onchip_da16xxx_uart_callback +void rm_wifi_onchip_da16xxx_uart_callback(uart_callback_args_t * p_args); #endif @@ -82,60 +80,60 @@ FSP_HEADER * Macro definitions **********************************************************************************************************************/ -/* Encryption Type supported by DA16200 module */ -#define WIFI_ONCHIP_DA16200_TKIP_ENC_TYPE (0) -#define WIFI_ONCHIP_DA16200_AES_ENC_TYPE (1) -#define WIFI_ONCHIP_DA16200_TKIP_AES_ENC_TYPE (2) +/* Encryption Type supported by DA16XXX module */ +#define WIFI_ONCHIP_DA16XXX_TKIP_ENC_TYPE (0) +#define WIFI_ONCHIP_DA16XXX_AES_ENC_TYPE (1) +#define WIFI_ONCHIP_DA16XXX_TKIP_AES_ENC_TYPE (2) -#define SOCKETS_IPPROTO_V4_DA16200 (4) +#define SOCKETS_IPPROTO_V4_DA16XXX (4) /*********************************************************************************************************************** * Typedef definitions **********************************************************************************************************************/ -/** DA16200 WiFi module enable/disable for SNTP */ -typedef enum e_wifi_onchip_da16200_sntp_enable +/** DA16XXX WiFi module enable/disable for SNTP */ +typedef enum e_wifi_onchip_da16xxx_sntp_enable { - WIFI_ONCHIP_DA16200_SNTP_DISABLE = 0, - WIFI_ONCHIP_DA16200_SNTP_ENABLE = 1 -} wifi_onchip_da16200_sntp_enable_t; + WIFI_ONCHIP_DA16XXX_SNTP_DISABLE = 0, + WIFI_ONCHIP_DA16XXX_SNTP_ENABLE = 1 +} wifi_onchip_da16xxx_sntp_enable_t; -/** DA16200 Wifi socket status types */ -typedef enum e_da16200_socket_status +/** DA16XXX Wifi socket status types */ +typedef enum e_da16xxx_socket_status { - WIFI_ONCHIP_DA16200_SOCKET_STATUS_CLOSED = 0, - WIFI_ONCHIP_DA16200_SOCKET_STATUS_SOCKET, - WIFI_ONCHIP_DA16200_SOCKET_STATUS_BOUND, - WIFI_ONCHIP_DA16200_SOCKET_STATUS_LISTEN, - WIFI_ONCHIP_DA16200_SOCKET_STATUS_CONNECTED -} da16200_socket_status_t; - -/** DA16200 socket shutdown channels */ -typedef enum e_da16200_socket_rw + WIFI_ONCHIP_DA16XXX_SOCKET_STATUS_CLOSED = 0, + WIFI_ONCHIP_DA16XXX_SOCKET_STATUS_SOCKET, + WIFI_ONCHIP_DA16XXX_SOCKET_STATUS_BOUND, + WIFI_ONCHIP_DA16XXX_SOCKET_STATUS_LISTEN, + WIFI_ONCHIP_DA16XXX_SOCKET_STATUS_CONNECTED +} da16xxx_socket_status_t; + +/** DA16XXX socket shutdown channels */ +typedef enum e_da16xxx_socket_rw { - WIFI_ONCHIP_DA16200_SOCKET_READ = 1, - WIFI_ONCHIP_DA16200_SOCKET_WRITE = 2 -} da16200_socket_rw; + WIFI_ONCHIP_DA16XXX_SOCKET_READ = 1, + WIFI_ONCHIP_DA16XXX_SOCKET_WRITE = 2 +} da16xxx_socket_rw; -/** DA16200 socket receive state */ -typedef enum e_da16200_recv_state +/** DA16XXX socket receive state */ +typedef enum e_da16xxx_recv_state { - WIFI_ONCHIP_DA16200_RECV_PREFIX, // + - WIFI_ONCHIP_DA16200_RECV_CMD, // command - WIFI_ONCHIP_DA16200_RECV_SUFFIX, // : - WIFI_ONCHIP_DA16200_RECV_PARAM_CID, // cid parameter - WIFI_ONCHIP_DA16200_RECV_PARAM_IP, // ip parameter - WIFI_ONCHIP_DA16200_RECV_PARAM_PORT, // port parameter - WIFI_ONCHIP_DA16200_RECV_PARAM_LEN, // length parameter - WIFI_ONCHIP_DA16200_RECV_DATA -} da16200_recv_state; - -/** DA16200 WiFi module enable/disable for SNTP Daylight */ -typedef enum e_wifi_onchip_da16200_sntp_daylight_savings_enable + WIFI_ONCHIP_DA16XXX_RECV_PREFIX, // + + WIFI_ONCHIP_DA16XXX_RECV_CMD, // command + WIFI_ONCHIP_DA16XXX_RECV_SUFFIX, // : + WIFI_ONCHIP_DA16XXX_RECV_PARAM_CID, // cid parameter + WIFI_ONCHIP_DA16XXX_RECV_PARAM_IP, // ip parameter + WIFI_ONCHIP_DA16XXX_RECV_PARAM_PORT, // port parameter + WIFI_ONCHIP_DA16XXX_RECV_PARAM_LEN, // length parameter + WIFI_ONCHIP_DA16XXX_RECV_DATA +} da16xxx_recv_state; + +/** DA16XXX WiFi module enable/disable for SNTP Daylight */ +typedef enum e_wifi_onchip_da16xxx_sntp_daylight_savings_enable { - WIFI_ONCHIP_DA16200_SNTP_DAYLIGHT_SAVINGS_DISABLE = 0, - WIFI_ONCHIP_DA16200_SNTP_DAYLIGHT_SAVINGS_ENABLE = 1, -} wifi_onchip_da16200_sntp_daylight_savings_enable_t; + WIFI_ONCHIP_DA16XXX_SNTP_DAYLIGHT_SAVINGS_DISABLE = 0, + WIFI_ONCHIP_DA16XXX_SNTP_DAYLIGHT_SAVINGS_ENABLE = 1, +} wifi_onchip_da16xxx_sntp_daylight_savings_enable_t; /** User configuration structure, used in open function */ typedef struct st_wifi_onchip_cfg @@ -144,14 +142,14 @@ typedef struct st_wifi_onchip_cfg const uint32_t num_sockets; ///< Number of sockets to initialize const uint8_t * country_code; ///< Country code defined in ISO3166-1 alpha-2 standard const bsp_io_port_pin_t reset_pin; ///< Reset pin used for module - const uart_instance_t * uart_instances[WIFI_ONCHIP_DA16200_CFG_MAX_NUMBER_UART_PORTS]; ///< SCI UART instances + const uart_instance_t * uart_instances[WIFI_ONCHIP_DA16XXX_CFG_MAX_NUMBER_UART_PORTS]; ///< SCI UART instances const uint8_t * sntp_server_ip; ///< The SNTP server IP address string const int32_t sntp_utc_offset_in_hours; ///< Timezone offset in secs (-43200 - 43200) void const * p_context; ///< User defined context passed into callback function. void const * p_extend; ///< Pointer to extended configuration by instance of interface. -} wifi_onchip_da16200_cfg_t; +} wifi_onchip_da16xxx_cfg_t; -/** DA16200 Wifi internal socket instance structure */ +/** DA16XXX Wifi internal socket instance structure */ typedef struct { uint8_t remote_ipaddr[4]; ///< Remote IP address @@ -162,17 +160,17 @@ typedef struct uint32_t socket_recv_error_count; ///< Socket receive error count uint32_t socket_create_flag; ///< Flag to determine in socket has been created. uint32_t socket_read_write_flag; ///< flag to determine if read and/or write channels are active. - da16200_recv_state socket_recv_state; ///< Incoming Socket data header information + da16xxx_recv_state socket_recv_state; ///< Incoming Socket data header information StreamBufferHandle_t socket_byteq_hdl; ///< Socket stream buffer handle StaticStreamBuffer_t socket_byteq_struct; ///< Structure to hold stream buffer info - uint8_t socket_recv_buff[WIFI_ONCHIP_DA16200_CFG_MAX_SOCKET_RX_SIZE]; ///< Socket receive buffer used by byte queue -} da16200_socket_t; + uint8_t socket_recv_buff[WIFI_ONCHIP_DA16XXX_CFG_MAX_SOCKET_RX_SIZE]; ///< Socket receive buffer used by byte queue +} da16xxx_socket_t; -/** WIFI_ONCHIP_DA16200 private control block. DO NOT MODIFY. */ -typedef struct st_wifi_onchip_da16200_instance_ctrl +/** WIFI_ONCHIP_DA16XXX private control block. DO NOT MODIFY. */ +typedef struct st_wifi_onchip_da16xxx_instance_ctrl { - wifi_onchip_da16200_cfg_t const * p_wifi_onchip_da16200_cfg; ///< Pointer to initial configurations. + wifi_onchip_da16xxx_cfg_t const * p_wifi_onchip_da16xxx_cfg; ///< Pointer to initial configurations. bsp_io_port_pin_t reset_pin; ///< Wifi module reset pin uint32_t num_uarts; ///< number of UARTS currently used for communication with module uint32_t num_creatable_sockets; ///< Number of simultaneous sockets supported @@ -181,13 +179,15 @@ typedef struct st_wifi_onchip_da16200_instance_ctrl uint32_t open; ///< Flag to indicate if wifi instance has been initialized uint8_t is_sntp_enabled; ///< Flag to indicate Enable/Disable of SNTP Client - uint8_t cmd_rx_queue_buf[WIFI_ONCHIP_DA16200_CFG_CMD_RX_BUF_SIZE]; ///< Command port receive buffer used by byte queue // FreeRTOS + uint8_t cmd_rx_queue_buf[WIFI_ONCHIP_DA16XXX_CFG_CMD_RX_BUF_SIZE]; ///< Command port receive buffer used by byte queue // FreeRTOS StreamBufferHandle_t socket_byteq_hdl; ///< Socket stream buffer handle StaticStreamBuffer_t socket_byteq_struct; ///< Structure to hold stream buffer info volatile uint32_t curr_socket_index; ///< Currently active socket instance - uint8_t cmd_tx_buff[WIFI_ONCHIP_DA16200_CFG_CMD_TX_BUF_SIZE]; ///< Command send buffer - uint8_t cmd_rx_buff[WIFI_ONCHIP_DA16200_CFG_CMD_RX_BUF_SIZE]; ///< Command receive buffer + uint8_t * p_current_cmd_rx_buffer; ///< Pointer to temporary receive buffer for dependent modules + uint32_t current_cmd_rx_buffer_size; ///< Size of the temporary buffer + uint8_t cmd_tx_buff[WIFI_ONCHIP_DA16XXX_CFG_CMD_TX_BUF_SIZE]; ///< Command send buffer + uint8_t cmd_rx_buff[WIFI_ONCHIP_DA16XXX_CFG_CMD_RX_BUF_SIZE]; ///< Command receive buffer uint8_t curr_ipaddr[4]; ///< Current IP address of module uint8_t curr_subnetmask[4]; ///< Current Subnet Mask of module uint8_t curr_gateway[4]; ///< Current GAteway of module @@ -195,52 +195,62 @@ typedef struct st_wifi_onchip_da16200_instance_ctrl SemaphoreHandle_t tx_sem; ///< Transmit binary semaphore handle SemaphoreHandle_t rx_sem; ///< Receive binary semaphore handle - uart_instance_t * uart_instance_objects[WIFI_ONCHIP_DA16200_CFG_MAX_NUMBER_UART_PORTS]; ///< UART instance object - SemaphoreHandle_t uart_tei_sem[WIFI_ONCHIP_DA16200_CFG_MAX_NUMBER_UART_PORTS]; ///< UART transmission end binary semaphore - da16200_socket_t sockets[WIFI_ONCHIP_DA16200_CFG_NUM_CREATEABLE_SOCKETS]; ///< Internal socket instances -} wifi_onchip_da16200_instance_ctrl_t; + uart_instance_t * uart_instance_objects[WIFI_ONCHIP_DA16XXX_CFG_MAX_NUMBER_UART_PORTS]; ///< UART instance object + SemaphoreHandle_t uart_tei_sem[WIFI_ONCHIP_DA16XXX_CFG_MAX_NUMBER_UART_PORTS]; ///< UART transmission end binary semaphore + da16xxx_socket_t sockets[WIFI_ONCHIP_DA16XXX_CFG_NUM_CREATEABLE_SOCKETS]; ///< Internal socket instances +} wifi_onchip_da16xxx_instance_ctrl_t; /*******************************************************************************************************************//** - * @} (end addtogroup WIFI_ONCHIP_DA16200) + * @} (end addtogroup WIFI_ONCHIP_DA16XXX) **********************************************************************************************************************/ -extern const wifi_onchip_da16200_cfg_t g_wifi_onchip_da16200_cfg; -extern const char * g_wifi_onchip_da16200_uart_cmd_baud; +extern const wifi_onchip_da16xxx_cfg_t g_wifi_onchip_da16xxx_cfg; +extern const char * g_wifi_onchip_da16xxx_uart_cmd_baud; /********************************************************************************************************************** * Public Function Prototypes **********************************************************************************************************************/ -fsp_err_t rm_wifi_onchip_da16200_open(wifi_onchip_da16200_cfg_t const * const p_cfg); -fsp_err_t rm_wifi_onchip_da16200_close(void); -fsp_err_t rm_wifi_onchip_da16200_disconnect(void); -fsp_err_t rm_wifi_onchip_da16200_connected(fsp_err_t * p_status); -fsp_err_t rm_wifi_onchip_da16200_network_info_get(uint32_t * p_ip_addr, uint32_t * p_subnet_mask, uint32_t * p_gateway); -fsp_err_t rm_wifi_onchip_da16200_connect(const char * p_ssid, +fsp_err_t rm_wifi_onchip_da16xxx_open(wifi_onchip_da16xxx_cfg_t const * const p_cfg); +fsp_err_t rm_wifi_onchip_da16xxx_close(void); +fsp_err_t rm_wifi_onchip_da16xxx_disconnect(void); +fsp_err_t rm_wifi_onchip_da16xxx_connected(fsp_err_t * p_status); +fsp_err_t rm_wifi_onchip_da16xxx_network_info_get(uint32_t * p_ip_addr, uint32_t * p_subnet_mask, uint32_t * p_gateway); +fsp_err_t rm_wifi_onchip_da16xxx_connect(const char * p_ssid, WIFISecurity_t security, const char * p_passphrase, uint8_t enc_type); -fsp_err_t rm_wifi_onchip_da16200_mac_addr_get(uint8_t * p_macaddr); -fsp_err_t rm_wifi_onchip_da16200_scan(WIFIScanResult_t * p_results, uint32_t maxNetworks); -fsp_err_t rm_wifi_onchip_da16200_ping(uint8_t * p_ip_addr, int count, uint32_t interval_ms); -fsp_err_t rm_wifi_onchip_da16200_ipaddr_get(uint32_t * p_ip_addr); -fsp_err_t rm_wifi_onchip_da16200_dns_query(const char * p_textstring, uint8_t * p_ip_addr); +fsp_err_t rm_wifi_onchip_da16xxx_mac_addr_get(uint8_t * p_macaddr); +fsp_err_t rm_wifi_onchip_da16xxx_scan(WIFIScanResult_t * p_results, uint32_t maxNetworks); +fsp_err_t rm_wifi_onchip_da16xxx_ping(uint8_t * p_ip_addr, int count, uint32_t interval_ms); +fsp_err_t rm_wifi_onchip_da16xxx_ipaddr_get(uint32_t * p_ip_addr); +fsp_err_t rm_wifi_onchip_da16xxx_dns_query(const char * p_textstring, uint8_t * p_ip_addr); +fsp_err_t rm_wifi_onchip_da16xxx_at_command_send(const char * p_textstring, + uint8_t * const p_response_buffer, + uint32_t response_buffer_size, + uint32_t timeout_ms, + uint32_t delay_ms, + char * response); +size_t rm_wifi_onchip_da16xxx_buffer_recv(const char * p_data, + uint32_t length, + uint32_t rx_timeout, + size_t trigger_level); /* TCP Socket public function prototypes */ -fsp_err_t rm_wifi_onchip_da16200_avail_socket_get(uint32_t * p_socket_id); -fsp_err_t rm_wifi_onchip_da16200_socket_status_get(uint32_t socket_no, uint32_t * p_socket_status); -fsp_err_t rm_wifi_onchip_da16200_socket_create(uint32_t socket_no, uint32_t type, uint32_t ipversion); -fsp_err_t rm_wifi_onchip_da16200_tcp_connect(uint32_t socket_no, uint32_t ipaddr, uint32_t port); -int32_t rm_wifi_onchip_da16200_send(uint32_t socket_no, const uint8_t * p_data, uint32_t length, uint32_t timeout_ms); -int32_t rm_wifi_onchip_da16200_recv(uint32_t socket_no, uint8_t * p_data, uint32_t length, uint32_t timeout_ms); -fsp_err_t rm_wifi_onchip_da16200_socket_disconnect(uint32_t socket_no); +fsp_err_t rm_wifi_onchip_da16xxx_avail_socket_get(uint32_t * p_socket_id); +fsp_err_t rm_wifi_onchip_da16xxx_socket_status_get(uint32_t socket_no, uint32_t * p_socket_status); +fsp_err_t rm_wifi_onchip_da16xxx_socket_create(uint32_t socket_no, uint32_t type, uint32_t ipversion); +fsp_err_t rm_wifi_onchip_da16xxx_tcp_connect(uint32_t socket_no, uint32_t ipaddr, uint32_t port); +int32_t rm_wifi_onchip_da16xxx_send(uint32_t socket_no, const uint8_t * p_data, uint32_t length, uint32_t timeout_ms); +int32_t rm_wifi_onchip_da16xxx_recv(uint32_t socket_no, uint8_t * p_data, uint32_t length, uint32_t timeout_ms); +fsp_err_t rm_wifi_onchip_da16xxx_socket_disconnect(uint32_t socket_no); -#ifndef rm_wifi_onchip_da16200_uart_callback -void rm_wifi_onchip_da16200_uart_callback(uart_callback_args_t * p_args); +#ifndef rm_wifi_onchip_da16xxx_uart_callback +void rm_wifi_onchip_da16xxx_uart_callback(uart_callback_args_t * p_args); #endif /**********************************************************************************************************************************//** - * @addtogroup WIFI_ONCHIP_DA16200 WIFI_ONCHIP_DA16200 + * @addtogroup WIFI_ONCHIP_DA16XXX WIFI_ONCHIP_DA16XXX * @{ *************************************************************************************************************************************/ @@ -248,31 +258,33 @@ void rm_wifi_onchip_da16200_uart_callback(uart_callback_args_t * p_args); * Update the SNTP Server IP Address * *************************************************************************************************************************************/ -fsp_err_t RM_WIFI_ONCHIP_DA16200_SntpServerIpAddressSet(uint8_t * p_server_ip_addr); +fsp_err_t RM_WIFI_ONCHIP_DA16XXX_SntpServerIpAddressSet(uint8_t * p_server_ip_addr); /**********************************************************************************************************************************//** * Enable or Disable the SNTP Client Service * *************************************************************************************************************************************/ -fsp_err_t RM_WIFI_ONCHIP_DA16200_SntpEnableSet(wifi_onchip_da16200_sntp_enable_t enable); +fsp_err_t RM_WIFI_ONCHIP_DA16XXX_SntpEnableSet(wifi_onchip_da16xxx_sntp_enable_t enable); /**********************************************************************************************************************************//** * Update the SNTP Timezone * *************************************************************************************************************************************/ -fsp_err_t RM_WIFI_ONCHIP_DA16200_SntpTimeZoneSet(int utc_offset_in_hours, +fsp_err_t RM_WIFI_ONCHIP_DA16XXX_SntpTimeZoneSet(int utc_offset_in_hours, uint32_t minutes, - wifi_onchip_da16200_sntp_daylight_savings_enable_t daylightSavingsEnable); + wifi_onchip_da16xxx_sntp_daylight_savings_enable_t daylightSavingsEnable); /**********************************************************************************************************************************//** * Get the current local time based on current timezone in a string format * *************************************************************************************************************************************/ -fsp_err_t RM_WIFI_ONCHIP_DA16200_LocalTimeGet(uint8_t * p_local_time, uint32_t size_string); +fsp_err_t RM_WIFI_ONCHIP_DA16XXX_LocalTimeGet(uint8_t * p_local_time, uint32_t size_string); /* Common macro for FSP header files. There is also a corresponding FSP_HEADER macro at the top of this file. */ FSP_FOOTER +#endif // RM_WIFI_ONCHIP_DA16XXX_H + /*******************************************************************************************************************//** - * @} (end addtogroup WIFI_ONCHIP_DA16200) + * @} (end addtogroup WIFI_ONCHIP_DA16XXX) **********************************************************************************************************************/ diff --git a/ra/fsp/inc/instances/rm_zmod4xxx.h b/ra/fsp/inc/instances/rm_zmod4xxx.h index 77212eb67..66eb0a0c5 100644 --- a/ra/fsp/inc/instances/rm_zmod4xxx.h +++ b/ra/fsp/inc/instances/rm_zmod4xxx.h @@ -64,6 +64,9 @@ typedef enum e_rm_zmod4xxx_lib_type RM_ZMOD4410_LIB_TYPE_IAQ_2ND_GEN_ULP, RM_ZMOD4410_LIB_TYPE_ODOR, RM_ZMOD4410_LIB_TYPE_SULFUR_ODOR, + RM_ZMOD4410_LIB_TYPE_REL_IAQ, + RM_ZMOD4410_LIB_TYPE_REL_IAQ_ULP, + RM_ZMOD4410_LIB_TYPE_PBAQ, RM_ZMOD4510_LIB_TYPE_OAQ_1ST_GEN, RM_ZMOD4510_LIB_TYPE_OAQ_2ND_GEN, RM_ZMOD4450_LIB_TYPE_RAQ, @@ -163,6 +166,12 @@ fsp_err_t RM_ZMOD4XXX_Oaq2ndGenDataCalculate(rm_zmod4xxx_ctrl_t * const fsp_err_t RM_ZMOD4XXX_RaqDataCalculate(rm_zmod4xxx_ctrl_t * const p_api_ctrl, rm_zmod4xxx_raw_data_t * const p_raw_data, rm_zmod4xxx_raq_data_t * const p_zmod4xxx_data); +fsp_err_t RM_ZMOD4XXX_RelIaqDataCalculate(rm_zmod4xxx_ctrl_t * const p_api_ctrl, + rm_zmod4xxx_raw_data_t * const p_raw_data, + rm_zmod4xxx_rel_iaq_data_t * const p_zmod4xxx_data); +fsp_err_t RM_ZMOD4XXX_PbaqDataCalculate(rm_zmod4xxx_ctrl_t * const p_api_ctrl, + rm_zmod4xxx_raw_data_t * const p_raw_data, + rm_zmod4xxx_pbaq_data_t * const p_zmod4xxx_data); fsp_err_t RM_ZMOD4XXX_Close(rm_zmod4xxx_ctrl_t * const p_api_ctrl); #if defined(__CCRX__) || defined(__ICCRX__) || defined(__RX__) diff --git a/ra/fsp/src/bsp/cmsis/Device/RENESAS/Include/R7FA2A1AB.h b/ra/fsp/src/bsp/cmsis/Device/RENESAS/Include/R7FA2A1AB.h index ddf49afe3..c672b9a74 100644 --- a/ra/fsp/src/bsp/cmsis/Device/RENESAS/Include/R7FA2A1AB.h +++ b/ra/fsp/src/bsp/cmsis/Device/RENESAS/Include/R7FA2A1AB.h @@ -7248,67 +7248,85 @@ typedef struct /*!< (@ 0x40047000) R_MSTP Structure union { - __IOM uint32_t MSTPCRE; /*!< (@ 0x00000010) Module Stop Control Register E */ + union + { + __IOM uint32_t MSTPCRE; /*!< (@ 0x00000010) Module Stop Control Register E */ - struct + struct + { + __IOM uint32_t MSTPE0 : 1; /*!< [0..0] Module stop bit 0. See device hardware manual for usage. */ + __IOM uint32_t MSTPE1 : 1; /*!< [1..1] Module stop bit 1. See device hardware manual for usage. */ + __IOM uint32_t MSTPE2 : 1; /*!< [2..2] Module stop bit 2. See device hardware manual for usage. */ + __IOM uint32_t MSTPE3 : 1; /*!< [3..3] Module stop bit 3. See device hardware manual for usage. */ + __IOM uint32_t MSTPE4 : 1; /*!< [4..4] Module stop bit 4. See device hardware manual for usage. */ + __IOM uint32_t MSTPE5 : 1; /*!< [5..5] Module stop bit 5. See device hardware manual for usage. */ + __IOM uint32_t MSTPE6 : 1; /*!< [6..6] Module stop bit 6. See device hardware manual for usage. */ + __IOM uint32_t MSTPE7 : 1; /*!< [7..7] Module stop bit 7. See device hardware manual for usage. */ + __IOM uint32_t MSTPE8 : 1; /*!< [8..8] Module stop bit 8. See device hardware manual for usage. */ + __IOM uint32_t MSTPE9 : 1; /*!< [9..9] Module stop bit 9. See device hardware manual for usage. */ + __IOM uint32_t MSTPE10 : 1; /*!< [10..10] Module stop bit 10. See device hardware manual for + * usage. */ + __IOM uint32_t MSTPE11 : 1; /*!< [11..11] Module stop bit 11. See device hardware manual for + * usage. */ + __IOM uint32_t MSTPE12 : 1; /*!< [12..12] Module stop bit 12. See device hardware manual for + * usage. */ + __IOM uint32_t MSTPE13 : 1; /*!< [13..13] Module stop bit 13. See device hardware manual for + * usage. */ + __IOM uint32_t MSTPE14 : 1; /*!< [14..14] Module stop bit 14. See device hardware manual for + * usage. */ + __IOM uint32_t MSTPE15 : 1; /*!< [15..15] Module stop bit 15. See device hardware manual for + * usage. */ + __IOM uint32_t MSTPE16 : 1; /*!< [16..16] Module stop bit 16. See device hardware manual for + * usage. */ + __IOM uint32_t MSTPE17 : 1; /*!< [17..17] Module stop bit 17. See device hardware manual for + * usage. */ + __IOM uint32_t MSTPE18 : 1; /*!< [18..18] Module stop bit 18. See device hardware manual for + * usage. */ + __IOM uint32_t MSTPE19 : 1; /*!< [19..19] Module stop bit 19. See device hardware manual for + * usage. */ + __IOM uint32_t MSTPE20 : 1; /*!< [20..20] Module stop bit 20. See device hardware manual for + * usage. */ + __IOM uint32_t MSTPE21 : 1; /*!< [21..21] Module stop bit 21. See device hardware manual for + * usage. */ + __IOM uint32_t MSTPE22 : 1; /*!< [22..22] Module stop bit 22. See device hardware manual for + * usage. */ + __IOM uint32_t MSTPE23 : 1; /*!< [23..23] Module stop bit 23. See device hardware manual for + * usage. */ + __IOM uint32_t MSTPE24 : 1; /*!< [24..24] Module stop bit 24. See device hardware manual for + * usage. */ + __IOM uint32_t MSTPE25 : 1; /*!< [25..25] Module stop bit 25. See device hardware manual for + * usage. */ + __IOM uint32_t MSTPE26 : 1; /*!< [26..26] Module stop bit 26. See device hardware manual for + * usage. */ + __IOM uint32_t MSTPE27 : 1; /*!< [27..27] Module stop bit 27. See device hardware manual for + * usage. */ + __IOM uint32_t MSTPE28 : 1; /*!< [28..28] Module stop bit 28. See device hardware manual for + * usage. */ + __IOM uint32_t MSTPE29 : 1; /*!< [29..29] Module stop bit 29. See device hardware manual for + * usage. */ + __IOM uint32_t MSTPE30 : 1; /*!< [30..30] Module stop bit 30. See device hardware manual for + * usage. */ + __IOM uint32_t MSTPE31 : 1; /*!< [31..31] Module stop bit 31. See device hardware manual for + * usage. */ + } MSTPCRE_b; + }; + + union { - __IOM uint32_t MSTPE0 : 1; /*!< [0..0] Module stop bit 0. See device hardware manual for usage. */ - __IOM uint32_t MSTPE1 : 1; /*!< [1..1] Module stop bit 1. See device hardware manual for usage. */ - __IOM uint32_t MSTPE2 : 1; /*!< [2..2] Module stop bit 2. See device hardware manual for usage. */ - __IOM uint32_t MSTPE3 : 1; /*!< [3..3] Module stop bit 3. See device hardware manual for usage. */ - __IOM uint32_t MSTPE4 : 1; /*!< [4..4] Module stop bit 4. See device hardware manual for usage. */ - __IOM uint32_t MSTPE5 : 1; /*!< [5..5] Module stop bit 5. See device hardware manual for usage. */ - __IOM uint32_t MSTPE6 : 1; /*!< [6..6] Module stop bit 6. See device hardware manual for usage. */ - __IOM uint32_t MSTPE7 : 1; /*!< [7..7] Module stop bit 7. See device hardware manual for usage. */ - __IOM uint32_t MSTPE8 : 1; /*!< [8..8] Module stop bit 8. See device hardware manual for usage. */ - __IOM uint32_t MSTPE9 : 1; /*!< [9..9] Module stop bit 9. See device hardware manual for usage. */ - __IOM uint32_t MSTPE10 : 1; /*!< [10..10] Module stop bit 10. See device hardware manual for - * usage. */ - __IOM uint32_t MSTPE11 : 1; /*!< [11..11] Module stop bit 11. See device hardware manual for - * usage. */ - __IOM uint32_t MSTPE12 : 1; /*!< [12..12] Module stop bit 12. See device hardware manual for - * usage. */ - __IOM uint32_t MSTPE13 : 1; /*!< [13..13] Module stop bit 13. See device hardware manual for - * usage. */ - __IOM uint32_t MSTPE14 : 1; /*!< [14..14] Module stop bit 14. See device hardware manual for - * usage. */ - __IOM uint32_t MSTPE15 : 1; /*!< [15..15] Module stop bit 15. See device hardware manual for - * usage. */ - __IOM uint32_t MSTPE16 : 1; /*!< [16..16] Module stop bit 16. See device hardware manual for - * usage. */ - __IOM uint32_t MSTPE17 : 1; /*!< [17..17] Module stop bit 17. See device hardware manual for - * usage. */ - __IOM uint32_t MSTPE18 : 1; /*!< [18..18] Module stop bit 18. See device hardware manual for - * usage. */ - __IOM uint32_t MSTPE19 : 1; /*!< [19..19] Module stop bit 19. See device hardware manual for - * usage. */ - __IOM uint32_t MSTPE20 : 1; /*!< [20..20] Module stop bit 20. See device hardware manual for - * usage. */ - __IOM uint32_t MSTPE21 : 1; /*!< [21..21] Module stop bit 21. See device hardware manual for - * usage. */ - __IOM uint32_t MSTPE22 : 1; /*!< [22..22] Module stop bit 22. See device hardware manual for - * usage. */ - __IOM uint32_t MSTPE23 : 1; /*!< [23..23] Module stop bit 23. See device hardware manual for - * usage. */ - __IOM uint32_t MSTPE24 : 1; /*!< [24..24] Module stop bit 24. See device hardware manual for - * usage. */ - __IOM uint32_t MSTPE25 : 1; /*!< [25..25] Module stop bit 25. See device hardware manual for - * usage. */ - __IOM uint32_t MSTPE26 : 1; /*!< [26..26] Module stop bit 26. See device hardware manual for - * usage. */ - __IOM uint32_t MSTPE27 : 1; /*!< [27..27] Module stop bit 27. See device hardware manual for - * usage. */ - __IOM uint32_t MSTPE28 : 1; /*!< [28..28] Module stop bit 28. See device hardware manual for - * usage. */ - __IOM uint32_t MSTPE29 : 1; /*!< [29..29] Module stop bit 29. See device hardware manual for - * usage. */ - __IOM uint32_t MSTPE30 : 1; /*!< [30..30] Module stop bit 30. See device hardware manual for - * usage. */ - __IOM uint32_t MSTPE31 : 1; /*!< [31..31] Module stop bit 31. See device hardware manual for - * usage. */ - } MSTPCRE_b; + __IOM uint16_t LSMRWDIS; /*!< (@ 0x00000010) Low Speed Module R/W Disable Control Register */ + + struct + { + __IOM uint16_t RTCRWDIS : 1; /*!< [0..0] RTC Register R/W Enable Control */ + __IOM uint16_t WDTDIS : 1; /*!< [1..1] WDT Operate Clock Control */ + __IOM uint16_t IWDTIDS : 1; /*!< [2..2] IWDT Register Clock Control */ + uint16_t : 4; + __IOM uint16_t WREN : 1; /*!< [7..7] Write Enable for bits [2:0] */ + __OM uint16_t PRKEY : 8; /*!< [15..8] LSMRWDIS Key Code */ + } LSMRWDIS_b; + }; }; -} R_MSTP_Type; /*!< Size = 20 (0x14) */ +} R_MSTP_Type; /*!< Size = 20 (0x14) */ /* =========================================================================================================================== */ /* ================ R_OPAMP ================ */ @@ -7770,11 +7788,23 @@ typedef struct /*!< (@ 0x40040D00) R_PMISC Structure struct { uint8_t : 6; - __IOM uint8_t PFSWE : 1; /*!< [6..6] PmnPFS Register Write */ - __IOM uint8_t B0WI : 1; /*!< [7..7] PFSWE Bit Write Disable */ + __IOM uint8_t PFSWE : 1; /*!< [6..6] PmnPFS Register Write */ + __IOM uint8_t B0WI : 1; /*!< [7..7] PFSWE Bit Write Disable */ } PWPRS_b; }; - __IM uint16_t RESERVED2[5]; + __IM uint16_t RESERVED2[4]; + __IM uint8_t RESERVED3; + + union + { + __IOM uint8_t PRWCNTR; /*!< (@ 0x0000000F) Port Read Wait Control Register */ + + struct + { + __IOM uint8_t WAIT : 2; /*!< [1..0] Wait Cycle Control */ + uint8_t : 6; + } PRWCNTR_b; + }; __IOM R_PMISC_PMSAR_Type PMSAR[12]; /*!< (@ 0x00000010) Port Security Attribution Register */ } R_PMISC_Type; /*!< Size = 40 (0x28) */ @@ -11545,29 +11575,37 @@ typedef struct /*!< (@ 0x400D1000) R_TRNG Structure typedef struct /*!< (@ 0x407EC000) R_TSN Structure */ { - __IM uint8_t RESERVED[552]; + __IM uint16_t RESERVED[276]; union { - __IM uint8_t TSCDRL; /*!< (@ 0x00000228) Temperature Sensor Calibration Data Register - * L */ + __IM uint16_t TSCDR; /*!< (@ 0x00000228) Temperature Sensor Calibration Data Register */ struct { - __IM uint8_t TSCDRL : 8; /*!< [7..0] The calibration data stores the lower 8 bits of the convertedvalue. */ - } TSCDRL_b; - }; + union + { + __IM uint8_t TSCDRL; /*!< (@ 0x00000228) Temperature Sensor Calibration Data Register + * L */ - union - { - __IM uint8_t TSCDRH; /*!< (@ 0x00000229) Temperature Sensor Calibration Data Register - * H */ + struct + { + __IM uint8_t TSCDRL : 8; /*!< [7..0] The calibration data stores the lower 8 bits of the convertedvalue. */ + } TSCDRL_b; + }; - struct - { - __IM uint8_t TSCDRH : 8; /*!< [7..0] The calibration data stores the higher 8 bits of the - * convertedvalue. */ - } TSCDRH_b; + union + { + __IM uint8_t TSCDRH; /*!< (@ 0x00000229) Temperature Sensor Calibration Data Register + * H */ + + struct + { + __IM uint8_t TSCDRH : 8; /*!< [7..0] The calibration data stores the higher 8 bits of the + * convertedvalue. */ + } TSCDRH_b; + }; + }; }; } R_TSN_Type; /*!< Size = 554 (0x22a) */ @@ -13011,16 +13049,16 @@ typedef struct /*!< (@ 0x40084000) R_AGTX0 Structure #define R_USB_FS0 ((R_USB_FS0_Type *) R_USB_FS0_BASE) #define R_WDT ((R_WDT_Type *) R_WDT_BASE) #define R_AES ((R_AES_Type *) R_AES_BASE) - #define R_AGTX0 ((R_AGTX0_Type *) R_AGTX0_BASE) - #define R_AGTX1 ((R_AGTX0_Type *) R_AGTX1_BASE) - #define R_AGTX2 ((R_AGTX0_Type *) R_AGTX2_BASE) - #define R_AGTX3 ((R_AGTX0_Type *) R_AGTX3_BASE) - #define R_AGTX4 ((R_AGTX0_Type *) R_AGTX4_BASE) - #define R_AGTX5 ((R_AGTX0_Type *) R_AGTX5_BASE) - #define R_AGTX6 ((R_AGTX0_Type *) R_AGTX6_BASE) - #define R_AGTX7 ((R_AGTX0_Type *) R_AGTX7_BASE) - #define R_AGTX8 ((R_AGTX0_Type *) R_AGTX8_BASE) - #define R_AGTX9 ((R_AGTX0_Type *) R_AGTX9_BASE) + #define R_AGT0 ((R_AGTX0_Type *) R_AGTX0_BASE) + #define R_AGT1 ((R_AGTX0_Type *) R_AGTX1_BASE) + #define R_AGT2 ((R_AGTX0_Type *) R_AGTX2_BASE) + #define R_AGT3 ((R_AGTX0_Type *) R_AGTX3_BASE) + #define R_AGT4 ((R_AGTX0_Type *) R_AGTX4_BASE) + #define R_AGT5 ((R_AGTX0_Type *) R_AGTX5_BASE) + #define R_AGT6 ((R_AGTX0_Type *) R_AGTX6_BASE) + #define R_AGT7 ((R_AGTX0_Type *) R_AGTX7_BASE) + #define R_AGT8 ((R_AGTX0_Type *) R_AGTX8_BASE) + #define R_AGT9 ((R_AGTX0_Type *) R_AGTX9_BASE) /** @} */ /* End of group Device_Peripheral_declaration */ @@ -16368,20 +16406,31 @@ typedef struct /*!< (@ 0x40084000) R_AGTX0 Structure /* =========================================================================================================================== */ /* ======================================================== MSTPCRA ======================================================== */ - #define R_MSTP_MSTPCRA_MSTPA_Pos (0UL) /*!< MSTPA (Bit 0) */ - #define R_MSTP_MSTPCRA_MSTPA_Msk (0x1UL) /*!< MSTPA (Bitfield-Mask: 0x01) */ + #define R_MSTP_MSTPCRA_MSTPA_Pos (0UL) /*!< MSTPA (Bit 0) */ + #define R_MSTP_MSTPCRA_MSTPA_Msk (0x1UL) /*!< MSTPA (Bitfield-Mask: 0x01) */ /* ======================================================== MSTPCRB ======================================================== */ - #define R_MSTP_MSTPCRB_MSTPB_Pos (0UL) /*!< MSTPB (Bit 0) */ - #define R_MSTP_MSTPCRB_MSTPB_Msk (0x1UL) /*!< MSTPB (Bitfield-Mask: 0x01) */ + #define R_MSTP_MSTPCRB_MSTPB_Pos (0UL) /*!< MSTPB (Bit 0) */ + #define R_MSTP_MSTPCRB_MSTPB_Msk (0x1UL) /*!< MSTPB (Bitfield-Mask: 0x01) */ /* ======================================================== MSTPCRC ======================================================== */ - #define R_MSTP_MSTPCRC_MSTPC_Pos (0UL) /*!< MSTPC (Bit 0) */ - #define R_MSTP_MSTPCRC_MSTPC_Msk (0x1UL) /*!< MSTPC (Bitfield-Mask: 0x01) */ + #define R_MSTP_MSTPCRC_MSTPC_Pos (0UL) /*!< MSTPC (Bit 0) */ + #define R_MSTP_MSTPCRC_MSTPC_Msk (0x1UL) /*!< MSTPC (Bitfield-Mask: 0x01) */ /* ======================================================== MSTPCRD ======================================================== */ - #define R_MSTP_MSTPCRD_MSTPD_Pos (0UL) /*!< MSTPD (Bit 0) */ - #define R_MSTP_MSTPCRD_MSTPD_Msk (0x1UL) /*!< MSTPD (Bitfield-Mask: 0x01) */ + #define R_MSTP_MSTPCRD_MSTPD_Pos (0UL) /*!< MSTPD (Bit 0) */ + #define R_MSTP_MSTPCRD_MSTPD_Msk (0x1UL) /*!< MSTPD (Bitfield-Mask: 0x01) */ /* ======================================================== MSTPCRE ======================================================== */ - #define R_MSTP_MSTPCRE_MSTPE_Pos (0UL) /*!< MSTPE (Bit 0) */ - #define R_MSTP_MSTPCRE_MSTPE_Msk (0x1UL) /*!< MSTPE (Bitfield-Mask: 0x01) */ + #define R_MSTP_MSTPCRE_MSTPE_Pos (0UL) /*!< MSTPE (Bit 0) */ + #define R_MSTP_MSTPCRE_MSTPE_Msk (0x1UL) /*!< MSTPE (Bitfield-Mask: 0x01) */ +/* ======================================================= LSMRWDIS ======================================================== */ + #define R_MSTP_LSMRWDIS_RTCRWDIS_Pos (0UL) /*!< RTCRWDIS (Bit 0) */ + #define R_MSTP_LSMRWDIS_RTCRWDIS_Msk (0x1UL) /*!< RTCRWDIS (Bitfield-Mask: 0x01) */ + #define R_MSTP_LSMRWDIS_WDTDIS_Pos (1UL) /*!< WDTDIS (Bit 1) */ + #define R_MSTP_LSMRWDIS_WDTDIS_Msk (0x2UL) /*!< WDTDIS (Bitfield-Mask: 0x01) */ + #define R_MSTP_LSMRWDIS_IWDTIDS_Pos (2UL) /*!< IWDTIDS (Bit 2) */ + #define R_MSTP_LSMRWDIS_IWDTIDS_Msk (0x4UL) /*!< IWDTIDS (Bitfield-Mask: 0x01) */ + #define R_MSTP_LSMRWDIS_WREN_Pos (7UL) /*!< WREN (Bit 7) */ + #define R_MSTP_LSMRWDIS_WREN_Msk (0x80UL) /*!< WREN (Bitfield-Mask: 0x01) */ + #define R_MSTP_LSMRWDIS_PRKEY_Pos (8UL) /*!< PRKEY (Bit 8) */ + #define R_MSTP_LSMRWDIS_PRKEY_Msk (0xff00UL) /*!< PRKEY (Bitfield-Mask: 0xff) */ /* =========================================================================================================================== */ /* ================ R_OPAMP ================ */ @@ -16485,6 +16534,9 @@ typedef struct /*!< (@ 0x40084000) R_AGTX0 Structure #define R_PMISC_PWPRS_PFSWE_Msk (0x40UL) /*!< PFSWE (Bitfield-Mask: 0x01) */ #define R_PMISC_PWPRS_B0WI_Pos (7UL) /*!< B0WI (Bit 7) */ #define R_PMISC_PWPRS_B0WI_Msk (0x80UL) /*!< B0WI (Bitfield-Mask: 0x01) */ +/* ======================================================== PRWCNTR ======================================================== */ + #define R_PMISC_PRWCNTR_WAIT_Pos (0UL) /*!< WAIT (Bit 0) */ + #define R_PMISC_PRWCNTR_WAIT_Msk (0x3UL) /*!< WAIT (Bitfield-Mask: 0x03) */ /* =========================================================================================================================== */ /* ================ R_RTC ================ */ @@ -18219,6 +18271,7 @@ typedef struct /*!< (@ 0x40084000) R_AGTX0 Structure /* ================ R_TSN ================ */ /* =========================================================================================================================== */ +/* ========================================================= TSCDR ========================================================= */ /* ======================================================== TSCDRH ========================================================= */ #define R_TSN_TSCDRH_TSCDRH_Pos (0UL) /*!< TSCDRH (Bit 0) */ #define R_TSN_TSCDRH_TSCDRH_Msk (0xffUL) /*!< TSCDRH (Bitfield-Mask: 0xff) */ diff --git a/ra/fsp/src/bsp/cmsis/Device/RENESAS/Include/R7FA2E1A9.h b/ra/fsp/src/bsp/cmsis/Device/RENESAS/Include/R7FA2E1A9.h index fe8f7277e..1db0a7709 100644 --- a/ra/fsp/src/bsp/cmsis/Device/RENESAS/Include/R7FA2E1A9.h +++ b/ra/fsp/src/bsp/cmsis/Device/RENESAS/Include/R7FA2E1A9.h @@ -6605,67 +6605,85 @@ typedef struct /*!< (@ 0x40047000) R_MSTP Structure union { - __IOM uint32_t MSTPCRE; /*!< (@ 0x00000010) Module Stop Control Register E */ + union + { + __IOM uint32_t MSTPCRE; /*!< (@ 0x00000010) Module Stop Control Register E */ - struct + struct + { + __IOM uint32_t MSTPE0 : 1; /*!< [0..0] Module stop bit 0. See device hardware manual for usage. */ + __IOM uint32_t MSTPE1 : 1; /*!< [1..1] Module stop bit 1. See device hardware manual for usage. */ + __IOM uint32_t MSTPE2 : 1; /*!< [2..2] Module stop bit 2. See device hardware manual for usage. */ + __IOM uint32_t MSTPE3 : 1; /*!< [3..3] Module stop bit 3. See device hardware manual for usage. */ + __IOM uint32_t MSTPE4 : 1; /*!< [4..4] Module stop bit 4. See device hardware manual for usage. */ + __IOM uint32_t MSTPE5 : 1; /*!< [5..5] Module stop bit 5. See device hardware manual for usage. */ + __IOM uint32_t MSTPE6 : 1; /*!< [6..6] Module stop bit 6. See device hardware manual for usage. */ + __IOM uint32_t MSTPE7 : 1; /*!< [7..7] Module stop bit 7. See device hardware manual for usage. */ + __IOM uint32_t MSTPE8 : 1; /*!< [8..8] Module stop bit 8. See device hardware manual for usage. */ + __IOM uint32_t MSTPE9 : 1; /*!< [9..9] Module stop bit 9. See device hardware manual for usage. */ + __IOM uint32_t MSTPE10 : 1; /*!< [10..10] Module stop bit 10. See device hardware manual for + * usage. */ + __IOM uint32_t MSTPE11 : 1; /*!< [11..11] Module stop bit 11. See device hardware manual for + * usage. */ + __IOM uint32_t MSTPE12 : 1; /*!< [12..12] Module stop bit 12. See device hardware manual for + * usage. */ + __IOM uint32_t MSTPE13 : 1; /*!< [13..13] Module stop bit 13. See device hardware manual for + * usage. */ + __IOM uint32_t MSTPE14 : 1; /*!< [14..14] Module stop bit 14. See device hardware manual for + * usage. */ + __IOM uint32_t MSTPE15 : 1; /*!< [15..15] Module stop bit 15. See device hardware manual for + * usage. */ + __IOM uint32_t MSTPE16 : 1; /*!< [16..16] Module stop bit 16. See device hardware manual for + * usage. */ + __IOM uint32_t MSTPE17 : 1; /*!< [17..17] Module stop bit 17. See device hardware manual for + * usage. */ + __IOM uint32_t MSTPE18 : 1; /*!< [18..18] Module stop bit 18. See device hardware manual for + * usage. */ + __IOM uint32_t MSTPE19 : 1; /*!< [19..19] Module stop bit 19. See device hardware manual for + * usage. */ + __IOM uint32_t MSTPE20 : 1; /*!< [20..20] Module stop bit 20. See device hardware manual for + * usage. */ + __IOM uint32_t MSTPE21 : 1; /*!< [21..21] Module stop bit 21. See device hardware manual for + * usage. */ + __IOM uint32_t MSTPE22 : 1; /*!< [22..22] Module stop bit 22. See device hardware manual for + * usage. */ + __IOM uint32_t MSTPE23 : 1; /*!< [23..23] Module stop bit 23. See device hardware manual for + * usage. */ + __IOM uint32_t MSTPE24 : 1; /*!< [24..24] Module stop bit 24. See device hardware manual for + * usage. */ + __IOM uint32_t MSTPE25 : 1; /*!< [25..25] Module stop bit 25. See device hardware manual for + * usage. */ + __IOM uint32_t MSTPE26 : 1; /*!< [26..26] Module stop bit 26. See device hardware manual for + * usage. */ + __IOM uint32_t MSTPE27 : 1; /*!< [27..27] Module stop bit 27. See device hardware manual for + * usage. */ + __IOM uint32_t MSTPE28 : 1; /*!< [28..28] Module stop bit 28. See device hardware manual for + * usage. */ + __IOM uint32_t MSTPE29 : 1; /*!< [29..29] Module stop bit 29. See device hardware manual for + * usage. */ + __IOM uint32_t MSTPE30 : 1; /*!< [30..30] Module stop bit 30. See device hardware manual for + * usage. */ + __IOM uint32_t MSTPE31 : 1; /*!< [31..31] Module stop bit 31. See device hardware manual for + * usage. */ + } MSTPCRE_b; + }; + + union { - __IOM uint32_t MSTPE0 : 1; /*!< [0..0] Module stop bit 0. See device hardware manual for usage. */ - __IOM uint32_t MSTPE1 : 1; /*!< [1..1] Module stop bit 1. See device hardware manual for usage. */ - __IOM uint32_t MSTPE2 : 1; /*!< [2..2] Module stop bit 2. See device hardware manual for usage. */ - __IOM uint32_t MSTPE3 : 1; /*!< [3..3] Module stop bit 3. See device hardware manual for usage. */ - __IOM uint32_t MSTPE4 : 1; /*!< [4..4] Module stop bit 4. See device hardware manual for usage. */ - __IOM uint32_t MSTPE5 : 1; /*!< [5..5] Module stop bit 5. See device hardware manual for usage. */ - __IOM uint32_t MSTPE6 : 1; /*!< [6..6] Module stop bit 6. See device hardware manual for usage. */ - __IOM uint32_t MSTPE7 : 1; /*!< [7..7] Module stop bit 7. See device hardware manual for usage. */ - __IOM uint32_t MSTPE8 : 1; /*!< [8..8] Module stop bit 8. See device hardware manual for usage. */ - __IOM uint32_t MSTPE9 : 1; /*!< [9..9] Module stop bit 9. See device hardware manual for usage. */ - __IOM uint32_t MSTPE10 : 1; /*!< [10..10] Module stop bit 10. See device hardware manual for - * usage. */ - __IOM uint32_t MSTPE11 : 1; /*!< [11..11] Module stop bit 11. See device hardware manual for - * usage. */ - __IOM uint32_t MSTPE12 : 1; /*!< [12..12] Module stop bit 12. See device hardware manual for - * usage. */ - __IOM uint32_t MSTPE13 : 1; /*!< [13..13] Module stop bit 13. See device hardware manual for - * usage. */ - __IOM uint32_t MSTPE14 : 1; /*!< [14..14] Module stop bit 14. See device hardware manual for - * usage. */ - __IOM uint32_t MSTPE15 : 1; /*!< [15..15] Module stop bit 15. See device hardware manual for - * usage. */ - __IOM uint32_t MSTPE16 : 1; /*!< [16..16] Module stop bit 16. See device hardware manual for - * usage. */ - __IOM uint32_t MSTPE17 : 1; /*!< [17..17] Module stop bit 17. See device hardware manual for - * usage. */ - __IOM uint32_t MSTPE18 : 1; /*!< [18..18] Module stop bit 18. See device hardware manual for - * usage. */ - __IOM uint32_t MSTPE19 : 1; /*!< [19..19] Module stop bit 19. See device hardware manual for - * usage. */ - __IOM uint32_t MSTPE20 : 1; /*!< [20..20] Module stop bit 20. See device hardware manual for - * usage. */ - __IOM uint32_t MSTPE21 : 1; /*!< [21..21] Module stop bit 21. See device hardware manual for - * usage. */ - __IOM uint32_t MSTPE22 : 1; /*!< [22..22] Module stop bit 22. See device hardware manual for - * usage. */ - __IOM uint32_t MSTPE23 : 1; /*!< [23..23] Module stop bit 23. See device hardware manual for - * usage. */ - __IOM uint32_t MSTPE24 : 1; /*!< [24..24] Module stop bit 24. See device hardware manual for - * usage. */ - __IOM uint32_t MSTPE25 : 1; /*!< [25..25] Module stop bit 25. See device hardware manual for - * usage. */ - __IOM uint32_t MSTPE26 : 1; /*!< [26..26] Module stop bit 26. See device hardware manual for - * usage. */ - __IOM uint32_t MSTPE27 : 1; /*!< [27..27] Module stop bit 27. See device hardware manual for - * usage. */ - __IOM uint32_t MSTPE28 : 1; /*!< [28..28] Module stop bit 28. See device hardware manual for - * usage. */ - __IOM uint32_t MSTPE29 : 1; /*!< [29..29] Module stop bit 29. See device hardware manual for - * usage. */ - __IOM uint32_t MSTPE30 : 1; /*!< [30..30] Module stop bit 30. See device hardware manual for - * usage. */ - __IOM uint32_t MSTPE31 : 1; /*!< [31..31] Module stop bit 31. See device hardware manual for - * usage. */ - } MSTPCRE_b; + __IOM uint16_t LSMRWDIS; /*!< (@ 0x00000010) Low Speed Module R/W Disable Control Register */ + + struct + { + __IOM uint16_t RTCRWDIS : 1; /*!< [0..0] RTC Register R/W Enable Control */ + __IOM uint16_t WDTDIS : 1; /*!< [1..1] WDT Operate Clock Control */ + __IOM uint16_t IWDTIDS : 1; /*!< [2..2] IWDT Register Clock Control */ + uint16_t : 4; + __IOM uint16_t WREN : 1; /*!< [7..7] Write Enable for bits [2:0] */ + __OM uint16_t PRKEY : 8; /*!< [15..8] LSMRWDIS Key Code */ + } LSMRWDIS_b; + }; }; -} R_MSTP_Type; /*!< Size = 20 (0x14) */ +} R_MSTP_Type; /*!< Size = 20 (0x14) */ /* =========================================================================================================================== */ /* ================ R_PORT0 ================ */ @@ -7007,11 +7025,23 @@ typedef struct /*!< (@ 0x40040D00) R_PMISC Structure struct { uint8_t : 6; - __IOM uint8_t PFSWE : 1; /*!< [6..6] PmnPFS Register Write */ - __IOM uint8_t B0WI : 1; /*!< [7..7] PFSWE Bit Write Disable */ + __IOM uint8_t PFSWE : 1; /*!< [6..6] PmnPFS Register Write */ + __IOM uint8_t B0WI : 1; /*!< [7..7] PFSWE Bit Write Disable */ } PWPRS_b; }; - __IM uint16_t RESERVED2[5]; + __IM uint16_t RESERVED2[4]; + __IM uint8_t RESERVED3; + + union + { + __IOM uint8_t PRWCNTR; /*!< (@ 0x0000000F) Port Read Wait Control Register */ + + struct + { + __IOM uint8_t WAIT : 2; /*!< [1..0] Wait Cycle Control */ + uint8_t : 6; + } PRWCNTR_b; + }; __IOM R_PMISC_PMSAR_Type PMSAR[12]; /*!< (@ 0x00000010) Port Security Attribution Register */ } R_PMISC_Type; /*!< Size = 40 (0x28) */ @@ -10613,29 +10643,37 @@ typedef struct /*!< (@ 0x400D1000) R_TRNG Structure typedef struct /*!< (@ 0x407EC000) R_TSN Structure */ { - __IM uint8_t RESERVED[552]; + __IM uint16_t RESERVED[276]; union { - __IM uint8_t TSCDRL; /*!< (@ 0x00000228) Temperature Sensor Calibration Data Register - * L */ + __IM uint16_t TSCDR; /*!< (@ 0x00000228) Temperature Sensor Calibration Data Register */ struct { - __IM uint8_t TSCDRL : 8; /*!< [7..0] The calibration data stores the lower 8 bits of the convertedvalue. */ - } TSCDRL_b; - }; + union + { + __IM uint8_t TSCDRL; /*!< (@ 0x00000228) Temperature Sensor Calibration Data Register + * L */ - union - { - __IM uint8_t TSCDRH; /*!< (@ 0x00000229) Temperature Sensor Calibration Data Register - * H */ + struct + { + __IM uint8_t TSCDRL : 8; /*!< [7..0] The calibration data stores the lower 8 bits of the convertedvalue. */ + } TSCDRL_b; + }; - struct - { - __IM uint8_t TSCDRH : 8; /*!< [7..0] The calibration data stores the higher 8 bits of the - * convertedvalue. */ - } TSCDRH_b; + union + { + __IM uint8_t TSCDRH; /*!< (@ 0x00000229) Temperature Sensor Calibration Data Register + * H */ + + struct + { + __IM uint8_t TSCDRH : 8; /*!< [7..0] The calibration data stores the higher 8 bits of the + * convertedvalue. */ + } TSCDRH_b; + }; + }; }; } R_TSN_Type; /*!< Size = 554 (0x22a) */ @@ -10982,16 +11020,16 @@ typedef struct /*!< (@ 0x40084000) R_AGTX0 Structure #define R_TSN ((R_TSN_Type *) R_TSN_BASE) #define R_WDT ((R_WDT_Type *) R_WDT_BASE) #define R_AES ((R_AES_Type *) R_AES_BASE) - #define R_AGTX0 ((R_AGTX0_Type *) R_AGTX0_BASE) - #define R_AGTX1 ((R_AGTX0_Type *) R_AGTX1_BASE) - #define R_AGTX2 ((R_AGTX0_Type *) R_AGTX2_BASE) - #define R_AGTX3 ((R_AGTX0_Type *) R_AGTX3_BASE) - #define R_AGTX4 ((R_AGTX0_Type *) R_AGTX4_BASE) - #define R_AGTX5 ((R_AGTX0_Type *) R_AGTX5_BASE) - #define R_AGTX6 ((R_AGTX0_Type *) R_AGTX6_BASE) - #define R_AGTX7 ((R_AGTX0_Type *) R_AGTX7_BASE) - #define R_AGTX8 ((R_AGTX0_Type *) R_AGTX8_BASE) - #define R_AGTX9 ((R_AGTX0_Type *) R_AGTX9_BASE) + #define R_AGT0 ((R_AGTX0_Type *) R_AGTX0_BASE) + #define R_AGT1 ((R_AGTX0_Type *) R_AGTX1_BASE) + #define R_AGT2 ((R_AGTX0_Type *) R_AGTX2_BASE) + #define R_AGT3 ((R_AGTX0_Type *) R_AGTX3_BASE) + #define R_AGT4 ((R_AGTX0_Type *) R_AGTX4_BASE) + #define R_AGT5 ((R_AGTX0_Type *) R_AGTX5_BASE) + #define R_AGT6 ((R_AGTX0_Type *) R_AGTX6_BASE) + #define R_AGT7 ((R_AGTX0_Type *) R_AGTX7_BASE) + #define R_AGT8 ((R_AGTX0_Type *) R_AGTX8_BASE) + #define R_AGT9 ((R_AGTX0_Type *) R_AGTX9_BASE) /** @} */ /* End of group Device_Peripheral_declaration */ @@ -14026,20 +14064,31 @@ typedef struct /*!< (@ 0x40084000) R_AGTX0 Structure /* =========================================================================================================================== */ /* ======================================================== MSTPCRA ======================================================== */ - #define R_MSTP_MSTPCRA_MSTPA_Pos (0UL) /*!< MSTPA (Bit 0) */ - #define R_MSTP_MSTPCRA_MSTPA_Msk (0x1UL) /*!< MSTPA (Bitfield-Mask: 0x01) */ + #define R_MSTP_MSTPCRA_MSTPA_Pos (0UL) /*!< MSTPA (Bit 0) */ + #define R_MSTP_MSTPCRA_MSTPA_Msk (0x1UL) /*!< MSTPA (Bitfield-Mask: 0x01) */ /* ======================================================== MSTPCRB ======================================================== */ - #define R_MSTP_MSTPCRB_MSTPB_Pos (0UL) /*!< MSTPB (Bit 0) */ - #define R_MSTP_MSTPCRB_MSTPB_Msk (0x1UL) /*!< MSTPB (Bitfield-Mask: 0x01) */ + #define R_MSTP_MSTPCRB_MSTPB_Pos (0UL) /*!< MSTPB (Bit 0) */ + #define R_MSTP_MSTPCRB_MSTPB_Msk (0x1UL) /*!< MSTPB (Bitfield-Mask: 0x01) */ /* ======================================================== MSTPCRC ======================================================== */ - #define R_MSTP_MSTPCRC_MSTPC_Pos (0UL) /*!< MSTPC (Bit 0) */ - #define R_MSTP_MSTPCRC_MSTPC_Msk (0x1UL) /*!< MSTPC (Bitfield-Mask: 0x01) */ + #define R_MSTP_MSTPCRC_MSTPC_Pos (0UL) /*!< MSTPC (Bit 0) */ + #define R_MSTP_MSTPCRC_MSTPC_Msk (0x1UL) /*!< MSTPC (Bitfield-Mask: 0x01) */ /* ======================================================== MSTPCRD ======================================================== */ - #define R_MSTP_MSTPCRD_MSTPD_Pos (0UL) /*!< MSTPD (Bit 0) */ - #define R_MSTP_MSTPCRD_MSTPD_Msk (0x1UL) /*!< MSTPD (Bitfield-Mask: 0x01) */ + #define R_MSTP_MSTPCRD_MSTPD_Pos (0UL) /*!< MSTPD (Bit 0) */ + #define R_MSTP_MSTPCRD_MSTPD_Msk (0x1UL) /*!< MSTPD (Bitfield-Mask: 0x01) */ /* ======================================================== MSTPCRE ======================================================== */ - #define R_MSTP_MSTPCRE_MSTPE_Pos (0UL) /*!< MSTPE (Bit 0) */ - #define R_MSTP_MSTPCRE_MSTPE_Msk (0x1UL) /*!< MSTPE (Bitfield-Mask: 0x01) */ + #define R_MSTP_MSTPCRE_MSTPE_Pos (0UL) /*!< MSTPE (Bit 0) */ + #define R_MSTP_MSTPCRE_MSTPE_Msk (0x1UL) /*!< MSTPE (Bitfield-Mask: 0x01) */ +/* ======================================================= LSMRWDIS ======================================================== */ + #define R_MSTP_LSMRWDIS_RTCRWDIS_Pos (0UL) /*!< RTCRWDIS (Bit 0) */ + #define R_MSTP_LSMRWDIS_RTCRWDIS_Msk (0x1UL) /*!< RTCRWDIS (Bitfield-Mask: 0x01) */ + #define R_MSTP_LSMRWDIS_WDTDIS_Pos (1UL) /*!< WDTDIS (Bit 1) */ + #define R_MSTP_LSMRWDIS_WDTDIS_Msk (0x2UL) /*!< WDTDIS (Bitfield-Mask: 0x01) */ + #define R_MSTP_LSMRWDIS_IWDTIDS_Pos (2UL) /*!< IWDTIDS (Bit 2) */ + #define R_MSTP_LSMRWDIS_IWDTIDS_Msk (0x4UL) /*!< IWDTIDS (Bitfield-Mask: 0x01) */ + #define R_MSTP_LSMRWDIS_WREN_Pos (7UL) /*!< WREN (Bit 7) */ + #define R_MSTP_LSMRWDIS_WREN_Msk (0x80UL) /*!< WREN (Bitfield-Mask: 0x01) */ + #define R_MSTP_LSMRWDIS_PRKEY_Pos (8UL) /*!< PRKEY (Bit 8) */ + #define R_MSTP_LSMRWDIS_PRKEY_Msk (0xff00UL) /*!< PRKEY (Bitfield-Mask: 0xff) */ /* =========================================================================================================================== */ /* ================ R_PORT0 ================ */ @@ -14113,6 +14162,9 @@ typedef struct /*!< (@ 0x40084000) R_AGTX0 Structure #define R_PMISC_PWPRS_PFSWE_Msk (0x40UL) /*!< PFSWE (Bitfield-Mask: 0x01) */ #define R_PMISC_PWPRS_B0WI_Pos (7UL) /*!< B0WI (Bit 7) */ #define R_PMISC_PWPRS_B0WI_Msk (0x80UL) /*!< B0WI (Bitfield-Mask: 0x01) */ +/* ======================================================== PRWCNTR ======================================================== */ + #define R_PMISC_PRWCNTR_WAIT_Pos (0UL) /*!< WAIT (Bit 0) */ + #define R_PMISC_PRWCNTR_WAIT_Msk (0x3UL) /*!< WAIT (Bitfield-Mask: 0x03) */ /* =========================================================================================================================== */ /* ================ R_RTC ================ */ @@ -15762,6 +15814,7 @@ typedef struct /*!< (@ 0x40084000) R_AGTX0 Structure /* ================ R_TSN ================ */ /* =========================================================================================================================== */ +/* ========================================================= TSCDR ========================================================= */ /* ======================================================== TSCDRH ========================================================= */ #define R_TSN_TSCDRH_TSCDRH_Pos (0UL) /*!< TSCDRH (Bit 0) */ #define R_TSN_TSCDRH_TSCDRH_Msk (0xffUL) /*!< TSCDRH (Bitfield-Mask: 0xff) */ diff --git a/ra/fsp/src/bsp/cmsis/Device/RENESAS/Include/R7FA2E2A7.h b/ra/fsp/src/bsp/cmsis/Device/RENESAS/Include/R7FA2E2A7.h index 73dc02684..89fb4018a 100644 --- a/ra/fsp/src/bsp/cmsis/Device/RENESAS/Include/R7FA2E2A7.h +++ b/ra/fsp/src/bsp/cmsis/Device/RENESAS/Include/R7FA2E2A7.h @@ -6924,67 +6924,85 @@ typedef struct /*!< (@ 0x40047000) R_MSTP Structure union { - __IOM uint32_t MSTPCRE; /*!< (@ 0x00000010) Module Stop Control Register E */ + union + { + __IOM uint32_t MSTPCRE; /*!< (@ 0x00000010) Module Stop Control Register E */ - struct + struct + { + __IOM uint32_t MSTPE0 : 1; /*!< [0..0] Module stop bit 0. See device hardware manual for usage. */ + __IOM uint32_t MSTPE1 : 1; /*!< [1..1] Module stop bit 1. See device hardware manual for usage. */ + __IOM uint32_t MSTPE2 : 1; /*!< [2..2] Module stop bit 2. See device hardware manual for usage. */ + __IOM uint32_t MSTPE3 : 1; /*!< [3..3] Module stop bit 3. See device hardware manual for usage. */ + __IOM uint32_t MSTPE4 : 1; /*!< [4..4] Module stop bit 4. See device hardware manual for usage. */ + __IOM uint32_t MSTPE5 : 1; /*!< [5..5] Module stop bit 5. See device hardware manual for usage. */ + __IOM uint32_t MSTPE6 : 1; /*!< [6..6] Module stop bit 6. See device hardware manual for usage. */ + __IOM uint32_t MSTPE7 : 1; /*!< [7..7] Module stop bit 7. See device hardware manual for usage. */ + __IOM uint32_t MSTPE8 : 1; /*!< [8..8] Module stop bit 8. See device hardware manual for usage. */ + __IOM uint32_t MSTPE9 : 1; /*!< [9..9] Module stop bit 9. See device hardware manual for usage. */ + __IOM uint32_t MSTPE10 : 1; /*!< [10..10] Module stop bit 10. See device hardware manual for + * usage. */ + __IOM uint32_t MSTPE11 : 1; /*!< [11..11] Module stop bit 11. See device hardware manual for + * usage. */ + __IOM uint32_t MSTPE12 : 1; /*!< [12..12] Module stop bit 12. See device hardware manual for + * usage. */ + __IOM uint32_t MSTPE13 : 1; /*!< [13..13] Module stop bit 13. See device hardware manual for + * usage. */ + __IOM uint32_t MSTPE14 : 1; /*!< [14..14] Module stop bit 14. See device hardware manual for + * usage. */ + __IOM uint32_t MSTPE15 : 1; /*!< [15..15] Module stop bit 15. See device hardware manual for + * usage. */ + __IOM uint32_t MSTPE16 : 1; /*!< [16..16] Module stop bit 16. See device hardware manual for + * usage. */ + __IOM uint32_t MSTPE17 : 1; /*!< [17..17] Module stop bit 17. See device hardware manual for + * usage. */ + __IOM uint32_t MSTPE18 : 1; /*!< [18..18] Module stop bit 18. See device hardware manual for + * usage. */ + __IOM uint32_t MSTPE19 : 1; /*!< [19..19] Module stop bit 19. See device hardware manual for + * usage. */ + __IOM uint32_t MSTPE20 : 1; /*!< [20..20] Module stop bit 20. See device hardware manual for + * usage. */ + __IOM uint32_t MSTPE21 : 1; /*!< [21..21] Module stop bit 21. See device hardware manual for + * usage. */ + __IOM uint32_t MSTPE22 : 1; /*!< [22..22] Module stop bit 22. See device hardware manual for + * usage. */ + __IOM uint32_t MSTPE23 : 1; /*!< [23..23] Module stop bit 23. See device hardware manual for + * usage. */ + __IOM uint32_t MSTPE24 : 1; /*!< [24..24] Module stop bit 24. See device hardware manual for + * usage. */ + __IOM uint32_t MSTPE25 : 1; /*!< [25..25] Module stop bit 25. See device hardware manual for + * usage. */ + __IOM uint32_t MSTPE26 : 1; /*!< [26..26] Module stop bit 26. See device hardware manual for + * usage. */ + __IOM uint32_t MSTPE27 : 1; /*!< [27..27] Module stop bit 27. See device hardware manual for + * usage. */ + __IOM uint32_t MSTPE28 : 1; /*!< [28..28] Module stop bit 28. See device hardware manual for + * usage. */ + __IOM uint32_t MSTPE29 : 1; /*!< [29..29] Module stop bit 29. See device hardware manual for + * usage. */ + __IOM uint32_t MSTPE30 : 1; /*!< [30..30] Module stop bit 30. See device hardware manual for + * usage. */ + __IOM uint32_t MSTPE31 : 1; /*!< [31..31] Module stop bit 31. See device hardware manual for + * usage. */ + } MSTPCRE_b; + }; + + union { - __IOM uint32_t MSTPE0 : 1; /*!< [0..0] Module stop bit 0. See device hardware manual for usage. */ - __IOM uint32_t MSTPE1 : 1; /*!< [1..1] Module stop bit 1. See device hardware manual for usage. */ - __IOM uint32_t MSTPE2 : 1; /*!< [2..2] Module stop bit 2. See device hardware manual for usage. */ - __IOM uint32_t MSTPE3 : 1; /*!< [3..3] Module stop bit 3. See device hardware manual for usage. */ - __IOM uint32_t MSTPE4 : 1; /*!< [4..4] Module stop bit 4. See device hardware manual for usage. */ - __IOM uint32_t MSTPE5 : 1; /*!< [5..5] Module stop bit 5. See device hardware manual for usage. */ - __IOM uint32_t MSTPE6 : 1; /*!< [6..6] Module stop bit 6. See device hardware manual for usage. */ - __IOM uint32_t MSTPE7 : 1; /*!< [7..7] Module stop bit 7. See device hardware manual for usage. */ - __IOM uint32_t MSTPE8 : 1; /*!< [8..8] Module stop bit 8. See device hardware manual for usage. */ - __IOM uint32_t MSTPE9 : 1; /*!< [9..9] Module stop bit 9. See device hardware manual for usage. */ - __IOM uint32_t MSTPE10 : 1; /*!< [10..10] Module stop bit 10. See device hardware manual for - * usage. */ - __IOM uint32_t MSTPE11 : 1; /*!< [11..11] Module stop bit 11. See device hardware manual for - * usage. */ - __IOM uint32_t MSTPE12 : 1; /*!< [12..12] Module stop bit 12. See device hardware manual for - * usage. */ - __IOM uint32_t MSTPE13 : 1; /*!< [13..13] Module stop bit 13. See device hardware manual for - * usage. */ - __IOM uint32_t MSTPE14 : 1; /*!< [14..14] Module stop bit 14. See device hardware manual for - * usage. */ - __IOM uint32_t MSTPE15 : 1; /*!< [15..15] Module stop bit 15. See device hardware manual for - * usage. */ - __IOM uint32_t MSTPE16 : 1; /*!< [16..16] Module stop bit 16. See device hardware manual for - * usage. */ - __IOM uint32_t MSTPE17 : 1; /*!< [17..17] Module stop bit 17. See device hardware manual for - * usage. */ - __IOM uint32_t MSTPE18 : 1; /*!< [18..18] Module stop bit 18. See device hardware manual for - * usage. */ - __IOM uint32_t MSTPE19 : 1; /*!< [19..19] Module stop bit 19. See device hardware manual for - * usage. */ - __IOM uint32_t MSTPE20 : 1; /*!< [20..20] Module stop bit 20. See device hardware manual for - * usage. */ - __IOM uint32_t MSTPE21 : 1; /*!< [21..21] Module stop bit 21. See device hardware manual for - * usage. */ - __IOM uint32_t MSTPE22 : 1; /*!< [22..22] Module stop bit 22. See device hardware manual for - * usage. */ - __IOM uint32_t MSTPE23 : 1; /*!< [23..23] Module stop bit 23. See device hardware manual for - * usage. */ - __IOM uint32_t MSTPE24 : 1; /*!< [24..24] Module stop bit 24. See device hardware manual for - * usage. */ - __IOM uint32_t MSTPE25 : 1; /*!< [25..25] Module stop bit 25. See device hardware manual for - * usage. */ - __IOM uint32_t MSTPE26 : 1; /*!< [26..26] Module stop bit 26. See device hardware manual for - * usage. */ - __IOM uint32_t MSTPE27 : 1; /*!< [27..27] Module stop bit 27. See device hardware manual for - * usage. */ - __IOM uint32_t MSTPE28 : 1; /*!< [28..28] Module stop bit 28. See device hardware manual for - * usage. */ - __IOM uint32_t MSTPE29 : 1; /*!< [29..29] Module stop bit 29. See device hardware manual for - * usage. */ - __IOM uint32_t MSTPE30 : 1; /*!< [30..30] Module stop bit 30. See device hardware manual for - * usage. */ - __IOM uint32_t MSTPE31 : 1; /*!< [31..31] Module stop bit 31. See device hardware manual for - * usage. */ - } MSTPCRE_b; + __IOM uint16_t LSMRWDIS; /*!< (@ 0x00000010) Low Speed Module R/W Disable Control Register */ + + struct + { + __IOM uint16_t RTCRWDIS : 1; /*!< [0..0] RTC Register R/W Enable Control */ + __IOM uint16_t WDTDIS : 1; /*!< [1..1] WDT Operate Clock Control */ + __IOM uint16_t IWDTIDS : 1; /*!< [2..2] IWDT Register Clock Control */ + uint16_t : 4; + __IOM uint16_t WREN : 1; /*!< [7..7] Write Enable for bits [2:0] */ + __OM uint16_t PRKEY : 8; /*!< [15..8] LSMRWDIS Key Code */ + } LSMRWDIS_b; + }; }; -} R_MSTP_Type; /*!< Size = 20 (0x14) */ +} R_MSTP_Type; /*!< Size = 20 (0x14) */ /* =========================================================================================================================== */ /* ================ R_PORT0 ================ */ @@ -7326,11 +7344,23 @@ typedef struct /*!< (@ 0x40040D00) R_PMISC Structure struct { uint8_t : 6; - __IOM uint8_t PFSWE : 1; /*!< [6..6] PmnPFS Register Write */ - __IOM uint8_t B0WI : 1; /*!< [7..7] PFSWE Bit Write Disable */ + __IOM uint8_t PFSWE : 1; /*!< [6..6] PmnPFS Register Write */ + __IOM uint8_t B0WI : 1; /*!< [7..7] PFSWE Bit Write Disable */ } PWPRS_b; }; - __IM uint16_t RESERVED2[5]; + __IM uint16_t RESERVED2[4]; + __IM uint8_t RESERVED3; + + union + { + __IOM uint8_t PRWCNTR; /*!< (@ 0x0000000F) Port Read Wait Control Register */ + + struct + { + __IOM uint8_t WAIT : 2; /*!< [1..0] Wait Cycle Control */ + uint8_t : 6; + } PRWCNTR_b; + }; __IOM R_PMISC_PMSAR_Type PMSAR[12]; /*!< (@ 0x00000010) Port Security Attribution Register */ } R_PMISC_Type; /*!< Size = 40 (0x28) */ @@ -10432,29 +10462,37 @@ typedef struct /*!< (@ 0x400D1000) R_TRNG Structure typedef struct /*!< (@ 0x407EC000) R_TSN Structure */ { - __IM uint8_t RESERVED[552]; + __IM uint16_t RESERVED[276]; union { - __IM uint8_t TSCDRL; /*!< (@ 0x00000228) Temperature Sensor Calibration Data Register - * L */ + __IM uint16_t TSCDR; /*!< (@ 0x00000228) Temperature Sensor Calibration Data Register */ struct { - __IM uint8_t TSCDRL : 8; /*!< [7..0] The calibration data stores the lower 8 bits of the convertedvalue. */ - } TSCDRL_b; - }; + union + { + __IM uint8_t TSCDRL; /*!< (@ 0x00000228) Temperature Sensor Calibration Data Register + * L */ - union - { - __IM uint8_t TSCDRH; /*!< (@ 0x00000229) Temperature Sensor Calibration Data Register - * H */ + struct + { + __IM uint8_t TSCDRL : 8; /*!< [7..0] The calibration data stores the lower 8 bits of the convertedvalue. */ + } TSCDRL_b; + }; - struct - { - __IM uint8_t TSCDRH : 8; /*!< [7..0] The calibration data stores the higher 8 bits of the - * convertedvalue. */ - } TSCDRH_b; + union + { + __IM uint8_t TSCDRH; /*!< (@ 0x00000229) Temperature Sensor Calibration Data Register + * H */ + + struct + { + __IM uint8_t TSCDRH : 8; /*!< [7..0] The calibration data stores the higher 8 bits of the + * convertedvalue. */ + } TSCDRH_b; + }; + }; }; } R_TSN_Type; /*!< Size = 554 (0x22a) */ @@ -10797,16 +10835,16 @@ typedef struct /*!< (@ 0x40084000) R_AGTX0 Structure #define R_TSN ((R_TSN_Type *) R_TSN_BASE) #define R_WDT ((R_WDT_Type *) R_WDT_BASE) #define R_AES ((R_AES_Type *) R_AES_BASE) - #define R_AGTX0 ((R_AGTX0_Type *) R_AGTX0_BASE) - #define R_AGTX1 ((R_AGTX0_Type *) R_AGTX1_BASE) - #define R_AGTX2 ((R_AGTX0_Type *) R_AGTX2_BASE) - #define R_AGTX3 ((R_AGTX0_Type *) R_AGTX3_BASE) - #define R_AGTX4 ((R_AGTX0_Type *) R_AGTX4_BASE) - #define R_AGTX5 ((R_AGTX0_Type *) R_AGTX5_BASE) - #define R_AGTX6 ((R_AGTX0_Type *) R_AGTX6_BASE) - #define R_AGTX7 ((R_AGTX0_Type *) R_AGTX7_BASE) - #define R_AGTX8 ((R_AGTX0_Type *) R_AGTX8_BASE) - #define R_AGTX9 ((R_AGTX0_Type *) R_AGTX9_BASE) + #define R_AGTW0 ((R_AGTX0_Type *) R_AGTX0_BASE) + #define R_AGTW1 ((R_AGTX0_Type *) R_AGTX1_BASE) + #define R_AGTW2 ((R_AGTX0_Type *) R_AGTX2_BASE) + #define R_AGTW3 ((R_AGTX0_Type *) R_AGTX3_BASE) + #define R_AGTW4 ((R_AGTX0_Type *) R_AGTX4_BASE) + #define R_AGTW5 ((R_AGTX0_Type *) R_AGTX5_BASE) + #define R_AGTW6 ((R_AGTX0_Type *) R_AGTX6_BASE) + #define R_AGTW7 ((R_AGTX0_Type *) R_AGTX7_BASE) + #define R_AGTW8 ((R_AGTX0_Type *) R_AGTX8_BASE) + #define R_AGTW9 ((R_AGTX0_Type *) R_AGTX9_BASE) /** @} */ /* End of group Device_Peripheral_declaration */ @@ -13979,20 +14017,31 @@ typedef struct /*!< (@ 0x40084000) R_AGTX0 Structure /* =========================================================================================================================== */ /* ======================================================== MSTPCRA ======================================================== */ - #define R_MSTP_MSTPCRA_MSTPA_Pos (0UL) /*!< MSTPA (Bit 0) */ - #define R_MSTP_MSTPCRA_MSTPA_Msk (0x1UL) /*!< MSTPA (Bitfield-Mask: 0x01) */ + #define R_MSTP_MSTPCRA_MSTPA_Pos (0UL) /*!< MSTPA (Bit 0) */ + #define R_MSTP_MSTPCRA_MSTPA_Msk (0x1UL) /*!< MSTPA (Bitfield-Mask: 0x01) */ /* ======================================================== MSTPCRB ======================================================== */ - #define R_MSTP_MSTPCRB_MSTPB_Pos (0UL) /*!< MSTPB (Bit 0) */ - #define R_MSTP_MSTPCRB_MSTPB_Msk (0x1UL) /*!< MSTPB (Bitfield-Mask: 0x01) */ + #define R_MSTP_MSTPCRB_MSTPB_Pos (0UL) /*!< MSTPB (Bit 0) */ + #define R_MSTP_MSTPCRB_MSTPB_Msk (0x1UL) /*!< MSTPB (Bitfield-Mask: 0x01) */ /* ======================================================== MSTPCRC ======================================================== */ - #define R_MSTP_MSTPCRC_MSTPC_Pos (0UL) /*!< MSTPC (Bit 0) */ - #define R_MSTP_MSTPCRC_MSTPC_Msk (0x1UL) /*!< MSTPC (Bitfield-Mask: 0x01) */ + #define R_MSTP_MSTPCRC_MSTPC_Pos (0UL) /*!< MSTPC (Bit 0) */ + #define R_MSTP_MSTPCRC_MSTPC_Msk (0x1UL) /*!< MSTPC (Bitfield-Mask: 0x01) */ /* ======================================================== MSTPCRD ======================================================== */ - #define R_MSTP_MSTPCRD_MSTPD_Pos (0UL) /*!< MSTPD (Bit 0) */ - #define R_MSTP_MSTPCRD_MSTPD_Msk (0x1UL) /*!< MSTPD (Bitfield-Mask: 0x01) */ + #define R_MSTP_MSTPCRD_MSTPD_Pos (0UL) /*!< MSTPD (Bit 0) */ + #define R_MSTP_MSTPCRD_MSTPD_Msk (0x1UL) /*!< MSTPD (Bitfield-Mask: 0x01) */ /* ======================================================== MSTPCRE ======================================================== */ - #define R_MSTP_MSTPCRE_MSTPE_Pos (0UL) /*!< MSTPE (Bit 0) */ - #define R_MSTP_MSTPCRE_MSTPE_Msk (0x1UL) /*!< MSTPE (Bitfield-Mask: 0x01) */ + #define R_MSTP_MSTPCRE_MSTPE_Pos (0UL) /*!< MSTPE (Bit 0) */ + #define R_MSTP_MSTPCRE_MSTPE_Msk (0x1UL) /*!< MSTPE (Bitfield-Mask: 0x01) */ +/* ======================================================= LSMRWDIS ======================================================== */ + #define R_MSTP_LSMRWDIS_RTCRWDIS_Pos (0UL) /*!< RTCRWDIS (Bit 0) */ + #define R_MSTP_LSMRWDIS_RTCRWDIS_Msk (0x1UL) /*!< RTCRWDIS (Bitfield-Mask: 0x01) */ + #define R_MSTP_LSMRWDIS_WDTDIS_Pos (1UL) /*!< WDTDIS (Bit 1) */ + #define R_MSTP_LSMRWDIS_WDTDIS_Msk (0x2UL) /*!< WDTDIS (Bitfield-Mask: 0x01) */ + #define R_MSTP_LSMRWDIS_IWDTIDS_Pos (2UL) /*!< IWDTIDS (Bit 2) */ + #define R_MSTP_LSMRWDIS_IWDTIDS_Msk (0x4UL) /*!< IWDTIDS (Bitfield-Mask: 0x01) */ + #define R_MSTP_LSMRWDIS_WREN_Pos (7UL) /*!< WREN (Bit 7) */ + #define R_MSTP_LSMRWDIS_WREN_Msk (0x80UL) /*!< WREN (Bitfield-Mask: 0x01) */ + #define R_MSTP_LSMRWDIS_PRKEY_Pos (8UL) /*!< PRKEY (Bit 8) */ + #define R_MSTP_LSMRWDIS_PRKEY_Msk (0xff00UL) /*!< PRKEY (Bitfield-Mask: 0xff) */ /* =========================================================================================================================== */ /* ================ R_PORT0 ================ */ @@ -14066,6 +14115,9 @@ typedef struct /*!< (@ 0x40084000) R_AGTX0 Structure #define R_PMISC_PWPRS_PFSWE_Msk (0x40UL) /*!< PFSWE (Bitfield-Mask: 0x01) */ #define R_PMISC_PWPRS_B0WI_Pos (7UL) /*!< B0WI (Bit 7) */ #define R_PMISC_PWPRS_B0WI_Msk (0x80UL) /*!< B0WI (Bitfield-Mask: 0x01) */ +/* ======================================================== PRWCNTR ======================================================== */ + #define R_PMISC_PRWCNTR_WAIT_Pos (0UL) /*!< WAIT (Bit 0) */ + #define R_PMISC_PRWCNTR_WAIT_Msk (0x3UL) /*!< WAIT (Bitfield-Mask: 0x03) */ /* =========================================================================================================================== */ /* ================ R_SCI0 ================ */ @@ -15530,6 +15582,7 @@ typedef struct /*!< (@ 0x40084000) R_AGTX0 Structure /* ================ R_TSN ================ */ /* =========================================================================================================================== */ +/* ========================================================= TSCDR ========================================================= */ /* ======================================================== TSCDRH ========================================================= */ #define R_TSN_TSCDRH_TSCDRH_Pos (0UL) /*!< TSCDRH (Bit 0) */ #define R_TSN_TSCDRH_TSCDRH_Msk (0xffUL) /*!< TSCDRH (Bitfield-Mask: 0xff) */ diff --git a/ra/fsp/src/bsp/cmsis/Device/RENESAS/Include/R7FA2L1AB.h b/ra/fsp/src/bsp/cmsis/Device/RENESAS/Include/R7FA2L1AB.h index c86b056cf..2396cfb92 100644 --- a/ra/fsp/src/bsp/cmsis/Device/RENESAS/Include/R7FA2L1AB.h +++ b/ra/fsp/src/bsp/cmsis/Device/RENESAS/Include/R7FA2L1AB.h @@ -7128,67 +7128,85 @@ typedef struct /*!< (@ 0x40047000) R_MSTP Structure union { - __IOM uint32_t MSTPCRE; /*!< (@ 0x00000010) Module Stop Control Register E */ + union + { + __IOM uint32_t MSTPCRE; /*!< (@ 0x00000010) Module Stop Control Register E */ - struct + struct + { + __IOM uint32_t MSTPE0 : 1; /*!< [0..0] Module stop bit 0. See device hardware manual for usage. */ + __IOM uint32_t MSTPE1 : 1; /*!< [1..1] Module stop bit 1. See device hardware manual for usage. */ + __IOM uint32_t MSTPE2 : 1; /*!< [2..2] Module stop bit 2. See device hardware manual for usage. */ + __IOM uint32_t MSTPE3 : 1; /*!< [3..3] Module stop bit 3. See device hardware manual for usage. */ + __IOM uint32_t MSTPE4 : 1; /*!< [4..4] Module stop bit 4. See device hardware manual for usage. */ + __IOM uint32_t MSTPE5 : 1; /*!< [5..5] Module stop bit 5. See device hardware manual for usage. */ + __IOM uint32_t MSTPE6 : 1; /*!< [6..6] Module stop bit 6. See device hardware manual for usage. */ + __IOM uint32_t MSTPE7 : 1; /*!< [7..7] Module stop bit 7. See device hardware manual for usage. */ + __IOM uint32_t MSTPE8 : 1; /*!< [8..8] Module stop bit 8. See device hardware manual for usage. */ + __IOM uint32_t MSTPE9 : 1; /*!< [9..9] Module stop bit 9. See device hardware manual for usage. */ + __IOM uint32_t MSTPE10 : 1; /*!< [10..10] Module stop bit 10. See device hardware manual for + * usage. */ + __IOM uint32_t MSTPE11 : 1; /*!< [11..11] Module stop bit 11. See device hardware manual for + * usage. */ + __IOM uint32_t MSTPE12 : 1; /*!< [12..12] Module stop bit 12. See device hardware manual for + * usage. */ + __IOM uint32_t MSTPE13 : 1; /*!< [13..13] Module stop bit 13. See device hardware manual for + * usage. */ + __IOM uint32_t MSTPE14 : 1; /*!< [14..14] Module stop bit 14. See device hardware manual for + * usage. */ + __IOM uint32_t MSTPE15 : 1; /*!< [15..15] Module stop bit 15. See device hardware manual for + * usage. */ + __IOM uint32_t MSTPE16 : 1; /*!< [16..16] Module stop bit 16. See device hardware manual for + * usage. */ + __IOM uint32_t MSTPE17 : 1; /*!< [17..17] Module stop bit 17. See device hardware manual for + * usage. */ + __IOM uint32_t MSTPE18 : 1; /*!< [18..18] Module stop bit 18. See device hardware manual for + * usage. */ + __IOM uint32_t MSTPE19 : 1; /*!< [19..19] Module stop bit 19. See device hardware manual for + * usage. */ + __IOM uint32_t MSTPE20 : 1; /*!< [20..20] Module stop bit 20. See device hardware manual for + * usage. */ + __IOM uint32_t MSTPE21 : 1; /*!< [21..21] Module stop bit 21. See device hardware manual for + * usage. */ + __IOM uint32_t MSTPE22 : 1; /*!< [22..22] Module stop bit 22. See device hardware manual for + * usage. */ + __IOM uint32_t MSTPE23 : 1; /*!< [23..23] Module stop bit 23. See device hardware manual for + * usage. */ + __IOM uint32_t MSTPE24 : 1; /*!< [24..24] Module stop bit 24. See device hardware manual for + * usage. */ + __IOM uint32_t MSTPE25 : 1; /*!< [25..25] Module stop bit 25. See device hardware manual for + * usage. */ + __IOM uint32_t MSTPE26 : 1; /*!< [26..26] Module stop bit 26. See device hardware manual for + * usage. */ + __IOM uint32_t MSTPE27 : 1; /*!< [27..27] Module stop bit 27. See device hardware manual for + * usage. */ + __IOM uint32_t MSTPE28 : 1; /*!< [28..28] Module stop bit 28. See device hardware manual for + * usage. */ + __IOM uint32_t MSTPE29 : 1; /*!< [29..29] Module stop bit 29. See device hardware manual for + * usage. */ + __IOM uint32_t MSTPE30 : 1; /*!< [30..30] Module stop bit 30. See device hardware manual for + * usage. */ + __IOM uint32_t MSTPE31 : 1; /*!< [31..31] Module stop bit 31. See device hardware manual for + * usage. */ + } MSTPCRE_b; + }; + + union { - __IOM uint32_t MSTPE0 : 1; /*!< [0..0] Module stop bit 0. See device hardware manual for usage. */ - __IOM uint32_t MSTPE1 : 1; /*!< [1..1] Module stop bit 1. See device hardware manual for usage. */ - __IOM uint32_t MSTPE2 : 1; /*!< [2..2] Module stop bit 2. See device hardware manual for usage. */ - __IOM uint32_t MSTPE3 : 1; /*!< [3..3] Module stop bit 3. See device hardware manual for usage. */ - __IOM uint32_t MSTPE4 : 1; /*!< [4..4] Module stop bit 4. See device hardware manual for usage. */ - __IOM uint32_t MSTPE5 : 1; /*!< [5..5] Module stop bit 5. See device hardware manual for usage. */ - __IOM uint32_t MSTPE6 : 1; /*!< [6..6] Module stop bit 6. See device hardware manual for usage. */ - __IOM uint32_t MSTPE7 : 1; /*!< [7..7] Module stop bit 7. See device hardware manual for usage. */ - __IOM uint32_t MSTPE8 : 1; /*!< [8..8] Module stop bit 8. See device hardware manual for usage. */ - __IOM uint32_t MSTPE9 : 1; /*!< [9..9] Module stop bit 9. See device hardware manual for usage. */ - __IOM uint32_t MSTPE10 : 1; /*!< [10..10] Module stop bit 10. See device hardware manual for - * usage. */ - __IOM uint32_t MSTPE11 : 1; /*!< [11..11] Module stop bit 11. See device hardware manual for - * usage. */ - __IOM uint32_t MSTPE12 : 1; /*!< [12..12] Module stop bit 12. See device hardware manual for - * usage. */ - __IOM uint32_t MSTPE13 : 1; /*!< [13..13] Module stop bit 13. See device hardware manual for - * usage. */ - __IOM uint32_t MSTPE14 : 1; /*!< [14..14] Module stop bit 14. See device hardware manual for - * usage. */ - __IOM uint32_t MSTPE15 : 1; /*!< [15..15] Module stop bit 15. See device hardware manual for - * usage. */ - __IOM uint32_t MSTPE16 : 1; /*!< [16..16] Module stop bit 16. See device hardware manual for - * usage. */ - __IOM uint32_t MSTPE17 : 1; /*!< [17..17] Module stop bit 17. See device hardware manual for - * usage. */ - __IOM uint32_t MSTPE18 : 1; /*!< [18..18] Module stop bit 18. See device hardware manual for - * usage. */ - __IOM uint32_t MSTPE19 : 1; /*!< [19..19] Module stop bit 19. See device hardware manual for - * usage. */ - __IOM uint32_t MSTPE20 : 1; /*!< [20..20] Module stop bit 20. See device hardware manual for - * usage. */ - __IOM uint32_t MSTPE21 : 1; /*!< [21..21] Module stop bit 21. See device hardware manual for - * usage. */ - __IOM uint32_t MSTPE22 : 1; /*!< [22..22] Module stop bit 22. See device hardware manual for - * usage. */ - __IOM uint32_t MSTPE23 : 1; /*!< [23..23] Module stop bit 23. See device hardware manual for - * usage. */ - __IOM uint32_t MSTPE24 : 1; /*!< [24..24] Module stop bit 24. See device hardware manual for - * usage. */ - __IOM uint32_t MSTPE25 : 1; /*!< [25..25] Module stop bit 25. See device hardware manual for - * usage. */ - __IOM uint32_t MSTPE26 : 1; /*!< [26..26] Module stop bit 26. See device hardware manual for - * usage. */ - __IOM uint32_t MSTPE27 : 1; /*!< [27..27] Module stop bit 27. See device hardware manual for - * usage. */ - __IOM uint32_t MSTPE28 : 1; /*!< [28..28] Module stop bit 28. See device hardware manual for - * usage. */ - __IOM uint32_t MSTPE29 : 1; /*!< [29..29] Module stop bit 29. See device hardware manual for - * usage. */ - __IOM uint32_t MSTPE30 : 1; /*!< [30..30] Module stop bit 30. See device hardware manual for - * usage. */ - __IOM uint32_t MSTPE31 : 1; /*!< [31..31] Module stop bit 31. See device hardware manual for - * usage. */ - } MSTPCRE_b; + __IOM uint16_t LSMRWDIS; /*!< (@ 0x00000010) Low Speed Module R/W Disable Control Register */ + + struct + { + __IOM uint16_t RTCRWDIS : 1; /*!< [0..0] RTC Register R/W Enable Control */ + __IOM uint16_t WDTDIS : 1; /*!< [1..1] WDT Operate Clock Control */ + __IOM uint16_t IWDTIDS : 1; /*!< [2..2] IWDT Register Clock Control */ + uint16_t : 4; + __IOM uint16_t WREN : 1; /*!< [7..7] Write Enable for bits [2:0] */ + __OM uint16_t PRKEY : 8; /*!< [15..8] LSMRWDIS Key Code */ + } LSMRWDIS_b; + }; }; -} R_MSTP_Type; /*!< Size = 20 (0x14) */ +} R_MSTP_Type; /*!< Size = 20 (0x14) */ /* =========================================================================================================================== */ /* ================ R_PORT0 ================ */ @@ -7530,11 +7548,23 @@ typedef struct /*!< (@ 0x40040D00) R_PMISC Structure struct { uint8_t : 6; - __IOM uint8_t PFSWE : 1; /*!< [6..6] PmnPFS Register Write */ - __IOM uint8_t B0WI : 1; /*!< [7..7] PFSWE Bit Write Disable */ + __IOM uint8_t PFSWE : 1; /*!< [6..6] PmnPFS Register Write */ + __IOM uint8_t B0WI : 1; /*!< [7..7] PFSWE Bit Write Disable */ } PWPRS_b; }; - __IM uint16_t RESERVED2[5]; + __IM uint16_t RESERVED2[4]; + __IM uint8_t RESERVED3; + + union + { + __IOM uint8_t PRWCNTR; /*!< (@ 0x0000000F) Port Read Wait Control Register */ + + struct + { + __IOM uint8_t WAIT : 2; /*!< [1..0] Wait Cycle Control */ + uint8_t : 6; + } PRWCNTR_b; + }; __IOM R_PMISC_PMSAR_Type PMSAR[12]; /*!< (@ 0x00000010) Port Security Attribution Register */ } R_PMISC_Type; /*!< Size = 40 (0x28) */ @@ -11136,29 +11166,37 @@ typedef struct /*!< (@ 0x400D1000) R_TRNG Structure typedef struct /*!< (@ 0x407EC000) R_TSN Structure */ { - __IM uint8_t RESERVED[552]; + __IM uint16_t RESERVED[276]; union { - __IM uint8_t TSCDRL; /*!< (@ 0x00000228) Temperature Sensor Calibration Data Register - * L */ + __IM uint16_t TSCDR; /*!< (@ 0x00000228) Temperature Sensor Calibration Data Register */ struct { - __IM uint8_t TSCDRL : 8; /*!< [7..0] The calibration data stores the lower 8 bits of the convertedvalue. */ - } TSCDRL_b; - }; + union + { + __IM uint8_t TSCDRL; /*!< (@ 0x00000228) Temperature Sensor Calibration Data Register + * L */ - union - { - __IM uint8_t TSCDRH; /*!< (@ 0x00000229) Temperature Sensor Calibration Data Register - * H */ + struct + { + __IM uint8_t TSCDRL : 8; /*!< [7..0] The calibration data stores the lower 8 bits of the convertedvalue. */ + } TSCDRL_b; + }; - struct - { - __IM uint8_t TSCDRH : 8; /*!< [7..0] The calibration data stores the higher 8 bits of the - * convertedvalue. */ - } TSCDRH_b; + union + { + __IM uint8_t TSCDRH; /*!< (@ 0x00000229) Temperature Sensor Calibration Data Register + * H */ + + struct + { + __IM uint8_t TSCDRH : 8; /*!< [7..0] The calibration data stores the higher 8 bits of the + * convertedvalue. */ + } TSCDRH_b; + }; + }; }; } R_TSN_Type; /*!< Size = 554 (0x22a) */ @@ -11507,16 +11545,16 @@ typedef struct /*!< (@ 0x40084000) R_AGTX0 Structure #define R_TSN ((R_TSN_Type *) R_TSN_BASE) #define R_WDT ((R_WDT_Type *) R_WDT_BASE) #define R_AES ((R_AES_Type *) R_AES_BASE) - #define R_AGTX0 ((R_AGTX0_Type *) R_AGTX0_BASE) - #define R_AGTX1 ((R_AGTX0_Type *) R_AGTX1_BASE) - #define R_AGTX2 ((R_AGTX0_Type *) R_AGTX2_BASE) - #define R_AGTX3 ((R_AGTX0_Type *) R_AGTX3_BASE) - #define R_AGTX4 ((R_AGTX0_Type *) R_AGTX4_BASE) - #define R_AGTX5 ((R_AGTX0_Type *) R_AGTX5_BASE) - #define R_AGTX6 ((R_AGTX0_Type *) R_AGTX6_BASE) - #define R_AGTX7 ((R_AGTX0_Type *) R_AGTX7_BASE) - #define R_AGTX8 ((R_AGTX0_Type *) R_AGTX8_BASE) - #define R_AGTX9 ((R_AGTX0_Type *) R_AGTX9_BASE) + #define R_AGT0 ((R_AGTX0_Type *) R_AGTX0_BASE) + #define R_AGT1 ((R_AGTX0_Type *) R_AGTX1_BASE) + #define R_AGT2 ((R_AGTX0_Type *) R_AGTX2_BASE) + #define R_AGT3 ((R_AGTX0_Type *) R_AGTX3_BASE) + #define R_AGT4 ((R_AGTX0_Type *) R_AGTX4_BASE) + #define R_AGT5 ((R_AGTX0_Type *) R_AGTX5_BASE) + #define R_AGT6 ((R_AGTX0_Type *) R_AGTX6_BASE) + #define R_AGT7 ((R_AGTX0_Type *) R_AGTX7_BASE) + #define R_AGT8 ((R_AGTX0_Type *) R_AGTX8_BASE) + #define R_AGT9 ((R_AGTX0_Type *) R_AGTX9_BASE) /** @} */ /* End of group Device_Peripheral_declaration */ @@ -14939,20 +14977,31 @@ typedef struct /*!< (@ 0x40084000) R_AGTX0 Structure /* =========================================================================================================================== */ /* ======================================================== MSTPCRA ======================================================== */ - #define R_MSTP_MSTPCRA_MSTPA_Pos (0UL) /*!< MSTPA (Bit 0) */ - #define R_MSTP_MSTPCRA_MSTPA_Msk (0x1UL) /*!< MSTPA (Bitfield-Mask: 0x01) */ + #define R_MSTP_MSTPCRA_MSTPA_Pos (0UL) /*!< MSTPA (Bit 0) */ + #define R_MSTP_MSTPCRA_MSTPA_Msk (0x1UL) /*!< MSTPA (Bitfield-Mask: 0x01) */ /* ======================================================== MSTPCRB ======================================================== */ - #define R_MSTP_MSTPCRB_MSTPB_Pos (0UL) /*!< MSTPB (Bit 0) */ - #define R_MSTP_MSTPCRB_MSTPB_Msk (0x1UL) /*!< MSTPB (Bitfield-Mask: 0x01) */ + #define R_MSTP_MSTPCRB_MSTPB_Pos (0UL) /*!< MSTPB (Bit 0) */ + #define R_MSTP_MSTPCRB_MSTPB_Msk (0x1UL) /*!< MSTPB (Bitfield-Mask: 0x01) */ /* ======================================================== MSTPCRC ======================================================== */ - #define R_MSTP_MSTPCRC_MSTPC_Pos (0UL) /*!< MSTPC (Bit 0) */ - #define R_MSTP_MSTPCRC_MSTPC_Msk (0x1UL) /*!< MSTPC (Bitfield-Mask: 0x01) */ + #define R_MSTP_MSTPCRC_MSTPC_Pos (0UL) /*!< MSTPC (Bit 0) */ + #define R_MSTP_MSTPCRC_MSTPC_Msk (0x1UL) /*!< MSTPC (Bitfield-Mask: 0x01) */ /* ======================================================== MSTPCRD ======================================================== */ - #define R_MSTP_MSTPCRD_MSTPD_Pos (0UL) /*!< MSTPD (Bit 0) */ - #define R_MSTP_MSTPCRD_MSTPD_Msk (0x1UL) /*!< MSTPD (Bitfield-Mask: 0x01) */ + #define R_MSTP_MSTPCRD_MSTPD_Pos (0UL) /*!< MSTPD (Bit 0) */ + #define R_MSTP_MSTPCRD_MSTPD_Msk (0x1UL) /*!< MSTPD (Bitfield-Mask: 0x01) */ /* ======================================================== MSTPCRE ======================================================== */ - #define R_MSTP_MSTPCRE_MSTPE_Pos (0UL) /*!< MSTPE (Bit 0) */ - #define R_MSTP_MSTPCRE_MSTPE_Msk (0x1UL) /*!< MSTPE (Bitfield-Mask: 0x01) */ + #define R_MSTP_MSTPCRE_MSTPE_Pos (0UL) /*!< MSTPE (Bit 0) */ + #define R_MSTP_MSTPCRE_MSTPE_Msk (0x1UL) /*!< MSTPE (Bitfield-Mask: 0x01) */ +/* ======================================================= LSMRWDIS ======================================================== */ + #define R_MSTP_LSMRWDIS_RTCRWDIS_Pos (0UL) /*!< RTCRWDIS (Bit 0) */ + #define R_MSTP_LSMRWDIS_RTCRWDIS_Msk (0x1UL) /*!< RTCRWDIS (Bitfield-Mask: 0x01) */ + #define R_MSTP_LSMRWDIS_WDTDIS_Pos (1UL) /*!< WDTDIS (Bit 1) */ + #define R_MSTP_LSMRWDIS_WDTDIS_Msk (0x2UL) /*!< WDTDIS (Bitfield-Mask: 0x01) */ + #define R_MSTP_LSMRWDIS_IWDTIDS_Pos (2UL) /*!< IWDTIDS (Bit 2) */ + #define R_MSTP_LSMRWDIS_IWDTIDS_Msk (0x4UL) /*!< IWDTIDS (Bitfield-Mask: 0x01) */ + #define R_MSTP_LSMRWDIS_WREN_Pos (7UL) /*!< WREN (Bit 7) */ + #define R_MSTP_LSMRWDIS_WREN_Msk (0x80UL) /*!< WREN (Bitfield-Mask: 0x01) */ + #define R_MSTP_LSMRWDIS_PRKEY_Pos (8UL) /*!< PRKEY (Bit 8) */ + #define R_MSTP_LSMRWDIS_PRKEY_Msk (0xff00UL) /*!< PRKEY (Bitfield-Mask: 0xff) */ /* =========================================================================================================================== */ /* ================ R_PORT0 ================ */ @@ -15026,6 +15075,9 @@ typedef struct /*!< (@ 0x40084000) R_AGTX0 Structure #define R_PMISC_PWPRS_PFSWE_Msk (0x40UL) /*!< PFSWE (Bitfield-Mask: 0x01) */ #define R_PMISC_PWPRS_B0WI_Pos (7UL) /*!< B0WI (Bit 7) */ #define R_PMISC_PWPRS_B0WI_Msk (0x80UL) /*!< B0WI (Bitfield-Mask: 0x01) */ +/* ======================================================== PRWCNTR ======================================================== */ + #define R_PMISC_PRWCNTR_WAIT_Pos (0UL) /*!< WAIT (Bit 0) */ + #define R_PMISC_PRWCNTR_WAIT_Msk (0x3UL) /*!< WAIT (Bitfield-Mask: 0x03) */ /* =========================================================================================================================== */ /* ================ R_RTC ================ */ @@ -16675,6 +16727,7 @@ typedef struct /*!< (@ 0x40084000) R_AGTX0 Structure /* ================ R_TSN ================ */ /* =========================================================================================================================== */ +/* ========================================================= TSCDR ========================================================= */ /* ======================================================== TSCDRH ========================================================= */ #define R_TSN_TSCDRH_TSCDRH_Pos (0UL) /*!< TSCDRH (Bit 0) */ #define R_TSN_TSCDRH_TSCDRH_Msk (0xffUL) /*!< TSCDRH (Bitfield-Mask: 0xff) */ diff --git a/ra/fsp/src/bsp/cmsis/Device/RENESAS/Include/R7FA4E10D.h b/ra/fsp/src/bsp/cmsis/Device/RENESAS/Include/R7FA4E10D.h index edbfef4ac..6a97e72b3 100644 --- a/ra/fsp/src/bsp/cmsis/Device/RENESAS/Include/R7FA4E10D.h +++ b/ra/fsp/src/bsp/cmsis/Device/RENESAS/Include/R7FA4E10D.h @@ -7137,67 +7137,85 @@ typedef struct /*!< (@ 0x40084000) R_MSTP Structure union { - __IOM uint32_t MSTPCRE; /*!< (@ 0x00000010) Module Stop Control Register E */ + union + { + __IOM uint32_t MSTPCRE; /*!< (@ 0x00000010) Module Stop Control Register E */ - struct + struct + { + __IOM uint32_t MSTPE0 : 1; /*!< [0..0] Module stop bit 0. See device hardware manual for usage. */ + __IOM uint32_t MSTPE1 : 1; /*!< [1..1] Module stop bit 1. See device hardware manual for usage. */ + __IOM uint32_t MSTPE2 : 1; /*!< [2..2] Module stop bit 2. See device hardware manual for usage. */ + __IOM uint32_t MSTPE3 : 1; /*!< [3..3] Module stop bit 3. See device hardware manual for usage. */ + __IOM uint32_t MSTPE4 : 1; /*!< [4..4] Module stop bit 4. See device hardware manual for usage. */ + __IOM uint32_t MSTPE5 : 1; /*!< [5..5] Module stop bit 5. See device hardware manual for usage. */ + __IOM uint32_t MSTPE6 : 1; /*!< [6..6] Module stop bit 6. See device hardware manual for usage. */ + __IOM uint32_t MSTPE7 : 1; /*!< [7..7] Module stop bit 7. See device hardware manual for usage. */ + __IOM uint32_t MSTPE8 : 1; /*!< [8..8] Module stop bit 8. See device hardware manual for usage. */ + __IOM uint32_t MSTPE9 : 1; /*!< [9..9] Module stop bit 9. See device hardware manual for usage. */ + __IOM uint32_t MSTPE10 : 1; /*!< [10..10] Module stop bit 10. See device hardware manual for + * usage. */ + __IOM uint32_t MSTPE11 : 1; /*!< [11..11] Module stop bit 11. See device hardware manual for + * usage. */ + __IOM uint32_t MSTPE12 : 1; /*!< [12..12] Module stop bit 12. See device hardware manual for + * usage. */ + __IOM uint32_t MSTPE13 : 1; /*!< [13..13] Module stop bit 13. See device hardware manual for + * usage. */ + __IOM uint32_t MSTPE14 : 1; /*!< [14..14] Module stop bit 14. See device hardware manual for + * usage. */ + __IOM uint32_t MSTPE15 : 1; /*!< [15..15] Module stop bit 15. See device hardware manual for + * usage. */ + __IOM uint32_t MSTPE16 : 1; /*!< [16..16] Module stop bit 16. See device hardware manual for + * usage. */ + __IOM uint32_t MSTPE17 : 1; /*!< [17..17] Module stop bit 17. See device hardware manual for + * usage. */ + __IOM uint32_t MSTPE18 : 1; /*!< [18..18] Module stop bit 18. See device hardware manual for + * usage. */ + __IOM uint32_t MSTPE19 : 1; /*!< [19..19] Module stop bit 19. See device hardware manual for + * usage. */ + __IOM uint32_t MSTPE20 : 1; /*!< [20..20] Module stop bit 20. See device hardware manual for + * usage. */ + __IOM uint32_t MSTPE21 : 1; /*!< [21..21] Module stop bit 21. See device hardware manual for + * usage. */ + __IOM uint32_t MSTPE22 : 1; /*!< [22..22] Module stop bit 22. See device hardware manual for + * usage. */ + __IOM uint32_t MSTPE23 : 1; /*!< [23..23] Module stop bit 23. See device hardware manual for + * usage. */ + __IOM uint32_t MSTPE24 : 1; /*!< [24..24] Module stop bit 24. See device hardware manual for + * usage. */ + __IOM uint32_t MSTPE25 : 1; /*!< [25..25] Module stop bit 25. See device hardware manual for + * usage. */ + __IOM uint32_t MSTPE26 : 1; /*!< [26..26] Module stop bit 26. See device hardware manual for + * usage. */ + __IOM uint32_t MSTPE27 : 1; /*!< [27..27] Module stop bit 27. See device hardware manual for + * usage. */ + __IOM uint32_t MSTPE28 : 1; /*!< [28..28] Module stop bit 28. See device hardware manual for + * usage. */ + __IOM uint32_t MSTPE29 : 1; /*!< [29..29] Module stop bit 29. See device hardware manual for + * usage. */ + __IOM uint32_t MSTPE30 : 1; /*!< [30..30] Module stop bit 30. See device hardware manual for + * usage. */ + __IOM uint32_t MSTPE31 : 1; /*!< [31..31] Module stop bit 31. See device hardware manual for + * usage. */ + } MSTPCRE_b; + }; + + union { - __IOM uint32_t MSTPE0 : 1; /*!< [0..0] Module stop bit 0. See device hardware manual for usage. */ - __IOM uint32_t MSTPE1 : 1; /*!< [1..1] Module stop bit 1. See device hardware manual for usage. */ - __IOM uint32_t MSTPE2 : 1; /*!< [2..2] Module stop bit 2. See device hardware manual for usage. */ - __IOM uint32_t MSTPE3 : 1; /*!< [3..3] Module stop bit 3. See device hardware manual for usage. */ - __IOM uint32_t MSTPE4 : 1; /*!< [4..4] Module stop bit 4. See device hardware manual for usage. */ - __IOM uint32_t MSTPE5 : 1; /*!< [5..5] Module stop bit 5. See device hardware manual for usage. */ - __IOM uint32_t MSTPE6 : 1; /*!< [6..6] Module stop bit 6. See device hardware manual for usage. */ - __IOM uint32_t MSTPE7 : 1; /*!< [7..7] Module stop bit 7. See device hardware manual for usage. */ - __IOM uint32_t MSTPE8 : 1; /*!< [8..8] Module stop bit 8. See device hardware manual for usage. */ - __IOM uint32_t MSTPE9 : 1; /*!< [9..9] Module stop bit 9. See device hardware manual for usage. */ - __IOM uint32_t MSTPE10 : 1; /*!< [10..10] Module stop bit 10. See device hardware manual for - * usage. */ - __IOM uint32_t MSTPE11 : 1; /*!< [11..11] Module stop bit 11. See device hardware manual for - * usage. */ - __IOM uint32_t MSTPE12 : 1; /*!< [12..12] Module stop bit 12. See device hardware manual for - * usage. */ - __IOM uint32_t MSTPE13 : 1; /*!< [13..13] Module stop bit 13. See device hardware manual for - * usage. */ - __IOM uint32_t MSTPE14 : 1; /*!< [14..14] Module stop bit 14. See device hardware manual for - * usage. */ - __IOM uint32_t MSTPE15 : 1; /*!< [15..15] Module stop bit 15. See device hardware manual for - * usage. */ - __IOM uint32_t MSTPE16 : 1; /*!< [16..16] Module stop bit 16. See device hardware manual for - * usage. */ - __IOM uint32_t MSTPE17 : 1; /*!< [17..17] Module stop bit 17. See device hardware manual for - * usage. */ - __IOM uint32_t MSTPE18 : 1; /*!< [18..18] Module stop bit 18. See device hardware manual for - * usage. */ - __IOM uint32_t MSTPE19 : 1; /*!< [19..19] Module stop bit 19. See device hardware manual for - * usage. */ - __IOM uint32_t MSTPE20 : 1; /*!< [20..20] Module stop bit 20. See device hardware manual for - * usage. */ - __IOM uint32_t MSTPE21 : 1; /*!< [21..21] Module stop bit 21. See device hardware manual for - * usage. */ - __IOM uint32_t MSTPE22 : 1; /*!< [22..22] Module stop bit 22. See device hardware manual for - * usage. */ - __IOM uint32_t MSTPE23 : 1; /*!< [23..23] Module stop bit 23. See device hardware manual for - * usage. */ - __IOM uint32_t MSTPE24 : 1; /*!< [24..24] Module stop bit 24. See device hardware manual for - * usage. */ - __IOM uint32_t MSTPE25 : 1; /*!< [25..25] Module stop bit 25. See device hardware manual for - * usage. */ - __IOM uint32_t MSTPE26 : 1; /*!< [26..26] Module stop bit 26. See device hardware manual for - * usage. */ - __IOM uint32_t MSTPE27 : 1; /*!< [27..27] Module stop bit 27. See device hardware manual for - * usage. */ - __IOM uint32_t MSTPE28 : 1; /*!< [28..28] Module stop bit 28. See device hardware manual for - * usage. */ - __IOM uint32_t MSTPE29 : 1; /*!< [29..29] Module stop bit 29. See device hardware manual for - * usage. */ - __IOM uint32_t MSTPE30 : 1; /*!< [30..30] Module stop bit 30. See device hardware manual for - * usage. */ - __IOM uint32_t MSTPE31 : 1; /*!< [31..31] Module stop bit 31. See device hardware manual for - * usage. */ - } MSTPCRE_b; + __IOM uint16_t LSMRWDIS; /*!< (@ 0x00000010) Low Speed Module R/W Disable Control Register */ + + struct + { + __IOM uint16_t RTCRWDIS : 1; /*!< [0..0] RTC Register R/W Enable Control */ + __IOM uint16_t WDTDIS : 1; /*!< [1..1] WDT Operate Clock Control */ + __IOM uint16_t IWDTIDS : 1; /*!< [2..2] IWDT Register Clock Control */ + uint16_t : 4; + __IOM uint16_t WREN : 1; /*!< [7..7] Write Enable for bits [2:0] */ + __OM uint16_t PRKEY : 8; /*!< [15..8] LSMRWDIS Key Code */ + } LSMRWDIS_b; + }; }; -} R_MSTP_Type; /*!< Size = 20 (0x14) */ +} R_MSTP_Type; /*!< Size = 20 (0x14) */ /* =========================================================================================================================== */ /* ================ R_PORT0 ================ */ @@ -7539,11 +7557,23 @@ typedef struct /*!< (@ 0x40080D00) R_PMISC Structure struct { uint8_t : 6; - __IOM uint8_t PFSWE : 1; /*!< [6..6] PmnPFS Register Write */ - __IOM uint8_t B0WI : 1; /*!< [7..7] PFSWE Bit Write Disable */ + __IOM uint8_t PFSWE : 1; /*!< [6..6] PmnPFS Register Write */ + __IOM uint8_t B0WI : 1; /*!< [7..7] PFSWE Bit Write Disable */ } PWPRS_b; }; - __IM uint16_t RESERVED2[5]; + __IM uint16_t RESERVED2[4]; + __IM uint8_t RESERVED3; + + union + { + __IOM uint8_t PRWCNTR; /*!< (@ 0x0000000F) Port Read Wait Control Register */ + + struct + { + __IOM uint8_t WAIT : 2; /*!< [1..0] Wait Cycle Control */ + uint8_t : 6; + } PRWCNTR_b; + }; __IOM R_PMISC_PMSAR_Type PMSAR[12]; /*!< (@ 0x00000010) Port Security Attribution Register */ } R_PMISC_Type; /*!< Size = 40 (0x28) */ @@ -11623,29 +11653,37 @@ typedef struct /*!< (@ 0x4001E000) R_SYSTEM Structure typedef struct /*!< (@ 0x407EC000) R_TSN Structure */ { - __IM uint8_t RESERVED[552]; + __IM uint16_t RESERVED[276]; union { - __IM uint8_t TSCDRL; /*!< (@ 0x00000228) Temperature Sensor Calibration Data Register - * L */ + __IM uint16_t TSCDR; /*!< (@ 0x00000228) Temperature Sensor Calibration Data Register */ struct { - __IM uint8_t TSCDRL : 8; /*!< [7..0] The calibration data stores the lower 8 bits of the convertedvalue. */ - } TSCDRL_b; - }; + union + { + __IM uint8_t TSCDRL; /*!< (@ 0x00000228) Temperature Sensor Calibration Data Register + * L */ - union - { - __IM uint8_t TSCDRH; /*!< (@ 0x00000229) Temperature Sensor Calibration Data Register - * H */ + struct + { + __IM uint8_t TSCDRL : 8; /*!< [7..0] The calibration data stores the lower 8 bits of the convertedvalue. */ + } TSCDRL_b; + }; - struct - { - __IM uint8_t TSCDRH : 8; /*!< [7..0] The calibration data stores the higher 8 bits of the - * convertedvalue. */ - } TSCDRH_b; + union + { + __IM uint8_t TSCDRH; /*!< (@ 0x00000229) Temperature Sensor Calibration Data Register + * H */ + + struct + { + __IM uint8_t TSCDRH : 8; /*!< [7..0] The calibration data stores the higher 8 bits of the + * convertedvalue. */ + } TSCDRH_b; + }; + }; }; } R_TSN_Type; /*!< Size = 554 (0x22a) */ @@ -13379,16 +13417,16 @@ typedef struct /*!< (@ 0x407FC000) R_FLAD Structure #define R_WDT ((R_WDT_Type *) R_WDT_BASE) #define R_TZF ((R_TZF_Type *) R_TZF_BASE) #define R_CPSCU ((R_CPSCU_Type *) R_CPSCU_BASE) - #define R_AGTX0 ((R_AGTX0_Type *) R_AGTX0_BASE) - #define R_AGTX1 ((R_AGTX0_Type *) R_AGTX1_BASE) - #define R_AGTX2 ((R_AGTX0_Type *) R_AGTX2_BASE) - #define R_AGTX3 ((R_AGTX0_Type *) R_AGTX3_BASE) - #define R_AGTX4 ((R_AGTX0_Type *) R_AGTX4_BASE) - #define R_AGTX5 ((R_AGTX0_Type *) R_AGTX5_BASE) - #define R_AGTX6 ((R_AGTX0_Type *) R_AGTX6_BASE) - #define R_AGTX7 ((R_AGTX0_Type *) R_AGTX7_BASE) - #define R_AGTX8 ((R_AGTX0_Type *) R_AGTX8_BASE) - #define R_AGTX9 ((R_AGTX0_Type *) R_AGTX9_BASE) + #define R_AGT0 ((R_AGTX0_Type *) R_AGTX0_BASE) + #define R_AGT1 ((R_AGTX0_Type *) R_AGTX1_BASE) + #define R_AGT2 ((R_AGTX0_Type *) R_AGTX2_BASE) + #define R_AGT3 ((R_AGTX0_Type *) R_AGTX3_BASE) + #define R_AGT4 ((R_AGTX0_Type *) R_AGTX4_BASE) + #define R_AGT5 ((R_AGTX0_Type *) R_AGTX5_BASE) + #define R_AGT6 ((R_AGTX0_Type *) R_AGTX6_BASE) + #define R_AGT7 ((R_AGTX0_Type *) R_AGTX7_BASE) + #define R_AGT8 ((R_AGTX0_Type *) R_AGTX8_BASE) + #define R_AGT9 ((R_AGTX0_Type *) R_AGTX9_BASE) #define R_FLAD ((R_FLAD_Type *) R_FLAD_BASE) /** @} */ /* End of group Device_Peripheral_declaration */ @@ -16718,20 +16756,31 @@ typedef struct /*!< (@ 0x407FC000) R_FLAD Structure /* =========================================================================================================================== */ /* ======================================================== MSTPCRA ======================================================== */ - #define R_MSTP_MSTPCRA_MSTPA_Pos (0UL) /*!< MSTPA (Bit 0) */ - #define R_MSTP_MSTPCRA_MSTPA_Msk (0x1UL) /*!< MSTPA (Bitfield-Mask: 0x01) */ + #define R_MSTP_MSTPCRA_MSTPA_Pos (0UL) /*!< MSTPA (Bit 0) */ + #define R_MSTP_MSTPCRA_MSTPA_Msk (0x1UL) /*!< MSTPA (Bitfield-Mask: 0x01) */ /* ======================================================== MSTPCRB ======================================================== */ - #define R_MSTP_MSTPCRB_MSTPB_Pos (0UL) /*!< MSTPB (Bit 0) */ - #define R_MSTP_MSTPCRB_MSTPB_Msk (0x1UL) /*!< MSTPB (Bitfield-Mask: 0x01) */ + #define R_MSTP_MSTPCRB_MSTPB_Pos (0UL) /*!< MSTPB (Bit 0) */ + #define R_MSTP_MSTPCRB_MSTPB_Msk (0x1UL) /*!< MSTPB (Bitfield-Mask: 0x01) */ /* ======================================================== MSTPCRC ======================================================== */ - #define R_MSTP_MSTPCRC_MSTPC_Pos (0UL) /*!< MSTPC (Bit 0) */ - #define R_MSTP_MSTPCRC_MSTPC_Msk (0x1UL) /*!< MSTPC (Bitfield-Mask: 0x01) */ + #define R_MSTP_MSTPCRC_MSTPC_Pos (0UL) /*!< MSTPC (Bit 0) */ + #define R_MSTP_MSTPCRC_MSTPC_Msk (0x1UL) /*!< MSTPC (Bitfield-Mask: 0x01) */ /* ======================================================== MSTPCRD ======================================================== */ - #define R_MSTP_MSTPCRD_MSTPD_Pos (0UL) /*!< MSTPD (Bit 0) */ - #define R_MSTP_MSTPCRD_MSTPD_Msk (0x1UL) /*!< MSTPD (Bitfield-Mask: 0x01) */ + #define R_MSTP_MSTPCRD_MSTPD_Pos (0UL) /*!< MSTPD (Bit 0) */ + #define R_MSTP_MSTPCRD_MSTPD_Msk (0x1UL) /*!< MSTPD (Bitfield-Mask: 0x01) */ /* ======================================================== MSTPCRE ======================================================== */ - #define R_MSTP_MSTPCRE_MSTPE_Pos (0UL) /*!< MSTPE (Bit 0) */ - #define R_MSTP_MSTPCRE_MSTPE_Msk (0x1UL) /*!< MSTPE (Bitfield-Mask: 0x01) */ + #define R_MSTP_MSTPCRE_MSTPE_Pos (0UL) /*!< MSTPE (Bit 0) */ + #define R_MSTP_MSTPCRE_MSTPE_Msk (0x1UL) /*!< MSTPE (Bitfield-Mask: 0x01) */ +/* ======================================================= LSMRWDIS ======================================================== */ + #define R_MSTP_LSMRWDIS_RTCRWDIS_Pos (0UL) /*!< RTCRWDIS (Bit 0) */ + #define R_MSTP_LSMRWDIS_RTCRWDIS_Msk (0x1UL) /*!< RTCRWDIS (Bitfield-Mask: 0x01) */ + #define R_MSTP_LSMRWDIS_WDTDIS_Pos (1UL) /*!< WDTDIS (Bit 1) */ + #define R_MSTP_LSMRWDIS_WDTDIS_Msk (0x2UL) /*!< WDTDIS (Bitfield-Mask: 0x01) */ + #define R_MSTP_LSMRWDIS_IWDTIDS_Pos (2UL) /*!< IWDTIDS (Bit 2) */ + #define R_MSTP_LSMRWDIS_IWDTIDS_Msk (0x4UL) /*!< IWDTIDS (Bitfield-Mask: 0x01) */ + #define R_MSTP_LSMRWDIS_WREN_Pos (7UL) /*!< WREN (Bit 7) */ + #define R_MSTP_LSMRWDIS_WREN_Msk (0x80UL) /*!< WREN (Bitfield-Mask: 0x01) */ + #define R_MSTP_LSMRWDIS_PRKEY_Pos (8UL) /*!< PRKEY (Bit 8) */ + #define R_MSTP_LSMRWDIS_PRKEY_Msk (0xff00UL) /*!< PRKEY (Bitfield-Mask: 0xff) */ /* =========================================================================================================================== */ /* ================ R_PORT0 ================ */ @@ -16805,6 +16854,9 @@ typedef struct /*!< (@ 0x407FC000) R_FLAD Structure #define R_PMISC_PWPRS_PFSWE_Msk (0x40UL) /*!< PFSWE (Bitfield-Mask: 0x01) */ #define R_PMISC_PWPRS_B0WI_Pos (7UL) /*!< B0WI (Bit 7) */ #define R_PMISC_PWPRS_B0WI_Msk (0x80UL) /*!< B0WI (Bitfield-Mask: 0x01) */ +/* ======================================================== PRWCNTR ======================================================== */ + #define R_PMISC_PRWCNTR_WAIT_Pos (0UL) /*!< WAIT (Bit 0) */ + #define R_PMISC_PRWCNTR_WAIT_Msk (0x3UL) /*!< WAIT (Bitfield-Mask: 0x03) */ /* =========================================================================================================================== */ /* ================ R_QSPI ================ */ @@ -18633,6 +18685,7 @@ typedef struct /*!< (@ 0x407FC000) R_FLAD Structure /* ================ R_TSN ================ */ /* =========================================================================================================================== */ +/* ========================================================= TSCDR ========================================================= */ /* ======================================================== TSCDRH ========================================================= */ #define R_TSN_TSCDRH_TSCDRH_Pos (0UL) /*!< TSCDRH (Bit 0) */ #define R_TSN_TSCDRH_TSCDRH_Msk (0xffUL) /*!< TSCDRH (Bitfield-Mask: 0xff) */ diff --git a/ra/fsp/src/bsp/cmsis/Device/RENESAS/Include/R7FA4E2B9.h b/ra/fsp/src/bsp/cmsis/Device/RENESAS/Include/R7FA4E2B9.h index bd6172feb..a46997455 100644 --- a/ra/fsp/src/bsp/cmsis/Device/RENESAS/Include/R7FA4E2B9.h +++ b/ra/fsp/src/bsp/cmsis/Device/RENESAS/Include/R7FA4E2B9.h @@ -8770,67 +8770,85 @@ typedef struct /*!< (@ 0x40084000) R_MSTP Structure union { - __IOM uint32_t MSTPCRE; /*!< (@ 0x00000010) Module Stop Control Register E */ + union + { + __IOM uint32_t MSTPCRE; /*!< (@ 0x00000010) Module Stop Control Register E */ - struct + struct + { + __IOM uint32_t MSTPE0 : 1; /*!< [0..0] Module stop bit 0. See device hardware manual for usage. */ + __IOM uint32_t MSTPE1 : 1; /*!< [1..1] Module stop bit 1. See device hardware manual for usage. */ + __IOM uint32_t MSTPE2 : 1; /*!< [2..2] Module stop bit 2. See device hardware manual for usage. */ + __IOM uint32_t MSTPE3 : 1; /*!< [3..3] Module stop bit 3. See device hardware manual for usage. */ + __IOM uint32_t MSTPE4 : 1; /*!< [4..4] Module stop bit 4. See device hardware manual for usage. */ + __IOM uint32_t MSTPE5 : 1; /*!< [5..5] Module stop bit 5. See device hardware manual for usage. */ + __IOM uint32_t MSTPE6 : 1; /*!< [6..6] Module stop bit 6. See device hardware manual for usage. */ + __IOM uint32_t MSTPE7 : 1; /*!< [7..7] Module stop bit 7. See device hardware manual for usage. */ + __IOM uint32_t MSTPE8 : 1; /*!< [8..8] Module stop bit 8. See device hardware manual for usage. */ + __IOM uint32_t MSTPE9 : 1; /*!< [9..9] Module stop bit 9. See device hardware manual for usage. */ + __IOM uint32_t MSTPE10 : 1; /*!< [10..10] Module stop bit 10. See device hardware manual for + * usage. */ + __IOM uint32_t MSTPE11 : 1; /*!< [11..11] Module stop bit 11. See device hardware manual for + * usage. */ + __IOM uint32_t MSTPE12 : 1; /*!< [12..12] Module stop bit 12. See device hardware manual for + * usage. */ + __IOM uint32_t MSTPE13 : 1; /*!< [13..13] Module stop bit 13. See device hardware manual for + * usage. */ + __IOM uint32_t MSTPE14 : 1; /*!< [14..14] Module stop bit 14. See device hardware manual for + * usage. */ + __IOM uint32_t MSTPE15 : 1; /*!< [15..15] Module stop bit 15. See device hardware manual for + * usage. */ + __IOM uint32_t MSTPE16 : 1; /*!< [16..16] Module stop bit 16. See device hardware manual for + * usage. */ + __IOM uint32_t MSTPE17 : 1; /*!< [17..17] Module stop bit 17. See device hardware manual for + * usage. */ + __IOM uint32_t MSTPE18 : 1; /*!< [18..18] Module stop bit 18. See device hardware manual for + * usage. */ + __IOM uint32_t MSTPE19 : 1; /*!< [19..19] Module stop bit 19. See device hardware manual for + * usage. */ + __IOM uint32_t MSTPE20 : 1; /*!< [20..20] Module stop bit 20. See device hardware manual for + * usage. */ + __IOM uint32_t MSTPE21 : 1; /*!< [21..21] Module stop bit 21. See device hardware manual for + * usage. */ + __IOM uint32_t MSTPE22 : 1; /*!< [22..22] Module stop bit 22. See device hardware manual for + * usage. */ + __IOM uint32_t MSTPE23 : 1; /*!< [23..23] Module stop bit 23. See device hardware manual for + * usage. */ + __IOM uint32_t MSTPE24 : 1; /*!< [24..24] Module stop bit 24. See device hardware manual for + * usage. */ + __IOM uint32_t MSTPE25 : 1; /*!< [25..25] Module stop bit 25. See device hardware manual for + * usage. */ + __IOM uint32_t MSTPE26 : 1; /*!< [26..26] Module stop bit 26. See device hardware manual for + * usage. */ + __IOM uint32_t MSTPE27 : 1; /*!< [27..27] Module stop bit 27. See device hardware manual for + * usage. */ + __IOM uint32_t MSTPE28 : 1; /*!< [28..28] Module stop bit 28. See device hardware manual for + * usage. */ + __IOM uint32_t MSTPE29 : 1; /*!< [29..29] Module stop bit 29. See device hardware manual for + * usage. */ + __IOM uint32_t MSTPE30 : 1; /*!< [30..30] Module stop bit 30. See device hardware manual for + * usage. */ + __IOM uint32_t MSTPE31 : 1; /*!< [31..31] Module stop bit 31. See device hardware manual for + * usage. */ + } MSTPCRE_b; + }; + + union { - __IOM uint32_t MSTPE0 : 1; /*!< [0..0] Module stop bit 0. See device hardware manual for usage. */ - __IOM uint32_t MSTPE1 : 1; /*!< [1..1] Module stop bit 1. See device hardware manual for usage. */ - __IOM uint32_t MSTPE2 : 1; /*!< [2..2] Module stop bit 2. See device hardware manual for usage. */ - __IOM uint32_t MSTPE3 : 1; /*!< [3..3] Module stop bit 3. See device hardware manual for usage. */ - __IOM uint32_t MSTPE4 : 1; /*!< [4..4] Module stop bit 4. See device hardware manual for usage. */ - __IOM uint32_t MSTPE5 : 1; /*!< [5..5] Module stop bit 5. See device hardware manual for usage. */ - __IOM uint32_t MSTPE6 : 1; /*!< [6..6] Module stop bit 6. See device hardware manual for usage. */ - __IOM uint32_t MSTPE7 : 1; /*!< [7..7] Module stop bit 7. See device hardware manual for usage. */ - __IOM uint32_t MSTPE8 : 1; /*!< [8..8] Module stop bit 8. See device hardware manual for usage. */ - __IOM uint32_t MSTPE9 : 1; /*!< [9..9] Module stop bit 9. See device hardware manual for usage. */ - __IOM uint32_t MSTPE10 : 1; /*!< [10..10] Module stop bit 10. See device hardware manual for - * usage. */ - __IOM uint32_t MSTPE11 : 1; /*!< [11..11] Module stop bit 11. See device hardware manual for - * usage. */ - __IOM uint32_t MSTPE12 : 1; /*!< [12..12] Module stop bit 12. See device hardware manual for - * usage. */ - __IOM uint32_t MSTPE13 : 1; /*!< [13..13] Module stop bit 13. See device hardware manual for - * usage. */ - __IOM uint32_t MSTPE14 : 1; /*!< [14..14] Module stop bit 14. See device hardware manual for - * usage. */ - __IOM uint32_t MSTPE15 : 1; /*!< [15..15] Module stop bit 15. See device hardware manual for - * usage. */ - __IOM uint32_t MSTPE16 : 1; /*!< [16..16] Module stop bit 16. See device hardware manual for - * usage. */ - __IOM uint32_t MSTPE17 : 1; /*!< [17..17] Module stop bit 17. See device hardware manual for - * usage. */ - __IOM uint32_t MSTPE18 : 1; /*!< [18..18] Module stop bit 18. See device hardware manual for - * usage. */ - __IOM uint32_t MSTPE19 : 1; /*!< [19..19] Module stop bit 19. See device hardware manual for - * usage. */ - __IOM uint32_t MSTPE20 : 1; /*!< [20..20] Module stop bit 20. See device hardware manual for - * usage. */ - __IOM uint32_t MSTPE21 : 1; /*!< [21..21] Module stop bit 21. See device hardware manual for - * usage. */ - __IOM uint32_t MSTPE22 : 1; /*!< [22..22] Module stop bit 22. See device hardware manual for - * usage. */ - __IOM uint32_t MSTPE23 : 1; /*!< [23..23] Module stop bit 23. See device hardware manual for - * usage. */ - __IOM uint32_t MSTPE24 : 1; /*!< [24..24] Module stop bit 24. See device hardware manual for - * usage. */ - __IOM uint32_t MSTPE25 : 1; /*!< [25..25] Module stop bit 25. See device hardware manual for - * usage. */ - __IOM uint32_t MSTPE26 : 1; /*!< [26..26] Module stop bit 26. See device hardware manual for - * usage. */ - __IOM uint32_t MSTPE27 : 1; /*!< [27..27] Module stop bit 27. See device hardware manual for - * usage. */ - __IOM uint32_t MSTPE28 : 1; /*!< [28..28] Module stop bit 28. See device hardware manual for - * usage. */ - __IOM uint32_t MSTPE29 : 1; /*!< [29..29] Module stop bit 29. See device hardware manual for - * usage. */ - __IOM uint32_t MSTPE30 : 1; /*!< [30..30] Module stop bit 30. See device hardware manual for - * usage. */ - __IOM uint32_t MSTPE31 : 1; /*!< [31..31] Module stop bit 31. See device hardware manual for - * usage. */ - } MSTPCRE_b; + __IOM uint16_t LSMRWDIS; /*!< (@ 0x00000010) Low Speed Module R/W Disable Control Register */ + + struct + { + __IOM uint16_t RTCRWDIS : 1; /*!< [0..0] RTC Register R/W Enable Control */ + __IOM uint16_t WDTDIS : 1; /*!< [1..1] WDT Operate Clock Control */ + __IOM uint16_t IWDTIDS : 1; /*!< [2..2] IWDT Register Clock Control */ + uint16_t : 4; + __IOM uint16_t WREN : 1; /*!< [7..7] Write Enable for bits [2:0] */ + __OM uint16_t PRKEY : 8; /*!< [15..8] LSMRWDIS Key Code */ + } LSMRWDIS_b; + }; }; -} R_MSTP_Type; /*!< Size = 20 (0x14) */ +} R_MSTP_Type; /*!< Size = 20 (0x14) */ /* =========================================================================================================================== */ /* ================ R_PORT0 ================ */ @@ -9172,11 +9190,23 @@ typedef struct /*!< (@ 0x40080D00) R_PMISC Structure struct { uint8_t : 6; - __IOM uint8_t PFSWE : 1; /*!< [6..6] PmnPFS Register Write */ - __IOM uint8_t B0WI : 1; /*!< [7..7] PFSWE Bit Write Disable */ + __IOM uint8_t PFSWE : 1; /*!< [6..6] PmnPFS Register Write */ + __IOM uint8_t B0WI : 1; /*!< [7..7] PFSWE Bit Write Disable */ } PWPRS_b; }; - __IM uint16_t RESERVED2[5]; + __IM uint16_t RESERVED2[4]; + __IM uint8_t RESERVED3; + + union + { + __IOM uint8_t PRWCNTR; /*!< (@ 0x0000000F) Port Read Wait Control Register */ + + struct + { + __IOM uint8_t WAIT : 2; /*!< [1..0] Wait Cycle Control */ + uint8_t : 6; + } PRWCNTR_b; + }; __IOM R_PMISC_PMSAR_Type PMSAR[12]; /*!< (@ 0x00000010) Port Security Attribution Register */ } R_PMISC_Type; /*!< Size = 40 (0x28) */ @@ -15217,16 +15247,16 @@ typedef struct /*!< (@ 0x407FC000) R_FLAD Structure #define R_CACHE ((R_CACHE_Type *) R_CACHE_BASE) #define R_CPSCU ((R_CPSCU_Type *) R_CPSCU_BASE) #define R_CEC ((R_CEC_Type *) R_CEC_BASE) - #define R_AGTX0 ((R_AGTX0_Type *) R_AGTX0_BASE) - #define R_AGTX1 ((R_AGTX0_Type *) R_AGTX1_BASE) - #define R_AGTX2 ((R_AGTX0_Type *) R_AGTX2_BASE) - #define R_AGTX3 ((R_AGTX0_Type *) R_AGTX3_BASE) - #define R_AGTX4 ((R_AGTX0_Type *) R_AGTX4_BASE) - #define R_AGTX5 ((R_AGTX0_Type *) R_AGTX5_BASE) - #define R_AGTX6 ((R_AGTX0_Type *) R_AGTX6_BASE) - #define R_AGTX7 ((R_AGTX0_Type *) R_AGTX7_BASE) - #define R_AGTX8 ((R_AGTX0_Type *) R_AGTX8_BASE) - #define R_AGTX9 ((R_AGTX0_Type *) R_AGTX9_BASE) + #define R_AGTW0 ((R_AGTX0_Type *) R_AGTX0_BASE) + #define R_AGTW1 ((R_AGTX0_Type *) R_AGTX1_BASE) + #define R_AGTW2 ((R_AGTX0_Type *) R_AGTX2_BASE) + #define R_AGTW3 ((R_AGTX0_Type *) R_AGTX3_BASE) + #define R_AGTW4 ((R_AGTX0_Type *) R_AGTX4_BASE) + #define R_AGTW5 ((R_AGTX0_Type *) R_AGTX5_BASE) + #define R_AGTW6 ((R_AGTX0_Type *) R_AGTX6_BASE) + #define R_AGTW7 ((R_AGTX0_Type *) R_AGTX7_BASE) + #define R_AGTW8 ((R_AGTX0_Type *) R_AGTX8_BASE) + #define R_AGTW9 ((R_AGTX0_Type *) R_AGTX9_BASE) #define R_FLAD ((R_FLAD_Type *) R_FLAD_BASE) /** @} */ /* End of group Device_Peripheral_declaration */ @@ -19365,20 +19395,31 @@ typedef struct /*!< (@ 0x407FC000) R_FLAD Structure /* =========================================================================================================================== */ /* ======================================================== MSTPCRA ======================================================== */ - #define R_MSTP_MSTPCRA_MSTPA_Pos (0UL) /*!< MSTPA (Bit 0) */ - #define R_MSTP_MSTPCRA_MSTPA_Msk (0x1UL) /*!< MSTPA (Bitfield-Mask: 0x01) */ + #define R_MSTP_MSTPCRA_MSTPA_Pos (0UL) /*!< MSTPA (Bit 0) */ + #define R_MSTP_MSTPCRA_MSTPA_Msk (0x1UL) /*!< MSTPA (Bitfield-Mask: 0x01) */ /* ======================================================== MSTPCRB ======================================================== */ - #define R_MSTP_MSTPCRB_MSTPB_Pos (0UL) /*!< MSTPB (Bit 0) */ - #define R_MSTP_MSTPCRB_MSTPB_Msk (0x1UL) /*!< MSTPB (Bitfield-Mask: 0x01) */ + #define R_MSTP_MSTPCRB_MSTPB_Pos (0UL) /*!< MSTPB (Bit 0) */ + #define R_MSTP_MSTPCRB_MSTPB_Msk (0x1UL) /*!< MSTPB (Bitfield-Mask: 0x01) */ /* ======================================================== MSTPCRC ======================================================== */ - #define R_MSTP_MSTPCRC_MSTPC_Pos (0UL) /*!< MSTPC (Bit 0) */ - #define R_MSTP_MSTPCRC_MSTPC_Msk (0x1UL) /*!< MSTPC (Bitfield-Mask: 0x01) */ + #define R_MSTP_MSTPCRC_MSTPC_Pos (0UL) /*!< MSTPC (Bit 0) */ + #define R_MSTP_MSTPCRC_MSTPC_Msk (0x1UL) /*!< MSTPC (Bitfield-Mask: 0x01) */ /* ======================================================== MSTPCRD ======================================================== */ - #define R_MSTP_MSTPCRD_MSTPD_Pos (0UL) /*!< MSTPD (Bit 0) */ - #define R_MSTP_MSTPCRD_MSTPD_Msk (0x1UL) /*!< MSTPD (Bitfield-Mask: 0x01) */ + #define R_MSTP_MSTPCRD_MSTPD_Pos (0UL) /*!< MSTPD (Bit 0) */ + #define R_MSTP_MSTPCRD_MSTPD_Msk (0x1UL) /*!< MSTPD (Bitfield-Mask: 0x01) */ /* ======================================================== MSTPCRE ======================================================== */ - #define R_MSTP_MSTPCRE_MSTPE_Pos (0UL) /*!< MSTPE (Bit 0) */ - #define R_MSTP_MSTPCRE_MSTPE_Msk (0x1UL) /*!< MSTPE (Bitfield-Mask: 0x01) */ + #define R_MSTP_MSTPCRE_MSTPE_Pos (0UL) /*!< MSTPE (Bit 0) */ + #define R_MSTP_MSTPCRE_MSTPE_Msk (0x1UL) /*!< MSTPE (Bitfield-Mask: 0x01) */ +/* ======================================================= LSMRWDIS ======================================================== */ + #define R_MSTP_LSMRWDIS_RTCRWDIS_Pos (0UL) /*!< RTCRWDIS (Bit 0) */ + #define R_MSTP_LSMRWDIS_RTCRWDIS_Msk (0x1UL) /*!< RTCRWDIS (Bitfield-Mask: 0x01) */ + #define R_MSTP_LSMRWDIS_WDTDIS_Pos (1UL) /*!< WDTDIS (Bit 1) */ + #define R_MSTP_LSMRWDIS_WDTDIS_Msk (0x2UL) /*!< WDTDIS (Bitfield-Mask: 0x01) */ + #define R_MSTP_LSMRWDIS_IWDTIDS_Pos (2UL) /*!< IWDTIDS (Bit 2) */ + #define R_MSTP_LSMRWDIS_IWDTIDS_Msk (0x4UL) /*!< IWDTIDS (Bitfield-Mask: 0x01) */ + #define R_MSTP_LSMRWDIS_WREN_Pos (7UL) /*!< WREN (Bit 7) */ + #define R_MSTP_LSMRWDIS_WREN_Msk (0x80UL) /*!< WREN (Bitfield-Mask: 0x01) */ + #define R_MSTP_LSMRWDIS_PRKEY_Pos (8UL) /*!< PRKEY (Bit 8) */ + #define R_MSTP_LSMRWDIS_PRKEY_Msk (0xff00UL) /*!< PRKEY (Bitfield-Mask: 0xff) */ /* =========================================================================================================================== */ /* ================ R_PORT0 ================ */ @@ -19452,6 +19493,9 @@ typedef struct /*!< (@ 0x407FC000) R_FLAD Structure #define R_PMISC_PWPRS_PFSWE_Msk (0x40UL) /*!< PFSWE (Bitfield-Mask: 0x01) */ #define R_PMISC_PWPRS_B0WI_Pos (7UL) /*!< B0WI (Bit 7) */ #define R_PMISC_PWPRS_B0WI_Msk (0x80UL) /*!< B0WI (Bitfield-Mask: 0x01) */ +/* ======================================================== PRWCNTR ======================================================== */ + #define R_PMISC_PRWCNTR_WAIT_Pos (0UL) /*!< WAIT (Bit 0) */ + #define R_PMISC_PRWCNTR_WAIT_Msk (0x3UL) /*!< WAIT (Bitfield-Mask: 0x03) */ /* =========================================================================================================================== */ /* ================ R_RTC ================ */ diff --git a/ra/fsp/src/bsp/cmsis/Device/RENESAS/Include/R7FA4M1AB.h b/ra/fsp/src/bsp/cmsis/Device/RENESAS/Include/R7FA4M1AB.h index 03eb5e79d..5e4ddae59 100644 --- a/ra/fsp/src/bsp/cmsis/Device/RENESAS/Include/R7FA4M1AB.h +++ b/ra/fsp/src/bsp/cmsis/Device/RENESAS/Include/R7FA4M1AB.h @@ -7389,67 +7389,85 @@ typedef struct /*!< (@ 0x40047000) R_MSTP Structure union { - __IOM uint32_t MSTPCRE; /*!< (@ 0x00000010) Module Stop Control Register E */ + union + { + __IOM uint32_t MSTPCRE; /*!< (@ 0x00000010) Module Stop Control Register E */ - struct + struct + { + __IOM uint32_t MSTPE0 : 1; /*!< [0..0] Module stop bit 0. See device hardware manual for usage. */ + __IOM uint32_t MSTPE1 : 1; /*!< [1..1] Module stop bit 1. See device hardware manual for usage. */ + __IOM uint32_t MSTPE2 : 1; /*!< [2..2] Module stop bit 2. See device hardware manual for usage. */ + __IOM uint32_t MSTPE3 : 1; /*!< [3..3] Module stop bit 3. See device hardware manual for usage. */ + __IOM uint32_t MSTPE4 : 1; /*!< [4..4] Module stop bit 4. See device hardware manual for usage. */ + __IOM uint32_t MSTPE5 : 1; /*!< [5..5] Module stop bit 5. See device hardware manual for usage. */ + __IOM uint32_t MSTPE6 : 1; /*!< [6..6] Module stop bit 6. See device hardware manual for usage. */ + __IOM uint32_t MSTPE7 : 1; /*!< [7..7] Module stop bit 7. See device hardware manual for usage. */ + __IOM uint32_t MSTPE8 : 1; /*!< [8..8] Module stop bit 8. See device hardware manual for usage. */ + __IOM uint32_t MSTPE9 : 1; /*!< [9..9] Module stop bit 9. See device hardware manual for usage. */ + __IOM uint32_t MSTPE10 : 1; /*!< [10..10] Module stop bit 10. See device hardware manual for + * usage. */ + __IOM uint32_t MSTPE11 : 1; /*!< [11..11] Module stop bit 11. See device hardware manual for + * usage. */ + __IOM uint32_t MSTPE12 : 1; /*!< [12..12] Module stop bit 12. See device hardware manual for + * usage. */ + __IOM uint32_t MSTPE13 : 1; /*!< [13..13] Module stop bit 13. See device hardware manual for + * usage. */ + __IOM uint32_t MSTPE14 : 1; /*!< [14..14] Module stop bit 14. See device hardware manual for + * usage. */ + __IOM uint32_t MSTPE15 : 1; /*!< [15..15] Module stop bit 15. See device hardware manual for + * usage. */ + __IOM uint32_t MSTPE16 : 1; /*!< [16..16] Module stop bit 16. See device hardware manual for + * usage. */ + __IOM uint32_t MSTPE17 : 1; /*!< [17..17] Module stop bit 17. See device hardware manual for + * usage. */ + __IOM uint32_t MSTPE18 : 1; /*!< [18..18] Module stop bit 18. See device hardware manual for + * usage. */ + __IOM uint32_t MSTPE19 : 1; /*!< [19..19] Module stop bit 19. See device hardware manual for + * usage. */ + __IOM uint32_t MSTPE20 : 1; /*!< [20..20] Module stop bit 20. See device hardware manual for + * usage. */ + __IOM uint32_t MSTPE21 : 1; /*!< [21..21] Module stop bit 21. See device hardware manual for + * usage. */ + __IOM uint32_t MSTPE22 : 1; /*!< [22..22] Module stop bit 22. See device hardware manual for + * usage. */ + __IOM uint32_t MSTPE23 : 1; /*!< [23..23] Module stop bit 23. See device hardware manual for + * usage. */ + __IOM uint32_t MSTPE24 : 1; /*!< [24..24] Module stop bit 24. See device hardware manual for + * usage. */ + __IOM uint32_t MSTPE25 : 1; /*!< [25..25] Module stop bit 25. See device hardware manual for + * usage. */ + __IOM uint32_t MSTPE26 : 1; /*!< [26..26] Module stop bit 26. See device hardware manual for + * usage. */ + __IOM uint32_t MSTPE27 : 1; /*!< [27..27] Module stop bit 27. See device hardware manual for + * usage. */ + __IOM uint32_t MSTPE28 : 1; /*!< [28..28] Module stop bit 28. See device hardware manual for + * usage. */ + __IOM uint32_t MSTPE29 : 1; /*!< [29..29] Module stop bit 29. See device hardware manual for + * usage. */ + __IOM uint32_t MSTPE30 : 1; /*!< [30..30] Module stop bit 30. See device hardware manual for + * usage. */ + __IOM uint32_t MSTPE31 : 1; /*!< [31..31] Module stop bit 31. See device hardware manual for + * usage. */ + } MSTPCRE_b; + }; + + union { - __IOM uint32_t MSTPE0 : 1; /*!< [0..0] Module stop bit 0. See device hardware manual for usage. */ - __IOM uint32_t MSTPE1 : 1; /*!< [1..1] Module stop bit 1. See device hardware manual for usage. */ - __IOM uint32_t MSTPE2 : 1; /*!< [2..2] Module stop bit 2. See device hardware manual for usage. */ - __IOM uint32_t MSTPE3 : 1; /*!< [3..3] Module stop bit 3. See device hardware manual for usage. */ - __IOM uint32_t MSTPE4 : 1; /*!< [4..4] Module stop bit 4. See device hardware manual for usage. */ - __IOM uint32_t MSTPE5 : 1; /*!< [5..5] Module stop bit 5. See device hardware manual for usage. */ - __IOM uint32_t MSTPE6 : 1; /*!< [6..6] Module stop bit 6. See device hardware manual for usage. */ - __IOM uint32_t MSTPE7 : 1; /*!< [7..7] Module stop bit 7. See device hardware manual for usage. */ - __IOM uint32_t MSTPE8 : 1; /*!< [8..8] Module stop bit 8. See device hardware manual for usage. */ - __IOM uint32_t MSTPE9 : 1; /*!< [9..9] Module stop bit 9. See device hardware manual for usage. */ - __IOM uint32_t MSTPE10 : 1; /*!< [10..10] Module stop bit 10. See device hardware manual for - * usage. */ - __IOM uint32_t MSTPE11 : 1; /*!< [11..11] Module stop bit 11. See device hardware manual for - * usage. */ - __IOM uint32_t MSTPE12 : 1; /*!< [12..12] Module stop bit 12. See device hardware manual for - * usage. */ - __IOM uint32_t MSTPE13 : 1; /*!< [13..13] Module stop bit 13. See device hardware manual for - * usage. */ - __IOM uint32_t MSTPE14 : 1; /*!< [14..14] Module stop bit 14. See device hardware manual for - * usage. */ - __IOM uint32_t MSTPE15 : 1; /*!< [15..15] Module stop bit 15. See device hardware manual for - * usage. */ - __IOM uint32_t MSTPE16 : 1; /*!< [16..16] Module stop bit 16. See device hardware manual for - * usage. */ - __IOM uint32_t MSTPE17 : 1; /*!< [17..17] Module stop bit 17. See device hardware manual for - * usage. */ - __IOM uint32_t MSTPE18 : 1; /*!< [18..18] Module stop bit 18. See device hardware manual for - * usage. */ - __IOM uint32_t MSTPE19 : 1; /*!< [19..19] Module stop bit 19. See device hardware manual for - * usage. */ - __IOM uint32_t MSTPE20 : 1; /*!< [20..20] Module stop bit 20. See device hardware manual for - * usage. */ - __IOM uint32_t MSTPE21 : 1; /*!< [21..21] Module stop bit 21. See device hardware manual for - * usage. */ - __IOM uint32_t MSTPE22 : 1; /*!< [22..22] Module stop bit 22. See device hardware manual for - * usage. */ - __IOM uint32_t MSTPE23 : 1; /*!< [23..23] Module stop bit 23. See device hardware manual for - * usage. */ - __IOM uint32_t MSTPE24 : 1; /*!< [24..24] Module stop bit 24. See device hardware manual for - * usage. */ - __IOM uint32_t MSTPE25 : 1; /*!< [25..25] Module stop bit 25. See device hardware manual for - * usage. */ - __IOM uint32_t MSTPE26 : 1; /*!< [26..26] Module stop bit 26. See device hardware manual for - * usage. */ - __IOM uint32_t MSTPE27 : 1; /*!< [27..27] Module stop bit 27. See device hardware manual for - * usage. */ - __IOM uint32_t MSTPE28 : 1; /*!< [28..28] Module stop bit 28. See device hardware manual for - * usage. */ - __IOM uint32_t MSTPE29 : 1; /*!< [29..29] Module stop bit 29. See device hardware manual for - * usage. */ - __IOM uint32_t MSTPE30 : 1; /*!< [30..30] Module stop bit 30. See device hardware manual for - * usage. */ - __IOM uint32_t MSTPE31 : 1; /*!< [31..31] Module stop bit 31. See device hardware manual for - * usage. */ - } MSTPCRE_b; + __IOM uint16_t LSMRWDIS; /*!< (@ 0x00000010) Low Speed Module R/W Disable Control Register */ + + struct + { + __IOM uint16_t RTCRWDIS : 1; /*!< [0..0] RTC Register R/W Enable Control */ + __IOM uint16_t WDTDIS : 1; /*!< [1..1] WDT Operate Clock Control */ + __IOM uint16_t IWDTIDS : 1; /*!< [2..2] IWDT Register Clock Control */ + uint16_t : 4; + __IOM uint16_t WREN : 1; /*!< [7..7] Write Enable for bits [2:0] */ + __OM uint16_t PRKEY : 8; /*!< [15..8] LSMRWDIS Key Code */ + } LSMRWDIS_b; + }; }; -} R_MSTP_Type; /*!< Size = 20 (0x14) */ +} R_MSTP_Type; /*!< Size = 20 (0x14) */ /* =========================================================================================================================== */ /* ================ R_OPAMP ================ */ @@ -7911,11 +7929,23 @@ typedef struct /*!< (@ 0x40040D00) R_PMISC Structure struct { uint8_t : 6; - __IOM uint8_t PFSWE : 1; /*!< [6..6] PmnPFS Register Write */ - __IOM uint8_t B0WI : 1; /*!< [7..7] PFSWE Bit Write Disable */ + __IOM uint8_t PFSWE : 1; /*!< [6..6] PmnPFS Register Write */ + __IOM uint8_t B0WI : 1; /*!< [7..7] PFSWE Bit Write Disable */ } PWPRS_b; }; - __IM uint16_t RESERVED2[5]; + __IM uint16_t RESERVED2[4]; + __IM uint8_t RESERVED3; + + union + { + __IOM uint8_t PRWCNTR; /*!< (@ 0x0000000F) Port Read Wait Control Register */ + + struct + { + __IOM uint8_t WAIT : 2; /*!< [1..0] Wait Cycle Control */ + uint8_t : 6; + } PRWCNTR_b; + }; __IOM R_PMISC_PMSAR_Type PMSAR[12]; /*!< (@ 0x00000010) Port Security Attribution Register */ } R_PMISC_Type; /*!< Size = 40 (0x28) */ @@ -11743,29 +11773,37 @@ typedef struct /*!< (@ 0x4001E000) R_SYSTEM Structure typedef struct /*!< (@ 0x407EC000) R_TSN Structure */ { - __IM uint8_t RESERVED[552]; + __IM uint16_t RESERVED[276]; union { - __IM uint8_t TSCDRL; /*!< (@ 0x00000228) Temperature Sensor Calibration Data Register - * L */ + __IM uint16_t TSCDR; /*!< (@ 0x00000228) Temperature Sensor Calibration Data Register */ struct { - __IM uint8_t TSCDRL : 8; /*!< [7..0] The calibration data stores the lower 8 bits of the convertedvalue. */ - } TSCDRL_b; - }; + union + { + __IM uint8_t TSCDRL; /*!< (@ 0x00000228) Temperature Sensor Calibration Data Register + * L */ - union - { - __IM uint8_t TSCDRH; /*!< (@ 0x00000229) Temperature Sensor Calibration Data Register - * H */ + struct + { + __IM uint8_t TSCDRL : 8; /*!< [7..0] The calibration data stores the lower 8 bits of the convertedvalue. */ + } TSCDRL_b; + }; - struct - { - __IM uint8_t TSCDRH : 8; /*!< [7..0] The calibration data stores the higher 8 bits of the - * convertedvalue. */ - } TSCDRH_b; + union + { + __IM uint8_t TSCDRH; /*!< (@ 0x00000229) Temperature Sensor Calibration Data Register + * H */ + + struct + { + __IM uint8_t TSCDRH : 8; /*!< [7..0] The calibration data stores the higher 8 bits of the + * convertedvalue. */ + } TSCDRH_b; + }; + }; }; } R_TSN_Type; /*!< Size = 554 (0x22a) */ @@ -13150,16 +13188,16 @@ typedef struct /*!< (@ 0x40084000) R_AGTX0 Structure #define R_TSN ((R_TSN_Type *) R_TSN_BASE) #define R_USB_FS0 ((R_USB_FS0_Type *) R_USB_FS0_BASE) #define R_WDT ((R_WDT_Type *) R_WDT_BASE) - #define R_AGTX0 ((R_AGTX0_Type *) R_AGTX0_BASE) - #define R_AGTX1 ((R_AGTX0_Type *) R_AGTX1_BASE) - #define R_AGTX2 ((R_AGTX0_Type *) R_AGTX2_BASE) - #define R_AGTX3 ((R_AGTX0_Type *) R_AGTX3_BASE) - #define R_AGTX4 ((R_AGTX0_Type *) R_AGTX4_BASE) - #define R_AGTX5 ((R_AGTX0_Type *) R_AGTX5_BASE) - #define R_AGTX6 ((R_AGTX0_Type *) R_AGTX6_BASE) - #define R_AGTX7 ((R_AGTX0_Type *) R_AGTX7_BASE) - #define R_AGTX8 ((R_AGTX0_Type *) R_AGTX8_BASE) - #define R_AGTX9 ((R_AGTX0_Type *) R_AGTX9_BASE) + #define R_AGT0 ((R_AGTX0_Type *) R_AGTX0_BASE) + #define R_AGT1 ((R_AGTX0_Type *) R_AGTX1_BASE) + #define R_AGT2 ((R_AGTX0_Type *) R_AGTX2_BASE) + #define R_AGT3 ((R_AGTX0_Type *) R_AGTX3_BASE) + #define R_AGT4 ((R_AGTX0_Type *) R_AGTX4_BASE) + #define R_AGT5 ((R_AGTX0_Type *) R_AGTX5_BASE) + #define R_AGT6 ((R_AGTX0_Type *) R_AGTX6_BASE) + #define R_AGT7 ((R_AGTX0_Type *) R_AGTX7_BASE) + #define R_AGT8 ((R_AGTX0_Type *) R_AGTX8_BASE) + #define R_AGT9 ((R_AGTX0_Type *) R_AGTX9_BASE) /** @} */ /* End of group Device_Peripheral_declaration */ @@ -16569,20 +16607,31 @@ typedef struct /*!< (@ 0x40084000) R_AGTX0 Structure /* =========================================================================================================================== */ /* ======================================================== MSTPCRA ======================================================== */ - #define R_MSTP_MSTPCRA_MSTPA_Pos (0UL) /*!< MSTPA (Bit 0) */ - #define R_MSTP_MSTPCRA_MSTPA_Msk (0x1UL) /*!< MSTPA (Bitfield-Mask: 0x01) */ + #define R_MSTP_MSTPCRA_MSTPA_Pos (0UL) /*!< MSTPA (Bit 0) */ + #define R_MSTP_MSTPCRA_MSTPA_Msk (0x1UL) /*!< MSTPA (Bitfield-Mask: 0x01) */ /* ======================================================== MSTPCRB ======================================================== */ - #define R_MSTP_MSTPCRB_MSTPB_Pos (0UL) /*!< MSTPB (Bit 0) */ - #define R_MSTP_MSTPCRB_MSTPB_Msk (0x1UL) /*!< MSTPB (Bitfield-Mask: 0x01) */ + #define R_MSTP_MSTPCRB_MSTPB_Pos (0UL) /*!< MSTPB (Bit 0) */ + #define R_MSTP_MSTPCRB_MSTPB_Msk (0x1UL) /*!< MSTPB (Bitfield-Mask: 0x01) */ /* ======================================================== MSTPCRC ======================================================== */ - #define R_MSTP_MSTPCRC_MSTPC_Pos (0UL) /*!< MSTPC (Bit 0) */ - #define R_MSTP_MSTPCRC_MSTPC_Msk (0x1UL) /*!< MSTPC (Bitfield-Mask: 0x01) */ + #define R_MSTP_MSTPCRC_MSTPC_Pos (0UL) /*!< MSTPC (Bit 0) */ + #define R_MSTP_MSTPCRC_MSTPC_Msk (0x1UL) /*!< MSTPC (Bitfield-Mask: 0x01) */ /* ======================================================== MSTPCRD ======================================================== */ - #define R_MSTP_MSTPCRD_MSTPD_Pos (0UL) /*!< MSTPD (Bit 0) */ - #define R_MSTP_MSTPCRD_MSTPD_Msk (0x1UL) /*!< MSTPD (Bitfield-Mask: 0x01) */ + #define R_MSTP_MSTPCRD_MSTPD_Pos (0UL) /*!< MSTPD (Bit 0) */ + #define R_MSTP_MSTPCRD_MSTPD_Msk (0x1UL) /*!< MSTPD (Bitfield-Mask: 0x01) */ /* ======================================================== MSTPCRE ======================================================== */ - #define R_MSTP_MSTPCRE_MSTPE_Pos (0UL) /*!< MSTPE (Bit 0) */ - #define R_MSTP_MSTPCRE_MSTPE_Msk (0x1UL) /*!< MSTPE (Bitfield-Mask: 0x01) */ + #define R_MSTP_MSTPCRE_MSTPE_Pos (0UL) /*!< MSTPE (Bit 0) */ + #define R_MSTP_MSTPCRE_MSTPE_Msk (0x1UL) /*!< MSTPE (Bitfield-Mask: 0x01) */ +/* ======================================================= LSMRWDIS ======================================================== */ + #define R_MSTP_LSMRWDIS_RTCRWDIS_Pos (0UL) /*!< RTCRWDIS (Bit 0) */ + #define R_MSTP_LSMRWDIS_RTCRWDIS_Msk (0x1UL) /*!< RTCRWDIS (Bitfield-Mask: 0x01) */ + #define R_MSTP_LSMRWDIS_WDTDIS_Pos (1UL) /*!< WDTDIS (Bit 1) */ + #define R_MSTP_LSMRWDIS_WDTDIS_Msk (0x2UL) /*!< WDTDIS (Bitfield-Mask: 0x01) */ + #define R_MSTP_LSMRWDIS_IWDTIDS_Pos (2UL) /*!< IWDTIDS (Bit 2) */ + #define R_MSTP_LSMRWDIS_IWDTIDS_Msk (0x4UL) /*!< IWDTIDS (Bitfield-Mask: 0x01) */ + #define R_MSTP_LSMRWDIS_WREN_Pos (7UL) /*!< WREN (Bit 7) */ + #define R_MSTP_LSMRWDIS_WREN_Msk (0x80UL) /*!< WREN (Bitfield-Mask: 0x01) */ + #define R_MSTP_LSMRWDIS_PRKEY_Pos (8UL) /*!< PRKEY (Bit 8) */ + #define R_MSTP_LSMRWDIS_PRKEY_Msk (0xff00UL) /*!< PRKEY (Bitfield-Mask: 0xff) */ /* =========================================================================================================================== */ /* ================ R_OPAMP ================ */ @@ -16686,6 +16735,9 @@ typedef struct /*!< (@ 0x40084000) R_AGTX0 Structure #define R_PMISC_PWPRS_PFSWE_Msk (0x40UL) /*!< PFSWE (Bitfield-Mask: 0x01) */ #define R_PMISC_PWPRS_B0WI_Pos (7UL) /*!< B0WI (Bit 7) */ #define R_PMISC_PWPRS_B0WI_Msk (0x80UL) /*!< B0WI (Bitfield-Mask: 0x01) */ +/* ======================================================== PRWCNTR ======================================================== */ + #define R_PMISC_PRWCNTR_WAIT_Pos (0UL) /*!< WAIT (Bit 0) */ + #define R_PMISC_PRWCNTR_WAIT_Msk (0x3UL) /*!< WAIT (Bitfield-Mask: 0x03) */ /* =========================================================================================================================== */ /* ================ R_RTC ================ */ @@ -18474,6 +18526,7 @@ typedef struct /*!< (@ 0x40084000) R_AGTX0 Structure /* ================ R_TSN ================ */ /* =========================================================================================================================== */ +/* ========================================================= TSCDR ========================================================= */ /* ======================================================== TSCDRH ========================================================= */ #define R_TSN_TSCDRH_TSCDRH_Pos (0UL) /*!< TSCDRH (Bit 0) */ #define R_TSN_TSCDRH_TSCDRH_Msk (0xffUL) /*!< TSCDRH (Bitfield-Mask: 0xff) */ diff --git a/ra/fsp/src/bsp/cmsis/Device/RENESAS/Include/R7FA4M2AD.h b/ra/fsp/src/bsp/cmsis/Device/RENESAS/Include/R7FA4M2AD.h index 4fb1222e9..3398c90f9 100644 --- a/ra/fsp/src/bsp/cmsis/Device/RENESAS/Include/R7FA4M2AD.h +++ b/ra/fsp/src/bsp/cmsis/Device/RENESAS/Include/R7FA4M2AD.h @@ -7436,67 +7436,85 @@ typedef struct /*!< (@ 0x40084000) R_MSTP Structure union { - __IOM uint32_t MSTPCRE; /*!< (@ 0x00000010) Module Stop Control Register E */ + union + { + __IOM uint32_t MSTPCRE; /*!< (@ 0x00000010) Module Stop Control Register E */ - struct + struct + { + __IOM uint32_t MSTPE0 : 1; /*!< [0..0] Module stop bit 0. See device hardware manual for usage. */ + __IOM uint32_t MSTPE1 : 1; /*!< [1..1] Module stop bit 1. See device hardware manual for usage. */ + __IOM uint32_t MSTPE2 : 1; /*!< [2..2] Module stop bit 2. See device hardware manual for usage. */ + __IOM uint32_t MSTPE3 : 1; /*!< [3..3] Module stop bit 3. See device hardware manual for usage. */ + __IOM uint32_t MSTPE4 : 1; /*!< [4..4] Module stop bit 4. See device hardware manual for usage. */ + __IOM uint32_t MSTPE5 : 1; /*!< [5..5] Module stop bit 5. See device hardware manual for usage. */ + __IOM uint32_t MSTPE6 : 1; /*!< [6..6] Module stop bit 6. See device hardware manual for usage. */ + __IOM uint32_t MSTPE7 : 1; /*!< [7..7] Module stop bit 7. See device hardware manual for usage. */ + __IOM uint32_t MSTPE8 : 1; /*!< [8..8] Module stop bit 8. See device hardware manual for usage. */ + __IOM uint32_t MSTPE9 : 1; /*!< [9..9] Module stop bit 9. See device hardware manual for usage. */ + __IOM uint32_t MSTPE10 : 1; /*!< [10..10] Module stop bit 10. See device hardware manual for + * usage. */ + __IOM uint32_t MSTPE11 : 1; /*!< [11..11] Module stop bit 11. See device hardware manual for + * usage. */ + __IOM uint32_t MSTPE12 : 1; /*!< [12..12] Module stop bit 12. See device hardware manual for + * usage. */ + __IOM uint32_t MSTPE13 : 1; /*!< [13..13] Module stop bit 13. See device hardware manual for + * usage. */ + __IOM uint32_t MSTPE14 : 1; /*!< [14..14] Module stop bit 14. See device hardware manual for + * usage. */ + __IOM uint32_t MSTPE15 : 1; /*!< [15..15] Module stop bit 15. See device hardware manual for + * usage. */ + __IOM uint32_t MSTPE16 : 1; /*!< [16..16] Module stop bit 16. See device hardware manual for + * usage. */ + __IOM uint32_t MSTPE17 : 1; /*!< [17..17] Module stop bit 17. See device hardware manual for + * usage. */ + __IOM uint32_t MSTPE18 : 1; /*!< [18..18] Module stop bit 18. See device hardware manual for + * usage. */ + __IOM uint32_t MSTPE19 : 1; /*!< [19..19] Module stop bit 19. See device hardware manual for + * usage. */ + __IOM uint32_t MSTPE20 : 1; /*!< [20..20] Module stop bit 20. See device hardware manual for + * usage. */ + __IOM uint32_t MSTPE21 : 1; /*!< [21..21] Module stop bit 21. See device hardware manual for + * usage. */ + __IOM uint32_t MSTPE22 : 1; /*!< [22..22] Module stop bit 22. See device hardware manual for + * usage. */ + __IOM uint32_t MSTPE23 : 1; /*!< [23..23] Module stop bit 23. See device hardware manual for + * usage. */ + __IOM uint32_t MSTPE24 : 1; /*!< [24..24] Module stop bit 24. See device hardware manual for + * usage. */ + __IOM uint32_t MSTPE25 : 1; /*!< [25..25] Module stop bit 25. See device hardware manual for + * usage. */ + __IOM uint32_t MSTPE26 : 1; /*!< [26..26] Module stop bit 26. See device hardware manual for + * usage. */ + __IOM uint32_t MSTPE27 : 1; /*!< [27..27] Module stop bit 27. See device hardware manual for + * usage. */ + __IOM uint32_t MSTPE28 : 1; /*!< [28..28] Module stop bit 28. See device hardware manual for + * usage. */ + __IOM uint32_t MSTPE29 : 1; /*!< [29..29] Module stop bit 29. See device hardware manual for + * usage. */ + __IOM uint32_t MSTPE30 : 1; /*!< [30..30] Module stop bit 30. See device hardware manual for + * usage. */ + __IOM uint32_t MSTPE31 : 1; /*!< [31..31] Module stop bit 31. See device hardware manual for + * usage. */ + } MSTPCRE_b; + }; + + union { - __IOM uint32_t MSTPE0 : 1; /*!< [0..0] Module stop bit 0. See device hardware manual for usage. */ - __IOM uint32_t MSTPE1 : 1; /*!< [1..1] Module stop bit 1. See device hardware manual for usage. */ - __IOM uint32_t MSTPE2 : 1; /*!< [2..2] Module stop bit 2. See device hardware manual for usage. */ - __IOM uint32_t MSTPE3 : 1; /*!< [3..3] Module stop bit 3. See device hardware manual for usage. */ - __IOM uint32_t MSTPE4 : 1; /*!< [4..4] Module stop bit 4. See device hardware manual for usage. */ - __IOM uint32_t MSTPE5 : 1; /*!< [5..5] Module stop bit 5. See device hardware manual for usage. */ - __IOM uint32_t MSTPE6 : 1; /*!< [6..6] Module stop bit 6. See device hardware manual for usage. */ - __IOM uint32_t MSTPE7 : 1; /*!< [7..7] Module stop bit 7. See device hardware manual for usage. */ - __IOM uint32_t MSTPE8 : 1; /*!< [8..8] Module stop bit 8. See device hardware manual for usage. */ - __IOM uint32_t MSTPE9 : 1; /*!< [9..9] Module stop bit 9. See device hardware manual for usage. */ - __IOM uint32_t MSTPE10 : 1; /*!< [10..10] Module stop bit 10. See device hardware manual for - * usage. */ - __IOM uint32_t MSTPE11 : 1; /*!< [11..11] Module stop bit 11. See device hardware manual for - * usage. */ - __IOM uint32_t MSTPE12 : 1; /*!< [12..12] Module stop bit 12. See device hardware manual for - * usage. */ - __IOM uint32_t MSTPE13 : 1; /*!< [13..13] Module stop bit 13. See device hardware manual for - * usage. */ - __IOM uint32_t MSTPE14 : 1; /*!< [14..14] Module stop bit 14. See device hardware manual for - * usage. */ - __IOM uint32_t MSTPE15 : 1; /*!< [15..15] Module stop bit 15. See device hardware manual for - * usage. */ - __IOM uint32_t MSTPE16 : 1; /*!< [16..16] Module stop bit 16. See device hardware manual for - * usage. */ - __IOM uint32_t MSTPE17 : 1; /*!< [17..17] Module stop bit 17. See device hardware manual for - * usage. */ - __IOM uint32_t MSTPE18 : 1; /*!< [18..18] Module stop bit 18. See device hardware manual for - * usage. */ - __IOM uint32_t MSTPE19 : 1; /*!< [19..19] Module stop bit 19. See device hardware manual for - * usage. */ - __IOM uint32_t MSTPE20 : 1; /*!< [20..20] Module stop bit 20. See device hardware manual for - * usage. */ - __IOM uint32_t MSTPE21 : 1; /*!< [21..21] Module stop bit 21. See device hardware manual for - * usage. */ - __IOM uint32_t MSTPE22 : 1; /*!< [22..22] Module stop bit 22. See device hardware manual for - * usage. */ - __IOM uint32_t MSTPE23 : 1; /*!< [23..23] Module stop bit 23. See device hardware manual for - * usage. */ - __IOM uint32_t MSTPE24 : 1; /*!< [24..24] Module stop bit 24. See device hardware manual for - * usage. */ - __IOM uint32_t MSTPE25 : 1; /*!< [25..25] Module stop bit 25. See device hardware manual for - * usage. */ - __IOM uint32_t MSTPE26 : 1; /*!< [26..26] Module stop bit 26. See device hardware manual for - * usage. */ - __IOM uint32_t MSTPE27 : 1; /*!< [27..27] Module stop bit 27. See device hardware manual for - * usage. */ - __IOM uint32_t MSTPE28 : 1; /*!< [28..28] Module stop bit 28. See device hardware manual for - * usage. */ - __IOM uint32_t MSTPE29 : 1; /*!< [29..29] Module stop bit 29. See device hardware manual for - * usage. */ - __IOM uint32_t MSTPE30 : 1; /*!< [30..30] Module stop bit 30. See device hardware manual for - * usage. */ - __IOM uint32_t MSTPE31 : 1; /*!< [31..31] Module stop bit 31. See device hardware manual for - * usage. */ - } MSTPCRE_b; + __IOM uint16_t LSMRWDIS; /*!< (@ 0x00000010) Low Speed Module R/W Disable Control Register */ + + struct + { + __IOM uint16_t RTCRWDIS : 1; /*!< [0..0] RTC Register R/W Enable Control */ + __IOM uint16_t WDTDIS : 1; /*!< [1..1] WDT Operate Clock Control */ + __IOM uint16_t IWDTIDS : 1; /*!< [2..2] IWDT Register Clock Control */ + uint16_t : 4; + __IOM uint16_t WREN : 1; /*!< [7..7] Write Enable for bits [2:0] */ + __OM uint16_t PRKEY : 8; /*!< [15..8] LSMRWDIS Key Code */ + } LSMRWDIS_b; + }; }; -} R_MSTP_Type; /*!< Size = 20 (0x14) */ +} R_MSTP_Type; /*!< Size = 20 (0x14) */ /* =========================================================================================================================== */ /* ================ R_PORT0 ================ */ @@ -7838,11 +7856,23 @@ typedef struct /*!< (@ 0x40080D00) R_PMISC Structure struct { uint8_t : 6; - __IOM uint8_t PFSWE : 1; /*!< [6..6] PmnPFS Register Write */ - __IOM uint8_t B0WI : 1; /*!< [7..7] PFSWE Bit Write Disable */ + __IOM uint8_t PFSWE : 1; /*!< [6..6] PmnPFS Register Write */ + __IOM uint8_t B0WI : 1; /*!< [7..7] PFSWE Bit Write Disable */ } PWPRS_b; }; - __IM uint16_t RESERVED2[5]; + __IM uint16_t RESERVED2[4]; + __IM uint8_t RESERVED3; + + union + { + __IOM uint8_t PRWCNTR; /*!< (@ 0x0000000F) Port Read Wait Control Register */ + + struct + { + __IOM uint8_t WAIT : 2; /*!< [1..0] Wait Cycle Control */ + uint8_t : 6; + } PRWCNTR_b; + }; __IOM R_PMISC_PMSAR_Type PMSAR[12]; /*!< (@ 0x00000010) Port Security Attribution Register */ } R_PMISC_Type; /*!< Size = 40 (0x28) */ @@ -14392,16 +14422,16 @@ typedef struct /*!< (@ 0x407FC000) R_FLAD Structure #define R_WDT ((R_WDT_Type *) R_WDT_BASE) #define R_TZF ((R_TZF_Type *) R_TZF_BASE) #define R_CPSCU ((R_CPSCU_Type *) R_CPSCU_BASE) - #define R_AGTX0 ((R_AGTX0_Type *) R_AGTX0_BASE) - #define R_AGTX1 ((R_AGTX0_Type *) R_AGTX1_BASE) - #define R_AGTX2 ((R_AGTX0_Type *) R_AGTX2_BASE) - #define R_AGTX3 ((R_AGTX0_Type *) R_AGTX3_BASE) - #define R_AGTX4 ((R_AGTX0_Type *) R_AGTX4_BASE) - #define R_AGTX5 ((R_AGTX0_Type *) R_AGTX5_BASE) - #define R_AGTX6 ((R_AGTX0_Type *) R_AGTX6_BASE) - #define R_AGTX7 ((R_AGTX0_Type *) R_AGTX7_BASE) - #define R_AGTX8 ((R_AGTX0_Type *) R_AGTX8_BASE) - #define R_AGTX9 ((R_AGTX0_Type *) R_AGTX9_BASE) + #define R_AGT0 ((R_AGTX0_Type *) R_AGTX0_BASE) + #define R_AGT1 ((R_AGTX0_Type *) R_AGTX1_BASE) + #define R_AGT2 ((R_AGTX0_Type *) R_AGTX2_BASE) + #define R_AGT3 ((R_AGTX0_Type *) R_AGTX3_BASE) + #define R_AGT4 ((R_AGTX0_Type *) R_AGTX4_BASE) + #define R_AGT5 ((R_AGTX0_Type *) R_AGTX5_BASE) + #define R_AGT6 ((R_AGTX0_Type *) R_AGTX6_BASE) + #define R_AGT7 ((R_AGTX0_Type *) R_AGTX7_BASE) + #define R_AGT8 ((R_AGTX0_Type *) R_AGTX8_BASE) + #define R_AGT9 ((R_AGTX0_Type *) R_AGTX9_BASE) #define R_FLAD ((R_FLAD_Type *) R_FLAD_BASE) /** @} */ /* End of group Device_Peripheral_declaration */ @@ -17875,20 +17905,31 @@ typedef struct /*!< (@ 0x407FC000) R_FLAD Structure /* =========================================================================================================================== */ /* ======================================================== MSTPCRA ======================================================== */ - #define R_MSTP_MSTPCRA_MSTPA_Pos (0UL) /*!< MSTPA (Bit 0) */ - #define R_MSTP_MSTPCRA_MSTPA_Msk (0x1UL) /*!< MSTPA (Bitfield-Mask: 0x01) */ + #define R_MSTP_MSTPCRA_MSTPA_Pos (0UL) /*!< MSTPA (Bit 0) */ + #define R_MSTP_MSTPCRA_MSTPA_Msk (0x1UL) /*!< MSTPA (Bitfield-Mask: 0x01) */ /* ======================================================== MSTPCRB ======================================================== */ - #define R_MSTP_MSTPCRB_MSTPB_Pos (0UL) /*!< MSTPB (Bit 0) */ - #define R_MSTP_MSTPCRB_MSTPB_Msk (0x1UL) /*!< MSTPB (Bitfield-Mask: 0x01) */ + #define R_MSTP_MSTPCRB_MSTPB_Pos (0UL) /*!< MSTPB (Bit 0) */ + #define R_MSTP_MSTPCRB_MSTPB_Msk (0x1UL) /*!< MSTPB (Bitfield-Mask: 0x01) */ /* ======================================================== MSTPCRC ======================================================== */ - #define R_MSTP_MSTPCRC_MSTPC_Pos (0UL) /*!< MSTPC (Bit 0) */ - #define R_MSTP_MSTPCRC_MSTPC_Msk (0x1UL) /*!< MSTPC (Bitfield-Mask: 0x01) */ + #define R_MSTP_MSTPCRC_MSTPC_Pos (0UL) /*!< MSTPC (Bit 0) */ + #define R_MSTP_MSTPCRC_MSTPC_Msk (0x1UL) /*!< MSTPC (Bitfield-Mask: 0x01) */ /* ======================================================== MSTPCRD ======================================================== */ - #define R_MSTP_MSTPCRD_MSTPD_Pos (0UL) /*!< MSTPD (Bit 0) */ - #define R_MSTP_MSTPCRD_MSTPD_Msk (0x1UL) /*!< MSTPD (Bitfield-Mask: 0x01) */ + #define R_MSTP_MSTPCRD_MSTPD_Pos (0UL) /*!< MSTPD (Bit 0) */ + #define R_MSTP_MSTPCRD_MSTPD_Msk (0x1UL) /*!< MSTPD (Bitfield-Mask: 0x01) */ /* ======================================================== MSTPCRE ======================================================== */ - #define R_MSTP_MSTPCRE_MSTPE_Pos (0UL) /*!< MSTPE (Bit 0) */ - #define R_MSTP_MSTPCRE_MSTPE_Msk (0x1UL) /*!< MSTPE (Bitfield-Mask: 0x01) */ + #define R_MSTP_MSTPCRE_MSTPE_Pos (0UL) /*!< MSTPE (Bit 0) */ + #define R_MSTP_MSTPCRE_MSTPE_Msk (0x1UL) /*!< MSTPE (Bitfield-Mask: 0x01) */ +/* ======================================================= LSMRWDIS ======================================================== */ + #define R_MSTP_LSMRWDIS_RTCRWDIS_Pos (0UL) /*!< RTCRWDIS (Bit 0) */ + #define R_MSTP_LSMRWDIS_RTCRWDIS_Msk (0x1UL) /*!< RTCRWDIS (Bitfield-Mask: 0x01) */ + #define R_MSTP_LSMRWDIS_WDTDIS_Pos (1UL) /*!< WDTDIS (Bit 1) */ + #define R_MSTP_LSMRWDIS_WDTDIS_Msk (0x2UL) /*!< WDTDIS (Bitfield-Mask: 0x01) */ + #define R_MSTP_LSMRWDIS_IWDTIDS_Pos (2UL) /*!< IWDTIDS (Bit 2) */ + #define R_MSTP_LSMRWDIS_IWDTIDS_Msk (0x4UL) /*!< IWDTIDS (Bitfield-Mask: 0x01) */ + #define R_MSTP_LSMRWDIS_WREN_Pos (7UL) /*!< WREN (Bit 7) */ + #define R_MSTP_LSMRWDIS_WREN_Msk (0x80UL) /*!< WREN (Bitfield-Mask: 0x01) */ + #define R_MSTP_LSMRWDIS_PRKEY_Pos (8UL) /*!< PRKEY (Bit 8) */ + #define R_MSTP_LSMRWDIS_PRKEY_Msk (0xff00UL) /*!< PRKEY (Bitfield-Mask: 0xff) */ /* =========================================================================================================================== */ /* ================ R_PORT0 ================ */ @@ -17962,6 +18003,9 @@ typedef struct /*!< (@ 0x407FC000) R_FLAD Structure #define R_PMISC_PWPRS_PFSWE_Msk (0x40UL) /*!< PFSWE (Bitfield-Mask: 0x01) */ #define R_PMISC_PWPRS_B0WI_Pos (7UL) /*!< B0WI (Bit 7) */ #define R_PMISC_PWPRS_B0WI_Msk (0x80UL) /*!< B0WI (Bitfield-Mask: 0x01) */ +/* ======================================================== PRWCNTR ======================================================== */ + #define R_PMISC_PRWCNTR_WAIT_Pos (0UL) /*!< WAIT (Bit 0) */ + #define R_PMISC_PRWCNTR_WAIT_Msk (0x3UL) /*!< WAIT (Bitfield-Mask: 0x03) */ /* =========================================================================================================================== */ /* ================ R_QSPI ================ */ diff --git a/ra/fsp/src/bsp/cmsis/Device/RENESAS/Include/R7FA4M3AF.h b/ra/fsp/src/bsp/cmsis/Device/RENESAS/Include/R7FA4M3AF.h index 35208d679..f4d79648b 100644 --- a/ra/fsp/src/bsp/cmsis/Device/RENESAS/Include/R7FA4M3AF.h +++ b/ra/fsp/src/bsp/cmsis/Device/RENESAS/Include/R7FA4M3AF.h @@ -7436,67 +7436,85 @@ typedef struct /*!< (@ 0x40084000) R_MSTP Structure union { - __IOM uint32_t MSTPCRE; /*!< (@ 0x00000010) Module Stop Control Register E */ + union + { + __IOM uint32_t MSTPCRE; /*!< (@ 0x00000010) Module Stop Control Register E */ - struct + struct + { + __IOM uint32_t MSTPE0 : 1; /*!< [0..0] Module stop bit 0. See device hardware manual for usage. */ + __IOM uint32_t MSTPE1 : 1; /*!< [1..1] Module stop bit 1. See device hardware manual for usage. */ + __IOM uint32_t MSTPE2 : 1; /*!< [2..2] Module stop bit 2. See device hardware manual for usage. */ + __IOM uint32_t MSTPE3 : 1; /*!< [3..3] Module stop bit 3. See device hardware manual for usage. */ + __IOM uint32_t MSTPE4 : 1; /*!< [4..4] Module stop bit 4. See device hardware manual for usage. */ + __IOM uint32_t MSTPE5 : 1; /*!< [5..5] Module stop bit 5. See device hardware manual for usage. */ + __IOM uint32_t MSTPE6 : 1; /*!< [6..6] Module stop bit 6. See device hardware manual for usage. */ + __IOM uint32_t MSTPE7 : 1; /*!< [7..7] Module stop bit 7. See device hardware manual for usage. */ + __IOM uint32_t MSTPE8 : 1; /*!< [8..8] Module stop bit 8. See device hardware manual for usage. */ + __IOM uint32_t MSTPE9 : 1; /*!< [9..9] Module stop bit 9. See device hardware manual for usage. */ + __IOM uint32_t MSTPE10 : 1; /*!< [10..10] Module stop bit 10. See device hardware manual for + * usage. */ + __IOM uint32_t MSTPE11 : 1; /*!< [11..11] Module stop bit 11. See device hardware manual for + * usage. */ + __IOM uint32_t MSTPE12 : 1; /*!< [12..12] Module stop bit 12. See device hardware manual for + * usage. */ + __IOM uint32_t MSTPE13 : 1; /*!< [13..13] Module stop bit 13. See device hardware manual for + * usage. */ + __IOM uint32_t MSTPE14 : 1; /*!< [14..14] Module stop bit 14. See device hardware manual for + * usage. */ + __IOM uint32_t MSTPE15 : 1; /*!< [15..15] Module stop bit 15. See device hardware manual for + * usage. */ + __IOM uint32_t MSTPE16 : 1; /*!< [16..16] Module stop bit 16. See device hardware manual for + * usage. */ + __IOM uint32_t MSTPE17 : 1; /*!< [17..17] Module stop bit 17. See device hardware manual for + * usage. */ + __IOM uint32_t MSTPE18 : 1; /*!< [18..18] Module stop bit 18. See device hardware manual for + * usage. */ + __IOM uint32_t MSTPE19 : 1; /*!< [19..19] Module stop bit 19. See device hardware manual for + * usage. */ + __IOM uint32_t MSTPE20 : 1; /*!< [20..20] Module stop bit 20. See device hardware manual for + * usage. */ + __IOM uint32_t MSTPE21 : 1; /*!< [21..21] Module stop bit 21. See device hardware manual for + * usage. */ + __IOM uint32_t MSTPE22 : 1; /*!< [22..22] Module stop bit 22. See device hardware manual for + * usage. */ + __IOM uint32_t MSTPE23 : 1; /*!< [23..23] Module stop bit 23. See device hardware manual for + * usage. */ + __IOM uint32_t MSTPE24 : 1; /*!< [24..24] Module stop bit 24. See device hardware manual for + * usage. */ + __IOM uint32_t MSTPE25 : 1; /*!< [25..25] Module stop bit 25. See device hardware manual for + * usage. */ + __IOM uint32_t MSTPE26 : 1; /*!< [26..26] Module stop bit 26. See device hardware manual for + * usage. */ + __IOM uint32_t MSTPE27 : 1; /*!< [27..27] Module stop bit 27. See device hardware manual for + * usage. */ + __IOM uint32_t MSTPE28 : 1; /*!< [28..28] Module stop bit 28. See device hardware manual for + * usage. */ + __IOM uint32_t MSTPE29 : 1; /*!< [29..29] Module stop bit 29. See device hardware manual for + * usage. */ + __IOM uint32_t MSTPE30 : 1; /*!< [30..30] Module stop bit 30. See device hardware manual for + * usage. */ + __IOM uint32_t MSTPE31 : 1; /*!< [31..31] Module stop bit 31. See device hardware manual for + * usage. */ + } MSTPCRE_b; + }; + + union { - __IOM uint32_t MSTPE0 : 1; /*!< [0..0] Module stop bit 0. See device hardware manual for usage. */ - __IOM uint32_t MSTPE1 : 1; /*!< [1..1] Module stop bit 1. See device hardware manual for usage. */ - __IOM uint32_t MSTPE2 : 1; /*!< [2..2] Module stop bit 2. See device hardware manual for usage. */ - __IOM uint32_t MSTPE3 : 1; /*!< [3..3] Module stop bit 3. See device hardware manual for usage. */ - __IOM uint32_t MSTPE4 : 1; /*!< [4..4] Module stop bit 4. See device hardware manual for usage. */ - __IOM uint32_t MSTPE5 : 1; /*!< [5..5] Module stop bit 5. See device hardware manual for usage. */ - __IOM uint32_t MSTPE6 : 1; /*!< [6..6] Module stop bit 6. See device hardware manual for usage. */ - __IOM uint32_t MSTPE7 : 1; /*!< [7..7] Module stop bit 7. See device hardware manual for usage. */ - __IOM uint32_t MSTPE8 : 1; /*!< [8..8] Module stop bit 8. See device hardware manual for usage. */ - __IOM uint32_t MSTPE9 : 1; /*!< [9..9] Module stop bit 9. See device hardware manual for usage. */ - __IOM uint32_t MSTPE10 : 1; /*!< [10..10] Module stop bit 10. See device hardware manual for - * usage. */ - __IOM uint32_t MSTPE11 : 1; /*!< [11..11] Module stop bit 11. See device hardware manual for - * usage. */ - __IOM uint32_t MSTPE12 : 1; /*!< [12..12] Module stop bit 12. See device hardware manual for - * usage. */ - __IOM uint32_t MSTPE13 : 1; /*!< [13..13] Module stop bit 13. See device hardware manual for - * usage. */ - __IOM uint32_t MSTPE14 : 1; /*!< [14..14] Module stop bit 14. See device hardware manual for - * usage. */ - __IOM uint32_t MSTPE15 : 1; /*!< [15..15] Module stop bit 15. See device hardware manual for - * usage. */ - __IOM uint32_t MSTPE16 : 1; /*!< [16..16] Module stop bit 16. See device hardware manual for - * usage. */ - __IOM uint32_t MSTPE17 : 1; /*!< [17..17] Module stop bit 17. See device hardware manual for - * usage. */ - __IOM uint32_t MSTPE18 : 1; /*!< [18..18] Module stop bit 18. See device hardware manual for - * usage. */ - __IOM uint32_t MSTPE19 : 1; /*!< [19..19] Module stop bit 19. See device hardware manual for - * usage. */ - __IOM uint32_t MSTPE20 : 1; /*!< [20..20] Module stop bit 20. See device hardware manual for - * usage. */ - __IOM uint32_t MSTPE21 : 1; /*!< [21..21] Module stop bit 21. See device hardware manual for - * usage. */ - __IOM uint32_t MSTPE22 : 1; /*!< [22..22] Module stop bit 22. See device hardware manual for - * usage. */ - __IOM uint32_t MSTPE23 : 1; /*!< [23..23] Module stop bit 23. See device hardware manual for - * usage. */ - __IOM uint32_t MSTPE24 : 1; /*!< [24..24] Module stop bit 24. See device hardware manual for - * usage. */ - __IOM uint32_t MSTPE25 : 1; /*!< [25..25] Module stop bit 25. See device hardware manual for - * usage. */ - __IOM uint32_t MSTPE26 : 1; /*!< [26..26] Module stop bit 26. See device hardware manual for - * usage. */ - __IOM uint32_t MSTPE27 : 1; /*!< [27..27] Module stop bit 27. See device hardware manual for - * usage. */ - __IOM uint32_t MSTPE28 : 1; /*!< [28..28] Module stop bit 28. See device hardware manual for - * usage. */ - __IOM uint32_t MSTPE29 : 1; /*!< [29..29] Module stop bit 29. See device hardware manual for - * usage. */ - __IOM uint32_t MSTPE30 : 1; /*!< [30..30] Module stop bit 30. See device hardware manual for - * usage. */ - __IOM uint32_t MSTPE31 : 1; /*!< [31..31] Module stop bit 31. See device hardware manual for - * usage. */ - } MSTPCRE_b; + __IOM uint16_t LSMRWDIS; /*!< (@ 0x00000010) Low Speed Module R/W Disable Control Register */ + + struct + { + __IOM uint16_t RTCRWDIS : 1; /*!< [0..0] RTC Register R/W Enable Control */ + __IOM uint16_t WDTDIS : 1; /*!< [1..1] WDT Operate Clock Control */ + __IOM uint16_t IWDTIDS : 1; /*!< [2..2] IWDT Register Clock Control */ + uint16_t : 4; + __IOM uint16_t WREN : 1; /*!< [7..7] Write Enable for bits [2:0] */ + __OM uint16_t PRKEY : 8; /*!< [15..8] LSMRWDIS Key Code */ + } LSMRWDIS_b; + }; }; -} R_MSTP_Type; /*!< Size = 20 (0x14) */ +} R_MSTP_Type; /*!< Size = 20 (0x14) */ /* =========================================================================================================================== */ /* ================ R_PORT0 ================ */ @@ -7838,11 +7856,23 @@ typedef struct /*!< (@ 0x40080D00) R_PMISC Structure struct { uint8_t : 6; - __IOM uint8_t PFSWE : 1; /*!< [6..6] PmnPFS Register Write */ - __IOM uint8_t B0WI : 1; /*!< [7..7] PFSWE Bit Write Disable */ + __IOM uint8_t PFSWE : 1; /*!< [6..6] PmnPFS Register Write */ + __IOM uint8_t B0WI : 1; /*!< [7..7] PFSWE Bit Write Disable */ } PWPRS_b; }; - __IM uint16_t RESERVED2[5]; + __IM uint16_t RESERVED2[4]; + __IM uint8_t RESERVED3; + + union + { + __IOM uint8_t PRWCNTR; /*!< (@ 0x0000000F) Port Read Wait Control Register */ + + struct + { + __IOM uint8_t WAIT : 2; /*!< [1..0] Wait Cycle Control */ + uint8_t : 6; + } PRWCNTR_b; + }; __IOM R_PMISC_PMSAR_Type PMSAR[12]; /*!< (@ 0x00000010) Port Security Attribution Register */ } R_PMISC_Type; /*!< Size = 40 (0x28) */ @@ -14497,16 +14527,16 @@ typedef struct /*!< (@ 0x407FC000) R_FLAD Structure #define R_TZF ((R_TZF_Type *) R_TZF_BASE) #define R_CACHE ((R_CACHE_Type *) R_CACHE_BASE) #define R_CPSCU ((R_CPSCU_Type *) R_CPSCU_BASE) - #define R_AGTX0 ((R_AGTX0_Type *) R_AGTX0_BASE) - #define R_AGTX1 ((R_AGTX0_Type *) R_AGTX1_BASE) - #define R_AGTX2 ((R_AGTX0_Type *) R_AGTX2_BASE) - #define R_AGTX3 ((R_AGTX0_Type *) R_AGTX3_BASE) - #define R_AGTX4 ((R_AGTX0_Type *) R_AGTX4_BASE) - #define R_AGTX5 ((R_AGTX0_Type *) R_AGTX5_BASE) - #define R_AGTX6 ((R_AGTX0_Type *) R_AGTX6_BASE) - #define R_AGTX7 ((R_AGTX0_Type *) R_AGTX7_BASE) - #define R_AGTX8 ((R_AGTX0_Type *) R_AGTX8_BASE) - #define R_AGTX9 ((R_AGTX0_Type *) R_AGTX9_BASE) + #define R_AGT0 ((R_AGTX0_Type *) R_AGTX0_BASE) + #define R_AGT1 ((R_AGTX0_Type *) R_AGTX1_BASE) + #define R_AGT2 ((R_AGTX0_Type *) R_AGTX2_BASE) + #define R_AGT3 ((R_AGTX0_Type *) R_AGTX3_BASE) + #define R_AGT4 ((R_AGTX0_Type *) R_AGTX4_BASE) + #define R_AGT5 ((R_AGTX0_Type *) R_AGTX5_BASE) + #define R_AGT6 ((R_AGTX0_Type *) R_AGTX6_BASE) + #define R_AGT7 ((R_AGTX0_Type *) R_AGTX7_BASE) + #define R_AGT8 ((R_AGTX0_Type *) R_AGTX8_BASE) + #define R_AGT9 ((R_AGTX0_Type *) R_AGTX9_BASE) #define R_FLAD ((R_FLAD_Type *) R_FLAD_BASE) /** @} */ /* End of group Device_Peripheral_declaration */ @@ -17980,20 +18010,31 @@ typedef struct /*!< (@ 0x407FC000) R_FLAD Structure /* =========================================================================================================================== */ /* ======================================================== MSTPCRA ======================================================== */ - #define R_MSTP_MSTPCRA_MSTPA_Pos (0UL) /*!< MSTPA (Bit 0) */ - #define R_MSTP_MSTPCRA_MSTPA_Msk (0x1UL) /*!< MSTPA (Bitfield-Mask: 0x01) */ + #define R_MSTP_MSTPCRA_MSTPA_Pos (0UL) /*!< MSTPA (Bit 0) */ + #define R_MSTP_MSTPCRA_MSTPA_Msk (0x1UL) /*!< MSTPA (Bitfield-Mask: 0x01) */ /* ======================================================== MSTPCRB ======================================================== */ - #define R_MSTP_MSTPCRB_MSTPB_Pos (0UL) /*!< MSTPB (Bit 0) */ - #define R_MSTP_MSTPCRB_MSTPB_Msk (0x1UL) /*!< MSTPB (Bitfield-Mask: 0x01) */ + #define R_MSTP_MSTPCRB_MSTPB_Pos (0UL) /*!< MSTPB (Bit 0) */ + #define R_MSTP_MSTPCRB_MSTPB_Msk (0x1UL) /*!< MSTPB (Bitfield-Mask: 0x01) */ /* ======================================================== MSTPCRC ======================================================== */ - #define R_MSTP_MSTPCRC_MSTPC_Pos (0UL) /*!< MSTPC (Bit 0) */ - #define R_MSTP_MSTPCRC_MSTPC_Msk (0x1UL) /*!< MSTPC (Bitfield-Mask: 0x01) */ + #define R_MSTP_MSTPCRC_MSTPC_Pos (0UL) /*!< MSTPC (Bit 0) */ + #define R_MSTP_MSTPCRC_MSTPC_Msk (0x1UL) /*!< MSTPC (Bitfield-Mask: 0x01) */ /* ======================================================== MSTPCRD ======================================================== */ - #define R_MSTP_MSTPCRD_MSTPD_Pos (0UL) /*!< MSTPD (Bit 0) */ - #define R_MSTP_MSTPCRD_MSTPD_Msk (0x1UL) /*!< MSTPD (Bitfield-Mask: 0x01) */ + #define R_MSTP_MSTPCRD_MSTPD_Pos (0UL) /*!< MSTPD (Bit 0) */ + #define R_MSTP_MSTPCRD_MSTPD_Msk (0x1UL) /*!< MSTPD (Bitfield-Mask: 0x01) */ /* ======================================================== MSTPCRE ======================================================== */ - #define R_MSTP_MSTPCRE_MSTPE_Pos (0UL) /*!< MSTPE (Bit 0) */ - #define R_MSTP_MSTPCRE_MSTPE_Msk (0x1UL) /*!< MSTPE (Bitfield-Mask: 0x01) */ + #define R_MSTP_MSTPCRE_MSTPE_Pos (0UL) /*!< MSTPE (Bit 0) */ + #define R_MSTP_MSTPCRE_MSTPE_Msk (0x1UL) /*!< MSTPE (Bitfield-Mask: 0x01) */ +/* ======================================================= LSMRWDIS ======================================================== */ + #define R_MSTP_LSMRWDIS_RTCRWDIS_Pos (0UL) /*!< RTCRWDIS (Bit 0) */ + #define R_MSTP_LSMRWDIS_RTCRWDIS_Msk (0x1UL) /*!< RTCRWDIS (Bitfield-Mask: 0x01) */ + #define R_MSTP_LSMRWDIS_WDTDIS_Pos (1UL) /*!< WDTDIS (Bit 1) */ + #define R_MSTP_LSMRWDIS_WDTDIS_Msk (0x2UL) /*!< WDTDIS (Bitfield-Mask: 0x01) */ + #define R_MSTP_LSMRWDIS_IWDTIDS_Pos (2UL) /*!< IWDTIDS (Bit 2) */ + #define R_MSTP_LSMRWDIS_IWDTIDS_Msk (0x4UL) /*!< IWDTIDS (Bitfield-Mask: 0x01) */ + #define R_MSTP_LSMRWDIS_WREN_Pos (7UL) /*!< WREN (Bit 7) */ + #define R_MSTP_LSMRWDIS_WREN_Msk (0x80UL) /*!< WREN (Bitfield-Mask: 0x01) */ + #define R_MSTP_LSMRWDIS_PRKEY_Pos (8UL) /*!< PRKEY (Bit 8) */ + #define R_MSTP_LSMRWDIS_PRKEY_Msk (0xff00UL) /*!< PRKEY (Bitfield-Mask: 0xff) */ /* =========================================================================================================================== */ /* ================ R_PORT0 ================ */ @@ -18067,6 +18108,9 @@ typedef struct /*!< (@ 0x407FC000) R_FLAD Structure #define R_PMISC_PWPRS_PFSWE_Msk (0x40UL) /*!< PFSWE (Bitfield-Mask: 0x01) */ #define R_PMISC_PWPRS_B0WI_Pos (7UL) /*!< B0WI (Bit 7) */ #define R_PMISC_PWPRS_B0WI_Msk (0x80UL) /*!< B0WI (Bitfield-Mask: 0x01) */ +/* ======================================================== PRWCNTR ======================================================== */ + #define R_PMISC_PRWCNTR_WAIT_Pos (0UL) /*!< WAIT (Bit 0) */ + #define R_PMISC_PRWCNTR_WAIT_Msk (0x3UL) /*!< WAIT (Bitfield-Mask: 0x03) */ /* =========================================================================================================================== */ /* ================ R_QSPI ================ */ diff --git a/ra/fsp/src/bsp/cmsis/Device/RENESAS/Include/R7FA4T1BB.h b/ra/fsp/src/bsp/cmsis/Device/RENESAS/Include/R7FA4T1BB.h index 6c9031620..d0ee3dd15 100644 --- a/ra/fsp/src/bsp/cmsis/Device/RENESAS/Include/R7FA4T1BB.h +++ b/ra/fsp/src/bsp/cmsis/Device/RENESAS/Include/R7FA4T1BB.h @@ -8848,67 +8848,85 @@ typedef struct /*!< (@ 0x40084000) R_MSTP Structure union { - __IOM uint32_t MSTPCRE; /*!< (@ 0x00000010) Module Stop Control Register E */ + union + { + __IOM uint32_t MSTPCRE; /*!< (@ 0x00000010) Module Stop Control Register E */ - struct + struct + { + __IOM uint32_t MSTPE0 : 1; /*!< [0..0] Module stop bit 0. See device hardware manual for usage. */ + __IOM uint32_t MSTPE1 : 1; /*!< [1..1] Module stop bit 1. See device hardware manual for usage. */ + __IOM uint32_t MSTPE2 : 1; /*!< [2..2] Module stop bit 2. See device hardware manual for usage. */ + __IOM uint32_t MSTPE3 : 1; /*!< [3..3] Module stop bit 3. See device hardware manual for usage. */ + __IOM uint32_t MSTPE4 : 1; /*!< [4..4] Module stop bit 4. See device hardware manual for usage. */ + __IOM uint32_t MSTPE5 : 1; /*!< [5..5] Module stop bit 5. See device hardware manual for usage. */ + __IOM uint32_t MSTPE6 : 1; /*!< [6..6] Module stop bit 6. See device hardware manual for usage. */ + __IOM uint32_t MSTPE7 : 1; /*!< [7..7] Module stop bit 7. See device hardware manual for usage. */ + __IOM uint32_t MSTPE8 : 1; /*!< [8..8] Module stop bit 8. See device hardware manual for usage. */ + __IOM uint32_t MSTPE9 : 1; /*!< [9..9] Module stop bit 9. See device hardware manual for usage. */ + __IOM uint32_t MSTPE10 : 1; /*!< [10..10] Module stop bit 10. See device hardware manual for + * usage. */ + __IOM uint32_t MSTPE11 : 1; /*!< [11..11] Module stop bit 11. See device hardware manual for + * usage. */ + __IOM uint32_t MSTPE12 : 1; /*!< [12..12] Module stop bit 12. See device hardware manual for + * usage. */ + __IOM uint32_t MSTPE13 : 1; /*!< [13..13] Module stop bit 13. See device hardware manual for + * usage. */ + __IOM uint32_t MSTPE14 : 1; /*!< [14..14] Module stop bit 14. See device hardware manual for + * usage. */ + __IOM uint32_t MSTPE15 : 1; /*!< [15..15] Module stop bit 15. See device hardware manual for + * usage. */ + __IOM uint32_t MSTPE16 : 1; /*!< [16..16] Module stop bit 16. See device hardware manual for + * usage. */ + __IOM uint32_t MSTPE17 : 1; /*!< [17..17] Module stop bit 17. See device hardware manual for + * usage. */ + __IOM uint32_t MSTPE18 : 1; /*!< [18..18] Module stop bit 18. See device hardware manual for + * usage. */ + __IOM uint32_t MSTPE19 : 1; /*!< [19..19] Module stop bit 19. See device hardware manual for + * usage. */ + __IOM uint32_t MSTPE20 : 1; /*!< [20..20] Module stop bit 20. See device hardware manual for + * usage. */ + __IOM uint32_t MSTPE21 : 1; /*!< [21..21] Module stop bit 21. See device hardware manual for + * usage. */ + __IOM uint32_t MSTPE22 : 1; /*!< [22..22] Module stop bit 22. See device hardware manual for + * usage. */ + __IOM uint32_t MSTPE23 : 1; /*!< [23..23] Module stop bit 23. See device hardware manual for + * usage. */ + __IOM uint32_t MSTPE24 : 1; /*!< [24..24] Module stop bit 24. See device hardware manual for + * usage. */ + __IOM uint32_t MSTPE25 : 1; /*!< [25..25] Module stop bit 25. See device hardware manual for + * usage. */ + __IOM uint32_t MSTPE26 : 1; /*!< [26..26] Module stop bit 26. See device hardware manual for + * usage. */ + __IOM uint32_t MSTPE27 : 1; /*!< [27..27] Module stop bit 27. See device hardware manual for + * usage. */ + __IOM uint32_t MSTPE28 : 1; /*!< [28..28] Module stop bit 28. See device hardware manual for + * usage. */ + __IOM uint32_t MSTPE29 : 1; /*!< [29..29] Module stop bit 29. See device hardware manual for + * usage. */ + __IOM uint32_t MSTPE30 : 1; /*!< [30..30] Module stop bit 30. See device hardware manual for + * usage. */ + __IOM uint32_t MSTPE31 : 1; /*!< [31..31] Module stop bit 31. See device hardware manual for + * usage. */ + } MSTPCRE_b; + }; + + union { - __IOM uint32_t MSTPE0 : 1; /*!< [0..0] Module stop bit 0. See device hardware manual for usage. */ - __IOM uint32_t MSTPE1 : 1; /*!< [1..1] Module stop bit 1. See device hardware manual for usage. */ - __IOM uint32_t MSTPE2 : 1; /*!< [2..2] Module stop bit 2. See device hardware manual for usage. */ - __IOM uint32_t MSTPE3 : 1; /*!< [3..3] Module stop bit 3. See device hardware manual for usage. */ - __IOM uint32_t MSTPE4 : 1; /*!< [4..4] Module stop bit 4. See device hardware manual for usage. */ - __IOM uint32_t MSTPE5 : 1; /*!< [5..5] Module stop bit 5. See device hardware manual for usage. */ - __IOM uint32_t MSTPE6 : 1; /*!< [6..6] Module stop bit 6. See device hardware manual for usage. */ - __IOM uint32_t MSTPE7 : 1; /*!< [7..7] Module stop bit 7. See device hardware manual for usage. */ - __IOM uint32_t MSTPE8 : 1; /*!< [8..8] Module stop bit 8. See device hardware manual for usage. */ - __IOM uint32_t MSTPE9 : 1; /*!< [9..9] Module stop bit 9. See device hardware manual for usage. */ - __IOM uint32_t MSTPE10 : 1; /*!< [10..10] Module stop bit 10. See device hardware manual for - * usage. */ - __IOM uint32_t MSTPE11 : 1; /*!< [11..11] Module stop bit 11. See device hardware manual for - * usage. */ - __IOM uint32_t MSTPE12 : 1; /*!< [12..12] Module stop bit 12. See device hardware manual for - * usage. */ - __IOM uint32_t MSTPE13 : 1; /*!< [13..13] Module stop bit 13. See device hardware manual for - * usage. */ - __IOM uint32_t MSTPE14 : 1; /*!< [14..14] Module stop bit 14. See device hardware manual for - * usage. */ - __IOM uint32_t MSTPE15 : 1; /*!< [15..15] Module stop bit 15. See device hardware manual for - * usage. */ - __IOM uint32_t MSTPE16 : 1; /*!< [16..16] Module stop bit 16. See device hardware manual for - * usage. */ - __IOM uint32_t MSTPE17 : 1; /*!< [17..17] Module stop bit 17. See device hardware manual for - * usage. */ - __IOM uint32_t MSTPE18 : 1; /*!< [18..18] Module stop bit 18. See device hardware manual for - * usage. */ - __IOM uint32_t MSTPE19 : 1; /*!< [19..19] Module stop bit 19. See device hardware manual for - * usage. */ - __IOM uint32_t MSTPE20 : 1; /*!< [20..20] Module stop bit 20. See device hardware manual for - * usage. */ - __IOM uint32_t MSTPE21 : 1; /*!< [21..21] Module stop bit 21. See device hardware manual for - * usage. */ - __IOM uint32_t MSTPE22 : 1; /*!< [22..22] Module stop bit 22. See device hardware manual for - * usage. */ - __IOM uint32_t MSTPE23 : 1; /*!< [23..23] Module stop bit 23. See device hardware manual for - * usage. */ - __IOM uint32_t MSTPE24 : 1; /*!< [24..24] Module stop bit 24. See device hardware manual for - * usage. */ - __IOM uint32_t MSTPE25 : 1; /*!< [25..25] Module stop bit 25. See device hardware manual for - * usage. */ - __IOM uint32_t MSTPE26 : 1; /*!< [26..26] Module stop bit 26. See device hardware manual for - * usage. */ - __IOM uint32_t MSTPE27 : 1; /*!< [27..27] Module stop bit 27. See device hardware manual for - * usage. */ - __IOM uint32_t MSTPE28 : 1; /*!< [28..28] Module stop bit 28. See device hardware manual for - * usage. */ - __IOM uint32_t MSTPE29 : 1; /*!< [29..29] Module stop bit 29. See device hardware manual for - * usage. */ - __IOM uint32_t MSTPE30 : 1; /*!< [30..30] Module stop bit 30. See device hardware manual for - * usage. */ - __IOM uint32_t MSTPE31 : 1; /*!< [31..31] Module stop bit 31. See device hardware manual for - * usage. */ - } MSTPCRE_b; + __IOM uint16_t LSMRWDIS; /*!< (@ 0x00000010) Low Speed Module R/W Disable Control Register */ + + struct + { + __IOM uint16_t RTCRWDIS : 1; /*!< [0..0] RTC Register R/W Enable Control */ + __IOM uint16_t WDTDIS : 1; /*!< [1..1] WDT Operate Clock Control */ + __IOM uint16_t IWDTIDS : 1; /*!< [2..2] IWDT Register Clock Control */ + uint16_t : 4; + __IOM uint16_t WREN : 1; /*!< [7..7] Write Enable for bits [2:0] */ + __OM uint16_t PRKEY : 8; /*!< [15..8] LSMRWDIS Key Code */ + } LSMRWDIS_b; + }; }; -} R_MSTP_Type; /*!< Size = 20 (0x14) */ +} R_MSTP_Type; /*!< Size = 20 (0x14) */ /* =========================================================================================================================== */ /* ================ R_PORT0 ================ */ @@ -9250,11 +9268,23 @@ typedef struct /*!< (@ 0x40080D00) R_PMISC Structure struct { uint8_t : 6; - __IOM uint8_t PFSWE : 1; /*!< [6..6] PmnPFS Register Write */ - __IOM uint8_t B0WI : 1; /*!< [7..7] PFSWE Bit Write Disable */ + __IOM uint8_t PFSWE : 1; /*!< [6..6] PmnPFS Register Write */ + __IOM uint8_t B0WI : 1; /*!< [7..7] PFSWE Bit Write Disable */ } PWPRS_b; }; - __IM uint16_t RESERVED2[5]; + __IM uint16_t RESERVED2[4]; + __IM uint8_t RESERVED3; + + union + { + __IOM uint8_t PRWCNTR; /*!< (@ 0x0000000F) Port Read Wait Control Register */ + + struct + { + __IOM uint8_t WAIT : 2; /*!< [1..0] Wait Cycle Control */ + uint8_t : 6; + } PRWCNTR_b; + }; __IOM R_PMISC_PMSAR_Type PMSAR[12]; /*!< (@ 0x00000010) Port Security Attribution Register */ } R_PMISC_Type; /*!< Size = 40 (0x28) */ @@ -13614,16 +13644,16 @@ typedef struct /*!< (@ 0x407FC000) R_FLAD Structure #define R_CACHE ((R_CACHE_Type *) R_CACHE_BASE) #define R_CPSCU ((R_CPSCU_Type *) R_CPSCU_BASE) #define R_TFU ((R_TFU_Type *) R_TFU_BASE) - #define R_AGTX0 ((R_AGTX0_Type *) R_AGTX0_BASE) - #define R_AGTX1 ((R_AGTX0_Type *) R_AGTX1_BASE) - #define R_AGTX2 ((R_AGTX0_Type *) R_AGTX2_BASE) - #define R_AGTX3 ((R_AGTX0_Type *) R_AGTX3_BASE) - #define R_AGTX4 ((R_AGTX0_Type *) R_AGTX4_BASE) - #define R_AGTX5 ((R_AGTX0_Type *) R_AGTX5_BASE) - #define R_AGTX6 ((R_AGTX0_Type *) R_AGTX6_BASE) - #define R_AGTX7 ((R_AGTX0_Type *) R_AGTX7_BASE) - #define R_AGTX8 ((R_AGTX0_Type *) R_AGTX8_BASE) - #define R_AGTX9 ((R_AGTX0_Type *) R_AGTX9_BASE) + #define R_AGTW0 ((R_AGTX0_Type *) R_AGTX0_BASE) + #define R_AGTW1 ((R_AGTX0_Type *) R_AGTX1_BASE) + #define R_AGTW2 ((R_AGTX0_Type *) R_AGTX2_BASE) + #define R_AGTW3 ((R_AGTX0_Type *) R_AGTX3_BASE) + #define R_AGTW4 ((R_AGTX0_Type *) R_AGTX4_BASE) + #define R_AGTW5 ((R_AGTX0_Type *) R_AGTX5_BASE) + #define R_AGTW6 ((R_AGTX0_Type *) R_AGTX6_BASE) + #define R_AGTW7 ((R_AGTX0_Type *) R_AGTX7_BASE) + #define R_AGTW8 ((R_AGTX0_Type *) R_AGTX8_BASE) + #define R_AGTW9 ((R_AGTX0_Type *) R_AGTX9_BASE) #define R_FLAD ((R_FLAD_Type *) R_FLAD_BASE) /** @} */ /* End of group Device_Peripheral_declaration */ @@ -17814,20 +17844,31 @@ typedef struct /*!< (@ 0x407FC000) R_FLAD Structure /* =========================================================================================================================== */ /* ======================================================== MSTPCRA ======================================================== */ - #define R_MSTP_MSTPCRA_MSTPA_Pos (0UL) /*!< MSTPA (Bit 0) */ - #define R_MSTP_MSTPCRA_MSTPA_Msk (0x1UL) /*!< MSTPA (Bitfield-Mask: 0x01) */ + #define R_MSTP_MSTPCRA_MSTPA_Pos (0UL) /*!< MSTPA (Bit 0) */ + #define R_MSTP_MSTPCRA_MSTPA_Msk (0x1UL) /*!< MSTPA (Bitfield-Mask: 0x01) */ /* ======================================================== MSTPCRB ======================================================== */ - #define R_MSTP_MSTPCRB_MSTPB_Pos (0UL) /*!< MSTPB (Bit 0) */ - #define R_MSTP_MSTPCRB_MSTPB_Msk (0x1UL) /*!< MSTPB (Bitfield-Mask: 0x01) */ + #define R_MSTP_MSTPCRB_MSTPB_Pos (0UL) /*!< MSTPB (Bit 0) */ + #define R_MSTP_MSTPCRB_MSTPB_Msk (0x1UL) /*!< MSTPB (Bitfield-Mask: 0x01) */ /* ======================================================== MSTPCRC ======================================================== */ - #define R_MSTP_MSTPCRC_MSTPC_Pos (0UL) /*!< MSTPC (Bit 0) */ - #define R_MSTP_MSTPCRC_MSTPC_Msk (0x1UL) /*!< MSTPC (Bitfield-Mask: 0x01) */ + #define R_MSTP_MSTPCRC_MSTPC_Pos (0UL) /*!< MSTPC (Bit 0) */ + #define R_MSTP_MSTPCRC_MSTPC_Msk (0x1UL) /*!< MSTPC (Bitfield-Mask: 0x01) */ /* ======================================================== MSTPCRD ======================================================== */ - #define R_MSTP_MSTPCRD_MSTPD_Pos (0UL) /*!< MSTPD (Bit 0) */ - #define R_MSTP_MSTPCRD_MSTPD_Msk (0x1UL) /*!< MSTPD (Bitfield-Mask: 0x01) */ + #define R_MSTP_MSTPCRD_MSTPD_Pos (0UL) /*!< MSTPD (Bit 0) */ + #define R_MSTP_MSTPCRD_MSTPD_Msk (0x1UL) /*!< MSTPD (Bitfield-Mask: 0x01) */ /* ======================================================== MSTPCRE ======================================================== */ - #define R_MSTP_MSTPCRE_MSTPE_Pos (0UL) /*!< MSTPE (Bit 0) */ - #define R_MSTP_MSTPCRE_MSTPE_Msk (0x1UL) /*!< MSTPE (Bitfield-Mask: 0x01) */ + #define R_MSTP_MSTPCRE_MSTPE_Pos (0UL) /*!< MSTPE (Bit 0) */ + #define R_MSTP_MSTPCRE_MSTPE_Msk (0x1UL) /*!< MSTPE (Bitfield-Mask: 0x01) */ +/* ======================================================= LSMRWDIS ======================================================== */ + #define R_MSTP_LSMRWDIS_RTCRWDIS_Pos (0UL) /*!< RTCRWDIS (Bit 0) */ + #define R_MSTP_LSMRWDIS_RTCRWDIS_Msk (0x1UL) /*!< RTCRWDIS (Bitfield-Mask: 0x01) */ + #define R_MSTP_LSMRWDIS_WDTDIS_Pos (1UL) /*!< WDTDIS (Bit 1) */ + #define R_MSTP_LSMRWDIS_WDTDIS_Msk (0x2UL) /*!< WDTDIS (Bitfield-Mask: 0x01) */ + #define R_MSTP_LSMRWDIS_IWDTIDS_Pos (2UL) /*!< IWDTIDS (Bit 2) */ + #define R_MSTP_LSMRWDIS_IWDTIDS_Msk (0x4UL) /*!< IWDTIDS (Bitfield-Mask: 0x01) */ + #define R_MSTP_LSMRWDIS_WREN_Pos (7UL) /*!< WREN (Bit 7) */ + #define R_MSTP_LSMRWDIS_WREN_Msk (0x80UL) /*!< WREN (Bitfield-Mask: 0x01) */ + #define R_MSTP_LSMRWDIS_PRKEY_Pos (8UL) /*!< PRKEY (Bit 8) */ + #define R_MSTP_LSMRWDIS_PRKEY_Msk (0xff00UL) /*!< PRKEY (Bitfield-Mask: 0xff) */ /* =========================================================================================================================== */ /* ================ R_PORT0 ================ */ @@ -17901,6 +17942,9 @@ typedef struct /*!< (@ 0x407FC000) R_FLAD Structure #define R_PMISC_PWPRS_PFSWE_Msk (0x40UL) /*!< PFSWE (Bitfield-Mask: 0x01) */ #define R_PMISC_PWPRS_B0WI_Pos (7UL) /*!< B0WI (Bit 7) */ #define R_PMISC_PWPRS_B0WI_Msk (0x80UL) /*!< B0WI (Bitfield-Mask: 0x01) */ +/* ======================================================== PRWCNTR ======================================================== */ + #define R_PMISC_PRWCNTR_WAIT_Pos (0UL) /*!< WAIT (Bit 0) */ + #define R_PMISC_PRWCNTR_WAIT_Msk (0x3UL) /*!< WAIT (Bitfield-Mask: 0x03) */ /* =========================================================================================================================== */ /* ================ R_RTC ================ */ diff --git a/ra/fsp/src/bsp/cmsis/Device/RENESAS/Include/R7FA4W1AD.h b/ra/fsp/src/bsp/cmsis/Device/RENESAS/Include/R7FA4W1AD.h index e42dee94e..b26edf589 100644 --- a/ra/fsp/src/bsp/cmsis/Device/RENESAS/Include/R7FA4W1AD.h +++ b/ra/fsp/src/bsp/cmsis/Device/RENESAS/Include/R7FA4W1AD.h @@ -7427,67 +7427,85 @@ typedef struct /*!< (@ 0x40047000) R_MSTP Structure union { - __IOM uint32_t MSTPCRE; /*!< (@ 0x00000010) Module Stop Control Register E */ + union + { + __IOM uint32_t MSTPCRE; /*!< (@ 0x00000010) Module Stop Control Register E */ - struct + struct + { + __IOM uint32_t MSTPE0 : 1; /*!< [0..0] Module stop bit 0. See device hardware manual for usage. */ + __IOM uint32_t MSTPE1 : 1; /*!< [1..1] Module stop bit 1. See device hardware manual for usage. */ + __IOM uint32_t MSTPE2 : 1; /*!< [2..2] Module stop bit 2. See device hardware manual for usage. */ + __IOM uint32_t MSTPE3 : 1; /*!< [3..3] Module stop bit 3. See device hardware manual for usage. */ + __IOM uint32_t MSTPE4 : 1; /*!< [4..4] Module stop bit 4. See device hardware manual for usage. */ + __IOM uint32_t MSTPE5 : 1; /*!< [5..5] Module stop bit 5. See device hardware manual for usage. */ + __IOM uint32_t MSTPE6 : 1; /*!< [6..6] Module stop bit 6. See device hardware manual for usage. */ + __IOM uint32_t MSTPE7 : 1; /*!< [7..7] Module stop bit 7. See device hardware manual for usage. */ + __IOM uint32_t MSTPE8 : 1; /*!< [8..8] Module stop bit 8. See device hardware manual for usage. */ + __IOM uint32_t MSTPE9 : 1; /*!< [9..9] Module stop bit 9. See device hardware manual for usage. */ + __IOM uint32_t MSTPE10 : 1; /*!< [10..10] Module stop bit 10. See device hardware manual for + * usage. */ + __IOM uint32_t MSTPE11 : 1; /*!< [11..11] Module stop bit 11. See device hardware manual for + * usage. */ + __IOM uint32_t MSTPE12 : 1; /*!< [12..12] Module stop bit 12. See device hardware manual for + * usage. */ + __IOM uint32_t MSTPE13 : 1; /*!< [13..13] Module stop bit 13. See device hardware manual for + * usage. */ + __IOM uint32_t MSTPE14 : 1; /*!< [14..14] Module stop bit 14. See device hardware manual for + * usage. */ + __IOM uint32_t MSTPE15 : 1; /*!< [15..15] Module stop bit 15. See device hardware manual for + * usage. */ + __IOM uint32_t MSTPE16 : 1; /*!< [16..16] Module stop bit 16. See device hardware manual for + * usage. */ + __IOM uint32_t MSTPE17 : 1; /*!< [17..17] Module stop bit 17. See device hardware manual for + * usage. */ + __IOM uint32_t MSTPE18 : 1; /*!< [18..18] Module stop bit 18. See device hardware manual for + * usage. */ + __IOM uint32_t MSTPE19 : 1; /*!< [19..19] Module stop bit 19. See device hardware manual for + * usage. */ + __IOM uint32_t MSTPE20 : 1; /*!< [20..20] Module stop bit 20. See device hardware manual for + * usage. */ + __IOM uint32_t MSTPE21 : 1; /*!< [21..21] Module stop bit 21. See device hardware manual for + * usage. */ + __IOM uint32_t MSTPE22 : 1; /*!< [22..22] Module stop bit 22. See device hardware manual for + * usage. */ + __IOM uint32_t MSTPE23 : 1; /*!< [23..23] Module stop bit 23. See device hardware manual for + * usage. */ + __IOM uint32_t MSTPE24 : 1; /*!< [24..24] Module stop bit 24. See device hardware manual for + * usage. */ + __IOM uint32_t MSTPE25 : 1; /*!< [25..25] Module stop bit 25. See device hardware manual for + * usage. */ + __IOM uint32_t MSTPE26 : 1; /*!< [26..26] Module stop bit 26. See device hardware manual for + * usage. */ + __IOM uint32_t MSTPE27 : 1; /*!< [27..27] Module stop bit 27. See device hardware manual for + * usage. */ + __IOM uint32_t MSTPE28 : 1; /*!< [28..28] Module stop bit 28. See device hardware manual for + * usage. */ + __IOM uint32_t MSTPE29 : 1; /*!< [29..29] Module stop bit 29. See device hardware manual for + * usage. */ + __IOM uint32_t MSTPE30 : 1; /*!< [30..30] Module stop bit 30. See device hardware manual for + * usage. */ + __IOM uint32_t MSTPE31 : 1; /*!< [31..31] Module stop bit 31. See device hardware manual for + * usage. */ + } MSTPCRE_b; + }; + + union { - __IOM uint32_t MSTPE0 : 1; /*!< [0..0] Module stop bit 0. See device hardware manual for usage. */ - __IOM uint32_t MSTPE1 : 1; /*!< [1..1] Module stop bit 1. See device hardware manual for usage. */ - __IOM uint32_t MSTPE2 : 1; /*!< [2..2] Module stop bit 2. See device hardware manual for usage. */ - __IOM uint32_t MSTPE3 : 1; /*!< [3..3] Module stop bit 3. See device hardware manual for usage. */ - __IOM uint32_t MSTPE4 : 1; /*!< [4..4] Module stop bit 4. See device hardware manual for usage. */ - __IOM uint32_t MSTPE5 : 1; /*!< [5..5] Module stop bit 5. See device hardware manual for usage. */ - __IOM uint32_t MSTPE6 : 1; /*!< [6..6] Module stop bit 6. See device hardware manual for usage. */ - __IOM uint32_t MSTPE7 : 1; /*!< [7..7] Module stop bit 7. See device hardware manual for usage. */ - __IOM uint32_t MSTPE8 : 1; /*!< [8..8] Module stop bit 8. See device hardware manual for usage. */ - __IOM uint32_t MSTPE9 : 1; /*!< [9..9] Module stop bit 9. See device hardware manual for usage. */ - __IOM uint32_t MSTPE10 : 1; /*!< [10..10] Module stop bit 10. See device hardware manual for - * usage. */ - __IOM uint32_t MSTPE11 : 1; /*!< [11..11] Module stop bit 11. See device hardware manual for - * usage. */ - __IOM uint32_t MSTPE12 : 1; /*!< [12..12] Module stop bit 12. See device hardware manual for - * usage. */ - __IOM uint32_t MSTPE13 : 1; /*!< [13..13] Module stop bit 13. See device hardware manual for - * usage. */ - __IOM uint32_t MSTPE14 : 1; /*!< [14..14] Module stop bit 14. See device hardware manual for - * usage. */ - __IOM uint32_t MSTPE15 : 1; /*!< [15..15] Module stop bit 15. See device hardware manual for - * usage. */ - __IOM uint32_t MSTPE16 : 1; /*!< [16..16] Module stop bit 16. See device hardware manual for - * usage. */ - __IOM uint32_t MSTPE17 : 1; /*!< [17..17] Module stop bit 17. See device hardware manual for - * usage. */ - __IOM uint32_t MSTPE18 : 1; /*!< [18..18] Module stop bit 18. See device hardware manual for - * usage. */ - __IOM uint32_t MSTPE19 : 1; /*!< [19..19] Module stop bit 19. See device hardware manual for - * usage. */ - __IOM uint32_t MSTPE20 : 1; /*!< [20..20] Module stop bit 20. See device hardware manual for - * usage. */ - __IOM uint32_t MSTPE21 : 1; /*!< [21..21] Module stop bit 21. See device hardware manual for - * usage. */ - __IOM uint32_t MSTPE22 : 1; /*!< [22..22] Module stop bit 22. See device hardware manual for - * usage. */ - __IOM uint32_t MSTPE23 : 1; /*!< [23..23] Module stop bit 23. See device hardware manual for - * usage. */ - __IOM uint32_t MSTPE24 : 1; /*!< [24..24] Module stop bit 24. See device hardware manual for - * usage. */ - __IOM uint32_t MSTPE25 : 1; /*!< [25..25] Module stop bit 25. See device hardware manual for - * usage. */ - __IOM uint32_t MSTPE26 : 1; /*!< [26..26] Module stop bit 26. See device hardware manual for - * usage. */ - __IOM uint32_t MSTPE27 : 1; /*!< [27..27] Module stop bit 27. See device hardware manual for - * usage. */ - __IOM uint32_t MSTPE28 : 1; /*!< [28..28] Module stop bit 28. See device hardware manual for - * usage. */ - __IOM uint32_t MSTPE29 : 1; /*!< [29..29] Module stop bit 29. See device hardware manual for - * usage. */ - __IOM uint32_t MSTPE30 : 1; /*!< [30..30] Module stop bit 30. See device hardware manual for - * usage. */ - __IOM uint32_t MSTPE31 : 1; /*!< [31..31] Module stop bit 31. See device hardware manual for - * usage. */ - } MSTPCRE_b; + __IOM uint16_t LSMRWDIS; /*!< (@ 0x00000010) Low Speed Module R/W Disable Control Register */ + + struct + { + __IOM uint16_t RTCRWDIS : 1; /*!< [0..0] RTC Register R/W Enable Control */ + __IOM uint16_t WDTDIS : 1; /*!< [1..1] WDT Operate Clock Control */ + __IOM uint16_t IWDTIDS : 1; /*!< [2..2] IWDT Register Clock Control */ + uint16_t : 4; + __IOM uint16_t WREN : 1; /*!< [7..7] Write Enable for bits [2:0] */ + __OM uint16_t PRKEY : 8; /*!< [15..8] LSMRWDIS Key Code */ + } LSMRWDIS_b; + }; }; -} R_MSTP_Type; /*!< Size = 20 (0x14) */ +} R_MSTP_Type; /*!< Size = 20 (0x14) */ /* =========================================================================================================================== */ /* ================ R_OPAMP ================ */ @@ -7949,11 +7967,23 @@ typedef struct /*!< (@ 0x40040D00) R_PMISC Structure struct { uint8_t : 6; - __IOM uint8_t PFSWE : 1; /*!< [6..6] PmnPFS Register Write */ - __IOM uint8_t B0WI : 1; /*!< [7..7] PFSWE Bit Write Disable */ + __IOM uint8_t PFSWE : 1; /*!< [6..6] PmnPFS Register Write */ + __IOM uint8_t B0WI : 1; /*!< [7..7] PFSWE Bit Write Disable */ } PWPRS_b; }; - __IM uint16_t RESERVED2[5]; + __IM uint16_t RESERVED2[4]; + __IM uint8_t RESERVED3; + + union + { + __IOM uint8_t PRWCNTR; /*!< (@ 0x0000000F) Port Read Wait Control Register */ + + struct + { + __IOM uint8_t WAIT : 2; /*!< [1..0] Wait Cycle Control */ + uint8_t : 6; + } PRWCNTR_b; + }; __IOM R_PMISC_PMSAR_Type PMSAR[12]; /*!< (@ 0x00000010) Port Security Attribution Register */ } R_PMISC_Type; /*!< Size = 40 (0x28) */ @@ -11579,29 +11609,37 @@ typedef struct /*!< (@ 0x4001E000) R_SYSTEM Structure typedef struct /*!< (@ 0x407EC000) R_TSN Structure */ { - __IM uint8_t RESERVED[552]; + __IM uint16_t RESERVED[276]; union { - __IM uint8_t TSCDRL; /*!< (@ 0x00000228) Temperature Sensor Calibration Data Register - * L */ + __IM uint16_t TSCDR; /*!< (@ 0x00000228) Temperature Sensor Calibration Data Register */ struct { - __IM uint8_t TSCDRL : 8; /*!< [7..0] The calibration data stores the lower 8 bits of the convertedvalue. */ - } TSCDRL_b; - }; + union + { + __IM uint8_t TSCDRL; /*!< (@ 0x00000228) Temperature Sensor Calibration Data Register + * L */ - union - { - __IM uint8_t TSCDRH; /*!< (@ 0x00000229) Temperature Sensor Calibration Data Register - * H */ + struct + { + __IM uint8_t TSCDRL : 8; /*!< [7..0] The calibration data stores the lower 8 bits of the convertedvalue. */ + } TSCDRL_b; + }; - struct - { - __IM uint8_t TSCDRH : 8; /*!< [7..0] The calibration data stores the higher 8 bits of the - * convertedvalue. */ - } TSCDRH_b; + union + { + __IM uint8_t TSCDRH; /*!< (@ 0x00000229) Temperature Sensor Calibration Data Register + * H */ + + struct + { + __IM uint8_t TSCDRH : 8; /*!< [7..0] The calibration data stores the higher 8 bits of the + * convertedvalue. */ + } TSCDRH_b; + }; + }; }; } R_TSN_Type; /*!< Size = 554 (0x22a) */ @@ -12984,16 +13022,16 @@ typedef struct /*!< (@ 0x40084000) R_AGTX0 Structure #define R_TSN ((R_TSN_Type *) R_TSN_BASE) #define R_USB_FS0 ((R_USB_FS0_Type *) R_USB_FS0_BASE) #define R_WDT ((R_WDT_Type *) R_WDT_BASE) - #define R_AGTX0 ((R_AGTX0_Type *) R_AGTX0_BASE) - #define R_AGTX1 ((R_AGTX0_Type *) R_AGTX1_BASE) - #define R_AGTX2 ((R_AGTX0_Type *) R_AGTX2_BASE) - #define R_AGTX3 ((R_AGTX0_Type *) R_AGTX3_BASE) - #define R_AGTX4 ((R_AGTX0_Type *) R_AGTX4_BASE) - #define R_AGTX5 ((R_AGTX0_Type *) R_AGTX5_BASE) - #define R_AGTX6 ((R_AGTX0_Type *) R_AGTX6_BASE) - #define R_AGTX7 ((R_AGTX0_Type *) R_AGTX7_BASE) - #define R_AGTX8 ((R_AGTX0_Type *) R_AGTX8_BASE) - #define R_AGTX9 ((R_AGTX0_Type *) R_AGTX9_BASE) + #define R_AGT0 ((R_AGTX0_Type *) R_AGTX0_BASE) + #define R_AGT1 ((R_AGTX0_Type *) R_AGTX1_BASE) + #define R_AGT2 ((R_AGTX0_Type *) R_AGTX2_BASE) + #define R_AGT3 ((R_AGTX0_Type *) R_AGTX3_BASE) + #define R_AGT4 ((R_AGTX0_Type *) R_AGTX4_BASE) + #define R_AGT5 ((R_AGTX0_Type *) R_AGTX5_BASE) + #define R_AGT6 ((R_AGTX0_Type *) R_AGTX6_BASE) + #define R_AGT7 ((R_AGTX0_Type *) R_AGTX7_BASE) + #define R_AGT8 ((R_AGTX0_Type *) R_AGTX8_BASE) + #define R_AGT9 ((R_AGTX0_Type *) R_AGTX9_BASE) /** @} */ /* End of group Device_Peripheral_declaration */ @@ -16418,20 +16456,31 @@ typedef struct /*!< (@ 0x40084000) R_AGTX0 Structure /* =========================================================================================================================== */ /* ======================================================== MSTPCRA ======================================================== */ - #define R_MSTP_MSTPCRA_MSTPA_Pos (0UL) /*!< MSTPA (Bit 0) */ - #define R_MSTP_MSTPCRA_MSTPA_Msk (0x1UL) /*!< MSTPA (Bitfield-Mask: 0x01) */ + #define R_MSTP_MSTPCRA_MSTPA_Pos (0UL) /*!< MSTPA (Bit 0) */ + #define R_MSTP_MSTPCRA_MSTPA_Msk (0x1UL) /*!< MSTPA (Bitfield-Mask: 0x01) */ /* ======================================================== MSTPCRB ======================================================== */ - #define R_MSTP_MSTPCRB_MSTPB_Pos (0UL) /*!< MSTPB (Bit 0) */ - #define R_MSTP_MSTPCRB_MSTPB_Msk (0x1UL) /*!< MSTPB (Bitfield-Mask: 0x01) */ + #define R_MSTP_MSTPCRB_MSTPB_Pos (0UL) /*!< MSTPB (Bit 0) */ + #define R_MSTP_MSTPCRB_MSTPB_Msk (0x1UL) /*!< MSTPB (Bitfield-Mask: 0x01) */ /* ======================================================== MSTPCRC ======================================================== */ - #define R_MSTP_MSTPCRC_MSTPC_Pos (0UL) /*!< MSTPC (Bit 0) */ - #define R_MSTP_MSTPCRC_MSTPC_Msk (0x1UL) /*!< MSTPC (Bitfield-Mask: 0x01) */ + #define R_MSTP_MSTPCRC_MSTPC_Pos (0UL) /*!< MSTPC (Bit 0) */ + #define R_MSTP_MSTPCRC_MSTPC_Msk (0x1UL) /*!< MSTPC (Bitfield-Mask: 0x01) */ /* ======================================================== MSTPCRD ======================================================== */ - #define R_MSTP_MSTPCRD_MSTPD_Pos (0UL) /*!< MSTPD (Bit 0) */ - #define R_MSTP_MSTPCRD_MSTPD_Msk (0x1UL) /*!< MSTPD (Bitfield-Mask: 0x01) */ + #define R_MSTP_MSTPCRD_MSTPD_Pos (0UL) /*!< MSTPD (Bit 0) */ + #define R_MSTP_MSTPCRD_MSTPD_Msk (0x1UL) /*!< MSTPD (Bitfield-Mask: 0x01) */ /* ======================================================== MSTPCRE ======================================================== */ - #define R_MSTP_MSTPCRE_MSTPE_Pos (0UL) /*!< MSTPE (Bit 0) */ - #define R_MSTP_MSTPCRE_MSTPE_Msk (0x1UL) /*!< MSTPE (Bitfield-Mask: 0x01) */ + #define R_MSTP_MSTPCRE_MSTPE_Pos (0UL) /*!< MSTPE (Bit 0) */ + #define R_MSTP_MSTPCRE_MSTPE_Msk (0x1UL) /*!< MSTPE (Bitfield-Mask: 0x01) */ +/* ======================================================= LSMRWDIS ======================================================== */ + #define R_MSTP_LSMRWDIS_RTCRWDIS_Pos (0UL) /*!< RTCRWDIS (Bit 0) */ + #define R_MSTP_LSMRWDIS_RTCRWDIS_Msk (0x1UL) /*!< RTCRWDIS (Bitfield-Mask: 0x01) */ + #define R_MSTP_LSMRWDIS_WDTDIS_Pos (1UL) /*!< WDTDIS (Bit 1) */ + #define R_MSTP_LSMRWDIS_WDTDIS_Msk (0x2UL) /*!< WDTDIS (Bitfield-Mask: 0x01) */ + #define R_MSTP_LSMRWDIS_IWDTIDS_Pos (2UL) /*!< IWDTIDS (Bit 2) */ + #define R_MSTP_LSMRWDIS_IWDTIDS_Msk (0x4UL) /*!< IWDTIDS (Bitfield-Mask: 0x01) */ + #define R_MSTP_LSMRWDIS_WREN_Pos (7UL) /*!< WREN (Bit 7) */ + #define R_MSTP_LSMRWDIS_WREN_Msk (0x80UL) /*!< WREN (Bitfield-Mask: 0x01) */ + #define R_MSTP_LSMRWDIS_PRKEY_Pos (8UL) /*!< PRKEY (Bit 8) */ + #define R_MSTP_LSMRWDIS_PRKEY_Msk (0xff00UL) /*!< PRKEY (Bitfield-Mask: 0xff) */ /* =========================================================================================================================== */ /* ================ R_OPAMP ================ */ @@ -16535,6 +16584,9 @@ typedef struct /*!< (@ 0x40084000) R_AGTX0 Structure #define R_PMISC_PWPRS_PFSWE_Msk (0x40UL) /*!< PFSWE (Bitfield-Mask: 0x01) */ #define R_PMISC_PWPRS_B0WI_Pos (7UL) /*!< B0WI (Bit 7) */ #define R_PMISC_PWPRS_B0WI_Msk (0x80UL) /*!< B0WI (Bitfield-Mask: 0x01) */ +/* ======================================================== PRWCNTR ======================================================== */ + #define R_PMISC_PRWCNTR_WAIT_Pos (0UL) /*!< WAIT (Bit 0) */ + #define R_PMISC_PRWCNTR_WAIT_Msk (0x3UL) /*!< WAIT (Bitfield-Mask: 0x03) */ /* =========================================================================================================================== */ /* ================ R_RTC ================ */ @@ -18206,6 +18258,7 @@ typedef struct /*!< (@ 0x40084000) R_AGTX0 Structure /* ================ R_TSN ================ */ /* =========================================================================================================================== */ +/* ========================================================= TSCDR ========================================================= */ /* ======================================================== TSCDRH ========================================================= */ #define R_TSN_TSCDRH_TSCDRH_Pos (0UL) /*!< TSCDRH (Bit 0) */ #define R_TSN_TSCDRH_TSCDRH_Msk (0xffUL) /*!< TSCDRH (Bitfield-Mask: 0xff) */ diff --git a/ra/fsp/src/bsp/cmsis/Device/RENESAS/Include/R7FA6E10F.h b/ra/fsp/src/bsp/cmsis/Device/RENESAS/Include/R7FA6E10F.h index d4048b42b..295f3cee3 100644 --- a/ra/fsp/src/bsp/cmsis/Device/RENESAS/Include/R7FA6E10F.h +++ b/ra/fsp/src/bsp/cmsis/Device/RENESAS/Include/R7FA6E10F.h @@ -7865,67 +7865,85 @@ typedef struct /*!< (@ 0x40084000) R_MSTP Structure union { - __IOM uint32_t MSTPCRE; /*!< (@ 0x00000010) Module Stop Control Register E */ + union + { + __IOM uint32_t MSTPCRE; /*!< (@ 0x00000010) Module Stop Control Register E */ - struct + struct + { + __IOM uint32_t MSTPE0 : 1; /*!< [0..0] Module stop bit 0. See device hardware manual for usage. */ + __IOM uint32_t MSTPE1 : 1; /*!< [1..1] Module stop bit 1. See device hardware manual for usage. */ + __IOM uint32_t MSTPE2 : 1; /*!< [2..2] Module stop bit 2. See device hardware manual for usage. */ + __IOM uint32_t MSTPE3 : 1; /*!< [3..3] Module stop bit 3. See device hardware manual for usage. */ + __IOM uint32_t MSTPE4 : 1; /*!< [4..4] Module stop bit 4. See device hardware manual for usage. */ + __IOM uint32_t MSTPE5 : 1; /*!< [5..5] Module stop bit 5. See device hardware manual for usage. */ + __IOM uint32_t MSTPE6 : 1; /*!< [6..6] Module stop bit 6. See device hardware manual for usage. */ + __IOM uint32_t MSTPE7 : 1; /*!< [7..7] Module stop bit 7. See device hardware manual for usage. */ + __IOM uint32_t MSTPE8 : 1; /*!< [8..8] Module stop bit 8. See device hardware manual for usage. */ + __IOM uint32_t MSTPE9 : 1; /*!< [9..9] Module stop bit 9. See device hardware manual for usage. */ + __IOM uint32_t MSTPE10 : 1; /*!< [10..10] Module stop bit 10. See device hardware manual for + * usage. */ + __IOM uint32_t MSTPE11 : 1; /*!< [11..11] Module stop bit 11. See device hardware manual for + * usage. */ + __IOM uint32_t MSTPE12 : 1; /*!< [12..12] Module stop bit 12. See device hardware manual for + * usage. */ + __IOM uint32_t MSTPE13 : 1; /*!< [13..13] Module stop bit 13. See device hardware manual for + * usage. */ + __IOM uint32_t MSTPE14 : 1; /*!< [14..14] Module stop bit 14. See device hardware manual for + * usage. */ + __IOM uint32_t MSTPE15 : 1; /*!< [15..15] Module stop bit 15. See device hardware manual for + * usage. */ + __IOM uint32_t MSTPE16 : 1; /*!< [16..16] Module stop bit 16. See device hardware manual for + * usage. */ + __IOM uint32_t MSTPE17 : 1; /*!< [17..17] Module stop bit 17. See device hardware manual for + * usage. */ + __IOM uint32_t MSTPE18 : 1; /*!< [18..18] Module stop bit 18. See device hardware manual for + * usage. */ + __IOM uint32_t MSTPE19 : 1; /*!< [19..19] Module stop bit 19. See device hardware manual for + * usage. */ + __IOM uint32_t MSTPE20 : 1; /*!< [20..20] Module stop bit 20. See device hardware manual for + * usage. */ + __IOM uint32_t MSTPE21 : 1; /*!< [21..21] Module stop bit 21. See device hardware manual for + * usage. */ + __IOM uint32_t MSTPE22 : 1; /*!< [22..22] Module stop bit 22. See device hardware manual for + * usage. */ + __IOM uint32_t MSTPE23 : 1; /*!< [23..23] Module stop bit 23. See device hardware manual for + * usage. */ + __IOM uint32_t MSTPE24 : 1; /*!< [24..24] Module stop bit 24. See device hardware manual for + * usage. */ + __IOM uint32_t MSTPE25 : 1; /*!< [25..25] Module stop bit 25. See device hardware manual for + * usage. */ + __IOM uint32_t MSTPE26 : 1; /*!< [26..26] Module stop bit 26. See device hardware manual for + * usage. */ + __IOM uint32_t MSTPE27 : 1; /*!< [27..27] Module stop bit 27. See device hardware manual for + * usage. */ + __IOM uint32_t MSTPE28 : 1; /*!< [28..28] Module stop bit 28. See device hardware manual for + * usage. */ + __IOM uint32_t MSTPE29 : 1; /*!< [29..29] Module stop bit 29. See device hardware manual for + * usage. */ + __IOM uint32_t MSTPE30 : 1; /*!< [30..30] Module stop bit 30. See device hardware manual for + * usage. */ + __IOM uint32_t MSTPE31 : 1; /*!< [31..31] Module stop bit 31. See device hardware manual for + * usage. */ + } MSTPCRE_b; + }; + + union { - __IOM uint32_t MSTPE0 : 1; /*!< [0..0] Module stop bit 0. See device hardware manual for usage. */ - __IOM uint32_t MSTPE1 : 1; /*!< [1..1] Module stop bit 1. See device hardware manual for usage. */ - __IOM uint32_t MSTPE2 : 1; /*!< [2..2] Module stop bit 2. See device hardware manual for usage. */ - __IOM uint32_t MSTPE3 : 1; /*!< [3..3] Module stop bit 3. See device hardware manual for usage. */ - __IOM uint32_t MSTPE4 : 1; /*!< [4..4] Module stop bit 4. See device hardware manual for usage. */ - __IOM uint32_t MSTPE5 : 1; /*!< [5..5] Module stop bit 5. See device hardware manual for usage. */ - __IOM uint32_t MSTPE6 : 1; /*!< [6..6] Module stop bit 6. See device hardware manual for usage. */ - __IOM uint32_t MSTPE7 : 1; /*!< [7..7] Module stop bit 7. See device hardware manual for usage. */ - __IOM uint32_t MSTPE8 : 1; /*!< [8..8] Module stop bit 8. See device hardware manual for usage. */ - __IOM uint32_t MSTPE9 : 1; /*!< [9..9] Module stop bit 9. See device hardware manual for usage. */ - __IOM uint32_t MSTPE10 : 1; /*!< [10..10] Module stop bit 10. See device hardware manual for - * usage. */ - __IOM uint32_t MSTPE11 : 1; /*!< [11..11] Module stop bit 11. See device hardware manual for - * usage. */ - __IOM uint32_t MSTPE12 : 1; /*!< [12..12] Module stop bit 12. See device hardware manual for - * usage. */ - __IOM uint32_t MSTPE13 : 1; /*!< [13..13] Module stop bit 13. See device hardware manual for - * usage. */ - __IOM uint32_t MSTPE14 : 1; /*!< [14..14] Module stop bit 14. See device hardware manual for - * usage. */ - __IOM uint32_t MSTPE15 : 1; /*!< [15..15] Module stop bit 15. See device hardware manual for - * usage. */ - __IOM uint32_t MSTPE16 : 1; /*!< [16..16] Module stop bit 16. See device hardware manual for - * usage. */ - __IOM uint32_t MSTPE17 : 1; /*!< [17..17] Module stop bit 17. See device hardware manual for - * usage. */ - __IOM uint32_t MSTPE18 : 1; /*!< [18..18] Module stop bit 18. See device hardware manual for - * usage. */ - __IOM uint32_t MSTPE19 : 1; /*!< [19..19] Module stop bit 19. See device hardware manual for - * usage. */ - __IOM uint32_t MSTPE20 : 1; /*!< [20..20] Module stop bit 20. See device hardware manual for - * usage. */ - __IOM uint32_t MSTPE21 : 1; /*!< [21..21] Module stop bit 21. See device hardware manual for - * usage. */ - __IOM uint32_t MSTPE22 : 1; /*!< [22..22] Module stop bit 22. See device hardware manual for - * usage. */ - __IOM uint32_t MSTPE23 : 1; /*!< [23..23] Module stop bit 23. See device hardware manual for - * usage. */ - __IOM uint32_t MSTPE24 : 1; /*!< [24..24] Module stop bit 24. See device hardware manual for - * usage. */ - __IOM uint32_t MSTPE25 : 1; /*!< [25..25] Module stop bit 25. See device hardware manual for - * usage. */ - __IOM uint32_t MSTPE26 : 1; /*!< [26..26] Module stop bit 26. See device hardware manual for - * usage. */ - __IOM uint32_t MSTPE27 : 1; /*!< [27..27] Module stop bit 27. See device hardware manual for - * usage. */ - __IOM uint32_t MSTPE28 : 1; /*!< [28..28] Module stop bit 28. See device hardware manual for - * usage. */ - __IOM uint32_t MSTPE29 : 1; /*!< [29..29] Module stop bit 29. See device hardware manual for - * usage. */ - __IOM uint32_t MSTPE30 : 1; /*!< [30..30] Module stop bit 30. See device hardware manual for - * usage. */ - __IOM uint32_t MSTPE31 : 1; /*!< [31..31] Module stop bit 31. See device hardware manual for - * usage. */ - } MSTPCRE_b; + __IOM uint16_t LSMRWDIS; /*!< (@ 0x00000010) Low Speed Module R/W Disable Control Register */ + + struct + { + __IOM uint16_t RTCRWDIS : 1; /*!< [0..0] RTC Register R/W Enable Control */ + __IOM uint16_t WDTDIS : 1; /*!< [1..1] WDT Operate Clock Control */ + __IOM uint16_t IWDTIDS : 1; /*!< [2..2] IWDT Register Clock Control */ + uint16_t : 4; + __IOM uint16_t WREN : 1; /*!< [7..7] Write Enable for bits [2:0] */ + __OM uint16_t PRKEY : 8; /*!< [15..8] LSMRWDIS Key Code */ + } LSMRWDIS_b; + }; }; -} R_MSTP_Type; /*!< Size = 20 (0x14) */ +} R_MSTP_Type; /*!< Size = 20 (0x14) */ /* =========================================================================================================================== */ /* ================ R_PORT0 ================ */ @@ -8267,11 +8285,23 @@ typedef struct /*!< (@ 0x40080D00) R_PMISC Structure struct { uint8_t : 6; - __IOM uint8_t PFSWE : 1; /*!< [6..6] PmnPFS Register Write */ - __IOM uint8_t B0WI : 1; /*!< [7..7] PFSWE Bit Write Disable */ + __IOM uint8_t PFSWE : 1; /*!< [6..6] PmnPFS Register Write */ + __IOM uint8_t B0WI : 1; /*!< [7..7] PFSWE Bit Write Disable */ } PWPRS_b; }; - __IM uint16_t RESERVED2[5]; + __IM uint16_t RESERVED2[4]; + __IM uint8_t RESERVED3; + + union + { + __IOM uint8_t PRWCNTR; /*!< (@ 0x0000000F) Port Read Wait Control Register */ + + struct + { + __IOM uint8_t WAIT : 2; /*!< [1..0] Wait Cycle Control */ + uint8_t : 6; + } PRWCNTR_b; + }; __IOM R_PMISC_PMSAR_Type PMSAR[12]; /*!< (@ 0x00000010) Port Security Attribution Register */ } R_PMISC_Type; /*!< Size = 40 (0x28) */ @@ -14876,16 +14906,16 @@ typedef struct /*!< (@ 0x407FC000) R_FLAD Structure #define R_TZF ((R_TZF_Type *) R_TZF_BASE) #define R_CACHE ((R_CACHE_Type *) R_CACHE_BASE) #define R_CPSCU ((R_CPSCU_Type *) R_CPSCU_BASE) - #define R_AGTX0 ((R_AGTX0_Type *) R_AGTX0_BASE) - #define R_AGTX1 ((R_AGTX0_Type *) R_AGTX1_BASE) - #define R_AGTX2 ((R_AGTX0_Type *) R_AGTX2_BASE) - #define R_AGTX3 ((R_AGTX0_Type *) R_AGTX3_BASE) - #define R_AGTX4 ((R_AGTX0_Type *) R_AGTX4_BASE) - #define R_AGTX5 ((R_AGTX0_Type *) R_AGTX5_BASE) - #define R_AGTX6 ((R_AGTX0_Type *) R_AGTX6_BASE) - #define R_AGTX7 ((R_AGTX0_Type *) R_AGTX7_BASE) - #define R_AGTX8 ((R_AGTX0_Type *) R_AGTX8_BASE) - #define R_AGTX9 ((R_AGTX0_Type *) R_AGTX9_BASE) + #define R_AGT0 ((R_AGTX0_Type *) R_AGTX0_BASE) + #define R_AGT1 ((R_AGTX0_Type *) R_AGTX1_BASE) + #define R_AGT2 ((R_AGTX0_Type *) R_AGTX2_BASE) + #define R_AGT3 ((R_AGTX0_Type *) R_AGTX3_BASE) + #define R_AGT4 ((R_AGTX0_Type *) R_AGTX4_BASE) + #define R_AGT5 ((R_AGTX0_Type *) R_AGTX5_BASE) + #define R_AGT6 ((R_AGTX0_Type *) R_AGTX6_BASE) + #define R_AGT7 ((R_AGTX0_Type *) R_AGTX7_BASE) + #define R_AGT8 ((R_AGTX0_Type *) R_AGTX8_BASE) + #define R_AGT9 ((R_AGTX0_Type *) R_AGTX9_BASE) #define R_FLAD ((R_FLAD_Type *) R_FLAD_BASE) /** @} */ /* End of group Device_Peripheral_declaration */ @@ -18509,20 +18539,31 @@ typedef struct /*!< (@ 0x407FC000) R_FLAD Structure /* =========================================================================================================================== */ /* ======================================================== MSTPCRA ======================================================== */ - #define R_MSTP_MSTPCRA_MSTPA_Pos (0UL) /*!< MSTPA (Bit 0) */ - #define R_MSTP_MSTPCRA_MSTPA_Msk (0x1UL) /*!< MSTPA (Bitfield-Mask: 0x01) */ + #define R_MSTP_MSTPCRA_MSTPA_Pos (0UL) /*!< MSTPA (Bit 0) */ + #define R_MSTP_MSTPCRA_MSTPA_Msk (0x1UL) /*!< MSTPA (Bitfield-Mask: 0x01) */ /* ======================================================== MSTPCRB ======================================================== */ - #define R_MSTP_MSTPCRB_MSTPB_Pos (0UL) /*!< MSTPB (Bit 0) */ - #define R_MSTP_MSTPCRB_MSTPB_Msk (0x1UL) /*!< MSTPB (Bitfield-Mask: 0x01) */ + #define R_MSTP_MSTPCRB_MSTPB_Pos (0UL) /*!< MSTPB (Bit 0) */ + #define R_MSTP_MSTPCRB_MSTPB_Msk (0x1UL) /*!< MSTPB (Bitfield-Mask: 0x01) */ /* ======================================================== MSTPCRC ======================================================== */ - #define R_MSTP_MSTPCRC_MSTPC_Pos (0UL) /*!< MSTPC (Bit 0) */ - #define R_MSTP_MSTPCRC_MSTPC_Msk (0x1UL) /*!< MSTPC (Bitfield-Mask: 0x01) */ + #define R_MSTP_MSTPCRC_MSTPC_Pos (0UL) /*!< MSTPC (Bit 0) */ + #define R_MSTP_MSTPCRC_MSTPC_Msk (0x1UL) /*!< MSTPC (Bitfield-Mask: 0x01) */ /* ======================================================== MSTPCRD ======================================================== */ - #define R_MSTP_MSTPCRD_MSTPD_Pos (0UL) /*!< MSTPD (Bit 0) */ - #define R_MSTP_MSTPCRD_MSTPD_Msk (0x1UL) /*!< MSTPD (Bitfield-Mask: 0x01) */ + #define R_MSTP_MSTPCRD_MSTPD_Pos (0UL) /*!< MSTPD (Bit 0) */ + #define R_MSTP_MSTPCRD_MSTPD_Msk (0x1UL) /*!< MSTPD (Bitfield-Mask: 0x01) */ /* ======================================================== MSTPCRE ======================================================== */ - #define R_MSTP_MSTPCRE_MSTPE_Pos (0UL) /*!< MSTPE (Bit 0) */ - #define R_MSTP_MSTPCRE_MSTPE_Msk (0x1UL) /*!< MSTPE (Bitfield-Mask: 0x01) */ + #define R_MSTP_MSTPCRE_MSTPE_Pos (0UL) /*!< MSTPE (Bit 0) */ + #define R_MSTP_MSTPCRE_MSTPE_Msk (0x1UL) /*!< MSTPE (Bitfield-Mask: 0x01) */ +/* ======================================================= LSMRWDIS ======================================================== */ + #define R_MSTP_LSMRWDIS_RTCRWDIS_Pos (0UL) /*!< RTCRWDIS (Bit 0) */ + #define R_MSTP_LSMRWDIS_RTCRWDIS_Msk (0x1UL) /*!< RTCRWDIS (Bitfield-Mask: 0x01) */ + #define R_MSTP_LSMRWDIS_WDTDIS_Pos (1UL) /*!< WDTDIS (Bit 1) */ + #define R_MSTP_LSMRWDIS_WDTDIS_Msk (0x2UL) /*!< WDTDIS (Bitfield-Mask: 0x01) */ + #define R_MSTP_LSMRWDIS_IWDTIDS_Pos (2UL) /*!< IWDTIDS (Bit 2) */ + #define R_MSTP_LSMRWDIS_IWDTIDS_Msk (0x4UL) /*!< IWDTIDS (Bitfield-Mask: 0x01) */ + #define R_MSTP_LSMRWDIS_WREN_Pos (7UL) /*!< WREN (Bit 7) */ + #define R_MSTP_LSMRWDIS_WREN_Msk (0x80UL) /*!< WREN (Bitfield-Mask: 0x01) */ + #define R_MSTP_LSMRWDIS_PRKEY_Pos (8UL) /*!< PRKEY (Bit 8) */ + #define R_MSTP_LSMRWDIS_PRKEY_Msk (0xff00UL) /*!< PRKEY (Bitfield-Mask: 0xff) */ /* =========================================================================================================================== */ /* ================ R_PORT0 ================ */ @@ -18596,6 +18637,9 @@ typedef struct /*!< (@ 0x407FC000) R_FLAD Structure #define R_PMISC_PWPRS_PFSWE_Msk (0x40UL) /*!< PFSWE (Bitfield-Mask: 0x01) */ #define R_PMISC_PWPRS_B0WI_Pos (7UL) /*!< B0WI (Bit 7) */ #define R_PMISC_PWPRS_B0WI_Msk (0x80UL) /*!< B0WI (Bitfield-Mask: 0x01) */ +/* ======================================================== PRWCNTR ======================================================== */ + #define R_PMISC_PRWCNTR_WAIT_Pos (0UL) /*!< WAIT (Bit 0) */ + #define R_PMISC_PRWCNTR_WAIT_Msk (0x3UL) /*!< WAIT (Bitfield-Mask: 0x03) */ /* =========================================================================================================================== */ /* ================ R_QSPI ================ */ diff --git a/ra/fsp/src/bsp/cmsis/Device/RENESAS/Include/R7FA6E2BB.h b/ra/fsp/src/bsp/cmsis/Device/RENESAS/Include/R7FA6E2BB.h index 1ecf99251..1abd45f0b 100644 --- a/ra/fsp/src/bsp/cmsis/Device/RENESAS/Include/R7FA6E2BB.h +++ b/ra/fsp/src/bsp/cmsis/Device/RENESAS/Include/R7FA6E2BB.h @@ -8770,67 +8770,85 @@ typedef struct /*!< (@ 0x40084000) R_MSTP Structure union { - __IOM uint32_t MSTPCRE; /*!< (@ 0x00000010) Module Stop Control Register E */ + union + { + __IOM uint32_t MSTPCRE; /*!< (@ 0x00000010) Module Stop Control Register E */ - struct + struct + { + __IOM uint32_t MSTPE0 : 1; /*!< [0..0] Module stop bit 0. See device hardware manual for usage. */ + __IOM uint32_t MSTPE1 : 1; /*!< [1..1] Module stop bit 1. See device hardware manual for usage. */ + __IOM uint32_t MSTPE2 : 1; /*!< [2..2] Module stop bit 2. See device hardware manual for usage. */ + __IOM uint32_t MSTPE3 : 1; /*!< [3..3] Module stop bit 3. See device hardware manual for usage. */ + __IOM uint32_t MSTPE4 : 1; /*!< [4..4] Module stop bit 4. See device hardware manual for usage. */ + __IOM uint32_t MSTPE5 : 1; /*!< [5..5] Module stop bit 5. See device hardware manual for usage. */ + __IOM uint32_t MSTPE6 : 1; /*!< [6..6] Module stop bit 6. See device hardware manual for usage. */ + __IOM uint32_t MSTPE7 : 1; /*!< [7..7] Module stop bit 7. See device hardware manual for usage. */ + __IOM uint32_t MSTPE8 : 1; /*!< [8..8] Module stop bit 8. See device hardware manual for usage. */ + __IOM uint32_t MSTPE9 : 1; /*!< [9..9] Module stop bit 9. See device hardware manual for usage. */ + __IOM uint32_t MSTPE10 : 1; /*!< [10..10] Module stop bit 10. See device hardware manual for + * usage. */ + __IOM uint32_t MSTPE11 : 1; /*!< [11..11] Module stop bit 11. See device hardware manual for + * usage. */ + __IOM uint32_t MSTPE12 : 1; /*!< [12..12] Module stop bit 12. See device hardware manual for + * usage. */ + __IOM uint32_t MSTPE13 : 1; /*!< [13..13] Module stop bit 13. See device hardware manual for + * usage. */ + __IOM uint32_t MSTPE14 : 1; /*!< [14..14] Module stop bit 14. See device hardware manual for + * usage. */ + __IOM uint32_t MSTPE15 : 1; /*!< [15..15] Module stop bit 15. See device hardware manual for + * usage. */ + __IOM uint32_t MSTPE16 : 1; /*!< [16..16] Module stop bit 16. See device hardware manual for + * usage. */ + __IOM uint32_t MSTPE17 : 1; /*!< [17..17] Module stop bit 17. See device hardware manual for + * usage. */ + __IOM uint32_t MSTPE18 : 1; /*!< [18..18] Module stop bit 18. See device hardware manual for + * usage. */ + __IOM uint32_t MSTPE19 : 1; /*!< [19..19] Module stop bit 19. See device hardware manual for + * usage. */ + __IOM uint32_t MSTPE20 : 1; /*!< [20..20] Module stop bit 20. See device hardware manual for + * usage. */ + __IOM uint32_t MSTPE21 : 1; /*!< [21..21] Module stop bit 21. See device hardware manual for + * usage. */ + __IOM uint32_t MSTPE22 : 1; /*!< [22..22] Module stop bit 22. See device hardware manual for + * usage. */ + __IOM uint32_t MSTPE23 : 1; /*!< [23..23] Module stop bit 23. See device hardware manual for + * usage. */ + __IOM uint32_t MSTPE24 : 1; /*!< [24..24] Module stop bit 24. See device hardware manual for + * usage. */ + __IOM uint32_t MSTPE25 : 1; /*!< [25..25] Module stop bit 25. See device hardware manual for + * usage. */ + __IOM uint32_t MSTPE26 : 1; /*!< [26..26] Module stop bit 26. See device hardware manual for + * usage. */ + __IOM uint32_t MSTPE27 : 1; /*!< [27..27] Module stop bit 27. See device hardware manual for + * usage. */ + __IOM uint32_t MSTPE28 : 1; /*!< [28..28] Module stop bit 28. See device hardware manual for + * usage. */ + __IOM uint32_t MSTPE29 : 1; /*!< [29..29] Module stop bit 29. See device hardware manual for + * usage. */ + __IOM uint32_t MSTPE30 : 1; /*!< [30..30] Module stop bit 30. See device hardware manual for + * usage. */ + __IOM uint32_t MSTPE31 : 1; /*!< [31..31] Module stop bit 31. See device hardware manual for + * usage. */ + } MSTPCRE_b; + }; + + union { - __IOM uint32_t MSTPE0 : 1; /*!< [0..0] Module stop bit 0. See device hardware manual for usage. */ - __IOM uint32_t MSTPE1 : 1; /*!< [1..1] Module stop bit 1. See device hardware manual for usage. */ - __IOM uint32_t MSTPE2 : 1; /*!< [2..2] Module stop bit 2. See device hardware manual for usage. */ - __IOM uint32_t MSTPE3 : 1; /*!< [3..3] Module stop bit 3. See device hardware manual for usage. */ - __IOM uint32_t MSTPE4 : 1; /*!< [4..4] Module stop bit 4. See device hardware manual for usage. */ - __IOM uint32_t MSTPE5 : 1; /*!< [5..5] Module stop bit 5. See device hardware manual for usage. */ - __IOM uint32_t MSTPE6 : 1; /*!< [6..6] Module stop bit 6. See device hardware manual for usage. */ - __IOM uint32_t MSTPE7 : 1; /*!< [7..7] Module stop bit 7. See device hardware manual for usage. */ - __IOM uint32_t MSTPE8 : 1; /*!< [8..8] Module stop bit 8. See device hardware manual for usage. */ - __IOM uint32_t MSTPE9 : 1; /*!< [9..9] Module stop bit 9. See device hardware manual for usage. */ - __IOM uint32_t MSTPE10 : 1; /*!< [10..10] Module stop bit 10. See device hardware manual for - * usage. */ - __IOM uint32_t MSTPE11 : 1; /*!< [11..11] Module stop bit 11. See device hardware manual for - * usage. */ - __IOM uint32_t MSTPE12 : 1; /*!< [12..12] Module stop bit 12. See device hardware manual for - * usage. */ - __IOM uint32_t MSTPE13 : 1; /*!< [13..13] Module stop bit 13. See device hardware manual for - * usage. */ - __IOM uint32_t MSTPE14 : 1; /*!< [14..14] Module stop bit 14. See device hardware manual for - * usage. */ - __IOM uint32_t MSTPE15 : 1; /*!< [15..15] Module stop bit 15. See device hardware manual for - * usage. */ - __IOM uint32_t MSTPE16 : 1; /*!< [16..16] Module stop bit 16. See device hardware manual for - * usage. */ - __IOM uint32_t MSTPE17 : 1; /*!< [17..17] Module stop bit 17. See device hardware manual for - * usage. */ - __IOM uint32_t MSTPE18 : 1; /*!< [18..18] Module stop bit 18. See device hardware manual for - * usage. */ - __IOM uint32_t MSTPE19 : 1; /*!< [19..19] Module stop bit 19. See device hardware manual for - * usage. */ - __IOM uint32_t MSTPE20 : 1; /*!< [20..20] Module stop bit 20. See device hardware manual for - * usage. */ - __IOM uint32_t MSTPE21 : 1; /*!< [21..21] Module stop bit 21. See device hardware manual for - * usage. */ - __IOM uint32_t MSTPE22 : 1; /*!< [22..22] Module stop bit 22. See device hardware manual for - * usage. */ - __IOM uint32_t MSTPE23 : 1; /*!< [23..23] Module stop bit 23. See device hardware manual for - * usage. */ - __IOM uint32_t MSTPE24 : 1; /*!< [24..24] Module stop bit 24. See device hardware manual for - * usage. */ - __IOM uint32_t MSTPE25 : 1; /*!< [25..25] Module stop bit 25. See device hardware manual for - * usage. */ - __IOM uint32_t MSTPE26 : 1; /*!< [26..26] Module stop bit 26. See device hardware manual for - * usage. */ - __IOM uint32_t MSTPE27 : 1; /*!< [27..27] Module stop bit 27. See device hardware manual for - * usage. */ - __IOM uint32_t MSTPE28 : 1; /*!< [28..28] Module stop bit 28. See device hardware manual for - * usage. */ - __IOM uint32_t MSTPE29 : 1; /*!< [29..29] Module stop bit 29. See device hardware manual for - * usage. */ - __IOM uint32_t MSTPE30 : 1; /*!< [30..30] Module stop bit 30. See device hardware manual for - * usage. */ - __IOM uint32_t MSTPE31 : 1; /*!< [31..31] Module stop bit 31. See device hardware manual for - * usage. */ - } MSTPCRE_b; + __IOM uint16_t LSMRWDIS; /*!< (@ 0x00000010) Low Speed Module R/W Disable Control Register */ + + struct + { + __IOM uint16_t RTCRWDIS : 1; /*!< [0..0] RTC Register R/W Enable Control */ + __IOM uint16_t WDTDIS : 1; /*!< [1..1] WDT Operate Clock Control */ + __IOM uint16_t IWDTIDS : 1; /*!< [2..2] IWDT Register Clock Control */ + uint16_t : 4; + __IOM uint16_t WREN : 1; /*!< [7..7] Write Enable for bits [2:0] */ + __OM uint16_t PRKEY : 8; /*!< [15..8] LSMRWDIS Key Code */ + } LSMRWDIS_b; + }; }; -} R_MSTP_Type; /*!< Size = 20 (0x14) */ +} R_MSTP_Type; /*!< Size = 20 (0x14) */ /* =========================================================================================================================== */ /* ================ R_PORT0 ================ */ @@ -9172,11 +9190,23 @@ typedef struct /*!< (@ 0x40080D00) R_PMISC Structure struct { uint8_t : 6; - __IOM uint8_t PFSWE : 1; /*!< [6..6] PmnPFS Register Write */ - __IOM uint8_t B0WI : 1; /*!< [7..7] PFSWE Bit Write Disable */ + __IOM uint8_t PFSWE : 1; /*!< [6..6] PmnPFS Register Write */ + __IOM uint8_t B0WI : 1; /*!< [7..7] PFSWE Bit Write Disable */ } PWPRS_b; }; - __IM uint16_t RESERVED2[5]; + __IM uint16_t RESERVED2[4]; + __IM uint8_t RESERVED3; + + union + { + __IOM uint8_t PRWCNTR; /*!< (@ 0x0000000F) Port Read Wait Control Register */ + + struct + { + __IOM uint8_t WAIT : 2; /*!< [1..0] Wait Cycle Control */ + uint8_t : 6; + } PRWCNTR_b; + }; __IOM R_PMISC_PMSAR_Type PMSAR[12]; /*!< (@ 0x00000010) Port Security Attribution Register */ } R_PMISC_Type; /*!< Size = 40 (0x28) */ @@ -15423,16 +15453,16 @@ typedef struct /*!< (@ 0x407FC000) R_FLAD Structure #define R_CACHE ((R_CACHE_Type *) R_CACHE_BASE) #define R_CPSCU ((R_CPSCU_Type *) R_CPSCU_BASE) #define R_CEC ((R_CEC_Type *) R_CEC_BASE) - #define R_AGTX0 ((R_AGTX0_Type *) R_AGTX0_BASE) - #define R_AGTX1 ((R_AGTX0_Type *) R_AGTX1_BASE) - #define R_AGTX2 ((R_AGTX0_Type *) R_AGTX2_BASE) - #define R_AGTX3 ((R_AGTX0_Type *) R_AGTX3_BASE) - #define R_AGTX4 ((R_AGTX0_Type *) R_AGTX4_BASE) - #define R_AGTX5 ((R_AGTX0_Type *) R_AGTX5_BASE) - #define R_AGTX6 ((R_AGTX0_Type *) R_AGTX6_BASE) - #define R_AGTX7 ((R_AGTX0_Type *) R_AGTX7_BASE) - #define R_AGTX8 ((R_AGTX0_Type *) R_AGTX8_BASE) - #define R_AGTX9 ((R_AGTX0_Type *) R_AGTX9_BASE) + #define R_AGTW0 ((R_AGTX0_Type *) R_AGTX0_BASE) + #define R_AGTW1 ((R_AGTX0_Type *) R_AGTX1_BASE) + #define R_AGTW2 ((R_AGTX0_Type *) R_AGTX2_BASE) + #define R_AGTW3 ((R_AGTX0_Type *) R_AGTX3_BASE) + #define R_AGTW4 ((R_AGTX0_Type *) R_AGTX4_BASE) + #define R_AGTW5 ((R_AGTX0_Type *) R_AGTX5_BASE) + #define R_AGTW6 ((R_AGTX0_Type *) R_AGTX6_BASE) + #define R_AGTW7 ((R_AGTX0_Type *) R_AGTX7_BASE) + #define R_AGTW8 ((R_AGTX0_Type *) R_AGTX8_BASE) + #define R_AGTW9 ((R_AGTX0_Type *) R_AGTX9_BASE) #define R_FLAD ((R_FLAD_Type *) R_FLAD_BASE) /** @} */ /* End of group Device_Peripheral_declaration */ @@ -19571,20 +19601,31 @@ typedef struct /*!< (@ 0x407FC000) R_FLAD Structure /* =========================================================================================================================== */ /* ======================================================== MSTPCRA ======================================================== */ - #define R_MSTP_MSTPCRA_MSTPA_Pos (0UL) /*!< MSTPA (Bit 0) */ - #define R_MSTP_MSTPCRA_MSTPA_Msk (0x1UL) /*!< MSTPA (Bitfield-Mask: 0x01) */ + #define R_MSTP_MSTPCRA_MSTPA_Pos (0UL) /*!< MSTPA (Bit 0) */ + #define R_MSTP_MSTPCRA_MSTPA_Msk (0x1UL) /*!< MSTPA (Bitfield-Mask: 0x01) */ /* ======================================================== MSTPCRB ======================================================== */ - #define R_MSTP_MSTPCRB_MSTPB_Pos (0UL) /*!< MSTPB (Bit 0) */ - #define R_MSTP_MSTPCRB_MSTPB_Msk (0x1UL) /*!< MSTPB (Bitfield-Mask: 0x01) */ + #define R_MSTP_MSTPCRB_MSTPB_Pos (0UL) /*!< MSTPB (Bit 0) */ + #define R_MSTP_MSTPCRB_MSTPB_Msk (0x1UL) /*!< MSTPB (Bitfield-Mask: 0x01) */ /* ======================================================== MSTPCRC ======================================================== */ - #define R_MSTP_MSTPCRC_MSTPC_Pos (0UL) /*!< MSTPC (Bit 0) */ - #define R_MSTP_MSTPCRC_MSTPC_Msk (0x1UL) /*!< MSTPC (Bitfield-Mask: 0x01) */ + #define R_MSTP_MSTPCRC_MSTPC_Pos (0UL) /*!< MSTPC (Bit 0) */ + #define R_MSTP_MSTPCRC_MSTPC_Msk (0x1UL) /*!< MSTPC (Bitfield-Mask: 0x01) */ /* ======================================================== MSTPCRD ======================================================== */ - #define R_MSTP_MSTPCRD_MSTPD_Pos (0UL) /*!< MSTPD (Bit 0) */ - #define R_MSTP_MSTPCRD_MSTPD_Msk (0x1UL) /*!< MSTPD (Bitfield-Mask: 0x01) */ + #define R_MSTP_MSTPCRD_MSTPD_Pos (0UL) /*!< MSTPD (Bit 0) */ + #define R_MSTP_MSTPCRD_MSTPD_Msk (0x1UL) /*!< MSTPD (Bitfield-Mask: 0x01) */ /* ======================================================== MSTPCRE ======================================================== */ - #define R_MSTP_MSTPCRE_MSTPE_Pos (0UL) /*!< MSTPE (Bit 0) */ - #define R_MSTP_MSTPCRE_MSTPE_Msk (0x1UL) /*!< MSTPE (Bitfield-Mask: 0x01) */ + #define R_MSTP_MSTPCRE_MSTPE_Pos (0UL) /*!< MSTPE (Bit 0) */ + #define R_MSTP_MSTPCRE_MSTPE_Msk (0x1UL) /*!< MSTPE (Bitfield-Mask: 0x01) */ +/* ======================================================= LSMRWDIS ======================================================== */ + #define R_MSTP_LSMRWDIS_RTCRWDIS_Pos (0UL) /*!< RTCRWDIS (Bit 0) */ + #define R_MSTP_LSMRWDIS_RTCRWDIS_Msk (0x1UL) /*!< RTCRWDIS (Bitfield-Mask: 0x01) */ + #define R_MSTP_LSMRWDIS_WDTDIS_Pos (1UL) /*!< WDTDIS (Bit 1) */ + #define R_MSTP_LSMRWDIS_WDTDIS_Msk (0x2UL) /*!< WDTDIS (Bitfield-Mask: 0x01) */ + #define R_MSTP_LSMRWDIS_IWDTIDS_Pos (2UL) /*!< IWDTIDS (Bit 2) */ + #define R_MSTP_LSMRWDIS_IWDTIDS_Msk (0x4UL) /*!< IWDTIDS (Bitfield-Mask: 0x01) */ + #define R_MSTP_LSMRWDIS_WREN_Pos (7UL) /*!< WREN (Bit 7) */ + #define R_MSTP_LSMRWDIS_WREN_Msk (0x80UL) /*!< WREN (Bitfield-Mask: 0x01) */ + #define R_MSTP_LSMRWDIS_PRKEY_Pos (8UL) /*!< PRKEY (Bit 8) */ + #define R_MSTP_LSMRWDIS_PRKEY_Msk (0xff00UL) /*!< PRKEY (Bitfield-Mask: 0xff) */ /* =========================================================================================================================== */ /* ================ R_PORT0 ================ */ @@ -19658,6 +19699,9 @@ typedef struct /*!< (@ 0x407FC000) R_FLAD Structure #define R_PMISC_PWPRS_PFSWE_Msk (0x40UL) /*!< PFSWE (Bitfield-Mask: 0x01) */ #define R_PMISC_PWPRS_B0WI_Pos (7UL) /*!< B0WI (Bit 7) */ #define R_PMISC_PWPRS_B0WI_Msk (0x80UL) /*!< B0WI (Bitfield-Mask: 0x01) */ +/* ======================================================== PRWCNTR ======================================================== */ + #define R_PMISC_PRWCNTR_WAIT_Pos (0UL) /*!< WAIT (Bit 0) */ + #define R_PMISC_PRWCNTR_WAIT_Msk (0x3UL) /*!< WAIT (Bitfield-Mask: 0x03) */ /* =========================================================================================================================== */ /* ================ R_QSPI ================ */ diff --git a/ra/fsp/src/bsp/cmsis/Device/RENESAS/Include/R7FA6M1AD.h b/ra/fsp/src/bsp/cmsis/Device/RENESAS/Include/R7FA6M1AD.h index 090e78230..8dc1ba551 100644 --- a/ra/fsp/src/bsp/cmsis/Device/RENESAS/Include/R7FA6M1AD.h +++ b/ra/fsp/src/bsp/cmsis/Device/RENESAS/Include/R7FA6M1AD.h @@ -7344,67 +7344,85 @@ typedef struct /*!< (@ 0x40047000) R_MSTP Structure union { - __IOM uint32_t MSTPCRE; /*!< (@ 0x00000010) Module Stop Control Register E */ + union + { + __IOM uint32_t MSTPCRE; /*!< (@ 0x00000010) Module Stop Control Register E */ - struct + struct + { + __IOM uint32_t MSTPE0 : 1; /*!< [0..0] Module stop bit 0. See device hardware manual for usage. */ + __IOM uint32_t MSTPE1 : 1; /*!< [1..1] Module stop bit 1. See device hardware manual for usage. */ + __IOM uint32_t MSTPE2 : 1; /*!< [2..2] Module stop bit 2. See device hardware manual for usage. */ + __IOM uint32_t MSTPE3 : 1; /*!< [3..3] Module stop bit 3. See device hardware manual for usage. */ + __IOM uint32_t MSTPE4 : 1; /*!< [4..4] Module stop bit 4. See device hardware manual for usage. */ + __IOM uint32_t MSTPE5 : 1; /*!< [5..5] Module stop bit 5. See device hardware manual for usage. */ + __IOM uint32_t MSTPE6 : 1; /*!< [6..6] Module stop bit 6. See device hardware manual for usage. */ + __IOM uint32_t MSTPE7 : 1; /*!< [7..7] Module stop bit 7. See device hardware manual for usage. */ + __IOM uint32_t MSTPE8 : 1; /*!< [8..8] Module stop bit 8. See device hardware manual for usage. */ + __IOM uint32_t MSTPE9 : 1; /*!< [9..9] Module stop bit 9. See device hardware manual for usage. */ + __IOM uint32_t MSTPE10 : 1; /*!< [10..10] Module stop bit 10. See device hardware manual for + * usage. */ + __IOM uint32_t MSTPE11 : 1; /*!< [11..11] Module stop bit 11. See device hardware manual for + * usage. */ + __IOM uint32_t MSTPE12 : 1; /*!< [12..12] Module stop bit 12. See device hardware manual for + * usage. */ + __IOM uint32_t MSTPE13 : 1; /*!< [13..13] Module stop bit 13. See device hardware manual for + * usage. */ + __IOM uint32_t MSTPE14 : 1; /*!< [14..14] Module stop bit 14. See device hardware manual for + * usage. */ + __IOM uint32_t MSTPE15 : 1; /*!< [15..15] Module stop bit 15. See device hardware manual for + * usage. */ + __IOM uint32_t MSTPE16 : 1; /*!< [16..16] Module stop bit 16. See device hardware manual for + * usage. */ + __IOM uint32_t MSTPE17 : 1; /*!< [17..17] Module stop bit 17. See device hardware manual for + * usage. */ + __IOM uint32_t MSTPE18 : 1; /*!< [18..18] Module stop bit 18. See device hardware manual for + * usage. */ + __IOM uint32_t MSTPE19 : 1; /*!< [19..19] Module stop bit 19. See device hardware manual for + * usage. */ + __IOM uint32_t MSTPE20 : 1; /*!< [20..20] Module stop bit 20. See device hardware manual for + * usage. */ + __IOM uint32_t MSTPE21 : 1; /*!< [21..21] Module stop bit 21. See device hardware manual for + * usage. */ + __IOM uint32_t MSTPE22 : 1; /*!< [22..22] Module stop bit 22. See device hardware manual for + * usage. */ + __IOM uint32_t MSTPE23 : 1; /*!< [23..23] Module stop bit 23. See device hardware manual for + * usage. */ + __IOM uint32_t MSTPE24 : 1; /*!< [24..24] Module stop bit 24. See device hardware manual for + * usage. */ + __IOM uint32_t MSTPE25 : 1; /*!< [25..25] Module stop bit 25. See device hardware manual for + * usage. */ + __IOM uint32_t MSTPE26 : 1; /*!< [26..26] Module stop bit 26. See device hardware manual for + * usage. */ + __IOM uint32_t MSTPE27 : 1; /*!< [27..27] Module stop bit 27. See device hardware manual for + * usage. */ + __IOM uint32_t MSTPE28 : 1; /*!< [28..28] Module stop bit 28. See device hardware manual for + * usage. */ + __IOM uint32_t MSTPE29 : 1; /*!< [29..29] Module stop bit 29. See device hardware manual for + * usage. */ + __IOM uint32_t MSTPE30 : 1; /*!< [30..30] Module stop bit 30. See device hardware manual for + * usage. */ + __IOM uint32_t MSTPE31 : 1; /*!< [31..31] Module stop bit 31. See device hardware manual for + * usage. */ + } MSTPCRE_b; + }; + + union { - __IOM uint32_t MSTPE0 : 1; /*!< [0..0] Module stop bit 0. See device hardware manual for usage. */ - __IOM uint32_t MSTPE1 : 1; /*!< [1..1] Module stop bit 1. See device hardware manual for usage. */ - __IOM uint32_t MSTPE2 : 1; /*!< [2..2] Module stop bit 2. See device hardware manual for usage. */ - __IOM uint32_t MSTPE3 : 1; /*!< [3..3] Module stop bit 3. See device hardware manual for usage. */ - __IOM uint32_t MSTPE4 : 1; /*!< [4..4] Module stop bit 4. See device hardware manual for usage. */ - __IOM uint32_t MSTPE5 : 1; /*!< [5..5] Module stop bit 5. See device hardware manual for usage. */ - __IOM uint32_t MSTPE6 : 1; /*!< [6..6] Module stop bit 6. See device hardware manual for usage. */ - __IOM uint32_t MSTPE7 : 1; /*!< [7..7] Module stop bit 7. See device hardware manual for usage. */ - __IOM uint32_t MSTPE8 : 1; /*!< [8..8] Module stop bit 8. See device hardware manual for usage. */ - __IOM uint32_t MSTPE9 : 1; /*!< [9..9] Module stop bit 9. See device hardware manual for usage. */ - __IOM uint32_t MSTPE10 : 1; /*!< [10..10] Module stop bit 10. See device hardware manual for - * usage. */ - __IOM uint32_t MSTPE11 : 1; /*!< [11..11] Module stop bit 11. See device hardware manual for - * usage. */ - __IOM uint32_t MSTPE12 : 1; /*!< [12..12] Module stop bit 12. See device hardware manual for - * usage. */ - __IOM uint32_t MSTPE13 : 1; /*!< [13..13] Module stop bit 13. See device hardware manual for - * usage. */ - __IOM uint32_t MSTPE14 : 1; /*!< [14..14] Module stop bit 14. See device hardware manual for - * usage. */ - __IOM uint32_t MSTPE15 : 1; /*!< [15..15] Module stop bit 15. See device hardware manual for - * usage. */ - __IOM uint32_t MSTPE16 : 1; /*!< [16..16] Module stop bit 16. See device hardware manual for - * usage. */ - __IOM uint32_t MSTPE17 : 1; /*!< [17..17] Module stop bit 17. See device hardware manual for - * usage. */ - __IOM uint32_t MSTPE18 : 1; /*!< [18..18] Module stop bit 18. See device hardware manual for - * usage. */ - __IOM uint32_t MSTPE19 : 1; /*!< [19..19] Module stop bit 19. See device hardware manual for - * usage. */ - __IOM uint32_t MSTPE20 : 1; /*!< [20..20] Module stop bit 20. See device hardware manual for - * usage. */ - __IOM uint32_t MSTPE21 : 1; /*!< [21..21] Module stop bit 21. See device hardware manual for - * usage. */ - __IOM uint32_t MSTPE22 : 1; /*!< [22..22] Module stop bit 22. See device hardware manual for - * usage. */ - __IOM uint32_t MSTPE23 : 1; /*!< [23..23] Module stop bit 23. See device hardware manual for - * usage. */ - __IOM uint32_t MSTPE24 : 1; /*!< [24..24] Module stop bit 24. See device hardware manual for - * usage. */ - __IOM uint32_t MSTPE25 : 1; /*!< [25..25] Module stop bit 25. See device hardware manual for - * usage. */ - __IOM uint32_t MSTPE26 : 1; /*!< [26..26] Module stop bit 26. See device hardware manual for - * usage. */ - __IOM uint32_t MSTPE27 : 1; /*!< [27..27] Module stop bit 27. See device hardware manual for - * usage. */ - __IOM uint32_t MSTPE28 : 1; /*!< [28..28] Module stop bit 28. See device hardware manual for - * usage. */ - __IOM uint32_t MSTPE29 : 1; /*!< [29..29] Module stop bit 29. See device hardware manual for - * usage. */ - __IOM uint32_t MSTPE30 : 1; /*!< [30..30] Module stop bit 30. See device hardware manual for - * usage. */ - __IOM uint32_t MSTPE31 : 1; /*!< [31..31] Module stop bit 31. See device hardware manual for - * usage. */ - } MSTPCRE_b; + __IOM uint16_t LSMRWDIS; /*!< (@ 0x00000010) Low Speed Module R/W Disable Control Register */ + + struct + { + __IOM uint16_t RTCRWDIS : 1; /*!< [0..0] RTC Register R/W Enable Control */ + __IOM uint16_t WDTDIS : 1; /*!< [1..1] WDT Operate Clock Control */ + __IOM uint16_t IWDTIDS : 1; /*!< [2..2] IWDT Register Clock Control */ + uint16_t : 4; + __IOM uint16_t WREN : 1; /*!< [7..7] Write Enable for bits [2:0] */ + __OM uint16_t PRKEY : 8; /*!< [15..8] LSMRWDIS Key Code */ + } LSMRWDIS_b; + }; }; -} R_MSTP_Type; /*!< Size = 20 (0x14) */ +} R_MSTP_Type; /*!< Size = 20 (0x14) */ /* =========================================================================================================================== */ /* ================ R_PORT0 ================ */ @@ -7746,11 +7764,23 @@ typedef struct /*!< (@ 0x40040D00) R_PMISC Structure struct { uint8_t : 6; - __IOM uint8_t PFSWE : 1; /*!< [6..6] PmnPFS Register Write */ - __IOM uint8_t B0WI : 1; /*!< [7..7] PFSWE Bit Write Disable */ + __IOM uint8_t PFSWE : 1; /*!< [6..6] PmnPFS Register Write */ + __IOM uint8_t B0WI : 1; /*!< [7..7] PFSWE Bit Write Disable */ } PWPRS_b; }; - __IM uint16_t RESERVED2[5]; + __IM uint16_t RESERVED2[4]; + __IM uint8_t RESERVED3; + + union + { + __IOM uint8_t PRWCNTR; /*!< (@ 0x0000000F) Port Read Wait Control Register */ + + struct + { + __IOM uint8_t WAIT : 2; /*!< [1..0] Wait Cycle Control */ + uint8_t : 6; + } PRWCNTR_b; + }; __IOM R_PMISC_PMSAR_Type PMSAR[12]; /*!< (@ 0x00000010) Port Security Attribution Register */ } R_PMISC_Type; /*!< Size = 40 (0x28) */ @@ -14741,16 +14771,16 @@ typedef struct /*!< (@ 0x40084000) R_AGTX0 Structure #define R_USB_FS0 ((R_USB_FS0_Type *) R_USB_FS0_BASE) #define R_WDT ((R_WDT_Type *) R_WDT_BASE) #define R_USB_HS0 ((R_USB_HS0_Type *) R_USB_HS0_BASE) - #define R_AGTX0 ((R_AGTX0_Type *) R_AGTX0_BASE) - #define R_AGTX1 ((R_AGTX0_Type *) R_AGTX1_BASE) - #define R_AGTX2 ((R_AGTX0_Type *) R_AGTX2_BASE) - #define R_AGTX3 ((R_AGTX0_Type *) R_AGTX3_BASE) - #define R_AGTX4 ((R_AGTX0_Type *) R_AGTX4_BASE) - #define R_AGTX5 ((R_AGTX0_Type *) R_AGTX5_BASE) - #define R_AGTX6 ((R_AGTX0_Type *) R_AGTX6_BASE) - #define R_AGTX7 ((R_AGTX0_Type *) R_AGTX7_BASE) - #define R_AGTX8 ((R_AGTX0_Type *) R_AGTX8_BASE) - #define R_AGTX9 ((R_AGTX0_Type *) R_AGTX9_BASE) + #define R_AGT0 ((R_AGTX0_Type *) R_AGTX0_BASE) + #define R_AGT1 ((R_AGTX0_Type *) R_AGTX1_BASE) + #define R_AGT2 ((R_AGTX0_Type *) R_AGTX2_BASE) + #define R_AGT3 ((R_AGTX0_Type *) R_AGTX3_BASE) + #define R_AGT4 ((R_AGTX0_Type *) R_AGTX4_BASE) + #define R_AGT5 ((R_AGTX0_Type *) R_AGTX5_BASE) + #define R_AGT6 ((R_AGTX0_Type *) R_AGTX6_BASE) + #define R_AGT7 ((R_AGTX0_Type *) R_AGTX7_BASE) + #define R_AGT8 ((R_AGTX0_Type *) R_AGTX8_BASE) + #define R_AGT9 ((R_AGTX0_Type *) R_AGTX9_BASE) /** @} */ /* End of group Device_Peripheral_declaration */ @@ -18122,20 +18152,31 @@ typedef struct /*!< (@ 0x40084000) R_AGTX0 Structure /* =========================================================================================================================== */ /* ======================================================== MSTPCRA ======================================================== */ - #define R_MSTP_MSTPCRA_MSTPA_Pos (0UL) /*!< MSTPA (Bit 0) */ - #define R_MSTP_MSTPCRA_MSTPA_Msk (0x1UL) /*!< MSTPA (Bitfield-Mask: 0x01) */ + #define R_MSTP_MSTPCRA_MSTPA_Pos (0UL) /*!< MSTPA (Bit 0) */ + #define R_MSTP_MSTPCRA_MSTPA_Msk (0x1UL) /*!< MSTPA (Bitfield-Mask: 0x01) */ /* ======================================================== MSTPCRB ======================================================== */ - #define R_MSTP_MSTPCRB_MSTPB_Pos (0UL) /*!< MSTPB (Bit 0) */ - #define R_MSTP_MSTPCRB_MSTPB_Msk (0x1UL) /*!< MSTPB (Bitfield-Mask: 0x01) */ + #define R_MSTP_MSTPCRB_MSTPB_Pos (0UL) /*!< MSTPB (Bit 0) */ + #define R_MSTP_MSTPCRB_MSTPB_Msk (0x1UL) /*!< MSTPB (Bitfield-Mask: 0x01) */ /* ======================================================== MSTPCRC ======================================================== */ - #define R_MSTP_MSTPCRC_MSTPC_Pos (0UL) /*!< MSTPC (Bit 0) */ - #define R_MSTP_MSTPCRC_MSTPC_Msk (0x1UL) /*!< MSTPC (Bitfield-Mask: 0x01) */ + #define R_MSTP_MSTPCRC_MSTPC_Pos (0UL) /*!< MSTPC (Bit 0) */ + #define R_MSTP_MSTPCRC_MSTPC_Msk (0x1UL) /*!< MSTPC (Bitfield-Mask: 0x01) */ /* ======================================================== MSTPCRD ======================================================== */ - #define R_MSTP_MSTPCRD_MSTPD_Pos (0UL) /*!< MSTPD (Bit 0) */ - #define R_MSTP_MSTPCRD_MSTPD_Msk (0x1UL) /*!< MSTPD (Bitfield-Mask: 0x01) */ + #define R_MSTP_MSTPCRD_MSTPD_Pos (0UL) /*!< MSTPD (Bit 0) */ + #define R_MSTP_MSTPCRD_MSTPD_Msk (0x1UL) /*!< MSTPD (Bitfield-Mask: 0x01) */ /* ======================================================== MSTPCRE ======================================================== */ - #define R_MSTP_MSTPCRE_MSTPE_Pos (0UL) /*!< MSTPE (Bit 0) */ - #define R_MSTP_MSTPCRE_MSTPE_Msk (0x1UL) /*!< MSTPE (Bitfield-Mask: 0x01) */ + #define R_MSTP_MSTPCRE_MSTPE_Pos (0UL) /*!< MSTPE (Bit 0) */ + #define R_MSTP_MSTPCRE_MSTPE_Msk (0x1UL) /*!< MSTPE (Bitfield-Mask: 0x01) */ +/* ======================================================= LSMRWDIS ======================================================== */ + #define R_MSTP_LSMRWDIS_RTCRWDIS_Pos (0UL) /*!< RTCRWDIS (Bit 0) */ + #define R_MSTP_LSMRWDIS_RTCRWDIS_Msk (0x1UL) /*!< RTCRWDIS (Bitfield-Mask: 0x01) */ + #define R_MSTP_LSMRWDIS_WDTDIS_Pos (1UL) /*!< WDTDIS (Bit 1) */ + #define R_MSTP_LSMRWDIS_WDTDIS_Msk (0x2UL) /*!< WDTDIS (Bitfield-Mask: 0x01) */ + #define R_MSTP_LSMRWDIS_IWDTIDS_Pos (2UL) /*!< IWDTIDS (Bit 2) */ + #define R_MSTP_LSMRWDIS_IWDTIDS_Msk (0x4UL) /*!< IWDTIDS (Bitfield-Mask: 0x01) */ + #define R_MSTP_LSMRWDIS_WREN_Pos (7UL) /*!< WREN (Bit 7) */ + #define R_MSTP_LSMRWDIS_WREN_Msk (0x80UL) /*!< WREN (Bitfield-Mask: 0x01) */ + #define R_MSTP_LSMRWDIS_PRKEY_Pos (8UL) /*!< PRKEY (Bit 8) */ + #define R_MSTP_LSMRWDIS_PRKEY_Msk (0xff00UL) /*!< PRKEY (Bitfield-Mask: 0xff) */ /* =========================================================================================================================== */ /* ================ R_PORT0 ================ */ @@ -18209,6 +18250,9 @@ typedef struct /*!< (@ 0x40084000) R_AGTX0 Structure #define R_PMISC_PWPRS_PFSWE_Msk (0x40UL) /*!< PFSWE (Bitfield-Mask: 0x01) */ #define R_PMISC_PWPRS_B0WI_Pos (7UL) /*!< B0WI (Bit 7) */ #define R_PMISC_PWPRS_B0WI_Msk (0x80UL) /*!< B0WI (Bitfield-Mask: 0x01) */ +/* ======================================================== PRWCNTR ======================================================== */ + #define R_PMISC_PRWCNTR_WAIT_Pos (0UL) /*!< WAIT (Bit 0) */ + #define R_PMISC_PRWCNTR_WAIT_Msk (0x3UL) /*!< WAIT (Bitfield-Mask: 0x03) */ /* =========================================================================================================================== */ /* ================ R_QSPI ================ */ diff --git a/ra/fsp/src/bsp/cmsis/Device/RENESAS/Include/R7FA6M2AF.h b/ra/fsp/src/bsp/cmsis/Device/RENESAS/Include/R7FA6M2AF.h index f718f3723..6ad11b9fa 100644 --- a/ra/fsp/src/bsp/cmsis/Device/RENESAS/Include/R7FA6M2AF.h +++ b/ra/fsp/src/bsp/cmsis/Device/RENESAS/Include/R7FA6M2AF.h @@ -9209,67 +9209,85 @@ typedef struct /*!< (@ 0x40047000) R_MSTP Structure union { - __IOM uint32_t MSTPCRE; /*!< (@ 0x00000010) Module Stop Control Register E */ + union + { + __IOM uint32_t MSTPCRE; /*!< (@ 0x00000010) Module Stop Control Register E */ - struct + struct + { + __IOM uint32_t MSTPE0 : 1; /*!< [0..0] Module stop bit 0. See device hardware manual for usage. */ + __IOM uint32_t MSTPE1 : 1; /*!< [1..1] Module stop bit 1. See device hardware manual for usage. */ + __IOM uint32_t MSTPE2 : 1; /*!< [2..2] Module stop bit 2. See device hardware manual for usage. */ + __IOM uint32_t MSTPE3 : 1; /*!< [3..3] Module stop bit 3. See device hardware manual for usage. */ + __IOM uint32_t MSTPE4 : 1; /*!< [4..4] Module stop bit 4. See device hardware manual for usage. */ + __IOM uint32_t MSTPE5 : 1; /*!< [5..5] Module stop bit 5. See device hardware manual for usage. */ + __IOM uint32_t MSTPE6 : 1; /*!< [6..6] Module stop bit 6. See device hardware manual for usage. */ + __IOM uint32_t MSTPE7 : 1; /*!< [7..7] Module stop bit 7. See device hardware manual for usage. */ + __IOM uint32_t MSTPE8 : 1; /*!< [8..8] Module stop bit 8. See device hardware manual for usage. */ + __IOM uint32_t MSTPE9 : 1; /*!< [9..9] Module stop bit 9. See device hardware manual for usage. */ + __IOM uint32_t MSTPE10 : 1; /*!< [10..10] Module stop bit 10. See device hardware manual for + * usage. */ + __IOM uint32_t MSTPE11 : 1; /*!< [11..11] Module stop bit 11. See device hardware manual for + * usage. */ + __IOM uint32_t MSTPE12 : 1; /*!< [12..12] Module stop bit 12. See device hardware manual for + * usage. */ + __IOM uint32_t MSTPE13 : 1; /*!< [13..13] Module stop bit 13. See device hardware manual for + * usage. */ + __IOM uint32_t MSTPE14 : 1; /*!< [14..14] Module stop bit 14. See device hardware manual for + * usage. */ + __IOM uint32_t MSTPE15 : 1; /*!< [15..15] Module stop bit 15. See device hardware manual for + * usage. */ + __IOM uint32_t MSTPE16 : 1; /*!< [16..16] Module stop bit 16. See device hardware manual for + * usage. */ + __IOM uint32_t MSTPE17 : 1; /*!< [17..17] Module stop bit 17. See device hardware manual for + * usage. */ + __IOM uint32_t MSTPE18 : 1; /*!< [18..18] Module stop bit 18. See device hardware manual for + * usage. */ + __IOM uint32_t MSTPE19 : 1; /*!< [19..19] Module stop bit 19. See device hardware manual for + * usage. */ + __IOM uint32_t MSTPE20 : 1; /*!< [20..20] Module stop bit 20. See device hardware manual for + * usage. */ + __IOM uint32_t MSTPE21 : 1; /*!< [21..21] Module stop bit 21. See device hardware manual for + * usage. */ + __IOM uint32_t MSTPE22 : 1; /*!< [22..22] Module stop bit 22. See device hardware manual for + * usage. */ + __IOM uint32_t MSTPE23 : 1; /*!< [23..23] Module stop bit 23. See device hardware manual for + * usage. */ + __IOM uint32_t MSTPE24 : 1; /*!< [24..24] Module stop bit 24. See device hardware manual for + * usage. */ + __IOM uint32_t MSTPE25 : 1; /*!< [25..25] Module stop bit 25. See device hardware manual for + * usage. */ + __IOM uint32_t MSTPE26 : 1; /*!< [26..26] Module stop bit 26. See device hardware manual for + * usage. */ + __IOM uint32_t MSTPE27 : 1; /*!< [27..27] Module stop bit 27. See device hardware manual for + * usage. */ + __IOM uint32_t MSTPE28 : 1; /*!< [28..28] Module stop bit 28. See device hardware manual for + * usage. */ + __IOM uint32_t MSTPE29 : 1; /*!< [29..29] Module stop bit 29. See device hardware manual for + * usage. */ + __IOM uint32_t MSTPE30 : 1; /*!< [30..30] Module stop bit 30. See device hardware manual for + * usage. */ + __IOM uint32_t MSTPE31 : 1; /*!< [31..31] Module stop bit 31. See device hardware manual for + * usage. */ + } MSTPCRE_b; + }; + + union { - __IOM uint32_t MSTPE0 : 1; /*!< [0..0] Module stop bit 0. See device hardware manual for usage. */ - __IOM uint32_t MSTPE1 : 1; /*!< [1..1] Module stop bit 1. See device hardware manual for usage. */ - __IOM uint32_t MSTPE2 : 1; /*!< [2..2] Module stop bit 2. See device hardware manual for usage. */ - __IOM uint32_t MSTPE3 : 1; /*!< [3..3] Module stop bit 3. See device hardware manual for usage. */ - __IOM uint32_t MSTPE4 : 1; /*!< [4..4] Module stop bit 4. See device hardware manual for usage. */ - __IOM uint32_t MSTPE5 : 1; /*!< [5..5] Module stop bit 5. See device hardware manual for usage. */ - __IOM uint32_t MSTPE6 : 1; /*!< [6..6] Module stop bit 6. See device hardware manual for usage. */ - __IOM uint32_t MSTPE7 : 1; /*!< [7..7] Module stop bit 7. See device hardware manual for usage. */ - __IOM uint32_t MSTPE8 : 1; /*!< [8..8] Module stop bit 8. See device hardware manual for usage. */ - __IOM uint32_t MSTPE9 : 1; /*!< [9..9] Module stop bit 9. See device hardware manual for usage. */ - __IOM uint32_t MSTPE10 : 1; /*!< [10..10] Module stop bit 10. See device hardware manual for - * usage. */ - __IOM uint32_t MSTPE11 : 1; /*!< [11..11] Module stop bit 11. See device hardware manual for - * usage. */ - __IOM uint32_t MSTPE12 : 1; /*!< [12..12] Module stop bit 12. See device hardware manual for - * usage. */ - __IOM uint32_t MSTPE13 : 1; /*!< [13..13] Module stop bit 13. See device hardware manual for - * usage. */ - __IOM uint32_t MSTPE14 : 1; /*!< [14..14] Module stop bit 14. See device hardware manual for - * usage. */ - __IOM uint32_t MSTPE15 : 1; /*!< [15..15] Module stop bit 15. See device hardware manual for - * usage. */ - __IOM uint32_t MSTPE16 : 1; /*!< [16..16] Module stop bit 16. See device hardware manual for - * usage. */ - __IOM uint32_t MSTPE17 : 1; /*!< [17..17] Module stop bit 17. See device hardware manual for - * usage. */ - __IOM uint32_t MSTPE18 : 1; /*!< [18..18] Module stop bit 18. See device hardware manual for - * usage. */ - __IOM uint32_t MSTPE19 : 1; /*!< [19..19] Module stop bit 19. See device hardware manual for - * usage. */ - __IOM uint32_t MSTPE20 : 1; /*!< [20..20] Module stop bit 20. See device hardware manual for - * usage. */ - __IOM uint32_t MSTPE21 : 1; /*!< [21..21] Module stop bit 21. See device hardware manual for - * usage. */ - __IOM uint32_t MSTPE22 : 1; /*!< [22..22] Module stop bit 22. See device hardware manual for - * usage. */ - __IOM uint32_t MSTPE23 : 1; /*!< [23..23] Module stop bit 23. See device hardware manual for - * usage. */ - __IOM uint32_t MSTPE24 : 1; /*!< [24..24] Module stop bit 24. See device hardware manual for - * usage. */ - __IOM uint32_t MSTPE25 : 1; /*!< [25..25] Module stop bit 25. See device hardware manual for - * usage. */ - __IOM uint32_t MSTPE26 : 1; /*!< [26..26] Module stop bit 26. See device hardware manual for - * usage. */ - __IOM uint32_t MSTPE27 : 1; /*!< [27..27] Module stop bit 27. See device hardware manual for - * usage. */ - __IOM uint32_t MSTPE28 : 1; /*!< [28..28] Module stop bit 28. See device hardware manual for - * usage. */ - __IOM uint32_t MSTPE29 : 1; /*!< [29..29] Module stop bit 29. See device hardware manual for - * usage. */ - __IOM uint32_t MSTPE30 : 1; /*!< [30..30] Module stop bit 30. See device hardware manual for - * usage. */ - __IOM uint32_t MSTPE31 : 1; /*!< [31..31] Module stop bit 31. See device hardware manual for - * usage. */ - } MSTPCRE_b; + __IOM uint16_t LSMRWDIS; /*!< (@ 0x00000010) Low Speed Module R/W Disable Control Register */ + + struct + { + __IOM uint16_t RTCRWDIS : 1; /*!< [0..0] RTC Register R/W Enable Control */ + __IOM uint16_t WDTDIS : 1; /*!< [1..1] WDT Operate Clock Control */ + __IOM uint16_t IWDTIDS : 1; /*!< [2..2] IWDT Register Clock Control */ + uint16_t : 4; + __IOM uint16_t WREN : 1; /*!< [7..7] Write Enable for bits [2:0] */ + __OM uint16_t PRKEY : 8; /*!< [15..8] LSMRWDIS Key Code */ + } LSMRWDIS_b; + }; }; -} R_MSTP_Type; /*!< Size = 20 (0x14) */ +} R_MSTP_Type; /*!< Size = 20 (0x14) */ /* =========================================================================================================================== */ /* ================ R_PDC ================ */ @@ -9727,11 +9745,23 @@ typedef struct /*!< (@ 0x40040D00) R_PMISC Structure struct { uint8_t : 6; - __IOM uint8_t PFSWE : 1; /*!< [6..6] PmnPFS Register Write */ - __IOM uint8_t B0WI : 1; /*!< [7..7] PFSWE Bit Write Disable */ + __IOM uint8_t PFSWE : 1; /*!< [6..6] PmnPFS Register Write */ + __IOM uint8_t B0WI : 1; /*!< [7..7] PFSWE Bit Write Disable */ } PWPRS_b; }; - __IM uint16_t RESERVED2[5]; + __IM uint16_t RESERVED2[4]; + __IM uint8_t RESERVED3; + + union + { + __IOM uint8_t PRWCNTR; /*!< (@ 0x0000000F) Port Read Wait Control Register */ + + struct + { + __IOM uint8_t WAIT : 2; /*!< [1..0] Wait Cycle Control */ + uint8_t : 6; + } PRWCNTR_b; + }; __IOM R_PMISC_PMSAR_Type PMSAR[12]; /*!< (@ 0x00000010) Port Security Attribution Register */ } R_PMISC_Type; /*!< Size = 40 (0x28) */ @@ -16732,16 +16762,16 @@ typedef struct /*!< (@ 0x40084000) R_AGTX0 Structure #define R_USB_FS0 ((R_USB_FS0_Type *) R_USB_FS0_BASE) #define R_WDT ((R_WDT_Type *) R_WDT_BASE) #define R_USB_HS0 ((R_USB_HS0_Type *) R_USB_HS0_BASE) - #define R_AGTX0 ((R_AGTX0_Type *) R_AGTX0_BASE) - #define R_AGTX1 ((R_AGTX0_Type *) R_AGTX1_BASE) - #define R_AGTX2 ((R_AGTX0_Type *) R_AGTX2_BASE) - #define R_AGTX3 ((R_AGTX0_Type *) R_AGTX3_BASE) - #define R_AGTX4 ((R_AGTX0_Type *) R_AGTX4_BASE) - #define R_AGTX5 ((R_AGTX0_Type *) R_AGTX5_BASE) - #define R_AGTX6 ((R_AGTX0_Type *) R_AGTX6_BASE) - #define R_AGTX7 ((R_AGTX0_Type *) R_AGTX7_BASE) - #define R_AGTX8 ((R_AGTX0_Type *) R_AGTX8_BASE) - #define R_AGTX9 ((R_AGTX0_Type *) R_AGTX9_BASE) + #define R_AGT0 ((R_AGTX0_Type *) R_AGTX0_BASE) + #define R_AGT1 ((R_AGTX0_Type *) R_AGTX1_BASE) + #define R_AGT2 ((R_AGTX0_Type *) R_AGTX2_BASE) + #define R_AGT3 ((R_AGTX0_Type *) R_AGTX3_BASE) + #define R_AGT4 ((R_AGTX0_Type *) R_AGTX4_BASE) + #define R_AGT5 ((R_AGTX0_Type *) R_AGTX5_BASE) + #define R_AGT6 ((R_AGTX0_Type *) R_AGTX6_BASE) + #define R_AGT7 ((R_AGTX0_Type *) R_AGTX7_BASE) + #define R_AGT8 ((R_AGTX0_Type *) R_AGTX8_BASE) + #define R_AGT9 ((R_AGTX0_Type *) R_AGTX9_BASE) /** @} */ /* End of group Device_Peripheral_declaration */ @@ -21038,20 +21068,31 @@ typedef struct /*!< (@ 0x40084000) R_AGTX0 Structure /* =========================================================================================================================== */ /* ======================================================== MSTPCRA ======================================================== */ - #define R_MSTP_MSTPCRA_MSTPA_Pos (0UL) /*!< MSTPA (Bit 0) */ - #define R_MSTP_MSTPCRA_MSTPA_Msk (0x1UL) /*!< MSTPA (Bitfield-Mask: 0x01) */ + #define R_MSTP_MSTPCRA_MSTPA_Pos (0UL) /*!< MSTPA (Bit 0) */ + #define R_MSTP_MSTPCRA_MSTPA_Msk (0x1UL) /*!< MSTPA (Bitfield-Mask: 0x01) */ /* ======================================================== MSTPCRB ======================================================== */ - #define R_MSTP_MSTPCRB_MSTPB_Pos (0UL) /*!< MSTPB (Bit 0) */ - #define R_MSTP_MSTPCRB_MSTPB_Msk (0x1UL) /*!< MSTPB (Bitfield-Mask: 0x01) */ + #define R_MSTP_MSTPCRB_MSTPB_Pos (0UL) /*!< MSTPB (Bit 0) */ + #define R_MSTP_MSTPCRB_MSTPB_Msk (0x1UL) /*!< MSTPB (Bitfield-Mask: 0x01) */ /* ======================================================== MSTPCRC ======================================================== */ - #define R_MSTP_MSTPCRC_MSTPC_Pos (0UL) /*!< MSTPC (Bit 0) */ - #define R_MSTP_MSTPCRC_MSTPC_Msk (0x1UL) /*!< MSTPC (Bitfield-Mask: 0x01) */ + #define R_MSTP_MSTPCRC_MSTPC_Pos (0UL) /*!< MSTPC (Bit 0) */ + #define R_MSTP_MSTPCRC_MSTPC_Msk (0x1UL) /*!< MSTPC (Bitfield-Mask: 0x01) */ /* ======================================================== MSTPCRD ======================================================== */ - #define R_MSTP_MSTPCRD_MSTPD_Pos (0UL) /*!< MSTPD (Bit 0) */ - #define R_MSTP_MSTPCRD_MSTPD_Msk (0x1UL) /*!< MSTPD (Bitfield-Mask: 0x01) */ + #define R_MSTP_MSTPCRD_MSTPD_Pos (0UL) /*!< MSTPD (Bit 0) */ + #define R_MSTP_MSTPCRD_MSTPD_Msk (0x1UL) /*!< MSTPD (Bitfield-Mask: 0x01) */ /* ======================================================== MSTPCRE ======================================================== */ - #define R_MSTP_MSTPCRE_MSTPE_Pos (0UL) /*!< MSTPE (Bit 0) */ - #define R_MSTP_MSTPCRE_MSTPE_Msk (0x1UL) /*!< MSTPE (Bitfield-Mask: 0x01) */ + #define R_MSTP_MSTPCRE_MSTPE_Pos (0UL) /*!< MSTPE (Bit 0) */ + #define R_MSTP_MSTPCRE_MSTPE_Msk (0x1UL) /*!< MSTPE (Bitfield-Mask: 0x01) */ +/* ======================================================= LSMRWDIS ======================================================== */ + #define R_MSTP_LSMRWDIS_RTCRWDIS_Pos (0UL) /*!< RTCRWDIS (Bit 0) */ + #define R_MSTP_LSMRWDIS_RTCRWDIS_Msk (0x1UL) /*!< RTCRWDIS (Bitfield-Mask: 0x01) */ + #define R_MSTP_LSMRWDIS_WDTDIS_Pos (1UL) /*!< WDTDIS (Bit 1) */ + #define R_MSTP_LSMRWDIS_WDTDIS_Msk (0x2UL) /*!< WDTDIS (Bitfield-Mask: 0x01) */ + #define R_MSTP_LSMRWDIS_IWDTIDS_Pos (2UL) /*!< IWDTIDS (Bit 2) */ + #define R_MSTP_LSMRWDIS_IWDTIDS_Msk (0x4UL) /*!< IWDTIDS (Bitfield-Mask: 0x01) */ + #define R_MSTP_LSMRWDIS_WREN_Pos (7UL) /*!< WREN (Bit 7) */ + #define R_MSTP_LSMRWDIS_WREN_Msk (0x80UL) /*!< WREN (Bitfield-Mask: 0x01) */ + #define R_MSTP_LSMRWDIS_PRKEY_Pos (8UL) /*!< PRKEY (Bit 8) */ + #define R_MSTP_LSMRWDIS_PRKEY_Msk (0xff00UL) /*!< PRKEY (Bitfield-Mask: 0xff) */ /* =========================================================================================================================== */ /* ================ R_PDC ================ */ @@ -21193,6 +21234,9 @@ typedef struct /*!< (@ 0x40084000) R_AGTX0 Structure #define R_PMISC_PWPRS_PFSWE_Msk (0x40UL) /*!< PFSWE (Bitfield-Mask: 0x01) */ #define R_PMISC_PWPRS_B0WI_Pos (7UL) /*!< B0WI (Bit 7) */ #define R_PMISC_PWPRS_B0WI_Msk (0x80UL) /*!< B0WI (Bitfield-Mask: 0x01) */ +/* ======================================================== PRWCNTR ======================================================== */ + #define R_PMISC_PRWCNTR_WAIT_Pos (0UL) /*!< WAIT (Bit 0) */ + #define R_PMISC_PRWCNTR_WAIT_Msk (0x3UL) /*!< WAIT (Bitfield-Mask: 0x03) */ /* =========================================================================================================================== */ /* ================ R_QSPI ================ */ diff --git a/ra/fsp/src/bsp/cmsis/Device/RENESAS/Include/R7FA6M3AH.h b/ra/fsp/src/bsp/cmsis/Device/RENESAS/Include/R7FA6M3AH.h index 8af71675d..be2fe3faf 100644 --- a/ra/fsp/src/bsp/cmsis/Device/RENESAS/Include/R7FA6M3AH.h +++ b/ra/fsp/src/bsp/cmsis/Device/RENESAS/Include/R7FA6M3AH.h @@ -11867,67 +11867,85 @@ typedef struct /*!< (@ 0x40047000) R_MSTP Structure union { - __IOM uint32_t MSTPCRE; /*!< (@ 0x00000010) Module Stop Control Register E */ + union + { + __IOM uint32_t MSTPCRE; /*!< (@ 0x00000010) Module Stop Control Register E */ - struct + struct + { + __IOM uint32_t MSTPE0 : 1; /*!< [0..0] Module stop bit 0. See device hardware manual for usage. */ + __IOM uint32_t MSTPE1 : 1; /*!< [1..1] Module stop bit 1. See device hardware manual for usage. */ + __IOM uint32_t MSTPE2 : 1; /*!< [2..2] Module stop bit 2. See device hardware manual for usage. */ + __IOM uint32_t MSTPE3 : 1; /*!< [3..3] Module stop bit 3. See device hardware manual for usage. */ + __IOM uint32_t MSTPE4 : 1; /*!< [4..4] Module stop bit 4. See device hardware manual for usage. */ + __IOM uint32_t MSTPE5 : 1; /*!< [5..5] Module stop bit 5. See device hardware manual for usage. */ + __IOM uint32_t MSTPE6 : 1; /*!< [6..6] Module stop bit 6. See device hardware manual for usage. */ + __IOM uint32_t MSTPE7 : 1; /*!< [7..7] Module stop bit 7. See device hardware manual for usage. */ + __IOM uint32_t MSTPE8 : 1; /*!< [8..8] Module stop bit 8. See device hardware manual for usage. */ + __IOM uint32_t MSTPE9 : 1; /*!< [9..9] Module stop bit 9. See device hardware manual for usage. */ + __IOM uint32_t MSTPE10 : 1; /*!< [10..10] Module stop bit 10. See device hardware manual for + * usage. */ + __IOM uint32_t MSTPE11 : 1; /*!< [11..11] Module stop bit 11. See device hardware manual for + * usage. */ + __IOM uint32_t MSTPE12 : 1; /*!< [12..12] Module stop bit 12. See device hardware manual for + * usage. */ + __IOM uint32_t MSTPE13 : 1; /*!< [13..13] Module stop bit 13. See device hardware manual for + * usage. */ + __IOM uint32_t MSTPE14 : 1; /*!< [14..14] Module stop bit 14. See device hardware manual for + * usage. */ + __IOM uint32_t MSTPE15 : 1; /*!< [15..15] Module stop bit 15. See device hardware manual for + * usage. */ + __IOM uint32_t MSTPE16 : 1; /*!< [16..16] Module stop bit 16. See device hardware manual for + * usage. */ + __IOM uint32_t MSTPE17 : 1; /*!< [17..17] Module stop bit 17. See device hardware manual for + * usage. */ + __IOM uint32_t MSTPE18 : 1; /*!< [18..18] Module stop bit 18. See device hardware manual for + * usage. */ + __IOM uint32_t MSTPE19 : 1; /*!< [19..19] Module stop bit 19. See device hardware manual for + * usage. */ + __IOM uint32_t MSTPE20 : 1; /*!< [20..20] Module stop bit 20. See device hardware manual for + * usage. */ + __IOM uint32_t MSTPE21 : 1; /*!< [21..21] Module stop bit 21. See device hardware manual for + * usage. */ + __IOM uint32_t MSTPE22 : 1; /*!< [22..22] Module stop bit 22. See device hardware manual for + * usage. */ + __IOM uint32_t MSTPE23 : 1; /*!< [23..23] Module stop bit 23. See device hardware manual for + * usage. */ + __IOM uint32_t MSTPE24 : 1; /*!< [24..24] Module stop bit 24. See device hardware manual for + * usage. */ + __IOM uint32_t MSTPE25 : 1; /*!< [25..25] Module stop bit 25. See device hardware manual for + * usage. */ + __IOM uint32_t MSTPE26 : 1; /*!< [26..26] Module stop bit 26. See device hardware manual for + * usage. */ + __IOM uint32_t MSTPE27 : 1; /*!< [27..27] Module stop bit 27. See device hardware manual for + * usage. */ + __IOM uint32_t MSTPE28 : 1; /*!< [28..28] Module stop bit 28. See device hardware manual for + * usage. */ + __IOM uint32_t MSTPE29 : 1; /*!< [29..29] Module stop bit 29. See device hardware manual for + * usage. */ + __IOM uint32_t MSTPE30 : 1; /*!< [30..30] Module stop bit 30. See device hardware manual for + * usage. */ + __IOM uint32_t MSTPE31 : 1; /*!< [31..31] Module stop bit 31. See device hardware manual for + * usage. */ + } MSTPCRE_b; + }; + + union { - __IOM uint32_t MSTPE0 : 1; /*!< [0..0] Module stop bit 0. See device hardware manual for usage. */ - __IOM uint32_t MSTPE1 : 1; /*!< [1..1] Module stop bit 1. See device hardware manual for usage. */ - __IOM uint32_t MSTPE2 : 1; /*!< [2..2] Module stop bit 2. See device hardware manual for usage. */ - __IOM uint32_t MSTPE3 : 1; /*!< [3..3] Module stop bit 3. See device hardware manual for usage. */ - __IOM uint32_t MSTPE4 : 1; /*!< [4..4] Module stop bit 4. See device hardware manual for usage. */ - __IOM uint32_t MSTPE5 : 1; /*!< [5..5] Module stop bit 5. See device hardware manual for usage. */ - __IOM uint32_t MSTPE6 : 1; /*!< [6..6] Module stop bit 6. See device hardware manual for usage. */ - __IOM uint32_t MSTPE7 : 1; /*!< [7..7] Module stop bit 7. See device hardware manual for usage. */ - __IOM uint32_t MSTPE8 : 1; /*!< [8..8] Module stop bit 8. See device hardware manual for usage. */ - __IOM uint32_t MSTPE9 : 1; /*!< [9..9] Module stop bit 9. See device hardware manual for usage. */ - __IOM uint32_t MSTPE10 : 1; /*!< [10..10] Module stop bit 10. See device hardware manual for - * usage. */ - __IOM uint32_t MSTPE11 : 1; /*!< [11..11] Module stop bit 11. See device hardware manual for - * usage. */ - __IOM uint32_t MSTPE12 : 1; /*!< [12..12] Module stop bit 12. See device hardware manual for - * usage. */ - __IOM uint32_t MSTPE13 : 1; /*!< [13..13] Module stop bit 13. See device hardware manual for - * usage. */ - __IOM uint32_t MSTPE14 : 1; /*!< [14..14] Module stop bit 14. See device hardware manual for - * usage. */ - __IOM uint32_t MSTPE15 : 1; /*!< [15..15] Module stop bit 15. See device hardware manual for - * usage. */ - __IOM uint32_t MSTPE16 : 1; /*!< [16..16] Module stop bit 16. See device hardware manual for - * usage. */ - __IOM uint32_t MSTPE17 : 1; /*!< [17..17] Module stop bit 17. See device hardware manual for - * usage. */ - __IOM uint32_t MSTPE18 : 1; /*!< [18..18] Module stop bit 18. See device hardware manual for - * usage. */ - __IOM uint32_t MSTPE19 : 1; /*!< [19..19] Module stop bit 19. See device hardware manual for - * usage. */ - __IOM uint32_t MSTPE20 : 1; /*!< [20..20] Module stop bit 20. See device hardware manual for - * usage. */ - __IOM uint32_t MSTPE21 : 1; /*!< [21..21] Module stop bit 21. See device hardware manual for - * usage. */ - __IOM uint32_t MSTPE22 : 1; /*!< [22..22] Module stop bit 22. See device hardware manual for - * usage. */ - __IOM uint32_t MSTPE23 : 1; /*!< [23..23] Module stop bit 23. See device hardware manual for - * usage. */ - __IOM uint32_t MSTPE24 : 1; /*!< [24..24] Module stop bit 24. See device hardware manual for - * usage. */ - __IOM uint32_t MSTPE25 : 1; /*!< [25..25] Module stop bit 25. See device hardware manual for - * usage. */ - __IOM uint32_t MSTPE26 : 1; /*!< [26..26] Module stop bit 26. See device hardware manual for - * usage. */ - __IOM uint32_t MSTPE27 : 1; /*!< [27..27] Module stop bit 27. See device hardware manual for - * usage. */ - __IOM uint32_t MSTPE28 : 1; /*!< [28..28] Module stop bit 28. See device hardware manual for - * usage. */ - __IOM uint32_t MSTPE29 : 1; /*!< [29..29] Module stop bit 29. See device hardware manual for - * usage. */ - __IOM uint32_t MSTPE30 : 1; /*!< [30..30] Module stop bit 30. See device hardware manual for - * usage. */ - __IOM uint32_t MSTPE31 : 1; /*!< [31..31] Module stop bit 31. See device hardware manual for - * usage. */ - } MSTPCRE_b; + __IOM uint16_t LSMRWDIS; /*!< (@ 0x00000010) Low Speed Module R/W Disable Control Register */ + + struct + { + __IOM uint16_t RTCRWDIS : 1; /*!< [0..0] RTC Register R/W Enable Control */ + __IOM uint16_t WDTDIS : 1; /*!< [1..1] WDT Operate Clock Control */ + __IOM uint16_t IWDTIDS : 1; /*!< [2..2] IWDT Register Clock Control */ + uint16_t : 4; + __IOM uint16_t WREN : 1; /*!< [7..7] Write Enable for bits [2:0] */ + __OM uint16_t PRKEY : 8; /*!< [15..8] LSMRWDIS Key Code */ + } LSMRWDIS_b; + }; }; -} R_MSTP_Type; /*!< Size = 20 (0x14) */ +} R_MSTP_Type; /*!< Size = 20 (0x14) */ /* =========================================================================================================================== */ /* ================ R_PDC ================ */ @@ -12385,11 +12403,23 @@ typedef struct /*!< (@ 0x40040D00) R_PMISC Structure struct { uint8_t : 6; - __IOM uint8_t PFSWE : 1; /*!< [6..6] PmnPFS Register Write */ - __IOM uint8_t B0WI : 1; /*!< [7..7] PFSWE Bit Write Disable */ + __IOM uint8_t PFSWE : 1; /*!< [6..6] PmnPFS Register Write */ + __IOM uint8_t B0WI : 1; /*!< [7..7] PFSWE Bit Write Disable */ } PWPRS_b; }; - __IM uint16_t RESERVED2[5]; + __IM uint16_t RESERVED2[4]; + __IM uint8_t RESERVED3; + + union + { + __IOM uint8_t PRWCNTR; /*!< (@ 0x0000000F) Port Read Wait Control Register */ + + struct + { + __IOM uint8_t WAIT : 2; /*!< [1..0] Wait Cycle Control */ + uint8_t : 6; + } PRWCNTR_b; + }; __IOM R_PMISC_PMSAR_Type PMSAR[12]; /*!< (@ 0x00000010) Port Security Attribution Register */ } R_PMISC_Type; /*!< Size = 40 (0x28) */ @@ -19402,16 +19432,16 @@ typedef struct /*!< (@ 0x40084000) R_AGTX0 Structure #define R_USB_FS0 ((R_USB_FS0_Type *) R_USB_FS0_BASE) #define R_WDT ((R_WDT_Type *) R_WDT_BASE) #define R_USB_HS0 ((R_USB_HS0_Type *) R_USB_HS0_BASE) - #define R_AGTX0 ((R_AGTX0_Type *) R_AGTX0_BASE) - #define R_AGTX1 ((R_AGTX0_Type *) R_AGTX1_BASE) - #define R_AGTX2 ((R_AGTX0_Type *) R_AGTX2_BASE) - #define R_AGTX3 ((R_AGTX0_Type *) R_AGTX3_BASE) - #define R_AGTX4 ((R_AGTX0_Type *) R_AGTX4_BASE) - #define R_AGTX5 ((R_AGTX0_Type *) R_AGTX5_BASE) - #define R_AGTX6 ((R_AGTX0_Type *) R_AGTX6_BASE) - #define R_AGTX7 ((R_AGTX0_Type *) R_AGTX7_BASE) - #define R_AGTX8 ((R_AGTX0_Type *) R_AGTX8_BASE) - #define R_AGTX9 ((R_AGTX0_Type *) R_AGTX9_BASE) + #define R_AGT0 ((R_AGTX0_Type *) R_AGTX0_BASE) + #define R_AGT1 ((R_AGTX0_Type *) R_AGTX1_BASE) + #define R_AGT2 ((R_AGTX0_Type *) R_AGTX2_BASE) + #define R_AGT3 ((R_AGTX0_Type *) R_AGTX3_BASE) + #define R_AGT4 ((R_AGTX0_Type *) R_AGTX4_BASE) + #define R_AGT5 ((R_AGTX0_Type *) R_AGTX5_BASE) + #define R_AGT6 ((R_AGTX0_Type *) R_AGTX6_BASE) + #define R_AGT7 ((R_AGTX0_Type *) R_AGTX7_BASE) + #define R_AGT8 ((R_AGTX0_Type *) R_AGTX8_BASE) + #define R_AGT9 ((R_AGTX0_Type *) R_AGTX9_BASE) /** @} */ /* End of group Device_Peripheral_declaration */ @@ -24673,20 +24703,31 @@ typedef struct /*!< (@ 0x40084000) R_AGTX0 Structure /* =========================================================================================================================== */ /* ======================================================== MSTPCRA ======================================================== */ - #define R_MSTP_MSTPCRA_MSTPA_Pos (0UL) /*!< MSTPA (Bit 0) */ - #define R_MSTP_MSTPCRA_MSTPA_Msk (0x1UL) /*!< MSTPA (Bitfield-Mask: 0x01) */ + #define R_MSTP_MSTPCRA_MSTPA_Pos (0UL) /*!< MSTPA (Bit 0) */ + #define R_MSTP_MSTPCRA_MSTPA_Msk (0x1UL) /*!< MSTPA (Bitfield-Mask: 0x01) */ /* ======================================================== MSTPCRB ======================================================== */ - #define R_MSTP_MSTPCRB_MSTPB_Pos (0UL) /*!< MSTPB (Bit 0) */ - #define R_MSTP_MSTPCRB_MSTPB_Msk (0x1UL) /*!< MSTPB (Bitfield-Mask: 0x01) */ + #define R_MSTP_MSTPCRB_MSTPB_Pos (0UL) /*!< MSTPB (Bit 0) */ + #define R_MSTP_MSTPCRB_MSTPB_Msk (0x1UL) /*!< MSTPB (Bitfield-Mask: 0x01) */ /* ======================================================== MSTPCRC ======================================================== */ - #define R_MSTP_MSTPCRC_MSTPC_Pos (0UL) /*!< MSTPC (Bit 0) */ - #define R_MSTP_MSTPCRC_MSTPC_Msk (0x1UL) /*!< MSTPC (Bitfield-Mask: 0x01) */ + #define R_MSTP_MSTPCRC_MSTPC_Pos (0UL) /*!< MSTPC (Bit 0) */ + #define R_MSTP_MSTPCRC_MSTPC_Msk (0x1UL) /*!< MSTPC (Bitfield-Mask: 0x01) */ /* ======================================================== MSTPCRD ======================================================== */ - #define R_MSTP_MSTPCRD_MSTPD_Pos (0UL) /*!< MSTPD (Bit 0) */ - #define R_MSTP_MSTPCRD_MSTPD_Msk (0x1UL) /*!< MSTPD (Bitfield-Mask: 0x01) */ + #define R_MSTP_MSTPCRD_MSTPD_Pos (0UL) /*!< MSTPD (Bit 0) */ + #define R_MSTP_MSTPCRD_MSTPD_Msk (0x1UL) /*!< MSTPD (Bitfield-Mask: 0x01) */ /* ======================================================== MSTPCRE ======================================================== */ - #define R_MSTP_MSTPCRE_MSTPE_Pos (0UL) /*!< MSTPE (Bit 0) */ - #define R_MSTP_MSTPCRE_MSTPE_Msk (0x1UL) /*!< MSTPE (Bitfield-Mask: 0x01) */ + #define R_MSTP_MSTPCRE_MSTPE_Pos (0UL) /*!< MSTPE (Bit 0) */ + #define R_MSTP_MSTPCRE_MSTPE_Msk (0x1UL) /*!< MSTPE (Bitfield-Mask: 0x01) */ +/* ======================================================= LSMRWDIS ======================================================== */ + #define R_MSTP_LSMRWDIS_RTCRWDIS_Pos (0UL) /*!< RTCRWDIS (Bit 0) */ + #define R_MSTP_LSMRWDIS_RTCRWDIS_Msk (0x1UL) /*!< RTCRWDIS (Bitfield-Mask: 0x01) */ + #define R_MSTP_LSMRWDIS_WDTDIS_Pos (1UL) /*!< WDTDIS (Bit 1) */ + #define R_MSTP_LSMRWDIS_WDTDIS_Msk (0x2UL) /*!< WDTDIS (Bitfield-Mask: 0x01) */ + #define R_MSTP_LSMRWDIS_IWDTIDS_Pos (2UL) /*!< IWDTIDS (Bit 2) */ + #define R_MSTP_LSMRWDIS_IWDTIDS_Msk (0x4UL) /*!< IWDTIDS (Bitfield-Mask: 0x01) */ + #define R_MSTP_LSMRWDIS_WREN_Pos (7UL) /*!< WREN (Bit 7) */ + #define R_MSTP_LSMRWDIS_WREN_Msk (0x80UL) /*!< WREN (Bitfield-Mask: 0x01) */ + #define R_MSTP_LSMRWDIS_PRKEY_Pos (8UL) /*!< PRKEY (Bit 8) */ + #define R_MSTP_LSMRWDIS_PRKEY_Msk (0xff00UL) /*!< PRKEY (Bitfield-Mask: 0xff) */ /* =========================================================================================================================== */ /* ================ R_PDC ================ */ @@ -24828,6 +24869,9 @@ typedef struct /*!< (@ 0x40084000) R_AGTX0 Structure #define R_PMISC_PWPRS_PFSWE_Msk (0x40UL) /*!< PFSWE (Bitfield-Mask: 0x01) */ #define R_PMISC_PWPRS_B0WI_Pos (7UL) /*!< B0WI (Bit 7) */ #define R_PMISC_PWPRS_B0WI_Msk (0x80UL) /*!< B0WI (Bitfield-Mask: 0x01) */ +/* ======================================================== PRWCNTR ======================================================== */ + #define R_PMISC_PRWCNTR_WAIT_Pos (0UL) /*!< WAIT (Bit 0) */ + #define R_PMISC_PRWCNTR_WAIT_Msk (0x3UL) /*!< WAIT (Bitfield-Mask: 0x03) */ /* =========================================================================================================================== */ /* ================ R_QSPI ================ */ diff --git a/ra/fsp/src/bsp/cmsis/Device/RENESAS/Include/R7FA6M4AF.h b/ra/fsp/src/bsp/cmsis/Device/RENESAS/Include/R7FA6M4AF.h index aa847e4b4..acbd8a509 100644 --- a/ra/fsp/src/bsp/cmsis/Device/RENESAS/Include/R7FA6M4AF.h +++ b/ra/fsp/src/bsp/cmsis/Device/RENESAS/Include/R7FA6M4AF.h @@ -8199,67 +8199,85 @@ typedef struct /*!< (@ 0x40084000) R_MSTP Structure union { - __IOM uint32_t MSTPCRE; /*!< (@ 0x00000010) Module Stop Control Register E */ + union + { + __IOM uint32_t MSTPCRE; /*!< (@ 0x00000010) Module Stop Control Register E */ - struct + struct + { + __IOM uint32_t MSTPE0 : 1; /*!< [0..0] Module stop bit 0. See device hardware manual for usage. */ + __IOM uint32_t MSTPE1 : 1; /*!< [1..1] Module stop bit 1. See device hardware manual for usage. */ + __IOM uint32_t MSTPE2 : 1; /*!< [2..2] Module stop bit 2. See device hardware manual for usage. */ + __IOM uint32_t MSTPE3 : 1; /*!< [3..3] Module stop bit 3. See device hardware manual for usage. */ + __IOM uint32_t MSTPE4 : 1; /*!< [4..4] Module stop bit 4. See device hardware manual for usage. */ + __IOM uint32_t MSTPE5 : 1; /*!< [5..5] Module stop bit 5. See device hardware manual for usage. */ + __IOM uint32_t MSTPE6 : 1; /*!< [6..6] Module stop bit 6. See device hardware manual for usage. */ + __IOM uint32_t MSTPE7 : 1; /*!< [7..7] Module stop bit 7. See device hardware manual for usage. */ + __IOM uint32_t MSTPE8 : 1; /*!< [8..8] Module stop bit 8. See device hardware manual for usage. */ + __IOM uint32_t MSTPE9 : 1; /*!< [9..9] Module stop bit 9. See device hardware manual for usage. */ + __IOM uint32_t MSTPE10 : 1; /*!< [10..10] Module stop bit 10. See device hardware manual for + * usage. */ + __IOM uint32_t MSTPE11 : 1; /*!< [11..11] Module stop bit 11. See device hardware manual for + * usage. */ + __IOM uint32_t MSTPE12 : 1; /*!< [12..12] Module stop bit 12. See device hardware manual for + * usage. */ + __IOM uint32_t MSTPE13 : 1; /*!< [13..13] Module stop bit 13. See device hardware manual for + * usage. */ + __IOM uint32_t MSTPE14 : 1; /*!< [14..14] Module stop bit 14. See device hardware manual for + * usage. */ + __IOM uint32_t MSTPE15 : 1; /*!< [15..15] Module stop bit 15. See device hardware manual for + * usage. */ + __IOM uint32_t MSTPE16 : 1; /*!< [16..16] Module stop bit 16. See device hardware manual for + * usage. */ + __IOM uint32_t MSTPE17 : 1; /*!< [17..17] Module stop bit 17. See device hardware manual for + * usage. */ + __IOM uint32_t MSTPE18 : 1; /*!< [18..18] Module stop bit 18. See device hardware manual for + * usage. */ + __IOM uint32_t MSTPE19 : 1; /*!< [19..19] Module stop bit 19. See device hardware manual for + * usage. */ + __IOM uint32_t MSTPE20 : 1; /*!< [20..20] Module stop bit 20. See device hardware manual for + * usage. */ + __IOM uint32_t MSTPE21 : 1; /*!< [21..21] Module stop bit 21. See device hardware manual for + * usage. */ + __IOM uint32_t MSTPE22 : 1; /*!< [22..22] Module stop bit 22. See device hardware manual for + * usage. */ + __IOM uint32_t MSTPE23 : 1; /*!< [23..23] Module stop bit 23. See device hardware manual for + * usage. */ + __IOM uint32_t MSTPE24 : 1; /*!< [24..24] Module stop bit 24. See device hardware manual for + * usage. */ + __IOM uint32_t MSTPE25 : 1; /*!< [25..25] Module stop bit 25. See device hardware manual for + * usage. */ + __IOM uint32_t MSTPE26 : 1; /*!< [26..26] Module stop bit 26. See device hardware manual for + * usage. */ + __IOM uint32_t MSTPE27 : 1; /*!< [27..27] Module stop bit 27. See device hardware manual for + * usage. */ + __IOM uint32_t MSTPE28 : 1; /*!< [28..28] Module stop bit 28. See device hardware manual for + * usage. */ + __IOM uint32_t MSTPE29 : 1; /*!< [29..29] Module stop bit 29. See device hardware manual for + * usage. */ + __IOM uint32_t MSTPE30 : 1; /*!< [30..30] Module stop bit 30. See device hardware manual for + * usage. */ + __IOM uint32_t MSTPE31 : 1; /*!< [31..31] Module stop bit 31. See device hardware manual for + * usage. */ + } MSTPCRE_b; + }; + + union { - __IOM uint32_t MSTPE0 : 1; /*!< [0..0] Module stop bit 0. See device hardware manual for usage. */ - __IOM uint32_t MSTPE1 : 1; /*!< [1..1] Module stop bit 1. See device hardware manual for usage. */ - __IOM uint32_t MSTPE2 : 1; /*!< [2..2] Module stop bit 2. See device hardware manual for usage. */ - __IOM uint32_t MSTPE3 : 1; /*!< [3..3] Module stop bit 3. See device hardware manual for usage. */ - __IOM uint32_t MSTPE4 : 1; /*!< [4..4] Module stop bit 4. See device hardware manual for usage. */ - __IOM uint32_t MSTPE5 : 1; /*!< [5..5] Module stop bit 5. See device hardware manual for usage. */ - __IOM uint32_t MSTPE6 : 1; /*!< [6..6] Module stop bit 6. See device hardware manual for usage. */ - __IOM uint32_t MSTPE7 : 1; /*!< [7..7] Module stop bit 7. See device hardware manual for usage. */ - __IOM uint32_t MSTPE8 : 1; /*!< [8..8] Module stop bit 8. See device hardware manual for usage. */ - __IOM uint32_t MSTPE9 : 1; /*!< [9..9] Module stop bit 9. See device hardware manual for usage. */ - __IOM uint32_t MSTPE10 : 1; /*!< [10..10] Module stop bit 10. See device hardware manual for - * usage. */ - __IOM uint32_t MSTPE11 : 1; /*!< [11..11] Module stop bit 11. See device hardware manual for - * usage. */ - __IOM uint32_t MSTPE12 : 1; /*!< [12..12] Module stop bit 12. See device hardware manual for - * usage. */ - __IOM uint32_t MSTPE13 : 1; /*!< [13..13] Module stop bit 13. See device hardware manual for - * usage. */ - __IOM uint32_t MSTPE14 : 1; /*!< [14..14] Module stop bit 14. See device hardware manual for - * usage. */ - __IOM uint32_t MSTPE15 : 1; /*!< [15..15] Module stop bit 15. See device hardware manual for - * usage. */ - __IOM uint32_t MSTPE16 : 1; /*!< [16..16] Module stop bit 16. See device hardware manual for - * usage. */ - __IOM uint32_t MSTPE17 : 1; /*!< [17..17] Module stop bit 17. See device hardware manual for - * usage. */ - __IOM uint32_t MSTPE18 : 1; /*!< [18..18] Module stop bit 18. See device hardware manual for - * usage. */ - __IOM uint32_t MSTPE19 : 1; /*!< [19..19] Module stop bit 19. See device hardware manual for - * usage. */ - __IOM uint32_t MSTPE20 : 1; /*!< [20..20] Module stop bit 20. See device hardware manual for - * usage. */ - __IOM uint32_t MSTPE21 : 1; /*!< [21..21] Module stop bit 21. See device hardware manual for - * usage. */ - __IOM uint32_t MSTPE22 : 1; /*!< [22..22] Module stop bit 22. See device hardware manual for - * usage. */ - __IOM uint32_t MSTPE23 : 1; /*!< [23..23] Module stop bit 23. See device hardware manual for - * usage. */ - __IOM uint32_t MSTPE24 : 1; /*!< [24..24] Module stop bit 24. See device hardware manual for - * usage. */ - __IOM uint32_t MSTPE25 : 1; /*!< [25..25] Module stop bit 25. See device hardware manual for - * usage. */ - __IOM uint32_t MSTPE26 : 1; /*!< [26..26] Module stop bit 26. See device hardware manual for - * usage. */ - __IOM uint32_t MSTPE27 : 1; /*!< [27..27] Module stop bit 27. See device hardware manual for - * usage. */ - __IOM uint32_t MSTPE28 : 1; /*!< [28..28] Module stop bit 28. See device hardware manual for - * usage. */ - __IOM uint32_t MSTPE29 : 1; /*!< [29..29] Module stop bit 29. See device hardware manual for - * usage. */ - __IOM uint32_t MSTPE30 : 1; /*!< [30..30] Module stop bit 30. See device hardware manual for - * usage. */ - __IOM uint32_t MSTPE31 : 1; /*!< [31..31] Module stop bit 31. See device hardware manual for - * usage. */ - } MSTPCRE_b; + __IOM uint16_t LSMRWDIS; /*!< (@ 0x00000010) Low Speed Module R/W Disable Control Register */ + + struct + { + __IOM uint16_t RTCRWDIS : 1; /*!< [0..0] RTC Register R/W Enable Control */ + __IOM uint16_t WDTDIS : 1; /*!< [1..1] WDT Operate Clock Control */ + __IOM uint16_t IWDTIDS : 1; /*!< [2..2] IWDT Register Clock Control */ + uint16_t : 4; + __IOM uint16_t WREN : 1; /*!< [7..7] Write Enable for bits [2:0] */ + __OM uint16_t PRKEY : 8; /*!< [15..8] LSMRWDIS Key Code */ + } LSMRWDIS_b; + }; }; -} R_MSTP_Type; /*!< Size = 20 (0x14) */ +} R_MSTP_Type; /*!< Size = 20 (0x14) */ /* =========================================================================================================================== */ /* ================ R_PORT0 ================ */ @@ -8601,11 +8619,23 @@ typedef struct /*!< (@ 0x40080D00) R_PMISC Structure struct { uint8_t : 6; - __IOM uint8_t PFSWE : 1; /*!< [6..6] PmnPFS Register Write */ - __IOM uint8_t B0WI : 1; /*!< [7..7] PFSWE Bit Write Disable */ + __IOM uint8_t PFSWE : 1; /*!< [6..6] PmnPFS Register Write */ + __IOM uint8_t B0WI : 1; /*!< [7..7] PFSWE Bit Write Disable */ } PWPRS_b; }; - __IM uint16_t RESERVED2[5]; + __IM uint16_t RESERVED2[4]; + __IM uint8_t RESERVED3; + + union + { + __IOM uint8_t PRWCNTR; /*!< (@ 0x0000000F) Port Read Wait Control Register */ + + struct + { + __IOM uint8_t WAIT : 2; /*!< [1..0] Wait Cycle Control */ + uint8_t : 6; + } PRWCNTR_b; + }; __IOM R_PMISC_PMSAR_Type PMSAR[12]; /*!< (@ 0x00000010) Port Security Attribution Register */ } R_PMISC_Type; /*!< Size = 40 (0x28) */ @@ -16580,16 +16610,16 @@ typedef struct /*!< (@ 0x407FC000) R_FLAD Structure #define R_CPSCU ((R_CPSCU_Type *) R_CPSCU_BASE) #define R_OSPI ((R_OSPI_Type *) R_OSPI_BASE) #define R_USB_HS0 ((R_USB_HS0_Type *) R_USB_HS0_BASE) - #define R_AGTX0 ((R_AGTX0_Type *) R_AGTX0_BASE) - #define R_AGTX1 ((R_AGTX0_Type *) R_AGTX1_BASE) - #define R_AGTX2 ((R_AGTX0_Type *) R_AGTX2_BASE) - #define R_AGTX3 ((R_AGTX0_Type *) R_AGTX3_BASE) - #define R_AGTX4 ((R_AGTX0_Type *) R_AGTX4_BASE) - #define R_AGTX5 ((R_AGTX0_Type *) R_AGTX5_BASE) - #define R_AGTX6 ((R_AGTX0_Type *) R_AGTX6_BASE) - #define R_AGTX7 ((R_AGTX0_Type *) R_AGTX7_BASE) - #define R_AGTX8 ((R_AGTX0_Type *) R_AGTX8_BASE) - #define R_AGTX9 ((R_AGTX0_Type *) R_AGTX9_BASE) + #define R_AGT0 ((R_AGTX0_Type *) R_AGTX0_BASE) + #define R_AGT1 ((R_AGTX0_Type *) R_AGTX1_BASE) + #define R_AGT2 ((R_AGTX0_Type *) R_AGTX2_BASE) + #define R_AGT3 ((R_AGTX0_Type *) R_AGTX3_BASE) + #define R_AGT4 ((R_AGTX0_Type *) R_AGTX4_BASE) + #define R_AGT5 ((R_AGTX0_Type *) R_AGTX5_BASE) + #define R_AGT6 ((R_AGTX0_Type *) R_AGTX6_BASE) + #define R_AGT7 ((R_AGTX0_Type *) R_AGTX7_BASE) + #define R_AGT8 ((R_AGTX0_Type *) R_AGTX8_BASE) + #define R_AGT9 ((R_AGTX0_Type *) R_AGTX9_BASE) #define R_FLAD ((R_FLAD_Type *) R_FLAD_BASE) /** @} */ /* End of group Device_Peripheral_declaration */ @@ -20370,20 +20400,31 @@ typedef struct /*!< (@ 0x407FC000) R_FLAD Structure /* =========================================================================================================================== */ /* ======================================================== MSTPCRA ======================================================== */ - #define R_MSTP_MSTPCRA_MSTPA_Pos (0UL) /*!< MSTPA (Bit 0) */ - #define R_MSTP_MSTPCRA_MSTPA_Msk (0x1UL) /*!< MSTPA (Bitfield-Mask: 0x01) */ + #define R_MSTP_MSTPCRA_MSTPA_Pos (0UL) /*!< MSTPA (Bit 0) */ + #define R_MSTP_MSTPCRA_MSTPA_Msk (0x1UL) /*!< MSTPA (Bitfield-Mask: 0x01) */ /* ======================================================== MSTPCRB ======================================================== */ - #define R_MSTP_MSTPCRB_MSTPB_Pos (0UL) /*!< MSTPB (Bit 0) */ - #define R_MSTP_MSTPCRB_MSTPB_Msk (0x1UL) /*!< MSTPB (Bitfield-Mask: 0x01) */ + #define R_MSTP_MSTPCRB_MSTPB_Pos (0UL) /*!< MSTPB (Bit 0) */ + #define R_MSTP_MSTPCRB_MSTPB_Msk (0x1UL) /*!< MSTPB (Bitfield-Mask: 0x01) */ /* ======================================================== MSTPCRC ======================================================== */ - #define R_MSTP_MSTPCRC_MSTPC_Pos (0UL) /*!< MSTPC (Bit 0) */ - #define R_MSTP_MSTPCRC_MSTPC_Msk (0x1UL) /*!< MSTPC (Bitfield-Mask: 0x01) */ + #define R_MSTP_MSTPCRC_MSTPC_Pos (0UL) /*!< MSTPC (Bit 0) */ + #define R_MSTP_MSTPCRC_MSTPC_Msk (0x1UL) /*!< MSTPC (Bitfield-Mask: 0x01) */ /* ======================================================== MSTPCRD ======================================================== */ - #define R_MSTP_MSTPCRD_MSTPD_Pos (0UL) /*!< MSTPD (Bit 0) */ - #define R_MSTP_MSTPCRD_MSTPD_Msk (0x1UL) /*!< MSTPD (Bitfield-Mask: 0x01) */ + #define R_MSTP_MSTPCRD_MSTPD_Pos (0UL) /*!< MSTPD (Bit 0) */ + #define R_MSTP_MSTPCRD_MSTPD_Msk (0x1UL) /*!< MSTPD (Bitfield-Mask: 0x01) */ /* ======================================================== MSTPCRE ======================================================== */ - #define R_MSTP_MSTPCRE_MSTPE_Pos (0UL) /*!< MSTPE (Bit 0) */ - #define R_MSTP_MSTPCRE_MSTPE_Msk (0x1UL) /*!< MSTPE (Bitfield-Mask: 0x01) */ + #define R_MSTP_MSTPCRE_MSTPE_Pos (0UL) /*!< MSTPE (Bit 0) */ + #define R_MSTP_MSTPCRE_MSTPE_Msk (0x1UL) /*!< MSTPE (Bitfield-Mask: 0x01) */ +/* ======================================================= LSMRWDIS ======================================================== */ + #define R_MSTP_LSMRWDIS_RTCRWDIS_Pos (0UL) /*!< RTCRWDIS (Bit 0) */ + #define R_MSTP_LSMRWDIS_RTCRWDIS_Msk (0x1UL) /*!< RTCRWDIS (Bitfield-Mask: 0x01) */ + #define R_MSTP_LSMRWDIS_WDTDIS_Pos (1UL) /*!< WDTDIS (Bit 1) */ + #define R_MSTP_LSMRWDIS_WDTDIS_Msk (0x2UL) /*!< WDTDIS (Bitfield-Mask: 0x01) */ + #define R_MSTP_LSMRWDIS_IWDTIDS_Pos (2UL) /*!< IWDTIDS (Bit 2) */ + #define R_MSTP_LSMRWDIS_IWDTIDS_Msk (0x4UL) /*!< IWDTIDS (Bitfield-Mask: 0x01) */ + #define R_MSTP_LSMRWDIS_WREN_Pos (7UL) /*!< WREN (Bit 7) */ + #define R_MSTP_LSMRWDIS_WREN_Msk (0x80UL) /*!< WREN (Bitfield-Mask: 0x01) */ + #define R_MSTP_LSMRWDIS_PRKEY_Pos (8UL) /*!< PRKEY (Bit 8) */ + #define R_MSTP_LSMRWDIS_PRKEY_Msk (0xff00UL) /*!< PRKEY (Bitfield-Mask: 0xff) */ /* =========================================================================================================================== */ /* ================ R_PORT0 ================ */ @@ -20457,6 +20498,9 @@ typedef struct /*!< (@ 0x407FC000) R_FLAD Structure #define R_PMISC_PWPRS_PFSWE_Msk (0x40UL) /*!< PFSWE (Bitfield-Mask: 0x01) */ #define R_PMISC_PWPRS_B0WI_Pos (7UL) /*!< B0WI (Bit 7) */ #define R_PMISC_PWPRS_B0WI_Msk (0x80UL) /*!< B0WI (Bitfield-Mask: 0x01) */ +/* ======================================================== PRWCNTR ======================================================== */ + #define R_PMISC_PRWCNTR_WAIT_Pos (0UL) /*!< WAIT (Bit 0) */ + #define R_PMISC_PRWCNTR_WAIT_Msk (0x3UL) /*!< WAIT (Bitfield-Mask: 0x03) */ /* =========================================================================================================================== */ /* ================ R_QSPI ================ */ diff --git a/ra/fsp/src/bsp/cmsis/Device/RENESAS/Include/R7FA6M5BH.h b/ra/fsp/src/bsp/cmsis/Device/RENESAS/Include/R7FA6M5BH.h index 19ea67b3c..e6c05a8e3 100644 --- a/ra/fsp/src/bsp/cmsis/Device/RENESAS/Include/R7FA6M5BH.h +++ b/ra/fsp/src/bsp/cmsis/Device/RENESAS/Include/R7FA6M5BH.h @@ -10471,67 +10471,85 @@ typedef struct /*!< (@ 0x40084000) R_MSTP Structure union { - __IOM uint32_t MSTPCRE; /*!< (@ 0x00000010) Module Stop Control Register E */ + union + { + __IOM uint32_t MSTPCRE; /*!< (@ 0x00000010) Module Stop Control Register E */ - struct + struct + { + __IOM uint32_t MSTPE0 : 1; /*!< [0..0] Module stop bit 0. See device hardware manual for usage. */ + __IOM uint32_t MSTPE1 : 1; /*!< [1..1] Module stop bit 1. See device hardware manual for usage. */ + __IOM uint32_t MSTPE2 : 1; /*!< [2..2] Module stop bit 2. See device hardware manual for usage. */ + __IOM uint32_t MSTPE3 : 1; /*!< [3..3] Module stop bit 3. See device hardware manual for usage. */ + __IOM uint32_t MSTPE4 : 1; /*!< [4..4] Module stop bit 4. See device hardware manual for usage. */ + __IOM uint32_t MSTPE5 : 1; /*!< [5..5] Module stop bit 5. See device hardware manual for usage. */ + __IOM uint32_t MSTPE6 : 1; /*!< [6..6] Module stop bit 6. See device hardware manual for usage. */ + __IOM uint32_t MSTPE7 : 1; /*!< [7..7] Module stop bit 7. See device hardware manual for usage. */ + __IOM uint32_t MSTPE8 : 1; /*!< [8..8] Module stop bit 8. See device hardware manual for usage. */ + __IOM uint32_t MSTPE9 : 1; /*!< [9..9] Module stop bit 9. See device hardware manual for usage. */ + __IOM uint32_t MSTPE10 : 1; /*!< [10..10] Module stop bit 10. See device hardware manual for + * usage. */ + __IOM uint32_t MSTPE11 : 1; /*!< [11..11] Module stop bit 11. See device hardware manual for + * usage. */ + __IOM uint32_t MSTPE12 : 1; /*!< [12..12] Module stop bit 12. See device hardware manual for + * usage. */ + __IOM uint32_t MSTPE13 : 1; /*!< [13..13] Module stop bit 13. See device hardware manual for + * usage. */ + __IOM uint32_t MSTPE14 : 1; /*!< [14..14] Module stop bit 14. See device hardware manual for + * usage. */ + __IOM uint32_t MSTPE15 : 1; /*!< [15..15] Module stop bit 15. See device hardware manual for + * usage. */ + __IOM uint32_t MSTPE16 : 1; /*!< [16..16] Module stop bit 16. See device hardware manual for + * usage. */ + __IOM uint32_t MSTPE17 : 1; /*!< [17..17] Module stop bit 17. See device hardware manual for + * usage. */ + __IOM uint32_t MSTPE18 : 1; /*!< [18..18] Module stop bit 18. See device hardware manual for + * usage. */ + __IOM uint32_t MSTPE19 : 1; /*!< [19..19] Module stop bit 19. See device hardware manual for + * usage. */ + __IOM uint32_t MSTPE20 : 1; /*!< [20..20] Module stop bit 20. See device hardware manual for + * usage. */ + __IOM uint32_t MSTPE21 : 1; /*!< [21..21] Module stop bit 21. See device hardware manual for + * usage. */ + __IOM uint32_t MSTPE22 : 1; /*!< [22..22] Module stop bit 22. See device hardware manual for + * usage. */ + __IOM uint32_t MSTPE23 : 1; /*!< [23..23] Module stop bit 23. See device hardware manual for + * usage. */ + __IOM uint32_t MSTPE24 : 1; /*!< [24..24] Module stop bit 24. See device hardware manual for + * usage. */ + __IOM uint32_t MSTPE25 : 1; /*!< [25..25] Module stop bit 25. See device hardware manual for + * usage. */ + __IOM uint32_t MSTPE26 : 1; /*!< [26..26] Module stop bit 26. See device hardware manual for + * usage. */ + __IOM uint32_t MSTPE27 : 1; /*!< [27..27] Module stop bit 27. See device hardware manual for + * usage. */ + __IOM uint32_t MSTPE28 : 1; /*!< [28..28] Module stop bit 28. See device hardware manual for + * usage. */ + __IOM uint32_t MSTPE29 : 1; /*!< [29..29] Module stop bit 29. See device hardware manual for + * usage. */ + __IOM uint32_t MSTPE30 : 1; /*!< [30..30] Module stop bit 30. See device hardware manual for + * usage. */ + __IOM uint32_t MSTPE31 : 1; /*!< [31..31] Module stop bit 31. See device hardware manual for + * usage. */ + } MSTPCRE_b; + }; + + union { - __IOM uint32_t MSTPE0 : 1; /*!< [0..0] Module stop bit 0. See device hardware manual for usage. */ - __IOM uint32_t MSTPE1 : 1; /*!< [1..1] Module stop bit 1. See device hardware manual for usage. */ - __IOM uint32_t MSTPE2 : 1; /*!< [2..2] Module stop bit 2. See device hardware manual for usage. */ - __IOM uint32_t MSTPE3 : 1; /*!< [3..3] Module stop bit 3. See device hardware manual for usage. */ - __IOM uint32_t MSTPE4 : 1; /*!< [4..4] Module stop bit 4. See device hardware manual for usage. */ - __IOM uint32_t MSTPE5 : 1; /*!< [5..5] Module stop bit 5. See device hardware manual for usage. */ - __IOM uint32_t MSTPE6 : 1; /*!< [6..6] Module stop bit 6. See device hardware manual for usage. */ - __IOM uint32_t MSTPE7 : 1; /*!< [7..7] Module stop bit 7. See device hardware manual for usage. */ - __IOM uint32_t MSTPE8 : 1; /*!< [8..8] Module stop bit 8. See device hardware manual for usage. */ - __IOM uint32_t MSTPE9 : 1; /*!< [9..9] Module stop bit 9. See device hardware manual for usage. */ - __IOM uint32_t MSTPE10 : 1; /*!< [10..10] Module stop bit 10. See device hardware manual for - * usage. */ - __IOM uint32_t MSTPE11 : 1; /*!< [11..11] Module stop bit 11. See device hardware manual for - * usage. */ - __IOM uint32_t MSTPE12 : 1; /*!< [12..12] Module stop bit 12. See device hardware manual for - * usage. */ - __IOM uint32_t MSTPE13 : 1; /*!< [13..13] Module stop bit 13. See device hardware manual for - * usage. */ - __IOM uint32_t MSTPE14 : 1; /*!< [14..14] Module stop bit 14. See device hardware manual for - * usage. */ - __IOM uint32_t MSTPE15 : 1; /*!< [15..15] Module stop bit 15. See device hardware manual for - * usage. */ - __IOM uint32_t MSTPE16 : 1; /*!< [16..16] Module stop bit 16. See device hardware manual for - * usage. */ - __IOM uint32_t MSTPE17 : 1; /*!< [17..17] Module stop bit 17. See device hardware manual for - * usage. */ - __IOM uint32_t MSTPE18 : 1; /*!< [18..18] Module stop bit 18. See device hardware manual for - * usage. */ - __IOM uint32_t MSTPE19 : 1; /*!< [19..19] Module stop bit 19. See device hardware manual for - * usage. */ - __IOM uint32_t MSTPE20 : 1; /*!< [20..20] Module stop bit 20. See device hardware manual for - * usage. */ - __IOM uint32_t MSTPE21 : 1; /*!< [21..21] Module stop bit 21. See device hardware manual for - * usage. */ - __IOM uint32_t MSTPE22 : 1; /*!< [22..22] Module stop bit 22. See device hardware manual for - * usage. */ - __IOM uint32_t MSTPE23 : 1; /*!< [23..23] Module stop bit 23. See device hardware manual for - * usage. */ - __IOM uint32_t MSTPE24 : 1; /*!< [24..24] Module stop bit 24. See device hardware manual for - * usage. */ - __IOM uint32_t MSTPE25 : 1; /*!< [25..25] Module stop bit 25. See device hardware manual for - * usage. */ - __IOM uint32_t MSTPE26 : 1; /*!< [26..26] Module stop bit 26. See device hardware manual for - * usage. */ - __IOM uint32_t MSTPE27 : 1; /*!< [27..27] Module stop bit 27. See device hardware manual for - * usage. */ - __IOM uint32_t MSTPE28 : 1; /*!< [28..28] Module stop bit 28. See device hardware manual for - * usage. */ - __IOM uint32_t MSTPE29 : 1; /*!< [29..29] Module stop bit 29. See device hardware manual for - * usage. */ - __IOM uint32_t MSTPE30 : 1; /*!< [30..30] Module stop bit 30. See device hardware manual for - * usage. */ - __IOM uint32_t MSTPE31 : 1; /*!< [31..31] Module stop bit 31. See device hardware manual for - * usage. */ - } MSTPCRE_b; + __IOM uint16_t LSMRWDIS; /*!< (@ 0x00000010) Low Speed Module R/W Disable Control Register */ + + struct + { + __IOM uint16_t RTCRWDIS : 1; /*!< [0..0] RTC Register R/W Enable Control */ + __IOM uint16_t WDTDIS : 1; /*!< [1..1] WDT Operate Clock Control */ + __IOM uint16_t IWDTIDS : 1; /*!< [2..2] IWDT Register Clock Control */ + uint16_t : 4; + __IOM uint16_t WREN : 1; /*!< [7..7] Write Enable for bits [2:0] */ + __OM uint16_t PRKEY : 8; /*!< [15..8] LSMRWDIS Key Code */ + } LSMRWDIS_b; + }; }; -} R_MSTP_Type; /*!< Size = 20 (0x14) */ +} R_MSTP_Type; /*!< Size = 20 (0x14) */ /* =========================================================================================================================== */ /* ================ R_PORT0 ================ */ @@ -10873,11 +10891,23 @@ typedef struct /*!< (@ 0x40080D00) R_PMISC Structure struct { uint8_t : 6; - __IOM uint8_t PFSWE : 1; /*!< [6..6] PmnPFS Register Write */ - __IOM uint8_t B0WI : 1; /*!< [7..7] PFSWE Bit Write Disable */ + __IOM uint8_t PFSWE : 1; /*!< [6..6] PmnPFS Register Write */ + __IOM uint8_t B0WI : 1; /*!< [7..7] PFSWE Bit Write Disable */ } PWPRS_b; }; - __IM uint16_t RESERVED2[5]; + __IM uint16_t RESERVED2[4]; + __IM uint8_t RESERVED3; + + union + { + __IOM uint8_t PRWCNTR; /*!< (@ 0x0000000F) Port Read Wait Control Register */ + + struct + { + __IOM uint8_t WAIT : 2; /*!< [1..0] Wait Cycle Control */ + uint8_t : 6; + } PRWCNTR_b; + }; __IOM R_PMISC_PMSAR_Type PMSAR[12]; /*!< (@ 0x00000010) Port Security Attribution Register */ } R_PMISC_Type; /*!< Size = 40 (0x28) */ @@ -19210,16 +19240,16 @@ typedef struct /*!< (@ 0x407FC000) R_FLAD Structure #define R_CEC ((R_CEC_Type *) R_CEC_BASE) #define R_OSPI ((R_OSPI_Type *) R_OSPI_BASE) #define R_USB_HS0 ((R_USB_HS0_Type *) R_USB_HS0_BASE) - #define R_AGTX0 ((R_AGTX0_Type *) R_AGTX0_BASE) - #define R_AGTX1 ((R_AGTX0_Type *) R_AGTX1_BASE) - #define R_AGTX2 ((R_AGTX0_Type *) R_AGTX2_BASE) - #define R_AGTX3 ((R_AGTX0_Type *) R_AGTX3_BASE) - #define R_AGTX4 ((R_AGTX0_Type *) R_AGTX4_BASE) - #define R_AGTX5 ((R_AGTX0_Type *) R_AGTX5_BASE) - #define R_AGTX6 ((R_AGTX0_Type *) R_AGTX6_BASE) - #define R_AGTX7 ((R_AGTX0_Type *) R_AGTX7_BASE) - #define R_AGTX8 ((R_AGTX0_Type *) R_AGTX8_BASE) - #define R_AGTX9 ((R_AGTX0_Type *) R_AGTX9_BASE) + #define R_AGT0 ((R_AGTX0_Type *) R_AGTX0_BASE) + #define R_AGT1 ((R_AGTX0_Type *) R_AGTX1_BASE) + #define R_AGT2 ((R_AGTX0_Type *) R_AGTX2_BASE) + #define R_AGT3 ((R_AGTX0_Type *) R_AGTX3_BASE) + #define R_AGT4 ((R_AGTX0_Type *) R_AGTX4_BASE) + #define R_AGT5 ((R_AGTX0_Type *) R_AGTX5_BASE) + #define R_AGT6 ((R_AGTX0_Type *) R_AGTX6_BASE) + #define R_AGT7 ((R_AGTX0_Type *) R_AGTX7_BASE) + #define R_AGT8 ((R_AGTX0_Type *) R_AGTX8_BASE) + #define R_AGT9 ((R_AGTX0_Type *) R_AGTX9_BASE) #define R_FLAD ((R_FLAD_Type *) R_FLAD_BASE) /** @} */ /* End of group Device_Peripheral_declaration */ @@ -24193,20 +24223,31 @@ typedef struct /*!< (@ 0x407FC000) R_FLAD Structure /* =========================================================================================================================== */ /* ======================================================== MSTPCRA ======================================================== */ - #define R_MSTP_MSTPCRA_MSTPA_Pos (0UL) /*!< MSTPA (Bit 0) */ - #define R_MSTP_MSTPCRA_MSTPA_Msk (0x1UL) /*!< MSTPA (Bitfield-Mask: 0x01) */ + #define R_MSTP_MSTPCRA_MSTPA_Pos (0UL) /*!< MSTPA (Bit 0) */ + #define R_MSTP_MSTPCRA_MSTPA_Msk (0x1UL) /*!< MSTPA (Bitfield-Mask: 0x01) */ /* ======================================================== MSTPCRB ======================================================== */ - #define R_MSTP_MSTPCRB_MSTPB_Pos (0UL) /*!< MSTPB (Bit 0) */ - #define R_MSTP_MSTPCRB_MSTPB_Msk (0x1UL) /*!< MSTPB (Bitfield-Mask: 0x01) */ + #define R_MSTP_MSTPCRB_MSTPB_Pos (0UL) /*!< MSTPB (Bit 0) */ + #define R_MSTP_MSTPCRB_MSTPB_Msk (0x1UL) /*!< MSTPB (Bitfield-Mask: 0x01) */ /* ======================================================== MSTPCRC ======================================================== */ - #define R_MSTP_MSTPCRC_MSTPC_Pos (0UL) /*!< MSTPC (Bit 0) */ - #define R_MSTP_MSTPCRC_MSTPC_Msk (0x1UL) /*!< MSTPC (Bitfield-Mask: 0x01) */ + #define R_MSTP_MSTPCRC_MSTPC_Pos (0UL) /*!< MSTPC (Bit 0) */ + #define R_MSTP_MSTPCRC_MSTPC_Msk (0x1UL) /*!< MSTPC (Bitfield-Mask: 0x01) */ /* ======================================================== MSTPCRD ======================================================== */ - #define R_MSTP_MSTPCRD_MSTPD_Pos (0UL) /*!< MSTPD (Bit 0) */ - #define R_MSTP_MSTPCRD_MSTPD_Msk (0x1UL) /*!< MSTPD (Bitfield-Mask: 0x01) */ + #define R_MSTP_MSTPCRD_MSTPD_Pos (0UL) /*!< MSTPD (Bit 0) */ + #define R_MSTP_MSTPCRD_MSTPD_Msk (0x1UL) /*!< MSTPD (Bitfield-Mask: 0x01) */ /* ======================================================== MSTPCRE ======================================================== */ - #define R_MSTP_MSTPCRE_MSTPE_Pos (0UL) /*!< MSTPE (Bit 0) */ - #define R_MSTP_MSTPCRE_MSTPE_Msk (0x1UL) /*!< MSTPE (Bitfield-Mask: 0x01) */ + #define R_MSTP_MSTPCRE_MSTPE_Pos (0UL) /*!< MSTPE (Bit 0) */ + #define R_MSTP_MSTPCRE_MSTPE_Msk (0x1UL) /*!< MSTPE (Bitfield-Mask: 0x01) */ +/* ======================================================= LSMRWDIS ======================================================== */ + #define R_MSTP_LSMRWDIS_RTCRWDIS_Pos (0UL) /*!< RTCRWDIS (Bit 0) */ + #define R_MSTP_LSMRWDIS_RTCRWDIS_Msk (0x1UL) /*!< RTCRWDIS (Bitfield-Mask: 0x01) */ + #define R_MSTP_LSMRWDIS_WDTDIS_Pos (1UL) /*!< WDTDIS (Bit 1) */ + #define R_MSTP_LSMRWDIS_WDTDIS_Msk (0x2UL) /*!< WDTDIS (Bitfield-Mask: 0x01) */ + #define R_MSTP_LSMRWDIS_IWDTIDS_Pos (2UL) /*!< IWDTIDS (Bit 2) */ + #define R_MSTP_LSMRWDIS_IWDTIDS_Msk (0x4UL) /*!< IWDTIDS (Bitfield-Mask: 0x01) */ + #define R_MSTP_LSMRWDIS_WREN_Pos (7UL) /*!< WREN (Bit 7) */ + #define R_MSTP_LSMRWDIS_WREN_Msk (0x80UL) /*!< WREN (Bitfield-Mask: 0x01) */ + #define R_MSTP_LSMRWDIS_PRKEY_Pos (8UL) /*!< PRKEY (Bit 8) */ + #define R_MSTP_LSMRWDIS_PRKEY_Msk (0xff00UL) /*!< PRKEY (Bitfield-Mask: 0xff) */ /* =========================================================================================================================== */ /* ================ R_PORT0 ================ */ @@ -24280,6 +24321,9 @@ typedef struct /*!< (@ 0x407FC000) R_FLAD Structure #define R_PMISC_PWPRS_PFSWE_Msk (0x40UL) /*!< PFSWE (Bitfield-Mask: 0x01) */ #define R_PMISC_PWPRS_B0WI_Pos (7UL) /*!< B0WI (Bit 7) */ #define R_PMISC_PWPRS_B0WI_Msk (0x80UL) /*!< B0WI (Bitfield-Mask: 0x01) */ +/* ======================================================== PRWCNTR ======================================================== */ + #define R_PMISC_PRWCNTR_WAIT_Pos (0UL) /*!< WAIT (Bit 0) */ + #define R_PMISC_PRWCNTR_WAIT_Msk (0x3UL) /*!< WAIT (Bitfield-Mask: 0x03) */ /* =========================================================================================================================== */ /* ================ R_QSPI ================ */ diff --git a/ra/fsp/src/bsp/cmsis/Device/RENESAS/Include/R7FA6T1AD.h b/ra/fsp/src/bsp/cmsis/Device/RENESAS/Include/R7FA6T1AD.h index d0aa560ea..8fa2520db 100644 --- a/ra/fsp/src/bsp/cmsis/Device/RENESAS/Include/R7FA6T1AD.h +++ b/ra/fsp/src/bsp/cmsis/Device/RENESAS/Include/R7FA6T1AD.h @@ -6878,67 +6878,85 @@ typedef struct /*!< (@ 0x40047000) R_MSTP Structure union { - __IOM uint32_t MSTPCRE; /*!< (@ 0x00000010) Module Stop Control Register E */ + union + { + __IOM uint32_t MSTPCRE; /*!< (@ 0x00000010) Module Stop Control Register E */ - struct + struct + { + __IOM uint32_t MSTPE0 : 1; /*!< [0..0] Module stop bit 0. See device hardware manual for usage. */ + __IOM uint32_t MSTPE1 : 1; /*!< [1..1] Module stop bit 1. See device hardware manual for usage. */ + __IOM uint32_t MSTPE2 : 1; /*!< [2..2] Module stop bit 2. See device hardware manual for usage. */ + __IOM uint32_t MSTPE3 : 1; /*!< [3..3] Module stop bit 3. See device hardware manual for usage. */ + __IOM uint32_t MSTPE4 : 1; /*!< [4..4] Module stop bit 4. See device hardware manual for usage. */ + __IOM uint32_t MSTPE5 : 1; /*!< [5..5] Module stop bit 5. See device hardware manual for usage. */ + __IOM uint32_t MSTPE6 : 1; /*!< [6..6] Module stop bit 6. See device hardware manual for usage. */ + __IOM uint32_t MSTPE7 : 1; /*!< [7..7] Module stop bit 7. See device hardware manual for usage. */ + __IOM uint32_t MSTPE8 : 1; /*!< [8..8] Module stop bit 8. See device hardware manual for usage. */ + __IOM uint32_t MSTPE9 : 1; /*!< [9..9] Module stop bit 9. See device hardware manual for usage. */ + __IOM uint32_t MSTPE10 : 1; /*!< [10..10] Module stop bit 10. See device hardware manual for + * usage. */ + __IOM uint32_t MSTPE11 : 1; /*!< [11..11] Module stop bit 11. See device hardware manual for + * usage. */ + __IOM uint32_t MSTPE12 : 1; /*!< [12..12] Module stop bit 12. See device hardware manual for + * usage. */ + __IOM uint32_t MSTPE13 : 1; /*!< [13..13] Module stop bit 13. See device hardware manual for + * usage. */ + __IOM uint32_t MSTPE14 : 1; /*!< [14..14] Module stop bit 14. See device hardware manual for + * usage. */ + __IOM uint32_t MSTPE15 : 1; /*!< [15..15] Module stop bit 15. See device hardware manual for + * usage. */ + __IOM uint32_t MSTPE16 : 1; /*!< [16..16] Module stop bit 16. See device hardware manual for + * usage. */ + __IOM uint32_t MSTPE17 : 1; /*!< [17..17] Module stop bit 17. See device hardware manual for + * usage. */ + __IOM uint32_t MSTPE18 : 1; /*!< [18..18] Module stop bit 18. See device hardware manual for + * usage. */ + __IOM uint32_t MSTPE19 : 1; /*!< [19..19] Module stop bit 19. See device hardware manual for + * usage. */ + __IOM uint32_t MSTPE20 : 1; /*!< [20..20] Module stop bit 20. See device hardware manual for + * usage. */ + __IOM uint32_t MSTPE21 : 1; /*!< [21..21] Module stop bit 21. See device hardware manual for + * usage. */ + __IOM uint32_t MSTPE22 : 1; /*!< [22..22] Module stop bit 22. See device hardware manual for + * usage. */ + __IOM uint32_t MSTPE23 : 1; /*!< [23..23] Module stop bit 23. See device hardware manual for + * usage. */ + __IOM uint32_t MSTPE24 : 1; /*!< [24..24] Module stop bit 24. See device hardware manual for + * usage. */ + __IOM uint32_t MSTPE25 : 1; /*!< [25..25] Module stop bit 25. See device hardware manual for + * usage. */ + __IOM uint32_t MSTPE26 : 1; /*!< [26..26] Module stop bit 26. See device hardware manual for + * usage. */ + __IOM uint32_t MSTPE27 : 1; /*!< [27..27] Module stop bit 27. See device hardware manual for + * usage. */ + __IOM uint32_t MSTPE28 : 1; /*!< [28..28] Module stop bit 28. See device hardware manual for + * usage. */ + __IOM uint32_t MSTPE29 : 1; /*!< [29..29] Module stop bit 29. See device hardware manual for + * usage. */ + __IOM uint32_t MSTPE30 : 1; /*!< [30..30] Module stop bit 30. See device hardware manual for + * usage. */ + __IOM uint32_t MSTPE31 : 1; /*!< [31..31] Module stop bit 31. See device hardware manual for + * usage. */ + } MSTPCRE_b; + }; + + union { - __IOM uint32_t MSTPE0 : 1; /*!< [0..0] Module stop bit 0. See device hardware manual for usage. */ - __IOM uint32_t MSTPE1 : 1; /*!< [1..1] Module stop bit 1. See device hardware manual for usage. */ - __IOM uint32_t MSTPE2 : 1; /*!< [2..2] Module stop bit 2. See device hardware manual for usage. */ - __IOM uint32_t MSTPE3 : 1; /*!< [3..3] Module stop bit 3. See device hardware manual for usage. */ - __IOM uint32_t MSTPE4 : 1; /*!< [4..4] Module stop bit 4. See device hardware manual for usage. */ - __IOM uint32_t MSTPE5 : 1; /*!< [5..5] Module stop bit 5. See device hardware manual for usage. */ - __IOM uint32_t MSTPE6 : 1; /*!< [6..6] Module stop bit 6. See device hardware manual for usage. */ - __IOM uint32_t MSTPE7 : 1; /*!< [7..7] Module stop bit 7. See device hardware manual for usage. */ - __IOM uint32_t MSTPE8 : 1; /*!< [8..8] Module stop bit 8. See device hardware manual for usage. */ - __IOM uint32_t MSTPE9 : 1; /*!< [9..9] Module stop bit 9. See device hardware manual for usage. */ - __IOM uint32_t MSTPE10 : 1; /*!< [10..10] Module stop bit 10. See device hardware manual for - * usage. */ - __IOM uint32_t MSTPE11 : 1; /*!< [11..11] Module stop bit 11. See device hardware manual for - * usage. */ - __IOM uint32_t MSTPE12 : 1; /*!< [12..12] Module stop bit 12. See device hardware manual for - * usage. */ - __IOM uint32_t MSTPE13 : 1; /*!< [13..13] Module stop bit 13. See device hardware manual for - * usage. */ - __IOM uint32_t MSTPE14 : 1; /*!< [14..14] Module stop bit 14. See device hardware manual for - * usage. */ - __IOM uint32_t MSTPE15 : 1; /*!< [15..15] Module stop bit 15. See device hardware manual for - * usage. */ - __IOM uint32_t MSTPE16 : 1; /*!< [16..16] Module stop bit 16. See device hardware manual for - * usage. */ - __IOM uint32_t MSTPE17 : 1; /*!< [17..17] Module stop bit 17. See device hardware manual for - * usage. */ - __IOM uint32_t MSTPE18 : 1; /*!< [18..18] Module stop bit 18. See device hardware manual for - * usage. */ - __IOM uint32_t MSTPE19 : 1; /*!< [19..19] Module stop bit 19. See device hardware manual for - * usage. */ - __IOM uint32_t MSTPE20 : 1; /*!< [20..20] Module stop bit 20. See device hardware manual for - * usage. */ - __IOM uint32_t MSTPE21 : 1; /*!< [21..21] Module stop bit 21. See device hardware manual for - * usage. */ - __IOM uint32_t MSTPE22 : 1; /*!< [22..22] Module stop bit 22. See device hardware manual for - * usage. */ - __IOM uint32_t MSTPE23 : 1; /*!< [23..23] Module stop bit 23. See device hardware manual for - * usage. */ - __IOM uint32_t MSTPE24 : 1; /*!< [24..24] Module stop bit 24. See device hardware manual for - * usage. */ - __IOM uint32_t MSTPE25 : 1; /*!< [25..25] Module stop bit 25. See device hardware manual for - * usage. */ - __IOM uint32_t MSTPE26 : 1; /*!< [26..26] Module stop bit 26. See device hardware manual for - * usage. */ - __IOM uint32_t MSTPE27 : 1; /*!< [27..27] Module stop bit 27. See device hardware manual for - * usage. */ - __IOM uint32_t MSTPE28 : 1; /*!< [28..28] Module stop bit 28. See device hardware manual for - * usage. */ - __IOM uint32_t MSTPE29 : 1; /*!< [29..29] Module stop bit 29. See device hardware manual for - * usage. */ - __IOM uint32_t MSTPE30 : 1; /*!< [30..30] Module stop bit 30. See device hardware manual for - * usage. */ - __IOM uint32_t MSTPE31 : 1; /*!< [31..31] Module stop bit 31. See device hardware manual for - * usage. */ - } MSTPCRE_b; + __IOM uint16_t LSMRWDIS; /*!< (@ 0x00000010) Low Speed Module R/W Disable Control Register */ + + struct + { + __IOM uint16_t RTCRWDIS : 1; /*!< [0..0] RTC Register R/W Enable Control */ + __IOM uint16_t WDTDIS : 1; /*!< [1..1] WDT Operate Clock Control */ + __IOM uint16_t IWDTIDS : 1; /*!< [2..2] IWDT Register Clock Control */ + uint16_t : 4; + __IOM uint16_t WREN : 1; /*!< [7..7] Write Enable for bits [2:0] */ + __OM uint16_t PRKEY : 8; /*!< [15..8] LSMRWDIS Key Code */ + } LSMRWDIS_b; + }; }; -} R_MSTP_Type; /*!< Size = 20 (0x14) */ +} R_MSTP_Type; /*!< Size = 20 (0x14) */ /* =========================================================================================================================== */ /* ================ R_PORT0 ================ */ @@ -7280,11 +7298,23 @@ typedef struct /*!< (@ 0x40040D00) R_PMISC Structure struct { uint8_t : 6; - __IOM uint8_t PFSWE : 1; /*!< [6..6] PmnPFS Register Write */ - __IOM uint8_t B0WI : 1; /*!< [7..7] PFSWE Bit Write Disable */ + __IOM uint8_t PFSWE : 1; /*!< [6..6] PmnPFS Register Write */ + __IOM uint8_t B0WI : 1; /*!< [7..7] PFSWE Bit Write Disable */ } PWPRS_b; }; - __IM uint16_t RESERVED2[5]; + __IM uint16_t RESERVED2[4]; + __IM uint8_t RESERVED3; + + union + { + __IOM uint8_t PRWCNTR; /*!< (@ 0x0000000F) Port Read Wait Control Register */ + + struct + { + __IOM uint8_t WAIT : 2; /*!< [1..0] Wait Cycle Control */ + uint8_t : 6; + } PRWCNTR_b; + }; __IOM R_PMISC_PMSAR_Type PMSAR[12]; /*!< (@ 0x00000010) Port Security Attribution Register */ } R_PMISC_Type; /*!< Size = 40 (0x28) */ @@ -10848,16 +10878,16 @@ typedef struct /*!< (@ 0x40084000) R_AGTX0 Structure #define R_TSN_CAL ((R_TSN_CAL_Type *) R_TSN_CAL_BASE) #define R_TSN_CTRL ((R_TSN_CTRL_Type *) R_TSN_CTRL_BASE) #define R_WDT ((R_WDT_Type *) R_WDT_BASE) - #define R_AGTX0 ((R_AGTX0_Type *) R_AGTX0_BASE) - #define R_AGTX1 ((R_AGTX0_Type *) R_AGTX1_BASE) - #define R_AGTX2 ((R_AGTX0_Type *) R_AGTX2_BASE) - #define R_AGTX3 ((R_AGTX0_Type *) R_AGTX3_BASE) - #define R_AGTX4 ((R_AGTX0_Type *) R_AGTX4_BASE) - #define R_AGTX5 ((R_AGTX0_Type *) R_AGTX5_BASE) - #define R_AGTX6 ((R_AGTX0_Type *) R_AGTX6_BASE) - #define R_AGTX7 ((R_AGTX0_Type *) R_AGTX7_BASE) - #define R_AGTX8 ((R_AGTX0_Type *) R_AGTX8_BASE) - #define R_AGTX9 ((R_AGTX0_Type *) R_AGTX9_BASE) + #define R_AGT0 ((R_AGTX0_Type *) R_AGTX0_BASE) + #define R_AGT1 ((R_AGTX0_Type *) R_AGTX1_BASE) + #define R_AGT2 ((R_AGTX0_Type *) R_AGTX2_BASE) + #define R_AGT3 ((R_AGTX0_Type *) R_AGTX3_BASE) + #define R_AGT4 ((R_AGTX0_Type *) R_AGTX4_BASE) + #define R_AGT5 ((R_AGTX0_Type *) R_AGTX5_BASE) + #define R_AGT6 ((R_AGTX0_Type *) R_AGTX6_BASE) + #define R_AGT7 ((R_AGTX0_Type *) R_AGTX7_BASE) + #define R_AGT8 ((R_AGTX0_Type *) R_AGTX8_BASE) + #define R_AGT9 ((R_AGTX0_Type *) R_AGTX9_BASE) /** @} */ /* End of group Device_Peripheral_declaration */ @@ -14041,20 +14071,31 @@ typedef struct /*!< (@ 0x40084000) R_AGTX0 Structure /* =========================================================================================================================== */ /* ======================================================== MSTPCRA ======================================================== */ - #define R_MSTP_MSTPCRA_MSTPA_Pos (0UL) /*!< MSTPA (Bit 0) */ - #define R_MSTP_MSTPCRA_MSTPA_Msk (0x1UL) /*!< MSTPA (Bitfield-Mask: 0x01) */ + #define R_MSTP_MSTPCRA_MSTPA_Pos (0UL) /*!< MSTPA (Bit 0) */ + #define R_MSTP_MSTPCRA_MSTPA_Msk (0x1UL) /*!< MSTPA (Bitfield-Mask: 0x01) */ /* ======================================================== MSTPCRB ======================================================== */ - #define R_MSTP_MSTPCRB_MSTPB_Pos (0UL) /*!< MSTPB (Bit 0) */ - #define R_MSTP_MSTPCRB_MSTPB_Msk (0x1UL) /*!< MSTPB (Bitfield-Mask: 0x01) */ + #define R_MSTP_MSTPCRB_MSTPB_Pos (0UL) /*!< MSTPB (Bit 0) */ + #define R_MSTP_MSTPCRB_MSTPB_Msk (0x1UL) /*!< MSTPB (Bitfield-Mask: 0x01) */ /* ======================================================== MSTPCRC ======================================================== */ - #define R_MSTP_MSTPCRC_MSTPC_Pos (0UL) /*!< MSTPC (Bit 0) */ - #define R_MSTP_MSTPCRC_MSTPC_Msk (0x1UL) /*!< MSTPC (Bitfield-Mask: 0x01) */ + #define R_MSTP_MSTPCRC_MSTPC_Pos (0UL) /*!< MSTPC (Bit 0) */ + #define R_MSTP_MSTPCRC_MSTPC_Msk (0x1UL) /*!< MSTPC (Bitfield-Mask: 0x01) */ /* ======================================================== MSTPCRD ======================================================== */ - #define R_MSTP_MSTPCRD_MSTPD_Pos (0UL) /*!< MSTPD (Bit 0) */ - #define R_MSTP_MSTPCRD_MSTPD_Msk (0x1UL) /*!< MSTPD (Bitfield-Mask: 0x01) */ + #define R_MSTP_MSTPCRD_MSTPD_Pos (0UL) /*!< MSTPD (Bit 0) */ + #define R_MSTP_MSTPCRD_MSTPD_Msk (0x1UL) /*!< MSTPD (Bitfield-Mask: 0x01) */ /* ======================================================== MSTPCRE ======================================================== */ - #define R_MSTP_MSTPCRE_MSTPE_Pos (0UL) /*!< MSTPE (Bit 0) */ - #define R_MSTP_MSTPCRE_MSTPE_Msk (0x1UL) /*!< MSTPE (Bitfield-Mask: 0x01) */ + #define R_MSTP_MSTPCRE_MSTPE_Pos (0UL) /*!< MSTPE (Bit 0) */ + #define R_MSTP_MSTPCRE_MSTPE_Msk (0x1UL) /*!< MSTPE (Bitfield-Mask: 0x01) */ +/* ======================================================= LSMRWDIS ======================================================== */ + #define R_MSTP_LSMRWDIS_RTCRWDIS_Pos (0UL) /*!< RTCRWDIS (Bit 0) */ + #define R_MSTP_LSMRWDIS_RTCRWDIS_Msk (0x1UL) /*!< RTCRWDIS (Bitfield-Mask: 0x01) */ + #define R_MSTP_LSMRWDIS_WDTDIS_Pos (1UL) /*!< WDTDIS (Bit 1) */ + #define R_MSTP_LSMRWDIS_WDTDIS_Msk (0x2UL) /*!< WDTDIS (Bitfield-Mask: 0x01) */ + #define R_MSTP_LSMRWDIS_IWDTIDS_Pos (2UL) /*!< IWDTIDS (Bit 2) */ + #define R_MSTP_LSMRWDIS_IWDTIDS_Msk (0x4UL) /*!< IWDTIDS (Bitfield-Mask: 0x01) */ + #define R_MSTP_LSMRWDIS_WREN_Pos (7UL) /*!< WREN (Bit 7) */ + #define R_MSTP_LSMRWDIS_WREN_Msk (0x80UL) /*!< WREN (Bitfield-Mask: 0x01) */ + #define R_MSTP_LSMRWDIS_PRKEY_Pos (8UL) /*!< PRKEY (Bit 8) */ + #define R_MSTP_LSMRWDIS_PRKEY_Msk (0xff00UL) /*!< PRKEY (Bitfield-Mask: 0xff) */ /* =========================================================================================================================== */ /* ================ R_PORT0 ================ */ @@ -14128,6 +14169,9 @@ typedef struct /*!< (@ 0x40084000) R_AGTX0 Structure #define R_PMISC_PWPRS_PFSWE_Msk (0x40UL) /*!< PFSWE (Bitfield-Mask: 0x01) */ #define R_PMISC_PWPRS_B0WI_Pos (7UL) /*!< B0WI (Bit 7) */ #define R_PMISC_PWPRS_B0WI_Msk (0x80UL) /*!< B0WI (Bitfield-Mask: 0x01) */ +/* ======================================================== PRWCNTR ======================================================== */ + #define R_PMISC_PRWCNTR_WAIT_Pos (0UL) /*!< WAIT (Bit 0) */ + #define R_PMISC_PRWCNTR_WAIT_Msk (0x3UL) /*!< WAIT (Bitfield-Mask: 0x03) */ /* =========================================================================================================================== */ /* ================ R_RTC ================ */ diff --git a/ra/fsp/src/bsp/cmsis/Device/RENESAS/Include/R7FA6T2BD.h b/ra/fsp/src/bsp/cmsis/Device/RENESAS/Include/R7FA6T2BD.h index 2105bbfb5..1e904b693 100644 --- a/ra/fsp/src/bsp/cmsis/Device/RENESAS/Include/R7FA6T2BD.h +++ b/ra/fsp/src/bsp/cmsis/Device/RENESAS/Include/R7FA6T2BD.h @@ -9119,67 +9119,85 @@ typedef struct /*!< (@ 0x40084000) R_MSTP Structure union { - __IOM uint32_t MSTPCRE; /*!< (@ 0x00000010) Module Stop Control Register E */ + union + { + __IOM uint32_t MSTPCRE; /*!< (@ 0x00000010) Module Stop Control Register E */ - struct + struct + { + __IOM uint32_t MSTPE0 : 1; /*!< [0..0] Module stop bit 0. See device hardware manual for usage. */ + __IOM uint32_t MSTPE1 : 1; /*!< [1..1] Module stop bit 1. See device hardware manual for usage. */ + __IOM uint32_t MSTPE2 : 1; /*!< [2..2] Module stop bit 2. See device hardware manual for usage. */ + __IOM uint32_t MSTPE3 : 1; /*!< [3..3] Module stop bit 3. See device hardware manual for usage. */ + __IOM uint32_t MSTPE4 : 1; /*!< [4..4] Module stop bit 4. See device hardware manual for usage. */ + __IOM uint32_t MSTPE5 : 1; /*!< [5..5] Module stop bit 5. See device hardware manual for usage. */ + __IOM uint32_t MSTPE6 : 1; /*!< [6..6] Module stop bit 6. See device hardware manual for usage. */ + __IOM uint32_t MSTPE7 : 1; /*!< [7..7] Module stop bit 7. See device hardware manual for usage. */ + __IOM uint32_t MSTPE8 : 1; /*!< [8..8] Module stop bit 8. See device hardware manual for usage. */ + __IOM uint32_t MSTPE9 : 1; /*!< [9..9] Module stop bit 9. See device hardware manual for usage. */ + __IOM uint32_t MSTPE10 : 1; /*!< [10..10] Module stop bit 10. See device hardware manual for + * usage. */ + __IOM uint32_t MSTPE11 : 1; /*!< [11..11] Module stop bit 11. See device hardware manual for + * usage. */ + __IOM uint32_t MSTPE12 : 1; /*!< [12..12] Module stop bit 12. See device hardware manual for + * usage. */ + __IOM uint32_t MSTPE13 : 1; /*!< [13..13] Module stop bit 13. See device hardware manual for + * usage. */ + __IOM uint32_t MSTPE14 : 1; /*!< [14..14] Module stop bit 14. See device hardware manual for + * usage. */ + __IOM uint32_t MSTPE15 : 1; /*!< [15..15] Module stop bit 15. See device hardware manual for + * usage. */ + __IOM uint32_t MSTPE16 : 1; /*!< [16..16] Module stop bit 16. See device hardware manual for + * usage. */ + __IOM uint32_t MSTPE17 : 1; /*!< [17..17] Module stop bit 17. See device hardware manual for + * usage. */ + __IOM uint32_t MSTPE18 : 1; /*!< [18..18] Module stop bit 18. See device hardware manual for + * usage. */ + __IOM uint32_t MSTPE19 : 1; /*!< [19..19] Module stop bit 19. See device hardware manual for + * usage. */ + __IOM uint32_t MSTPE20 : 1; /*!< [20..20] Module stop bit 20. See device hardware manual for + * usage. */ + __IOM uint32_t MSTPE21 : 1; /*!< [21..21] Module stop bit 21. See device hardware manual for + * usage. */ + __IOM uint32_t MSTPE22 : 1; /*!< [22..22] Module stop bit 22. See device hardware manual for + * usage. */ + __IOM uint32_t MSTPE23 : 1; /*!< [23..23] Module stop bit 23. See device hardware manual for + * usage. */ + __IOM uint32_t MSTPE24 : 1; /*!< [24..24] Module stop bit 24. See device hardware manual for + * usage. */ + __IOM uint32_t MSTPE25 : 1; /*!< [25..25] Module stop bit 25. See device hardware manual for + * usage. */ + __IOM uint32_t MSTPE26 : 1; /*!< [26..26] Module stop bit 26. See device hardware manual for + * usage. */ + __IOM uint32_t MSTPE27 : 1; /*!< [27..27] Module stop bit 27. See device hardware manual for + * usage. */ + __IOM uint32_t MSTPE28 : 1; /*!< [28..28] Module stop bit 28. See device hardware manual for + * usage. */ + __IOM uint32_t MSTPE29 : 1; /*!< [29..29] Module stop bit 29. See device hardware manual for + * usage. */ + __IOM uint32_t MSTPE30 : 1; /*!< [30..30] Module stop bit 30. See device hardware manual for + * usage. */ + __IOM uint32_t MSTPE31 : 1; /*!< [31..31] Module stop bit 31. See device hardware manual for + * usage. */ + } MSTPCRE_b; + }; + + union { - __IOM uint32_t MSTPE0 : 1; /*!< [0..0] Module stop bit 0. See device hardware manual for usage. */ - __IOM uint32_t MSTPE1 : 1; /*!< [1..1] Module stop bit 1. See device hardware manual for usage. */ - __IOM uint32_t MSTPE2 : 1; /*!< [2..2] Module stop bit 2. See device hardware manual for usage. */ - __IOM uint32_t MSTPE3 : 1; /*!< [3..3] Module stop bit 3. See device hardware manual for usage. */ - __IOM uint32_t MSTPE4 : 1; /*!< [4..4] Module stop bit 4. See device hardware manual for usage. */ - __IOM uint32_t MSTPE5 : 1; /*!< [5..5] Module stop bit 5. See device hardware manual for usage. */ - __IOM uint32_t MSTPE6 : 1; /*!< [6..6] Module stop bit 6. See device hardware manual for usage. */ - __IOM uint32_t MSTPE7 : 1; /*!< [7..7] Module stop bit 7. See device hardware manual for usage. */ - __IOM uint32_t MSTPE8 : 1; /*!< [8..8] Module stop bit 8. See device hardware manual for usage. */ - __IOM uint32_t MSTPE9 : 1; /*!< [9..9] Module stop bit 9. See device hardware manual for usage. */ - __IOM uint32_t MSTPE10 : 1; /*!< [10..10] Module stop bit 10. See device hardware manual for - * usage. */ - __IOM uint32_t MSTPE11 : 1; /*!< [11..11] Module stop bit 11. See device hardware manual for - * usage. */ - __IOM uint32_t MSTPE12 : 1; /*!< [12..12] Module stop bit 12. See device hardware manual for - * usage. */ - __IOM uint32_t MSTPE13 : 1; /*!< [13..13] Module stop bit 13. See device hardware manual for - * usage. */ - __IOM uint32_t MSTPE14 : 1; /*!< [14..14] Module stop bit 14. See device hardware manual for - * usage. */ - __IOM uint32_t MSTPE15 : 1; /*!< [15..15] Module stop bit 15. See device hardware manual for - * usage. */ - __IOM uint32_t MSTPE16 : 1; /*!< [16..16] Module stop bit 16. See device hardware manual for - * usage. */ - __IOM uint32_t MSTPE17 : 1; /*!< [17..17] Module stop bit 17. See device hardware manual for - * usage. */ - __IOM uint32_t MSTPE18 : 1; /*!< [18..18] Module stop bit 18. See device hardware manual for - * usage. */ - __IOM uint32_t MSTPE19 : 1; /*!< [19..19] Module stop bit 19. See device hardware manual for - * usage. */ - __IOM uint32_t MSTPE20 : 1; /*!< [20..20] Module stop bit 20. See device hardware manual for - * usage. */ - __IOM uint32_t MSTPE21 : 1; /*!< [21..21] Module stop bit 21. See device hardware manual for - * usage. */ - __IOM uint32_t MSTPE22 : 1; /*!< [22..22] Module stop bit 22. See device hardware manual for - * usage. */ - __IOM uint32_t MSTPE23 : 1; /*!< [23..23] Module stop bit 23. See device hardware manual for - * usage. */ - __IOM uint32_t MSTPE24 : 1; /*!< [24..24] Module stop bit 24. See device hardware manual for - * usage. */ - __IOM uint32_t MSTPE25 : 1; /*!< [25..25] Module stop bit 25. See device hardware manual for - * usage. */ - __IOM uint32_t MSTPE26 : 1; /*!< [26..26] Module stop bit 26. See device hardware manual for - * usage. */ - __IOM uint32_t MSTPE27 : 1; /*!< [27..27] Module stop bit 27. See device hardware manual for - * usage. */ - __IOM uint32_t MSTPE28 : 1; /*!< [28..28] Module stop bit 28. See device hardware manual for - * usage. */ - __IOM uint32_t MSTPE29 : 1; /*!< [29..29] Module stop bit 29. See device hardware manual for - * usage. */ - __IOM uint32_t MSTPE30 : 1; /*!< [30..30] Module stop bit 30. See device hardware manual for - * usage. */ - __IOM uint32_t MSTPE31 : 1; /*!< [31..31] Module stop bit 31. See device hardware manual for - * usage. */ - } MSTPCRE_b; + __IOM uint16_t LSMRWDIS; /*!< (@ 0x00000010) Low Speed Module R/W Disable Control Register */ + + struct + { + __IOM uint16_t RTCRWDIS : 1; /*!< [0..0] RTC Register R/W Enable Control */ + __IOM uint16_t WDTDIS : 1; /*!< [1..1] WDT Operate Clock Control */ + __IOM uint16_t IWDTIDS : 1; /*!< [2..2] IWDT Register Clock Control */ + uint16_t : 4; + __IOM uint16_t WREN : 1; /*!< [7..7] Write Enable for bits [2:0] */ + __OM uint16_t PRKEY : 8; /*!< [15..8] LSMRWDIS Key Code */ + } LSMRWDIS_b; + }; }; -} R_MSTP_Type; /*!< Size = 20 (0x14) */ +} R_MSTP_Type; /*!< Size = 20 (0x14) */ /* =========================================================================================================================== */ /* ================ R_PORT0 ================ */ @@ -18114,11 +18132,11 @@ typedef struct /*!< (@ 0x40109000) R_DOC_B Structure struct { - __IOM uint8_t OMS : 2; /*!< [1..0] Operating Mode Select */ - uint8_t : 1; - __IOM uint8_t DOBW : 1; /*!< [3..3] Data Operation Bit Width Select */ - __IOM uint8_t DCSEL : 3; /*!< [6..4] Detection Condition Select */ - __IOM uint8_t DOPCIE : 1; /*!< [7..7] Data Operation Circuit Interrupt Enable */ + __IOM uint8_t OMS : 2; /*!< [1..0] Operating Mode Select */ + uint8_t : 1; + __IOM uint8_t DOBW : 1; /*!< [3..3] Data Operation Bit Width Select */ + __IOM uint8_t DCSEL : 3; /*!< [6..4] Detection Condition Select */ + uint8_t : 1; } DOCR_b; }; __IM uint8_t RESERVED; @@ -18333,15 +18351,17 @@ typedef struct /*!< (@ 0x40118000) R_SCI_B0 Structure struct { - __IOM uint32_t CMPD : 9; /*!< [8..0] Compare Match Data */ - uint32_t : 7; - __IOM uint32_t ASEN : 1; /*!< [16..16] Adjust receive sampling timing enable */ - __IOM uint32_t ATEN : 1; /*!< [17..17] Adjust transmit timing enable */ - uint32_t : 6; - __IOM uint32_t AST : 3; /*!< [26..24] Adjustment value for receive Sampling Timing */ - __IOM uint32_t AJD : 1; /*!< [27..27] Adjustment Direction for receive sampling timing */ - __IOM uint32_t ATT : 3; /*!< [30..28] Adjustment value for Transmit timing */ - __IOM uint32_t AET : 1; /*!< [31..31] Adjustment edge for transmit timing */ + __IOM uint32_t CMPD : 9; /*!< [8..0] Compare Match Data */ + uint32_t : 7; + __IOM uint32_t ASEN : 1; /*!< [16..16] Adjust receive sampling timing enable */ + __IOM uint32_t ATEN : 1; /*!< [17..17] Adjust transmit timing enable */ + uint32_t : 1; + __IOM uint32_t SCKSEL : 1; /*!< [19..19] Master receive clock selection bit. */ + uint32_t : 4; + __IOM uint32_t AST : 3; /*!< [26..24] Adjustment value for receive Sampling Timing */ + __IOM uint32_t AJD : 1; /*!< [27..27] Adjustment Direction for receive sampling timing */ + __IOM uint32_t ATT : 3; /*!< [30..28] Adjustment value for Transmit timing */ + __IOM uint32_t AET : 1; /*!< [31..31] Adjustment edge for transmit timing */ } CCR4_b; }; @@ -19474,16 +19494,16 @@ typedef struct /*!< (@ 0x407FC000) R_FLAD Structure #define R_SPI_B0 ((R_SPI_B0_Type *) R_SPI_B0_BASE) #define R_SPI_B1 ((R_SPI_B0_Type *) R_SPI_B1_BASE) #define R_TFU ((R_TFU_Type *) R_TFU_BASE) - #define R_AGTX0 ((R_AGTX0_Type *) R_AGTX0_BASE) - #define R_AGTX1 ((R_AGTX0_Type *) R_AGTX1_BASE) - #define R_AGTX2 ((R_AGTX0_Type *) R_AGTX2_BASE) - #define R_AGTX3 ((R_AGTX0_Type *) R_AGTX3_BASE) - #define R_AGTX4 ((R_AGTX0_Type *) R_AGTX4_BASE) - #define R_AGTX5 ((R_AGTX0_Type *) R_AGTX5_BASE) - #define R_AGTX6 ((R_AGTX0_Type *) R_AGTX6_BASE) - #define R_AGTX7 ((R_AGTX0_Type *) R_AGTX7_BASE) - #define R_AGTX8 ((R_AGTX0_Type *) R_AGTX8_BASE) - #define R_AGTX9 ((R_AGTX0_Type *) R_AGTX9_BASE) + #define R_AGTW0 ((R_AGTX0_Type *) R_AGTX0_BASE) + #define R_AGTW1 ((R_AGTX0_Type *) R_AGTX1_BASE) + #define R_AGTW2 ((R_AGTX0_Type *) R_AGTX2_BASE) + #define R_AGTW3 ((R_AGTX0_Type *) R_AGTX3_BASE) + #define R_AGTW4 ((R_AGTX0_Type *) R_AGTX4_BASE) + #define R_AGTW5 ((R_AGTX0_Type *) R_AGTX5_BASE) + #define R_AGTW6 ((R_AGTX0_Type *) R_AGTX6_BASE) + #define R_AGTW7 ((R_AGTX0_Type *) R_AGTX7_BASE) + #define R_AGTW8 ((R_AGTX0_Type *) R_AGTX8_BASE) + #define R_AGTW9 ((R_AGTX0_Type *) R_AGTX9_BASE) #define R_FLAD ((R_FLAD_Type *) R_FLAD_BASE) /** @} */ /* End of group Device_Peripheral_declaration */ @@ -23816,20 +23836,31 @@ typedef struct /*!< (@ 0x407FC000) R_FLAD Structure /* =========================================================================================================================== */ /* ======================================================== MSTPCRA ======================================================== */ - #define R_MSTP_MSTPCRA_MSTPA_Pos (0UL) /*!< MSTPA (Bit 0) */ - #define R_MSTP_MSTPCRA_MSTPA_Msk (0x1UL) /*!< MSTPA (Bitfield-Mask: 0x01) */ + #define R_MSTP_MSTPCRA_MSTPA_Pos (0UL) /*!< MSTPA (Bit 0) */ + #define R_MSTP_MSTPCRA_MSTPA_Msk (0x1UL) /*!< MSTPA (Bitfield-Mask: 0x01) */ /* ======================================================== MSTPCRB ======================================================== */ - #define R_MSTP_MSTPCRB_MSTPB_Pos (0UL) /*!< MSTPB (Bit 0) */ - #define R_MSTP_MSTPCRB_MSTPB_Msk (0x1UL) /*!< MSTPB (Bitfield-Mask: 0x01) */ + #define R_MSTP_MSTPCRB_MSTPB_Pos (0UL) /*!< MSTPB (Bit 0) */ + #define R_MSTP_MSTPCRB_MSTPB_Msk (0x1UL) /*!< MSTPB (Bitfield-Mask: 0x01) */ /* ======================================================== MSTPCRC ======================================================== */ - #define R_MSTP_MSTPCRC_MSTPC_Pos (0UL) /*!< MSTPC (Bit 0) */ - #define R_MSTP_MSTPCRC_MSTPC_Msk (0x1UL) /*!< MSTPC (Bitfield-Mask: 0x01) */ + #define R_MSTP_MSTPCRC_MSTPC_Pos (0UL) /*!< MSTPC (Bit 0) */ + #define R_MSTP_MSTPCRC_MSTPC_Msk (0x1UL) /*!< MSTPC (Bitfield-Mask: 0x01) */ /* ======================================================== MSTPCRD ======================================================== */ - #define R_MSTP_MSTPCRD_MSTPD_Pos (0UL) /*!< MSTPD (Bit 0) */ - #define R_MSTP_MSTPCRD_MSTPD_Msk (0x1UL) /*!< MSTPD (Bitfield-Mask: 0x01) */ + #define R_MSTP_MSTPCRD_MSTPD_Pos (0UL) /*!< MSTPD (Bit 0) */ + #define R_MSTP_MSTPCRD_MSTPD_Msk (0x1UL) /*!< MSTPD (Bitfield-Mask: 0x01) */ /* ======================================================== MSTPCRE ======================================================== */ - #define R_MSTP_MSTPCRE_MSTPE_Pos (0UL) /*!< MSTPE (Bit 0) */ - #define R_MSTP_MSTPCRE_MSTPE_Msk (0x1UL) /*!< MSTPE (Bitfield-Mask: 0x01) */ + #define R_MSTP_MSTPCRE_MSTPE_Pos (0UL) /*!< MSTPE (Bit 0) */ + #define R_MSTP_MSTPCRE_MSTPE_Msk (0x1UL) /*!< MSTPE (Bitfield-Mask: 0x01) */ +/* ======================================================= LSMRWDIS ======================================================== */ + #define R_MSTP_LSMRWDIS_RTCRWDIS_Pos (0UL) /*!< RTCRWDIS (Bit 0) */ + #define R_MSTP_LSMRWDIS_RTCRWDIS_Msk (0x1UL) /*!< RTCRWDIS (Bitfield-Mask: 0x01) */ + #define R_MSTP_LSMRWDIS_WDTDIS_Pos (1UL) /*!< WDTDIS (Bit 1) */ + #define R_MSTP_LSMRWDIS_WDTDIS_Msk (0x2UL) /*!< WDTDIS (Bitfield-Mask: 0x01) */ + #define R_MSTP_LSMRWDIS_IWDTIDS_Pos (2UL) /*!< IWDTIDS (Bit 2) */ + #define R_MSTP_LSMRWDIS_IWDTIDS_Msk (0x4UL) /*!< IWDTIDS (Bitfield-Mask: 0x01) */ + #define R_MSTP_LSMRWDIS_WREN_Pos (7UL) /*!< WREN (Bit 7) */ + #define R_MSTP_LSMRWDIS_WREN_Msk (0x80UL) /*!< WREN (Bitfield-Mask: 0x01) */ + #define R_MSTP_LSMRWDIS_PRKEY_Pos (8UL) /*!< PRKEY (Bit 8) */ + #define R_MSTP_LSMRWDIS_PRKEY_Msk (0xff00UL) /*!< PRKEY (Bitfield-Mask: 0xff) */ /* =========================================================================================================================== */ /* ================ R_PORT0 ================ */ @@ -27764,8 +27795,6 @@ typedef struct /*!< (@ 0x407FC000) R_FLAD Structure #define R_DOC_B_DOCR_DOBW_Msk (0x8UL) /*!< DOBW (Bitfield-Mask: 0x01) */ #define R_DOC_B_DOCR_DCSEL_Pos (4UL) /*!< DCSEL (Bit 4) */ #define R_DOC_B_DOCR_DCSEL_Msk (0x70UL) /*!< DCSEL (Bitfield-Mask: 0x07) */ - #define R_DOC_B_DOCR_DOPCIE_Pos (7UL) /*!< DOPCIE (Bit 7) */ - #define R_DOC_B_DOCR_DOPCIE_Msk (0x80UL) /*!< DOPCIE (Bitfield-Mask: 0x01) */ /* ========================================================= DOSR ========================================================== */ #define R_DOC_B_DOSR_DOPCF_Pos (0UL) /*!< DOPCF (Bit 0) */ #define R_DOC_B_DOSR_DOPCF_Msk (0x1UL) /*!< DOPCF (Bitfield-Mask: 0x01) */ @@ -27909,6 +27938,8 @@ typedef struct /*!< (@ 0x407FC000) R_FLAD Structure #define R_SCI_B0_CCR4_ASEN_Msk (0x10000UL) /*!< ASEN (Bitfield-Mask: 0x01) */ #define R_SCI_B0_CCR4_ATEN_Pos (17UL) /*!< ATEN (Bit 17) */ #define R_SCI_B0_CCR4_ATEN_Msk (0x20000UL) /*!< ATEN (Bitfield-Mask: 0x01) */ + #define R_SCI_B0_CCR4_SCKSEL_Pos (19UL) /*!< SCKSEL (Bit 19) */ + #define R_SCI_B0_CCR4_SCKSEL_Msk (0x80000UL) /*!< SCKSEL (Bitfield-Mask: 0x01) */ #define R_SCI_B0_CCR4_AST_Pos (24UL) /*!< AST (Bit 24) */ #define R_SCI_B0_CCR4_AST_Msk (0x7000000UL) /*!< AST (Bitfield-Mask: 0x07) */ #define R_SCI_B0_CCR4_AJD_Pos (27UL) /*!< AJD (Bit 27) */ diff --git a/ra/fsp/src/bsp/cmsis/Device/RENESAS/Include/R7FA6T3BB.h b/ra/fsp/src/bsp/cmsis/Device/RENESAS/Include/R7FA6T3BB.h index 7f083b35a..80b68273a 100644 --- a/ra/fsp/src/bsp/cmsis/Device/RENESAS/Include/R7FA6T3BB.h +++ b/ra/fsp/src/bsp/cmsis/Device/RENESAS/Include/R7FA6T3BB.h @@ -8877,67 +8877,85 @@ typedef struct /*!< (@ 0x40084000) R_MSTP Structure union { - __IOM uint32_t MSTPCRE; /*!< (@ 0x00000010) Module Stop Control Register E */ + union + { + __IOM uint32_t MSTPCRE; /*!< (@ 0x00000010) Module Stop Control Register E */ - struct + struct + { + __IOM uint32_t MSTPE0 : 1; /*!< [0..0] Module stop bit 0. See device hardware manual for usage. */ + __IOM uint32_t MSTPE1 : 1; /*!< [1..1] Module stop bit 1. See device hardware manual for usage. */ + __IOM uint32_t MSTPE2 : 1; /*!< [2..2] Module stop bit 2. See device hardware manual for usage. */ + __IOM uint32_t MSTPE3 : 1; /*!< [3..3] Module stop bit 3. See device hardware manual for usage. */ + __IOM uint32_t MSTPE4 : 1; /*!< [4..4] Module stop bit 4. See device hardware manual for usage. */ + __IOM uint32_t MSTPE5 : 1; /*!< [5..5] Module stop bit 5. See device hardware manual for usage. */ + __IOM uint32_t MSTPE6 : 1; /*!< [6..6] Module stop bit 6. See device hardware manual for usage. */ + __IOM uint32_t MSTPE7 : 1; /*!< [7..7] Module stop bit 7. See device hardware manual for usage. */ + __IOM uint32_t MSTPE8 : 1; /*!< [8..8] Module stop bit 8. See device hardware manual for usage. */ + __IOM uint32_t MSTPE9 : 1; /*!< [9..9] Module stop bit 9. See device hardware manual for usage. */ + __IOM uint32_t MSTPE10 : 1; /*!< [10..10] Module stop bit 10. See device hardware manual for + * usage. */ + __IOM uint32_t MSTPE11 : 1; /*!< [11..11] Module stop bit 11. See device hardware manual for + * usage. */ + __IOM uint32_t MSTPE12 : 1; /*!< [12..12] Module stop bit 12. See device hardware manual for + * usage. */ + __IOM uint32_t MSTPE13 : 1; /*!< [13..13] Module stop bit 13. See device hardware manual for + * usage. */ + __IOM uint32_t MSTPE14 : 1; /*!< [14..14] Module stop bit 14. See device hardware manual for + * usage. */ + __IOM uint32_t MSTPE15 : 1; /*!< [15..15] Module stop bit 15. See device hardware manual for + * usage. */ + __IOM uint32_t MSTPE16 : 1; /*!< [16..16] Module stop bit 16. See device hardware manual for + * usage. */ + __IOM uint32_t MSTPE17 : 1; /*!< [17..17] Module stop bit 17. See device hardware manual for + * usage. */ + __IOM uint32_t MSTPE18 : 1; /*!< [18..18] Module stop bit 18. See device hardware manual for + * usage. */ + __IOM uint32_t MSTPE19 : 1; /*!< [19..19] Module stop bit 19. See device hardware manual for + * usage. */ + __IOM uint32_t MSTPE20 : 1; /*!< [20..20] Module stop bit 20. See device hardware manual for + * usage. */ + __IOM uint32_t MSTPE21 : 1; /*!< [21..21] Module stop bit 21. See device hardware manual for + * usage. */ + __IOM uint32_t MSTPE22 : 1; /*!< [22..22] Module stop bit 22. See device hardware manual for + * usage. */ + __IOM uint32_t MSTPE23 : 1; /*!< [23..23] Module stop bit 23. See device hardware manual for + * usage. */ + __IOM uint32_t MSTPE24 : 1; /*!< [24..24] Module stop bit 24. See device hardware manual for + * usage. */ + __IOM uint32_t MSTPE25 : 1; /*!< [25..25] Module stop bit 25. See device hardware manual for + * usage. */ + __IOM uint32_t MSTPE26 : 1; /*!< [26..26] Module stop bit 26. See device hardware manual for + * usage. */ + __IOM uint32_t MSTPE27 : 1; /*!< [27..27] Module stop bit 27. See device hardware manual for + * usage. */ + __IOM uint32_t MSTPE28 : 1; /*!< [28..28] Module stop bit 28. See device hardware manual for + * usage. */ + __IOM uint32_t MSTPE29 : 1; /*!< [29..29] Module stop bit 29. See device hardware manual for + * usage. */ + __IOM uint32_t MSTPE30 : 1; /*!< [30..30] Module stop bit 30. See device hardware manual for + * usage. */ + __IOM uint32_t MSTPE31 : 1; /*!< [31..31] Module stop bit 31. See device hardware manual for + * usage. */ + } MSTPCRE_b; + }; + + union { - __IOM uint32_t MSTPE0 : 1; /*!< [0..0] Module stop bit 0. See device hardware manual for usage. */ - __IOM uint32_t MSTPE1 : 1; /*!< [1..1] Module stop bit 1. See device hardware manual for usage. */ - __IOM uint32_t MSTPE2 : 1; /*!< [2..2] Module stop bit 2. See device hardware manual for usage. */ - __IOM uint32_t MSTPE3 : 1; /*!< [3..3] Module stop bit 3. See device hardware manual for usage. */ - __IOM uint32_t MSTPE4 : 1; /*!< [4..4] Module stop bit 4. See device hardware manual for usage. */ - __IOM uint32_t MSTPE5 : 1; /*!< [5..5] Module stop bit 5. See device hardware manual for usage. */ - __IOM uint32_t MSTPE6 : 1; /*!< [6..6] Module stop bit 6. See device hardware manual for usage. */ - __IOM uint32_t MSTPE7 : 1; /*!< [7..7] Module stop bit 7. See device hardware manual for usage. */ - __IOM uint32_t MSTPE8 : 1; /*!< [8..8] Module stop bit 8. See device hardware manual for usage. */ - __IOM uint32_t MSTPE9 : 1; /*!< [9..9] Module stop bit 9. See device hardware manual for usage. */ - __IOM uint32_t MSTPE10 : 1; /*!< [10..10] Module stop bit 10. See device hardware manual for - * usage. */ - __IOM uint32_t MSTPE11 : 1; /*!< [11..11] Module stop bit 11. See device hardware manual for - * usage. */ - __IOM uint32_t MSTPE12 : 1; /*!< [12..12] Module stop bit 12. See device hardware manual for - * usage. */ - __IOM uint32_t MSTPE13 : 1; /*!< [13..13] Module stop bit 13. See device hardware manual for - * usage. */ - __IOM uint32_t MSTPE14 : 1; /*!< [14..14] Module stop bit 14. See device hardware manual for - * usage. */ - __IOM uint32_t MSTPE15 : 1; /*!< [15..15] Module stop bit 15. See device hardware manual for - * usage. */ - __IOM uint32_t MSTPE16 : 1; /*!< [16..16] Module stop bit 16. See device hardware manual for - * usage. */ - __IOM uint32_t MSTPE17 : 1; /*!< [17..17] Module stop bit 17. See device hardware manual for - * usage. */ - __IOM uint32_t MSTPE18 : 1; /*!< [18..18] Module stop bit 18. See device hardware manual for - * usage. */ - __IOM uint32_t MSTPE19 : 1; /*!< [19..19] Module stop bit 19. See device hardware manual for - * usage. */ - __IOM uint32_t MSTPE20 : 1; /*!< [20..20] Module stop bit 20. See device hardware manual for - * usage. */ - __IOM uint32_t MSTPE21 : 1; /*!< [21..21] Module stop bit 21. See device hardware manual for - * usage. */ - __IOM uint32_t MSTPE22 : 1; /*!< [22..22] Module stop bit 22. See device hardware manual for - * usage. */ - __IOM uint32_t MSTPE23 : 1; /*!< [23..23] Module stop bit 23. See device hardware manual for - * usage. */ - __IOM uint32_t MSTPE24 : 1; /*!< [24..24] Module stop bit 24. See device hardware manual for - * usage. */ - __IOM uint32_t MSTPE25 : 1; /*!< [25..25] Module stop bit 25. See device hardware manual for - * usage. */ - __IOM uint32_t MSTPE26 : 1; /*!< [26..26] Module stop bit 26. See device hardware manual for - * usage. */ - __IOM uint32_t MSTPE27 : 1; /*!< [27..27] Module stop bit 27. See device hardware manual for - * usage. */ - __IOM uint32_t MSTPE28 : 1; /*!< [28..28] Module stop bit 28. See device hardware manual for - * usage. */ - __IOM uint32_t MSTPE29 : 1; /*!< [29..29] Module stop bit 29. See device hardware manual for - * usage. */ - __IOM uint32_t MSTPE30 : 1; /*!< [30..30] Module stop bit 30. See device hardware manual for - * usage. */ - __IOM uint32_t MSTPE31 : 1; /*!< [31..31] Module stop bit 31. See device hardware manual for - * usage. */ - } MSTPCRE_b; + __IOM uint16_t LSMRWDIS; /*!< (@ 0x00000010) Low Speed Module R/W Disable Control Register */ + + struct + { + __IOM uint16_t RTCRWDIS : 1; /*!< [0..0] RTC Register R/W Enable Control */ + __IOM uint16_t WDTDIS : 1; /*!< [1..1] WDT Operate Clock Control */ + __IOM uint16_t IWDTIDS : 1; /*!< [2..2] IWDT Register Clock Control */ + uint16_t : 4; + __IOM uint16_t WREN : 1; /*!< [7..7] Write Enable for bits [2:0] */ + __OM uint16_t PRKEY : 8; /*!< [15..8] LSMRWDIS Key Code */ + } LSMRWDIS_b; + }; }; -} R_MSTP_Type; /*!< Size = 20 (0x14) */ +} R_MSTP_Type; /*!< Size = 20 (0x14) */ /* =========================================================================================================================== */ /* ================ R_PORT0 ================ */ @@ -9279,11 +9297,23 @@ typedef struct /*!< (@ 0x40080D00) R_PMISC Structure struct { uint8_t : 6; - __IOM uint8_t PFSWE : 1; /*!< [6..6] PmnPFS Register Write */ - __IOM uint8_t B0WI : 1; /*!< [7..7] PFSWE Bit Write Disable */ + __IOM uint8_t PFSWE : 1; /*!< [6..6] PmnPFS Register Write */ + __IOM uint8_t B0WI : 1; /*!< [7..7] PFSWE Bit Write Disable */ } PWPRS_b; }; - __IM uint16_t RESERVED2[5]; + __IM uint16_t RESERVED2[4]; + __IM uint8_t RESERVED3; + + union + { + __IOM uint8_t PRWCNTR; /*!< (@ 0x0000000F) Port Read Wait Control Register */ + + struct + { + __IOM uint8_t WAIT : 2; /*!< [1..0] Wait Cycle Control */ + uint8_t : 6; + } PRWCNTR_b; + }; __IOM R_PMISC_PMSAR_Type PMSAR[12]; /*!< (@ 0x00000010) Port Security Attribution Register */ } R_PMISC_Type; /*!< Size = 40 (0x28) */ @@ -14714,16 +14744,16 @@ typedef struct /*!< (@ 0x407FC000) R_FLAD Structure #define R_CACHE ((R_CACHE_Type *) R_CACHE_BASE) #define R_CPSCU ((R_CPSCU_Type *) R_CPSCU_BASE) #define R_TFU ((R_TFU_Type *) R_TFU_BASE) - #define R_AGTX0 ((R_AGTX0_Type *) R_AGTX0_BASE) - #define R_AGTX1 ((R_AGTX0_Type *) R_AGTX1_BASE) - #define R_AGTX2 ((R_AGTX0_Type *) R_AGTX2_BASE) - #define R_AGTX3 ((R_AGTX0_Type *) R_AGTX3_BASE) - #define R_AGTX4 ((R_AGTX0_Type *) R_AGTX4_BASE) - #define R_AGTX5 ((R_AGTX0_Type *) R_AGTX5_BASE) - #define R_AGTX6 ((R_AGTX0_Type *) R_AGTX6_BASE) - #define R_AGTX7 ((R_AGTX0_Type *) R_AGTX7_BASE) - #define R_AGTX8 ((R_AGTX0_Type *) R_AGTX8_BASE) - #define R_AGTX9 ((R_AGTX0_Type *) R_AGTX9_BASE) + #define R_AGTW0 ((R_AGTX0_Type *) R_AGTX0_BASE) + #define R_AGTW1 ((R_AGTX0_Type *) R_AGTX1_BASE) + #define R_AGTW2 ((R_AGTX0_Type *) R_AGTX2_BASE) + #define R_AGTW3 ((R_AGTX0_Type *) R_AGTX3_BASE) + #define R_AGTW4 ((R_AGTX0_Type *) R_AGTX4_BASE) + #define R_AGTW5 ((R_AGTX0_Type *) R_AGTX5_BASE) + #define R_AGTW6 ((R_AGTX0_Type *) R_AGTX6_BASE) + #define R_AGTW7 ((R_AGTX0_Type *) R_AGTX7_BASE) + #define R_AGTW8 ((R_AGTX0_Type *) R_AGTX8_BASE) + #define R_AGTW9 ((R_AGTX0_Type *) R_AGTX9_BASE) #define R_FLAD ((R_FLAD_Type *) R_FLAD_BASE) /** @} */ /* End of group Device_Peripheral_declaration */ @@ -18927,20 +18957,31 @@ typedef struct /*!< (@ 0x407FC000) R_FLAD Structure /* =========================================================================================================================== */ /* ======================================================== MSTPCRA ======================================================== */ - #define R_MSTP_MSTPCRA_MSTPA_Pos (0UL) /*!< MSTPA (Bit 0) */ - #define R_MSTP_MSTPCRA_MSTPA_Msk (0x1UL) /*!< MSTPA (Bitfield-Mask: 0x01) */ + #define R_MSTP_MSTPCRA_MSTPA_Pos (0UL) /*!< MSTPA (Bit 0) */ + #define R_MSTP_MSTPCRA_MSTPA_Msk (0x1UL) /*!< MSTPA (Bitfield-Mask: 0x01) */ /* ======================================================== MSTPCRB ======================================================== */ - #define R_MSTP_MSTPCRB_MSTPB_Pos (0UL) /*!< MSTPB (Bit 0) */ - #define R_MSTP_MSTPCRB_MSTPB_Msk (0x1UL) /*!< MSTPB (Bitfield-Mask: 0x01) */ + #define R_MSTP_MSTPCRB_MSTPB_Pos (0UL) /*!< MSTPB (Bit 0) */ + #define R_MSTP_MSTPCRB_MSTPB_Msk (0x1UL) /*!< MSTPB (Bitfield-Mask: 0x01) */ /* ======================================================== MSTPCRC ======================================================== */ - #define R_MSTP_MSTPCRC_MSTPC_Pos (0UL) /*!< MSTPC (Bit 0) */ - #define R_MSTP_MSTPCRC_MSTPC_Msk (0x1UL) /*!< MSTPC (Bitfield-Mask: 0x01) */ + #define R_MSTP_MSTPCRC_MSTPC_Pos (0UL) /*!< MSTPC (Bit 0) */ + #define R_MSTP_MSTPCRC_MSTPC_Msk (0x1UL) /*!< MSTPC (Bitfield-Mask: 0x01) */ /* ======================================================== MSTPCRD ======================================================== */ - #define R_MSTP_MSTPCRD_MSTPD_Pos (0UL) /*!< MSTPD (Bit 0) */ - #define R_MSTP_MSTPCRD_MSTPD_Msk (0x1UL) /*!< MSTPD (Bitfield-Mask: 0x01) */ + #define R_MSTP_MSTPCRD_MSTPD_Pos (0UL) /*!< MSTPD (Bit 0) */ + #define R_MSTP_MSTPCRD_MSTPD_Msk (0x1UL) /*!< MSTPD (Bitfield-Mask: 0x01) */ /* ======================================================== MSTPCRE ======================================================== */ - #define R_MSTP_MSTPCRE_MSTPE_Pos (0UL) /*!< MSTPE (Bit 0) */ - #define R_MSTP_MSTPCRE_MSTPE_Msk (0x1UL) /*!< MSTPE (Bitfield-Mask: 0x01) */ + #define R_MSTP_MSTPCRE_MSTPE_Pos (0UL) /*!< MSTPE (Bit 0) */ + #define R_MSTP_MSTPCRE_MSTPE_Msk (0x1UL) /*!< MSTPE (Bitfield-Mask: 0x01) */ +/* ======================================================= LSMRWDIS ======================================================== */ + #define R_MSTP_LSMRWDIS_RTCRWDIS_Pos (0UL) /*!< RTCRWDIS (Bit 0) */ + #define R_MSTP_LSMRWDIS_RTCRWDIS_Msk (0x1UL) /*!< RTCRWDIS (Bitfield-Mask: 0x01) */ + #define R_MSTP_LSMRWDIS_WDTDIS_Pos (1UL) /*!< WDTDIS (Bit 1) */ + #define R_MSTP_LSMRWDIS_WDTDIS_Msk (0x2UL) /*!< WDTDIS (Bitfield-Mask: 0x01) */ + #define R_MSTP_LSMRWDIS_IWDTIDS_Pos (2UL) /*!< IWDTIDS (Bit 2) */ + #define R_MSTP_LSMRWDIS_IWDTIDS_Msk (0x4UL) /*!< IWDTIDS (Bitfield-Mask: 0x01) */ + #define R_MSTP_LSMRWDIS_WREN_Pos (7UL) /*!< WREN (Bit 7) */ + #define R_MSTP_LSMRWDIS_WREN_Msk (0x80UL) /*!< WREN (Bitfield-Mask: 0x01) */ + #define R_MSTP_LSMRWDIS_PRKEY_Pos (8UL) /*!< PRKEY (Bit 8) */ + #define R_MSTP_LSMRWDIS_PRKEY_Msk (0xff00UL) /*!< PRKEY (Bitfield-Mask: 0xff) */ /* =========================================================================================================================== */ /* ================ R_PORT0 ================ */ @@ -19014,6 +19055,9 @@ typedef struct /*!< (@ 0x407FC000) R_FLAD Structure #define R_PMISC_PWPRS_PFSWE_Msk (0x40UL) /*!< PFSWE (Bitfield-Mask: 0x01) */ #define R_PMISC_PWPRS_B0WI_Pos (7UL) /*!< B0WI (Bit 7) */ #define R_PMISC_PWPRS_B0WI_Msk (0x80UL) /*!< B0WI (Bitfield-Mask: 0x01) */ +/* ======================================================== PRWCNTR ======================================================== */ + #define R_PMISC_PRWCNTR_WAIT_Pos (0UL) /*!< WAIT (Bit 0) */ + #define R_PMISC_PRWCNTR_WAIT_Msk (0x3UL) /*!< WAIT (Bitfield-Mask: 0x03) */ /* =========================================================================================================================== */ /* ================ R_RTC ================ */ diff --git a/ra/fsp/src/bsp/cmsis/Device/RENESAS/Source/system.c b/ra/fsp/src/bsp/cmsis/Device/RENESAS/Source/system.c index 13d37745c..b8081ff9f 100644 --- a/ra/fsp/src/bsp/cmsis/Device/RENESAS/Source/system.c +++ b/ra/fsp/src/bsp/cmsis/Device/RENESAS/Source/system.c @@ -69,10 +69,17 @@ extern uint32_t Image$$DATA$$Base; extern uint32_t Image$$DATA$$Length; extern uint32_t Image$$STACK$$ZI$$Base; extern uint32_t Image$$STACK$$ZI$$Length; - #if BSP_FEATURE_BSP_HAS_DTCM == 1 -extern uint32_t Load$$DTCM_DATA_INIT$$Base; -extern uint32_t Image$$DTCM_DATA_INIT$$Base; -extern uint32_t Image$$DTCM_DATA_INIT$$Length; + #if BSP_FEATURE_BSP_HAS_ITCM +extern uint32_t Load$$ITCM_DATA$$Base; +extern uint32_t Load$$ITCM_PAD$$Limit; +extern uint32_t Image$$ITCM_DATA$$Base; + #endif + #if BSP_FEATURE_BSP_HAS_DTCM +extern uint32_t Load$$DTCM_DATA$$Base; +extern uint32_t Load$$DTCM_PAD$$Limit; +extern uint32_t Image$$DTCM_DATA$$Base; +extern uint32_t Image$$DTCM_BSS$$Base; +extern uint32_t Image$$DTCM_BSS_PAD$$ZI$$Limit; #endif #elif defined(__GNUC__) @@ -84,19 +91,34 @@ extern uint32_t __bss_start__; extern uint32_t __bss_end__; extern uint32_t __StackLimit; extern uint32_t __StackTop; - #if BSP_FEATURE_BSP_HAS_DTCM == 1 + #if BSP_FEATURE_BSP_HAS_ITCM +extern uint32_t __itcm_data_init_start; +extern uint32_t __itcm_data_init_end; +extern uint32_t __itcm_data_start; + #endif + #if BSP_FEATURE_BSP_HAS_DTCM extern uint32_t __dtcm_data_init_start; -extern uint32_t __dtcm_data_start__; -extern uint32_t __dtcm_data_end__; +extern uint32_t __dtcm_data_init_end; +extern uint32_t __dtcm_data_start; +extern uint32_t __dtcm_bss_start; +extern uint32_t __dtcm_bss_end; #endif #elif defined(__ICCARM__) #pragma section=".bss" #pragma section=".data" #pragma section=".data_init" #pragma section=".stack" - #if BSP_FEATURE_BSP_HAS_DTCM == 1 - #pragma section=".dtcm_data" - #pragma section=".dtcm_data_init" + #if BSP_FEATURE_BSP_HAS_ITCM +extern uint32_t ITCM_DATA_INIT$$Base; +extern uint32_t ITCM_DATA_INIT$$Limit; +extern uint32_t ITCM_DATA$$Base; + #endif + #if BSP_FEATURE_BSP_HAS_DTCM +extern uint32_t DTCM_DATA_INIT$$Base; +extern uint32_t DTCM_DATA_INIT$$Limit; +extern uint32_t DTCM_DATA$$Base; +extern uint32_t DTCM_BSS$$Base; +extern uint32_t DTCM_BSS$$Limit; #endif #endif @@ -146,6 +168,28 @@ static void bsp_init_uninitialized_vars(void); #endif +#if BSP_CFG_C_RUNTIME_INIT + #if BSP_FEATURE_BSP_HAS_ITCM || BSP_FEATURE_BSP_HAS_DTCM +static void memcpy_64(uint64_t * destination, const uint64_t * source, size_t count); + + #endif + #if BSP_FEATURE_BSP_HAS_DTCM +static void memset_64(uint64_t * destination, const uint64_t value, size_t count); + + #endif +#endif + +#if BSP_CFG_C_RUNTIME_INIT + #if BSP_FEATURE_BSP_HAS_ITCM +static void bsp_init_itcm(void); + + #endif + #if BSP_FEATURE_BSP_HAS_DTCM +static void bsp_init_dtcm(void); + + #endif +#endif + /*******************************************************************************************************************//** * Initialize the MCU and the runtime environment. **********************************************************************************************************************/ @@ -297,21 +341,10 @@ void SystemInit (void) /* Copy initialized RAM data from ROM to RAM. */ #if defined(__ARMCC_VERSION) memcpy((uint8_t *) &Image$$DATA$$Base, (uint8_t *) &Load$$DATA$$Base, (uint32_t) &Image$$DATA$$Length); - #if BSP_FEATURE_BSP_HAS_DTCM == 1 - memcpy((uint8_t *) &Image$$DTCM_DATA_INIT$$Base, - (uint8_t *) &Load$$DTCM_DATA_INIT$$Base, - (uint32_t) &Image$$DTCM_DATA_INIT$$Length); - #endif #elif defined(__GNUC__) memcpy(&__data_start__, &__etext, ((uint32_t) &__data_end__ - (uint32_t) &__data_start__)); - #if BSP_FEATURE_BSP_HAS_DTCM == 1 - memcpy(&__dtcm_data_start__, - &__dtcm_data_init_start, - ((uint32_t) &__dtcm_data_end__ - (uint32_t) &__dtcm_data_start__)); - #endif #elif defined(__ICCARM__) - memcpy((uint32_t *) __section_begin(".data"), - (uint32_t *) __section_begin(".data_init"), + memcpy((uint32_t *) __section_begin(".data"), (uint32_t *) __section_begin(".data_init"), (uint32_t) __section_size(".data")); /* Copy functions to be executed from RAM. */ @@ -324,14 +357,16 @@ void SystemInit (void) /* Copy main thread TLS to RAM. */ #pragma section="__DLIB_PERTHREAD_init" #pragma section="__DLIB_PERTHREAD" - memcpy((uint32_t *) __section_begin("__DLIB_PERTHREAD"), - (uint32_t *) __section_begin("__DLIB_PERTHREAD_init"), + memcpy((uint32_t *) __section_begin("__DLIB_PERTHREAD"), (uint32_t *) __section_begin("__DLIB_PERTHREAD_init"), (uint32_t) __section_size("__DLIB_PERTHREAD_init")); - #if BSP_FEATURE_BSP_HAS_DTCM == 1 - memcpy((uint32_t *) __section_begin(".dtcm_data"), - (uint32_t *) __section_begin(".dtcm_data_init"), - (uint32_t) __section_size(".dtcm_data")); - #endif + #endif + + /* Initialize TCM memory. */ + #if BSP_FEATURE_BSP_HAS_ITCM + bsp_init_itcm(); + #endif + #if BSP_FEATURE_BSP_HAS_DTCM + bsp_init_dtcm(); #endif /* Initialize static constructors */ @@ -343,12 +378,14 @@ void SystemInit (void) (void (*)(void))((uint32_t) &Image$$INIT_ARRAY$$Base + (uint32_t) Image$$INIT_ARRAY$$Base[i]); p_init_func(); } + #elif defined(__GNUC__) int32_t count = __init_array_end - __init_array_start; for (int32_t i = 0; i < count; i++) { __init_array_start[i](); } + #elif defined(__ICCARM__) void const * pibase = __section_begin("SHT$$PREINIT_ARRAY"); void const * ilimit = __section_end("SHT$$INIT_ARRAY"); @@ -510,4 +547,150 @@ static void bsp_init_uninitialized_vars (void) #endif +#if BSP_CFG_C_RUNTIME_INIT + + #if (BSP_FEATURE_BSP_HAS_ITCM || BSP_FEATURE_BSP_HAS_DTCM) + +/*******************************************************************************************************************//** + * 64-bit memory copy for Armv8.1-M using low overhead loop instructions. + * + * @param[in] destination copy destination start address, word aligned + * @param[in] source copy source start address, word aligned + * @param[in] count number of doublewords to copy + **********************************************************************************************************************/ +static void memcpy_64 (uint64_t * destination, const uint64_t * source, size_t count) +{ + uint64_t temp; + __asm volatile ( + "wls lr, %[count], memcpy_64_loop_end_%=\n" + #if (defined(__ARMCC_VERSION) || defined(__GNUC__)) + + /* Align the branch target to a 64-bit boundary, a CM85 specific optimization. */ + /* IAR does not support alignment control within inline assembly. */ + ".balign 8\n" + #endif + "memcpy_64_loop_start_%=:\n" + "ldrd %Q[temp], %R[temp], [%[source]], #+8\n" + "strd %Q[temp], %R[temp], [%[destination]], #+8\n" + "le lr, memcpy_64_loop_start_%=\n" + "memcpy_64_loop_end_%=:" + :[destination] "+&r" (destination), [source] "+&r" (source), [temp] "=r" (temp) + :[count] "r" (count) + : "lr", "memory" + ); + + /* Suppress IAR warning: "Error[Pe550]: variable "temp" was set but never used" */ + /* "temp" triggers this warning when it lacks an early-clobber modifier, which was removed to allow register reuse with "count". */ + (void) temp; +} + + #endif + + #if BSP_FEATURE_BSP_HAS_DTCM + +/*******************************************************************************************************************//** + * 64-bit memory set for Armv8.1-M using low overhead loop instructions. + * + * @param[in] destination set destination start address, word aligned + * @param[in] value value to set + * @param[in] count number of doublewords to set + **********************************************************************************************************************/ +static void memset_64 (uint64_t * destination, const uint64_t value, size_t count) +{ + __asm volatile ( + "wls lr, %[count], memset_64_loop_end_%=\n" + #if (defined(__ARMCC_VERSION) || defined(__GNUC__)) + + /* Align the branch target to a 64-bit boundary, a CM85 specific optimization. */ + /* IAR does not support alignment control within inline assembly. */ + ".balign 8\n" + #endif + "memset_64_loop_start_%=:\n" + "strd %Q[value], %R[value], [%[destination]], #+8\n" + "le lr, memset_64_loop_start_%=\n" + "memset_64_loop_end_%=:" + :[destination] "+&r" (destination) + :[count] "r" (count), [value] "r" (value) + : "lr", "memory" + ); +} + + #endif + +#endif + +#if BSP_CFG_C_RUNTIME_INIT + + #if BSP_FEATURE_BSP_HAS_ITCM + +/*******************************************************************************************************************//** + * Initialize ITCM RAM from ROM image. + **********************************************************************************************************************/ +static void bsp_init_itcm (void) +{ + uint64_t * itcm_destination; + const uint64_t * itcm_source; + size_t count; + + #if defined(__ARMCC_VERSION) + itcm_destination = (uint64_t *) &Image$$ITCM_DATA$$Base; + itcm_source = (uint64_t *) &Load$$ITCM_DATA$$Base; + count = ((uint32_t) &Load$$ITCM_PAD$$Limit - (uint32_t) &Load$$ITCM_DATA$$Base) / sizeof(uint64_t); + #elif defined(__GNUC__) + itcm_destination = (uint64_t *) &__itcm_data_start; + itcm_source = (uint64_t *) &__itcm_data_init_start; + count = ((uint32_t) &__itcm_data_init_end - (uint32_t) &__itcm_data_init_start) / sizeof(uint64_t); + #elif defined(__ICCARM__) + itcm_destination = (uint64_t *) &ITCM_DATA$$Base; + itcm_source = (uint64_t *) &ITCM_DATA_INIT$$Base; + count = ((uint32_t) &ITCM_DATA_INIT$$Limit - (uint32_t) &ITCM_DATA_INIT$$Base) / sizeof(uint64_t); + #endif + + memcpy_64(itcm_destination, itcm_source, count); +} + + #endif + + #if BSP_FEATURE_BSP_HAS_DTCM + +/*******************************************************************************************************************//** + * Initialize DTCM RAM from ROM image and zero initialize DTCM RAM BSS section. + **********************************************************************************************************************/ +static void bsp_init_dtcm (void) +{ + uint64_t * dtcm_destination; + const uint64_t * dtcm_source; + size_t count; + uint64_t * dtcm_zero_destination; + size_t count_zero; + + #if defined(__ARMCC_VERSION) + dtcm_destination = (uint64_t *) &Image$$DTCM_DATA$$Base; + dtcm_source = (uint64_t *) &Load$$DTCM_DATA$$Base; + count = ((uint32_t) &Load$$DTCM_PAD$$Limit - (uint32_t) &Load$$DTCM_DATA$$Base) / sizeof(uint64_t); + dtcm_zero_destination = (uint64_t *) &Image$$DTCM_BSS$$Base; + count_zero = ((uint32_t) &Image$$DTCM_BSS_PAD$$ZI$$Limit - (uint32_t) &Image$$DTCM_BSS$$Base) / + sizeof(uint64_t); + #elif defined(__GNUC__) + dtcm_destination = (uint64_t *) &__dtcm_data_start; + dtcm_source = (uint64_t *) &__dtcm_data_init_start; + count = ((uint32_t) &__dtcm_data_init_end - (uint32_t) &__dtcm_data_init_start) / sizeof(uint64_t); + dtcm_zero_destination = (uint64_t *) &__dtcm_bss_start; + count_zero = ((uint32_t) &__dtcm_bss_end - (uint32_t) &__dtcm_bss_start) / sizeof(uint64_t); + #elif defined(__ICCARM__) + dtcm_destination = (uint64_t *) &DTCM_DATA$$Base; + dtcm_source = (uint64_t *) &DTCM_DATA_INIT$$Base; + count = ((uint32_t) &DTCM_DATA_INIT$$Limit - (uint32_t) &DTCM_DATA_INIT$$Base) / sizeof(uint64_t); + dtcm_zero_destination = (uint64_t *) &DTCM_BSS$$Base; + count_zero = ((uint32_t) &DTCM_BSS$$Limit - (uint32_t) &DTCM_BSS$$Base) / sizeof(uint64_t); + #endif + + memcpy_64(dtcm_destination, dtcm_source, count); + memset_64(dtcm_zero_destination, 0, count_zero); +} + + #endif + +#endif + /** @} (end addtogroup BSP_MCU) */ diff --git a/ra/fsp/src/bsp/mcu/all/bsp_clocks.c b/ra/fsp/src/bsp/mcu/all/bsp_clocks.c index 3ef0bce47..279a1b6fb 100644 --- a/ra/fsp/src/bsp/mcu/all/bsp_clocks.c +++ b/ra/fsp/src/bsp/mcu/all/bsp_clocks.c @@ -64,10 +64,13 @@ /* Calculate value to write to MOMCR (MODRV controls main clock drive strength and MOSEL determines the source of the * main oscillator). */ -#define BSP_PRV_MOMCR_MOSEL_BIT (6) -#define BSP_PRV_MODRV ((CGC_MAINCLOCK_DRIVE << BSP_FEATURE_CGC_MODRV_SHIFT) & \ +#if BSP_FEATURE_CGC_MODRV_MASK + #define BSP_PRV_MODRV ((CGC_MAINCLOCK_DRIVE << BSP_FEATURE_CGC_MODRV_SHIFT) & \ BSP_FEATURE_CGC_MODRV_MASK) -#define BSP_PRV_MOSEL (BSP_CLOCK_CFG_MAIN_OSC_CLOCK_SOURCE << BSP_PRV_MOMCR_MOSEL_BIT) +#else + #define BSP_PRV_MODRV (0x1AU) +#endif +#define BSP_PRV_MOSEL (BSP_CLOCK_CFG_MAIN_OSC_CLOCK_SOURCE << R_SYSTEM_MOMCR_MOSEL_Pos) #define BSP_PRV_MOMCR (BSP_PRV_MODRV | BSP_PRV_MOSEL) /* Locations of bitfields used to configure CLKOUT. */ @@ -364,15 +367,13 @@ #define BSP_PRV_MAIN_OSC_USED (1) #elif defined(BSP_CFG_I3CCLK_SOURCE) && (BSP_CFG_I3CCLK_SOURCE == BSP_CLOCKS_SOURCE_CLOCK_MAIN_OSC) #define BSP_PRV_MAIN_OSC_USED (1) -#elif defined(BSP_CFG_ADCCLK_SOURCE) && (BSP_CFG_ADCCLK_SOURCE == BSP_CLOCKS_SOURCE_CLOCK_MAIN_OSC) - #define BSP_PRV_MAIN_OSC_USED (1) #elif defined(BSP_CFG_LCDCLK_SOURCE) && (BSP_CFG_LCDCLK_SOURCE == BSP_CLOCKS_SOURCE_CLOCK_MAIN_OSC) #define BSP_PRV_MAIN_OSC_USED (1) #elif defined(BSP_CFG_U60CLK_SOURCE) && (BSP_CFG_U60CLK_SOURCE == BSP_CLOCKS_SOURCE_CLOCK_MAIN_OSC) #define BSP_PRV_MAIN_OSC_USED (1) #elif defined(BSP_CFG_OCTA_SOURCE) && (BSP_CFG_OCTA_SOURCE == BSP_CLOCKS_SOURCE_CLOCK_MAIN_OSC) #define BSP_PRV_MAIN_OSC_USED (1) -#elif defined(BSP_CFG_SDADC_CLOCK_SOURCE) && (BSP_CFG_SDADC_CLOCK_SOURCE == BSP_CLOCKS_SOURCE_MAIN_OSC) +#elif defined(BSP_CFG_SDADC_CLOCK_SOURCE) && (BSP_CFG_SDADC_CLOCK_SOURCE == BSP_CLOCKS_SOURCE_CLOCK_MAIN_OSC) #define BSP_PRV_MAIN_OSC_USED (1) #else #define BSP_PRV_MAIN_OSC_USED (0) @@ -405,8 +406,6 @@ #define BSP_PRV_HOCO_USED (1) #elif defined(BSP_CFG_IICCLK_SOURCE) && (BSP_CFG_IICCLK_SOURCE == BSP_CLOCKS_SOURCE_CLOCK_HOCO) #define BSP_PRV_HOCO_USED (1) -#elif defined(BSP_CFG_ADCCLK_SOURCE) && (BSP_CFG_ADCCLK_SOURCE == BSP_CLOCKS_SOURCE_CLOCK_HOCO) - #define BSP_PRV_HOCO_USED (1) #elif defined(BSP_CFG_LCDCLK_SOURCE) && (BSP_CFG_LCDCLK_SOURCE == BSP_CLOCKS_SOURCE_CLOCK_HOCO) #define BSP_PRV_HOCO_USED (1) #elif defined(BSP_CFG_U60CLK_SOURCE) && (BSP_CFG_U60CLK_SOURCE == BSP_CLOCKS_SOURCE_CLOCK_HOCO) @@ -442,8 +441,6 @@ #define BSP_PRV_MOCO_USED (1) #elif defined(BSP_CFG_I3CCLK_SOURCE) && (BSP_CFG_I3CCLK_SOURCE == BSP_CLOCKS_SOURCE_CLOCK_MOCO) #define BSP_PRV_MOCO_USED (1) -#elif defined(BSP_CFG_ADCCLK_SOURCE) && (BSP_CFG_ADCCLK_SOURCE == BSP_CLOCKS_SOURCE_CLOCK_MOCO) - #define BSP_PRV_MOCO_USED (1) #elif defined(BSP_CFG_LCDCLK_SOURCE) && (BSP_CFG_LCDCLK_SOURCE == BSP_CLOCKS_SOURCE_CLOCK_MOCO) #define BSP_PRV_MOCO_USED (1) #elif defined(BSP_CFG_U60CLK_SOURCE) && (BSP_CFG_U60CLK_SOURCE == BSP_CLOCKS_SOURCE_CLOCK_MOCO) @@ -472,8 +469,6 @@ #define BSP_PRV_LOCO_USED (1) #elif defined(BSP_CFG_IICCLK_SOURCE) && (BSP_CFG_IICCLK_SOURCE == BSP_CLOCKS_SOURCE_CLOCK_LOCO) #define BSP_PRV_LOCO_USED (1) -#elif defined(BSP_CFG_ADCCLK_SOURCE) && (BSP_CFG_ADCCLK_SOURCE == BSP_CLOCKS_SOURCE_CLOCK_LOCO) - #define BSP_PRV_LOCO_USED (1) #elif defined(BSP_CFG_OCTA_SOURCE) && (BSP_CFG_OCTA_SOURCE == BSP_CLOCKS_SOURCE_CLOCK_LOCO) #define BSP_PRV_LOCO_USED (1) #else @@ -506,7 +501,6 @@ (BSP_FEATURE_BSP_HAS_IIC_CLOCK && (BSP_CFG_IICCLK_SOURCE != BSP_CLOCKS_CLOCK_DISABLED)) || \ (BSP_FEATURE_BSP_HAS_CEC_CLOCK && (BSP_CFG_CECCLK_SOURCE != BSP_CLOCKS_CLOCK_DISABLED)) || \ (BSP_FEATURE_BSP_HAS_I3C_CLOCK && (BSP_CFG_I3CCLK_SOURCE != BSP_CLOCKS_CLOCK_DISABLED)) || \ - (BSP_FEATURE_BSP_HAS_ADC_CLOCK && (BSP_CFG_ADCCLK_SOURCE != BSP_CLOCKS_CLOCK_DISABLED)) || \ (BSP_FEATURE_BSP_HAS_USB60_CLOCK_REQ && (BSP_CFG_U60CK_SOURCE != BSP_CLOCKS_CLOCK_DISABLED)) || \ (BSP_FEATURE_BSP_HAS_LCD_CLOCK && (BSP_CFG_LCDCLK_SOURCE != BSP_CLOCKS_CLOCK_DISABLED)) @@ -1630,11 +1624,6 @@ void bsp_clock_init (void) bsp_peripheral_clock_set(&R_SYSTEM->I3CCKCR, &R_SYSTEM->I3CCKDIVCR, BSP_CFG_I3CCLK_DIV, BSP_CFG_I3CCLK_SOURCE); #endif - /* Set the ADC clock if it exists on the MCU */ -#if BSP_FEATURE_BSP_HAS_ADC_CLOCK && (BSP_CFG_ADCCLK_SOURCE != BSP_CLOCKS_CLOCK_DISABLED) - bsp_peripheral_clock_set(&R_SYSTEM->ADCCKCR, &R_SYSTEM->ADCCKDIVCR, BSP_CFG_ADCCLK_DIV, BSP_CFG_ADCCLK_SOURCE); -#endif - /* Set the LCD clock if it exists on the MCU */ #if BSP_FEATURE_BSP_HAS_LCD_CLOCK && (BSP_CFG_LCDCLK_SOURCE != BSP_CLOCKS_CLOCK_DISABLED) bsp_peripheral_clock_set(&R_SYSTEM->LCDCKCR, &R_SYSTEM->LCDCKDIVCR, BSP_CFG_LCDCLK_DIV, BSP_CFG_LCDCLK_SOURCE); @@ -2005,7 +1994,7 @@ void R_BSP_Init_RTC (void) /* RCKSEL bit is not initialized after reset. Use LOCO as the default * clock source if it is available. Note RCR4.ROPSEL is also cleared. */ - #if BSP_PRV_LOCO_USED + #if BSP_PRV_LOCO_USED && !BSP_FEATURE_RTC_IS_IRTC R_RTC->RCR4 = 1 << R_RTC_RCR4_RCKSEL_Pos; #else diff --git a/ra/fsp/src/bsp/mcu/all/bsp_clocks.h b/ra/fsp/src/bsp/mcu/all/bsp_clocks.h index b4d4868be..8e0d65449 100644 --- a/ra/fsp/src/bsp/mcu/all/bsp_clocks.h +++ b/ra/fsp/src/bsp/mcu/all/bsp_clocks.h @@ -166,11 +166,11 @@ FSP_HEADER /* USB clock divider options. */ #define BSP_CLOCKS_USB_CLOCK_DIV_1 (0) // Divide USB source clock by 1 #define BSP_CLOCKS_USB_CLOCK_DIV_2 (1) // Divide USB source clock by 2 -#define BSP_CLOCKS_USB_CLOCK_DIV_3 (5) // Divide USB source clock by 3 -#define BSP_CLOCKS_USB_CLOCK_DIV_4 (2) // Divide USB source clock by 4 -#define BSP_CLOCKS_USB_CLOCK_DIV_5 (6) // Divide USB source clock by 5 -#define BSP_CLOCKS_USB_CLOCK_DIV_6 (3) // Divide USB source clock by 6 -#define BSP_CLOCKS_USB_CLOCK_DIV_8 (4) // Divide USB source clock by 8 +#define BSP_CLOCKS_USB_CLOCK_DIV_3 (2) // Divide USB source clock by 3 +#define BSP_CLOCKS_USB_CLOCK_DIV_4 (3) // Divide USB source clock by 4 +#define BSP_CLOCKS_USB_CLOCK_DIV_5 (4) // Divide USB source clock by 5 +#define BSP_CLOCKS_USB_CLOCK_DIV_6 (5) // Divide USB source clock by 6 +#define BSP_CLOCKS_USB_CLOCK_DIV_8 (7) // Divide USB source clock by 8 /* USB60 clock divider options. */ #define BSP_CLOCKS_USB60_CLOCK_DIV_1 (0) // Divide USB60 source clock by 1 @@ -260,15 +260,6 @@ FSP_HEADER #define BSP_CLOCKS_I3C_CLOCK_DIV_6 (3) // Divide I3C source clock by 6 #define BSP_CLOCKS_I3C_CLOCK_DIV_8 (4) // Divide I3C source clock by 8 -/* ADC clock divider options. */ -#define BSP_CLOCKS_ADC_CLOCK_DIV_1 (0) // Divide ADC source clock by 1 -#define BSP_CLOCKS_ADC_CLOCK_DIV_2 (1) // Divide ADC source clock by 2 -#define BSP_CLOCKS_ADC_CLOCK_DIV_3 (5) // Divide ADC source clock by 3 -#define BSP_CLOCKS_ADC_CLOCK_DIV_4 (2) // Divide ADC source clock by 4 -#define BSP_CLOCKS_ADC_CLOCK_DIV_5 (6) // Divide ADC source clock by 5 -#define BSP_CLOCKS_ADC_CLOCK_DIV_6 (3) // Divide ADC source clock by 6 -#define BSP_CLOCKS_ADC_CLOCK_DIV_8 (4) // Divide ADC source clock by 8 - /* PLL divider options. */ #define BSP_CLOCKS_PLL_DIV_1 (0) #define BSP_CLOCKS_PLL_DIV_2 (1) diff --git a/ra/fsp/src/bsp/mcu/all/bsp_common.h b/ra/fsp/src/bsp/mcu/all/bsp_common.h index a800ecbf9..be663396e 100644 --- a/ra/fsp/src/bsp/mcu/all/bsp_common.h +++ b/ra/fsp/src/bsp/mcu/all/bsp_common.h @@ -33,7 +33,7 @@ #include <string.h> /* Different compiler support. */ -#include "../../inc/fsp_common_api.h" +#include "../../inc/api/fsp_common_api.h" #include "bsp_compiler_support.h" #include "bsp_cfg.h" @@ -256,6 +256,7 @@ typedef struct st_bsp_unique_id * Exported global variables **********************************************************************************************************************/ uint32_t R_BSP_SourceClockHzGet(fsp_priv_source_clock_t clock); + /*********************************************************************************************************************** * Global variables (defined in other files) **********************************************************************************************************************/ @@ -327,7 +328,7 @@ __STATIC_INLINE uint32_t R_FSP_ClockDividerGet (uint32_t ckdivcr) * - Clock Divided by 2: 1 * - Clock Divided by 4: 2 */ - return 1 << ckdivcr; + return 1U << ckdivcr; } else if (3U == ckdivcr) { diff --git a/ra/fsp/src/bsp/mcu/ra2a1/bsp_feature.h b/ra/fsp/src/bsp/mcu/ra2a1/bsp_feature.h index 202a30081..421ac6bfa 100644 --- a/ra/fsp/src/bsp/mcu/ra2a1/bsp_feature.h +++ b/ra/fsp/src/bsp/mcu/ra2a1/bsp_feature.h @@ -82,14 +82,13 @@ #define BSP_FEATURE_ADC_VALID_UNIT_MASK (1U) #define BSP_FEATURE_AGT_AGTW_CHANNEL_COUNT (0) -#define BSP_FEATURE_AGT_MAX_CHANNEL_NUM (1) +#define BSP_FEATURE_AGT_AGT_CHANNEL_COUNT (2) #define BSP_FEATURE_AGT_USE_AGTIOSEL_ALT (0) // Indicates use of AGTIOSEL_ALT instead of AGTIOSEL #define BSP_FEATURE_AGT_VALID_CHANNEL_MASK (0x03) #define BSP_FEATURE_BSP_FLASH_CACHE (1) #define BSP_FEATURE_BSP_FLASH_CACHE_DISABLE_OPM (1U) #define BSP_FEATURE_BSP_FLASH_PREFETCH_BUFFER (0) -#define BSP_FEATURE_BSP_HAS_ADC_CLOCK (0) #define BSP_FEATURE_BSP_HAS_CANFD_CLOCK (0) // Feature not available on this MCU #define BSP_FEATURE_BSP_HAS_CEC_CLOCK (0) // Feature not available on this MCU #define BSP_FEATURE_BSP_HAS_CLOCK_SUPPLY_TYPEB (0U) @@ -107,7 +106,7 @@ #define BSP_FEATURE_BSP_HAS_OFS3 (0) #define BSP_FEATURE_BSP_HAS_SCE5 (0) // Feature not available on this MCU #define BSP_FEATURE_BSP_HAS_SCE_ON_RA2 (1) -#define BSP_FEATURE_BSP_HAS_SCISPI_CLOCK (0) // Feature not available on this MCU TODO_CHECK_FEATURE +#define BSP_FEATURE_BSP_HAS_SCISPI_CLOCK (0) // Feature not available on this MCU #define BSP_FEATURE_BSP_HAS_SCI_CLOCK (0) #define BSP_FEATURE_BSP_HAS_SDADC_CLOCK (0) #define BSP_FEATURE_BSP_HAS_SECURITY_MPU (1U) @@ -184,12 +183,32 @@ #define BSP_FEATURE_CGC_LOW_VOLTAGE_MAX_FREQ_HZ (4000000U) // This MCU does have Low Voltage Mode, up to 4MHz #define BSP_FEATURE_CGC_MIDDLE_SPEED_MAX_FREQ_HZ (8000000U) // This MCU does have Middle Speed Mode, up to 8MHz #define BSP_FEATURE_CGC_MOCO_STABILIZATION_MAX_US (1U) -#define BSP_FEATURE_CGC_MODRV_MASK (0x08U) -#define BSP_FEATURE_CGC_MODRV_SHIFT (0x3U) -#define BSP_FEATURE_CGC_PLLCCR_MAX_HZ (0U) +#define BSP_FEATURE_CGC_MODRV_MASK (R_SYSTEM_MOMCR_MODRV1_Msk) +#define BSP_FEATURE_CGC_MODRV_SHIFT (R_SYSTEM_MOMCR_MODRV1_Pos) +#define BSP_FEATURE_CGC_PLL_OUT_MAX_HZ (0U) // Feature not available on this MCU +#define BSP_FEATURE_CGC_PLL_OUT_P_MAX_HZ (0U) // Feature not available on this MCU +#define BSP_FEATURE_CGC_PLL_OUT_Q_MAX_HZ (0U) // Feature not available on this MCU +#define BSP_FEATURE_CGC_PLL_OUT_R_MAX_HZ (0U) // Feature not available on this MCU +#define BSP_FEATURE_CGC_PLL_OUT_MIN_HZ (0U) // Feature not available on this MCU +#define BSP_FEATURE_CGC_PLL_OUT_P_MIN_HZ (0U) // Feature not available on this MCU +#define BSP_FEATURE_CGC_PLL_OUT_Q_MIN_HZ (0U) // Feature not available on this MCU +#define BSP_FEATURE_CGC_PLL_OUT_R_MIN_HZ (0U) // Feature not available on this MCU +#define BSP_FEATURE_CGC_PLL_SRC_MAX_HZ (0U) // Feature not available on this MCU +#define BSP_FEATURE_CGC_PLL_SRC_MIN_HZ (0U) // Feature not available on this MCU +#define BSP_FEATURE_CGC_PLL2_OUT_MAX_HZ (0U) // Feature not available on this MCU +#define BSP_FEATURE_CGC_PLL2_OUT_P_MAX_HZ (0U) // Feature not available on this MCU +#define BSP_FEATURE_CGC_PLL2_OUT_Q_MAX_HZ (0U) // Feature not available on this MCU +#define BSP_FEATURE_CGC_PLL2_OUT_R_MAX_HZ (0U) // Feature not available on this MCU +#define BSP_FEATURE_CGC_PLL2_OUT_MIN_HZ (0U) // Feature not available on this MCU +#define BSP_FEATURE_CGC_PLL2_OUT_P_MIN_HZ (0U) // Feature not available on this MCU +#define BSP_FEATURE_CGC_PLL2_OUT_Q_MIN_HZ (0U) // Feature not available on this MCU +#define BSP_FEATURE_CGC_PLL2_OUT_R_MIN_HZ (0U) // Feature not available on this MCU +#define BSP_FEATURE_CGC_PLL2_SRC_MAX_HZ (0U) // Feature not available on this MCU +#define BSP_FEATURE_CGC_PLL2_SRC_MIN_HZ (0U) // Feature not available on this MCU + #define BSP_FEATURE_CGC_PLLCCR_TYPE (0U) #define BSP_FEATURE_CGC_PLLCCR_VCO_MAX_HZ (0U) -#define BSP_FEATURE_CGC_PLLCCR_WAIT_US (0U) // This MCU does not have PLL +#define BSP_FEATURE_CGC_PLLCCR_WAIT_US (0U) // This MCU does not have PLL #define BSP_FEATURE_CGC_SCKDIVCR_BCLK_MATCHES_PCLKB (0) #define BSP_FEATURE_CGC_SODRV_MASK (0x03U) #define BSP_FEATURE_CGC_SODRV_SHIFT (0x0U) @@ -203,14 +222,14 @@ #define BSP_FEATURE_CRYPTO_HAS_ECC (0) #define BSP_FEATURE_CRYPTO_HAS_ECC_WRAPPED (0) #define BSP_FEATURE_CRYPTO_HAS_HASH (0) -#define BSP_FEATURE_CRYPTO_HAS_NEW_PROCS (0) // Feature not available on this MCU TODO_CHECK_FEATURE +#define BSP_FEATURE_CRYPTO_HAS_NEW_PROCS (0) // Feature not available on this MCU #define BSP_FEATURE_CRYPTO_HAS_RSA (0) #define BSP_FEATURE_CRYPTO_HAS_RSA_WRAPPED (0) #define BSP_FEATURE_CRYPTO_AES_IP_VERSION (1) #define BSP_FEATURE_CRYPTO_HAS_SCE5 (0) #define BSP_FEATURE_CRYPTO_HAS_SCE5B (0) #define BSP_FEATURE_CRYPTO_HAS_SCE7 (0) -#define BSP_FEATURE_CRYPTO_HAS_SCE9 (0) // Feature not available on this MCU TODO_CHECK_FEATURE +#define BSP_FEATURE_CRYPTO_HAS_SCE9 (0) // Feature not available on this MCU #define BSP_FEATURE_CTSU_CTSUCHAC_REGISTER_COUNT (4U) #define BSP_FEATURE_CTSU_CTSUCHTRC_REGISTER_COUNT (4U) @@ -243,7 +262,7 @@ #define BSP_FEATURE_ETHER_FIFO_DEPTH (0) // Feature not available on this MCU #define BSP_FEATURE_ETHER_MAX_CHANNELS (0) // Feature not available on this MCU -#define BSP_FEATURE_ETHER_SUPPORTS_TZ_SECURE (0) // Feature not available on this MCU TODO_CHECK_FEATURE +#define BSP_FEATURE_ETHER_SUPPORTS_TZ_SECURE (0) // Feature not available on this MCU #define BSP_FEATURE_FLASH_CODE_FLASH_START (0x0U) #define BSP_FEATURE_FLASH_DATA_FLASH_START (0x40100000U) @@ -295,11 +314,11 @@ #define BSP_FEATURE_ICU_FIXED_IELSR_COUNT (0U) #define BSP_FEATURE_IIC_BUS_FREE_TIME_MULTIPLIER (0U) -#define BSP_FEATURE_IIC_B_FAST_MODE_PLUS (0) // Feature not available on this MCU TODO_CHECK_FEATURE -#define BSP_FEATURE_IIC_B_VALID_CHANNEL_MASK (0) // Feature not available on this MCU TODO_CHECK_FEATURE +#define BSP_FEATURE_IIC_B_FAST_MODE_PLUS (0) // Feature not available on this MCU +#define BSP_FEATURE_IIC_B_VALID_CHANNEL_MASK (0) // Feature not available on this MCU #define BSP_FEATURE_IIC_FAST_MODE_PLUS (0U) #define BSP_FEATURE_IIC_VALID_CHANNEL_MASK (0x03) -#define BSP_FEATURE_IIC_VERSION (0) // Feature not available on this MCU TODO_CHECK_FEATURE +#define BSP_FEATURE_IIC_VERSION (0) // Feature not available on this MCU #define BSP_FEATURE_IOPORT_ELC_PORTS (0x0006U) #define BSP_FEATURE_IOPORT_HAS_ETHERNET (0U) @@ -334,6 +353,7 @@ #define BSP_FEATURE_LPM_STANDBY_MOCO_REQUIRED (0U) #define BSP_FEATURE_LVD_HAS_DIGITAL_FILTER (0U) +#define BSP_FEATURE_LVD_HAS_EXT_MONITOR (0U) #define BSP_FEATURE_LVD_HAS_LVDLVLR (1U) #define BSP_FEATURE_LVD_MONITOR_1_HI_THRESHOLD (LVD_THRESHOLD_MONITOR_1_LEVEL_4_29V) // 4.29V #define BSP_FEATURE_LVD_MONITOR_1_LOW_THRESHOLD (LVD_THRESHOLD_MONITOR_1_LEVEL_1_65V) // 1.65V @@ -371,6 +391,7 @@ #define BSP_FEATURE_SCI_ADDRESS_MATCH_CHANNELS (BSP_FEATURE_SCI_CHANNELS) #define BSP_FEATURE_SCI_CHANNELS (0x203U) #define BSP_FEATURE_SCI_CLOCK (FSP_PRIV_CLOCK_PCLKB) +#define BSP_FEATURE_SCI_SPI_SCKSEL_VALUE (0U) // Feature not available on this MCU #define BSP_FEATURE_SCI_UART_CSTPEN_CHANNELS (0x0U) #define BSP_FEATURE_SCI_UART_FIFO_CHANNELS (0x1U) #define BSP_FEATURE_SCI_UART_FIFO_DEPTH (16U) @@ -387,7 +408,9 @@ #define BSP_FEATURE_SLCDC_HAS_8_TIME_SLICE (0) // Feature not available on this MCU #define BSP_FEATURE_SLCDC_HAS_INTERNAL_VOLT_GEN (0) // Feature not available on this MCU #define BSP_FEATURE_SLCDC_MAX_NUM_SEG (0) // Feature not available on this MCU -#define BSP_FEATURE_SLCDC_HAS_VL1SEL (0) +#define BSP_FEATURE_SLCDC_HAS_VL1SEL (0) // Feature not available on this MCU +#define BSP_FEATURE_SLCDC_CONTRAST_MAX_4BIAS (0) // Feature not available on this MCU +#define BSP_FEATURE_SLCDC_CONTRAST_MAX (0) // Feature not available on this MCU #define BSP_FEATURE_SPI_CLK (FSP_PRIV_CLOCK_PCLKB) #define BSP_FEATURE_SPI_HAS_SPCR3 (0U) diff --git a/ra/fsp/src/bsp/mcu/ra2e1/bsp_feature.h b/ra/fsp/src/bsp/mcu/ra2e1/bsp_feature.h index 8e0f54f87..6dd346b6a 100644 --- a/ra/fsp/src/bsp/mcu/ra2e1/bsp_feature.h +++ b/ra/fsp/src/bsp/mcu/ra2e1/bsp_feature.h @@ -82,14 +82,13 @@ #define BSP_FEATURE_ADC_VALID_UNIT_MASK (1U) #define BSP_FEATURE_AGT_AGTW_CHANNEL_COUNT (0) -#define BSP_FEATURE_AGT_MAX_CHANNEL_NUM (1) +#define BSP_FEATURE_AGT_AGT_CHANNEL_COUNT (2) #define BSP_FEATURE_AGT_USE_AGTIOSEL_ALT (0) // Indicates use of AGTIOSEL_ALT instead of AGTIOSEL #define BSP_FEATURE_AGT_VALID_CHANNEL_MASK (0x03) #define BSP_FEATURE_BSP_FLASH_CACHE (0) #define BSP_FEATURE_BSP_FLASH_CACHE_DISABLE_OPM (1U) #define BSP_FEATURE_BSP_FLASH_PREFETCH_BUFFER (1) -#define BSP_FEATURE_BSP_HAS_ADC_CLOCK (0) #define BSP_FEATURE_BSP_HAS_CANFD_CLOCK (0) // Feature not available on this MCU #define BSP_FEATURE_BSP_HAS_CEC_CLOCK (0) // Feature not available on this MCU #define BSP_FEATURE_BSP_HAS_CLOCK_SUPPLY_TYPEB (1U) @@ -107,7 +106,7 @@ #define BSP_FEATURE_BSP_HAS_OFS3 (0) #define BSP_FEATURE_BSP_HAS_SCE5 (0) // Feature not available on this MCU #define BSP_FEATURE_BSP_HAS_SCE_ON_RA2 (1) -#define BSP_FEATURE_BSP_HAS_SCISPI_CLOCK (0) // Feature not available on this MCU TODO_CHECK_FEATURE +#define BSP_FEATURE_BSP_HAS_SCISPI_CLOCK (0) // Feature not available on this MCU #define BSP_FEATURE_BSP_HAS_SCI_CLOCK (0) #define BSP_FEATURE_BSP_HAS_SDADC_CLOCK (0) #define BSP_FEATURE_BSP_HAS_SECURITY_MPU (1U) @@ -182,9 +181,29 @@ #define BSP_FEATURE_CGC_LOW_VOLTAGE_MAX_FREQ_HZ (0U) // This MCU does not have Low Voltage Mode #define BSP_FEATURE_CGC_MIDDLE_SPEED_MAX_FREQ_HZ (24000000U) #define BSP_FEATURE_CGC_MOCO_STABILIZATION_MAX_US (1U) -#define BSP_FEATURE_CGC_MODRV_MASK (0x08U) -#define BSP_FEATURE_CGC_MODRV_SHIFT (0x3U) -#define BSP_FEATURE_CGC_PLLCCR_MAX_HZ (0U) +#define BSP_FEATURE_CGC_MODRV_MASK (R_SYSTEM_MOMCR_MODRV1_Msk) +#define BSP_FEATURE_CGC_MODRV_SHIFT (R_SYSTEM_MOMCR_MODRV1_Pos) +#define BSP_FEATURE_CGC_PLL_OUT_MAX_HZ (0U) // Feature not available on this MCU +#define BSP_FEATURE_CGC_PLL_OUT_P_MAX_HZ (0U) // Feature not available on this MCU +#define BSP_FEATURE_CGC_PLL_OUT_Q_MAX_HZ (0U) // Feature not available on this MCU +#define BSP_FEATURE_CGC_PLL_OUT_R_MAX_HZ (0U) // Feature not available on this MCU +#define BSP_FEATURE_CGC_PLL_OUT_MIN_HZ (0U) // Feature not available on this MCU +#define BSP_FEATURE_CGC_PLL_OUT_P_MIN_HZ (0U) // Feature not available on this MCU +#define BSP_FEATURE_CGC_PLL_OUT_Q_MIN_HZ (0U) // Feature not available on this MCU +#define BSP_FEATURE_CGC_PLL_OUT_R_MIN_HZ (0U) // Feature not available on this MCU +#define BSP_FEATURE_CGC_PLL_SRC_MAX_HZ (0U) // Feature not available on this MCU +#define BSP_FEATURE_CGC_PLL_SRC_MIN_HZ (0U) // Feature not available on this MCU +#define BSP_FEATURE_CGC_PLL2_OUT_MAX_HZ (0U) // Feature not available on this MCU +#define BSP_FEATURE_CGC_PLL2_OUT_P_MAX_HZ (0U) // Feature not available on this MCU +#define BSP_FEATURE_CGC_PLL2_OUT_Q_MAX_HZ (0U) // Feature not available on this MCU +#define BSP_FEATURE_CGC_PLL2_OUT_R_MAX_HZ (0U) // Feature not available on this MCU +#define BSP_FEATURE_CGC_PLL2_OUT_MIN_HZ (0U) // Feature not available on this MCU +#define BSP_FEATURE_CGC_PLL2_OUT_P_MIN_HZ (0U) // Feature not available on this MCU +#define BSP_FEATURE_CGC_PLL2_OUT_Q_MIN_HZ (0U) // Feature not available on this MCU +#define BSP_FEATURE_CGC_PLL2_OUT_R_MIN_HZ (0U) // Feature not available on this MCU +#define BSP_FEATURE_CGC_PLL2_SRC_MAX_HZ (0U) // Feature not available on this MCU +#define BSP_FEATURE_CGC_PLL2_SRC_MIN_HZ (0U) // Feature not available on this MCU + #define BSP_FEATURE_CGC_PLLCCR_TYPE (0U) #define BSP_FEATURE_CGC_PLLCCR_VCO_MAX_HZ (0U) #define BSP_FEATURE_CGC_PLLCCR_WAIT_US (0U) // This MCU does not have PLL @@ -201,14 +220,14 @@ #define BSP_FEATURE_CRYPTO_HAS_ECC (0) // #define BSP_FEATURE_CRYPTO_HAS_ECC_WRAPPED (0) // #define BSP_FEATURE_CRYPTO_HAS_HASH (0) // -#define BSP_FEATURE_CRYPTO_HAS_NEW_PROCS (0) // Feature not available on this MCU TODO_CHECK_FEATURE +#define BSP_FEATURE_CRYPTO_HAS_NEW_PROCS (0) // Feature not available on this MCU #define BSP_FEATURE_CRYPTO_HAS_RSA (0) // #define BSP_FEATURE_CRYPTO_HAS_RSA_WRAPPED (0) // #define BSP_FEATURE_CRYPTO_AES_IP_VERSION (1) #define BSP_FEATURE_CRYPTO_HAS_SCE5 (0) #define BSP_FEATURE_CRYPTO_HAS_SCE5B (0) #define BSP_FEATURE_CRYPTO_HAS_SCE7 (0) -#define BSP_FEATURE_CRYPTO_HAS_SCE9 (0) // Feature not available on this MCU TODO_CHECK_FEATURE +#define BSP_FEATURE_CRYPTO_HAS_SCE9 (0) // Feature not available on this MCU #define BSP_FEATURE_CTSU_CTSUCHAC_REGISTER_COUNT (5U) #define BSP_FEATURE_CTSU_CTSUCHTRC_REGISTER_COUNT (5U) @@ -241,7 +260,7 @@ #define BSP_FEATURE_ETHER_FIFO_DEPTH (0) // Feature not available on this MCU #define BSP_FEATURE_ETHER_MAX_CHANNELS (0) // Feature not available on this MCU -#define BSP_FEATURE_ETHER_SUPPORTS_TZ_SECURE (0) // Feature not available on this MCU TODO_CHECK_FEATURE +#define BSP_FEATURE_ETHER_SUPPORTS_TZ_SECURE (0) // Feature not available on this MCU #define BSP_FEATURE_FLASH_CODE_FLASH_START (0x0U) #define BSP_FEATURE_FLASH_DATA_FLASH_START (0x40100000U) @@ -293,11 +312,11 @@ #define BSP_FEATURE_ICU_FIXED_IELSR_COUNT (0U) #define BSP_FEATURE_IIC_BUS_FREE_TIME_MULTIPLIER (0U) -#define BSP_FEATURE_IIC_B_FAST_MODE_PLUS (0) // Feature not available on this MCU TODO_CHECK_FEATURE -#define BSP_FEATURE_IIC_B_VALID_CHANNEL_MASK (0) // Feature not available on this MCU TODO_CHECK_FEATURE +#define BSP_FEATURE_IIC_B_FAST_MODE_PLUS (0) // Feature not available on this MCU +#define BSP_FEATURE_IIC_B_VALID_CHANNEL_MASK (0) // Feature not available on this MCU #define BSP_FEATURE_IIC_FAST_MODE_PLUS (0U) #define BSP_FEATURE_IIC_VALID_CHANNEL_MASK (0x01) -#define BSP_FEATURE_IIC_VERSION (0) // Feature not available on this MCU TODO_CHECK_FEATURE +#define BSP_FEATURE_IIC_VERSION (0) // Feature not available on this MCU #define BSP_FEATURE_IOPORT_ELC_PORTS (0x0006U) #define BSP_FEATURE_IOPORT_HAS_ETHERNET (0U) @@ -332,6 +351,7 @@ #define BSP_FEATURE_LPM_STANDBY_MOCO_REQUIRED (0U) #define BSP_FEATURE_LVD_HAS_DIGITAL_FILTER (0U) +#define BSP_FEATURE_LVD_HAS_EXT_MONITOR (0U) #define BSP_FEATURE_LVD_HAS_LVDLVLR (1) #define BSP_FEATURE_LVD_MONITOR_1_HI_THRESHOLD (LVD_THRESHOLD_MONITOR_1_LEVEL_4_29V) // 4.29V #define BSP_FEATURE_LVD_MONITOR_1_LOW_THRESHOLD (LVD_THRESHOLD_MONITOR_1_LEVEL_1_65V) // 1.65V @@ -369,6 +389,7 @@ #define BSP_FEATURE_SCI_ADDRESS_MATCH_CHANNELS (BSP_FEATURE_SCI_CHANNELS) #define BSP_FEATURE_SCI_CHANNELS (0x207U) #define BSP_FEATURE_SCI_CLOCK (FSP_PRIV_CLOCK_PCLKB) +#define BSP_FEATURE_SCI_SPI_SCKSEL_VALUE (0U) // Feature not available on this MCU #define BSP_FEATURE_SCI_UART_CSTPEN_CHANNELS (0x0U) #define BSP_FEATURE_SCI_UART_FIFO_CHANNELS (0x1U) #define BSP_FEATURE_SCI_UART_FIFO_DEPTH (16U) @@ -385,7 +406,9 @@ #define BSP_FEATURE_SLCDC_HAS_8_TIME_SLICE (0) // Feature not available on this MCU #define BSP_FEATURE_SLCDC_HAS_INTERNAL_VOLT_GEN (0) // Feature not available on this MCU #define BSP_FEATURE_SLCDC_MAX_NUM_SEG (0) // Feature not available on this MCU -#define BSP_FEATURE_SLCDC_HAS_VL1SEL (0) +#define BSP_FEATURE_SLCDC_HAS_VL1SEL (0) // Feature not available on this MCU +#define BSP_FEATURE_SLCDC_CONTRAST_MAX_4BIAS (0) // Feature not available on this MCU +#define BSP_FEATURE_SLCDC_CONTRAST_MAX (0) // Feature not available on this MCU #define BSP_FEATURE_SPI_CLK (FSP_PRIV_CLOCK_PCLKB) #define BSP_FEATURE_SPI_HAS_SPCR3 (0) // Feature not available on this MCU diff --git a/ra/fsp/src/bsp/mcu/ra2e2/bsp_feature.h b/ra/fsp/src/bsp/mcu/ra2e2/bsp_feature.h index b21e7cb91..c91ee607b 100644 --- a/ra/fsp/src/bsp/mcu/ra2e2/bsp_feature.h +++ b/ra/fsp/src/bsp/mcu/ra2e2/bsp_feature.h @@ -82,14 +82,13 @@ #define BSP_FEATURE_ADC_VALID_UNIT_MASK (1U) #define BSP_FEATURE_AGT_AGTW_CHANNEL_COUNT (2) -#define BSP_FEATURE_AGT_MAX_CHANNEL_NUM (1) +#define BSP_FEATURE_AGT_AGT_CHANNEL_COUNT (0) #define BSP_FEATURE_AGT_USE_AGTIOSEL_ALT (1) // Indicates use of AGTIOSEL_ALT instead of AGTIOSEL #define BSP_FEATURE_AGT_VALID_CHANNEL_MASK (0x03) #define BSP_FEATURE_BSP_FLASH_CACHE (0) #define BSP_FEATURE_BSP_FLASH_CACHE_DISABLE_OPM (1U) #define BSP_FEATURE_BSP_FLASH_PREFETCH_BUFFER (1) -#define BSP_FEATURE_BSP_HAS_ADC_CLOCK (0) #define BSP_FEATURE_BSP_HAS_CANFD_CLOCK (0) // Feature not available on this MCU #define BSP_FEATURE_BSP_HAS_CEC_CLOCK (0) // Feature not available on this MCU #define BSP_FEATURE_BSP_HAS_CLOCK_SUPPLY_TYPEB (1U) @@ -107,7 +106,7 @@ #define BSP_FEATURE_BSP_HAS_OFS3 (0) #define BSP_FEATURE_BSP_HAS_SCE5 (0) // Feature not available on this MCU #define BSP_FEATURE_BSP_HAS_SCE_ON_RA2 (1) -#define BSP_FEATURE_BSP_HAS_SCISPI_CLOCK (0) // Feature not available on this MCU TODO_CHECK_FEATURE +#define BSP_FEATURE_BSP_HAS_SCISPI_CLOCK (0) // Feature not available on this MCU #define BSP_FEATURE_BSP_HAS_SCI_CLOCK (0) #define BSP_FEATURE_BSP_HAS_SDADC_CLOCK (0) #define BSP_FEATURE_BSP_HAS_SECURITY_MPU (1U) @@ -182,9 +181,29 @@ #define BSP_FEATURE_CGC_LOW_VOLTAGE_MAX_FREQ_HZ (0U) // This MCU does not have Low Voltage Mode #define BSP_FEATURE_CGC_MIDDLE_SPEED_MAX_FREQ_HZ (24000000U) #define BSP_FEATURE_CGC_MOCO_STABILIZATION_MAX_US (1U) -#define BSP_FEATURE_CGC_MODRV_MASK (0x08U) -#define BSP_FEATURE_CGC_MODRV_SHIFT (0x3U) -#define BSP_FEATURE_CGC_PLLCCR_MAX_HZ (0U) +#define BSP_FEATURE_CGC_MODRV_MASK (R_SYSTEM_MOMCR_MODRV1_Msk) +#define BSP_FEATURE_CGC_MODRV_SHIFT (R_SYSTEM_MOMCR_MODRV1_Pos) +#define BSP_FEATURE_CGC_PLL_OUT_MAX_HZ (0U) // Feature not available on this MCU +#define BSP_FEATURE_CGC_PLL_OUT_P_MAX_HZ (0U) // Feature not available on this MCU +#define BSP_FEATURE_CGC_PLL_OUT_Q_MAX_HZ (0U) // Feature not available on this MCU +#define BSP_FEATURE_CGC_PLL_OUT_R_MAX_HZ (0U) // Feature not available on this MCU +#define BSP_FEATURE_CGC_PLL_OUT_MIN_HZ (0U) // Feature not available on this MCU +#define BSP_FEATURE_CGC_PLL_OUT_P_MIN_HZ (0U) // Feature not available on this MCU +#define BSP_FEATURE_CGC_PLL_OUT_Q_MIN_HZ (0U) // Feature not available on this MCU +#define BSP_FEATURE_CGC_PLL_OUT_R_MIN_HZ (0U) // Feature not available on this MCU +#define BSP_FEATURE_CGC_PLL_SRC_MAX_HZ (0U) // Feature not available on this MCU +#define BSP_FEATURE_CGC_PLL_SRC_MIN_HZ (0U) // Feature not available on this MCU +#define BSP_FEATURE_CGC_PLL2_OUT_MAX_HZ (0U) // Feature not available on this MCU +#define BSP_FEATURE_CGC_PLL2_OUT_P_MAX_HZ (0U) // Feature not available on this MCU +#define BSP_FEATURE_CGC_PLL2_OUT_Q_MAX_HZ (0U) // Feature not available on this MCU +#define BSP_FEATURE_CGC_PLL2_OUT_R_MAX_HZ (0U) // Feature not available on this MCU +#define BSP_FEATURE_CGC_PLL2_OUT_MIN_HZ (0U) // Feature not available on this MCU +#define BSP_FEATURE_CGC_PLL2_OUT_P_MIN_HZ (0U) // Feature not available on this MCU +#define BSP_FEATURE_CGC_PLL2_OUT_Q_MIN_HZ (0U) // Feature not available on this MCU +#define BSP_FEATURE_CGC_PLL2_OUT_R_MIN_HZ (0U) // Feature not available on this MCU +#define BSP_FEATURE_CGC_PLL2_SRC_MAX_HZ (0U) // Feature not available on this MCU +#define BSP_FEATURE_CGC_PLL2_SRC_MIN_HZ (0U) // Feature not available on this MCU + #define BSP_FEATURE_CGC_PLLCCR_TYPE (0U) #define BSP_FEATURE_CGC_PLLCCR_VCO_MAX_HZ (0U) #define BSP_FEATURE_CGC_PLLCCR_WAIT_US (0U) // This MCU does not have PLL @@ -201,14 +220,14 @@ #define BSP_FEATURE_CRYPTO_HAS_ECC (0) // #define BSP_FEATURE_CRYPTO_HAS_ECC_WRAPPED (0) // #define BSP_FEATURE_CRYPTO_HAS_HASH (0) // -#define BSP_FEATURE_CRYPTO_HAS_NEW_PROCS (0) // Feature not available on this MCU TODO_CHECK_FEATURE +#define BSP_FEATURE_CRYPTO_HAS_NEW_PROCS (0) // Feature not available on this MCU #define BSP_FEATURE_CRYPTO_HAS_RSA (0) // #define BSP_FEATURE_CRYPTO_HAS_RSA_WRAPPED (0) // #define BSP_FEATURE_CRYPTO_AES_IP_VERSION (1) #define BSP_FEATURE_CRYPTO_HAS_SCE5 (0) #define BSP_FEATURE_CRYPTO_HAS_SCE5B (0) #define BSP_FEATURE_CRYPTO_HAS_SCE7 (0) -#define BSP_FEATURE_CRYPTO_HAS_SCE9 (0) // Feature not available on this MCU TODO_CHECK_FEATURE +#define BSP_FEATURE_CRYPTO_HAS_SCE9 (0) // Feature not available on this MCU #define BSP_FEATURE_CTSU_CTSUCHAC_REGISTER_COUNT (0) #define BSP_FEATURE_CTSU_CTSUCHTRC_REGISTER_COUNT (0) @@ -241,7 +260,7 @@ #define BSP_FEATURE_ETHER_FIFO_DEPTH (0) // Feature not available on this MCU #define BSP_FEATURE_ETHER_MAX_CHANNELS (0) // Feature not available on this MCU -#define BSP_FEATURE_ETHER_SUPPORTS_TZ_SECURE (0) // Feature not available on this MCU TODO_CHECK_FEATURE +#define BSP_FEATURE_ETHER_SUPPORTS_TZ_SECURE (0) // Feature not available on this MCU #define BSP_FEATURE_FLASH_CODE_FLASH_START (0x0U) #define BSP_FEATURE_FLASH_DATA_FLASH_START (0x40100000U) @@ -295,9 +314,9 @@ #define BSP_FEATURE_IIC_BUS_FREE_TIME_MULTIPLIER (3U) #define BSP_FEATURE_IIC_B_FAST_MODE_PLUS (1U) #define BSP_FEATURE_IIC_B_VALID_CHANNEL_MASK (0x01) -#define BSP_FEATURE_IIC_FAST_MODE_PLUS (0) // Feature not available on this MCU TODO_CHECK_FEATURE -#define BSP_FEATURE_IIC_VALID_CHANNEL_MASK (0) // Feature not available on this MCU TODO_CHECK_FEATURE -#define BSP_FEATURE_IIC_VERSION (0) // Feature not available on this MCU TODO_CHECK_FEATURE +#define BSP_FEATURE_IIC_FAST_MODE_PLUS (0) // Feature not available on this MCU +#define BSP_FEATURE_IIC_VALID_CHANNEL_MASK (0) // Feature not available on this MCU +#define BSP_FEATURE_IIC_VERSION (0) // Feature not available on this MCU #define BSP_FEATURE_IOPORT_ELC_PORTS (0x0006U) #define BSP_FEATURE_IOPORT_HAS_ETHERNET (0U) @@ -332,6 +351,7 @@ #define BSP_FEATURE_LPM_STANDBY_MOCO_REQUIRED (0U) #define BSP_FEATURE_LVD_HAS_DIGITAL_FILTER (0U) +#define BSP_FEATURE_LVD_HAS_EXT_MONITOR (0U) #define BSP_FEATURE_LVD_HAS_LVDLVLR (1) #define BSP_FEATURE_LVD_MONITOR_1_HI_THRESHOLD (LVD_THRESHOLD_MONITOR_1_LEVEL_4_29V) // 4.29V #define BSP_FEATURE_LVD_MONITOR_1_LOW_THRESHOLD (LVD_THRESHOLD_MONITOR_1_LEVEL_1_65V) // 1.65V @@ -369,6 +389,7 @@ #define BSP_FEATURE_SCI_ADDRESS_MATCH_CHANNELS (BSP_FEATURE_SCI_CHANNELS) #define BSP_FEATURE_SCI_CHANNELS (0x200U) #define BSP_FEATURE_SCI_CLOCK (FSP_PRIV_CLOCK_PCLKB) +#define BSP_FEATURE_SCI_SPI_SCKSEL_VALUE (0U) // Feature not available on this MCU #define BSP_FEATURE_SCI_UART_CSTPEN_CHANNELS (0x0U) #define BSP_FEATURE_SCI_UART_FIFO_CHANNELS (0x0U) #define BSP_FEATURE_SCI_UART_FIFO_DEPTH (0U) @@ -385,7 +406,9 @@ #define BSP_FEATURE_SLCDC_HAS_8_TIME_SLICE (0) // Feature not available on this MCU #define BSP_FEATURE_SLCDC_HAS_INTERNAL_VOLT_GEN (0) // Feature not available on this MCU #define BSP_FEATURE_SLCDC_MAX_NUM_SEG (0) // Feature not available on this MCU -#define BSP_FEATURE_SLCDC_HAS_VL1SEL (0) +#define BSP_FEATURE_SLCDC_HAS_VL1SEL (0) // Feature not available on this MCU +#define BSP_FEATURE_SLCDC_CONTRAST_MAX_4BIAS (0) // Feature not available on this MCU +#define BSP_FEATURE_SLCDC_CONTRAST_MAX (0) // Feature not available on this MCU #define BSP_FEATURE_SPI_CLK (FSP_PRIV_CLOCK_PCLKB) #define BSP_FEATURE_SPI_HAS_SPCR3 (0) // Feature not available on this MCU diff --git a/ra/fsp/src/bsp/mcu/ra2l1/bsp_feature.h b/ra/fsp/src/bsp/mcu/ra2l1/bsp_feature.h index 26bba1fdc..9b421477b 100644 --- a/ra/fsp/src/bsp/mcu/ra2l1/bsp_feature.h +++ b/ra/fsp/src/bsp/mcu/ra2l1/bsp_feature.h @@ -82,14 +82,13 @@ #define BSP_FEATURE_ADC_VALID_UNIT_MASK (1U) #define BSP_FEATURE_AGT_AGTW_CHANNEL_COUNT (0) -#define BSP_FEATURE_AGT_MAX_CHANNEL_NUM (1) +#define BSP_FEATURE_AGT_AGT_CHANNEL_COUNT (2) #define BSP_FEATURE_AGT_USE_AGTIOSEL_ALT (0) // Indicates use of AGTIOSEL_ALT instead of AGTIOSEL #define BSP_FEATURE_AGT_VALID_CHANNEL_MASK (0x03) #define BSP_FEATURE_BSP_FLASH_CACHE (0) #define BSP_FEATURE_BSP_FLASH_CACHE_DISABLE_OPM (0U) #define BSP_FEATURE_BSP_FLASH_PREFETCH_BUFFER (1) -#define BSP_FEATURE_BSP_HAS_ADC_CLOCK (0) #define BSP_FEATURE_BSP_HAS_CANFD_CLOCK (0) // Feature not available on this MCU #define BSP_FEATURE_BSP_HAS_CEC_CLOCK (0) // Feature not available on this MCU #define BSP_FEATURE_BSP_HAS_CLOCK_SUPPLY_TYPEB (1U) @@ -107,7 +106,7 @@ #define BSP_FEATURE_BSP_HAS_OFS3 (0) #define BSP_FEATURE_BSP_HAS_SCE5 (0) // Feature not available on this MCU #define BSP_FEATURE_BSP_HAS_SCE_ON_RA2 (1) -#define BSP_FEATURE_BSP_HAS_SCISPI_CLOCK (0) // Feature not available on this MCU TODO_CHECK_FEATURE +#define BSP_FEATURE_BSP_HAS_SCISPI_CLOCK (0) // Feature not available on this MCU #define BSP_FEATURE_BSP_HAS_SCI_CLOCK (0) #define BSP_FEATURE_BSP_HAS_SDADC_CLOCK (0) #define BSP_FEATURE_BSP_HAS_SECURITY_MPU (1U) @@ -182,12 +181,32 @@ #define BSP_FEATURE_CGC_LOW_VOLTAGE_MAX_FREQ_HZ (0U) // This MCU does not have Low Voltage Mode #define BSP_FEATURE_CGC_MIDDLE_SPEED_MAX_FREQ_HZ (24000000U) // This MCU does have Middle Speed Mode, up to 24 MHz #define BSP_FEATURE_CGC_MOCO_STABILIZATION_MAX_US (1U) -#define BSP_FEATURE_CGC_MODRV_MASK (0x08U) -#define BSP_FEATURE_CGC_MODRV_SHIFT (0x3U) -#define BSP_FEATURE_CGC_PLLCCR_MAX_HZ (0U) +#define BSP_FEATURE_CGC_MODRV_MASK (R_SYSTEM_MOMCR_MODRV1_Msk) +#define BSP_FEATURE_CGC_MODRV_SHIFT (R_SYSTEM_MOMCR_MODRV1_Pos) +#define BSP_FEATURE_CGC_PLL_OUT_MAX_HZ (0U) // Feature not available on this MCU +#define BSP_FEATURE_CGC_PLL_OUT_P_MAX_HZ (0U) // Feature not available on this MCU +#define BSP_FEATURE_CGC_PLL_OUT_Q_MAX_HZ (0U) // Feature not available on this MCU +#define BSP_FEATURE_CGC_PLL_OUT_R_MAX_HZ (0U) // Feature not available on this MCU +#define BSP_FEATURE_CGC_PLL_OUT_MIN_HZ (0U) // Feature not available on this MCU +#define BSP_FEATURE_CGC_PLL_OUT_P_MIN_HZ (0U) // Feature not available on this MCU +#define BSP_FEATURE_CGC_PLL_OUT_Q_MIN_HZ (0U) // Feature not available on this MCU +#define BSP_FEATURE_CGC_PLL_OUT_R_MIN_HZ (0U) // Feature not available on this MCU +#define BSP_FEATURE_CGC_PLL_SRC_MAX_HZ (0U) // Feature not available on this MCU +#define BSP_FEATURE_CGC_PLL_SRC_MIN_HZ (0U) // Feature not available on this MCU +#define BSP_FEATURE_CGC_PLL2_OUT_MAX_HZ (0U) // Feature not available on this MCU +#define BSP_FEATURE_CGC_PLL2_OUT_P_MAX_HZ (0U) // Feature not available on this MCU +#define BSP_FEATURE_CGC_PLL2_OUT_Q_MAX_HZ (0U) // Feature not available on this MCU +#define BSP_FEATURE_CGC_PLL2_OUT_R_MAX_HZ (0U) // Feature not available on this MCU +#define BSP_FEATURE_CGC_PLL2_OUT_MIN_HZ (0U) // Feature not available on this MCU +#define BSP_FEATURE_CGC_PLL2_OUT_P_MIN_HZ (0U) // Feature not available on this MCU +#define BSP_FEATURE_CGC_PLL2_OUT_Q_MIN_HZ (0U) // Feature not available on this MCU +#define BSP_FEATURE_CGC_PLL2_OUT_R_MIN_HZ (0U) // Feature not available on this MCU +#define BSP_FEATURE_CGC_PLL2_SRC_MAX_HZ (0U) // Feature not available on this MCU +#define BSP_FEATURE_CGC_PLL2_SRC_MIN_HZ (0U) // Feature not available on this MCU + #define BSP_FEATURE_CGC_PLLCCR_TYPE (0U) #define BSP_FEATURE_CGC_PLLCCR_VCO_MAX_HZ (0U) -#define BSP_FEATURE_CGC_PLLCCR_WAIT_US (0U) // This MCU does not have PLL +#define BSP_FEATURE_CGC_PLLCCR_WAIT_US (0U) // This MCU does not have PLL #define BSP_FEATURE_CGC_SCKDIVCR_BCLK_MATCHES_PCLKB (0U) #define BSP_FEATURE_CGC_SODRV_MASK (0x03U) #define BSP_FEATURE_CGC_SODRV_SHIFT (0x0U) @@ -201,14 +220,14 @@ #define BSP_FEATURE_CRYPTO_HAS_ECC (0) #define BSP_FEATURE_CRYPTO_HAS_ECC_WRAPPED (0) #define BSP_FEATURE_CRYPTO_HAS_HASH (0) -#define BSP_FEATURE_CRYPTO_HAS_NEW_PROCS (0) // Feature not available on this MCU TODO_CHECK_FEATURE +#define BSP_FEATURE_CRYPTO_HAS_NEW_PROCS (0) // Feature not available on this MCU #define BSP_FEATURE_CRYPTO_HAS_RSA (0) #define BSP_FEATURE_CRYPTO_HAS_RSA_WRAPPED (0) #define BSP_FEATURE_CRYPTO_AES_IP_VERSION (1) #define BSP_FEATURE_CRYPTO_HAS_SCE5 (0) #define BSP_FEATURE_CRYPTO_HAS_SCE5B (0) #define BSP_FEATURE_CRYPTO_HAS_SCE7 (0) -#define BSP_FEATURE_CRYPTO_HAS_SCE9 (0) // Feature not available on this MCU TODO_CHECK_FEATURE +#define BSP_FEATURE_CRYPTO_HAS_SCE9 (0) // Feature not available on this MCU #define BSP_FEATURE_CTSU_CTSUCHAC_REGISTER_COUNT (4U) #define BSP_FEATURE_CTSU_CTSUCHTRC_REGISTER_COUNT (4U) @@ -241,7 +260,7 @@ #define BSP_FEATURE_ETHER_FIFO_DEPTH (0) // Feature not available on this MCU #define BSP_FEATURE_ETHER_MAX_CHANNELS (0) // Feature not available on this MCU -#define BSP_FEATURE_ETHER_SUPPORTS_TZ_SECURE (0) // Feature not available on this MCU TODO_CHECK_FEATURE +#define BSP_FEATURE_ETHER_SUPPORTS_TZ_SECURE (0) // Feature not available on this MCU #define BSP_FEATURE_FLASH_CODE_FLASH_START (0x0U) #define BSP_FEATURE_FLASH_DATA_FLASH_START (0x40100000U) @@ -293,11 +312,11 @@ #define BSP_FEATURE_ICU_FIXED_IELSR_COUNT (0U) #define BSP_FEATURE_IIC_BUS_FREE_TIME_MULTIPLIER (0U) -#define BSP_FEATURE_IIC_B_FAST_MODE_PLUS (0) // Feature not available on this MCU TODO_CHECK_FEATURE -#define BSP_FEATURE_IIC_B_VALID_CHANNEL_MASK (0) // Feature not available on this MCU TODO_CHECK_FEATURE +#define BSP_FEATURE_IIC_B_FAST_MODE_PLUS (0) // Feature not available on this MCU +#define BSP_FEATURE_IIC_B_VALID_CHANNEL_MASK (0) // Feature not available on this MCU #define BSP_FEATURE_IIC_FAST_MODE_PLUS (0U) #define BSP_FEATURE_IIC_VALID_CHANNEL_MASK (0x03) -#define BSP_FEATURE_IIC_VERSION (0) // Feature not available on this MCU TODO_CHECK_FEATURE +#define BSP_FEATURE_IIC_VERSION (0) // Feature not available on this MCU #define BSP_FEATURE_IOPORT_ELC_PORTS (0x0006U) #define BSP_FEATURE_IOPORT_HAS_ETHERNET (0U) @@ -332,6 +351,7 @@ #define BSP_FEATURE_LPM_STANDBY_MOCO_REQUIRED (0U) #define BSP_FEATURE_LVD_HAS_DIGITAL_FILTER (0U) +#define BSP_FEATURE_LVD_HAS_EXT_MONITOR (0U) #define BSP_FEATURE_LVD_HAS_LVDLVLR (1U) #define BSP_FEATURE_LVD_MONITOR_1_HI_THRESHOLD (LVD_THRESHOLD_MONITOR_1_LEVEL_4_29V) // 4.29V #define BSP_FEATURE_LVD_MONITOR_1_LOW_THRESHOLD (LVD_THRESHOLD_MONITOR_1_LEVEL_1_65V) // 1.65V @@ -369,6 +389,7 @@ #define BSP_FEATURE_SCI_ADDRESS_MATCH_CHANNELS (BSP_FEATURE_SCI_CHANNELS) #define BSP_FEATURE_SCI_CHANNELS (0x20FU) #define BSP_FEATURE_SCI_CLOCK (FSP_PRIV_CLOCK_PCLKB) +#define BSP_FEATURE_SCI_SPI_SCKSEL_VALUE (0U) // Feature not available on this MCU #define BSP_FEATURE_SCI_UART_CSTPEN_CHANNELS (0x0U) #define BSP_FEATURE_SCI_UART_FIFO_CHANNELS (0x1U) #define BSP_FEATURE_SCI_UART_FIFO_DEPTH (16U) @@ -385,7 +406,9 @@ #define BSP_FEATURE_SLCDC_HAS_8_TIME_SLICE (0) // Feature not available on this MCU #define BSP_FEATURE_SLCDC_HAS_INTERNAL_VOLT_GEN (0) // Feature not available on this MCU #define BSP_FEATURE_SLCDC_MAX_NUM_SEG (0) // Feature not available on this MCU -#define BSP_FEATURE_SLCDC_HAS_VL1SEL (0) +#define BSP_FEATURE_SLCDC_HAS_VL1SEL (0) // Feature not available on this MCU +#define BSP_FEATURE_SLCDC_CONTRAST_MAX_4BIAS (0) // Feature not available on this MCU +#define BSP_FEATURE_SLCDC_CONTRAST_MAX (0) // Feature not available on this MCU #define BSP_FEATURE_SPI_CLK (FSP_PRIV_CLOCK_PCLKB) #define BSP_FEATURE_SPI_HAS_SPCR3 (0U) diff --git a/ra/fsp/src/bsp/mcu/ra4e1/bsp_feature.h b/ra/fsp/src/bsp/mcu/ra4e1/bsp_feature.h index 688721d80..c14e4a0d2 100644 --- a/ra/fsp/src/bsp/mcu/ra4e1/bsp_feature.h +++ b/ra/fsp/src/bsp/mcu/ra4e1/bsp_feature.h @@ -86,14 +86,13 @@ #define BSP_FEATURE_ADC_VALID_UNIT_MASK (1U) #define BSP_FEATURE_AGT_AGTW_CHANNEL_COUNT (0) -#define BSP_FEATURE_AGT_MAX_CHANNEL_NUM (5) +#define BSP_FEATURE_AGT_AGT_CHANNEL_COUNT (5) #define BSP_FEATURE_AGT_USE_AGTIOSEL_ALT (0) // Indicates use of AGTIOSEL_ALT instead of AGTIOSEL #define BSP_FEATURE_AGT_VALID_CHANNEL_MASK (0x2F) #define BSP_FEATURE_BSP_FLASH_CACHE (1) #define BSP_FEATURE_BSP_FLASH_CACHE_DISABLE_OPM (0U) #define BSP_FEATURE_BSP_FLASH_PREFETCH_BUFFER (0) -#define BSP_FEATURE_BSP_HAS_ADC_CLOCK (0) #define BSP_FEATURE_BSP_HAS_CANFD_CLOCK (0) // Feature not available on this MCU #define BSP_FEATURE_BSP_HAS_CEC_CLOCK (0) // Feature not available on this MCU #define BSP_FEATURE_BSP_HAS_CLOCK_SUPPLY_TYPEB (0U) @@ -111,7 +110,7 @@ #define BSP_FEATURE_BSP_HAS_OFS3 (0) #define BSP_FEATURE_BSP_HAS_SCE5 (0) // Feature not available on this MCU #define BSP_FEATURE_BSP_HAS_SCE_ON_RA2 (0) // Feature not available on this MCU -#define BSP_FEATURE_BSP_HAS_SCISPI_CLOCK (0) // Feature not available on this MCU TODO_CHECK_FEATURE +#define BSP_FEATURE_BSP_HAS_SCISPI_CLOCK (0) // Feature not available on this MCU #define BSP_FEATURE_BSP_HAS_SCI_CLOCK (0) #define BSP_FEATURE_BSP_HAS_SDADC_CLOCK (0) #define BSP_FEATURE_BSP_HAS_SECURITY_MPU (0U) @@ -186,9 +185,29 @@ #define BSP_FEATURE_CGC_LOW_VOLTAGE_MAX_FREQ_HZ (0U) // This MCU does not have Low Voltage Mode #define BSP_FEATURE_CGC_MIDDLE_SPEED_MAX_FREQ_HZ (0U) // This MCU does not have Middle Speed Mode #define BSP_FEATURE_CGC_MOCO_STABILIZATION_MAX_US (15U) -#define BSP_FEATURE_CGC_MODRV_MASK (0x30U) -#define BSP_FEATURE_CGC_MODRV_SHIFT (0x4U) -#define BSP_FEATURE_CGC_PLLCCR_MAX_HZ (200000000U) +#define BSP_FEATURE_CGC_MODRV_MASK (R_SYSTEM_MOMCR_MODRV0_Msk) +#define BSP_FEATURE_CGC_MODRV_SHIFT (R_SYSTEM_MOMCR_MODRV0_Pos) +#define BSP_FEATURE_CGC_PLL_OUT_MAX_HZ (200000000U) +#define BSP_FEATURE_CGC_PLL_OUT_P_MAX_HZ (0U) // Feature not available on this MCU +#define BSP_FEATURE_CGC_PLL_OUT_Q_MAX_HZ (0U) // Feature not available on this MCU +#define BSP_FEATURE_CGC_PLL_OUT_R_MAX_HZ (0U) // Feature not available on this MCU +#define BSP_FEATURE_CGC_PLL_OUT_MIN_HZ (100000000U) +#define BSP_FEATURE_CGC_PLL_OUT_P_MIN_HZ (0U) // Feature not available on this MCU +#define BSP_FEATURE_CGC_PLL_OUT_Q_MIN_HZ (0U) // Feature not available on this MCU +#define BSP_FEATURE_CGC_PLL_OUT_R_MIN_HZ (0U) // Feature not available on this MCU +#define BSP_FEATURE_CGC_PLL_SRC_MAX_HZ (24000000U) +#define BSP_FEATURE_CGC_PLL_SRC_MIN_HZ (8000000U) +#define BSP_FEATURE_CGC_PLL2_OUT_MAX_HZ (240000000U) +#define BSP_FEATURE_CGC_PLL2_OUT_P_MAX_HZ (0U) // Feature not available on this MCU +#define BSP_FEATURE_CGC_PLL2_OUT_Q_MAX_HZ (0U) // Feature not available on this MCU +#define BSP_FEATURE_CGC_PLL2_OUT_R_MAX_HZ (0U) // Feature not available on this MCU +#define BSP_FEATURE_CGC_PLL2_OUT_MIN_HZ (120000000U) +#define BSP_FEATURE_CGC_PLL2_OUT_P_MIN_HZ (0U) // Feature not available on this MCU +#define BSP_FEATURE_CGC_PLL2_OUT_Q_MIN_HZ (0U) // Feature not available on this MCU +#define BSP_FEATURE_CGC_PLL2_OUT_R_MIN_HZ (0U) // Feature not available on this MCU +#define BSP_FEATURE_CGC_PLL2_SRC_MAX_HZ (24000000U) +#define BSP_FEATURE_CGC_PLL2_SRC_MIN_HZ (8000000U) + #define BSP_FEATURE_CGC_PLLCCR_TYPE (1U) #define BSP_FEATURE_CGC_PLLCCR_VCO_MAX_HZ (200000000U) #define BSP_FEATURE_CGC_PLLCCR_WAIT_US (0U) // No wait between setting PLLCCR and clearing PLLSTP @@ -205,7 +224,7 @@ #define BSP_FEATURE_CRYPTO_HAS_ECC (0) #define BSP_FEATURE_CRYPTO_HAS_ECC_WRAPPED (0) #define BSP_FEATURE_CRYPTO_HAS_HASH (0) -#define BSP_FEATURE_CRYPTO_HAS_NEW_PROCS (0) // Feature not available on this MCU TODO_CHECK_FEATURE +#define BSP_FEATURE_CRYPTO_HAS_NEW_PROCS (0) // Feature not available on this MCU #define BSP_FEATURE_CRYPTO_HAS_RSA (0) #define BSP_FEATURE_CRYPTO_HAS_RSA_WRAPPED (0) #define BSP_FEATURE_CRYPTO_AES_IP_VERSION (0) @@ -245,7 +264,7 @@ #define BSP_FEATURE_ETHER_FIFO_DEPTH (0) // Feature not available on this MCU #define BSP_FEATURE_ETHER_MAX_CHANNELS (0) // Feature not available on this MCU -#define BSP_FEATURE_ETHER_SUPPORTS_TZ_SECURE (0) // Feature not available on this MCU TODO_CHECK_FEATURE +#define BSP_FEATURE_ETHER_SUPPORTS_TZ_SECURE (0) // Feature not available on this MCU #define BSP_FEATURE_FLASH_CODE_FLASH_START (0x0U) #define BSP_FEATURE_FLASH_DATA_FLASH_START (0x08000000U) @@ -297,11 +316,11 @@ #define BSP_FEATURE_ICU_FIXED_IELSR_COUNT (0U) #define BSP_FEATURE_IIC_BUS_FREE_TIME_MULTIPLIER (0U) -#define BSP_FEATURE_IIC_B_FAST_MODE_PLUS (0) // Feature not available on this MCU TODO_CHECK_FEATURE -#define BSP_FEATURE_IIC_B_VALID_CHANNEL_MASK (0) // Feature not available on this MCU TODO_CHECK_FEATURE +#define BSP_FEATURE_IIC_B_FAST_MODE_PLUS (0) // Feature not available on this MCU +#define BSP_FEATURE_IIC_B_VALID_CHANNEL_MASK (0) // Feature not available on this MCU #define BSP_FEATURE_IIC_FAST_MODE_PLUS (1U) #define BSP_FEATURE_IIC_VALID_CHANNEL_MASK (0x01) -#define BSP_FEATURE_IIC_VERSION (0) // Feature not available on this MCU TODO_CHECK_FEATURE +#define BSP_FEATURE_IIC_VERSION (0) // Feature not available on this MCU #define BSP_FEATURE_IOPORT_ELC_PORTS (0x001EU) #define BSP_FEATURE_IOPORT_HAS_ETHERNET (0U) @@ -336,6 +355,7 @@ #define BSP_FEATURE_LPM_STANDBY_MOCO_REQUIRED (0U) #define BSP_FEATURE_LVD_HAS_DIGITAL_FILTER (1U) +#define BSP_FEATURE_LVD_HAS_EXT_MONITOR (0U) #define BSP_FEATURE_LVD_HAS_LVDLVLR (0U) #define BSP_FEATURE_LVD_MONITOR_1_HI_THRESHOLD (LVD_THRESHOLD_MONITOR_1_LEVEL_2_99V) // 2.99V #define BSP_FEATURE_LVD_MONITOR_1_LOW_THRESHOLD (LVD_THRESHOLD_MONITOR_1_LEVEL_2_85V) // 2.85V @@ -373,6 +393,7 @@ #define BSP_FEATURE_SCI_ADDRESS_MATCH_CHANNELS (0x219U) #define BSP_FEATURE_SCI_CHANNELS (0x219U) #define BSP_FEATURE_SCI_CLOCK (FSP_PRIV_CLOCK_PCLKA) +#define BSP_FEATURE_SCI_SPI_SCKSEL_VALUE (0U) // Feature not available on this MCU #define BSP_FEATURE_SCI_UART_CSTPEN_CHANNELS (0x0219U) // Channel 0, channel 3, Channel 4, channel 9 have CSTPEN feature #define BSP_FEATURE_SCI_UART_FIFO_CHANNELS (0x219U) #define BSP_FEATURE_SCI_UART_FIFO_DEPTH (16U) @@ -389,7 +410,9 @@ #define BSP_FEATURE_SLCDC_HAS_8_TIME_SLICE (0) // Feature not available on this MCU #define BSP_FEATURE_SLCDC_HAS_INTERNAL_VOLT_GEN (0) // Feature not available on this MCU #define BSP_FEATURE_SLCDC_MAX_NUM_SEG (0) // Feature not available on this MCU -#define BSP_FEATURE_SLCDC_HAS_VL1SEL (0) +#define BSP_FEATURE_SLCDC_HAS_VL1SEL (0) // Feature not available on this MCU +#define BSP_FEATURE_SLCDC_CONTRAST_MAX_4BIAS (0) // Feature not available on this MCU +#define BSP_FEATURE_SLCDC_CONTRAST_MAX (0) // Feature not available on this MCU #define BSP_FEATURE_SPI_CLK (FSP_PRIV_CLOCK_PCLKA) #define BSP_FEATURE_SPI_HAS_SPCR3 (1U) diff --git a/ra/fsp/src/bsp/mcu/ra4e2/bsp_feature.h b/ra/fsp/src/bsp/mcu/ra4e2/bsp_feature.h index 1e19a2db8..3f0d861ba 100644 --- a/ra/fsp/src/bsp/mcu/ra4e2/bsp_feature.h +++ b/ra/fsp/src/bsp/mcu/ra4e2/bsp_feature.h @@ -86,14 +86,13 @@ #define BSP_FEATURE_ADC_VALID_UNIT_MASK (1U) #define BSP_FEATURE_AGT_AGTW_CHANNEL_COUNT (2) -#define BSP_FEATURE_AGT_MAX_CHANNEL_NUM (1) +#define BSP_FEATURE_AGT_AGT_CHANNEL_COUNT (0) #define BSP_FEATURE_AGT_USE_AGTIOSEL_ALT (0) // Indicates use of AGTIOSEL_ALT instead of AGTIOSEL #define BSP_FEATURE_AGT_VALID_CHANNEL_MASK (0x3U) #define BSP_FEATURE_BSP_FLASH_CACHE (1) #define BSP_FEATURE_BSP_FLASH_CACHE_DISABLE_OPM (0U) #define BSP_FEATURE_BSP_FLASH_PREFETCH_BUFFER (0) -#define BSP_FEATURE_BSP_HAS_ADC_CLOCK (0) #define BSP_FEATURE_BSP_HAS_CANFD_CLOCK (1) #define BSP_FEATURE_BSP_HAS_CEC_CLOCK (1) #define BSP_FEATURE_BSP_HAS_CLOCK_SUPPLY_TYPEB (0U) @@ -185,9 +184,29 @@ #define BSP_FEATURE_CGC_LOW_VOLTAGE_MAX_FREQ_HZ (0U) // This MCU does not have Low Voltage Mode #define BSP_FEATURE_CGC_MIDDLE_SPEED_MAX_FREQ_HZ (0U) // This MCU does not have Middle Speed Mode #define BSP_FEATURE_CGC_MOCO_STABILIZATION_MAX_US (15U) -#define BSP_FEATURE_CGC_MODRV_MASK (0x30U) -#define BSP_FEATURE_CGC_MODRV_SHIFT (0x4U) -#define BSP_FEATURE_CGC_PLLCCR_MAX_HZ (240000000U) +#define BSP_FEATURE_CGC_MODRV_MASK (R_SYSTEM_MOMCR_MODRV0_Msk) +#define BSP_FEATURE_CGC_MODRV_SHIFT (R_SYSTEM_MOMCR_MODRV0_Pos) +#define BSP_FEATURE_CGC_PLL_OUT_MAX_HZ (240000000U) +#define BSP_FEATURE_CGC_PLL_OUT_P_MAX_HZ (0U) // Feature not available on this MCU +#define BSP_FEATURE_CGC_PLL_OUT_Q_MAX_HZ (0U) // Feature not available on this MCU +#define BSP_FEATURE_CGC_PLL_OUT_R_MAX_HZ (0U) // Feature not available on this MCU +#define BSP_FEATURE_CGC_PLL_OUT_MIN_HZ (100000000U) +#define BSP_FEATURE_CGC_PLL_OUT_P_MIN_HZ (0U) // Feature not available on this MCU +#define BSP_FEATURE_CGC_PLL_OUT_Q_MIN_HZ (0U) // Feature not available on this MCU +#define BSP_FEATURE_CGC_PLL_OUT_R_MIN_HZ (0U) // Feature not available on this MCU +#define BSP_FEATURE_CGC_PLL_SRC_MAX_HZ (24000000U) +#define BSP_FEATURE_CGC_PLL_SRC_MIN_HZ (8000000U) +#define BSP_FEATURE_CGC_PLL2_OUT_MAX_HZ (0U) // Feature not available on this MCU +#define BSP_FEATURE_CGC_PLL2_OUT_P_MAX_HZ (0U) // Feature not available on this MCU +#define BSP_FEATURE_CGC_PLL2_OUT_Q_MAX_HZ (0U) // Feature not available on this MCU +#define BSP_FEATURE_CGC_PLL2_OUT_R_MAX_HZ (0U) // Feature not available on this MCU +#define BSP_FEATURE_CGC_PLL2_OUT_MIN_HZ (0U) // Feature not available on this MCU +#define BSP_FEATURE_CGC_PLL2_OUT_P_MIN_HZ (0U) // Feature not available on this MCU +#define BSP_FEATURE_CGC_PLL2_OUT_Q_MIN_HZ (0U) // Feature not available on this MCU +#define BSP_FEATURE_CGC_PLL2_OUT_R_MIN_HZ (0U) // Feature not available on this MCU +#define BSP_FEATURE_CGC_PLL2_SRC_MAX_HZ (0U) // Feature not available on this MCU +#define BSP_FEATURE_CGC_PLL2_SRC_MIN_HZ (0U) // Feature not available on this MCU + #define BSP_FEATURE_CGC_PLLCCR_TYPE (1U) #define BSP_FEATURE_CGC_PLLCCR_VCO_MAX_HZ (240000000U) #define BSP_FEATURE_CGC_PLLCCR_WAIT_US (0U) // No wait between setting PLLCCR and clearing PLLSTP @@ -226,7 +245,7 @@ #define BSP_FEATURE_DAC_HAS_CHARGEPUMP (0U) #define BSP_FEATURE_DAC_HAS_DAVREFCR (0U) #define BSP_FEATURE_DAC_HAS_DA_AD_SYNCHRONIZE (1U) -#define BSP_FEATURE_DAC_HAS_INTERNAL_OUTPUT (1U) +#define BSP_FEATURE_DAC_HAS_INTERNAL_OUTPUT (0U) #define BSP_FEATURE_DAC_HAS_OUTPUT_AMPLIFIER (1U) #define BSP_FEATURE_DAC_MAX_CHANNELS (1U) @@ -334,6 +353,7 @@ #define BSP_FEATURE_LPM_STANDBY_MOCO_REQUIRED (0U) #define BSP_FEATURE_LVD_HAS_DIGITAL_FILTER (1U) +#define BSP_FEATURE_LVD_HAS_EXT_MONITOR (0U) #define BSP_FEATURE_LVD_HAS_LVDLVLR (0U) #define BSP_FEATURE_LVD_MONITOR_1_HI_THRESHOLD (LVD_THRESHOLD_MONITOR_1_LEVEL_2_99V) // 2.99V #define BSP_FEATURE_LVD_MONITOR_1_LOW_THRESHOLD (LVD_THRESHOLD_MONITOR_1_LEVEL_2_85V) // 2.85V @@ -371,6 +391,7 @@ #define BSP_FEATURE_SCI_ADDRESS_MATCH_CHANNELS (0x201U) #define BSP_FEATURE_SCI_CHANNELS (0x201U) #define BSP_FEATURE_SCI_CLOCK (FSP_PRIV_CLOCK_PCLKA) +#define BSP_FEATURE_SCI_SPI_SCKSEL_VALUE (0U) // Feature not available on this MCU #define BSP_FEATURE_SCI_UART_CSTPEN_CHANNELS (0x201U) #define BSP_FEATURE_SCI_UART_FIFO_CHANNELS (0x201U) #define BSP_FEATURE_SCI_UART_FIFO_DEPTH (16U) @@ -387,6 +408,9 @@ #define BSP_FEATURE_SLCDC_HAS_8_TIME_SLICE (0) // Feature not available on this MCU #define BSP_FEATURE_SLCDC_HAS_INTERNAL_VOLT_GEN (0) // Feature not available on this MCU #define BSP_FEATURE_SLCDC_MAX_NUM_SEG (0) // Feature not available on this MCU +#define BSP_FEATURE_SLCDC_HAS_VL1SEL (0) // Feature not available on this MCU +#define BSP_FEATURE_SLCDC_CONTRAST_MAX_4BIAS (0) // Feature not available on this MCU +#define BSP_FEATURE_SLCDC_CONTRAST_MAX (0) // Feature not available on this MCU #define BSP_FEATURE_SPI_CLK (FSP_PRIV_CLOCK_PCLKA) #define BSP_FEATURE_SPI_HAS_SPCR3 (1U) diff --git a/ra/fsp/src/bsp/mcu/ra4m1/bsp_feature.h b/ra/fsp/src/bsp/mcu/ra4m1/bsp_feature.h index 327d28ff4..45bd4b979 100644 --- a/ra/fsp/src/bsp/mcu/ra4m1/bsp_feature.h +++ b/ra/fsp/src/bsp/mcu/ra4m1/bsp_feature.h @@ -82,14 +82,13 @@ #define BSP_FEATURE_ADC_VALID_UNIT_MASK (1U) #define BSP_FEATURE_AGT_AGTW_CHANNEL_COUNT (0) -#define BSP_FEATURE_AGT_MAX_CHANNEL_NUM (1) +#define BSP_FEATURE_AGT_AGT_CHANNEL_COUNT (2) #define BSP_FEATURE_AGT_USE_AGTIOSEL_ALT (0) // Indicates use of AGTIOSEL_ALT instead of AGTIOSEL #define BSP_FEATURE_AGT_VALID_CHANNEL_MASK (0x03) #define BSP_FEATURE_BSP_FLASH_CACHE (1) #define BSP_FEATURE_BSP_FLASH_CACHE_DISABLE_OPM (1U) #define BSP_FEATURE_BSP_FLASH_PREFETCH_BUFFER (0) -#define BSP_FEATURE_BSP_HAS_ADC_CLOCK (0) #define BSP_FEATURE_BSP_HAS_CANFD_CLOCK (0) // Feature not available on this MCU #define BSP_FEATURE_BSP_HAS_CEC_CLOCK (0) // Feature not available on this MCU #define BSP_FEATURE_BSP_HAS_CLOCK_SUPPLY_TYPEB (0U) @@ -107,7 +106,7 @@ #define BSP_FEATURE_BSP_HAS_OFS3 (0) #define BSP_FEATURE_BSP_HAS_SCE5 (1) #define BSP_FEATURE_BSP_HAS_SCE_ON_RA2 (0) // Feature not available on this MCU -#define BSP_FEATURE_BSP_HAS_SCISPI_CLOCK (0) // Feature not available on this MCU TODO_CHECK_FEATURE +#define BSP_FEATURE_BSP_HAS_SCISPI_CLOCK (0) // Feature not available on this MCU #define BSP_FEATURE_BSP_HAS_SCI_CLOCK (0) #define BSP_FEATURE_BSP_HAS_SDADC_CLOCK (0) #define BSP_FEATURE_BSP_HAS_SECURITY_MPU (1U) @@ -184,9 +183,29 @@ #define BSP_FEATURE_CGC_LOW_VOLTAGE_MAX_FREQ_HZ (4000000U) // This MCU does have Low Voltage Mode, up to 4MHz #define BSP_FEATURE_CGC_MIDDLE_SPEED_MAX_FREQ_HZ (8000000U) // This MCU does have Middle Speed Mode, up to 8MHz #define BSP_FEATURE_CGC_MOCO_STABILIZATION_MAX_US (1U) -#define BSP_FEATURE_CGC_MODRV_MASK (0x08U) -#define BSP_FEATURE_CGC_MODRV_SHIFT (0x3U) -#define BSP_FEATURE_CGC_PLLCCR_MAX_HZ (0U) +#define BSP_FEATURE_CGC_MODRV_MASK (R_SYSTEM_MOMCR_MODRV1_Msk) +#define BSP_FEATURE_CGC_MODRV_SHIFT (R_SYSTEM_MOMCR_MODRV1_Pos) +#define BSP_FEATURE_CGC_PLL_OUT_MAX_HZ (64000000U) +#define BSP_FEATURE_CGC_PLL_OUT_P_MAX_HZ (0U) // Feature not available on this MCU +#define BSP_FEATURE_CGC_PLL_OUT_Q_MAX_HZ (0U) // Feature not available on this MCU +#define BSP_FEATURE_CGC_PLL_OUT_R_MAX_HZ (0U) // Feature not available on this MCU +#define BSP_FEATURE_CGC_PLL_OUT_MIN_HZ (24000000U) +#define BSP_FEATURE_CGC_PLL_OUT_P_MIN_HZ (0U) // Feature not available on this MCU +#define BSP_FEATURE_CGC_PLL_OUT_Q_MIN_HZ (0U) // Feature not available on this MCU +#define BSP_FEATURE_CGC_PLL_OUT_R_MIN_HZ (0U) // Feature not available on this MCU +#define BSP_FEATURE_CGC_PLL_SRC_MAX_HZ (12500000U) +#define BSP_FEATURE_CGC_PLL_SRC_MIN_HZ (4000000U) +#define BSP_FEATURE_CGC_PLL2_OUT_MAX_HZ (0U) // Feature not available on this MCU +#define BSP_FEATURE_CGC_PLL2_OUT_P_MAX_HZ (0U) // Feature not available on this MCU +#define BSP_FEATURE_CGC_PLL2_OUT_Q_MAX_HZ (0U) // Feature not available on this MCU +#define BSP_FEATURE_CGC_PLL2_OUT_R_MAX_HZ (0U) // Feature not available on this MCU +#define BSP_FEATURE_CGC_PLL2_OUT_MIN_HZ (0U) // Feature not available on this MCU +#define BSP_FEATURE_CGC_PLL2_OUT_P_MIN_HZ (0U) // Feature not available on this MCU +#define BSP_FEATURE_CGC_PLL2_OUT_Q_MIN_HZ (0U) // Feature not available on this MCU +#define BSP_FEATURE_CGC_PLL2_OUT_R_MIN_HZ (0U) // Feature not available on this MCU +#define BSP_FEATURE_CGC_PLL2_SRC_MAX_HZ (0U) // Feature not available on this MCU +#define BSP_FEATURE_CGC_PLL2_SRC_MIN_HZ (0U) // Feature not available on this MCU + #define BSP_FEATURE_CGC_PLLCCR_TYPE (2U) #define BSP_FEATURE_CGC_PLLCCR_VCO_MAX_HZ (0U) // This MCU does not use PLLCCR to set PLL frequency #define BSP_FEATURE_CGC_PLLCCR_WAIT_US (1U) // 1 us wait between setting PLLCCR and clearing PLLSTP @@ -203,14 +222,14 @@ #define BSP_FEATURE_CRYPTO_HAS_ECC (0) #define BSP_FEATURE_CRYPTO_HAS_ECC_WRAPPED (0) #define BSP_FEATURE_CRYPTO_HAS_HASH (0) -#define BSP_FEATURE_CRYPTO_HAS_NEW_PROCS (0) // Feature not available on this MCU TODO_CHECK_FEATURE +#define BSP_FEATURE_CRYPTO_HAS_NEW_PROCS (0) // Feature not available on this MCU #define BSP_FEATURE_CRYPTO_HAS_RSA (0) #define BSP_FEATURE_CRYPTO_HAS_RSA_WRAPPED (0) #define BSP_FEATURE_CRYPTO_AES_IP_VERSION (0) #define BSP_FEATURE_CRYPTO_HAS_SCE5 (1) #define BSP_FEATURE_CRYPTO_HAS_SCE5B (0) #define BSP_FEATURE_CRYPTO_HAS_SCE7 (0) -#define BSP_FEATURE_CRYPTO_HAS_SCE9 (0) // Feature not available on this MCU TODO_CHECK_FEATURE +#define BSP_FEATURE_CRYPTO_HAS_SCE9 (0) // Feature not available on this MCU #define BSP_FEATURE_CTSU_CTSUCHAC_REGISTER_COUNT (5U) #define BSP_FEATURE_CTSU_CTSUCHTRC_REGISTER_COUNT (5U) @@ -243,7 +262,7 @@ #define BSP_FEATURE_ETHER_FIFO_DEPTH (0) // Feature not available on this MCU #define BSP_FEATURE_ETHER_MAX_CHANNELS (0) // Feature not available on this MCU -#define BSP_FEATURE_ETHER_SUPPORTS_TZ_SECURE (0) // Feature not available on this MCU TODO_CHECK_FEATURE +#define BSP_FEATURE_ETHER_SUPPORTS_TZ_SECURE (0) // Feature not available on this MCU #define BSP_FEATURE_FLASH_CODE_FLASH_START (0x0U) #define BSP_FEATURE_FLASH_DATA_FLASH_START (0x40100000U) @@ -295,11 +314,11 @@ #define BSP_FEATURE_ICU_FIXED_IELSR_COUNT (0U) #define BSP_FEATURE_IIC_BUS_FREE_TIME_MULTIPLIER (0U) -#define BSP_FEATURE_IIC_B_FAST_MODE_PLUS (0) // Feature not available on this MCU TODO_CHECK_FEATURE -#define BSP_FEATURE_IIC_B_VALID_CHANNEL_MASK (0) // Feature not available on this MCU TODO_CHECK_FEATURE +#define BSP_FEATURE_IIC_B_FAST_MODE_PLUS (0) // Feature not available on this MCU +#define BSP_FEATURE_IIC_B_VALID_CHANNEL_MASK (0) // Feature not available on this MCU #define BSP_FEATURE_IIC_FAST_MODE_PLUS (0U) #define BSP_FEATURE_IIC_VALID_CHANNEL_MASK (0x03) -#define BSP_FEATURE_IIC_VERSION (0) // Feature not available on this MCU TODO_CHECK_FEATURE +#define BSP_FEATURE_IIC_VERSION (0) // Feature not available on this MCU #define BSP_FEATURE_IOPORT_ELC_PORTS (0x001EU) #define BSP_FEATURE_IOPORT_HAS_ETHERNET (0U) @@ -334,6 +353,7 @@ #define BSP_FEATURE_LPM_STANDBY_MOCO_REQUIRED (0U) #define BSP_FEATURE_LVD_HAS_DIGITAL_FILTER (0U) +#define BSP_FEATURE_LVD_HAS_EXT_MONITOR (0U) #define BSP_FEATURE_LVD_HAS_LVDLVLR (1U) #define BSP_FEATURE_LVD_MONITOR_1_HI_THRESHOLD (LVD_THRESHOLD_MONITOR_1_LEVEL_4_29V) // 4.29V #define BSP_FEATURE_LVD_MONITOR_1_LOW_THRESHOLD (LVD_THRESHOLD_MONITOR_1_LEVEL_1_65V) // 1.65V @@ -371,6 +391,7 @@ #define BSP_FEATURE_SCI_ADDRESS_MATCH_CHANNELS (BSP_FEATURE_SCI_CHANNELS) #define BSP_FEATURE_SCI_CHANNELS (0x207U) #define BSP_FEATURE_SCI_CLOCK (FSP_PRIV_CLOCK_PCLKA) +#define BSP_FEATURE_SCI_SPI_SCKSEL_VALUE (0U) // Feature not available on this MCU #define BSP_FEATURE_SCI_UART_CSTPEN_CHANNELS (0x0U) #define BSP_FEATURE_SCI_UART_FIFO_CHANNELS (0x3U) #define BSP_FEATURE_SCI_UART_FIFO_DEPTH (16U) @@ -388,6 +409,8 @@ #define BSP_FEATURE_SLCDC_HAS_INTERNAL_VOLT_GEN (1U) #define BSP_FEATURE_SLCDC_MAX_NUM_SEG (38U) #define BSP_FEATURE_SLCDC_HAS_VL1SEL (0) +#define BSP_FEATURE_SLCDC_CONTRAST_MAX_4BIAS (6U) +#define BSP_FEATURE_SLCDC_CONTRAST_MAX (15U) #define BSP_FEATURE_SPI_CLK (FSP_PRIV_CLOCK_PCLKA) #define BSP_FEATURE_SPI_HAS_SPCR3 (0U) diff --git a/ra/fsp/src/bsp/mcu/ra4m2/bsp_feature.h b/ra/fsp/src/bsp/mcu/ra4m2/bsp_feature.h index 289f5d3fc..060da0a09 100644 --- a/ra/fsp/src/bsp/mcu/ra4m2/bsp_feature.h +++ b/ra/fsp/src/bsp/mcu/ra4m2/bsp_feature.h @@ -86,14 +86,13 @@ #define BSP_FEATURE_ADC_VALID_UNIT_MASK (1U) #define BSP_FEATURE_AGT_AGTW_CHANNEL_COUNT (0) -#define BSP_FEATURE_AGT_MAX_CHANNEL_NUM (5) +#define BSP_FEATURE_AGT_AGT_CHANNEL_COUNT (6) #define BSP_FEATURE_AGT_USE_AGTIOSEL_ALT (0) // Indicates use of AGTIOSEL_ALT instead of AGTIOSEL #define BSP_FEATURE_AGT_VALID_CHANNEL_MASK (0x3F) #define BSP_FEATURE_BSP_FLASH_CACHE (1) #define BSP_FEATURE_BSP_FLASH_CACHE_DISABLE_OPM (0U) #define BSP_FEATURE_BSP_FLASH_PREFETCH_BUFFER (0) -#define BSP_FEATURE_BSP_HAS_ADC_CLOCK (0) #define BSP_FEATURE_BSP_HAS_CANFD_CLOCK (0) // Feature not available on this MCU #define BSP_FEATURE_BSP_HAS_CEC_CLOCK (0) // Feature not available on this MCU #define BSP_FEATURE_BSP_HAS_CLOCK_SUPPLY_TYPEB (0U) @@ -111,7 +110,7 @@ #define BSP_FEATURE_BSP_HAS_OFS3 (0) #define BSP_FEATURE_BSP_HAS_SCE5 (0) // Feature not available on this MCU #define BSP_FEATURE_BSP_HAS_SCE_ON_RA2 (0) // Feature not available on this MCU -#define BSP_FEATURE_BSP_HAS_SCISPI_CLOCK (0) // Feature not available on this MCU TODO_CHECK_FEATURE +#define BSP_FEATURE_BSP_HAS_SCISPI_CLOCK (0) // Feature not available on this MCU #define BSP_FEATURE_BSP_HAS_SCI_CLOCK (0) #define BSP_FEATURE_BSP_HAS_SDADC_CLOCK (0) #define BSP_FEATURE_BSP_HAS_SECURITY_MPU (0U) @@ -186,9 +185,29 @@ #define BSP_FEATURE_CGC_LOW_VOLTAGE_MAX_FREQ_HZ (0U) // This MCU does not have Low Voltage Mode #define BSP_FEATURE_CGC_MIDDLE_SPEED_MAX_FREQ_HZ (0U) // This MCU does not have Middle Speed Mode #define BSP_FEATURE_CGC_MOCO_STABILIZATION_MAX_US (15U) -#define BSP_FEATURE_CGC_MODRV_MASK (0x30U) -#define BSP_FEATURE_CGC_MODRV_SHIFT (0x4U) -#define BSP_FEATURE_CGC_PLLCCR_MAX_HZ (200000000U) +#define BSP_FEATURE_CGC_MODRV_MASK (R_SYSTEM_MOMCR_MODRV0_Msk) +#define BSP_FEATURE_CGC_MODRV_SHIFT (R_SYSTEM_MOMCR_MODRV0_Pos) +#define BSP_FEATURE_CGC_PLL_OUT_MAX_HZ (200000000U) +#define BSP_FEATURE_CGC_PLL_OUT_P_MAX_HZ (0U) // Feature not available on this MCU +#define BSP_FEATURE_CGC_PLL_OUT_Q_MAX_HZ (0U) // Feature not available on this MCU +#define BSP_FEATURE_CGC_PLL_OUT_R_MAX_HZ (0U) // Feature not available on this MCU +#define BSP_FEATURE_CGC_PLL_OUT_MIN_HZ (100000000U) +#define BSP_FEATURE_CGC_PLL_OUT_P_MIN_HZ (0U) // Feature not available on this MCU +#define BSP_FEATURE_CGC_PLL_OUT_Q_MIN_HZ (0U) // Feature not available on this MCU +#define BSP_FEATURE_CGC_PLL_OUT_R_MIN_HZ (0U) // Feature not available on this MCU +#define BSP_FEATURE_CGC_PLL_SRC_MAX_HZ (24000000U) +#define BSP_FEATURE_CGC_PLL_SRC_MIN_HZ (8000000U) +#define BSP_FEATURE_CGC_PLL2_OUT_MAX_HZ (240000000U) +#define BSP_FEATURE_CGC_PLL2_OUT_P_MAX_HZ (0U) // Feature not available on this MCU +#define BSP_FEATURE_CGC_PLL2_OUT_Q_MAX_HZ (0U) // Feature not available on this MCU +#define BSP_FEATURE_CGC_PLL2_OUT_R_MAX_HZ (0U) // Feature not available on this MCU +#define BSP_FEATURE_CGC_PLL2_OUT_MIN_HZ (120000000U) +#define BSP_FEATURE_CGC_PLL2_OUT_P_MIN_HZ (0U) // Feature not available on this MCU +#define BSP_FEATURE_CGC_PLL2_OUT_Q_MIN_HZ (0U) // Feature not available on this MCU +#define BSP_FEATURE_CGC_PLL2_OUT_R_MIN_HZ (0U) // Feature not available on this MCU +#define BSP_FEATURE_CGC_PLL2_SRC_MAX_HZ (24000000U) +#define BSP_FEATURE_CGC_PLL2_SRC_MIN_HZ (8000000U) + #define BSP_FEATURE_CGC_PLLCCR_TYPE (1U) #define BSP_FEATURE_CGC_PLLCCR_VCO_MAX_HZ (200000000U) #define BSP_FEATURE_CGC_PLLCCR_WAIT_US (0U) // No wait between setting PLLCCR and clearing PLLSTP @@ -197,7 +216,7 @@ #define BSP_FEATURE_CGC_SODRV_SHIFT (0x01U) #define BSP_FEATURE_CGC_SRAMPRCR_KW_OFFSET (1) #define BSP_FEATURE_CGC_SRAMPRCR_KW_VALUE (0x78) -#define BSP_FEATURE_CGC_STARTUP_OPCCR_MODE (0) // Feature not available on this MCU TODO_CHECK_FEATURE +#define BSP_FEATURE_CGC_STARTUP_OPCCR_MODE (0) // Feature not available on this MCU #define BSP_FEATURE_CRYPTO_HAS_AES (1) #define BSP_FEATURE_CRYPTO_HAS_AES_WRAPPED (1) @@ -205,7 +224,7 @@ #define BSP_FEATURE_CRYPTO_HAS_ECC (1) #define BSP_FEATURE_CRYPTO_HAS_ECC_WRAPPED (1) #define BSP_FEATURE_CRYPTO_HAS_HASH (1) -#define BSP_FEATURE_CRYPTO_HAS_NEW_PROCS (0) // Feature not available on this MCU TODO_CHECK_FEATURE +#define BSP_FEATURE_CRYPTO_HAS_NEW_PROCS (0) // Feature not available on this MCU #define BSP_FEATURE_CRYPTO_HAS_RSA (1) #define BSP_FEATURE_CRYPTO_HAS_RSA_WRAPPED (1) #define BSP_FEATURE_CRYPTO_AES_IP_VERSION (0) @@ -245,7 +264,7 @@ #define BSP_FEATURE_ETHER_FIFO_DEPTH (0) // Feature not available on this MCU #define BSP_FEATURE_ETHER_MAX_CHANNELS (0) // Feature not available on this MCU -#define BSP_FEATURE_ETHER_SUPPORTS_TZ_SECURE (0) // Feature not available on this MCU TODO_CHECK_FEATURE +#define BSP_FEATURE_ETHER_SUPPORTS_TZ_SECURE (0) // Feature not available on this MCU #define BSP_FEATURE_FLASH_CODE_FLASH_START (0x0U) #define BSP_FEATURE_FLASH_DATA_FLASH_START (0x08000000U) @@ -297,11 +316,11 @@ #define BSP_FEATURE_ICU_FIXED_IELSR_COUNT (0U) #define BSP_FEATURE_IIC_BUS_FREE_TIME_MULTIPLIER (0U) -#define BSP_FEATURE_IIC_B_FAST_MODE_PLUS (0) // Feature not available on this MCU TODO_CHECK_FEATURE -#define BSP_FEATURE_IIC_B_VALID_CHANNEL_MASK (0) // Feature not available on this MCU TODO_CHECK_FEATURE +#define BSP_FEATURE_IIC_B_FAST_MODE_PLUS (0) // Feature not available on this MCU +#define BSP_FEATURE_IIC_B_VALID_CHANNEL_MASK (0) // Feature not available on this MCU #define BSP_FEATURE_IIC_FAST_MODE_PLUS (1U << 0U) #define BSP_FEATURE_IIC_VALID_CHANNEL_MASK (0x03) -#define BSP_FEATURE_IIC_VERSION (0) // Feature not available on this MCU TODO_CHECK_FEATURE +#define BSP_FEATURE_IIC_VERSION (0) // Feature not available on this MCU #define BSP_FEATURE_IOPORT_ELC_PORTS (0x001EU) #define BSP_FEATURE_IOPORT_HAS_ETHERNET (0U) @@ -336,6 +355,7 @@ #define BSP_FEATURE_LPM_STANDBY_MOCO_REQUIRED (0U) #define BSP_FEATURE_LVD_HAS_DIGITAL_FILTER (1U) +#define BSP_FEATURE_LVD_HAS_EXT_MONITOR (0U) #define BSP_FEATURE_LVD_HAS_LVDLVLR (0U) #define BSP_FEATURE_LVD_MONITOR_1_HI_THRESHOLD (LVD_THRESHOLD_MONITOR_1_LEVEL_2_99V) // 2.99V #define BSP_FEATURE_LVD_MONITOR_1_LOW_THRESHOLD (LVD_THRESHOLD_MONITOR_1_LEVEL_2_85V) // 2.85V @@ -373,6 +393,7 @@ #define BSP_FEATURE_SCI_ADDRESS_MATCH_CHANNELS (0x219U) #define BSP_FEATURE_SCI_CHANNELS (0x21FU) #define BSP_FEATURE_SCI_CLOCK (FSP_PRIV_CLOCK_PCLKA) +#define BSP_FEATURE_SCI_SPI_SCKSEL_VALUE (0U) // Feature not available on this MCU #define BSP_FEATURE_SCI_UART_CSTPEN_CHANNELS (0x0219U) // Channel 0, channel 3, Channel 4, channel 9 have CSTPEN feature #define BSP_FEATURE_SCI_UART_FIFO_CHANNELS (0x219U) #define BSP_FEATURE_SCI_UART_FIFO_DEPTH (16U) @@ -389,7 +410,9 @@ #define BSP_FEATURE_SLCDC_HAS_8_TIME_SLICE (0) // Feature not available on this MCU #define BSP_FEATURE_SLCDC_HAS_INTERNAL_VOLT_GEN (0) // Feature not available on this MCU #define BSP_FEATURE_SLCDC_MAX_NUM_SEG (0) // Feature not available on this MCU -#define BSP_FEATURE_SLCDC_HAS_VL1SEL (0) +#define BSP_FEATURE_SLCDC_HAS_VL1SEL (0) // Feature not available on this MCU +#define BSP_FEATURE_SLCDC_CONTRAST_MAX_4BIAS (0) // Feature not available on this MCU +#define BSP_FEATURE_SLCDC_CONTRAST_MAX (0) // Feature not available on this MCU #define BSP_FEATURE_SPI_CLK (FSP_PRIV_CLOCK_PCLKA) #define BSP_FEATURE_SPI_HAS_SPCR3 (1U) diff --git a/ra/fsp/src/bsp/mcu/ra4m3/bsp_feature.h b/ra/fsp/src/bsp/mcu/ra4m3/bsp_feature.h index b6de316a1..3c290d875 100644 --- a/ra/fsp/src/bsp/mcu/ra4m3/bsp_feature.h +++ b/ra/fsp/src/bsp/mcu/ra4m3/bsp_feature.h @@ -86,14 +86,13 @@ #define BSP_FEATURE_ADC_VALID_UNIT_MASK (3U) #define BSP_FEATURE_AGT_AGTW_CHANNEL_COUNT (0) -#define BSP_FEATURE_AGT_MAX_CHANNEL_NUM (5) +#define BSP_FEATURE_AGT_AGT_CHANNEL_COUNT (6) #define BSP_FEATURE_AGT_USE_AGTIOSEL_ALT (0) // Indicates use of AGTIOSEL_ALT instead of AGTIOSEL #define BSP_FEATURE_AGT_VALID_CHANNEL_MASK (0x3F) #define BSP_FEATURE_BSP_FLASH_CACHE (1) #define BSP_FEATURE_BSP_FLASH_CACHE_DISABLE_OPM (0U) #define BSP_FEATURE_BSP_FLASH_PREFETCH_BUFFER (0) -#define BSP_FEATURE_BSP_HAS_ADC_CLOCK (0) #define BSP_FEATURE_BSP_HAS_CANFD_CLOCK (0) // Feature not available on this MCU #define BSP_FEATURE_BSP_HAS_CEC_CLOCK (0) // Feature not available on this MCU #define BSP_FEATURE_BSP_HAS_CLOCK_SUPPLY_TYPEB (0U) @@ -111,7 +110,7 @@ #define BSP_FEATURE_BSP_HAS_OFS3 (0) #define BSP_FEATURE_BSP_HAS_SCE5 (0) // Feature not available on this MCU #define BSP_FEATURE_BSP_HAS_SCE_ON_RA2 (0) // Feature not available on this MCU -#define BSP_FEATURE_BSP_HAS_SCISPI_CLOCK (0) // Feature not available on this MCU TODO_CHECK_FEATURE +#define BSP_FEATURE_BSP_HAS_SCISPI_CLOCK (0) // Feature not available on this MCU #define BSP_FEATURE_BSP_HAS_SCI_CLOCK (0) #define BSP_FEATURE_BSP_HAS_SDADC_CLOCK (0) #define BSP_FEATURE_BSP_HAS_SECURITY_MPU (0U) @@ -186,9 +185,29 @@ #define BSP_FEATURE_CGC_LOW_VOLTAGE_MAX_FREQ_HZ (0U) // This MCU does not have Low Voltage Mode #define BSP_FEATURE_CGC_MIDDLE_SPEED_MAX_FREQ_HZ (0U) // This MCU does not have Middle Speed Mode #define BSP_FEATURE_CGC_MOCO_STABILIZATION_MAX_US (15U) -#define BSP_FEATURE_CGC_MODRV_MASK (0x30U) -#define BSP_FEATURE_CGC_MODRV_SHIFT (0x4U) -#define BSP_FEATURE_CGC_PLLCCR_MAX_HZ (200000000U) +#define BSP_FEATURE_CGC_MODRV_MASK (R_SYSTEM_MOMCR_MODRV0_Msk) +#define BSP_FEATURE_CGC_MODRV_SHIFT (R_SYSTEM_MOMCR_MODRV0_Pos) +#define BSP_FEATURE_CGC_PLL_OUT_MAX_HZ (200000000U) +#define BSP_FEATURE_CGC_PLL_OUT_P_MAX_HZ (0U) // Feature not available on this MCU +#define BSP_FEATURE_CGC_PLL_OUT_Q_MAX_HZ (0U) // Feature not available on this MCU +#define BSP_FEATURE_CGC_PLL_OUT_R_MAX_HZ (0U) // Feature not available on this MCU +#define BSP_FEATURE_CGC_PLL_OUT_MIN_HZ (100000000U) +#define BSP_FEATURE_CGC_PLL_OUT_P_MIN_HZ (0U) // Feature not available on this MCU +#define BSP_FEATURE_CGC_PLL_OUT_Q_MIN_HZ (0U) // Feature not available on this MCU +#define BSP_FEATURE_CGC_PLL_OUT_R_MIN_HZ (0U) // Feature not available on this MCU +#define BSP_FEATURE_CGC_PLL_SRC_MAX_HZ (24000000U) +#define BSP_FEATURE_CGC_PLL_SRC_MIN_HZ (8000000U) +#define BSP_FEATURE_CGC_PLL2_OUT_MAX_HZ (240000000U) +#define BSP_FEATURE_CGC_PLL2_OUT_P_MAX_HZ (0U) // Feature not available on this MCU +#define BSP_FEATURE_CGC_PLL2_OUT_Q_MAX_HZ (0U) // Feature not available on this MCU +#define BSP_FEATURE_CGC_PLL2_OUT_R_MAX_HZ (0U) // Feature not available on this MCU +#define BSP_FEATURE_CGC_PLL2_OUT_MIN_HZ (120000000U) +#define BSP_FEATURE_CGC_PLL2_OUT_P_MIN_HZ (0U) // Feature not available on this MCU +#define BSP_FEATURE_CGC_PLL2_OUT_Q_MIN_HZ (0U) // Feature not available on this MCU +#define BSP_FEATURE_CGC_PLL2_OUT_R_MIN_HZ (0U) // Feature not available on this MCU +#define BSP_FEATURE_CGC_PLL2_SRC_MAX_HZ (24000000U) +#define BSP_FEATURE_CGC_PLL2_SRC_MIN_HZ (8000000U) + #define BSP_FEATURE_CGC_PLLCCR_TYPE (1U) #define BSP_FEATURE_CGC_PLLCCR_VCO_MAX_HZ (200000000U) #define BSP_FEATURE_CGC_PLLCCR_WAIT_US (0U) // No wait between setting PLLCCR and clearing PLLSTP @@ -205,7 +224,7 @@ #define BSP_FEATURE_CRYPTO_HAS_ECC (1) #define BSP_FEATURE_CRYPTO_HAS_ECC_WRAPPED (1) #define BSP_FEATURE_CRYPTO_HAS_HASH (1) -#define BSP_FEATURE_CRYPTO_HAS_NEW_PROCS (0) // Feature not available on this MCU TODO_CHECK_FEATURE +#define BSP_FEATURE_CRYPTO_HAS_NEW_PROCS (0) // Feature not available on this MCU #define BSP_FEATURE_CRYPTO_HAS_RSA (1) #define BSP_FEATURE_CRYPTO_HAS_RSA_WRAPPED (1) #define BSP_FEATURE_CRYPTO_AES_IP_VERSION (0) @@ -245,7 +264,7 @@ #define BSP_FEATURE_ETHER_FIFO_DEPTH (0) // Feature not available on this MCU #define BSP_FEATURE_ETHER_MAX_CHANNELS (0) // Feature not available on this MCU -#define BSP_FEATURE_ETHER_SUPPORTS_TZ_SECURE (0) // Feature not available on this MCU TODO_CHECK_FEATURE +#define BSP_FEATURE_ETHER_SUPPORTS_TZ_SECURE (0) // Feature not available on this MCU #define BSP_FEATURE_FLASH_CODE_FLASH_START (0x0U) #define BSP_FEATURE_FLASH_DATA_FLASH_START (0x08000000U) @@ -297,11 +316,11 @@ #define BSP_FEATURE_ICU_FIXED_IELSR_COUNT (0U) #define BSP_FEATURE_IIC_BUS_FREE_TIME_MULTIPLIER (0U) -#define BSP_FEATURE_IIC_B_FAST_MODE_PLUS (0) // Feature not available on this MCU TODO_CHECK_FEATURE -#define BSP_FEATURE_IIC_B_VALID_CHANNEL_MASK (0) // Feature not available on this MCU TODO_CHECK_FEATURE +#define BSP_FEATURE_IIC_B_FAST_MODE_PLUS (0) // Feature not available on this MCU +#define BSP_FEATURE_IIC_B_VALID_CHANNEL_MASK (0) // Feature not available on this MCU #define BSP_FEATURE_IIC_FAST_MODE_PLUS (1U << 0U) #define BSP_FEATURE_IIC_VALID_CHANNEL_MASK (0x03) -#define BSP_FEATURE_IIC_VERSION (0) // Feature not available on this MCU TODO_CHECK_FEATURE +#define BSP_FEATURE_IIC_VERSION (0) // Feature not available on this MCU #define BSP_FEATURE_IOPORT_ELC_PORTS (0x001EU) #define BSP_FEATURE_IOPORT_HAS_ETHERNET (0U) @@ -336,6 +355,7 @@ #define BSP_FEATURE_LPM_STANDBY_MOCO_REQUIRED (0U) #define BSP_FEATURE_LVD_HAS_DIGITAL_FILTER (1U) +#define BSP_FEATURE_LVD_HAS_EXT_MONITOR (0U) #define BSP_FEATURE_LVD_HAS_LVDLVLR (0U) #define BSP_FEATURE_LVD_MONITOR_1_HI_THRESHOLD (LVD_THRESHOLD_MONITOR_1_LEVEL_2_99V) // 2.99V #define BSP_FEATURE_LVD_MONITOR_1_LOW_THRESHOLD (LVD_THRESHOLD_MONITOR_1_LEVEL_2_85V) // 2.85V @@ -373,6 +393,7 @@ #define BSP_FEATURE_SCI_ADDRESS_MATCH_CHANNELS (0x219U) #define BSP_FEATURE_SCI_CHANNELS (0x21FU) #define BSP_FEATURE_SCI_CLOCK (FSP_PRIV_CLOCK_PCLKA) +#define BSP_FEATURE_SCI_SPI_SCKSEL_VALUE (0U) // Feature not available on this MCU #define BSP_FEATURE_SCI_UART_CSTPEN_CHANNELS (0x0219U) // Channel 0, channel 3, Channel 4, channel 9 have CSTPEN feature #define BSP_FEATURE_SCI_UART_FIFO_CHANNELS (0x219U) #define BSP_FEATURE_SCI_UART_FIFO_DEPTH (16U) @@ -389,7 +410,9 @@ #define BSP_FEATURE_SLCDC_HAS_8_TIME_SLICE (0) // Feature not available on this MCU #define BSP_FEATURE_SLCDC_HAS_INTERNAL_VOLT_GEN (0) // Feature not available on this MCU #define BSP_FEATURE_SLCDC_MAX_NUM_SEG (0) // Feature not available on this MCU -#define BSP_FEATURE_SLCDC_HAS_VL1SEL (0) +#define BSP_FEATURE_SLCDC_HAS_VL1SEL (0) // Feature not available on this MCU +#define BSP_FEATURE_SLCDC_CONTRAST_MAX_4BIAS (0) // Feature not available on this MCU +#define BSP_FEATURE_SLCDC_CONTRAST_MAX (0) // Feature not available on this MCU #define BSP_FEATURE_SPI_CLK (FSP_PRIV_CLOCK_PCLKA) #define BSP_FEATURE_SPI_HAS_SPCR3 (1U) diff --git a/ra/fsp/src/bsp/mcu/ra4t1/bsp_feature.h b/ra/fsp/src/bsp/mcu/ra4t1/bsp_feature.h index f4bd1fbdd..752283ea2 100644 --- a/ra/fsp/src/bsp/mcu/ra4t1/bsp_feature.h +++ b/ra/fsp/src/bsp/mcu/ra4t1/bsp_feature.h @@ -86,14 +86,13 @@ #define BSP_FEATURE_ADC_VALID_UNIT_MASK (1U) #define BSP_FEATURE_AGT_AGTW_CHANNEL_COUNT (2) -#define BSP_FEATURE_AGT_MAX_CHANNEL_NUM (1) +#define BSP_FEATURE_AGT_AGT_CHANNEL_COUNT (0) #define BSP_FEATURE_AGT_USE_AGTIOSEL_ALT (0) // Indicates use of AGTIOSEL_ALT instead of AGTIOSEL #define BSP_FEATURE_AGT_VALID_CHANNEL_MASK (0x3U) #define BSP_FEATURE_BSP_FLASH_CACHE (1) #define BSP_FEATURE_BSP_FLASH_CACHE_DISABLE_OPM (0U) #define BSP_FEATURE_BSP_FLASH_PREFETCH_BUFFER (0) -#define BSP_FEATURE_BSP_HAS_ADC_CLOCK (0) #define BSP_FEATURE_BSP_HAS_CANFD_CLOCK (1) #define BSP_FEATURE_BSP_HAS_CEC_CLOCK (0) // Feature not available on this MCU #define BSP_FEATURE_BSP_HAS_CLOCK_SUPPLY_TYPEB (0U) @@ -186,9 +185,29 @@ #define BSP_FEATURE_CGC_LOW_VOLTAGE_MAX_FREQ_HZ (0U) // This MCU does not have Low Voltage Mode #define BSP_FEATURE_CGC_MIDDLE_SPEED_MAX_FREQ_HZ (0U) // This MCU does not have Middle Speed Mode #define BSP_FEATURE_CGC_MOCO_STABILIZATION_MAX_US (15U) -#define BSP_FEATURE_CGC_MODRV_MASK (0x30U) -#define BSP_FEATURE_CGC_MODRV_SHIFT (0x4U) -#define BSP_FEATURE_CGC_PLLCCR_MAX_HZ (240000000U) +#define BSP_FEATURE_CGC_MODRV_MASK (R_SYSTEM_MOMCR_MODRV0_Msk) +#define BSP_FEATURE_CGC_MODRV_SHIFT (R_SYSTEM_MOMCR_MODRV0_Pos) +#define BSP_FEATURE_CGC_PLL_OUT_MAX_HZ (240000000U) +#define BSP_FEATURE_CGC_PLL_OUT_P_MAX_HZ (0U) // Feature not available on this MCU +#define BSP_FEATURE_CGC_PLL_OUT_Q_MAX_HZ (0U) // Feature not available on this MCU +#define BSP_FEATURE_CGC_PLL_OUT_R_MAX_HZ (0U) // Feature not available on this MCU +#define BSP_FEATURE_CGC_PLL_OUT_MIN_HZ (100000000U) +#define BSP_FEATURE_CGC_PLL_OUT_P_MIN_HZ (0U) // Feature not available on this MCU +#define BSP_FEATURE_CGC_PLL_OUT_Q_MIN_HZ (0U) // Feature not available on this MCU +#define BSP_FEATURE_CGC_PLL_OUT_R_MIN_HZ (0U) // Feature not available on this MCU +#define BSP_FEATURE_CGC_PLL_SRC_MAX_HZ (24000000U) +#define BSP_FEATURE_CGC_PLL_SRC_MIN_HZ (8000000U) +#define BSP_FEATURE_CGC_PLL2_OUT_MAX_HZ (0U) // Feature not available on this MCU +#define BSP_FEATURE_CGC_PLL2_OUT_P_MAX_HZ (0U) // Feature not available on this MCU +#define BSP_FEATURE_CGC_PLL2_OUT_Q_MAX_HZ (0U) // Feature not available on this MCU +#define BSP_FEATURE_CGC_PLL2_OUT_R_MAX_HZ (0U) // Feature not available on this MCU +#define BSP_FEATURE_CGC_PLL2_OUT_MIN_HZ (0U) // Feature not available on this MCU +#define BSP_FEATURE_CGC_PLL2_OUT_P_MIN_HZ (0U) // Feature not available on this MCU +#define BSP_FEATURE_CGC_PLL2_OUT_Q_MIN_HZ (0U) // Feature not available on this MCU +#define BSP_FEATURE_CGC_PLL2_OUT_R_MIN_HZ (0U) // Feature not available on this MCU +#define BSP_FEATURE_CGC_PLL2_SRC_MAX_HZ (0U) // Feature not available on this MCU +#define BSP_FEATURE_CGC_PLL2_SRC_MIN_HZ (0U) // Feature not available on this MCU + #define BSP_FEATURE_CGC_PLLCCR_TYPE (1U) #define BSP_FEATURE_CGC_PLLCCR_VCO_MAX_HZ (240000000U) #define BSP_FEATURE_CGC_PLLCCR_WAIT_US (0U) // No wait between setting PLLCCR and clearing PLLSTP @@ -336,6 +355,7 @@ #define BSP_FEATURE_LPM_STANDBY_MOCO_REQUIRED (0U) #define BSP_FEATURE_LVD_HAS_DIGITAL_FILTER (1U) +#define BSP_FEATURE_LVD_HAS_EXT_MONITOR (0U) #define BSP_FEATURE_LVD_HAS_LVDLVLR (0U) #define BSP_FEATURE_LVD_MONITOR_1_HI_THRESHOLD (LVD_THRESHOLD_MONITOR_1_LEVEL_2_99V) // 2.99V #define BSP_FEATURE_LVD_MONITOR_1_LOW_THRESHOLD (LVD_THRESHOLD_MONITOR_1_LEVEL_2_85V) // 2.85V @@ -373,6 +393,7 @@ #define BSP_FEATURE_SCI_ADDRESS_MATCH_CHANNELS (0x201U) #define BSP_FEATURE_SCI_CHANNELS (0x201U) #define BSP_FEATURE_SCI_CLOCK (FSP_PRIV_CLOCK_PCLKA) +#define BSP_FEATURE_SCI_SPI_SCKSEL_VALUE (0U) // Feature not available on this MCU #define BSP_FEATURE_SCI_UART_CSTPEN_CHANNELS (0x201U) #define BSP_FEATURE_SCI_UART_FIFO_CHANNELS (0x201U) #define BSP_FEATURE_SCI_UART_FIFO_DEPTH (16U) @@ -389,7 +410,9 @@ #define BSP_FEATURE_SLCDC_HAS_8_TIME_SLICE (0) // Feature not available on this MCU #define BSP_FEATURE_SLCDC_HAS_INTERNAL_VOLT_GEN (0) // Feature not available on this MCU #define BSP_FEATURE_SLCDC_MAX_NUM_SEG (0) // Feature not available on this MCU -#define BSP_FEATURE_SLCDC_HAS_VL1SEL (0) +#define BSP_FEATURE_SLCDC_HAS_VL1SEL (0) // Feature not available on this MCU +#define BSP_FEATURE_SLCDC_CONTRAST_MAX_4BIAS (0) // Feature not available on this MCU +#define BSP_FEATURE_SLCDC_CONTRAST_MAX (0) // Feature not available on this MCU #define BSP_FEATURE_SPI_CLK (FSP_PRIV_CLOCK_PCLKA) #define BSP_FEATURE_SPI_HAS_SPCR3 (1U) diff --git a/ra/fsp/src/bsp/mcu/ra4w1/bsp_feature.h b/ra/fsp/src/bsp/mcu/ra4w1/bsp_feature.h index 12596e0d8..c544dbce2 100644 --- a/ra/fsp/src/bsp/mcu/ra4w1/bsp_feature.h +++ b/ra/fsp/src/bsp/mcu/ra4w1/bsp_feature.h @@ -82,14 +82,13 @@ #define BSP_FEATURE_ADC_VALID_UNIT_MASK (1U) #define BSP_FEATURE_AGT_AGTW_CHANNEL_COUNT (0) -#define BSP_FEATURE_AGT_MAX_CHANNEL_NUM (1) +#define BSP_FEATURE_AGT_AGT_CHANNEL_COUNT (2) #define BSP_FEATURE_AGT_USE_AGTIOSEL_ALT (0) // Indicates use of AGTIOSEL_ALT instead of AGTIOSEL #define BSP_FEATURE_AGT_VALID_CHANNEL_MASK (0x03) #define BSP_FEATURE_BSP_FLASH_CACHE (1U) #define BSP_FEATURE_BSP_FLASH_CACHE_DISABLE_OPM (1U) #define BSP_FEATURE_BSP_FLASH_PREFETCH_BUFFER (0) -#define BSP_FEATURE_BSP_HAS_ADC_CLOCK (0) #define BSP_FEATURE_BSP_HAS_CANFD_CLOCK (0) // Feature not available on this MCU #define BSP_FEATURE_BSP_HAS_CEC_CLOCK (0) // Feature not available on this MCU #define BSP_FEATURE_BSP_HAS_CLOCK_SUPPLY_TYPEB (0U) @@ -107,7 +106,7 @@ #define BSP_FEATURE_BSP_HAS_OFS3 (0) #define BSP_FEATURE_BSP_HAS_SCE5 (1) #define BSP_FEATURE_BSP_HAS_SCE_ON_RA2 (0) // Feature not available on this MCU -#define BSP_FEATURE_BSP_HAS_SCISPI_CLOCK (0) // Feature not available on this MCU TODO_CHECK_FEATURE +#define BSP_FEATURE_BSP_HAS_SCISPI_CLOCK (0) // Feature not available on this MCU #define BSP_FEATURE_BSP_HAS_SCI_CLOCK (0) #define BSP_FEATURE_BSP_HAS_SDADC_CLOCK (0) #define BSP_FEATURE_BSP_HAS_SECURITY_MPU (1U) @@ -184,9 +183,29 @@ #define BSP_FEATURE_CGC_LOW_VOLTAGE_MAX_FREQ_HZ (4000000U) // This MCU does have Low Voltage Mode, up to 4MHz #define BSP_FEATURE_CGC_MIDDLE_SPEED_MAX_FREQ_HZ (8000000U) // This MCU does have Middle Speed Mode, up to 8MHz #define BSP_FEATURE_CGC_MOCO_STABILIZATION_MAX_US (1U) -#define BSP_FEATURE_CGC_MODRV_MASK (0x08U) -#define BSP_FEATURE_CGC_MODRV_SHIFT (0x3U) -#define BSP_FEATURE_CGC_PLLCCR_MAX_HZ (0U) +#define BSP_FEATURE_CGC_MODRV_MASK (R_SYSTEM_MOMCR_MODRV1_Msk) +#define BSP_FEATURE_CGC_MODRV_SHIFT (R_SYSTEM_MOMCR_MODRV1_Pos) +#define BSP_FEATURE_CGC_PLL_OUT_MAX_HZ (64000000U) +#define BSP_FEATURE_CGC_PLL_OUT_P_MAX_HZ (0U) // Feature not available on this MCU +#define BSP_FEATURE_CGC_PLL_OUT_Q_MAX_HZ (0U) // Feature not available on this MCU +#define BSP_FEATURE_CGC_PLL_OUT_R_MAX_HZ (0U) // Feature not available on this MCU +#define BSP_FEATURE_CGC_PLL_OUT_MIN_HZ (24000000U) +#define BSP_FEATURE_CGC_PLL_OUT_P_MIN_HZ (0U) // Feature not available on this MCU +#define BSP_FEATURE_CGC_PLL_OUT_Q_MIN_HZ (0U) // Feature not available on this MCU +#define BSP_FEATURE_CGC_PLL_OUT_R_MIN_HZ (0U) // Feature not available on this MCU +#define BSP_FEATURE_CGC_PLL_SRC_MAX_HZ (12500000U) +#define BSP_FEATURE_CGC_PLL_SRC_MIN_HZ (4000000U) +#define BSP_FEATURE_CGC_PLL2_OUT_MAX_HZ (0U) // Feature not available on this MCU +#define BSP_FEATURE_CGC_PLL2_OUT_P_MAX_HZ (0U) // Feature not available on this MCU +#define BSP_FEATURE_CGC_PLL2_OUT_Q_MAX_HZ (0U) // Feature not available on this MCU +#define BSP_FEATURE_CGC_PLL2_OUT_R_MAX_HZ (0U) // Feature not available on this MCU +#define BSP_FEATURE_CGC_PLL2_OUT_MIN_HZ (0U) // Feature not available on this MCU +#define BSP_FEATURE_CGC_PLL2_OUT_P_MIN_HZ (0U) // Feature not available on this MCU +#define BSP_FEATURE_CGC_PLL2_OUT_Q_MIN_HZ (0U) // Feature not available on this MCU +#define BSP_FEATURE_CGC_PLL2_OUT_R_MIN_HZ (0U) // Feature not available on this MCU +#define BSP_FEATURE_CGC_PLL2_SRC_MAX_HZ (0U) // Feature not available on this MCU +#define BSP_FEATURE_CGC_PLL2_SRC_MIN_HZ (0U) // Feature not available on this MCU + #define BSP_FEATURE_CGC_PLLCCR_TYPE (2U) #define BSP_FEATURE_CGC_PLLCCR_VCO_MAX_HZ (0U) // This MCU does not use PLLCCR to set PLL frequency #define BSP_FEATURE_CGC_PLLCCR_WAIT_US (1U) // 1 us wait between setting PLLCCR and clearing PLLSTP @@ -203,14 +222,14 @@ #define BSP_FEATURE_CRYPTO_HAS_ECC (0) #define BSP_FEATURE_CRYPTO_HAS_ECC_WRAPPED (0) #define BSP_FEATURE_CRYPTO_HAS_HASH (0) -#define BSP_FEATURE_CRYPTO_HAS_NEW_PROCS (0) // Feature not available on this MCU TODO_CHECK_FEATURE +#define BSP_FEATURE_CRYPTO_HAS_NEW_PROCS (0) // Feature not available on this MCU #define BSP_FEATURE_CRYPTO_HAS_RSA (0) #define BSP_FEATURE_CRYPTO_HAS_RSA_WRAPPED (0) #define BSP_FEATURE_CRYPTO_AES_IP_VERSION (0) #define BSP_FEATURE_CRYPTO_HAS_SCE5 (1) #define BSP_FEATURE_CRYPTO_HAS_SCE5B (0) #define BSP_FEATURE_CRYPTO_HAS_SCE7 (0) -#define BSP_FEATURE_CRYPTO_HAS_SCE9 (0) // Feature not available on this MCU TODO_CHECK_FEATURE +#define BSP_FEATURE_CRYPTO_HAS_SCE9 (0) // Feature not available on this MCU #define BSP_FEATURE_CTSU_CTSUCHAC_REGISTER_COUNT (5U) #define BSP_FEATURE_CTSU_CTSUCHTRC_REGISTER_COUNT (5U) @@ -243,7 +262,7 @@ #define BSP_FEATURE_ETHER_FIFO_DEPTH (0) // Feature not available on this MCU #define BSP_FEATURE_ETHER_MAX_CHANNELS (0) // Feature not available on this MCU -#define BSP_FEATURE_ETHER_SUPPORTS_TZ_SECURE (0) // Feature not available on this MCU TODO_CHECK_FEATURE +#define BSP_FEATURE_ETHER_SUPPORTS_TZ_SECURE (0) // Feature not available on this MCU #define BSP_FEATURE_FLASH_CODE_FLASH_START (0x0U) #define BSP_FEATURE_FLASH_DATA_FLASH_START (0x40100000U) @@ -295,11 +314,11 @@ #define BSP_FEATURE_ICU_FIXED_IELSR_COUNT (0U) #define BSP_FEATURE_IIC_BUS_FREE_TIME_MULTIPLIER (0U) -#define BSP_FEATURE_IIC_B_FAST_MODE_PLUS (0) // Feature not available on this MCU TODO_CHECK_FEATURE -#define BSP_FEATURE_IIC_B_VALID_CHANNEL_MASK (0) // Feature not available on this MCU TODO_CHECK_FEATURE +#define BSP_FEATURE_IIC_B_FAST_MODE_PLUS (0) // Feature not available on this MCU +#define BSP_FEATURE_IIC_B_VALID_CHANNEL_MASK (0) // Feature not available on this MCU #define BSP_FEATURE_IIC_FAST_MODE_PLUS (0U) #define BSP_FEATURE_IIC_VALID_CHANNEL_MASK (0x03) -#define BSP_FEATURE_IIC_VERSION (0) // Feature not available on this MCU TODO_CHECK_FEATURE +#define BSP_FEATURE_IIC_VERSION (0) // Feature not available on this MCU #define BSP_FEATURE_IOPORT_ELC_PORTS (0x001EU) #define BSP_FEATURE_IOPORT_HAS_ETHERNET (0U) @@ -334,6 +353,7 @@ #define BSP_FEATURE_LPM_STANDBY_MOCO_REQUIRED (0U) #define BSP_FEATURE_LVD_HAS_DIGITAL_FILTER (0U) +#define BSP_FEATURE_LVD_HAS_EXT_MONITOR (0U) #define BSP_FEATURE_LVD_HAS_LVDLVLR (1U) #define BSP_FEATURE_LVD_MONITOR_1_HI_THRESHOLD (LVD_THRESHOLD_MONITOR_1_LEVEL_4_29V) // 4.29V #define BSP_FEATURE_LVD_MONITOR_1_LOW_THRESHOLD (LVD_THRESHOLD_MONITOR_1_LEVEL_1_65V) // 1.65V @@ -371,6 +391,7 @@ #define BSP_FEATURE_SCI_ADDRESS_MATCH_CHANNELS (BSP_FEATURE_SCI_CHANNELS) #define BSP_FEATURE_SCI_CHANNELS (0x213U) #define BSP_FEATURE_SCI_CLOCK (FSP_PRIV_CLOCK_PCLKA) +#define BSP_FEATURE_SCI_SPI_SCKSEL_VALUE (0U) // Feature not available on this MCU #define BSP_FEATURE_SCI_UART_CSTPEN_CHANNELS (0x0U) #define BSP_FEATURE_SCI_UART_FIFO_CHANNELS (0x3U) #define BSP_FEATURE_SCI_UART_FIFO_DEPTH (16U) @@ -388,6 +409,8 @@ #define BSP_FEATURE_SLCDC_HAS_INTERNAL_VOLT_GEN (0U) #define BSP_FEATURE_SLCDC_MAX_NUM_SEG (54U) #define BSP_FEATURE_SLCDC_HAS_VL1SEL (0) +#define BSP_FEATURE_SLCDC_CONTRAST_MAX_4BIAS (0) +#define BSP_FEATURE_SLCDC_CONTRAST_MAX (0) #define BSP_FEATURE_SPI_CLK (FSP_PRIV_CLOCK_PCLKA) #define BSP_FEATURE_SPI_HAS_SPCR3 (0U) diff --git a/ra/fsp/src/bsp/mcu/ra6e1/bsp_feature.h b/ra/fsp/src/bsp/mcu/ra6e1/bsp_feature.h index 5b21d8cf8..4a2f2be8f 100644 --- a/ra/fsp/src/bsp/mcu/ra6e1/bsp_feature.h +++ b/ra/fsp/src/bsp/mcu/ra6e1/bsp_feature.h @@ -86,14 +86,13 @@ #define BSP_FEATURE_ADC_VALID_UNIT_MASK (1U) #define BSP_FEATURE_AGT_AGTW_CHANNEL_COUNT (0) -#define BSP_FEATURE_AGT_MAX_CHANNEL_NUM (5) +#define BSP_FEATURE_AGT_AGT_CHANNEL_COUNT (6) #define BSP_FEATURE_AGT_USE_AGTIOSEL_ALT (0) // Indicates use of AGTIOSEL_ALT instead of AGTIOSEL #define BSP_FEATURE_AGT_VALID_CHANNEL_MASK (0x3F) #define BSP_FEATURE_BSP_FLASH_CACHE (1) #define BSP_FEATURE_BSP_FLASH_CACHE_DISABLE_OPM (0U) #define BSP_FEATURE_BSP_FLASH_PREFETCH_BUFFER (0) -#define BSP_FEATURE_BSP_HAS_ADC_CLOCK (0) #define BSP_FEATURE_BSP_HAS_CANFD_CLOCK (0) #define BSP_FEATURE_BSP_HAS_CEC_CLOCK (0) // Feature not available on this MCU #define BSP_FEATURE_BSP_HAS_CLOCK_SUPPLY_TYPEB (0U) @@ -111,7 +110,7 @@ #define BSP_FEATURE_BSP_HAS_OFS3 (0) #define BSP_FEATURE_BSP_HAS_SCE5 (0) // Feature not available on this MCU #define BSP_FEATURE_BSP_HAS_SCE_ON_RA2 (0) // Feature not available on this MCU -#define BSP_FEATURE_BSP_HAS_SCISPI_CLOCK (0) // Feature not available on this MCU TODO_CHECK_FEATURE +#define BSP_FEATURE_BSP_HAS_SCISPI_CLOCK (0) // Feature not available on this MCU #define BSP_FEATURE_BSP_HAS_SCI_CLOCK (0) #define BSP_FEATURE_BSP_HAS_SDADC_CLOCK (0) #define BSP_FEATURE_BSP_HAS_SECURITY_MPU (0U) @@ -186,9 +185,29 @@ #define BSP_FEATURE_CGC_LOW_VOLTAGE_MAX_FREQ_HZ (0U) // This MCU does not have Low Voltage Mode #define BSP_FEATURE_CGC_MIDDLE_SPEED_MAX_FREQ_HZ (0U) // This MCU does not have Middle Speed Mode #define BSP_FEATURE_CGC_MOCO_STABILIZATION_MAX_US (15U) -#define BSP_FEATURE_CGC_MODRV_MASK (0x30U) -#define BSP_FEATURE_CGC_MODRV_SHIFT (0x4U) -#define BSP_FEATURE_CGC_PLLCCR_MAX_HZ (200000000U) +#define BSP_FEATURE_CGC_MODRV_MASK (R_SYSTEM_MOMCR_MODRV0_Msk) +#define BSP_FEATURE_CGC_MODRV_SHIFT (R_SYSTEM_MOMCR_MODRV0_Pos) +#define BSP_FEATURE_CGC_PLL_OUT_MAX_HZ (200000000U) +#define BSP_FEATURE_CGC_PLL_OUT_P_MAX_HZ (0U) // Feature not available on this MCU +#define BSP_FEATURE_CGC_PLL_OUT_Q_MAX_HZ (0U) // Feature not available on this MCU +#define BSP_FEATURE_CGC_PLL_OUT_R_MAX_HZ (0U) // Feature not available on this MCU +#define BSP_FEATURE_CGC_PLL_OUT_MIN_HZ (120000000U) +#define BSP_FEATURE_CGC_PLL_OUT_P_MIN_HZ (0U) // Feature not available on this MCU +#define BSP_FEATURE_CGC_PLL_OUT_Q_MIN_HZ (0U) // Feature not available on this MCU +#define BSP_FEATURE_CGC_PLL_OUT_R_MIN_HZ (0U) // Feature not available on this MCU +#define BSP_FEATURE_CGC_PLL_SRC_MAX_HZ (24000000U) +#define BSP_FEATURE_CGC_PLL_SRC_MIN_HZ (8000000U) +#define BSP_FEATURE_CGC_PLL2_OUT_MAX_HZ (240000000U) +#define BSP_FEATURE_CGC_PLL2_OUT_P_MAX_HZ (0U) // Feature not available on this MCU +#define BSP_FEATURE_CGC_PLL2_OUT_Q_MAX_HZ (0U) // Feature not available on this MCU +#define BSP_FEATURE_CGC_PLL2_OUT_R_MAX_HZ (0U) // Feature not available on this MCU +#define BSP_FEATURE_CGC_PLL2_OUT_MIN_HZ (120000000U) +#define BSP_FEATURE_CGC_PLL2_OUT_P_MIN_HZ (0U) // Feature not available on this MCU +#define BSP_FEATURE_CGC_PLL2_OUT_Q_MIN_HZ (0U) // Feature not available on this MCU +#define BSP_FEATURE_CGC_PLL2_OUT_R_MIN_HZ (0U) // Feature not available on this MCU +#define BSP_FEATURE_CGC_PLL2_SRC_MAX_HZ (24000000U) +#define BSP_FEATURE_CGC_PLL2_SRC_MIN_HZ (8000000U) + #define BSP_FEATURE_CGC_PLLCCR_TYPE (1U) #define BSP_FEATURE_CGC_PLLCCR_VCO_MAX_HZ (200000000U) #define BSP_FEATURE_CGC_PLLCCR_WAIT_US (0U) // No wait between setting PLLCCR and clearing PLLSTP @@ -205,7 +224,7 @@ #define BSP_FEATURE_CRYPTO_HAS_ECC (0) #define BSP_FEATURE_CRYPTO_HAS_ECC_WRAPPED (0) #define BSP_FEATURE_CRYPTO_HAS_HASH (0) -#define BSP_FEATURE_CRYPTO_HAS_NEW_PROCS (0) // Feature not available on this MCU TODO_CHECK_FEATURE +#define BSP_FEATURE_CRYPTO_HAS_NEW_PROCS (0) // Feature not available on this MCU #define BSP_FEATURE_CRYPTO_HAS_RSA (0) #define BSP_FEATURE_CRYPTO_HAS_RSA_WRAPPED (0) #define BSP_FEATURE_CRYPTO_AES_IP_VERSION (0) @@ -245,7 +264,7 @@ #define BSP_FEATURE_ETHER_FIFO_DEPTH (0x0000070FU) #define BSP_FEATURE_ETHER_MAX_CHANNELS (1U) -#define BSP_FEATURE_ETHER_SUPPORTS_TZ_SECURE (0) // Feature not available on this MCU TODO_CHECK_FEATURE +#define BSP_FEATURE_ETHER_SUPPORTS_TZ_SECURE (0) // Feature not available on this MCU #define BSP_FEATURE_FLASH_CODE_FLASH_START (0x0U) #define BSP_FEATURE_FLASH_DATA_FLASH_START (0x08000000U) @@ -297,11 +316,11 @@ #define BSP_FEATURE_ICU_FIXED_IELSR_COUNT (0U) #define BSP_FEATURE_IIC_BUS_FREE_TIME_MULTIPLIER (0U) -#define BSP_FEATURE_IIC_B_FAST_MODE_PLUS (0) // Feature not available on this MCU TODO_CHECK_FEATURE -#define BSP_FEATURE_IIC_B_VALID_CHANNEL_MASK (0) // Feature not available on this MCU TODO_CHECK_FEATURE +#define BSP_FEATURE_IIC_B_FAST_MODE_PLUS (0) // Feature not available on this MCU +#define BSP_FEATURE_IIC_B_VALID_CHANNEL_MASK (0) // Feature not available on this MCU #define BSP_FEATURE_IIC_FAST_MODE_PLUS (1U) #define BSP_FEATURE_IIC_VALID_CHANNEL_MASK (0x03) -#define BSP_FEATURE_IIC_VERSION (0) // Feature not available on this MCU TODO_CHECK_FEATURE +#define BSP_FEATURE_IIC_VERSION (0) // Feature not available on this MCU #define BSP_FEATURE_IOPORT_ELC_PORTS (0x001EU) #define BSP_FEATURE_IOPORT_HAS_ETHERNET (1U) @@ -336,6 +355,7 @@ #define BSP_FEATURE_LPM_STANDBY_MOCO_REQUIRED (0U) #define BSP_FEATURE_LVD_HAS_DIGITAL_FILTER (1U) +#define BSP_FEATURE_LVD_HAS_EXT_MONITOR (0U) #define BSP_FEATURE_LVD_HAS_LVDLVLR (0U) #define BSP_FEATURE_LVD_MONITOR_1_HI_THRESHOLD (LVD_THRESHOLD_MONITOR_1_LEVEL_2_99V) // 2.99V #define BSP_FEATURE_LVD_MONITOR_1_LOW_THRESHOLD (LVD_THRESHOLD_MONITOR_1_LEVEL_2_85V) // 2.85V @@ -373,6 +393,7 @@ #define BSP_FEATURE_SCI_ADDRESS_MATCH_CHANNELS (0x219U) #define BSP_FEATURE_SCI_CHANNELS (0x21FU) #define BSP_FEATURE_SCI_CLOCK (FSP_PRIV_CLOCK_PCLKA) +#define BSP_FEATURE_SCI_SPI_SCKSEL_VALUE (0U) // Feature not available on this MCU #define BSP_FEATURE_SCI_UART_CSTPEN_CHANNELS (0x0219U) // Channel 0, channel 3, Channel 4, channel 9 have CSTPEN feature #define BSP_FEATURE_SCI_UART_FIFO_CHANNELS (0x219U) #define BSP_FEATURE_SCI_UART_FIFO_DEPTH (16U) @@ -389,7 +410,9 @@ #define BSP_FEATURE_SLCDC_HAS_8_TIME_SLICE (0) // Feature not available on this MCU #define BSP_FEATURE_SLCDC_HAS_INTERNAL_VOLT_GEN (0) // Feature not available on this MCU #define BSP_FEATURE_SLCDC_MAX_NUM_SEG (0) // Feature not available on this MCU -#define BSP_FEATURE_SLCDC_HAS_VL1SEL (0) +#define BSP_FEATURE_SLCDC_HAS_VL1SEL (0) // Feature not available on this MCU +#define BSP_FEATURE_SLCDC_CONTRAST_MAX_4BIAS (0) // Feature not available on this MCU +#define BSP_FEATURE_SLCDC_CONTRAST_MAX (0) // Feature not available on this MCU #define BSP_FEATURE_SPI_CLK (FSP_PRIV_CLOCK_PCLKA) #define BSP_FEATURE_SPI_HAS_SPCR3 (1U) diff --git a/ra/fsp/src/bsp/mcu/ra6e2/bsp_feature.h b/ra/fsp/src/bsp/mcu/ra6e2/bsp_feature.h index 7e15be025..e263417dd 100644 --- a/ra/fsp/src/bsp/mcu/ra6e2/bsp_feature.h +++ b/ra/fsp/src/bsp/mcu/ra6e2/bsp_feature.h @@ -86,14 +86,13 @@ #define BSP_FEATURE_ADC_VALID_UNIT_MASK (1U) #define BSP_FEATURE_AGT_AGTW_CHANNEL_COUNT (2) -#define BSP_FEATURE_AGT_MAX_CHANNEL_NUM (1) +#define BSP_FEATURE_AGT_AGT_CHANNEL_COUNT (0) #define BSP_FEATURE_AGT_USE_AGTIOSEL_ALT (0) // Indicates use of AGTIOSEL_ALT instead of AGTIOSEL #define BSP_FEATURE_AGT_VALID_CHANNEL_MASK (0x3U) #define BSP_FEATURE_BSP_FLASH_CACHE (1) #define BSP_FEATURE_BSP_FLASH_CACHE_DISABLE_OPM (0U) #define BSP_FEATURE_BSP_FLASH_PREFETCH_BUFFER (0) -#define BSP_FEATURE_BSP_HAS_ADC_CLOCK (0) #define BSP_FEATURE_BSP_HAS_CANFD_CLOCK (1) #define BSP_FEATURE_BSP_HAS_CEC_CLOCK (1) #define BSP_FEATURE_BSP_HAS_CLOCK_SUPPLY_TYPEB (0U) @@ -185,9 +184,29 @@ #define BSP_FEATURE_CGC_LOW_VOLTAGE_MAX_FREQ_HZ (0U) // This MCU does not have Low Voltage Mode #define BSP_FEATURE_CGC_MIDDLE_SPEED_MAX_FREQ_HZ (0U) // This MCU does not have Middle Speed Mode #define BSP_FEATURE_CGC_MOCO_STABILIZATION_MAX_US (15U) -#define BSP_FEATURE_CGC_MODRV_MASK (0x30U) -#define BSP_FEATURE_CGC_MODRV_SHIFT (0x4U) -#define BSP_FEATURE_CGC_PLLCCR_MAX_HZ (240000000U) +#define BSP_FEATURE_CGC_MODRV_MASK (R_SYSTEM_MOMCR_MODRV0_Msk) +#define BSP_FEATURE_CGC_MODRV_SHIFT (R_SYSTEM_MOMCR_MODRV0_Pos) +#define BSP_FEATURE_CGC_PLL_OUT_MAX_HZ (240000000U) +#define BSP_FEATURE_CGC_PLL_OUT_P_MAX_HZ (0U) // Feature not available on this MCU +#define BSP_FEATURE_CGC_PLL_OUT_Q_MAX_HZ (0U) // Feature not available on this MCU +#define BSP_FEATURE_CGC_PLL_OUT_R_MAX_HZ (0U) // Feature not available on this MCU +#define BSP_FEATURE_CGC_PLL_OUT_MIN_HZ (120000000U) +#define BSP_FEATURE_CGC_PLL_OUT_P_MIN_HZ (0U) // Feature not available on this MCU +#define BSP_FEATURE_CGC_PLL_OUT_Q_MIN_HZ (0U) // Feature not available on this MCU +#define BSP_FEATURE_CGC_PLL_OUT_R_MIN_HZ (0U) // Feature not available on this MCU +#define BSP_FEATURE_CGC_PLL_SRC_MAX_HZ (24000000U) +#define BSP_FEATURE_CGC_PLL_SRC_MIN_HZ (8000000U) +#define BSP_FEATURE_CGC_PLL2_OUT_MAX_HZ (0U) // Feature not available on this MCU +#define BSP_FEATURE_CGC_PLL2_OUT_P_MAX_HZ (0U) // Feature not available on this MCU +#define BSP_FEATURE_CGC_PLL2_OUT_Q_MAX_HZ (0U) // Feature not available on this MCU +#define BSP_FEATURE_CGC_PLL2_OUT_R_MAX_HZ (0U) // Feature not available on this MCU +#define BSP_FEATURE_CGC_PLL2_OUT_MIN_HZ (0U) // Feature not available on this MCU +#define BSP_FEATURE_CGC_PLL2_OUT_P_MIN_HZ (0U) // Feature not available on this MCU +#define BSP_FEATURE_CGC_PLL2_OUT_Q_MIN_HZ (0U) // Feature not available on this MCU +#define BSP_FEATURE_CGC_PLL2_OUT_R_MIN_HZ (0U) // Feature not available on this MCU +#define BSP_FEATURE_CGC_PLL2_SRC_MAX_HZ (0U) // Feature not available on this MCU +#define BSP_FEATURE_CGC_PLL2_SRC_MIN_HZ (0U) // Feature not available on this MCU + #define BSP_FEATURE_CGC_PLLCCR_TYPE (1U) #define BSP_FEATURE_CGC_PLLCCR_VCO_MAX_HZ (240000000U) #define BSP_FEATURE_CGC_PLLCCR_WAIT_US (0U) // No wait between setting PLLCCR and clearing PLLSTP @@ -226,7 +245,7 @@ #define BSP_FEATURE_DAC_HAS_CHARGEPUMP (0U) #define BSP_FEATURE_DAC_HAS_DAVREFCR (0U) #define BSP_FEATURE_DAC_HAS_DA_AD_SYNCHRONIZE (1U) -#define BSP_FEATURE_DAC_HAS_INTERNAL_OUTPUT (1U) +#define BSP_FEATURE_DAC_HAS_INTERNAL_OUTPUT (0U) #define BSP_FEATURE_DAC_HAS_OUTPUT_AMPLIFIER (1U) #define BSP_FEATURE_DAC_MAX_CHANNELS (2U) @@ -334,6 +353,7 @@ #define BSP_FEATURE_LPM_STANDBY_MOCO_REQUIRED (0U) #define BSP_FEATURE_LVD_HAS_DIGITAL_FILTER (1U) +#define BSP_FEATURE_LVD_HAS_EXT_MONITOR (0U) #define BSP_FEATURE_LVD_HAS_LVDLVLR (0U) #define BSP_FEATURE_LVD_MONITOR_1_HI_THRESHOLD (LVD_THRESHOLD_MONITOR_1_LEVEL_2_99V) // 2.99V #define BSP_FEATURE_LVD_MONITOR_1_LOW_THRESHOLD (LVD_THRESHOLD_MONITOR_1_LEVEL_2_85V) // 2.85V @@ -371,6 +391,7 @@ #define BSP_FEATURE_SCI_ADDRESS_MATCH_CHANNELS (0x201U) #define BSP_FEATURE_SCI_CHANNELS (0x201U) #define BSP_FEATURE_SCI_CLOCK (FSP_PRIV_CLOCK_PCLKA) +#define BSP_FEATURE_SCI_SPI_SCKSEL_VALUE (0U) // Feature not available on this MCU #define BSP_FEATURE_SCI_UART_CSTPEN_CHANNELS (0x201U) #define BSP_FEATURE_SCI_UART_FIFO_CHANNELS (0x201U) #define BSP_FEATURE_SCI_UART_FIFO_DEPTH (16U) @@ -387,6 +408,9 @@ #define BSP_FEATURE_SLCDC_HAS_8_TIME_SLICE (0) // Feature not available on this MCU #define BSP_FEATURE_SLCDC_HAS_INTERNAL_VOLT_GEN (0) // Feature not available on this MCU #define BSP_FEATURE_SLCDC_MAX_NUM_SEG (0) // Feature not available on this MCU +#define BSP_FEATURE_SLCDC_HAS_VL1SEL (0) // Feature not available on this MCU +#define BSP_FEATURE_SLCDC_CONTRAST_MAX_4BIAS (0) // Feature not available on this MCU +#define BSP_FEATURE_SLCDC_CONTRAST_MAX (0) // Feature not available on this MCU #define BSP_FEATURE_SPI_CLK (FSP_PRIV_CLOCK_PCLKA) #define BSP_FEATURE_SPI_HAS_SPCR3 (1U) diff --git a/ra/fsp/src/bsp/mcu/ra6m1/bsp_feature.h b/ra/fsp/src/bsp/mcu/ra6m1/bsp_feature.h index a62101119..fad000009 100644 --- a/ra/fsp/src/bsp/mcu/ra6m1/bsp_feature.h +++ b/ra/fsp/src/bsp/mcu/ra6m1/bsp_feature.h @@ -86,14 +86,13 @@ #define BSP_FEATURE_ADC_VALID_UNIT_MASK (3U) #define BSP_FEATURE_AGT_AGTW_CHANNEL_COUNT (0) -#define BSP_FEATURE_AGT_MAX_CHANNEL_NUM (1) +#define BSP_FEATURE_AGT_AGT_CHANNEL_COUNT (2) #define BSP_FEATURE_AGT_USE_AGTIOSEL_ALT (0) // Indicates use of AGTIOSEL_ALT instead of AGTIOSEL #define BSP_FEATURE_AGT_VALID_CHANNEL_MASK (0x03) #define BSP_FEATURE_BSP_FLASH_CACHE (1) #define BSP_FEATURE_BSP_FLASH_CACHE_DISABLE_OPM (1U) #define BSP_FEATURE_BSP_FLASH_PREFETCH_BUFFER (0) -#define BSP_FEATURE_BSP_HAS_ADC_CLOCK (0) #define BSP_FEATURE_BSP_HAS_CANFD_CLOCK (0) // Feature not available on this MCU #define BSP_FEATURE_BSP_HAS_CEC_CLOCK (0) // Feature not available on this MCU #define BSP_FEATURE_BSP_HAS_CLOCK_SUPPLY_TYPEB (0U) @@ -111,7 +110,7 @@ #define BSP_FEATURE_BSP_HAS_OFS3 (0) #define BSP_FEATURE_BSP_HAS_SCE5 (0) // Feature not available on this MCU #define BSP_FEATURE_BSP_HAS_SCE_ON_RA2 (0) // Feature not available on this MCU -#define BSP_FEATURE_BSP_HAS_SCISPI_CLOCK (0) // Feature not available on this MCU TODO_CHECK_FEATURE +#define BSP_FEATURE_BSP_HAS_SCISPI_CLOCK (0) // Feature not available on this MCU #define BSP_FEATURE_BSP_HAS_SCI_CLOCK (0) #define BSP_FEATURE_BSP_HAS_SDADC_CLOCK (0) #define BSP_FEATURE_BSP_HAS_SECURITY_MPU (1U) @@ -188,9 +187,29 @@ #define BSP_FEATURE_CGC_LOW_VOLTAGE_MAX_FREQ_HZ (0U) ///< This MCU does not have Low Voltage Mode #define BSP_FEATURE_CGC_MIDDLE_SPEED_MAX_FREQ_HZ (0U) ///< This MCU does not have Middle Speed Mode #define BSP_FEATURE_CGC_MOCO_STABILIZATION_MAX_US (15U) -#define BSP_FEATURE_CGC_MODRV_MASK (0x30U) -#define BSP_FEATURE_CGC_MODRV_SHIFT (0x4U) -#define BSP_FEATURE_CGC_PLLCCR_MAX_HZ (240000000U) +#define BSP_FEATURE_CGC_MODRV_MASK (R_SYSTEM_MOMCR_MODRV0_Msk) +#define BSP_FEATURE_CGC_MODRV_SHIFT (R_SYSTEM_MOMCR_MODRV0_Pos) +#define BSP_FEATURE_CGC_PLL_OUT_MAX_HZ (240000000U) +#define BSP_FEATURE_CGC_PLL_OUT_P_MAX_HZ (0U) // Feature not available on this MCU +#define BSP_FEATURE_CGC_PLL_OUT_Q_MAX_HZ (0U) // Feature not available on this MCU +#define BSP_FEATURE_CGC_PLL_OUT_R_MAX_HZ (0U) // Feature not available on this MCU +#define BSP_FEATURE_CGC_PLL_OUT_MIN_HZ (120000000U) +#define BSP_FEATURE_CGC_PLL_OUT_P_MIN_HZ (0U) // Feature not available on this MCU +#define BSP_FEATURE_CGC_PLL_OUT_Q_MIN_HZ (0U) // Feature not available on this MCU +#define BSP_FEATURE_CGC_PLL_OUT_R_MIN_HZ (0U) // Feature not available on this MCU +#define BSP_FEATURE_CGC_PLL_SRC_MAX_HZ (24000000U) +#define BSP_FEATURE_CGC_PLL_SRC_MIN_HZ (8000000U) +#define BSP_FEATURE_CGC_PLL2_OUT_MAX_HZ (0U) // Feature not available on this MCU +#define BSP_FEATURE_CGC_PLL2_OUT_P_MAX_HZ (0U) // Feature not available on this MCU +#define BSP_FEATURE_CGC_PLL2_OUT_Q_MAX_HZ (0U) // Feature not available on this MCU +#define BSP_FEATURE_CGC_PLL2_OUT_R_MAX_HZ (0U) // Feature not available on this MCU +#define BSP_FEATURE_CGC_PLL2_OUT_MIN_HZ (0U) // Feature not available on this MCU +#define BSP_FEATURE_CGC_PLL2_OUT_P_MIN_HZ (0U) // Feature not available on this MCU +#define BSP_FEATURE_CGC_PLL2_OUT_Q_MIN_HZ (0U) // Feature not available on this MCU +#define BSP_FEATURE_CGC_PLL2_OUT_R_MIN_HZ (0U) // Feature not available on this MCU +#define BSP_FEATURE_CGC_PLL2_SRC_MAX_HZ (0U) // Feature not available on this MCU +#define BSP_FEATURE_CGC_PLL2_SRC_MIN_HZ (0U) // Feature not available on this MCU + #define BSP_FEATURE_CGC_PLLCCR_TYPE (1U) #define BSP_FEATURE_CGC_PLLCCR_VCO_MAX_HZ (240000000U) #define BSP_FEATURE_CGC_PLLCCR_WAIT_US (0U) // No wait between setting PLLCCR and clearing PLLSTP @@ -207,7 +226,7 @@ #define BSP_FEATURE_CRYPTO_HAS_ECC (1) #define BSP_FEATURE_CRYPTO_HAS_ECC_WRAPPED (1) #define BSP_FEATURE_CRYPTO_HAS_HASH (1) -#define BSP_FEATURE_CRYPTO_HAS_NEW_PROCS (0) // Feature not available on this MCU TODO_CHECK_FEATURE +#define BSP_FEATURE_CRYPTO_HAS_NEW_PROCS (0) // Feature not available on this MCU #define BSP_FEATURE_CRYPTO_HAS_RSA (1) #define BSP_FEATURE_CRYPTO_HAS_RSA_WRAPPED (1) #define BSP_FEATURE_CRYPTO_AES_IP_VERSION (0) @@ -247,7 +266,7 @@ #define BSP_FEATURE_ETHER_FIFO_DEPTH (0) // Feature not available on this MCU #define BSP_FEATURE_ETHER_MAX_CHANNELS (0) // Feature not available on this MCU -#define BSP_FEATURE_ETHER_SUPPORTS_TZ_SECURE (0) // Feature not available on this MCU TODO_CHECK_FEATURE +#define BSP_FEATURE_ETHER_SUPPORTS_TZ_SECURE (0) // Feature not available on this MCU #define BSP_FEATURE_FLASH_CODE_FLASH_START (0x0U) #define BSP_FEATURE_FLASH_DATA_FLASH_START (0x40100000U) @@ -299,11 +318,11 @@ #define BSP_FEATURE_ICU_FIXED_IELSR_COUNT (0U) #define BSP_FEATURE_IIC_BUS_FREE_TIME_MULTIPLIER (0U) -#define BSP_FEATURE_IIC_B_FAST_MODE_PLUS (0) // Feature not available on this MCU TODO_CHECK_FEATURE -#define BSP_FEATURE_IIC_B_VALID_CHANNEL_MASK (0) // Feature not available on this MCU TODO_CHECK_FEATURE +#define BSP_FEATURE_IIC_B_FAST_MODE_PLUS (0) // Feature not available on this MCU +#define BSP_FEATURE_IIC_B_VALID_CHANNEL_MASK (0) // Feature not available on this MCU #define BSP_FEATURE_IIC_FAST_MODE_PLUS (1U) #define BSP_FEATURE_IIC_VALID_CHANNEL_MASK (0x03) -#define BSP_FEATURE_IIC_VERSION (0) // Feature not available on this MCU TODO_CHECK_FEATURE +#define BSP_FEATURE_IIC_VERSION (0) // Feature not available on this MCU #define BSP_FEATURE_IOPORT_ELC_PORTS (0x001EU) #define BSP_FEATURE_IOPORT_HAS_ETHERNET (0U) @@ -338,6 +357,7 @@ #define BSP_FEATURE_LPM_STANDBY_MOCO_REQUIRED (0U) #define BSP_FEATURE_LVD_HAS_DIGITAL_FILTER (1U) +#define BSP_FEATURE_LVD_HAS_EXT_MONITOR (0U) #define BSP_FEATURE_LVD_HAS_LVDLVLR (1U) #define BSP_FEATURE_LVD_MONITOR_1_HI_THRESHOLD (LVD_THRESHOLD_MONITOR_1_LEVEL_2_99V) // 2.99V #define BSP_FEATURE_LVD_MONITOR_1_LOW_THRESHOLD (LVD_THRESHOLD_MONITOR_1_LEVEL_2_85V) // 2.85V @@ -375,6 +395,7 @@ #define BSP_FEATURE_SCI_ADDRESS_MATCH_CHANNELS (BSP_FEATURE_SCI_CHANNELS) #define BSP_FEATURE_SCI_CHANNELS (0x31FU) #define BSP_FEATURE_SCI_CLOCK (FSP_PRIV_CLOCK_PCLKA) +#define BSP_FEATURE_SCI_SPI_SCKSEL_VALUE (0U) // Feature not available on this MCU #define BSP_FEATURE_SCI_UART_CSTPEN_CHANNELS (0x0U) #define BSP_FEATURE_SCI_UART_FIFO_CHANNELS (0x31FU) #define BSP_FEATURE_SCI_UART_FIFO_DEPTH (16U) @@ -391,7 +412,9 @@ #define BSP_FEATURE_SLCDC_HAS_8_TIME_SLICE (0) // Feature not available on this MCU #define BSP_FEATURE_SLCDC_HAS_INTERNAL_VOLT_GEN (0) // Feature not available on this MCU #define BSP_FEATURE_SLCDC_MAX_NUM_SEG (0) // Feature not available on this MCU -#define BSP_FEATURE_SLCDC_HAS_VL1SEL (0) +#define BSP_FEATURE_SLCDC_HAS_VL1SEL (0) // Feature not available on this MCU +#define BSP_FEATURE_SLCDC_CONTRAST_MAX_4BIAS (0) // Feature not available on this MCU +#define BSP_FEATURE_SLCDC_CONTRAST_MAX (0) // Feature not available on this MCU #define BSP_FEATURE_SPI_CLK (FSP_PRIV_CLOCK_PCLKA) #define BSP_FEATURE_SPI_HAS_SPCR3 (0U) diff --git a/ra/fsp/src/bsp/mcu/ra6m2/bsp_feature.h b/ra/fsp/src/bsp/mcu/ra6m2/bsp_feature.h index b0f9f85d9..1b025deff 100644 --- a/ra/fsp/src/bsp/mcu/ra6m2/bsp_feature.h +++ b/ra/fsp/src/bsp/mcu/ra6m2/bsp_feature.h @@ -86,14 +86,13 @@ #define BSP_FEATURE_ADC_VALID_UNIT_MASK (3U) #define BSP_FEATURE_AGT_AGTW_CHANNEL_COUNT (0) -#define BSP_FEATURE_AGT_MAX_CHANNEL_NUM (1) +#define BSP_FEATURE_AGT_AGT_CHANNEL_COUNT (2) #define BSP_FEATURE_AGT_USE_AGTIOSEL_ALT (0) // Indicates use of AGTIOSEL_ALT instead of AGTIOSEL #define BSP_FEATURE_AGT_VALID_CHANNEL_MASK (0x03) #define BSP_FEATURE_BSP_FLASH_CACHE (1) #define BSP_FEATURE_BSP_FLASH_CACHE_DISABLE_OPM (1U) #define BSP_FEATURE_BSP_FLASH_PREFETCH_BUFFER (0) -#define BSP_FEATURE_BSP_HAS_ADC_CLOCK (0) #define BSP_FEATURE_BSP_HAS_CANFD_CLOCK (0) // Feature not available on this MCU #define BSP_FEATURE_BSP_HAS_CEC_CLOCK (0) // Feature not available on this MCU #define BSP_FEATURE_BSP_HAS_CLOCK_SUPPLY_TYPEB (0U) @@ -111,7 +110,7 @@ #define BSP_FEATURE_BSP_HAS_OFS3 (0) #define BSP_FEATURE_BSP_HAS_SCE5 (0) // Feature not available on this MCU #define BSP_FEATURE_BSP_HAS_SCE_ON_RA2 (0) // Feature not available on this MCU -#define BSP_FEATURE_BSP_HAS_SCISPI_CLOCK (0) // Feature not available on this MCU TODO_CHECK_FEATURE +#define BSP_FEATURE_BSP_HAS_SCISPI_CLOCK (0) // Feature not available on this MCU #define BSP_FEATURE_BSP_HAS_SCI_CLOCK (0) #define BSP_FEATURE_BSP_HAS_SDADC_CLOCK (0) #define BSP_FEATURE_BSP_HAS_SECURITY_MPU (1U) @@ -188,9 +187,29 @@ #define BSP_FEATURE_CGC_LOW_VOLTAGE_MAX_FREQ_HZ (0U) // This MCU does not have Low Voltage Mode #define BSP_FEATURE_CGC_MIDDLE_SPEED_MAX_FREQ_HZ (0U) // This MCU does not have Middle Speed Mode #define BSP_FEATURE_CGC_MOCO_STABILIZATION_MAX_US (15U) -#define BSP_FEATURE_CGC_MODRV_MASK (0x30U) -#define BSP_FEATURE_CGC_MODRV_SHIFT (0x4U) -#define BSP_FEATURE_CGC_PLLCCR_MAX_HZ (240000000U) +#define BSP_FEATURE_CGC_MODRV_MASK (R_SYSTEM_MOMCR_MODRV0_Msk) +#define BSP_FEATURE_CGC_MODRV_SHIFT (R_SYSTEM_MOMCR_MODRV0_Pos) +#define BSP_FEATURE_CGC_PLL_OUT_MAX_HZ (240000000U) +#define BSP_FEATURE_CGC_PLL_OUT_P_MAX_HZ (0U) // Feature not available on this MCU +#define BSP_FEATURE_CGC_PLL_OUT_Q_MAX_HZ (0U) // Feature not available on this MCU +#define BSP_FEATURE_CGC_PLL_OUT_R_MAX_HZ (0U) // Feature not available on this MCU +#define BSP_FEATURE_CGC_PLL_OUT_MIN_HZ (120000000U) +#define BSP_FEATURE_CGC_PLL_OUT_P_MIN_HZ (0U) // Feature not available on this MCU +#define BSP_FEATURE_CGC_PLL_OUT_Q_MIN_HZ (0U) // Feature not available on this MCU +#define BSP_FEATURE_CGC_PLL_OUT_R_MIN_HZ (0U) // Feature not available on this MCU +#define BSP_FEATURE_CGC_PLL_SRC_MAX_HZ (24000000U) +#define BSP_FEATURE_CGC_PLL_SRC_MIN_HZ (8000000U) +#define BSP_FEATURE_CGC_PLL2_OUT_MAX_HZ (0U) // Feature not available on this MCU +#define BSP_FEATURE_CGC_PLL2_OUT_P_MAX_HZ (0U) // Feature not available on this MCU +#define BSP_FEATURE_CGC_PLL2_OUT_Q_MAX_HZ (0U) // Feature not available on this MCU +#define BSP_FEATURE_CGC_PLL2_OUT_R_MAX_HZ (0U) // Feature not available on this MCU +#define BSP_FEATURE_CGC_PLL2_OUT_MIN_HZ (0U) // Feature not available on this MCU +#define BSP_FEATURE_CGC_PLL2_OUT_P_MIN_HZ (0U) // Feature not available on this MCU +#define BSP_FEATURE_CGC_PLL2_OUT_Q_MIN_HZ (0U) // Feature not available on this MCU +#define BSP_FEATURE_CGC_PLL2_OUT_R_MIN_HZ (0U) // Feature not available on this MCU +#define BSP_FEATURE_CGC_PLL2_SRC_MAX_HZ (0U) // Feature not available on this MCU +#define BSP_FEATURE_CGC_PLL2_SRC_MIN_HZ (0U) // Feature not available on this MCU + #define BSP_FEATURE_CGC_PLLCCR_TYPE (1U) #define BSP_FEATURE_CGC_PLLCCR_VCO_MAX_HZ (240000000U) #define BSP_FEATURE_CGC_PLLCCR_WAIT_US (0U) // No wait between setting PLLCCR and clearing PLLSTP @@ -207,7 +226,7 @@ #define BSP_FEATURE_CRYPTO_HAS_ECC (1) #define BSP_FEATURE_CRYPTO_HAS_ECC_WRAPPED (1) #define BSP_FEATURE_CRYPTO_HAS_HASH (1) -#define BSP_FEATURE_CRYPTO_HAS_NEW_PROCS (0) // Feature not available on this MCU TODO_CHECK_FEATURE +#define BSP_FEATURE_CRYPTO_HAS_NEW_PROCS (0) // Feature not available on this MCU #define BSP_FEATURE_CRYPTO_HAS_RSA (1) #define BSP_FEATURE_CRYPTO_HAS_RSA_WRAPPED (1) #define BSP_FEATURE_CRYPTO_AES_IP_VERSION (0) @@ -247,7 +266,7 @@ #define BSP_FEATURE_ETHER_FIFO_DEPTH (0x0000070FU) #define BSP_FEATURE_ETHER_MAX_CHANNELS (1U) -#define BSP_FEATURE_ETHER_SUPPORTS_TZ_SECURE (0) // Feature not available on this MCU TODO_CHECK_FEATURE +#define BSP_FEATURE_ETHER_SUPPORTS_TZ_SECURE (0) // Feature not available on this MCU #define BSP_FEATURE_FLASH_CODE_FLASH_START (0x0U) #define BSP_FEATURE_FLASH_DATA_FLASH_START (0x40100000U) @@ -299,11 +318,11 @@ #define BSP_FEATURE_ICU_FIXED_IELSR_COUNT (0U) #define BSP_FEATURE_IIC_BUS_FREE_TIME_MULTIPLIER (0U) -#define BSP_FEATURE_IIC_B_FAST_MODE_PLUS (0) // Feature not available on this MCU TODO_CHECK_FEATURE -#define BSP_FEATURE_IIC_B_VALID_CHANNEL_MASK (0) // Feature not available on this MCU TODO_CHECK_FEATURE +#define BSP_FEATURE_IIC_B_FAST_MODE_PLUS (0) // Feature not available on this MCU +#define BSP_FEATURE_IIC_B_VALID_CHANNEL_MASK (0) // Feature not available on this MCU #define BSP_FEATURE_IIC_FAST_MODE_PLUS (1U) #define BSP_FEATURE_IIC_VALID_CHANNEL_MASK (0x07) -#define BSP_FEATURE_IIC_VERSION (0) // Feature not available on this MCU TODO_CHECK_FEATURE +#define BSP_FEATURE_IIC_VERSION (0) // Feature not available on this MCU #define BSP_FEATURE_IOPORT_ELC_PORTS (0x001EU) #define BSP_FEATURE_IOPORT_HAS_ETHERNET (1U) @@ -338,6 +357,7 @@ #define BSP_FEATURE_LPM_STANDBY_MOCO_REQUIRED (0U) #define BSP_FEATURE_LVD_HAS_DIGITAL_FILTER (1U) +#define BSP_FEATURE_LVD_HAS_EXT_MONITOR (0U) #define BSP_FEATURE_LVD_HAS_LVDLVLR (1U) #define BSP_FEATURE_LVD_MONITOR_1_HI_THRESHOLD (LVD_THRESHOLD_MONITOR_1_LEVEL_2_99V) // 2.99V #define BSP_FEATURE_LVD_MONITOR_1_LOW_THRESHOLD (LVD_THRESHOLD_MONITOR_1_LEVEL_2_85V) // 2.85V @@ -375,6 +395,7 @@ #define BSP_FEATURE_SCI_ADDRESS_MATCH_CHANNELS (BSP_FEATURE_SCI_CHANNELS) #define BSP_FEATURE_SCI_CHANNELS (0x3FFU) #define BSP_FEATURE_SCI_CLOCK (FSP_PRIV_CLOCK_PCLKA) +#define BSP_FEATURE_SCI_SPI_SCKSEL_VALUE (0U) // Feature not available on this MCU #define BSP_FEATURE_SCI_UART_CSTPEN_CHANNELS (0x0U) #define BSP_FEATURE_SCI_UART_FIFO_CHANNELS (0x3FFU) #define BSP_FEATURE_SCI_UART_FIFO_DEPTH (16U) @@ -391,7 +412,9 @@ #define BSP_FEATURE_SLCDC_HAS_8_TIME_SLICE (0) // Feature not available on this MCU #define BSP_FEATURE_SLCDC_HAS_INTERNAL_VOLT_GEN (0) // Feature not available on this MCU #define BSP_FEATURE_SLCDC_MAX_NUM_SEG (0) // Feature not available on this MCU -#define BSP_FEATURE_SLCDC_HAS_VL1SEL (0) +#define BSP_FEATURE_SLCDC_HAS_VL1SEL (0) // Feature not available on this MCU +#define BSP_FEATURE_SLCDC_CONTRAST_MAX_4BIAS (0) // Feature not available on this MCU +#define BSP_FEATURE_SLCDC_CONTRAST_MAX (0) // Feature not available on this MCU #define BSP_FEATURE_SPI_CLK (FSP_PRIV_CLOCK_PCLKA) #define BSP_FEATURE_SPI_HAS_SPCR3 (0U) diff --git a/ra/fsp/src/bsp/mcu/ra6m3/bsp_feature.h b/ra/fsp/src/bsp/mcu/ra6m3/bsp_feature.h index 7dd8eb3e0..d569170e5 100644 --- a/ra/fsp/src/bsp/mcu/ra6m3/bsp_feature.h +++ b/ra/fsp/src/bsp/mcu/ra6m3/bsp_feature.h @@ -86,14 +86,13 @@ #define BSP_FEATURE_ADC_VALID_UNIT_MASK (3U) #define BSP_FEATURE_AGT_AGTW_CHANNEL_COUNT (0) -#define BSP_FEATURE_AGT_MAX_CHANNEL_NUM (1) +#define BSP_FEATURE_AGT_AGT_CHANNEL_COUNT (2) #define BSP_FEATURE_AGT_USE_AGTIOSEL_ALT (0) // Indicates use of AGTIOSEL_ALT instead of AGTIOSEL #define BSP_FEATURE_AGT_VALID_CHANNEL_MASK (0x03) #define BSP_FEATURE_BSP_FLASH_CACHE (1) #define BSP_FEATURE_BSP_FLASH_CACHE_DISABLE_OPM (1U) #define BSP_FEATURE_BSP_FLASH_PREFETCH_BUFFER (0) -#define BSP_FEATURE_BSP_HAS_ADC_CLOCK (0) #define BSP_FEATURE_BSP_HAS_CANFD_CLOCK (0) // Feature not available on this MCU #define BSP_FEATURE_BSP_HAS_CEC_CLOCK (0) // Feature not available on this MCU #define BSP_FEATURE_BSP_HAS_CLOCK_SUPPLY_TYPEB (0U) @@ -111,7 +110,7 @@ #define BSP_FEATURE_BSP_HAS_OFS3 (0) #define BSP_FEATURE_BSP_HAS_SCE5 (0) // Feature not available on this MCU #define BSP_FEATURE_BSP_HAS_SCE_ON_RA2 (0) // Feature not available on this MCU -#define BSP_FEATURE_BSP_HAS_SCISPI_CLOCK (0) // Feature not available on this MCU TODO_CHECK_FEATURE +#define BSP_FEATURE_BSP_HAS_SCISPI_CLOCK (0) // Feature not available on this MCU #define BSP_FEATURE_BSP_HAS_SCI_CLOCK (0) #define BSP_FEATURE_BSP_HAS_SDADC_CLOCK (0) #define BSP_FEATURE_BSP_HAS_SECURITY_MPU (1U) @@ -188,9 +187,29 @@ #define BSP_FEATURE_CGC_LOW_VOLTAGE_MAX_FREQ_HZ (0U) // This MCU does not have Low Voltage Mode #define BSP_FEATURE_CGC_MIDDLE_SPEED_MAX_FREQ_HZ (0U) // This MCU does not have Middle Speed Mode #define BSP_FEATURE_CGC_MOCO_STABILIZATION_MAX_US (15U) -#define BSP_FEATURE_CGC_MODRV_MASK (0x30U) -#define BSP_FEATURE_CGC_MODRV_SHIFT (0x4U) -#define BSP_FEATURE_CGC_PLLCCR_MAX_HZ (240000000U) +#define BSP_FEATURE_CGC_MODRV_MASK (R_SYSTEM_MOMCR_MODRV0_Msk) +#define BSP_FEATURE_CGC_MODRV_SHIFT (R_SYSTEM_MOMCR_MODRV0_Pos) +#define BSP_FEATURE_CGC_PLL_OUT_MAX_HZ (240000000U) +#define BSP_FEATURE_CGC_PLL_OUT_P_MAX_HZ (0U) // Feature not available on this MCU +#define BSP_FEATURE_CGC_PLL_OUT_Q_MAX_HZ (0U) // Feature not available on this MCU +#define BSP_FEATURE_CGC_PLL_OUT_R_MAX_HZ (0U) // Feature not available on this MCU +#define BSP_FEATURE_CGC_PLL_OUT_MIN_HZ (120000000U) +#define BSP_FEATURE_CGC_PLL_OUT_P_MIN_HZ (0U) // Feature not available on this MCU +#define BSP_FEATURE_CGC_PLL_OUT_Q_MIN_HZ (0U) // Feature not available on this MCU +#define BSP_FEATURE_CGC_PLL_OUT_R_MIN_HZ (0U) // Feature not available on this MCU +#define BSP_FEATURE_CGC_PLL_SRC_MAX_HZ (24000000U) +#define BSP_FEATURE_CGC_PLL_SRC_MIN_HZ (8000000U) +#define BSP_FEATURE_CGC_PLL2_OUT_MAX_HZ (0U) // Feature not available on this MCU +#define BSP_FEATURE_CGC_PLL2_OUT_P_MAX_HZ (0U) // Feature not available on this MCU +#define BSP_FEATURE_CGC_PLL2_OUT_Q_MAX_HZ (0U) // Feature not available on this MCU +#define BSP_FEATURE_CGC_PLL2_OUT_R_MAX_HZ (0U) // Feature not available on this MCU +#define BSP_FEATURE_CGC_PLL2_OUT_MIN_HZ (0U) // Feature not available on this MCU +#define BSP_FEATURE_CGC_PLL2_OUT_P_MIN_HZ (0U) // Feature not available on this MCU +#define BSP_FEATURE_CGC_PLL2_OUT_Q_MIN_HZ (0U) // Feature not available on this MCU +#define BSP_FEATURE_CGC_PLL2_OUT_R_MIN_HZ (0U) // Feature not available on this MCU +#define BSP_FEATURE_CGC_PLL2_SRC_MAX_HZ (0U) // Feature not available on this MCU +#define BSP_FEATURE_CGC_PLL2_SRC_MIN_HZ (0U) // Feature not available on this MCU + #define BSP_FEATURE_CGC_PLLCCR_TYPE (1U) #define BSP_FEATURE_CGC_PLLCCR_VCO_MAX_HZ (240000000U) #define BSP_FEATURE_CGC_PLLCCR_WAIT_US (0U) // No wait between setting PLLCCR and clearing PLLSTP @@ -207,7 +226,7 @@ #define BSP_FEATURE_CRYPTO_HAS_ECC (1) #define BSP_FEATURE_CRYPTO_HAS_ECC_WRAPPED (1) #define BSP_FEATURE_CRYPTO_HAS_HASH (1) -#define BSP_FEATURE_CRYPTO_HAS_NEW_PROCS (0) // Feature not available on this MCU TODO_CHECK_FEATURE +#define BSP_FEATURE_CRYPTO_HAS_NEW_PROCS (0) // Feature not available on this MCU #define BSP_FEATURE_CRYPTO_HAS_RSA (1) #define BSP_FEATURE_CRYPTO_HAS_RSA_WRAPPED (1) #define BSP_FEATURE_CRYPTO_AES_IP_VERSION (0) @@ -247,7 +266,7 @@ #define BSP_FEATURE_ETHER_FIFO_DEPTH (0x0000070FU) #define BSP_FEATURE_ETHER_MAX_CHANNELS (1U) -#define BSP_FEATURE_ETHER_SUPPORTS_TZ_SECURE (0) // Feature not available on this MCU TODO_CHECK_FEATURE +#define BSP_FEATURE_ETHER_SUPPORTS_TZ_SECURE (0) // Feature not available on this MCU #define BSP_FEATURE_FLASH_CODE_FLASH_START (0x0U) #define BSP_FEATURE_FLASH_DATA_FLASH_START (0x40100000U) @@ -299,11 +318,11 @@ #define BSP_FEATURE_ICU_FIXED_IELSR_COUNT (0U) #define BSP_FEATURE_IIC_BUS_FREE_TIME_MULTIPLIER (0U) -#define BSP_FEATURE_IIC_B_FAST_MODE_PLUS (0) // Feature not available on this MCU TODO_CHECK_FEATURE -#define BSP_FEATURE_IIC_B_VALID_CHANNEL_MASK (0) // Feature not available on this MCU TODO_CHECK_FEATURE +#define BSP_FEATURE_IIC_B_FAST_MODE_PLUS (0) // Feature not available on this MCU +#define BSP_FEATURE_IIC_B_VALID_CHANNEL_MASK (0) // Feature not available on this MCU #define BSP_FEATURE_IIC_FAST_MODE_PLUS (1U) #define BSP_FEATURE_IIC_VALID_CHANNEL_MASK (0x07) -#define BSP_FEATURE_IIC_VERSION (0) // Feature not available on this MCU TODO_CHECK_FEATURE +#define BSP_FEATURE_IIC_VERSION (0) // Feature not available on this MCU #define BSP_FEATURE_IOPORT_ELC_PORTS (0x001EU) #define BSP_FEATURE_IOPORT_HAS_ETHERNET (1U) @@ -338,6 +357,7 @@ #define BSP_FEATURE_LPM_STANDBY_MOCO_REQUIRED (0U) #define BSP_FEATURE_LVD_HAS_DIGITAL_FILTER (1U) +#define BSP_FEATURE_LVD_HAS_EXT_MONITOR (0U) #define BSP_FEATURE_LVD_HAS_LVDLVLR (1U) #define BSP_FEATURE_LVD_MONITOR_1_HI_THRESHOLD (LVD_THRESHOLD_MONITOR_1_LEVEL_2_99V) // 2.99V #define BSP_FEATURE_LVD_MONITOR_1_LOW_THRESHOLD (LVD_THRESHOLD_MONITOR_1_LEVEL_2_85V) // 2.85V @@ -375,6 +395,7 @@ #define BSP_FEATURE_SCI_ADDRESS_MATCH_CHANNELS (BSP_FEATURE_SCI_CHANNELS) #define BSP_FEATURE_SCI_CHANNELS (0x3FFU) #define BSP_FEATURE_SCI_CLOCK (FSP_PRIV_CLOCK_PCLKA) +#define BSP_FEATURE_SCI_SPI_SCKSEL_VALUE (0U) // Feature not available on this MCU #define BSP_FEATURE_SCI_UART_CSTPEN_CHANNELS (0x0U) #define BSP_FEATURE_SCI_UART_FIFO_CHANNELS (0x3FFU) #define BSP_FEATURE_SCI_UART_FIFO_DEPTH (16U) @@ -391,7 +412,9 @@ #define BSP_FEATURE_SLCDC_HAS_8_TIME_SLICE (0) // Feature not available on this MCU #define BSP_FEATURE_SLCDC_HAS_INTERNAL_VOLT_GEN (0) // Feature not available on this MCU #define BSP_FEATURE_SLCDC_MAX_NUM_SEG (0) // Feature not available on this MCU -#define BSP_FEATURE_SLCDC_HAS_VL1SEL (0) +#define BSP_FEATURE_SLCDC_HAS_VL1SEL (0) // Feature not available on this MCU +#define BSP_FEATURE_SLCDC_CONTRAST_MAX_4BIAS (0) // Feature not available on this MCU +#define BSP_FEATURE_SLCDC_CONTRAST_MAX (0) // Feature not available on this MCU #define BSP_FEATURE_SPI_CLK (FSP_PRIV_CLOCK_PCLKA) #define BSP_FEATURE_SPI_HAS_SPCR3 (0U) diff --git a/ra/fsp/src/bsp/mcu/ra6m4/bsp_feature.h b/ra/fsp/src/bsp/mcu/ra6m4/bsp_feature.h index 39bcec9ad..176c7719d 100644 --- a/ra/fsp/src/bsp/mcu/ra6m4/bsp_feature.h +++ b/ra/fsp/src/bsp/mcu/ra6m4/bsp_feature.h @@ -86,14 +86,13 @@ #define BSP_FEATURE_ADC_VALID_UNIT_MASK (3U) #define BSP_FEATURE_AGT_AGTW_CHANNEL_COUNT (0) -#define BSP_FEATURE_AGT_MAX_CHANNEL_NUM (5) +#define BSP_FEATURE_AGT_AGT_CHANNEL_COUNT (6) #define BSP_FEATURE_AGT_USE_AGTIOSEL_ALT (0) // Indicates use of AGTIOSEL_ALT instead of AGTIOSEL #define BSP_FEATURE_AGT_VALID_CHANNEL_MASK (0x3F) #define BSP_FEATURE_BSP_FLASH_CACHE (1) #define BSP_FEATURE_BSP_FLASH_CACHE_DISABLE_OPM (0U) #define BSP_FEATURE_BSP_FLASH_PREFETCH_BUFFER (0) -#define BSP_FEATURE_BSP_HAS_ADC_CLOCK (0) #define BSP_FEATURE_BSP_HAS_CANFD_CLOCK (0) // Feature not available on this MCU #define BSP_FEATURE_BSP_HAS_CEC_CLOCK (0) // Feature not available on this MCU #define BSP_FEATURE_BSP_HAS_CLOCK_SUPPLY_TYPEB (0U) @@ -111,7 +110,7 @@ #define BSP_FEATURE_BSP_HAS_OFS3 (0) #define BSP_FEATURE_BSP_HAS_SCE5 (0) // Feature not available on this MCU #define BSP_FEATURE_BSP_HAS_SCE_ON_RA2 (0) // Feature not available on this MCU -#define BSP_FEATURE_BSP_HAS_SCISPI_CLOCK (0) // Feature not available on this MCU TODO_CHECK_FEATURE +#define BSP_FEATURE_BSP_HAS_SCISPI_CLOCK (0) // Feature not available on this MCU #define BSP_FEATURE_BSP_HAS_SCI_CLOCK (0) #define BSP_FEATURE_BSP_HAS_SDADC_CLOCK (0) #define BSP_FEATURE_BSP_HAS_SECURITY_MPU (0U) @@ -186,9 +185,29 @@ #define BSP_FEATURE_CGC_LOW_VOLTAGE_MAX_FREQ_HZ (0U) // This MCU does not have Low Voltage Mode #define BSP_FEATURE_CGC_MIDDLE_SPEED_MAX_FREQ_HZ (0U) // This MCU does not have Middle Speed Mode #define BSP_FEATURE_CGC_MOCO_STABILIZATION_MAX_US (15U) -#define BSP_FEATURE_CGC_MODRV_MASK (0x30U) -#define BSP_FEATURE_CGC_MODRV_SHIFT (0x4U) -#define BSP_FEATURE_CGC_PLLCCR_MAX_HZ (200000000U) +#define BSP_FEATURE_CGC_MODRV_MASK (R_SYSTEM_MOMCR_MODRV0_Msk) +#define BSP_FEATURE_CGC_MODRV_SHIFT (R_SYSTEM_MOMCR_MODRV0_Pos) +#define BSP_FEATURE_CGC_PLL_OUT_MAX_HZ (200000000U) +#define BSP_FEATURE_CGC_PLL_OUT_P_MAX_HZ (0U) // Feature not available on this MCU +#define BSP_FEATURE_CGC_PLL_OUT_Q_MAX_HZ (0U) // Feature not available on this MCU +#define BSP_FEATURE_CGC_PLL_OUT_R_MAX_HZ (0U) // Feature not available on this MCU +#define BSP_FEATURE_CGC_PLL_OUT_MIN_HZ (120000000U) +#define BSP_FEATURE_CGC_PLL_OUT_P_MIN_HZ (0U) // Feature not available on this MCU +#define BSP_FEATURE_CGC_PLL_OUT_Q_MIN_HZ (0U) // Feature not available on this MCU +#define BSP_FEATURE_CGC_PLL_OUT_R_MIN_HZ (0U) // Feature not available on this MCU +#define BSP_FEATURE_CGC_PLL_SRC_MAX_HZ (24000000U) +#define BSP_FEATURE_CGC_PLL_SRC_MIN_HZ (8000000U) +#define BSP_FEATURE_CGC_PLL2_OUT_MAX_HZ (240000000U) +#define BSP_FEATURE_CGC_PLL2_OUT_P_MAX_HZ (0U) // Feature not available on this MCU +#define BSP_FEATURE_CGC_PLL2_OUT_Q_MAX_HZ (0U) // Feature not available on this MCU +#define BSP_FEATURE_CGC_PLL2_OUT_R_MAX_HZ (0U) // Feature not available on this MCU +#define BSP_FEATURE_CGC_PLL2_OUT_MIN_HZ (120000000U) +#define BSP_FEATURE_CGC_PLL2_OUT_P_MIN_HZ (0U) // Feature not available on this MCU +#define BSP_FEATURE_CGC_PLL2_OUT_Q_MIN_HZ (0U) // Feature not available on this MCU +#define BSP_FEATURE_CGC_PLL2_OUT_R_MIN_HZ (0U) // Feature not available on this MCU +#define BSP_FEATURE_CGC_PLL2_SRC_MAX_HZ (24000000U) +#define BSP_FEATURE_CGC_PLL2_SRC_MIN_HZ (8000000U) + #define BSP_FEATURE_CGC_PLLCCR_TYPE (1U) #define BSP_FEATURE_CGC_PLLCCR_VCO_MAX_HZ (200000000U) #define BSP_FEATURE_CGC_PLLCCR_WAIT_US (0U) // No wait between setting PLLCCR and clearing PLLSTP @@ -205,7 +224,7 @@ #define BSP_FEATURE_CRYPTO_HAS_ECC (1) #define BSP_FEATURE_CRYPTO_HAS_ECC_WRAPPED (1) #define BSP_FEATURE_CRYPTO_HAS_HASH (1) -#define BSP_FEATURE_CRYPTO_HAS_NEW_PROCS (0) // Feature not available on this MCU TODO_CHECK_FEATURE +#define BSP_FEATURE_CRYPTO_HAS_NEW_PROCS (0) // Feature not available on this MCU #define BSP_FEATURE_CRYPTO_HAS_RSA (1) #define BSP_FEATURE_CRYPTO_HAS_RSA_WRAPPED (1) #define BSP_FEATURE_CRYPTO_AES_IP_VERSION (0) @@ -297,11 +316,11 @@ #define BSP_FEATURE_ICU_FIXED_IELSR_COUNT (0U) #define BSP_FEATURE_IIC_BUS_FREE_TIME_MULTIPLIER (0U) -#define BSP_FEATURE_IIC_B_FAST_MODE_PLUS (0) // Feature not available on this MCU TODO_CHECK_FEATURE -#define BSP_FEATURE_IIC_B_VALID_CHANNEL_MASK (0) // Feature not available on this MCU TODO_CHECK_FEATURE +#define BSP_FEATURE_IIC_B_FAST_MODE_PLUS (0) // Feature not available on this MCU +#define BSP_FEATURE_IIC_B_VALID_CHANNEL_MASK (0) // Feature not available on this MCU #define BSP_FEATURE_IIC_FAST_MODE_PLUS (1U << 0U) #define BSP_FEATURE_IIC_VALID_CHANNEL_MASK (0x03) -#define BSP_FEATURE_IIC_VERSION (0) // Feature not available on this MCU TODO_CHECK_FEATURE +#define BSP_FEATURE_IIC_VERSION (0) // Feature not available on this MCU #define BSP_FEATURE_IOPORT_ELC_PORTS (0x001EU) #define BSP_FEATURE_IOPORT_HAS_ETHERNET (1U) @@ -336,6 +355,7 @@ #define BSP_FEATURE_LPM_STANDBY_MOCO_REQUIRED (0U) #define BSP_FEATURE_LVD_HAS_DIGITAL_FILTER (1U) +#define BSP_FEATURE_LVD_HAS_EXT_MONITOR (0U) #define BSP_FEATURE_LVD_HAS_LVDLVLR (0U) #define BSP_FEATURE_LVD_MONITOR_1_HI_THRESHOLD (LVD_THRESHOLD_MONITOR_1_LEVEL_2_99V) // 2.99V #define BSP_FEATURE_LVD_MONITOR_1_LOW_THRESHOLD (LVD_THRESHOLD_MONITOR_1_LEVEL_2_85V) // 2.85V @@ -373,6 +393,7 @@ #define BSP_FEATURE_SCI_ADDRESS_MATCH_CHANNELS (0x3F9U) #define BSP_FEATURE_SCI_CHANNELS (0x3FFU) #define BSP_FEATURE_SCI_CLOCK (FSP_PRIV_CLOCK_PCLKA) +#define BSP_FEATURE_SCI_SPI_SCKSEL_VALUE (0U) // Feature not available on this MCU #define BSP_FEATURE_SCI_UART_CSTPEN_CHANNELS (0x03F9U) // Channel 0, channel 3 to channel 9 have CSTPEN feature #define BSP_FEATURE_SCI_UART_FIFO_CHANNELS (0x3F9U) #define BSP_FEATURE_SCI_UART_FIFO_DEPTH (16U) @@ -389,7 +410,9 @@ #define BSP_FEATURE_SLCDC_HAS_8_TIME_SLICE (0) // Feature not available on this MCU #define BSP_FEATURE_SLCDC_HAS_INTERNAL_VOLT_GEN (0) // Feature not available on this MCU #define BSP_FEATURE_SLCDC_MAX_NUM_SEG (0) // Feature not available on this MCU -#define BSP_FEATURE_SLCDC_HAS_VL1SEL (0) +#define BSP_FEATURE_SLCDC_HAS_VL1SEL (0) // Feature not available on this MCU +#define BSP_FEATURE_SLCDC_CONTRAST_MAX_4BIAS (0) // Feature not available on this MCU +#define BSP_FEATURE_SLCDC_CONTRAST_MAX (0) // Feature not available on this MCU #define BSP_FEATURE_SPI_CLK (FSP_PRIV_CLOCK_PCLKA) #define BSP_FEATURE_SPI_HAS_SPCR3 (1U) diff --git a/ra/fsp/src/bsp/mcu/ra6m5/bsp_feature.h b/ra/fsp/src/bsp/mcu/ra6m5/bsp_feature.h index f43b503dd..dbd810c3d 100644 --- a/ra/fsp/src/bsp/mcu/ra6m5/bsp_feature.h +++ b/ra/fsp/src/bsp/mcu/ra6m5/bsp_feature.h @@ -86,14 +86,13 @@ #define BSP_FEATURE_ADC_VALID_UNIT_MASK (3U) #define BSP_FEATURE_AGT_AGTW_CHANNEL_COUNT (0) -#define BSP_FEATURE_AGT_MAX_CHANNEL_NUM (5) +#define BSP_FEATURE_AGT_AGT_CHANNEL_COUNT (6) #define BSP_FEATURE_AGT_USE_AGTIOSEL_ALT (0) // Indicates use of AGTIOSEL_ALT instead of AGTIOSEL #define BSP_FEATURE_AGT_VALID_CHANNEL_MASK (0x3F) #define BSP_FEATURE_BSP_FLASH_CACHE (1) #define BSP_FEATURE_BSP_FLASH_CACHE_DISABLE_OPM (0U) #define BSP_FEATURE_BSP_FLASH_PREFETCH_BUFFER (0) -#define BSP_FEATURE_BSP_HAS_ADC_CLOCK (0) #define BSP_FEATURE_BSP_HAS_CANFD_CLOCK (1) #define BSP_FEATURE_BSP_HAS_CEC_CLOCK (1) #define BSP_FEATURE_BSP_HAS_CLOCK_SUPPLY_TYPEB (0U) @@ -111,7 +110,7 @@ #define BSP_FEATURE_BSP_HAS_OFS3 (0) #define BSP_FEATURE_BSP_HAS_SCE5 (0) // Feature not available on this MCU #define BSP_FEATURE_BSP_HAS_SCE_ON_RA2 (0) // Feature not available on this MCU -#define BSP_FEATURE_BSP_HAS_SCISPI_CLOCK (0) // Feature not available on this MCU TODO_CHECK_FEATURE +#define BSP_FEATURE_BSP_HAS_SCISPI_CLOCK (0) // Feature not available on this MCU #define BSP_FEATURE_BSP_HAS_SCI_CLOCK (0) #define BSP_FEATURE_BSP_HAS_SDADC_CLOCK (0) #define BSP_FEATURE_BSP_HAS_SECURITY_MPU (0U) @@ -186,9 +185,29 @@ #define BSP_FEATURE_CGC_LOW_VOLTAGE_MAX_FREQ_HZ (0U) // This MCU does not have Low Voltage Mode #define BSP_FEATURE_CGC_MIDDLE_SPEED_MAX_FREQ_HZ (0U) // This MCU does not have Middle Speed Mode #define BSP_FEATURE_CGC_MOCO_STABILIZATION_MAX_US (15U) -#define BSP_FEATURE_CGC_MODRV_MASK (0x30U) -#define BSP_FEATURE_CGC_MODRV_SHIFT (0x4U) -#define BSP_FEATURE_CGC_PLLCCR_MAX_HZ (200000000U) +#define BSP_FEATURE_CGC_MODRV_MASK (R_SYSTEM_MOMCR_MODRV0_Msk) +#define BSP_FEATURE_CGC_MODRV_SHIFT (R_SYSTEM_MOMCR_MODRV0_Pos) +#define BSP_FEATURE_CGC_PLL_OUT_MAX_HZ (200000000U) +#define BSP_FEATURE_CGC_PLL_OUT_P_MAX_HZ (0U) // Feature not available on this MCU +#define BSP_FEATURE_CGC_PLL_OUT_Q_MAX_HZ (0U) // Feature not available on this MCU +#define BSP_FEATURE_CGC_PLL_OUT_R_MAX_HZ (0U) // Feature not available on this MCU +#define BSP_FEATURE_CGC_PLL_OUT_MIN_HZ (120000000U) +#define BSP_FEATURE_CGC_PLL_OUT_P_MIN_HZ (0U) // Feature not available on this MCU +#define BSP_FEATURE_CGC_PLL_OUT_Q_MIN_HZ (0U) // Feature not available on this MCU +#define BSP_FEATURE_CGC_PLL_OUT_R_MIN_HZ (0U) // Feature not available on this MCU +#define BSP_FEATURE_CGC_PLL_SRC_MAX_HZ (24000000U) +#define BSP_FEATURE_CGC_PLL_SRC_MIN_HZ (8000000U) +#define BSP_FEATURE_CGC_PLL2_OUT_MAX_HZ (240000000U) +#define BSP_FEATURE_CGC_PLL2_OUT_P_MAX_HZ (0U) // Feature not available on this MCU +#define BSP_FEATURE_CGC_PLL2_OUT_Q_MAX_HZ (0U) // Feature not available on this MCU +#define BSP_FEATURE_CGC_PLL2_OUT_R_MAX_HZ (0U) // Feature not available on this MCU +#define BSP_FEATURE_CGC_PLL2_OUT_MIN_HZ (120000000U) +#define BSP_FEATURE_CGC_PLL2_OUT_P_MIN_HZ (0U) // Feature not available on this MCU +#define BSP_FEATURE_CGC_PLL2_OUT_Q_MIN_HZ (0U) // Feature not available on this MCU +#define BSP_FEATURE_CGC_PLL2_OUT_R_MIN_HZ (0U) // Feature not available on this MCU +#define BSP_FEATURE_CGC_PLL2_SRC_MAX_HZ (24000000U) +#define BSP_FEATURE_CGC_PLL2_SRC_MIN_HZ (8000000U) + #define BSP_FEATURE_CGC_PLLCCR_TYPE (1U) #define BSP_FEATURE_CGC_PLLCCR_VCO_MAX_HZ (200000000U) #define BSP_FEATURE_CGC_PLLCCR_WAIT_US (0U) // No wait between setting PLLCCR and clearing PLLSTP @@ -205,7 +224,7 @@ #define BSP_FEATURE_CRYPTO_HAS_ECC (1) #define BSP_FEATURE_CRYPTO_HAS_ECC_WRAPPED (1) #define BSP_FEATURE_CRYPTO_HAS_HASH (1) -#define BSP_FEATURE_CRYPTO_HAS_NEW_PROCS (0) // Feature not available on this MCU TODO_CHECK_FEATURE +#define BSP_FEATURE_CRYPTO_HAS_NEW_PROCS (0) // Feature not available on this MCU #define BSP_FEATURE_CRYPTO_HAS_RSA (1) #define BSP_FEATURE_CRYPTO_HAS_RSA_WRAPPED (1) #define BSP_FEATURE_CRYPTO_AES_IP_VERSION (0) @@ -297,11 +316,11 @@ #define BSP_FEATURE_ICU_FIXED_IELSR_COUNT (0U) #define BSP_FEATURE_IIC_BUS_FREE_TIME_MULTIPLIER (0U) -#define BSP_FEATURE_IIC_B_FAST_MODE_PLUS (0) // Feature not available on this MCU TODO_CHECK_FEATURE -#define BSP_FEATURE_IIC_B_VALID_CHANNEL_MASK (0) // Feature not available on this MCU TODO_CHECK_FEATURE +#define BSP_FEATURE_IIC_B_FAST_MODE_PLUS (0) // Feature not available on this MCU +#define BSP_FEATURE_IIC_B_VALID_CHANNEL_MASK (0) // Feature not available on this MCU #define BSP_FEATURE_IIC_FAST_MODE_PLUS (1U) #define BSP_FEATURE_IIC_VALID_CHANNEL_MASK (0x07) -#define BSP_FEATURE_IIC_VERSION (0) // Feature not available on this MCU TODO_CHECK_FEATURE +#define BSP_FEATURE_IIC_VERSION (0) // Feature not available on this MCU #define BSP_FEATURE_IOPORT_ELC_PORTS (0x001EU) #define BSP_FEATURE_IOPORT_HAS_ETHERNET (1U) @@ -336,6 +355,7 @@ #define BSP_FEATURE_LPM_STANDBY_MOCO_REQUIRED (0U) #define BSP_FEATURE_LVD_HAS_DIGITAL_FILTER (1U) +#define BSP_FEATURE_LVD_HAS_EXT_MONITOR (0U) #define BSP_FEATURE_LVD_HAS_LVDLVLR (0U) #define BSP_FEATURE_LVD_MONITOR_1_HI_THRESHOLD (LVD_THRESHOLD_MONITOR_1_LEVEL_2_99V) // 2.99V #define BSP_FEATURE_LVD_MONITOR_1_LOW_THRESHOLD (LVD_THRESHOLD_MONITOR_1_LEVEL_2_85V) // 2.85V @@ -373,6 +393,7 @@ #define BSP_FEATURE_SCI_ADDRESS_MATCH_CHANNELS (0x3F9U) #define BSP_FEATURE_SCI_CHANNELS (0x3FFU) #define BSP_FEATURE_SCI_CLOCK (FSP_PRIV_CLOCK_PCLKA) +#define BSP_FEATURE_SCI_SPI_SCKSEL_VALUE (0U) // Feature not available on this MCU #define BSP_FEATURE_SCI_UART_CSTPEN_CHANNELS (0x03F9U) // Channel 0, channel 3 to channel 9 have CSTPEN feature #define BSP_FEATURE_SCI_UART_FIFO_CHANNELS (0x3F9U) #define BSP_FEATURE_SCI_UART_FIFO_DEPTH (16U) @@ -389,7 +410,9 @@ #define BSP_FEATURE_SLCDC_HAS_8_TIME_SLICE (0) // Feature not available on this MCU #define BSP_FEATURE_SLCDC_HAS_INTERNAL_VOLT_GEN (0) // Feature not available on this MCU #define BSP_FEATURE_SLCDC_MAX_NUM_SEG (0) // Feature not available on this MCU -#define BSP_FEATURE_SLCDC_HAS_VL1SEL (0) +#define BSP_FEATURE_SLCDC_HAS_VL1SEL (0) // Feature not available on this MCU +#define BSP_FEATURE_SLCDC_CONTRAST_MAX_4BIAS (0) // Feature not available on this MCU +#define BSP_FEATURE_SLCDC_CONTRAST_MAX (0) // Feature not available on this MCU #define BSP_FEATURE_SPI_CLK (FSP_PRIV_CLOCK_PCLKA) #define BSP_FEATURE_SPI_HAS_SPCR3 (1U) diff --git a/ra/fsp/src/bsp/mcu/ra6t1/bsp_feature.h b/ra/fsp/src/bsp/mcu/ra6t1/bsp_feature.h index d8373198a..f92f2a529 100644 --- a/ra/fsp/src/bsp/mcu/ra6t1/bsp_feature.h +++ b/ra/fsp/src/bsp/mcu/ra6t1/bsp_feature.h @@ -86,14 +86,13 @@ #define BSP_FEATURE_ADC_VALID_UNIT_MASK (3U) #define BSP_FEATURE_AGT_AGTW_CHANNEL_COUNT (0) -#define BSP_FEATURE_AGT_MAX_CHANNEL_NUM (1) +#define BSP_FEATURE_AGT_AGT_CHANNEL_COUNT (2) #define BSP_FEATURE_AGT_USE_AGTIOSEL_ALT (0) // Indicates use of AGTIOSEL_ALT instead of AGTIOSEL #define BSP_FEATURE_AGT_VALID_CHANNEL_MASK (0x03) #define BSP_FEATURE_BSP_FLASH_CACHE (1) #define BSP_FEATURE_BSP_FLASH_CACHE_DISABLE_OPM (1U) #define BSP_FEATURE_BSP_FLASH_PREFETCH_BUFFER (0) -#define BSP_FEATURE_BSP_HAS_ADC_CLOCK (0) #define BSP_FEATURE_BSP_HAS_CANFD_CLOCK (0) // Feature not available on this MCU #define BSP_FEATURE_BSP_HAS_CEC_CLOCK (0) // Feature not available on this MCU #define BSP_FEATURE_BSP_HAS_CLOCK_SUPPLY_TYPEB (0U) @@ -111,7 +110,7 @@ #define BSP_FEATURE_BSP_HAS_OFS3 (0) #define BSP_FEATURE_BSP_HAS_SCE5 (0) // Feature not available on this MCU #define BSP_FEATURE_BSP_HAS_SCE_ON_RA2 (0) // Feature not available on this MCU -#define BSP_FEATURE_BSP_HAS_SCISPI_CLOCK (0) // Feature not available on this MCU TODO_CHECK_FEATURE +#define BSP_FEATURE_BSP_HAS_SCISPI_CLOCK (0) // Feature not available on this MCU #define BSP_FEATURE_BSP_HAS_SCI_CLOCK (0) #define BSP_FEATURE_BSP_HAS_SDADC_CLOCK (0) #define BSP_FEATURE_BSP_HAS_SECURITY_MPU (1U) @@ -188,9 +187,29 @@ #define BSP_FEATURE_CGC_LOW_VOLTAGE_MAX_FREQ_HZ (0U) ///< This MCU does not have Low Voltage Mode #define BSP_FEATURE_CGC_MIDDLE_SPEED_MAX_FREQ_HZ (0U) ///< This MCU does not have Middle Speed Mode #define BSP_FEATURE_CGC_MOCO_STABILIZATION_MAX_US (15U) -#define BSP_FEATURE_CGC_MODRV_MASK (0x30U) -#define BSP_FEATURE_CGC_MODRV_SHIFT (0x4U) -#define BSP_FEATURE_CGC_PLLCCR_MAX_HZ (240000000U) +#define BSP_FEATURE_CGC_MODRV_MASK (R_SYSTEM_MOMCR_MODRV0_Msk) +#define BSP_FEATURE_CGC_MODRV_SHIFT (R_SYSTEM_MOMCR_MODRV0_Pos) +#define BSP_FEATURE_CGC_PLL_OUT_MAX_HZ (240000000U) +#define BSP_FEATURE_CGC_PLL_OUT_P_MAX_HZ (0U) // Feature not available on this MCU +#define BSP_FEATURE_CGC_PLL_OUT_Q_MAX_HZ (0U) // Feature not available on this MCU +#define BSP_FEATURE_CGC_PLL_OUT_R_MAX_HZ (0U) // Feature not available on this MCU +#define BSP_FEATURE_CGC_PLL_OUT_MIN_HZ (120000000U) +#define BSP_FEATURE_CGC_PLL_OUT_P_MIN_HZ (0U) // Feature not available on this MCU +#define BSP_FEATURE_CGC_PLL_OUT_Q_MIN_HZ (0U) // Feature not available on this MCU +#define BSP_FEATURE_CGC_PLL_OUT_R_MIN_HZ (0U) // Feature not available on this MCU +#define BSP_FEATURE_CGC_PLL_SRC_MAX_HZ (24000000U) +#define BSP_FEATURE_CGC_PLL_SRC_MIN_HZ (8000000U) +#define BSP_FEATURE_CGC_PLL2_OUT_MAX_HZ (0U) // Feature not available on this MCU +#define BSP_FEATURE_CGC_PLL2_OUT_P_MAX_HZ (0U) // Feature not available on this MCU +#define BSP_FEATURE_CGC_PLL2_OUT_Q_MAX_HZ (0U) // Feature not available on this MCU +#define BSP_FEATURE_CGC_PLL2_OUT_R_MAX_HZ (0U) // Feature not available on this MCU +#define BSP_FEATURE_CGC_PLL2_OUT_MIN_HZ (0U) // Feature not available on this MCU +#define BSP_FEATURE_CGC_PLL2_OUT_P_MIN_HZ (0U) // Feature not available on this MCU +#define BSP_FEATURE_CGC_PLL2_OUT_Q_MIN_HZ (0U) // Feature not available on this MCU +#define BSP_FEATURE_CGC_PLL2_OUT_R_MIN_HZ (0U) // Feature not available on this MCU +#define BSP_FEATURE_CGC_PLL2_SRC_MAX_HZ (0U) // Feature not available on this MCU +#define BSP_FEATURE_CGC_PLL2_SRC_MIN_HZ (0U) // Feature not available on this MCU + #define BSP_FEATURE_CGC_PLLCCR_TYPE (1U) #define BSP_FEATURE_CGC_PLLCCR_VCO_MAX_HZ (240000000U) #define BSP_FEATURE_CGC_PLLCCR_WAIT_US (0U) // No wait between setting PLLCCR and clearing PLLSTP @@ -207,7 +226,7 @@ #define BSP_FEATURE_CRYPTO_HAS_ECC (1) #define BSP_FEATURE_CRYPTO_HAS_ECC_WRAPPED (1) #define BSP_FEATURE_CRYPTO_HAS_HASH (1) -#define BSP_FEATURE_CRYPTO_HAS_NEW_PROCS (0) // Feature not available on this MCU TODO_CHECK_FEATURE +#define BSP_FEATURE_CRYPTO_HAS_NEW_PROCS (0) // Feature not available on this MCU #define BSP_FEATURE_CRYPTO_HAS_RSA (1) #define BSP_FEATURE_CRYPTO_HAS_RSA_WRAPPED (1) #define BSP_FEATURE_CRYPTO_AES_IP_VERSION (0) @@ -247,7 +266,7 @@ #define BSP_FEATURE_ETHER_FIFO_DEPTH (0) // Feature not available on this MCU #define BSP_FEATURE_ETHER_MAX_CHANNELS (0) // Feature not available on this MCU -#define BSP_FEATURE_ETHER_SUPPORTS_TZ_SECURE (0) // Feature not available on this MCU TODO_CHECK_FEATURE +#define BSP_FEATURE_ETHER_SUPPORTS_TZ_SECURE (0) // Feature not available on this MCU #define BSP_FEATURE_FLASH_CODE_FLASH_START (0x0U) #define BSP_FEATURE_FLASH_DATA_FLASH_START (0x40100000U) @@ -299,11 +318,11 @@ #define BSP_FEATURE_ICU_FIXED_IELSR_COUNT (0U) #define BSP_FEATURE_IIC_BUS_FREE_TIME_MULTIPLIER (0U) -#define BSP_FEATURE_IIC_B_FAST_MODE_PLUS (0) // Feature not available on this MCU TODO_CHECK_FEATURE -#define BSP_FEATURE_IIC_B_VALID_CHANNEL_MASK (0) // Feature not available on this MCU TODO_CHECK_FEATURE +#define BSP_FEATURE_IIC_B_FAST_MODE_PLUS (0) // Feature not available on this MCU +#define BSP_FEATURE_IIC_B_VALID_CHANNEL_MASK (0) // Feature not available on this MCU #define BSP_FEATURE_IIC_FAST_MODE_PLUS (1U) #define BSP_FEATURE_IIC_VALID_CHANNEL_MASK (0x03) -#define BSP_FEATURE_IIC_VERSION (0) // Feature not available on this MCU TODO_CHECK_FEATURE +#define BSP_FEATURE_IIC_VERSION (0) // Feature not available on this MCU #define BSP_FEATURE_IOPORT_ELC_PORTS (0x001EU) #define BSP_FEATURE_IOPORT_HAS_ETHERNET (0U) @@ -338,6 +357,7 @@ #define BSP_FEATURE_LPM_STANDBY_MOCO_REQUIRED (0U) #define BSP_FEATURE_LVD_HAS_DIGITAL_FILTER (1U) +#define BSP_FEATURE_LVD_HAS_EXT_MONITOR (0U) #define BSP_FEATURE_LVD_HAS_LVDLVLR (1U) #define BSP_FEATURE_LVD_MONITOR_1_HI_THRESHOLD (LVD_THRESHOLD_MONITOR_1_LEVEL_2_99V) // 2.99V #define BSP_FEATURE_LVD_MONITOR_1_LOW_THRESHOLD (LVD_THRESHOLD_MONITOR_1_LEVEL_2_85V) // 2.85V @@ -375,6 +395,7 @@ #define BSP_FEATURE_SCI_ADDRESS_MATCH_CHANNELS (BSP_FEATURE_SCI_CHANNELS) #define BSP_FEATURE_SCI_CHANNELS (0x31FU) #define BSP_FEATURE_SCI_CLOCK (FSP_PRIV_CLOCK_PCLKA) +#define BSP_FEATURE_SCI_SPI_SCKSEL_VALUE (0U) // Feature not available on this MCU #define BSP_FEATURE_SCI_UART_CSTPEN_CHANNELS (0x0U) #define BSP_FEATURE_SCI_UART_FIFO_CHANNELS (0x31FU) #define BSP_FEATURE_SCI_UART_FIFO_DEPTH (16U) @@ -391,7 +412,9 @@ #define BSP_FEATURE_SLCDC_HAS_8_TIME_SLICE (0) // Feature not available on this MCU #define BSP_FEATURE_SLCDC_HAS_INTERNAL_VOLT_GEN (0) // Feature not available on this MCU #define BSP_FEATURE_SLCDC_MAX_NUM_SEG (0) // Feature not available on this MCU -#define BSP_FEATURE_SLCDC_HAS_VL1SEL (0) +#define BSP_FEATURE_SLCDC_HAS_VL1SEL (0) // Feature not available on this MCU +#define BSP_FEATURE_SLCDC_CONTRAST_MAX_4BIAS (0) // Feature not available on this MCU +#define BSP_FEATURE_SLCDC_CONTRAST_MAX (0) // Feature not available on this MCU #define BSP_FEATURE_SPI_CLK (FSP_PRIV_CLOCK_PCLKA) #define BSP_FEATURE_SPI_HAS_SPCR3 (0U) diff --git a/ra/fsp/src/bsp/mcu/ra6t2/bsp_feature.h b/ra/fsp/src/bsp/mcu/ra6t2/bsp_feature.h index de6367090..e0439a9e5 100644 --- a/ra/fsp/src/bsp/mcu/ra6t2/bsp_feature.h +++ b/ra/fsp/src/bsp/mcu/ra6t2/bsp_feature.h @@ -86,14 +86,13 @@ #define BSP_FEATURE_ADC_VALID_UNIT_MASK (0U) #define BSP_FEATURE_AGT_AGTW_CHANNEL_COUNT (2) -#define BSP_FEATURE_AGT_MAX_CHANNEL_NUM (1) +#define BSP_FEATURE_AGT_AGT_CHANNEL_COUNT (0) #define BSP_FEATURE_AGT_USE_AGTIOSEL_ALT (0) // Indicates use of AGTIOSEL_ALT instead of AGTIOSEL #define BSP_FEATURE_AGT_VALID_CHANNEL_MASK (0x3U) #define BSP_FEATURE_BSP_FLASH_CACHE (1) #define BSP_FEATURE_BSP_FLASH_CACHE_DISABLE_OPM (0U) #define BSP_FEATURE_BSP_FLASH_PREFETCH_BUFFER (0) -#define BSP_FEATURE_BSP_HAS_ADC_CLOCK (0) #define BSP_FEATURE_BSP_HAS_CANFD_CLOCK (1U) #define BSP_FEATURE_BSP_HAS_CEC_CLOCK (0) // Feature not available on this MCU #define BSP_FEATURE_BSP_HAS_CLOCK_SUPPLY_TYPEB (0U) @@ -186,9 +185,29 @@ #define BSP_FEATURE_CGC_LOW_VOLTAGE_MAX_FREQ_HZ (0U) // This MCU does not have Low Voltage Mode #define BSP_FEATURE_CGC_MIDDLE_SPEED_MAX_FREQ_HZ (0U) // This MCU does not have Middle Speed Mode #define BSP_FEATURE_CGC_MOCO_STABILIZATION_MAX_US (15U) -#define BSP_FEATURE_CGC_MODRV_MASK (0x30U) -#define BSP_FEATURE_CGC_MODRV_SHIFT (0x4U) -#define BSP_FEATURE_CGC_PLLCCR_MAX_HZ (240000000U) +#define BSP_FEATURE_CGC_MODRV_MASK (R_SYSTEM_MOMCR_MODRV0_Msk) +#define BSP_FEATURE_CGC_MODRV_SHIFT (R_SYSTEM_MOMCR_MODRV0_Pos) +#define BSP_FEATURE_CGC_PLL_OUT_MAX_HZ (240000000U) +#define BSP_FEATURE_CGC_PLL_OUT_P_MAX_HZ (0U) // Feature not available on this MCU +#define BSP_FEATURE_CGC_PLL_OUT_Q_MAX_HZ (0U) // Feature not available on this MCU +#define BSP_FEATURE_CGC_PLL_OUT_R_MAX_HZ (0U) // Feature not available on this MCU +#define BSP_FEATURE_CGC_PLL_OUT_MIN_HZ (120000000U) +#define BSP_FEATURE_CGC_PLL_OUT_P_MIN_HZ (0U) // Feature not available on this MCU +#define BSP_FEATURE_CGC_PLL_OUT_Q_MIN_HZ (0U) // Feature not available on this MCU +#define BSP_FEATURE_CGC_PLL_OUT_R_MIN_HZ (0U) // Feature not available on this MCU +#define BSP_FEATURE_CGC_PLL_SRC_MAX_HZ (24000000U) +#define BSP_FEATURE_CGC_PLL_SRC_MIN_HZ (8000000U) +#define BSP_FEATURE_CGC_PLL2_OUT_MAX_HZ (240000000U) +#define BSP_FEATURE_CGC_PLL_OUT_P_MAX_HZ (0U) // Feature not available on this MCU +#define BSP_FEATURE_CGC_PLL_OUT_Q_MAX_HZ (0U) // Feature not available on this MCU +#define BSP_FEATURE_CGC_PLL_OUT_R_MAX_HZ (0U) // Feature not available on this MCU +#define BSP_FEATURE_CGC_PLL2_OUT_MIN_HZ (120000000U) +#define BSP_FEATURE_CGC_PLL_OUT_P_MIN_HZ (0U) // Feature not available on this MCU +#define BSP_FEATURE_CGC_PLL_OUT_Q_MIN_HZ (0U) // Feature not available on this MCU +#define BSP_FEATURE_CGC_PLL_OUT_R_MIN_HZ (0U) // Feature not available on this MCU +#define BSP_FEATURE_CGC_PLL2_SRC_MAX_HZ (24000000U) +#define BSP_FEATURE_CGC_PLL2_SRC_MIN_HZ (8000000U) + #define BSP_FEATURE_CGC_PLLCCR_TYPE (1U) #define BSP_FEATURE_CGC_PLLCCR_VCO_MAX_HZ (240000000U) #define BSP_FEATURE_CGC_PLLCCR_WAIT_US (0U) // No wait between setting PLLCCR and clearing PLLSTP @@ -205,7 +224,7 @@ #define BSP_FEATURE_CRYPTO_HAS_ECC (0) #define BSP_FEATURE_CRYPTO_HAS_ECC_WRAPPED (0) #define BSP_FEATURE_CRYPTO_HAS_HASH (0) -#define BSP_FEATURE_CRYPTO_HAS_NEW_PROCS (0) // Feature not available on this MCU TODO_CHECK_FEATURE +#define BSP_FEATURE_CRYPTO_HAS_NEW_PROCS (0) // Feature not available on this MCU #define BSP_FEATURE_CRYPTO_HAS_RSA (0) #define BSP_FEATURE_CRYPTO_HAS_RSA_WRAPPED (0) #define BSP_FEATURE_CRYPTO_AES_IP_VERSION (0) @@ -245,7 +264,7 @@ #define BSP_FEATURE_ETHER_FIFO_DEPTH (0U) // Feature not available on this MCU #define BSP_FEATURE_ETHER_MAX_CHANNELS (0U) // Feature not available on this MCU -#define BSP_FEATURE_ETHER_SUPPORTS_TZ_SECURE (0) // Feature not available on this MCU TODO_CHECK_FEATURE +#define BSP_FEATURE_ETHER_SUPPORTS_TZ_SECURE (0) // Feature not available on this MCU #define BSP_FEATURE_FLASH_CODE_FLASH_START (0x0U) #define BSP_FEATURE_FLASH_DATA_FLASH_START (0x08000000U) @@ -285,9 +304,9 @@ #define BSP_FEATURE_GPT_TPCS_SHIFT (0U) #define BSP_FEATURE_GPT_VALID_CHANNEL_MASK (0x3FFU) -#define BSP_FEATURE_I3C_MAX_DEV_COUNT (0) // Feature not available on this MCU TODO_CHECK_FEATURE -#define BSP_FEATURE_I3C_NTDTBP0_DEPTH (0) // Feature not available on this MCU TODO_CHECK_FEATURE -#define BSP_FEATURE_I3C_NUM_CHANNELS (0) // Feature not available on this MCU TODO_CHECK_FEATURE +#define BSP_FEATURE_I3C_MAX_DEV_COUNT (0) // Feature not available on this MCU +#define BSP_FEATURE_I3C_NTDTBP0_DEPTH (0) // Feature not available on this MCU +#define BSP_FEATURE_I3C_NUM_CHANNELS (0) // Feature not available on this MCU #define BSP_FEATURE_I3C_MSTP_OFFSET (0U) // Feature not available on this MCU #define BSP_FEATURE_ICU_HAS_INTERRUPT_GROUPS (0U) @@ -299,9 +318,9 @@ #define BSP_FEATURE_IIC_BUS_FREE_TIME_MULTIPLIER (5U) #define BSP_FEATURE_IIC_B_FAST_MODE_PLUS (0x03) #define BSP_FEATURE_IIC_B_VALID_CHANNEL_MASK (0x03) -#define BSP_FEATURE_IIC_FAST_MODE_PLUS (0) // Feature not available on this MCU TODO_CHECK_FEATURE -#define BSP_FEATURE_IIC_VALID_CHANNEL_MASK (0) // Feature not available on this MCU TODO_CHECK_FEATURE -#define BSP_FEATURE_IIC_VERSION (0) // Feature not available on this MCU TODO_CHECK_FEATURE +#define BSP_FEATURE_IIC_FAST_MODE_PLUS (0) // Feature not available on this MCU +#define BSP_FEATURE_IIC_VALID_CHANNEL_MASK (0) // Feature not available on this MCU +#define BSP_FEATURE_IIC_VERSION (0) // Feature not available on this MCU #define BSP_FEATURE_IOPORT_ELC_PORTS (0x7800U) #define BSP_FEATURE_IOPORT_HAS_ETHERNET (0U) @@ -336,6 +355,7 @@ #define BSP_FEATURE_LPM_STANDBY_MOCO_REQUIRED (0U) #define BSP_FEATURE_LVD_HAS_DIGITAL_FILTER (1U) +#define BSP_FEATURE_LVD_HAS_EXT_MONITOR (0U) #define BSP_FEATURE_LVD_HAS_LVDLVLR (0U) #define BSP_FEATURE_LVD_MONITOR_1_HI_THRESHOLD (LVD_THRESHOLD_MONITOR_1_LEVEL_2_99V) // 2.99V #define BSP_FEATURE_LVD_MONITOR_1_LOW_THRESHOLD (LVD_THRESHOLD_MONITOR_1_LEVEL_2_85V) // 2.85V @@ -373,7 +393,9 @@ #define BSP_FEATURE_SCI_ADDRESS_MATCH_CHANNELS (0U) #define BSP_FEATURE_SCI_CHANNELS (0x21FU) #define BSP_FEATURE_SCI_CLOCK (FSP_PRIV_CLOCK_PCLKA) +#define BSP_FEATURE_SCI_SPI_SCKSEL_VALUE (0U) // Feature not available on this MCU #define BSP_FEATURE_SCI_UART_CSTPEN_CHANNELS (0x21FU) +#define BSP_FEATURE_SCI_UART_DE_IS_INVERTED (1) #define BSP_FEATURE_SCI_UART_FIFO_CHANNELS (0x21FU) #define BSP_FEATURE_SCI_UART_FIFO_DEPTH (16U) #define BSP_FEATURE_SCI_VERSION (2U) @@ -389,7 +411,9 @@ #define BSP_FEATURE_SLCDC_HAS_8_TIME_SLICE (0) // Feature not available on this MCU #define BSP_FEATURE_SLCDC_HAS_INTERNAL_VOLT_GEN (0) // Feature not available on this MCU #define BSP_FEATURE_SLCDC_MAX_NUM_SEG (0) // Feature not available on this MCU -#define BSP_FEATURE_SLCDC_HAS_VL1SEL (0) +#define BSP_FEATURE_SLCDC_HAS_VL1SEL (0) // Feature not available on this MCU +#define BSP_FEATURE_SLCDC_CONTRAST_MAX_4BIAS (0) // Feature not available on this MCU +#define BSP_FEATURE_SLCDC_CONTRAST_MAX (0) // Feature not available on this MCU #define BSP_FEATURE_SPI_CLK (FSP_PRIV_CLOCK_PCLKA) #define BSP_FEATURE_SPI_HAS_SPCR3 (1U) diff --git a/ra/fsp/src/bsp/mcu/ra6t3/bsp_feature.h b/ra/fsp/src/bsp/mcu/ra6t3/bsp_feature.h index 347d9aa71..5020afa84 100644 --- a/ra/fsp/src/bsp/mcu/ra6t3/bsp_feature.h +++ b/ra/fsp/src/bsp/mcu/ra6t3/bsp_feature.h @@ -86,14 +86,13 @@ #define BSP_FEATURE_ADC_VALID_UNIT_MASK (1U) #define BSP_FEATURE_AGT_AGTW_CHANNEL_COUNT (2) -#define BSP_FEATURE_AGT_MAX_CHANNEL_NUM (1) +#define BSP_FEATURE_AGT_AGT_CHANNEL_COUNT (0) #define BSP_FEATURE_AGT_USE_AGTIOSEL_ALT (0) // Indicates use of AGTIOSEL_ALT instead of AGTIOSEL #define BSP_FEATURE_AGT_VALID_CHANNEL_MASK (0x3U) #define BSP_FEATURE_BSP_FLASH_CACHE (1) #define BSP_FEATURE_BSP_FLASH_CACHE_DISABLE_OPM (0U) #define BSP_FEATURE_BSP_FLASH_PREFETCH_BUFFER (0) -#define BSP_FEATURE_BSP_HAS_ADC_CLOCK (0) #define BSP_FEATURE_BSP_HAS_CANFD_CLOCK (1) #define BSP_FEATURE_BSP_HAS_CEC_CLOCK (0) // Feature not available on this MCU #define BSP_FEATURE_BSP_HAS_CLOCK_SUPPLY_TYPEB (0U) @@ -186,9 +185,29 @@ #define BSP_FEATURE_CGC_LOW_VOLTAGE_MAX_FREQ_HZ (0U) // This MCU does not have Low Voltage Mode #define BSP_FEATURE_CGC_MIDDLE_SPEED_MAX_FREQ_HZ (0U) // This MCU does not have Middle Speed Mode #define BSP_FEATURE_CGC_MOCO_STABILIZATION_MAX_US (15U) -#define BSP_FEATURE_CGC_MODRV_MASK (0x30U) -#define BSP_FEATURE_CGC_MODRV_SHIFT (0x4U) -#define BSP_FEATURE_CGC_PLLCCR_MAX_HZ (240000000U) +#define BSP_FEATURE_CGC_MODRV_MASK (R_SYSTEM_MOMCR_MODRV0_Msk) +#define BSP_FEATURE_CGC_MODRV_SHIFT (R_SYSTEM_MOMCR_MODRV0_Pos) +#define BSP_FEATURE_CGC_PLL_OUT_MAX_HZ (240000000U) +#define BSP_FEATURE_CGC_PLL_OUT_P_MAX_HZ (0U) // Feature not available on this MCU +#define BSP_FEATURE_CGC_PLL_OUT_Q_MAX_HZ (0U) // Feature not available on this MCU +#define BSP_FEATURE_CGC_PLL_OUT_R_MAX_HZ (0U) // Feature not available on this MCU +#define BSP_FEATURE_CGC_PLL_OUT_MIN_HZ (120000000U) +#define BSP_FEATURE_CGC_PLL_OUT_P_MIN_HZ (0U) // Feature not available on this MCU +#define BSP_FEATURE_CGC_PLL_OUT_Q_MIN_HZ (0U) // Feature not available on this MCU +#define BSP_FEATURE_CGC_PLL_OUT_R_MIN_HZ (0U) // Feature not available on this MCU +#define BSP_FEATURE_CGC_PLL_SRC_MAX_HZ (24000000U) +#define BSP_FEATURE_CGC_PLL_SRC_MIN_HZ (8000000U) +#define BSP_FEATURE_CGC_PLL2_OUT_MAX_HZ (0U) // Feature not available on this MCU +#define BSP_FEATURE_CGC_PLL2_OUT_P_MAX_HZ (0U) // Feature not available on this MCU +#define BSP_FEATURE_CGC_PLL2_OUT_Q_MAX_HZ (0U) // Feature not available on this MCU +#define BSP_FEATURE_CGC_PLL2_OUT_R_MAX_HZ (0U) // Feature not available on this MCU +#define BSP_FEATURE_CGC_PLL2_OUT_MIN_HZ (0U) // Feature not available on this MCU +#define BSP_FEATURE_CGC_PLL2_OUT_P_MIN_HZ (0U) // Feature not available on this MCU +#define BSP_FEATURE_CGC_PLL2_OUT_Q_MIN_HZ (0U) // Feature not available on this MCU +#define BSP_FEATURE_CGC_PLL2_OUT_R_MIN_HZ (0U) // Feature not available on this MCU +#define BSP_FEATURE_CGC_PLL2_SRC_MAX_HZ (0U) // Feature not available on this MCU +#define BSP_FEATURE_CGC_PLL2_SRC_MIN_HZ (0U) // Feature not available on this MCU + #define BSP_FEATURE_CGC_PLLCCR_TYPE (1U) #define BSP_FEATURE_CGC_PLLCCR_VCO_MAX_HZ (240000000U) #define BSP_FEATURE_CGC_PLLCCR_WAIT_US (0U) // No wait between setting PLLCCR and clearing PLLSTP @@ -336,6 +355,7 @@ #define BSP_FEATURE_LPM_STANDBY_MOCO_REQUIRED (0U) #define BSP_FEATURE_LVD_HAS_DIGITAL_FILTER (1U) +#define BSP_FEATURE_LVD_HAS_EXT_MONITOR (0U) #define BSP_FEATURE_LVD_HAS_LVDLVLR (0U) #define BSP_FEATURE_LVD_MONITOR_1_HI_THRESHOLD (LVD_THRESHOLD_MONITOR_1_LEVEL_2_99V) // 2.99V #define BSP_FEATURE_LVD_MONITOR_1_LOW_THRESHOLD (LVD_THRESHOLD_MONITOR_1_LEVEL_2_85V) // 2.85V @@ -373,6 +393,7 @@ #define BSP_FEATURE_SCI_ADDRESS_MATCH_CHANNELS (0x201U) #define BSP_FEATURE_SCI_CHANNELS (0x201U) #define BSP_FEATURE_SCI_CLOCK (FSP_PRIV_CLOCK_PCLKA) +#define BSP_FEATURE_SCI_SPI_SCKSEL_VALUE (0U) // Feature not available on this MCU #define BSP_FEATURE_SCI_UART_CSTPEN_CHANNELS (0x201U) #define BSP_FEATURE_SCI_UART_FIFO_CHANNELS (0x201U) #define BSP_FEATURE_SCI_UART_FIFO_DEPTH (16U) @@ -389,7 +410,9 @@ #define BSP_FEATURE_SLCDC_HAS_8_TIME_SLICE (0) // Feature not available on this MCU #define BSP_FEATURE_SLCDC_HAS_INTERNAL_VOLT_GEN (0) // Feature not available on this MCU #define BSP_FEATURE_SLCDC_MAX_NUM_SEG (0) // Feature not available on this MCU -#define BSP_FEATURE_SLCDC_HAS_VL1SEL (0) +#define BSP_FEATURE_SLCDC_HAS_VL1SEL (0) // Feature not available on this MCU +#define BSP_FEATURE_SLCDC_CONTRAST_MAX_4BIAS (0) // Feature not available on this MCU +#define BSP_FEATURE_SLCDC_CONTRAST_MAX (0) // Feature not available on this MCU #define BSP_FEATURE_SPI_CLK (FSP_PRIV_CLOCK_PCLKA) #define BSP_FEATURE_SPI_HAS_SPCR3 (1U) diff --git a/ra/fsp/src/r_adc/r_adc.c b/ra/fsp/src/r_adc/r_adc.c index 019d06559..bf25fd4f4 100644 --- a/ra/fsp/src/r_adc/r_adc.c +++ b/ra/fsp/src/r_adc/r_adc.c @@ -623,7 +623,7 @@ fsp_err_t R_ADC_InfoGet (adc_ctrl_t * p_ctrl, adc_info_t * p_adc_info) * 2 bits. */ uint32_t adc_mask_in_order = adc_mask & ~(uint32_t) ADC_MASK_SENSORS; adc_mask_in_order <<= 3U; - adc_mask_in_order |= adc_mask >> 28U; + adc_mask_in_order |= adc_mask >> 29U; int32_t lowest_channel = r_adc_lowest_channel_get(adc_mask_in_order); p_adc_info->p_address = &p_instance_ctrl->p_reg->ADDR[lowest_channel - 3]; @@ -1514,12 +1514,12 @@ static void r_adc_scan_cfg (adc_instance_ctrl_t * const p_instance_ctrl, adc_cha /* Set Window A channel mask */ p_instance_ctrl->p_reg->ADCMPANSR[0] = p_window_cfg->compare_mask & UINT16_MAX; p_instance_ctrl->p_reg->ADCMPANSR[1] = (uint16_t) ((p_window_cfg->compare_mask << 4) >> 20); - p_instance_ctrl->p_reg->ADCMPANSER = (uint8_t) (p_window_cfg->compare_mask >> 28); + p_instance_ctrl->p_reg->ADCMPANSER = (uint8_t) (p_window_cfg->compare_mask >> 29); /* Set Window A channel inequality mode mask */ p_instance_ctrl->p_reg->ADCMPLR[0] = p_window_cfg->compare_mode_mask & UINT16_MAX; p_instance_ctrl->p_reg->ADCMPLR[1] = (uint16_t) ((p_window_cfg->compare_mode_mask << 4) >> 20); - p_instance_ctrl->p_reg->ADCMPLER = (uint8_t) (p_window_cfg->compare_mode_mask >> 28); + p_instance_ctrl->p_reg->ADCMPLER = (uint8_t) (p_window_cfg->compare_mode_mask >> 29); } if (p_window_cfg->compare_cfg & R_ADC0_ADCMPCR_CMPBE_Msk) @@ -1756,28 +1756,28 @@ void adc_window_compare_isr (void) uint8_t adcmpser = p_reg->ADCMPSER; /* Get the lowest channel that meets Window A criteria */ - uint32_t lowest_channel = __CLZ(__RBIT(adcmpsr0 + (uint32_t) (adcmpsr1 << 16) + (uint32_t) (adcmpser << 28))); + uint32_t lowest_channel = __CLZ(__RBIT(adcmpsr0 + (uint32_t) (adcmpsr1 << 16) + (uint32_t) (adcmpser << 29))); /* Clear the status flag corresponding to the lowest channel */ if (lowest_channel < 16) { p_reg->ADCMPSR[0] = (uint16_t) (adcmpsr0 & ~(1 << (lowest_channel & 0xF))); } - else if (lowest_channel < 28) + else if (lowest_channel < 29) { p_reg->ADCMPSR[1] = (uint16_t) (adcmpsr1 & ~(1 << (lowest_channel & 0xF))); } else { - p_reg->ADCMPSER = (uint8_t) (adcmpser & ~(1 << (lowest_channel & 0x3))); + p_reg->ADCMPSER = (uint8_t) (adcmpser & ~(lowest_channel & 0x3)); } args.channel = (adc_channel_t) lowest_channel; - if (args.channel > 28) + if (args.channel > 29) { /* Adjust sensor channels to align with the adc_channel_t enumeration */ - args.channel = (adc_channel_t) (ADC_CHANNEL_TEMPERATURE + (args.channel - 28)); + args.channel = (adc_channel_t) (ADC_CHANNEL_TEMPERATURE + (args.channel - 29)); } } else diff --git a/ra/fsp/src/r_adc_b/r_adc_b.c b/ra/fsp/src/r_adc_b/r_adc_b.c index b27d3cd62..2ee01c3ec 100644 --- a/ra/fsp/src/r_adc_b/r_adc_b.c +++ b/ra/fsp/src/r_adc_b/r_adc_b.c @@ -75,6 +75,9 @@ static void adc_b_call_callback(adc_b_instance_ctrl_t * p_ctrl, adc_callbac static void adc_b_disable_interrupts(adc_b_instance_ctrl_t * p_instance_ctrl); static void adc_b_enable_interrupts(adc_b_instance_ctrl_t * p_instance_ctrl); static void adc_b_open_pga(adc_b_extended_cfg_t * p_extend); +static void adc_b_calculate_wait_time(adc_b_instance_ctrl_t * p_instance_ctrl, adc_b_scan_cfg_t * p_scan_data); +static uint32_t adc_b_update_calibrate_state(adc_b_instance_ctrl_t * p_instance_ctrl); +static void adc_b_force_stop(adc_b_instance_ctrl_t * p_instance_ctrl); static void adc_b_isr_enable(adc_b_instance_ctrl_t * p_instance_ctrl, IRQn_Type irq, uint8_t ipl); static IRQn_Type adc_b_isr_handler(adc_event_t event, adc_group_mask_t group_mask, @@ -165,12 +168,18 @@ fsp_err_t R_ADC_B_Open (adc_ctrl_t * p_ctrl, adc_cfg_t const * const p_cfg) p_instance_ctrl->p_callback = p_cfg->p_callback; p_instance_ctrl->p_context = p_cfg->p_context; p_instance_ctrl->p_callback_memory = NULL; + p_instance_ctrl->adc_state = ADC_B_CONVERTER_STATE_NONE; adc_b_extended_cfg_t * p_extend = (adc_b_extended_cfg_t *) p_instance_ctrl->p_cfg->p_extend; /* Module Stop release: ADC */ R_BSP_MODULE_START(FSP_IP_ADC, 0); + if (ADC_B_CLOCK_SOURCE_GPT == p_extend->clock_control_bits.source_selection) + { + R_BSP_MODULE_START(FSP_IP_GPT, 0); + } + /* Set synchronous operation period and Enable/Disable for ADC 0/1 */ R_ADC_B->ADSYCR = p_extend->sync_operation_control; @@ -291,6 +300,7 @@ fsp_err_t R_ADC_B_ScanCfg (adc_ctrl_t * p_ctrl, void const * const p_scan_cfg) adc_b_extended_cfg_t * p_extend = (adc_b_extended_cfg_t *) p_instance_ctrl->p_cfg->p_extend; /* Clear any previous channel configuration, specifically group selections */ + p_instance_ctrl->adc_state = ADC_B_CONVERTER_STATE_NONE; for (uint8_t channel = 0; channel <= ADC_B_VIRTUAL_CHANNEL_36; channel++) { *ADC_B_REG_ADDRESS(R_ADC_B->ADCHCR0, channel, 0x10) = 0; @@ -342,36 +352,37 @@ fsp_err_t R_ADC_B_ScanCfg (adc_ctrl_t * p_ctrl, void const * const p_scan_cfg) #endif p_instance_ctrl->cached_adsystr = ADC_GROUP_MASK_NONE; p_instance_ctrl->cached_adtrgenr = ADC_GROUP_MASK_NONE; + for (uint8_t group = 0; group < p_scan_data->group_count; group++) { const adc_b_group_cfg_t * p_adc_group = p_scan_data->p_adc_groups[group]; #if ADC_B_CFG_PARAM_CHECKING_ENABLE - adc_b_unit_id_t converter_selection = p_adc_group->converter_selection; /*============================================================================================================ * Constraints to check while Synchronous Mode is enabled * - See section 36.3.17.2, Restrictions on Synchronous Operation, in the RA6T2 User Manual, R01UH0951EJ0100 *============================================================================================================*/ - uint32_t cst = (p_adc_group->converter_selection ? cst0 : cst1); + adc_b_unit_id_t converter_selection = p_adc_group->converter_selection; + uint32_t cst = (converter_selection ? cst0 : cst1); if (sync_operation_enabled) { /* Set the Synchronous Operation Period to a value larger than successive approximation time of ADCm (m = 0, 1) */ FSP_ERROR_RETURN(adsycyc >= cst + 1, FSP_ERR_INVALID_STATE); } #endif - - scan_group_enable_mask |= (uint32_t) (1 << p_adc_group->scan_group_id); + adc_group_mask_t adc_group_mask = (adc_group_mask_t) (1 << p_adc_group->scan_group_id); + scan_group_enable_mask |= (uint32_t) adc_group_mask; scan_group_end_interrupts |= (uint32_t) (p_adc_group->scan_end_interrupt_enable << p_adc_group->scan_group_id); if (p_adc_group->external_trigger_enable_mask || p_adc_group->elc_trigger_enable_mask || p_adc_group->gpt_trigger_enable_mask) { - p_instance_ctrl->cached_adtrgenr |= (adc_group_mask_t) (1 << p_adc_group->scan_group_id); + p_instance_ctrl->cached_adtrgenr |= adc_group_mask; } else { - p_instance_ctrl->cached_adsystr |= (adc_group_mask_t) (1 << p_adc_group->scan_group_id); + p_instance_ctrl->cached_adsystr |= adc_group_mask; } /* Configure External Triggers, ELC Triggers, GPT Triggers, Self-diagnosis / Disconnect detect */ @@ -483,6 +494,9 @@ fsp_err_t R_ADC_B_ScanCfg (adc_ctrl_t * p_ctrl, void const * const p_scan_cfg) } } + /* Recalculate ADC Stop wait time */ + adc_b_calculate_wait_time(p_instance_ctrl, p_scan_data); + /* Enable/Disable scan groups according to configuration */ R_ADC_B->ADSGER = scan_group_enable_mask; @@ -561,6 +575,7 @@ fsp_err_t R_ADC_B_CallbackSet (adc_ctrl_t * const p_api_ctrl, * @retval FSP_ERR_INVALID_ARGUMENT No hardware triggers configured for groups. * @retval FSP_ERR_NOT_OPEN Unit is not open. * @retval FSP_ERR_NOT_INITIALIZED Unit not initialized. + * @retval FSP_ERR_INVALID_STATE Calibration required. **********************************************************************************************************************/ fsp_err_t R_ADC_B_ScanStart (adc_ctrl_t * p_ctrl) { @@ -574,6 +589,7 @@ fsp_err_t R_ADC_B_ScanStart (adc_ctrl_t * p_ctrl) adc_group_mask_t configured_channels = (adc_group_mask_t) (p_instance_ctrl->cached_adtrgenr | p_instance_ctrl->cached_adsystr); FSP_ERROR_RETURN(configured_channels, FSP_ERR_INVALID_ARGUMENT); + FSP_ERROR_RETURN((ADC_B_CONVERTER_STATE_READY == p_instance_ctrl->adc_state), FSP_ERR_INVALID_STATE); #endif R_ADC_B->ADTRGENR = p_instance_ctrl->cached_adtrgenr; @@ -601,6 +617,7 @@ fsp_err_t R_ADC_B_ScanStart (adc_ctrl_t * p_ctrl) * @retval FSP_ERR_INVALID_ARGUMENT An invalid group has been provided. * @retval FSP_ERR_NOT_OPEN Unit is not open. * @retval FSP_ERR_NOT_INITIALIZED Unit not initialized. + * @retval FSP_ERR_INVALID_STATE Calibration required. **********************************************************************************************************************/ fsp_err_t R_ADC_B_ScanGroupStart (adc_ctrl_t * p_ctrl, adc_group_mask_t group_mask) { @@ -614,6 +631,7 @@ fsp_err_t R_ADC_B_ScanGroupStart (adc_ctrl_t * p_ctrl, adc_group_mask_t group_ma adc_group_mask_t configured_groups = (adc_group_mask_t) (p_instance_ctrl->cached_adtrgenr | p_instance_ctrl->cached_adsystr); FSP_ERROR_RETURN(0 != (configured_groups & group_mask), FSP_ERR_INVALID_ARGUMENT); + FSP_ERROR_RETURN((ADC_B_CONVERTER_STATE_READY == p_instance_ctrl->adc_state), FSP_ERR_INVALID_STATE); #endif R_ADC_B->ADTRGENR |= (group_mask & p_instance_ctrl->cached_adtrgenr); @@ -634,28 +652,17 @@ fsp_err_t R_ADC_B_ScanGroupStart (adc_ctrl_t * p_ctrl, adc_group_mask_t group_ma **********************************************************************************************************************/ fsp_err_t R_ADC_B_ScanStop (adc_ctrl_t * p_ctrl) { -#if ADC_B_CFG_PARAM_CHECKING_ENABLE adc_b_instance_ctrl_t * p_instance_ctrl = (adc_b_instance_ctrl_t *) p_ctrl; +#if ADC_B_CFG_PARAM_CHECKING_ENABLE FSP_ASSERT(NULL != p_instance_ctrl); FSP_ERROR_RETURN(ADC_B_OPEN == p_instance_ctrl->opened, FSP_ERR_NOT_OPEN); FSP_ERROR_RETURN(ADC_B_OPEN == p_instance_ctrl->initialized, FSP_ERR_NOT_INITIALIZED); uint32_t configured_channels = (p_instance_ctrl->cached_adtrgenr | p_instance_ctrl->cached_adsystr); FSP_ERROR_RETURN(configured_channels, FSP_ERR_INVALID_ARGUMENT); -#else - FSP_PARAMETER_NOT_USED(p_ctrl); #endif - /* Disable peripheral hardware triggers */ - R_ADC_B->ADTRGENR = 0U; - - /* Force stop ADC converters*/ - R_ADC_B->ADSTOPR = R_ADC_B0_ADSTOPR_ADSTOP0_Msk | R_ADC_B0_ADSTOPR_ADSTOP1_Pos; - - /* Wait for converter to stop - * - See table 36.26 of the RA6T2 User Manual, R01UH0951EJ0100 */ - FSP_HARDWARE_REGISTER_WAIT(R_ADC_B->ADSR_b.ADACT0, 0) - FSP_HARDWARE_REGISTER_WAIT(R_ADC_B->ADSR_b.ADACT1, 0) + adc_b_force_stop(p_instance_ctrl); return FSP_SUCCESS; } @@ -670,17 +677,24 @@ fsp_err_t R_ADC_B_ScanStop (adc_ctrl_t * p_ctrl) **********************************************************************************************************************/ fsp_err_t R_ADC_B_StatusGet (adc_ctrl_t * p_ctrl, adc_status_t * p_status) { -#if ADC_B_CFG_PARAM_CHECKING_ENABLE adc_b_instance_ctrl_t * p_instance_ctrl = (adc_b_instance_ctrl_t *) p_ctrl; + +#if ADC_B_CFG_PARAM_CHECKING_ENABLE FSP_ASSERT(NULL != p_instance_ctrl); FSP_ASSERT(NULL != p_status); FSP_ERROR_RETURN(ADC_B_OPEN == p_instance_ctrl->opened, FSP_ERR_NOT_OPEN); -#else - FSP_PARAMETER_NOT_USED(p_ctrl); #endif + /* Calibration status is based on the internal state machine. + * CALACTn cannot be used because the ADC will enter and exit calibration several times before completing */ + bool calibration_in_progress = ((p_instance_ctrl->adc_state > ADC_B_CONVERTER_STATE_NONE) && + (p_instance_ctrl->adc_state < ADC_B_CONVERTER_STATE_READY)); + /* A scan is active if any scan group is being processed */ - p_status->state = (R_ADC_B->ADSR ? ADC_STATE_SCAN_IN_PROGRESS : ADC_STATE_IDLE); + bool scan_in_progress = (bool) R_ADC_B->ADSR; + + p_status->state = (calibration_in_progress ? ADC_STATE_CALIBRATION_IN_PROGRESS : + scan_in_progress ? ADC_STATE_SCAN_IN_PROGRESS : ADC_STATE_IDLE); return FSP_SUCCESS; } @@ -863,7 +877,7 @@ fsp_err_t R_ADC_B_Close (adc_ctrl_t * p_ctrl) #endif /* Force stop any active scans */ - (void) R_ADC_B_ScanStop(p_ctrl); + adc_b_force_stop(p_instance_ctrl); /* Mark driver as closed */ p_instance_ctrl->opened = 0U; @@ -901,72 +915,34 @@ fsp_err_t R_ADC_B_Close (adc_ctrl_t * p_ctrl) * Initiates calibration of the ADC_B. This function must be called before starting a scan and again whenever ADC_B * configuration or state is changed. * + * @note Self-calibration is a non-blocking operation. The application should wait for an ADC_EVENT_CALIBRATION_COMPLETE + * callback before using other ADC_B functionality. + * + * @note The self-calibration process will disable hardware triggers that were previously enabled. + * * @param[in] p_ctrl Pointer to the instance control structure * @param[in] p_extend Unused argument. * * @retval FSP_SUCCESS Calibration successfully initiated. * @retval FSP_ERR_ASSERTION An input argument is invalid. - * @retval FSP_ERR_INVALID_HW_CONDITION Error occurred during calibration. * @retval FSP_ERR_NOT_OPEN Unit is not open. **********************************************************************************************************************/ fsp_err_t R_ADC_B_Calibrate (adc_ctrl_t * const p_ctrl, void const * p_extend) { -#if ADC_B_CFG_PARAM_CHECKING_ENABLE adc_b_instance_ctrl_t * p_instance_ctrl = (adc_b_instance_ctrl_t *) p_ctrl; +#if ADC_B_CFG_PARAM_CHECKING_ENABLE FSP_ASSERT(NULL != p_instance_ctrl); FSP_ERROR_RETURN(ADC_B_OPEN == p_instance_ctrl->opened, FSP_ERR_NOT_OPEN); -#else - FSP_PARAMETER_NOT_USED(p_ctrl); #endif FSP_PARAMETER_NOT_USED(p_extend); - /* Store and Clear ADC Start Trigger Enable */ - uint32_t adtrgenr = R_ADC_B->ADTRGENR; - R_ADC_B->ADTRGENR = 0; - - /* Wait for converter to stop - * - See table 36.26 of the RA6T2 User Manual, R01UH0951EJ0100 */ - FSP_HARDWARE_REGISTER_WAIT(R_ADC_B->ADSR_b.ADACT0, 0) - FSP_HARDWARE_REGISTER_WAIT(R_ADC_B->ADSR_b.ADACT1, 0) - - /* Clear the error status flags */ - R_ADC_B->ADERSCR = R_ADC_B0_ADERSCR_ADERCLR0_Msk | R_ADC_B0_ADERSCR_ADERCLR1_Msk; - R_ADC_B->ADOVFERSCR = R_ADC_B0_ADOVFERSCR_ADOVFEC0_Msk | R_ADC_B0_ADOVFERSCR_ADOVFEC1_Msk; - R_ADC_B->ADOVFCHSCR0 = R_ADC_B0_ADOVFCHSCR0_OVFCHCn_Msk; - R_ADC_B->ADOVFEXSCR = R_ADC_B0_ADOVFEXSCR_OVFEXC0_Msk | R_ADC_B0_ADOVFEXSCR_OVFEXC1_Msk | - R_ADC_B0_ADOVFEXSCR_OVFEXC2_Msk | R_ADC_B0_ADOVFEXSCR_OVFEXC5_Msk | - R_ADC_B0_ADOVFEXSCR_OVFEXC6_Msk | R_ADC_B0_ADOVFEXSCR_OVFEXC7_Msk | - R_ADC_B0_ADOVFEXSCR_OVFEXC8_Msk; - - /* Self-Calibration bits for ADC0 */ - bool pga_enabled = R_ADC_B->ADPGACR_b[0].PGAENAMP || R_ADC_B->ADPGACR_b[1].PGAENAMP || - R_ADC_B->ADPGACR_b[2].PGAENAMP; + p_instance_ctrl->adc_state = ADC_B_CONVERTER_STATE_NONE; - uint32_t adc_cal0 = (uint32_t) (R_ADC_B_ADPGACR_ADC_0_CAL_Msk | - (pga_enabled ? R_ADC_B_ADPGACR_GAIN_OFFSET_0_CAL_Msk : 0x0) | - (R_ADC_B->ADSHCR0 ? R_ADC_B_ADPGACR_SAMPLE_HOLD_0_CAL_Msk : 0x0)); + adc_b_force_stop(p_instance_ctrl); + uint32_t adccalsr = adc_b_update_calibrate_state(p_instance_ctrl); + R_ADC_B->ADCALSTR = adccalsr; // Initiate calibration - /* Self-Calibration bits for ADC1 */ - pga_enabled = R_ADC_B->ADPGACR_b[3].PGAENAMP; - uint32_t adc_cal1 = (uint32_t) (R_ADC_B_ADPGACR_ADC_1_CAL_Msk | - (pga_enabled ? R_ADC_B_ADPGACR_GAIN_OFFSET_1_CAL_Msk : 0x0) | - (R_ADC_B->ADSHCR1 ? R_ADC_B_ADPGACR_SAMPLE_HOLD_1_CAL_Msk : 0x0)); - - R_ADC_B->ADCALSTR = adc_cal0 | adc_cal1; - - /* Error Status Check */ - uint32_t read_err = R_ADC_B->ADERSR || - R_ADC_B->ADOVFERSR || - R_ADC_B->ADOVFCHSR0 || - R_ADC_B->ADOVFEXSR; - - /* Reset ADC Start Trigger Enable */ - R_ADC_B->ADTRGENR = adtrgenr; - - fsp_err_t fsp_err = (read_err ? FSP_ERR_INVALID_HW_CONDITION : FSP_SUCCESS); - FSP_ERROR_LOG(fsp_err); - - return fsp_err; + return FSP_SUCCESS; } /*******************************************************************************************************************//** @@ -992,6 +968,144 @@ fsp_err_t R_ADC_B_OffsetSet (adc_ctrl_t * const p_ctrl, adc_channel_t const reg_ * Private Functions **********************************************************************************************************************/ +/*********************************************************************************************************************** + * @brief Helper function - Pre-calculate wait time for use when stopping ADC + * @param p_instance_ctrl - Pointer to adc_b instance configuration + * @return None + **********************************************************************************************************************/ +static void adc_b_calculate_wait_time (adc_b_instance_ctrl_t * p_instance_ctrl, adc_b_scan_cfg_t * p_scan_data) +{ + adc_b_extended_cfg_t * p_extend = (adc_b_extended_cfg_t *) p_instance_ctrl->p_cfg->p_extend; + bool sync_enabled_lut[] = + { + !p_extend->sync_operation_control_bits.adc_0_disable_sync, + !p_extend->sync_operation_control_bits.adc_1_disable_sync + }; + uint16_t sync_cycles = p_extend->sync_operation_control_bits.period_cycle; + + uint32_t wait_cycles = 0; + for (uint8_t group = 0; (group < p_scan_data->group_count) && p_instance_ctrl->cached_adtrgenr; group++) + { + const adc_b_group_cfg_t * p_adc_group = p_scan_data->p_adc_groups[group]; + bool sync_enabled = sync_enabled_lut[p_adc_group->converter_selection]; + uint32_t trigger_delay = p_extend->start_trigger_delay_table[group]; + + uint32_t caclulated_cycles = 0; + if (sync_enabled) + { + caclulated_cycles = trigger_delay + sync_cycles * 2; + } + else + { + caclulated_cycles = trigger_delay + 4; + } + + if (wait_cycles < caclulated_cycles) + { + wait_cycles = caclulated_cycles; + } + } + + p_instance_ctrl->trigger_disable_wait_cycles = wait_cycles + 1; +} + +/*********************************************************************************************************************** + * @brief Helper function - Perform ADC calibration according to Table 36.15 of the RA6T2 User Manual, R01UH0951EJ0100 + * @param p_instance_ctrl - Pointer to adc_b instance configuration + * @return uint32_t - Next ADCCALSR register bits + **********************************************************************************************************************/ +static uint32_t adc_b_update_calibrate_state (adc_b_instance_ctrl_t * p_instance_ctrl) +{ + /* Clear the error status flags */ + R_ADC_B->ADERSCR = R_ADC_B0_ADERSCR_ADERCLR0_Msk | R_ADC_B0_ADERSCR_ADERCLR1_Msk; + R_ADC_B->ADOVFERSCR = R_ADC_B0_ADOVFERSCR_ADOVFEC0_Msk | R_ADC_B0_ADOVFERSCR_ADOVFEC1_Msk; + R_ADC_B->ADOVFCHSCR0 = R_ADC_B0_ADOVFCHSCR0_OVFCHCn_Msk; + R_ADC_B->ADOVFEXSCR = R_ADC_B0_ADOVFEXSCR_OVFEXC0_Msk | R_ADC_B0_ADOVFEXSCR_OVFEXC1_Msk | + R_ADC_B0_ADOVFEXSCR_OVFEXC2_Msk | R_ADC_B0_ADOVFEXSCR_OVFEXC5_Msk | + R_ADC_B0_ADOVFEXSCR_OVFEXC6_Msk | R_ADC_B0_ADOVFEXSCR_OVFEXC7_Msk | + R_ADC_B0_ADOVFEXSCR_OVFEXC8_Msk; + + adc_b_converter_state_t current_state = p_instance_ctrl->adc_state; + + /* Converters must be calibrated sequentially. + * Converter calibration must be performed before Sample-and-Hold calibration. */ + uint32_t adccalsr = 0; + switch (current_state) + { + case ADC_B_CONVERTER_STATE_NONE: + { + current_state = ADC_B_CONVERTER_STATE_ADC_0_CALIBRATING; + adccalsr = (uint32_t) (R_ADC_B_ADPGACR_ADC_0_CAL_Msk | R_ADC_B_ADPGACR_GAIN_OFFSET_0_CAL_Msk); + break; + } + + case ADC_B_CONVERTER_STATE_ADC_0_CALIBRATING: + { + current_state = ADC_B_CONVERTER_STATE_ADC_1_CALIBRATING; + adccalsr = (uint32_t) (R_ADC_B_ADPGACR_ADC_1_CAL_Msk | R_ADC_B_ADPGACR_GAIN_OFFSET_1_CAL_Msk); + break; + } + + case ADC_B_CONVERTER_STATE_ADC_1_CALIBRATING: + { + current_state = ADC_B_CONVERTER_STATE_SH_0_2_CALIBRATING; + adccalsr = R_ADC_B_ADPGACR_SAMPLE_HOLD_0_CAL_Msk; + break; + } + + case ADC_B_CONVERTER_STATE_SH_0_2_CALIBRATING: + { + current_state = ADC_B_CONVERTER_STATE_SH_4_6_CALIBRATING; + adccalsr = R_ADC_B_ADPGACR_SAMPLE_HOLD_1_CAL_Msk; + break; + } + + /* Do nothing. Calibration is complete */ + case ADC_B_CONVERTER_STATE_SH_4_6_CALIBRATING: + case ADC_B_CONVERTER_STATE_READY: + { + current_state = ADC_B_CONVERTER_STATE_READY; + break; + } + + default: + case ADC_B_CONVERTER_STATE_CALIBRATION_FAIL: + { + break; // Do nothing + } + } + + p_instance_ctrl->adc_state = current_state; + + return adccalsr; +} + +/*********************************************************************************************************************** + * @brief Helper function - Force stop ADC operation + * @param p_instance_ctrl - Pointer to adc_b instance configuration + * @return None + **********************************************************************************************************************/ +static void adc_b_force_stop (adc_b_instance_ctrl_t * p_instance_ctrl) +{ + /* Clear ADC Start Trigger Enable */ + R_ADC_B->ADTRGENR = 0; + + /* Perform delay according to section 36.5.4.2 of the RA6T2 User Manual, R01UH0951EJ0100 */ + for (uint32_t i = p_instance_ctrl->trigger_disable_wait_cycles; i > 0; i--) + { + FSP_REGISTER_READ(R_ADC_B->ADSR); + } + + /* Force stop if ADC is still running */ + if (R_ADC_B->ADSR) + { + R_ADC_B->ADSTOPR = R_ADC_B0_ADSTOPR_ADSTOP0_Msk | R_ADC_B0_ADSTOPR_ADSTOP1_Msk; + + /* Wait for converter to stop */ + FSP_HARDWARE_REGISTER_WAIT((R_ADC_B->ADSR_b.ADACT0 | R_ADC_B->ADSR_b.ADACT1), 0) + } +} + /*********************************************************************************************************************** * @brief Helper function - Initialize PGA settings during call to open * @param p_extend - Pointer to adc_b extended configuration @@ -1189,14 +1303,44 @@ void adc_b_calend0_isr (void) /* Save context if RTOS is used */ FSP_CONTEXT_SAVE - IRQn_Type irq = adc_b_isr_handler(ADC_EVENT_CALIBRATION_COMPLETE, - ADC_GROUP_MASK_NONE, - ADC_B_CHANNEL_MASK_NONE, - ADC_B_UNIT_MASK_0); + adc_event_t event = ADC_EVENT_CALIBRATION_COMPLETE; + adc_b_channel_mask_t channel_mask = ADC_B_CHANNEL_MASK_NONE; + + if (R_ADC_B->ADERSR_b.ADERF0) + { + event |= ADC_EVENT_CONVERSION_ERROR; + } + + if (R_ADC_B->ADOVFERSR_b.ADOVFEF0) + { + event |= ADC_EVENT_OVERFLOW; + uint32_t physical_channels = R_ADC_B->ADOVFCHSR0; + uint32_t extended_channels = R_ADC_B->ADOVFEXSR; + uint64_t extended_mask = ((uint64_t) extended_channels) << ADC_B_CHANNEL_MASK_EXT_OFFSET; + channel_mask |= (adc_b_channel_mask_t) (physical_channels | extended_mask); + } + + IRQn_Type irq = R_FSP_CurrentIrqGet(); + adc_b_instance_ctrl_t * p_instance_ctrl = (adc_b_instance_ctrl_t *) R_FSP_IsrContextGet(irq); + uint32_t adccalsr = adc_b_update_calibrate_state(p_instance_ctrl); + if (event & (adc_event_t) ~ADC_EVENT_CALIBRATION_COMPLETE) + { + p_instance_ctrl->adc_state = ADC_B_CONVERTER_STATE_CALIBRATION_FAIL; + adccalsr = 0; + } + + /* End calibration sequence if complete or failed */ + if (ADC_B_CONVERTER_STATE_READY <= p_instance_ctrl->adc_state) + { + adc_b_isr_handler(event, ADC_GROUP_MASK_NONE, channel_mask, ADC_B_UNIT_MASK_UNDEFINED); + } R_ADC_B->ADCALENDSCR = R_ADC_B0_ADCALENDSCR_CALENDC0_Msk; R_BSP_IrqStatusClear(irq); + /* Initiate next calibration step*/ + R_ADC_B->ADCALSTR = adccalsr; + /* Restore context if RTOS is used */ FSP_CONTEXT_RESTORE } @@ -1211,14 +1355,43 @@ void adc_b_calend1_isr (void) /* Save context if RTOS is used */ FSP_CONTEXT_SAVE - IRQn_Type irq = adc_b_isr_handler(ADC_EVENT_CALIBRATION_COMPLETE, - ADC_GROUP_MASK_NONE, - ADC_B_CHANNEL_MASK_NONE, - ADC_B_UNIT_MASK_1); + adc_event_t event = ADC_EVENT_CALIBRATION_COMPLETE; + adc_b_channel_mask_t channel_mask = ADC_B_CHANNEL_MASK_NONE; + + if (R_ADC_B->ADERSR_b.ADERF1) + { + event |= ADC_EVENT_CONVERSION_ERROR; + } + + if (R_ADC_B->ADOVFERSR_b.ADOVFEF1) + { + event |= ADC_EVENT_OVERFLOW; + uint32_t physical_channels = R_ADC_B->ADOVFCHSR0; + uint32_t extended_channels = R_ADC_B->ADOVFEXSR; + uint64_t extended_mask = ((uint64_t) extended_channels) << ADC_B_CHANNEL_MASK_EXT_OFFSET; + channel_mask |= (adc_b_channel_mask_t) (physical_channels | extended_mask); + } + + IRQn_Type irq = R_FSP_CurrentIrqGet(); + adc_b_instance_ctrl_t * p_instance_ctrl = (adc_b_instance_ctrl_t *) R_FSP_IsrContextGet(irq); + uint32_t adccalsr = adc_b_update_calibrate_state(p_instance_ctrl); + if (event & (adc_event_t) ~ADC_EVENT_CALIBRATION_COMPLETE) + { + p_instance_ctrl->adc_state = ADC_B_CONVERTER_STATE_CALIBRATION_FAIL; + adccalsr = 0; + } + + /* End calibration sequence if complete or failed */ + if (ADC_B_CONVERTER_STATE_READY <= p_instance_ctrl->adc_state) + { + adc_b_isr_handler(event, ADC_GROUP_MASK_NONE, channel_mask, ADC_B_UNIT_MASK_UNDEFINED); + } R_ADC_B->ADCALENDSCR = R_ADC_B0_ADCALENDSCR_CALENDC1_Msk; R_BSP_IrqStatusClear(irq); + R_ADC_B->ADCALSTR = adccalsr; + /* Restore context if RTOS is used */ FSP_CONTEXT_RESTORE } @@ -1312,7 +1485,7 @@ void adc_b_resovf0_isr (void) R_ADC_B->ADOVFCHSCR0 = physical_channels; R_ADC_B->ADOVFEXSCR = extended_channels; - R_ADC_B->ADOVFERSCR = ADC_B_UNIT_MASK_0; + R_ADC_B->ADOVFERSCR = R_ADC_B0_ADOVFERSCR_ADOVFEC0_Msk; R_BSP_IrqStatusClear(irq); /* Restore context if RTOS is used */ @@ -1338,7 +1511,7 @@ void adc_b_resovf1_isr (void) R_ADC_B->ADOVFCHSCR0 = physical_channels; R_ADC_B->ADOVFEXSCR = extended_channels; - R_ADC_B->ADOVFERSCR = ADC_B_UNIT_MASK_1; + R_ADC_B->ADOVFERSCR = R_ADC_B0_ADOVFERSCR_ADOVFEC1_Msk; R_BSP_IrqStatusClear(irq); /* Restore context if RTOS is used */ diff --git a/ra/fsp/src/r_agt/r_agt.c b/ra/fsp/src/r_agt/r_agt.c index a5281cd1c..231da4c83 100644 --- a/ra/fsp/src/r_agt/r_agt.c +++ b/ra/fsp/src/r_agt/r_agt.c @@ -54,19 +54,30 @@ #define AGT_PRV_MIN_CLOCK_FREQ (0U) -#if (BSP_FEATURE_AGT_AGTW_CHANNEL_COUNT > 0) - #if (BSP_FEATURE_AGT_AGTW_CHANNEL_COUNT < (BSP_FEATURE_AGT_MAX_CHANNEL_NUM + 1)) - #define AGT_PRV_IS_AGTW(p_instance_ctrl) ((p_instance_ctrl)->p_cfg->channel < BSP_FEATURE_AGT_AGTW_CHANNEL_COUNT) +#define AGT_PRV_CHANNEL_SIZE ((uint32_t) R_AGTX1_BASE - (uint32_t) R_AGTX0_BASE) + +#if BSP_FEATURE_AGT_AGTW_CHANNEL_COUNT + #if BSP_FEATURE_AGT_AGT_CHANNEL_COUNT + #define AGT_PRV_DETERMINE_IS_AGTW(p_cfg) (((agt_extended_cfg_t const *) (p_cfg)->p_extend)-> \ + counter_bit_width == AGT_COUNTER_BIT_WIDTH_32) #else - #define AGT_PRV_IS_AGTW(p_instance_ctrl) (true) + #define AGT_PRV_DETERMINE_IS_AGTW(p_cfg) (true) #endif #else - #define AGT_PRV_IS_AGTW(p_instance_ctrl) (false) + #define AGT_PRV_DETERMINE_IS_AGTW(p_cfg) (false) #endif -#define AGT_PRV_CTRL_PTR(p_instance_ctrl) ((agt_prv_reg_ctrl_ptr_t) (AGT_PRV_IS_AGTW((p_instance_ctrl)) \ - ? &(p_instance_ctrl)->p_reg->AGT32.CTRL \ - : &(p_instance_ctrl)->p_reg->AGT16.CTRL)) +#define AGT_PRV_IS_AGTW(p_instance_ctrl) ((p_instance_ctrl)->is_agtw) + +#define AGT_PRV_CHANNEL_OFFSET_AGT_AGTW(p_instance_ctrl, \ + channel) ((uint8_t) ((AGT_PRV_IS_AGTW(p_instance_ctrl)) ? (channel) : (( \ + channel) \ + + \ + BSP_FEATURE_AGT_AGTW_CHANNEL_COUNT))) + +#define AGT_PRV_CTRL_PTR(p_instance_ctrl) ((agt_prv_reg_ctrl_ptr_t) (AGT_PRV_IS_AGTW((p_instance_ctrl)) \ + ? &(p_instance_ctrl)->p_reg->AGT32.CTRL \ + : &(p_instance_ctrl)->p_reg->AGT16.CTRL)) /********************************************************************************************************************** * Typedef definitions @@ -104,7 +115,7 @@ void agt_int_isr(void); /* The period for even channels must be known to calculate the frequency of odd channels if the count source is AGT * underflow. */ -static uint32_t gp_prv_agt_periods[BSP_FEATURE_AGT_MAX_CHANNEL_NUM + 1]; +static uint32_t gp_prv_agt_periods[BSP_FEATURE_AGT_AGT_CHANNEL_COUNT + BSP_FEATURE_AGT_AGTW_CHANNEL_COUNT]; /*********************************************************************************************************************** * Global Variables @@ -163,17 +174,25 @@ fsp_err_t R_AGT_Open (timer_ctrl_t * const p_ctrl, timer_cfg_t const * const p_c #if AGT_CFG_PARAM_CHECKING_ENABLE fsp_err_t err = r_agt_open_param_checking(p_instance_ctrl, p_cfg); FSP_ERROR_RETURN(FSP_SUCCESS == err, err); +#else + p_instance_ctrl->p_cfg = p_cfg; + p_instance_ctrl->is_agtw = AGT_PRV_DETERMINE_IS_AGTW(p_cfg); #endif - uint32_t base_address = (uint32_t) R_AGTX0 + (p_cfg->channel * ((uint32_t) R_AGTX1 - (uint32_t) R_AGTX0)); - p_instance_ctrl->p_reg = (R_AGTX0_Type *) base_address; - - p_instance_ctrl->p_cfg = p_cfg; +#if BSP_FEATURE_AGT_AGT_CHANNEL_COUNT && BSP_FEATURE_AGT_AGTW_CHANNEL_COUNT + uint32_t base_address = (uint32_t) ((AGT_PRV_IS_AGTW(p_instance_ctrl)) ? R_AGTW0 : R_AGT0); +#elif BSP_FEATURE_AGT_AGTW_CHANNEL_COUNT + uint32_t base_address = (uint32_t) R_AGTW0; +#else + uint32_t base_address = (uint32_t) R_AGT0; +#endif + uint32_t channel_base_address = base_address + (p_cfg->channel * AGT_PRV_CHANNEL_SIZE); + p_instance_ctrl->p_reg = (R_AGTX0_Type *) channel_base_address; agt_prv_reg_ctrl_ptr_t p_reg_ctrl = AGT_PRV_CTRL_PTR(p_instance_ctrl); /* Power on the AGT channel. */ - R_BSP_MODULE_START(FSP_IP_AGT, p_cfg->channel); + R_BSP_MODULE_START(FSP_IP_AGT, AGT_PRV_CHANNEL_OFFSET_AGT_AGTW(p_instance_ctrl, p_cfg->channel)); /* Clear AGTCR. This stops the timer if it is running and clears the flags. */ p_reg_ctrl->AGTCR = 0U; @@ -501,17 +520,19 @@ fsp_err_t R_AGT_InfoGet (timer_ctrl_t * const p_ctrl, timer_info_t * const p_inf /* Clock frequency of this channel is the clock frequency divided by the timer period of the source channel. */ /* Source instance is the channel immediately preceding this one. */ - if (0U == gp_prv_agt_periods[p_instance_ctrl->p_cfg->channel - 1]) + if (0U == + gp_prv_agt_periods[AGT_PRV_CHANNEL_OFFSET_AGT_AGTW(p_instance_ctrl, p_instance_ctrl->p_cfg->channel - 1)]) { p_info->clock_frequency = AGT_PRV_MIN_CLOCK_FREQ; } else { - R_AGTX0_Type * p_source_channel_reg = (R_AGTX0_Type *) ((uint32_t) p_instance_ctrl->p_reg - - ((uint32_t) R_AGTX1 - (uint32_t) R_AGTX0)); + R_AGTX0_Type * p_source_channel_reg = + (R_AGTX0_Type *) ((uint32_t) p_instance_ctrl->p_reg - AGT_PRV_CHANNEL_SIZE); p_info->clock_frequency = r_agt_clock_frequency_get(p_source_channel_reg, AGT_PRV_IS_AGTW(p_instance_ctrl)) / - gp_prv_agt_periods[p_instance_ctrl->p_cfg->channel - 1]; + gp_prv_agt_periods[AGT_PRV_CHANNEL_OFFSET_AGT_AGTW(p_instance_ctrl, + p_instance_ctrl->p_cfg->channel - 1)]; } } else @@ -683,6 +704,10 @@ static fsp_err_t r_agt_open_param_checking (agt_instance_ctrl_t * p_instance_ctr FSP_ERROR_RETURN(p_cfg->cycle_end_irq >= 0, FSP_ERR_IRQ_BSP_DISABLED); } + /* Save pointer to config struct */ + p_instance_ctrl->p_cfg = p_cfg; + p_instance_ctrl->is_agtw = AGT_PRV_DETERMINE_IS_AGTW(p_cfg); + if (!AGT_PRV_IS_AGTW(p_instance_ctrl)) { FSP_ASSERT(0U != p_cfg->period_counts); @@ -909,7 +934,8 @@ static void r_agt_period_register_set (agt_instance_ctrl_t * p_instance_ctrl, ui { /* Store the period value so it can be retrieved later. */ p_instance_ctrl->period = period_counts; - gp_prv_agt_periods[p_instance_ctrl->p_cfg->channel] = period_counts; + gp_prv_agt_periods[AGT_PRV_CHANNEL_OFFSET_AGT_AGTW(p_instance_ctrl, + p_instance_ctrl->p_cfg->channel)] = period_counts; uint32_t period_reg = (period_counts - 1U); diff --git a/ra/fsp/src/r_canfd/.util/Renesas##HAL Drivers##all##r_canfd####4.4.0.xml.j2 b/ra/fsp/src/r_canfd/.util/Renesas##HAL Drivers##all##r_canfd####4.5.0.xml.j2 similarity index 95% rename from ra/fsp/src/r_canfd/.util/Renesas##HAL Drivers##all##r_canfd####4.4.0.xml.j2 rename to ra/fsp/src/r_canfd/.util/Renesas##HAL Drivers##all##r_canfd####4.5.0.xml.j2 index 7ba1b1d79..eb70f9da8 100644 --- a/ra/fsp/src/r_canfd/.util/Renesas##HAL Drivers##all##r_canfd####4.4.0.xml.j2 +++ b/ra/fsp/src/r_canfd/.util/Renesas##HAL Drivers##all##r_canfd####4.5.0.xml.j2 @@ -71,23 +71,19 @@ ((parseInt("{{deref_id(id_prefix,'rxfifo.'~fifo_number~'.payload')}}".substring("enum.driver.canfd.fifo.payload.".length)) + 12) * parseInt("{{deref_id(id_prefix,'rxfifo.'~fifo_number~'.depth')}}".substring("enum.driver.canfd.fifo.depth.".length)) * ("{{deref_id(id_prefix,'rxfifo.'~fifo_number~'.enable')}}" == "{{id_prefix}}.driver.{{ id_name() }}.rxfifo.{{ fifo_number }}.enable.enabled" ? 1 : 0)) +{% endfor %} ((parseInt("{{deref_id(id_prefix,'rxfifo.'~(num_fifos-1)~'.payload')}}".substring("enum.driver.canfd.fifo.payload.".length)) + 12) * parseInt("{{deref_id(id_prefix,'rxfifo.'~(num_fifos-1)~'.depth')}}".substring("enum.driver.canfd.fifo.depth.".length)) * ("{{deref_id(id_prefix,'rxfifo.'~(num_fifos-1)~'.enable')}}" == "{{id_prefix}}.driver.{{ id_name() }}.rxfifo.{{ num_fifos - 1 }}.enable.enabled" ? 1 : 0))) <= ${config.bsp.fsp.mcu.canfd.buffer_ram} </constraint> +{%- if 'r_canfd' == module_variant %} <constraint display="The maximum configurable payload on this MCU is 8 bytes."> ("${interface.mcu.feature_set.b}" > "0") || (("{{deref_id(id_prefix,'rxmb.size')}}" === "{{id_prefix}}.driver.{{ id_name() }}.rxmb.size.8") &&{% for fifo_number in range(num_fifos - 1) %} ("{{deref_id(id_prefix,'rxfifo.'~fifo_number~'.payload')}}" === "enum.driver.canfd.fifo.payload.8") &&{% endfor %} ("{{deref_id(id_prefix,'rxfifo.'~(num_fifos-1)~'.payload')}}" === "enum.driver.canfd.fifo.payload.8")) </constraint> - <constraint display="A Receive FIFO interrupt is enabled but the priority is set to Disabled."> - !(("${config.driver.{{ id_name() }}.rxfifo.ipl}" === "_disabled") && - ({% for fifo_number in range(num_fifos - 1) %} - (("{{deref_id(id_prefix,'rxfifo.'~fifo_number~'.int_mode')}}" != "enum.driver.canfd.fifo.int_mode.disabled") && ("{{deref_id(id_prefix,'rxfifo.'~fifo_number~'.enable')}}" === "{{id_prefix}}.driver.{{ id_name() }}.rxfifo.{{fifo_number}}.enable.enabled")) ||{% endfor %} - (("{{deref_id(id_prefix,'rxfifo.'~(num_fifos-1)~'.int_mode')}}" != "enum.driver.canfd.fifo.int_mode.disabled") && ("{{deref_id(id_prefix,'rxfifo.'~(num_fifos-1)~'.enable')}}" === "{{id_prefix}}.driver.{{ id_name() }}.rxfifo.{{(num_fifos-1)}}.enable.enabled")))) - </constraint> <constraint display="The FD Payload Overflow function is not available on MCUs without Flexible Data support."> ("${interface.mcu.feature_set.b}" > "0") || (("{{deref_id(id_prefix,'fd.overflow')}}" === "{{id_prefix}}.driver.{{ id_name() }}.fd.overflow.reject") && (!testOption("{{deref_id(id_prefix,'global_err.sources')}}", "{{id_prefix}}.driver.{{ id_name() }}.global_err.sources.overflow"))) </constraint> +{%- endif %} {% endmacro %} <?xml version="1.0" ?> <!-- @@ -121,10 +117,10 @@ This file was generated using: ra/fsp/src/r_canfd/.util/canfd_gen.py </property> {%- if 'r_canfd' == module_variant %}{{ global_config('config',8) }}{%- endif %} <property default="{%-if 'r_canfd' == module_variant %}32{%- else %}16{%- endif %}" display="Reception|Acceptance Filtering|Channel 0 Rule Count" id="config.driver.{{ id_name() }}.afl.ch0_num" description="Number of acceptance filter list rules dedicated to Channel 0."> - <constraint display="The number of AFL rules must be an integer between 0 and 128.">testInteger("${config.driver.{{ id_name() }}.afl.ch0_num}") && (("${config.driver.{{ id_name() }}.afl.ch0_num}" >= 0) && ("${config.driver.{{ id_name() }}.afl.ch0_num}" <= 128))</constraint> + <constraint display="The number of AFL rules must be a positive integer.">testInteger("${config.driver.{{ id_name() }}.afl.ch0_num}") && ("${config.driver.{{ id_name() }}.afl.ch0_num}" >= 0)</constraint> </property> <property default="{%-if 'r_canfd' == module_variant %}0{%- else %}16{%- endif %}" display="Reception|Acceptance Filtering|Channel 1 Rule Count" id="config.driver.{{ id_name() }}.afl.ch1_num" description="Number of acceptance filter list rules dedicated to Channel 1."> - <constraint display="The number of AFL rules must be an integer between 0 and 128.">testInteger("${config.driver.{{ id_name() }}.afl.ch1_num}") && (("${config.driver.{{ id_name() }}.afl.ch1_num}" >= 0) && ("${config.driver.{{ id_name() }}.afl.ch1_num}" <= 128))</constraint> + <constraint display="The number of AFL rules must be a positive integer.">testInteger("${config.driver.{{ id_name() }}.afl.ch1_num}") && ("${config.driver.{{ id_name() }}.afl.ch1_num}" >= 0)</constraint> </property> <content> #ifdef __cplusplus @@ -194,11 +190,14 @@ This file was generated using: ra/fsp/src/r_canfd/.util/canfd_gen.py <constraint display="Only Channel 0 is available on this MCU."> ("${config.bsp.fsp.mcu.canfd.num_channels}" === "2") || !(("${module.driver.{{ id_name() }}.channel}" > 0) || ("${config.driver.{{ id_name() }}.afl.ch1_num}" > 0) || ("${config.driver.{{ id_name() }}.global_err.cb_channel}" > 0)) </constraint> - <constraint display="The total number of configured rules across all channels cannot exceed 128 on RA6M5 or 32 on all other MCUs."> - ((${config.driver.{{ id_name() }}.afl.ch0_num} + ${config.driver.{{ id_name() }}.afl.ch1_num}) <= ${config.bsp.fsp.mcu.canfd.afl_rules}) || ${config.bsp.fsp.mcu.canfd.afl_rules_independent} == 1 + <constraint display="The total number of configured rules across all channels exceeds the maximum allowed by the MCU."> + ((${config.driver.{{ id_name() }}.afl.ch0_num} + ${config.driver.{{ id_name() }}.afl.ch1_num}) <= ${config.bsp.fsp.mcu.canfd.afl_rules}) + </constraint> + <constraint display="The number of configured AFL rules for channel 0 exceeds the maximum allowed by the MCU."> + (${config.driver.{{ id_name() }}.afl.ch0_num} <= ${config.bsp.fsp.mcu.canfd.afl_rules_each_chnl}) </constraint> - <constraint display="The total number of configured rules for each channel cannot exceed 16 on this MCU."> - (${config.driver.{{ id_name() }}.afl.ch0_num} <= ${config.bsp.fsp.mcu.canfd.afl_rules} && ${config.driver.{{ id_name() }}.afl.ch1_num} <= ${config.bsp.fsp.mcu.canfd.afl_rules}) || ${config.bsp.fsp.mcu.canfd.afl_rules_independent} == 0 + <constraint display="The number of configured AFL rules for channel 1 exceeds the maximum allowed by the MCU."> + (${config.driver.{{ id_name() }}.afl.ch1_num} <= ${config.bsp.fsp.mcu.canfd.afl_rules_each_chnl}) </constraint> <constraint display="The number of AFL rules for the configured channel is 0."> (("${module.driver.{{ id_name() }}.channel}" === "0") && ("${config.driver.{{ id_name() }}.afl.ch0_num}" > "0")) || (("${module.driver.{{ id_name() }}.channel}" === "1") && ("${config.driver.{{ id_name() }}.afl.ch1_num}" > "0")) @@ -249,7 +248,7 @@ This file was generated using: ra/fsp/src/r_canfd/.util/canfd_gen.py <constraint display="Must be a valid integer with a minimum of 1MHz.">testInteger("${module.driver.{{ id_name() }}.bitrate.automatic.data_rate}") && ("${module.driver.{{ id_name() }}.bitrate.automatic.data_rate}" >= 1000000)</constraint> </property> <property default="75" display="Bitrate|Automatic|Sample Point (%)" id="module.driver.{{ id_name() }}.bitrate.automatic.sample_point" description="Specify desired sample point."> - <constraint display="Must be a valid integer between 60 and 99.">testInteger("${module.driver.{{ id_name() }}.bitrate.automatic.sample_point}") && ("${module.driver.{{ id_name() }}.bitrate.automatic.sample_point}" > 60) && ("${module.driver.{{ id_name() }}.bitrate.automatic.sample_point}" <= 99)</constraint> + <constraint display="Must be a valid integer between 60 and 99.">testInteger("${module.driver.{{ id_name() }}.bitrate.automatic.sample_point}") && ("${module.driver.{{ id_name() }}.bitrate.automatic.sample_point}" >= 60) && ("${module.driver.{{ id_name() }}.bitrate.automatic.sample_point}" <= 99)</constraint> </property> <property default="module.driver.{{ id_name() }}.bitrate.automatic.delay_compensation.enabled" display="Bitrate|Delay Compensation" id="module.driver.{{ id_name() }}.bitrate.automatic.delay_compensation" description="When enabled the CANFD module will automatically compensate for any transceiver or bus delay between transmitted and received bits. When manually supplying bit timing values with delay compensation enabled be sure the data prescaler is 2 or smaller for correct operation."> <option display="Enable" id="module.driver.{{ id_name() }}.bitrate.automatic.delay_compensation.enabled" value="(1)"/> @@ -270,7 +269,7 @@ This file was generated using: ra/fsp/src/r_canfd/.util/canfd_gen.py <constraint display="Value must be a non-negative integer between 1 and 128.">testInteger("${module.driver.{{ id_name() }}.manual.nominal.sync_jump_width}") && (("${module.driver.{{ id_name() }}.manual.nominal.sync_jump_width}" >= 1) && ("${module.driver.{{ id_name() }}.manual.nominal.sync_jump_width}" <= 128))</constraint> </property> <property default="1" display="Bitrate|Manual|Data|Prescaler (divisor)" id="module.driver.{{ id_name() }}.manual.data.prescaler" description="Specify clock divisor for data bitrate."> - <constraint display="Value must be a non-negative integer between 1 and 1024.">testInteger("${module.driver.{{ id_name() }}.manual.data.prescaler}") && (("${module.driver.{{ id_name() }}.manual.data.prescaler}" >= 1) && ("${module.driver.{{ id_name() }}.manual.data.prescaler}" <= 1024))</constraint> + <constraint display="Value must be a non-negative integer between 1 and 256.">testInteger("${module.driver.{{ id_name() }}.manual.data.prescaler}") && (("${module.driver.{{ id_name() }}.manual.data.prescaler}" >= 1) && ("${module.driver.{{ id_name() }}.manual.data.prescaler}" <= 256))</constraint> </property> <property default="5" display="Bitrate|Manual|Data|Time Segment 1 (Tq)" id="module.driver.{{ id_name() }}.manual.data.time_segment_1" description="Select the Time Segment 1 value. Check module usage notes for how to calculate this value."> <constraint display="Value must be a non-negative integer between 2 and 32.">testInteger("${module.driver.{{ id_name() }}.manual.data.time_segment_1}") && (("${module.driver.{{ id_name() }}.manual.data.time_segment_1}" >= 2) && ("${module.driver.{{ id_name() }}.manual.data.time_segment_1}" <= 32))</constraint> @@ -427,7 +426,7 @@ This file was generated using: ra/fsp/src/r_canfd/.util/canfd_gen.py ' ' + ' if(nominal_better)' + ' {' + -' BitSettingsCopy(nominal_best, nominal);' + +' BitSettingsCopy(nominal_best, nominal);' + ' }' + ' ' + ' /* Check to see if all required bitrates are exact */' + diff --git a/ra/fsp/src/r_canfd/.util/canfd_gen.py b/ra/fsp/src/r_canfd/.util/canfd_gen.py index fe77dec67..ec98706de 100644 --- a/ra/fsp/src/r_canfd/.util/canfd_gen.py +++ b/ra/fsp/src/r_canfd/.util/canfd_gen.py @@ -10,4 +10,4 @@ with open('Renesas##HAL Drivers##all##r_canfd####x.xx.xx.xml.j2') as temp: t = Template(temp.read()) with open(os.path.join(output_dir, 'Renesas##HAL Drivers##all##{}####x.xx.xx.xml').format(c), 'w+') as f: - f.write(re.sub(r' *\r?\n', r'\r\n', t.render(module_variant=c).strip(),flags=re.M)) + f.write(re.sub(r' *\r', '\r\n', t.render(module_variant=c).strip(),flags=re.M)) diff --git a/ra/fsp/src/r_cgc/r_cgc.c b/ra/fsp/src/r_cgc/r_cgc.c index 5dfc2713c..47e846f45 100644 --- a/ra/fsp/src/r_cgc/r_cgc.c +++ b/ra/fsp/src/r_cgc/r_cgc.c @@ -35,129 +35,114 @@ #endif /* "CGC" in ASCII, used to determine if the module is open. */ -#define CGC_OPEN (0x00434743U) +#define CGC_OPEN (0x00434743U) -#define CGC_PRV_SUBCLOCK_LOCO_HZ (32768U) +#define CGC_PRV_SUBCLOCK_LOCO_HZ (32768U) -#define CGC_PRV_OSTDCR_OSC_STOP_ENABLE (0x81U) +#define CGC_PRV_OSTDCR_OSC_STOP_ENABLE (0x81U) #if 3U == BSP_FEATURE_CGC_PLLCCR_TYPE /* PLLMULNF in PLLCCR is 2 bits wide. */ - #define CGC_PRV_PLLCCR_PLLMULNF_MASK (0x3U) + #define CGC_PRV_PLLCCR_PLLMULNF_MASK (0x3U) /* PLLMULNF in PLLCCR starts at bit 6. */ - #define CGC_PRV_PLLCCR_PLLMULNF_BIT (6U) + #define CGC_PRV_PLLCCR_PLLMULNF_BIT (6U) /* PLLMUL in PLLCCR is 8 bits wide. */ - #define CGC_PRV_PLLCCR_PLLMUL_MASK (0xFFU) + #define CGC_PRV_PLLCCR_PLLMUL_MASK (0xFFU) #elif 4U == BSP_FEATURE_CGC_PLLCCR_TYPE /* PLLMUL in PLLCCR is 8 bits wide. */ - #define CGC_PRV_PLLCCR_PLLMUL_MASK (0xFFU) + #define CGC_PRV_PLLCCR_PLLMUL_MASK (0xFFU) #else /* PLLMUL in PLLCCR is 6 bits wide. */ - #define CGC_PRV_PLLCCR_PLLMUL_MASK (0x3FU) + #define CGC_PRV_PLLCCR_PLLMUL_MASK (0x3FU) #endif /* PLLMUL in PLLCCR starts at bit 8. */ -#define CGC_PRV_PLLCCR_PLLMUL_BIT (8U) +#define CGC_PRV_PLLCCR_PLLMUL_BIT (8U) /* PLSRCSEL in PLLCCR starts at bit 4. */ -#define CGC_PRV_PLLCCR_PLSRCSEL_BIT (4U) +#define CGC_PRV_PLLCCR_PLSRCSEL_BIT (4U) /* PLSET in PLLCCR starts at bit 6. */ -#define CGC_PRV_PLLCCR_PLSET_BIT (6U) +#define CGC_PRV_PLLCCR_PLSET_BIT (6U) /* PLLMUL in PLLCCR2 is 5 bits wide. */ -#define CGC_PRV_PLLCCR2_PLLMUL_MASK (0x1FU) +#define CGC_PRV_PLLCCR2_PLLMUL_MASK (0x1FU) /* PLODIV in PLLCCR2 starts at bit 6. */ -#define CGC_PRV_PLLCCR2_PLODIV_BIT (6U) +#define CGC_PRV_PLLCCR2_PLODIV_BIT (6U) /* CKODIV in CKOCR starts at bit 4. */ -#define CGC_PRV_CKOCR_CKODIV_BIT (4) +#define CGC_PRV_CKOCR_CKODIV_BIT (4) /* PLODIVx in PLLCCR2 are 4 bits wide. */ -#define CGC_PRV_PLLCCR2_PLODIVX_MASK (0xFU) +#define CGC_PRV_PLLCCR2_PLODIVX_MASK (0xFU) /* PLODIVP in PLLCCR2 starts at bit 0. */ -#define CGC_PRV_PLLCCR2_PLODIVP_BIT (0U) +#define CGC_PRV_PLLCCR2_PLODIVP_BIT (0U) /* PLODIVP in PLLCCR2 starts at bit 4. */ -#define CGC_PRV_PLLCCR2_PLODIVQ_BIT (4U) +#define CGC_PRV_PLLCCR2_PLODIVQ_BIT (4U) /* PLODIVP in PLLCCR2 starts at bit 8. */ -#define CGC_PRV_PLLCCR2_PLODIVR_BIT (8U) +#define CGC_PRV_PLLCCR2_PLODIVR_BIT (8U) #if 4U == BSP_FEATURE_CGC_PLLCCR_TYPE /* Bit-mask of values that must be 1 for PLLCCR type 4. */ - #define CGC_PRV_PLLCCR_RESET_VALUE (0x04U) + #define CGC_PRV_PLLCCR_RESET_VALUE (0x04U) #endif #if BSP_PRV_PLL_SUPPORTED #if BSP_PRV_PLL2_SUPPORTED - #define CGC_PRV_NUM_CLOCKS ((uint8_t) CGC_CLOCK_PLL2 + 1U) + #define CGC_PRV_NUM_CLOCKS ((uint8_t) CGC_CLOCK_PLL2 + 1U) #else - #define CGC_PRV_NUM_CLOCKS ((uint8_t) CGC_CLOCK_PLL + 1U) + #define CGC_PRV_NUM_CLOCKS ((uint8_t) CGC_CLOCK_PLL + 1U) #endif #else - #define CGC_PRV_NUM_CLOCKS ((uint8_t) CGC_CLOCK_SUBCLOCK + 1U) + #define CGC_PRV_NUM_CLOCKS ((uint8_t) CGC_CLOCK_SUBCLOCK + 1U) #endif /* Mask used to isolate dividers for ICLK and FCLK. */ -#define CGC_PRV_SCKDIVCR_ICLK_FCLK_MASK (0x77000000U) +#define CGC_PRV_SCKDIVCR_ICLK_FCLK_MASK (0x77000000U) -#define CGC_PRV_HOCOCR ((uint8_t *) &R_SYSTEM->HOCOCR) -#define CGC_PRV_MOCOCR ((uint8_t *) &R_SYSTEM->MOCOCR) -#define CGC_PRV_LOCOCR ((uint8_t *) &R_SYSTEM->LOCOCR) -#define CGC_PRV_MOSCCR ((uint8_t *) &R_SYSTEM->MOSCCR) -#define CGC_PRV_SOSCCR ((uint8_t *) &R_SYSTEM->SOSCCR) -#define CGC_PRV_PLLCR ((uint8_t *) &R_SYSTEM->PLLCR) -#define CGC_PRV_PLL2CR ((uint8_t *) &R_SYSTEM->PLL2CR) +#define CGC_PRV_HOCOCR ((uint8_t *) &R_SYSTEM->HOCOCR) +#define CGC_PRV_MOCOCR ((uint8_t *) &R_SYSTEM->MOCOCR) +#define CGC_PRV_LOCOCR ((uint8_t *) &R_SYSTEM->LOCOCR) +#define CGC_PRV_MOSCCR ((uint8_t *) &R_SYSTEM->MOSCCR) +#define CGC_PRV_SOSCCR ((uint8_t *) &R_SYSTEM->SOSCCR) +#define CGC_PRV_PLLCR ((uint8_t *) &R_SYSTEM->PLLCR) +#define CGC_PRV_PLL2CR ((uint8_t *) &R_SYSTEM->PLL2CR) /* The closest supported power mode to use when exiting low speed or low voltage mode. */ #if BSP_FEATURE_CGC_MIDDLE_SPEED_MAX_FREQ_HZ > 0U - #define CGC_PRV_EXIT_LOW_SPEED_MODE (BSP_PRV_OPERATING_MODE_MIDDLE_SPEED) + #define CGC_PRV_EXIT_LOW_SPEED_MODE (BSP_PRV_OPERATING_MODE_MIDDLE_SPEED) #else - #define CGC_PRV_EXIT_LOW_SPEED_MODE (BSP_PRV_OPERATING_MODE_HIGH_SPEED) + #define CGC_PRV_EXIT_LOW_SPEED_MODE (BSP_PRV_OPERATING_MODE_HIGH_SPEED) #endif #if BSP_FEATURE_CGC_LOW_VOLTAGE_MAX_FREQ_HZ > 0U - #define CGC_PRV_USE_LOW_VOLTAGE_MODE (CGC_CFG_USE_LOW_VOLTAGE_MODE) + #define CGC_PRV_USE_LOW_VOLTAGE_MODE (CGC_CFG_USE_LOW_VOLTAGE_MODE) #else - #define CGC_PRV_USE_LOW_VOLTAGE_MODE (0) + #define CGC_PRV_USE_LOW_VOLTAGE_MODE (0) #endif -/* Specifications for PLL on MCUs with PLLCCR. */ -#if 3U == BSP_FEATURE_CGC_PLLCCR_TYPE - #define CGC_PRV_PLLCCR_PLL_MIN_HZ (40000000U) -#elif 4U == BSP_FEATURE_CGC_PLLCCR_TYPE - #define CGC_PRV_PLLCCR_PLL_MIN_HZ (11000000U) -#else - #define CGC_PRV_PLLCCR_PLL_MIN_HZ (120000000U) -#endif - -/* Specifications for PLL on MCUs with PLLCCR2. */ -#define CGC_PRV_PLLCCR2_PLL_MIN_HZ (24000000U) -#define CGC_PRV_PLLCCR2_PLL_MULTIPLIED_MAX_HZ (128000000U) -#define CGC_PRV_PLLCCR2_PLL_SRC_MIN_HZ (4000000U) -#define CGC_PRV_PLLCCR2_PLL_SRC_MAX_HZ (12500000U) - /* Scaling factor for calculating the multiplier for PLLCCR type 3. */ -#define CGC_PRV_PLL_MUL_FACTOR (6U) +#define CGC_PRV_PLL_MUL_FACTOR (6U) /* Scaling factor for PLLMUL values; using scaling of 6. */ -#define CGC_PRV_PLL_MUL_COEFF (6U) -#define CGC_PRV_PLL_MUL_NF_COEFF (2U) +#define CGC_PRV_PLL_MUL_COEFF (6U) +#define CGC_PRV_PLL_MUL_NF_COEFF (2U) /* Mask of the uppermost bit of all dividers in SCKDIVCR that are valid when oscillation stop detection is enabled. */ -#define CGC_PRV_SCKDIVCR_UPPER_BIT (BSP_PRV_SCKDIVCR_MASK & 0x44444444U) +#define CGC_PRV_SCKDIVCR_UPPER_BIT (BSP_PRV_SCKDIVCR_MASK & 0x44444444U) /* Offset factor to convert PLL MUL values to register values. */ -#define CGC_PRV_PLLCCR_TYPE4_PLLMUL_OFFSET (574U) +#define CGC_PRV_PLLCCR_TYPE4_PLLMUL_OFFSET (574U) /*********************************************************************************************************************** * Typedef definitions @@ -180,9 +165,14 @@ typedef enum e_cgc_prv_change /* Private enumeration for PLL output selection. */ typedef enum e_cgc_prv_pllout { - CGC_PRV_PLLOUT_P = 0, ///< Primary clock output for single output PLLs or P clock output for multi-output PLL. - CGC_PRV_PLLOUT_Q = 1, ///< Q clock output for multi-output PLL. - CGC_PRV_PLLOUT_R = 2, ///< R clock output for multi-output PLL. + CGC_PRV_PLLOUT_PLL1 = 0, ///< Primary clock output for single output PLL1. + CGC_PRV_PLLOUT_PLL1_P = 0, ///< P clock output for multi-output PLL1. + CGC_PRV_PLLOUT_PLL1_Q = 1, ///< Q clock output for multi-output PLL1. + CGC_PRV_PLLOUT_PLL1_R = 2, ///< R clock output for multi-output PLL1. + CGC_PRV_PLLOUT_PLL2 = 8, ///< Primary clock output for single output PLL2. + CGC_PRV_PLLOUT_PLL2_P = 8, ///< P clock output for multi-output PLL2. + CGC_PRV_PLLOUT_PLL2_Q = 9, ///< Q clock output for multi-output PLL2. + CGC_PRV_PLLOUT_PLL2_R = 10, ///< R clock output for multi-output PLL2. } cgc_prv_pllout_t; #if defined(__ARMCC_VERSION) || defined(__ICCARM__) @@ -470,16 +460,29 @@ fsp_err_t R_CGC_ClocksCfg (cgc_ctrl_t * const p_ctrl, cgc_clocks_cfg_t const * c if (CGC_CLOCK_CHANGE_START == p_clock_cfg->pll_state) { #if 3U == BSP_FEATURE_CGC_PLLCCR_TYPE - err = r_cgc_pllccr_pll_hz_calculate(&p_clock_cfg->pll_cfg, CGC_CLOCK_PLL, CGC_PRV_PLLOUT_P, &pll_hz, &pllccr); + err = r_cgc_pllccr_pll_hz_calculate(&p_clock_cfg->pll_cfg, + CGC_CLOCK_PLL, + CGC_PRV_PLLOUT_PLL1_P, + &pll_hz, + &pllccr); FSP_ERROR_RETURN(FSP_SUCCESS == err, err); - err = r_cgc_pllccr_pll_hz_calculate(&p_clock_cfg->pll_cfg, CGC_CLOCK_PLL, CGC_PRV_PLLOUT_Q, &pll_hz, &pllccr); + err = r_cgc_pllccr_pll_hz_calculate(&p_clock_cfg->pll_cfg, + CGC_CLOCK_PLL, + CGC_PRV_PLLOUT_PLL1_Q, + &pll_hz, + &pllccr); FSP_ERROR_RETURN(FSP_SUCCESS == err, err); - err = r_cgc_pllccr_pll_hz_calculate(&p_clock_cfg->pll_cfg, CGC_CLOCK_PLL, CGC_PRV_PLLOUT_R, &pll_hz, &pllccr); + err = r_cgc_pllccr_pll_hz_calculate(&p_clock_cfg->pll_cfg, + CGC_CLOCK_PLL, + CGC_PRV_PLLOUT_PLL1_R, + &pll_hz, + &pllccr); FSP_ERROR_RETURN(FSP_SUCCESS == err, err); #else - err = r_cgc_pllccr_pll_hz_calculate(&p_clock_cfg->pll_cfg, CGC_CLOCK_PLL, CGC_PRV_PLLOUT_P, &pll_hz, &pllccr); + err = + r_cgc_pllccr_pll_hz_calculate(&p_clock_cfg->pll_cfg, CGC_CLOCK_PLL, CGC_PRV_PLLOUT_PLL1, &pll_hz, &pllccr); FSP_ERROR_RETURN(FSP_SUCCESS == err, err); #endif } @@ -506,19 +509,35 @@ fsp_err_t R_CGC_ClocksCfg (cgc_ctrl_t * const p_ctrl, cgc_clocks_cfg_t const * c { #if 3U == BSP_FEATURE_CGC_PLLCCR_TYPE err = - r_cgc_pllccr_pll_hz_calculate(&p_clock_cfg->pll2_cfg, CGC_CLOCK_PLL2, CGC_PRV_PLLOUT_P, &pll2_hz, &pll2ccr); + r_cgc_pllccr_pll_hz_calculate(&p_clock_cfg->pll2_cfg, + CGC_CLOCK_PLL2, + CGC_PRV_PLLOUT_PLL2_P, + &pll2_hz, + &pll2ccr); FSP_ERROR_RETURN(FSP_SUCCESS == err, err); err = - r_cgc_pllccr_pll_hz_calculate(&p_clock_cfg->pll2_cfg, CGC_CLOCK_PLL2, CGC_PRV_PLLOUT_Q, &pll2_hz, &pll2ccr); + r_cgc_pllccr_pll_hz_calculate(&p_clock_cfg->pll2_cfg, + CGC_CLOCK_PLL2, + CGC_PRV_PLLOUT_PLL2_Q, + &pll2_hz, + &pll2ccr); FSP_ERROR_RETURN(FSP_SUCCESS == err, err); err = - r_cgc_pllccr_pll_hz_calculate(&p_clock_cfg->pll2_cfg, CGC_CLOCK_PLL2, CGC_PRV_PLLOUT_R, &pll2_hz, &pll2ccr); + r_cgc_pllccr_pll_hz_calculate(&p_clock_cfg->pll2_cfg, + CGC_CLOCK_PLL2, + CGC_PRV_PLLOUT_PLL2_R, + &pll2_hz, + &pll2ccr); FSP_ERROR_RETURN(FSP_SUCCESS == err, err); #else err = - r_cgc_pllccr_pll_hz_calculate(&p_clock_cfg->pll2_cfg, CGC_CLOCK_PLL2, CGC_PRV_PLLOUT_P, &pll2_hz, &pll2ccr); + r_cgc_pllccr_pll_hz_calculate(&p_clock_cfg->pll2_cfg, + CGC_CLOCK_PLL2, + CGC_PRV_PLLOUT_PLL2, + &pll2_hz, + &pll2ccr); FSP_ERROR_RETURN(FSP_SUCCESS == err, err); #endif } @@ -800,17 +819,26 @@ fsp_err_t R_CGC_ClockStart (cgc_ctrl_t * const p_ctrl, cgc_clock_t clock_source, #endif ) { + cgc_prv_pllout_t pll_instance = CGC_CLOCK_PLL == clock_source ? CGC_PRV_PLLOUT_PLL1 : CGC_PRV_PLLOUT_PLL2; #if 3U == BSP_FEATURE_CGC_PLLCCR_TYPE - err = r_cgc_pllccr_pll_hz_calculate(p_pll_cfg, clock_source, CGC_PRV_PLLOUT_P, &pll_hz, &pllccr); + err = + r_cgc_pllccr_pll_hz_calculate(p_pll_cfg, clock_source, + (cgc_prv_pllout_t) (CGC_PRV_PLLOUT_PLL1_P | pll_instance), &pll_hz, &pllccr); FSP_ERROR_RETURN(FSP_SUCCESS == err, err); - err = r_cgc_pllccr_pll_hz_calculate(p_pll_cfg, clock_source, CGC_PRV_PLLOUT_Q, &pll_hz, &pllccr); + err = + r_cgc_pllccr_pll_hz_calculate(p_pll_cfg, clock_source, + (cgc_prv_pllout_t) (CGC_PRV_PLLOUT_PLL1_Q | pll_instance), &pll_hz, &pllccr); FSP_ERROR_RETURN(FSP_SUCCESS == err, err); - err = r_cgc_pllccr_pll_hz_calculate(p_pll_cfg, clock_source, CGC_PRV_PLLOUT_R, &pll_hz, &pllccr); + err = + r_cgc_pllccr_pll_hz_calculate(p_pll_cfg, clock_source, + (cgc_prv_pllout_t) (CGC_PRV_PLLOUT_PLL1_R | pll_instance), &pll_hz, &pllccr); FSP_ERROR_RETURN(FSP_SUCCESS == err, err); #else - err = r_cgc_pllccr_pll_hz_calculate(p_pll_cfg, clock_source, CGC_PRV_PLLOUT_P, &pll_hz, &pllccr); + err = + r_cgc_pllccr_pll_hz_calculate(p_pll_cfg, clock_source, + (cgc_prv_pllout_t) (CGC_PRV_PLLOUT_PLL1 | pll_instance), &pll_hz, &pllccr); FSP_ERROR_RETURN(FSP_SUCCESS == err, err); #endif } @@ -1862,8 +1890,6 @@ static fsp_err_t r_cgc_pll_hz_calculate (cgc_pll_cfg_t const * const p_pll_cfg, * switching to PLL. */ uint32_t pll_src_freq_hz = BSP_CFG_XTAL_HZ; #if 1U == BSP_FEATURE_CGC_PLLCCR_TYPE - FSP_PARAMETER_NOT_USED(pll_out); - if (CGC_CLOCK_HOCO == p_pll_cfg->source_clock) { pll_src_freq_hz = BSP_HOCO_HZ; @@ -1880,10 +1906,38 @@ static fsp_err_t r_cgc_pll_hz_calculate (cgc_pll_cfg_t const * const p_pll_cfg, #if CGC_CFG_PARAM_CHECKING_ENABLE - /* The PLL output frequency must be between 120 MHz and 240 MHz on most MCUs (see Table 9.1 "Specifications of the - * clock generation circuit for the clock sources" in the RA6M3 manual R01UH0886EJ0100). */ - FSP_ASSERT(pll_hz >= CGC_PRV_PLLCCR_PLL_MIN_HZ); - FSP_ASSERT(pll_hz <= BSP_FEATURE_CGC_PLLCCR_MAX_HZ); + /* Verify that the output PLL frequency is within the specified frequency range for this device. */ + #if !BSP_FEATURE_CGC_HAS_PLL2 + FSP_PARAMETER_NOT_USED(pll_out); + + FSP_ASSERT(pll_hz >= BSP_FEATURE_CGC_PLL_OUT_MIN_HZ); + #else + if (CGC_PRV_PLLOUT_PLL1 == pll_out) + { + FSP_ASSERT(pll_hz >= BSP_FEATURE_CGC_PLL_OUT_MIN_HZ); + } + else + { + FSP_ASSERT(pll_hz >= BSP_FEATURE_CGC_PLL2_OUT_MIN_HZ); + } + #endif + + #if !BSP_FEATURE_CGC_HAS_PLL2 + FSP_PARAMETER_NOT_USED(pll_out); + + FSP_ASSERT(pll_hz <= BSP_FEATURE_CGC_PLL_OUT_MAX_HZ); + #else + if (CGC_PRV_PLLOUT_PLL1 == pll_out) + { + FSP_ASSERT(pll_hz <= BSP_FEATURE_CGC_PLL_OUT_MAX_HZ); + } + else + { + FSP_ASSERT(pll_hz <= BSP_FEATURE_CGC_PLL2_OUT_MAX_HZ); + } + #endif + #else + FSP_PARAMETER_NOT_USED(pll_out); #endif #elif 3U == BSP_FEATURE_CGC_PLLCCR_TYPE if (CGC_CLOCK_HOCO == p_pll_cfg->source_clock) @@ -1922,30 +1976,41 @@ static fsp_err_t r_cgc_pll_hz_calculate (cgc_pll_cfg_t const * const p_pll_cfg, FSP_ASSERT(vco_hz <= BSP_FEATURE_CGC_PLLCCR_VCO_MAX_HZ); #endif + pll_out = (cgc_prv_pllout_t) ((uint32_t) pll_out & (uint32_t) ~CGC_PRV_PLLOUT_PLL2); + uint32_t pll_hz = 0; - if (CGC_PRV_PLLOUT_P == pll_out) + if (CGC_PRV_PLLOUT_PLL1_P == pll_out) { pll_hz = (uint32_t) (vco_hz / p_pll_cfg->out_div_p); + + #if CGC_CFG_PARAM_CHECKING_ENABLE + FSP_ASSERT(pll_hz >= BSP_FEATURE_CGC_PLL_OUT_P_MIN_HZ); + FSP_ASSERT(pll_hz <= BSP_FEATURE_CGC_PLL_OUT_P_MAX_HZ); + #endif } - else if (CGC_PRV_PLLOUT_Q == pll_out) + else if (CGC_PRV_PLLOUT_PLL1_Q == pll_out) { pll_hz = (uint32_t) (vco_hz / p_pll_cfg->out_div_q); + + #if CGC_CFG_PARAM_CHECKING_ENABLE + FSP_ASSERT(pll_hz >= BSP_FEATURE_CGC_PLL_OUT_Q_MIN_HZ); + FSP_ASSERT(pll_hz <= BSP_FEATURE_CGC_PLL_OUT_Q_MAX_HZ); + #endif } - else if (CGC_PRV_PLLOUT_R == pll_out) + else if (CGC_PRV_PLLOUT_PLL1_R == pll_out) { pll_hz = (uint32_t) (vco_hz / p_pll_cfg->out_div_r); + + #if CGC_CFG_PARAM_CHECKING_ENABLE + FSP_ASSERT(pll_hz >= BSP_FEATURE_CGC_PLL_OUT_R_MIN_HZ); + FSP_ASSERT(pll_hz <= BSP_FEATURE_CGC_PLL_OUT_R_MAX_HZ); + #endif } else { /* Do nothing */ } - #if CGC_CFG_PARAM_CHECKING_ENABLE - - /* The PLL output frequency must be between 40 MHz and 480 MHz for this PLL type. */ - FSP_ASSERT(pll_hz >= CGC_PRV_PLLCCR_PLL_MIN_HZ); - FSP_ASSERT(pll_hz <= BSP_FEATURE_CGC_PLLCCR_MAX_HZ); - #endif #elif 4U == BSP_FEATURE_CGC_PLLCCR_TYPE /* Normal P,Q,R outputs are not supported. */ @@ -1980,9 +2045,9 @@ static fsp_err_t r_cgc_pll_hz_calculate (cgc_pll_cfg_t const * const p_pll_cfg, * - The minimum frequency is 24 MHz. */ FSP_ASSERT( - (pll_src_freq_hz <= CGC_PRV_PLLCCR2_PLL_SRC_MAX_HZ) && (pll_src_freq_hz >= CGC_PRV_PLLCCR2_PLL_SRC_MIN_HZ)); - FSP_ASSERT(clock_freq_multiplied <= CGC_PRV_PLLCCR2_PLL_MULTIPLIED_MAX_HZ); - FSP_ASSERT(pll_hz >= CGC_PRV_PLLCCR2_PLL_MIN_HZ); + (pll_src_freq_hz <= BSP_FEATURE_CGC_PLL_SRC_MAX_HZ) && (pll_src_freq_hz >= BSP_FEATURE_CGC_PLL_SRC_MIN_HZ)); + FSP_ASSERT(clock_freq_multiplied <= (BSP_FEATURE_CGC_PLL_OUT_MAX_HZ * 2U)); + FSP_ASSERT(pll_hz >= BSP_FEATURE_CGC_PLL_OUT_MIN_HZ); #endif #endif diff --git a/ra/fsp/src/r_doc/r_doc.c b/ra/fsp/src/r_doc/r_doc.c index 0ebae5c81..2f8a80dbf 100644 --- a/ra/fsp/src/r_doc/r_doc.c +++ b/ra/fsp/src/r_doc/r_doc.c @@ -126,7 +126,6 @@ fsp_err_t R_DOC_Open (doc_ctrl_t * const p_api_ctrl, doc_cfg_t const * const p_c uint32_t docr = R_DOC_B_DOCR_OMS_Msk & p_cfg->event; docr |= (uint32_t) (p_cfg->event << (R_DOC_B_DOCR_DCSEL_Pos - 2U)) & R_DOC_B_DOCR_DCSEL_Msk; docr |= (uint32_t) (p_cfg->bit_width << R_DOC_B_DOCR_DOBW_Pos) & R_DOC_B_DOCR_DOBW_Msk; - docr |= R_DOC_B_DOCR_DOPCIE_Msk; R_DOC_B->DOCR = (uint8_t) docr & UINT8_MAX; /* Clear the hardware status flag. */ diff --git a/ra/fsp/src/r_dtc/r_dtc.c b/ra/fsp/src/r_dtc/r_dtc.c index 128fd0298..b61a6f5af 100644 --- a/ra/fsp/src/r_dtc/r_dtc.c +++ b/ra/fsp/src/r_dtc/r_dtc.c @@ -150,9 +150,6 @@ fsp_err_t R_DTC_Open (transfer_ctrl_t * const p_api_ctrl, transfer_cfg_t const * FSP_ERROR_RETURN(p_ctrl->open != DTC_OPEN, FSP_ERR_ALREADY_OPEN); FSP_ASSERT(NULL != p_cfg); FSP_ASSERT(NULL != p_cfg->p_extend); - FSP_ASSERT(NULL != p_cfg->p_info); - fsp_err_t err = r_dtc_length_assert(p_cfg->p_info); - FSP_ERROR_RETURN(FSP_SUCCESS == err, err); #endif /* One time initialization for all DTC instances. */ @@ -170,7 +167,14 @@ fsp_err_t R_DTC_Open (transfer_ctrl_t * const p_api_ctrl, transfer_cfg_t const * p_ctrl->irq = irq; /* Copy p_info into the DTC vector table. */ - r_dtc_set_info(p_ctrl, p_cfg->p_info); + if (p_cfg->p_info) + { +#if DTC_CFG_PARAM_CHECKING_ENABLE + fsp_err_t err = r_dtc_length_assert(p_cfg->p_info); + FSP_ERROR_RETURN(FSP_SUCCESS == err, err); +#endif + r_dtc_set_info(p_ctrl, p_cfg->p_info); + } /* Mark driver as open by initializing it to "DTC" in its ASCII equivalent. */ p_ctrl->open = DTC_OPEN; diff --git a/ra/fsp/src/r_flash_hp/r_flash_hp.c b/ra/fsp/src/r_flash_hp/r_flash_hp.c index b3c96ea37..964ac631d 100644 --- a/ra/fsp/src/r_flash_hp/r_flash_hp.c +++ b/ra/fsp/src/r_flash_hp/r_flash_hp.c @@ -589,12 +589,28 @@ fsp_err_t R_FLASH_HP_Erase (flash_ctrl_t * const p_api_ctrl, uint32_t const addr } #if BSP_FEATURE_FLASH_HP_SUPPORTS_DUAL_BANK - uint32_t rom_end = - (FLASH_HP_PRV_DUALSEL_BANKMD_MASK == - (*flash_hp_dualsel & FLASH_HP_PRV_DUALSEL_BANKMD_MASK)) ? BSP_ROM_SIZE_BYTES : (BSP_ROM_SIZE_BYTES & - ~UINT16_MAX) / 2; + uint32_t rom_end = 0; + + if ((FLASH_HP_PRV_DUALSEL_BANKMD_MASK != (*flash_hp_dualsel & FLASH_HP_PRV_DUALSEL_BANKMD_MASK))) + { + /* Start address out of range */ + rom_end = BSP_FEATURE_FLASH_HP_CF_DUAL_BANK_START + ((BSP_ROM_SIZE_BYTES & ~UINT16_MAX) / 2); + FSP_ERROR_RETURN(start_address < rom_end, FSP_ERR_INVALID_ADDRESS); + + /* Region to erase must fall within bank */ + rom_end = (BSP_ROM_SIZE_BYTES & ~UINT16_MAX) / 2; + FSP_ERROR_RETURN((start_address & FLASH_HP_PRV_BANK1_MASK) + num_bytes <= rom_end, FSP_ERR_INVALID_BLOCKS); + } + else + { + /* Start address out of range */ + rom_end = BSP_FEATURE_FLASH_CODE_FLASH_START + BSP_ROM_SIZE_BYTES; + FSP_ERROR_RETURN(start_address < rom_end, FSP_ERR_INVALID_ADDRESS); + + /* Requested region to erase out of range */ + FSP_ERROR_RETURN(start_address + num_bytes <= rom_end, FSP_ERR_INVALID_BLOCKS); + } - FSP_ERROR_RETURN((start_address & FLASH_HP_PRV_BANK1_MASK) + num_bytes <= rom_end, FSP_ERR_INVALID_BLOCKS); #else FSP_ERROR_RETURN(start_address + num_bytes <= (BSP_FEATURE_FLASH_CODE_FLASH_START + BSP_ROM_SIZE_BYTES), FSP_ERR_INVALID_BLOCKS); diff --git a/ra/fsp/src/r_iic_b_slave/r_iic_b_slave.c b/ra/fsp/src/r_iic_b_slave/r_iic_b_slave.c index 2d2cf3313..90ebd2375 100644 --- a/ra/fsp/src/r_iic_b_slave/r_iic_b_slave.c +++ b/ra/fsp/src/r_iic_b_slave/r_iic_b_slave.c @@ -984,6 +984,12 @@ static void iic_b_err_slave (iic_b_slave_instance_ctrl_t * p_ctrl) if (IIC_B_SLAVE_TRANSFER_DIR_MASTER_WRITE_SLAVE_READ == p_ctrl->direction) { i2c_event = I2C_SLAVE_EVENT_RX_COMPLETE; + + /* + * This is to fix the issue that after sending NACK, slave application won't be able to get any events until call read API again. + * It is preferred to clear NACK bit in the driver to allow more granular ACK control from the slave side. + */ + p_ctrl->p_reg->ACKCTL = R_I3C0_ACKCTL_ACKTWP_Msk; } else { diff --git a/ra/fsp/src/r_iic_master/r_iic_master.c b/ra/fsp/src/r_iic_master/r_iic_master.c index 9898ba972..1bd66ee69 100644 --- a/ra/fsp/src/r_iic_master/r_iic_master.c +++ b/ra/fsp/src/r_iic_master/r_iic_master.c @@ -945,7 +945,7 @@ static void iic_master_rxi_master (iic_master_instance_ctrl_t * p_ctrl) if (false == p_ctrl->dummy_read_completed) { /* Enable WAIT for 1 or 2 byte read */ - if (2U <= p_ctrl->total) + if (2U >= p_ctrl->total) { p_ctrl->p_reg->ICMR3_b.WAIT = 1; } diff --git a/ra/fsp/src/r_iic_slave/r_iic_slave.c b/ra/fsp/src/r_iic_slave/r_iic_slave.c index 56896f030..f00c34b97 100644 --- a/ra/fsp/src/r_iic_slave/r_iic_slave.c +++ b/ra/fsp/src/r_iic_slave/r_iic_slave.c @@ -436,6 +436,7 @@ static fsp_err_t iic_slave_read_write (i2c_slave_ctrl_t * const p_api_ctrl, /* Set the response as ACK */ p_ctrl->p_reg->ICMR3_b.ACKWP = 1; /* Write Enable */ p_ctrl->p_reg->ICMR3_b.ACKBT = 0; /* Write */ + p_ctrl->p_reg->ICMR3_b.ACKWP = 0; /* Timeouts are enabled by the driver code at the end of an IIC Slave callback. * Do not enable them here to prevent time restricting the application code. @@ -1013,6 +1014,14 @@ static void iic_err_slave (iic_slave_instance_ctrl_t * p_ctrl) if (IIC_SLAVE_TRANSFER_DIR_MASTER_WRITE_SLAVE_READ == p_ctrl->direction) { i2c_event = I2C_SLAVE_EVENT_RX_COMPLETE; + + /* + * This is to fix the issue that after sending NACK, slave application won't be able to get any events until call read API again. + * It is preferred to clear NACK bit in the driver to allow more granular ACK control from the slave side. + */ + p_ctrl->p_reg->ICMR3_b.ACKWP = 1; /* Write Enable */ + p_ctrl->p_reg->ICMR3_b.ACKBT = 0; /* Write */ + p_ctrl->p_reg->ICMR3_b.ACKWP = 0; } else { diff --git a/ra/fsp/src/r_lvd/r_lvd.c b/ra/fsp/src/r_lvd/r_lvd.c index 4754030e1..476d2bc7c 100644 --- a/ra/fsp/src/r_lvd/r_lvd.c +++ b/ra/fsp/src/r_lvd/r_lvd.c @@ -27,51 +27,74 @@ * Macro definitions **********************************************************************************************************************/ -#define LVD_OPENED 0x4C5644U +#define LVD_OPENED (0x4C5644U) -#define LVD_PRV_NUMBER_OF_MONITORS 2 +#define LVD_PRV_NUMBER_OF_MONITORS (5U) -#define LVD_PRV_FIRST_MONITOR_NUMBER (1U) +#define LVD_PRV_FIRST_MONITOR_NUMBER (1U) +#define LVD_PRV_NUMBER_OF_NMI (2U) +#define LVD_PRV_NUMBER_OF_VCC_MONITOR (2U) /* LVDNCR1 Bit Field Definitions */ -#define LVD_PRV_LVDNCR1_IDTSEL_OFFSET (0U) -#define LVD_PRV_LVDNCR1_IDTSEL_MASK (3U << LVD_PRV_LVDNCR1_IDTSEL_OFFSET) -#define LVD_PRV_LVDNCR1_IRQSEL_OFFSET (2U) -#define LVD_PRV_LVDNCR1_IRQSEL_MASK (1U << LVD_PRV_LVDNCR1_IRQSEL_OFFSET) +#define LVD_PRV_LVDNCR1_IDTSEL_OFFSET (0U) +#define LVD_PRV_LVDNCR1_IDTSEL_MASK (3U << LVD_PRV_LVDNCR1_IDTSEL_OFFSET) +#define LVD_PRV_LVDNCR1_IRQSEL_OFFSET (2U) +#define LVD_PRV_LVDNCR1_IRQSEL_MASK (1U << LVD_PRV_LVDNCR1_IRQSEL_OFFSET) /* LVDNSR Bit Field Definitions */ -#define LVD_PRV_LVDNSR_DET_OFFSET (0U) -#define LVD_PRV_LVDNSR_DET_MASK (1U << LVD_PRV_LVDNSR_DET_OFFSET) -#define LVD_PRV_LVDNSR_MON_OFFSET (1U) -#define LVD_PRV_LVDNSR_MON_MASK (1U << LVD_PRV_LVDNSR_MON_OFFSET) +#define LVD_PRV_LVDNSR_DET_OFFSET (0U) +#define LVD_PRV_LVDNSR_DET_MASK (1U << LVD_PRV_LVDNSR_DET_OFFSET) +#define LVD_PRV_LVDNSR_MON_OFFSET (1U) +#define LVD_PRV_LVDNSR_MON_MASK (1U << LVD_PRV_LVDNSR_MON_OFFSET) /* LVCMPCR Bit Field Definitions */ -#define LVD_PRV_LVCMPCR_LVD1E_OFFSET (5U) -#define LVD_PRV_LVCMPCR_LVD1E_MASK (1U << LVD_PRV_LVCMPCR_LVD1E_OFFSET) -#define LVD_PRV_LVCMPCR_LVD2E_OFFSET (6U) -#define LVD_PRV_LVCMPCR_LVD2E_MASK (1U << LVD_PRV_LVCMPCR_LVD2E_OFFSET) +#define LVD_PRV_LVCMPCR_LVD1E_OFFSET (5U) +#define LVD_PRV_LVCMPCR_LVD1E_MASK (1U << LVD_PRV_LVCMPCR_LVD1E_OFFSET) +#define LVD_PRV_LVCMPCR_LVD2E_OFFSET (6U) +#define LVD_PRV_LVCMPCR_LVD2E_MASK (1U << LVD_PRV_LVCMPCR_LVD2E_OFFSET) /* LVDLVLR Bit Field Definitions */ -#define LVD_PRV_LVDLVLR_LVD1LVL_OFFSET (0U) -#define LVD_PRV_LVDLVLR_LVD1LVL_MASK (0x1FU << LVD_PRV_LVDLVLR_LVD1LVL_OFFSET) -#define LVD_PRV_LVDLVLR_LVD2LVL_OFFSET (5U) -#define LVD_PRV_LVDLVLR_LVD2LVL_MASK (0x07U << LVD_PRV_LVDLVLR_LVD2LVL_OFFSET) +#define LVD_PRV_LVDLVLR_LVD1LVL_OFFSET (0U) +#define LVD_PRV_LVDLVLR_LVD1LVL_MASK (0x1FU << LVD_PRV_LVDLVLR_LVD1LVL_OFFSET) +#define LVD_PRV_LVDLVLR_LVD2LVL_OFFSET (5U) +#define LVD_PRV_LVDLVLR_LVD2LVL_MASK (0x07U << LVD_PRV_LVDLVLR_LVD2LVL_OFFSET) /* LVDNCR0 Bit Field Definitions */ -#define LVD_PRV_LVDNCR0_RIE_OFFSET (0U) -#define LVD_PRV_LVDNCR0_RIE_MASK (1U << LVD_PRV_LVDNCR0_RIE_OFFSET) -#define LVD_PRV_LVDNCR0_DFDIS_OFFSET (1U) -#define LVD_PRV_LVDNCR0_DFDIS_MASK (1U << LVD_PRV_LVDNCR0_DFDIS_OFFSET) -#define LVD_PRV_LVDNCR0_CMPE_OFFSET (2U) -#define LVD_PRV_LVDNCR0_CMPE_MASK (1U << LVD_PRV_LVDNCR0_CMPE_OFFSET) -#define LVD_PRV_LVDNCR0_FSAMP_OFFSET (4U) -#define LVD_PRV_LVDNCR0_FSAMP_MASK (3U << LVD_PRV_LVDNCR0_FSAMP_OFFSET) -#define LVD_PRV_LVDNCR0_RI_OFFSET (6U) -#define LVD_PRV_LVDNCR0_RI_MASK (1U << LVD_PRV_LVDNCR0_RI_OFFSET) -#define LVD_PRV_LVDNCR0_RN_OFFSET (7U) -#define LVD_PRV_LVDNCR0_RN_MASK (1U << LVD_PRV_LVDNCR0_RN_OFFSET) - -#define LVD_PRV_SECONDS_TO_MICROSECONDS (1000000U) +#define LVD_PRV_LVDNCR0_RIE_OFFSET (0U) +#define LVD_PRV_LVDNCR0_RIE_MASK (1U << LVD_PRV_LVDNCR0_RIE_OFFSET) +#define LVD_PRV_LVDNCR0_DFDIS_OFFSET (1U) +#define LVD_PRV_LVDNCR0_DFDIS_MASK (1U << LVD_PRV_LVDNCR0_DFDIS_OFFSET) +#define LVD_PRV_LVDNCR0_CMPE_OFFSET (2U) +#define LVD_PRV_LVDNCR0_CMPE_MASK (1U << LVD_PRV_LVDNCR0_CMPE_OFFSET) +#define LVD_PRV_LVDNCR0_FSAMP_OFFSET (4U) +#define LVD_PRV_LVDNCR0_FSAMP_MASK (3U << LVD_PRV_LVDNCR0_FSAMP_OFFSET) +#define LVD_PRV_LVDNCR0_RI_OFFSET (6U) +#define LVD_PRV_LVDNCR0_RI_MASK (1U << LVD_PRV_LVDNCR0_RI_OFFSET) +#define LVD_PRV_LVDNCR0_RN_OFFSET (7U) +#define LVD_PRV_LVDNCR0_RN_MASK (1U << LVD_PRV_LVDNCR0_RN_OFFSET) + +/* nLVDICR Bit Field Definitions for VBAT, RTC, EX */ +#define LVD_PRV_EXT_LVDICR_IDTSEL_OFFSET (4U) +#define LVD_PRV_EXT_LVDICR_IE_OFFSET (0U) +#define LVD_PRV_EXT_LVDICR_IE_ENABLE (1U << LVD_PRV_EXT_LVDICR_IE_OFFSET) + +/* nLVDCR Bit Field Definitions for VBAT, RTC, EX */ +#define LVD_PRV_EXT_LVDCR_LVDE_OFFSET (4U) +#define LVD_PRV_EXT_LVDCR_LVDE_ENABLE (1U << LVD_PRV_EXT_LVDCR_LVDE_OFFSET) +#define LVD_PRV_EXT_VBTLVDCR_LVL_OFFSET (5U) +#define LVD_PRV_EXT_VRTLVDCR_LVL_OFFSET (6U) + +/* nLVDSR Bit Field Definitions for VBAT, RTC, EX */ +#define LVD_PRV_EXT_LVDSR_DET_OFFSET (1U) +#define LVD_PRV_EXT_LVDSR_DET_MASK (1U << LVD_PRV_EXT_LVDSR_DET_OFFSET) +#define LVD_PRV_EXT_LVDSR_MON_OFFSET (5U) +#define LVD_PRV_EXT_LVDSR_MON_MASK (1U << LVD_PRV_EXT_LVDSR_MON_OFFSET) + +/* nCMPCR Bit Field Definitions for VBAT, RTC, EX */ +#define LVD_PRV_EXT_CMPCR_CMPE_OFFSET (0U) +#define LVD_PRV_EXT_CMPCR_CMPE_MASK (1U << LVD_PRV_EXT_CMPCR_CMPE_OFFSET) + +#define LVD_PRV_SECONDS_TO_MICROSECONDS (1000000U) /*********************************************************************************************************************** * Typedef definitions @@ -87,6 +110,11 @@ typedef BSP_CMSE_NONSECURE_CALL void (*volatile lvd_prv_ns_callback)(lvd_callbac **********************************************************************************************************************/ static void r_lvd_hw_configure(lvd_instance_ctrl_t * p_ctrl); +#if BSP_FEATURE_LVD_HAS_EXT_MONITOR == 1 +static void r_lvd_ext_hw_configure(lvd_instance_ctrl_t * p_ctrl); + +#endif + #if BSP_FEATURE_LVD_HAS_DIGITAL_FILTER == 1 static uint32_t r_lvd_filter_delay(lvd_sample_clock_t sample_clock_divisor); @@ -103,17 +131,41 @@ static void lvd_common_isr_handler(lvd_instance_ctrl_t * p_ctrl); static void lvd_nmi_handler(bsp_grp_irq_t irq); void lvd_lvd_isr(void); +#if BSP_FEATURE_LVD_HAS_EXT_MONITOR == 1 +static void lvd_ext_common_isr_handler(lvd_instance_ctrl_t * p_ctrl); +void lvd_ext_isr(void); + +#endif + /*********************************************************************************************************************** * Private global variables **********************************************************************************************************************/ /** Stored context for NMI handler. */ -static lvd_instance_ctrl_t * gp_ctrls[LVD_PRV_NUMBER_OF_MONITORS] = {NULL}; +static lvd_instance_ctrl_t * gp_ctrls[LVD_PRV_NUMBER_OF_NMI] = {NULL}; /* Look-up tables for writing to monitor 1 and monitor 2 registers. */ static uint8_t volatile * const g_lvdncr0_lut[] = {&(R_SYSTEM->LVD1CR0), &(R_SYSTEM->LVD2CR0)}; static uint8_t volatile * const g_lvdncr1_lut[] = {&(R_SYSTEM->LVD1CR1), &(R_SYSTEM->LVD2CR1)}; static uint8_t volatile * const g_lvdnsr_lut[] = {&(R_SYSTEM->LVD1SR), &(R_SYSTEM->LVD2SR)}; + +#if BSP_FEATURE_LVD_HAS_EXT_MONITOR == 1 + +/* Look-up table for writing to VBAT, RTC, EX register */ +/* Index: VBAT - 0, RTC - 1, EX - 2 */ +static uint8_t volatile * const g_ext_lvdcr_lut[] = +{&(R_SYSTEM->VBTLVDCR), &(R_SYSTEM->VRTLVDCR), &(R_SYSTEM->EXLVDCR)}; + +static uint8_t volatile * const g_ext_lvdsr_lut[] = +{&(R_SYSTEM->VBTLVDSR), &(R_SYSTEM->VRTSR), &(R_SYSTEM->EXLVDSR)}; + +static uint8_t volatile * const g_ext_lvdicr_lut[] = +{&(R_SYSTEM->VBTLVDICR), &(R_SYSTEM->VRTLVDICR), &(R_SYSTEM->EXLVDICR)}; + +static uint8_t volatile * const g_ext_lvdcmpcr_lut[] = +{&(R_SYSTEM->VBTCMPCR), &(R_SYSTEM->VRTCMPCR), &(R_SYSTEM->EXLVDCMPCR)}; +#endif + #if (BSP_FEATURE_LVD_HAS_LVDLVLR == 1) static uint32_t const g_lvdlvlr_offset_lut[] = { @@ -178,11 +230,22 @@ fsp_err_t R_LVD_Open (lvd_ctrl_t * const p_api_ctrl, lvd_cfg_t const * const p_c p_ctrl->p_context = p_cfg->p_context; p_ctrl->p_callback_memory = NULL; - /* Store control structure so it can be accessed from NMI handler. */ - gp_ctrls[p_ctrl->p_cfg->monitor_number - 1] = p_ctrl; + if (p_ctrl->p_cfg->monitor_number <= LVD_PRV_NUMBER_OF_VCC_MONITOR) + { + /* Store control structure so it can be accessed from NMI handler. */ + gp_ctrls[p_ctrl->p_cfg->monitor_number - 1] = p_ctrl; + + /* Configure the hardware based on the user settings. */ + r_lvd_hw_configure(p_ctrl); + } - /* Configure the hardware based on the user settings. */ - r_lvd_hw_configure(p_ctrl); +#if BSP_FEATURE_LVD_HAS_EXT_MONITOR == 1 + else + { + /* Configure the hardware based on the user settings. */ + r_lvd_ext_hw_configure(p_ctrl); + } +#endif /* Mark driver as opened by initializing it to "LVD" in its ASCII equivalent. */ p_ctrl->open = LVD_OPENED; @@ -216,17 +279,21 @@ fsp_err_t R_LVD_StatusGet (lvd_ctrl_t * const p_api_ctrl, lvd_status_t * p_lvd_s uint8_t lvdnsr = 0; - if (1U == p_ctrl->p_cfg->monitor_number) + if (p_ctrl->p_cfg->monitor_number <= LVD_PRV_NUMBER_OF_VCC_MONITOR) { - lvdnsr = R_SYSTEM->LVD1SR; + lvdnsr = *(g_lvdnsr_lut[p_ctrl->p_cfg->monitor_number - 1]); + p_lvd_status->crossing_detected = (lvd_threshold_crossing_t) ((lvdnsr & LVD_PRV_LVDNSR_DET_MASK) != 0); + p_lvd_status->current_state = (lvd_current_state_t) ((lvdnsr & LVD_PRV_LVDNSR_MON_MASK) != 0); } + +#if BSP_FEATURE_LVD_HAS_EXT_MONITOR == 1 else { - lvdnsr = R_SYSTEM->LVD2SR; + lvdnsr = *(g_ext_lvdsr_lut[p_ctrl->p_cfg->monitor_number - 3]); + p_lvd_status->crossing_detected = (lvd_threshold_crossing_t) ((lvdnsr & LVD_PRV_EXT_LVDSR_DET_MASK) != 0); + p_lvd_status->current_state = (lvd_current_state_t) ((lvdnsr & LVD_PRV_EXT_LVDSR_MON_MASK) != 0); } - - p_lvd_status->crossing_detected = (lvd_threshold_crossing_t) ((lvdnsr & LVD_PRV_LVDNSR_DET_MASK) != 0); - p_lvd_status->current_state = (lvd_current_state_t) ((lvdnsr & LVD_PRV_LVDNSR_MON_MASK) != 0); +#endif return FSP_SUCCESS; } @@ -253,7 +320,17 @@ fsp_err_t R_LVD_StatusClear (lvd_ctrl_t * const p_api_ctrl) R_BSP_RegisterProtectDisable(BSP_REG_PROTECT_LVD); /* Clear the status register. */ - *(g_lvdnsr_lut[p_ctrl->p_cfg->monitor_number - 1]) = 0; + if (p_ctrl->p_cfg->monitor_number <= LVD_PRV_NUMBER_OF_VCC_MONITOR) + { + *(g_lvdnsr_lut[p_ctrl->p_cfg->monitor_number - 1]) = 0; + } + +#if BSP_FEATURE_LVD_HAS_EXT_MONITOR == 1 + else + { + *(g_ext_lvdsr_lut[p_ctrl->p_cfg->monitor_number - 3]) = 0; + } +#endif R_BSP_RegisterProtectEnable(BSP_REG_PROTECT_LVD); @@ -333,60 +410,83 @@ fsp_err_t R_LVD_Close (lvd_ctrl_t * const p_api_ctrl) FSP_CRITICAL_SECTION_DEFINE; #endif - uint32_t monitor_index = p_ctrl->p_cfg->monitor_number - 1; - - R_BSP_GroupIrqWrite((bsp_grp_irq_t) (BSP_GRP_IRQ_LVD1 + monitor_index), NULL); - if (FSP_INVALID_VECTOR != p_ctrl->p_cfg->irq) { R_BSP_IrqDisable(p_ctrl->p_cfg->irq); } - /* Shutdown procedure from Table 8.5 in the RA6M3 Hardware Manual R01UH0886EJ0100. */ + if (p_ctrl->p_cfg->monitor_number <= LVD_PRV_NUMBER_OF_VCC_MONITOR) + { + uint32_t monitor_index = p_ctrl->p_cfg->monitor_number - 1; - R_BSP_RegisterProtectDisable(BSP_REG_PROTECT_LVD); + /* Setting for NMI */ + R_BSP_GroupIrqWrite((bsp_grp_irq_t) (BSP_GRP_IRQ_LVD1 + monitor_index), NULL); + + /* Shutdown procedure from Table 8.5 in the RA6M3 Hardware Manual R01UH0886EJ0100. */ + R_BSP_RegisterProtectDisable(BSP_REG_PROTECT_LVD); - /* Disable output of comparison results by voltage monitor. */ - *(g_lvdncr0_lut[monitor_index]) &= (uint8_t) ~(LVD_PRV_LVDNCR0_CMPE_MASK); + /* Disable output of comparison results by voltage monitor. */ + *(g_lvdncr0_lut[monitor_index]) &= (uint8_t) ~(LVD_PRV_LVDNCR0_CMPE_MASK); #if BSP_FEATURE_LVD_HAS_DIGITAL_FILTER == 1 - if (LVD_SAMPLE_CLOCK_DISABLED != p_ctrl->p_cfg->sample_clock_divisor) - { - /* Wait for at least 2n + 3 LOCO cycles, where n = [2,4,8,16]. */ - R_BSP_SoftwareDelay(r_lvd_filter_delay(p_ctrl->p_cfg->sample_clock_divisor), BSP_DELAY_UNITS_MICROSECONDS); - } + if (LVD_SAMPLE_CLOCK_DISABLED != p_ctrl->p_cfg->sample_clock_divisor) + { + /* Wait for at least 2n + 3 LOCO cycles, where n = [2,4,8,16]. */ + R_BSP_SoftwareDelay(r_lvd_filter_delay(p_ctrl->p_cfg->sample_clock_divisor), BSP_DELAY_UNITS_MICROSECONDS); + } #endif + uint8_t lvdncr0 = *(g_lvdncr0_lut[monitor_index]); - uint8_t lvdncr0 = *(g_lvdncr0_lut[monitor_index]); - - /* Disable voltage monitor interrupt or reset. */ - lvdncr0 &= (uint8_t) ~LVD_PRV_LVDNCR0_RIE_MASK; + /* Disable voltage monitor interrupt or reset. */ + lvdncr0 &= (uint8_t) ~LVD_PRV_LVDNCR0_RIE_MASK; #if BSP_FEATURE_LVD_HAS_DIGITAL_FILTER == 1 - /* Disable digital filter. */ - lvdncr0 |= (uint8_t) LVD_PRV_LVDNCR0_DFDIS_MASK; + /* Disable digital filter. */ + lvdncr0 |= (uint8_t) LVD_PRV_LVDNCR0_DFDIS_MASK; #endif - *(g_lvdncr0_lut[monitor_index]) = lvdncr0; - + *(g_lvdncr0_lut[monitor_index]) = lvdncr0; #if BSP_FEATURE_LVD_HAS_LVDLVLR == 1 - /* Critical section required because LVCMPCR register is shared with other instances. */ - FSP_CRITICAL_SECTION_ENTER; + /* Critical section required because LVCMPCR register is shared with other instances. */ + FSP_CRITICAL_SECTION_ENTER; - /* Disable voltage detection circuit. */ - R_SYSTEM->LVCMPCR &= (uint8_t) ~(p_ctrl->p_cfg->monitor_number << LVD_PRV_LVCMPCR_LVD1E_OFFSET); + /* Disable voltage detection circuit. */ + R_SYSTEM->LVCMPCR &= (uint8_t) ~(p_ctrl->p_cfg->monitor_number << LVD_PRV_LVCMPCR_LVD1E_OFFSET); - FSP_CRITICAL_SECTION_EXIT; + FSP_CRITICAL_SECTION_EXIT; #else - *(g_lvdncmpcr_lut[monitor_index]) &= (uint8_t) ~R_SYSTEM_LVD1CMPCR_LVD1E_Msk; + *(g_lvdncmpcr_lut[monitor_index]) &= (uint8_t) ~R_SYSTEM_LVD1CMPCR_LVD1E_Msk; #endif - R_BSP_RegisterProtectEnable(BSP_REG_PROTECT_LVD); + R_BSP_RegisterProtectEnable(BSP_REG_PROTECT_LVD); + gp_ctrls[monitor_index] = NULL; + } + +#if BSP_FEATURE_LVD_HAS_EXT_MONITOR == 1 + else + { + uint32_t monitor_index = p_ctrl->p_cfg->monitor_number - 3; - gp_ctrls[monitor_index] = NULL; - p_ctrl->open = 0; + /* Enable access to LVD registers. */ + R_BSP_RegisterProtectDisable(BSP_REG_PROTECT_LVD); + + /* Disable voltage monitor interrupt */ + *g_ext_lvdicr_lut[monitor_index] &= (uint8_t) ~(LVD_PRV_EXT_LVDICR_IE_ENABLE); + + /* Disable voltage detection circuit. */ + *g_ext_lvdcmpcr_lut[monitor_index] &= (uint8_t) ~(LVD_PRV_EXT_CMPCR_CMPE_MASK); + + /* Disable pin LVD output */ + *g_ext_lvdcr_lut[monitor_index] &= (uint8_t) ~(LVD_PRV_EXT_LVDCR_LVDE_ENABLE); + + /* Disable access to LVD registers. */ + R_BSP_RegisterProtectEnable(BSP_REG_PROTECT_LVD); + } +#endif + + p_ctrl->open = 0; return FSP_SUCCESS; } @@ -395,7 +495,7 @@ fsp_err_t R_LVD_Close (lvd_ctrl_t * const p_api_ctrl) * @} (end addtogroup LVD) **********************************************************************************************************************/ -/*********************************************************************************************************************//** +/*********************************************************************************************************************** * Private Functions **********************************************************************************************************************/ @@ -499,7 +599,7 @@ static void r_lvd_hw_configure (lvd_instance_ctrl_t * p_ctrl) FSP_CRITICAL_SECTION_EXIT; #else - uint8_t lvdne[LVD_PRV_NUMBER_OF_MONITORS]; + uint8_t lvdne[LVD_PRV_NUMBER_OF_NMI]; uint8_t i; /* Critical section required because LVCMPCR and LVDLVLR registers are shared with other instances. */ @@ -508,7 +608,7 @@ static void r_lvd_hw_configure (lvd_instance_ctrl_t * p_ctrl) /* To change a LVDNLVL register both voltage detection circuits must be disabled. * Disable the voltage detection circuit for all monitors before writing the LVDLVLR register. * See section 7.2.2 "LVD1CMPCR : Voltage Monitoring 1 Comparator Control Register" in the RA6M4 manual R01HUM0890EJ0050.*/ - for (i = 0; i < LVD_PRV_NUMBER_OF_MONITORS; i++) + for (i = 0; i < LVD_PRV_NUMBER_OF_NMI; i++) { lvdne[i] = *(g_lvdncmpcr_lut[i]) & R_SYSTEM_LVD1CMPCR_LVD1E_Msk; // Preserve enable values for other monitors *(g_lvdncmpcr_lut[i]) &= (uint8_t) ~R_SYSTEM_LVD1CMPCR_LVD1E_Msk; @@ -523,7 +623,7 @@ static void r_lvd_hw_configure (lvd_instance_ctrl_t * p_ctrl) *(g_lvdncmpcr_lut[monitor_index]) = lvdncmpcr; /* Enable the voltage detection circuits. */ - for (i = 0; i < LVD_PRV_NUMBER_OF_MONITORS; i++) + for (i = 0; i < LVD_PRV_NUMBER_OF_NMI; i++) { if (monitor_index == i) { @@ -597,23 +697,65 @@ static fsp_err_t lvd_open_parameter_check (lvd_instance_ctrl_t * p_ctrl, lvd_cfg FSP_ASSERT(NULL != p_ctrl); FSP_ERROR_RETURN(LVD_OPENED != p_ctrl->open, FSP_ERR_ALREADY_OPEN); FSP_ASSERT(NULL != p_cfg); + #if (BSP_FEATURE_LVD_HAS_EXT_MONITOR == 1) + FSP_ASSERT(1U <= p_cfg->monitor_number && 5U >= p_cfg->monitor_number); + #else FSP_ASSERT(1U == p_cfg->monitor_number || 2U == p_cfg->monitor_number); - FSP_ERROR_RETURN(NULL == gp_ctrls[p_cfg->monitor_number - 1], FSP_ERR_IN_USE); + #endif + if (p_cfg->monitor_number < 3U) + { + FSP_ERROR_RETURN(NULL == gp_ctrls[p_cfg->monitor_number - 1], FSP_ERR_IN_USE); + } int32_t threshold = (int32_t) p_cfg->voltage_threshold; /* Verify that the threshold is valid for voltage monitor. */ - if (1U == p_cfg->monitor_number) + switch (p_cfg->monitor_number) { - /* High voltage thresholds correspond to low register settings. */ - FSP_ASSERT(threshold >= (int32_t) BSP_FEATURE_LVD_MONITOR_1_HI_THRESHOLD && - threshold <= (int32_t) BSP_FEATURE_LVD_MONITOR_1_LOW_THRESHOLD); - } - else - { - /* High voltage thresholds correspond to low register settings. */ - FSP_ASSERT(threshold >= (int32_t) BSP_FEATURE_LVD_MONITOR_2_HI_THRESHOLD && - threshold <= (int32_t) BSP_FEATURE_LVD_MONITOR_2_LOW_THRESHOLD); + case 1: + { + /* High voltage thresholds correspond to low register settings. */ + FSP_ASSERT(threshold >= (int32_t) BSP_FEATURE_LVD_MONITOR_1_HI_THRESHOLD && + threshold <= (int32_t) BSP_FEATURE_LVD_MONITOR_1_LOW_THRESHOLD); + break; + } + + case 2: + { + /* High voltage thresholds correspond to low register settings. */ + FSP_ASSERT(threshold >= (int32_t) BSP_FEATURE_LVD_MONITOR_2_HI_THRESHOLD && + threshold <= (int32_t) BSP_FEATURE_LVD_MONITOR_2_LOW_THRESHOLD); + break; + } + + /* If the device does not support an external monitor, the check below will be skipped. */ + #if (BSP_FEATURE_LVD_HAS_EXT_MONITOR == 1) + case 3: + { + /* High voltage thresholds correspond to low register settings. */ + FSP_ASSERT(threshold <= (int32_t) LVD_THRESHOLD_EXLVDVBAT_LEVEL_3_1V && + threshold >= (int32_t) LVD_THRESHOLD_EXLVDVBAT_LEVEL_2_2V); + break; + } + + case 4: + { + /* High voltage thresholds correspond to low register settings. */ + FSP_ASSERT(threshold <= (int32_t) LVD_THRESHOLD_LVDVRTC_LEVEL_2_8V && + threshold >= (int32_t) LVD_THRESHOLD_LVDVRTC_LEVEL_2_2V); + break; + } + + case 5: + { + /* Checking for EXLVD will be skipped because it don't have threshold configuration */ + break; + } + #endif + default: + { + break; + } } /* If the response is an interrupt then IRQ setting must be a valid interrupt number. */ @@ -643,6 +785,86 @@ static fsp_err_t lvd_open_parameter_check (lvd_instance_ctrl_t * p_ctrl, lvd_cfg #endif +/*********************************************************************************************************************** + * Private funtions configurate LVD of VBAT, RTC, EX + * + * @param[in] p_ctrl Pointer to the control block structure for the driver instance + * + **********************************************************************************************************************/ +#if BSP_FEATURE_LVD_HAS_EXT_MONITOR == 1 +static void r_lvd_ext_hw_configure (lvd_instance_ctrl_t * p_ctrl) +{ + /* Calculate index used to get monitor registers from look-up tables and perform other calculations. */ + uint32_t monitor_index = p_ctrl->p_cfg->monitor_number - 3; + + /* Enable access to LVD registers. */ + R_BSP_RegisterProtectDisable(BSP_REG_PROTECT_LVD); + + /* Specify the detection voltage by setting the nLVDCR.LVL bits */ + switch (monitor_index) + { + case 0: + { + /* Configure voltage threshold for LVD of VBAT */ + *g_ext_lvdcr_lut[monitor_index] = + (uint8_t) (p_ctrl->p_cfg->voltage_threshold << LVD_PRV_EXT_VBTLVDCR_LVL_OFFSET); + break; + } + + case 1: + { + /* Configure voltage threshold for LVD of VRTC */ + *g_ext_lvdcr_lut[monitor_index] = + (uint8_t) (p_ctrl->p_cfg->voltage_threshold << LVD_PRV_EXT_VRTLVDCR_LVL_OFFSET); + break; + } + + case 2: + { + /* EXLVD don't have threshold configuration */ + break; + } + + default: + { + break; + } + } + + /* Select the interrupt request timing in the nLVDICR.IDTSEL bits */ + *g_ext_lvdicr_lut[monitor_index] = (uint8_t) (p_ctrl->p_cfg->voltage_slope << LVD_PRV_EXT_LVDICR_IDTSEL_OFFSET); + + /* Set the nLVDCR.LVDE bit to 1 to enable pin low voltage detection */ + *g_ext_lvdcr_lut[monitor_index] |= (uint8_t) LVD_PRV_EXT_LVDCR_LVDE_ENABLE; + + /* Waiting for the comparator operation stabilization time */ + R_BSP_SoftwareDelay((uint32_t) BSP_FEATURE_LVD_STABILIZATION_TIME_US, BSP_DELAY_UNITS_MICROSECONDS); + + /* Set the nCMPCR.CMPE bit to 1 to enable pin voltage detect circuit */ + *g_ext_lvdcmpcr_lut[monitor_index] = (uint8_t) LVD_PRV_EXT_CMPCR_CMPE_MASK; + + if (LVD_RESPONSE_NONE != p_ctrl->p_cfg->detection_response) + { + /* Make sure that the nSR.DET flag is 0 */ + *g_ext_lvdsr_lut[monitor_index] &= (uint8_t) (~LVD_PRV_EXT_LVDSR_DET_MASK); + + /* Set the nLVDICR.IE bit to 1 to enable pin low voltage detection interrupt output. */ + *g_ext_lvdicr_lut[monitor_index] |= (uint8_t) (LVD_PRV_EXT_LVDICR_IE_ENABLE); + + /* Enable interrupt in NVIC */ + R_BSP_IrqCfgEnable(p_ctrl->p_cfg->irq, p_ctrl->p_cfg->monitor_ipl, p_ctrl); + } + else + { + /* Disable interrupt */ + *g_ext_lvdicr_lut[monitor_index] &= (uint8_t) (~LVD_PRV_EXT_LVDICR_IE_ENABLE); + } + + R_BSP_RegisterProtectEnable(BSP_REG_PROTECT_LVD); +} + +#endif + /*******************************************************************************************************************//** * Common code needed for all LVD ISRs. * @@ -747,3 +969,108 @@ static void lvd_nmi_handler (bsp_grp_irq_t irq) /* Restore context if RTOS is used */ FSP_CONTEXT_RESTORE } + +/*******************************************************************************************************************//** + * ISR for maskable interrupts LVD of VBAT, RTC, EX + * + **********************************************************************************************************************/ +#if BSP_FEATURE_LVD_HAS_EXT_MONITOR == 1 +void lvd_ext_isr (void) +{ + /* Save context if RTOS is used */ + FSP_CONTEXT_SAVE + + IRQn_Type irq = R_FSP_CurrentIrqGet(); + + /* Clear the Interrupt Request */ + R_BSP_IrqStatusClear(irq); + + /* Call common isr handler. */ + lvd_ext_common_isr_handler((lvd_instance_ctrl_t *) R_FSP_IsrContextGet(irq)); + + /* Restore context if RTOS is used */ + FSP_CONTEXT_RESTORE +} + +#endif + +/*********************************************************************************************************************** + * ISR handle for LVD interrupts of VBAT, RTC, EX + * + * @param[in] irq BSP group IRQ indenttifier + * + **********************************************************************************************************************/ +#if BSP_FEATURE_LVD_HAS_EXT_MONITOR == 1 +static void lvd_ext_common_isr_handler (lvd_instance_ctrl_t * p_ctrl) +{ + /* Calculate index used to get monitor registers from look-up tables and perform other calculations. */ + uint32_t monitor_index = p_ctrl->p_cfg->monitor_number - 3; + + lvd_callback_args_t callback_args; + + /* Store callback arguments in memory provided by user if available. This allows callback arguments to be stored in + * non-secure memory so they can be accessed by a non-secure callback function. */ + lvd_callback_args_t * p_args = p_ctrl->p_callback_memory; + if (NULL == p_args) + { + /* Store on stack */ + p_args = &callback_args; + } + else + { + /* Save current arguments on the stack in case this is a nested interrupt. */ + callback_args = *p_args; + } + + p_args->current_state = + (lvd_current_state_t) ((*(g_ext_lvdsr_lut[monitor_index]) & LVD_PRV_EXT_LVDSR_MON_MASK) > 0); + p_args->monitor_number = p_ctrl->p_cfg->monitor_number; + p_args->p_context = p_ctrl->p_context; + + uint8_t det_flag = *g_ext_lvdsr_lut[monitor_index] & (uint8_t) (LVD_PRV_EXT_LVDSR_DET_MASK); + + #if BSP_TZ_SECURE_BUILD + + /* Make sure if nLVDSR.DET bit is 1. */ + if (det_flag != 0) + { + /* p_callback can point to a secure function or a non-secure function. */ + if (!cmse_is_nsfptr(p_ctrl->p_callback)) + { + /* If p_callback is secure, then the project does not need to change security state. */ + p_ctrl->p_callback(p_args); + } + else + { + /* If p_callback is Non-secure, then the project must change to Non-secure state in order to call the callback. */ + lvd_prv_ns_callback p_callback = (lvd_prv_ns_callback) (p_ctrl->p_callback); + p_callback(p_args); + } + } + + #else + + /* Make sure if nLVDSR.DET bit is 1. */ + if (det_flag != 0) + { + /* If the project is not Trustzone Secure, then it will never need to change security state in order to call + * the callback. */ + p_ctrl->p_callback(p_args); + } + #endif + + if (NULL != p_ctrl->p_callback_memory) + { + /* Restore callback memory in case this is a nested interrupt. */ + *p_ctrl->p_callback_memory = callback_args; + } + + R_BSP_RegisterProtectDisable(BSP_REG_PROTECT_LVD); + + /* Clear the status register. */ + *g_ext_lvdsr_lut[monitor_index] = 0; + + R_BSP_RegisterProtectEnable(BSP_REG_PROTECT_LVD); +} + +#endif diff --git a/ra/fsp/src/r_ospi/r_ospi.c b/ra/fsp/src/r_ospi/r_ospi.c index 9a777f43a..b7d41ce8b 100644 --- a/ra/fsp/src/r_ospi/r_ospi.c +++ b/ra/fsp/src/r_ospi/r_ospi.c @@ -112,7 +112,7 @@ const spi_flash_api_t g_ospi_on_spi_flash = * @retval FSP_ERR_CALIBRATE_FAILED Failed to perform auto-calibrate. * @retval FSP_ERR_INVALID_ARGUMENT Attempting to open the driver with an invalid SPI protocol for OctaRAM. **********************************************************************************************************************/ -fsp_err_t R_OSPI_Open (spi_flash_ctrl_t * p_ctrl, spi_flash_cfg_t const * const p_cfg) +fsp_err_t R_OSPI_Open (spi_flash_ctrl_t * const p_ctrl, spi_flash_cfg_t const * const p_cfg) { ospi_instance_ctrl_t * p_instance_ctrl = (ospi_instance_ctrl_t *) p_ctrl; @@ -220,10 +220,10 @@ fsp_err_t R_OSPI_Open (spi_flash_ctrl_t * p_ctrl, spi_flash_cfg_t const * const * * @retval FSP_ERR_UNSUPPORTED API not supported by OSPI. **********************************************************************************************************************/ -fsp_err_t R_OSPI_DirectWrite (spi_flash_ctrl_t * p_ctrl, - uint8_t const * const p_src, - uint32_t const bytes, - bool const read_after_write) +fsp_err_t R_OSPI_DirectWrite (spi_flash_ctrl_t * const p_ctrl, + uint8_t const * const p_src, + uint32_t const bytes, + bool const read_after_write) { FSP_PARAMETER_NOT_USED(p_ctrl); FSP_PARAMETER_NOT_USED(p_src); @@ -240,7 +240,7 @@ fsp_err_t R_OSPI_DirectWrite (spi_flash_ctrl_t * p_ctrl, * * @retval FSP_ERR_UNSUPPORTED API not supported by OSPI. **********************************************************************************************************************/ -fsp_err_t R_OSPI_DirectRead (spi_flash_ctrl_t * p_ctrl, uint8_t * const p_dest, uint32_t const bytes) +fsp_err_t R_OSPI_DirectRead (spi_flash_ctrl_t * const p_ctrl, uint8_t * const p_dest, uint32_t const bytes) { FSP_PARAMETER_NOT_USED(p_ctrl); FSP_PARAMETER_NOT_USED(p_dest); @@ -261,7 +261,7 @@ fsp_err_t R_OSPI_DirectRead (spi_flash_ctrl_t * p_ctrl, uint8_t * const p_dest, * @retval FSP_ERR_ASSERTION A required pointer is NULL. * @retval FSP_ERR_NOT_OPEN Driver is not opened. **********************************************************************************************************************/ -fsp_err_t R_OSPI_DirectTransfer (spi_flash_ctrl_t * p_ctrl, +fsp_err_t R_OSPI_DirectTransfer (spi_flash_ctrl_t * const p_ctrl, spi_flash_direct_transfer_t * const p_transfer, spi_flash_direct_transfer_dir_t direction) { @@ -287,7 +287,7 @@ fsp_err_t R_OSPI_DirectTransfer (spi_flash_ctrl_t * p_ctrl, * @retval FSP_ERR_NOT_OPEN Driver is not opened. * @retval FSP_ERR_UNSUPPORTED API not supported by OSPI - OctaRAM. **********************************************************************************************************************/ -fsp_err_t R_OSPI_XipEnter (spi_flash_ctrl_t * p_ctrl) +fsp_err_t R_OSPI_XipEnter (spi_flash_ctrl_t * const p_ctrl) { ospi_instance_ctrl_t * p_instance_ctrl = (ospi_instance_ctrl_t *) p_ctrl; #if OSPI_CFG_PARAM_CHECKING_ENABLE @@ -319,7 +319,7 @@ fsp_err_t R_OSPI_XipEnter (spi_flash_ctrl_t * p_ctrl) * @retval FSP_ERR_NOT_OPEN Driver is not opened. * @retval FSP_ERR_UNSUPPORTED API not supported by OSPI - OctaRAM. **********************************************************************************************************************/ -fsp_err_t R_OSPI_XipExit (spi_flash_ctrl_t * p_ctrl) +fsp_err_t R_OSPI_XipExit (spi_flash_ctrl_t * const p_ctrl) { ospi_instance_ctrl_t * p_instance_ctrl = (ospi_instance_ctrl_t *) p_ctrl; #if OSPI_CFG_PARAM_CHECKING_ENABLE @@ -353,10 +353,10 @@ fsp_err_t R_OSPI_XipExit (spi_flash_ctrl_t * p_ctrl) * @retval FSP_ERR_UNSUPPORTED API not supported by OSPI - OctaRAM. * @retval FSP_ERR_WRITE_FAILED The write enable bit was not set. **********************************************************************************************************************/ -fsp_err_t R_OSPI_Write (spi_flash_ctrl_t * p_ctrl, - uint8_t const * const p_src, - uint8_t * const p_dest, - uint32_t byte_count) +fsp_err_t R_OSPI_Write (spi_flash_ctrl_t * const p_ctrl, + uint8_t const * const p_src, + uint8_t * const p_dest, + uint32_t byte_count) { ospi_instance_ctrl_t * p_instance_ctrl = (ospi_instance_ctrl_t *) p_ctrl; #if OSPI_CFG_PARAM_CHECKING_ENABLE @@ -484,7 +484,7 @@ fsp_err_t R_OSPI_Write (spi_flash_ctrl_t * p_ctrl, * @retval FSP_ERR_UNSUPPORTED API not supported by OSPI - OctaRAM. * @retval FSP_ERR_WRITE_FAILED The write enable bit was not set. **********************************************************************************************************************/ -fsp_err_t R_OSPI_Erase (spi_flash_ctrl_t * p_ctrl, uint8_t * const p_device_address, uint32_t byte_count) +fsp_err_t R_OSPI_Erase (spi_flash_ctrl_t * const p_ctrl, uint8_t * const p_device_address, uint32_t byte_count) { ospi_instance_ctrl_t * p_instance_ctrl = (ospi_instance_ctrl_t *) p_ctrl; @@ -556,7 +556,7 @@ fsp_err_t R_OSPI_Erase (spi_flash_ctrl_t * p_ctrl, uint8_t * const p_device_addr * @retval FSP_ERR_NOT_OPEN Driver is not opened. * @retval FSP_ERR_UNSUPPORTED API not supported by OSPI - OctaRAM. **********************************************************************************************************************/ -fsp_err_t R_OSPI_StatusGet (spi_flash_ctrl_t * p_ctrl, spi_flash_status_t * const p_status) +fsp_err_t R_OSPI_StatusGet (spi_flash_ctrl_t * const p_ctrl, spi_flash_status_t * const p_status) { ospi_instance_ctrl_t * p_instance_ctrl = (ospi_instance_ctrl_t *) p_ctrl; @@ -583,7 +583,7 @@ fsp_err_t R_OSPI_StatusGet (spi_flash_ctrl_t * p_ctrl, spi_flash_status_t * cons * * @retval FSP_ERR_UNSUPPORTED API not supported by OSPI. **********************************************************************************************************************/ -fsp_err_t R_OSPI_BankSet (spi_flash_ctrl_t * p_ctrl, uint32_t bank) +fsp_err_t R_OSPI_BankSet (spi_flash_ctrl_t * const p_ctrl, uint32_t bank) { ospi_instance_ctrl_t * p_instance_ctrl = (ospi_instance_ctrl_t *) p_ctrl; @@ -604,7 +604,7 @@ fsp_err_t R_OSPI_BankSet (spi_flash_ctrl_t * p_ctrl, uint32_t bank) * @retval FSP_ERR_CALIBRATE_FAILED Failed to perform auto-calibrate. * @retval FSP_ERR_INVALID_ARGUMENT Attempting to set an invalid SPI protocol for OctaRAM. **********************************************************************************************************************/ -fsp_err_t R_OSPI_SpiProtocolSet (spi_flash_ctrl_t * p_ctrl, spi_flash_protocol_t spi_protocol) +fsp_err_t R_OSPI_SpiProtocolSet (spi_flash_ctrl_t * const p_ctrl, spi_flash_protocol_t spi_protocol) { ospi_instance_ctrl_t * p_instance_ctrl = (ospi_instance_ctrl_t *) p_ctrl; @@ -634,7 +634,7 @@ fsp_err_t R_OSPI_SpiProtocolSet (spi_flash_ctrl_t * p_ctrl, spi_flash_protocol_t * @retval FSP_ERR_CALIBRATE_FAILED Failed to perform auto-calibrate. * @retval FSP_ERR_UNSUPPORTED API not supported by OSPI - OctaFlash. **********************************************************************************************************************/ -fsp_err_t R_OSPI_AutoCalibrate (spi_flash_ctrl_t * p_ctrl) +fsp_err_t R_OSPI_AutoCalibrate (spi_flash_ctrl_t * const p_ctrl) { ospi_instance_ctrl_t * p_instance_ctrl = (ospi_instance_ctrl_t *) p_ctrl; @@ -661,7 +661,7 @@ fsp_err_t R_OSPI_AutoCalibrate (spi_flash_ctrl_t * p_ctrl) * @retval FSP_ERR_ASSERTION p_instance_ctrl is NULL. * @retval FSP_ERR_NOT_OPEN Driver is not opened. **********************************************************************************************************************/ -fsp_err_t R_OSPI_Close (spi_flash_ctrl_t * p_ctrl) +fsp_err_t R_OSPI_Close (spi_flash_ctrl_t * const p_ctrl) { ospi_instance_ctrl_t * p_instance_ctrl = (ospi_instance_ctrl_t *) p_ctrl; diff --git a/ra/fsp/src/r_rtc/r_rtc.c b/ra/fsp/src/r_rtc/r_rtc.c index 08bbf6353..01fad1826 100644 --- a/ra/fsp/src/r_rtc/r_rtc.c +++ b/ra/fsp/src/r_rtc/r_rtc.c @@ -79,6 +79,8 @@ #define RTC_RFRL_MIN_VALUE_LOCO (0x7U) #define RTC_RFRL_MAX_VALUE_LOCO (0x1FFU) +#define RTC_ALARM_REG_SIZE (0x20) + /*********************************************************************************************************************** * Typedef definitions **********************************************************************************************************************/ @@ -182,9 +184,9 @@ static void r_rtc_error_adjustment_set(rtc_error_adjustment_cfg_t const * const * Example: * @snippet r_rtc_example.c R_RTC_Open * - * @retval FSP_SUCCESS Initialization was successful and RTC has started. - * @retval FSP_ERR_ASSERTION Invalid p_ctrl or p_cfg pointer. - * @retval FSP_ERR_ALREADY_OPEN Module is already open. + * @retval FSP_SUCCESS Initialization was successful and RTC has started. + * @retval FSP_ERR_ASSERTION Invalid p_ctrl or p_cfg pointer. + * @retval FSP_ERR_ALREADY_OPEN Module is already open. * @retval FSP_ERR_INVALID_ARGUMENT Invalid time parameter field. **********************************************************************************************************************/ fsp_err_t R_RTC_Open (rtc_ctrl_t * const p_ctrl, rtc_cfg_t const * const p_cfg) @@ -208,6 +210,11 @@ fsp_err_t R_RTC_Open (rtc_ctrl_t * const p_ctrl, rtc_cfg_t const * const p_cfg) #if RTC_CFG_PARAM_CHECKING_ENABLE + /* IRTC only use Subclock */ + #if BSP_FEATURE_RTC_IS_IRTC + FSP_ERROR_RETURN(RTC_CLOCK_SOURCE_SUBCLK == p_cfg->clock_source, FSP_ERR_INVALID_ARGUMENT); + #endif + /* Verify the frequency comparison value for RFRL when using LOCO */ if (RTC_CLOCK_SOURCE_LOCO == p_cfg->clock_source) { @@ -275,6 +282,13 @@ fsp_err_t R_RTC_Close (rtc_ctrl_t * const p_ctrl) R_FSP_IsrContextSet(p_instance_ctrl->p_cfg->alarm_irq, NULL); } +#if BSP_FEATURE_RTC_IS_IRTC + if (((rtc_extended_cfg_t *) p_instance_ctrl->p_cfg->p_extend)->alarm1_irq >= 0) + { + R_BSP_IrqDisable(((rtc_extended_cfg_t *) p_instance_ctrl->p_cfg->p_extend)->alarm1_irq); + R_FSP_IsrContextSet(((rtc_extended_cfg_t *) p_instance_ctrl->p_cfg->p_extend)->alarm1_irq, NULL); + } +#endif if (p_instance_ctrl->p_cfg->carry_irq >= 0) { R_BSP_IrqDisable(p_instance_ctrl->p_cfg->carry_irq); @@ -292,9 +306,10 @@ fsp_err_t R_RTC_Close (rtc_ctrl_t * const p_ctrl) * Example: * @snippet r_rtc_example.c R_RTC_ClockSourceSet * - * @retval FSP_SUCCESS Initialization was successful and RTC has started. - * @retval FSP_ERR_ASSERTION Invalid p_ctrl or p_cfg pointer. - * @retval FSP_ERR_NOT_OPEN Driver is not opened. + * @retval FSP_SUCCESS Initialization was successful and RTC has started. + * @retval FSP_ERR_ASSERTION Invalid p_ctrl or p_cfg pointer. + * @retval FSP_ERR_NOT_OPEN Driver is not opened. + * @retval FSP_ERR_INVALID_ARGUMENT Invalid clock source. **********************************************************************************************************************/ fsp_err_t R_RTC_ClockSourceSet (rtc_ctrl_t * const p_ctrl) { @@ -304,6 +319,9 @@ fsp_err_t R_RTC_ClockSourceSet (rtc_ctrl_t * const p_ctrl) #if RTC_CFG_PARAM_CHECKING_ENABLE FSP_ASSERT(NULL != p_instance_ctrl); FSP_ERROR_RETURN(RTC_OPEN == p_instance_ctrl->open, FSP_ERR_NOT_OPEN); + #if BSP_FEATURE_RTC_IS_IRTC + FSP_ERROR_RETURN(RTC_CLOCK_SOURCE_SUBCLK == p_instance_ctrl->p_cfg->clock_source, FSP_ERR_INVALID_ARGUMENT); + #endif #endif /* Set the clock source for RTC. @@ -378,9 +396,9 @@ fsp_err_t R_RTC_CalendarTimeSet (rtc_ctrl_t * const p_ctrl, rtc_time_t * const p * * Implements @ref rtc_api_t::calendarTimeGet * - * @retval FSP_SUCCESS Calendar time get operation was successful. - * @retval FSP_ERR_ASSERTION Invalid input argument. - * @retval FSP_ERR_NOT_OPEN Driver not open already for operation. + * @retval FSP_SUCCESS Calendar time get operation was successful. + * @retval FSP_ERR_ASSERTION Invalid input argument. + * @retval FSP_ERR_NOT_OPEN Driver not open already for operation. * @retval FSP_ERR_IRQ_BSP_DISABLED User IRQ parameter not valid **********************************************************************************************************************/ fsp_err_t R_RTC_CalendarTimeGet (rtc_ctrl_t * const p_ctrl, rtc_time_t * const p_time) @@ -451,23 +469,40 @@ fsp_err_t R_RTC_CalendarTimeGet (rtc_ctrl_t * const p_ctrl, rtc_time_t * const p fsp_err_t R_RTC_CalendarAlarmSet (rtc_ctrl_t * const p_ctrl, rtc_alarm_time_t * const p_alarm) { rtc_instance_ctrl_t * p_instance_ctrl = (rtc_instance_ctrl_t *) p_ctrl; - fsp_err_t err = FSP_SUCCESS; #if RTC_CFG_PARAM_CHECKING_ENABLE FSP_ASSERT(NULL != p_instance_ctrl); - FSP_ASSERT(p_alarm); + FSP_ASSERT(NULL != p_alarm); FSP_ERROR_RETURN(RTC_OPEN == p_instance_ctrl->open, FSP_ERR_NOT_OPEN); + #if BSP_FEATURE_RTC_IS_IRTC + FSP_ERROR_RETURN((p_alarm->channel == RTC_ALARM_CHANNEL_0 && p_instance_ctrl->p_cfg->alarm_irq >= 0) || + (p_alarm->channel == RTC_ALARM_CHANNEL_1 && + ((rtc_extended_cfg_t *) p_instance_ctrl->p_cfg->p_extend)->alarm1_irq >= 0), + FSP_ERR_IRQ_BSP_DISABLED); + #else FSP_ERROR_RETURN(p_instance_ctrl->p_cfg->alarm_irq >= 0, FSP_ERR_IRQ_BSP_DISABLED); + #endif /* Verify the seconds, minutes, hours, year ,day of the week, day of the month and month are valid values */ FSP_ERROR_RETURN(FSP_SUCCESS == r_rtc_alarm_time_and_date_validate(p_alarm), FSP_ERR_INVALID_ARGUMENT); #endif - if (p_instance_ctrl->p_cfg->alarm_irq >= 0) + volatile uint8_t * p_reg; + volatile uint16_t * p_reg_ryrar; + + IRQn_Type alarm_irq = p_instance_ctrl->p_cfg->alarm_irq; + rtc_alarm_channel_t alarm_channel = RTC_ALARM_CHANNEL_0; + +#if BSP_FEATURE_RTC_IS_IRTC + alarm_channel = p_alarm->channel; + if (RTC_ALARM_CHANNEL_1 == alarm_channel) { - /* Disable the ICU alarm interrupt request */ - R_BSP_IrqDisable(p_instance_ctrl->p_cfg->alarm_irq); + alarm_irq = ((rtc_extended_cfg_t *) p_instance_ctrl->p_cfg->p_extend)->alarm1_irq; } +#endif + + /* Disable the ICU alarm interrupt request */ + R_BSP_IrqDisable(alarm_irq); /* Set alarm time */ volatile uint8_t field; @@ -480,7 +515,8 @@ fsp_err_t R_RTC_CalendarAlarmSet (rtc_ctrl_t * const p_ctrl, rtc_alarm_time_t * field = 0U; } - R_RTC->RSECAR = field; + p_reg = &R_RTC->RSECAR + (RTC_ALARM_REG_SIZE * alarm_channel); + *p_reg = field; if (p_alarm->min_match) { @@ -491,7 +527,8 @@ fsp_err_t R_RTC_CalendarAlarmSet (rtc_ctrl_t * const p_ctrl, rtc_alarm_time_t * field = 0U; } - R_RTC->RMINAR = field; + p_reg = &R_RTC->RMINAR + (RTC_ALARM_REG_SIZE * alarm_channel); + (*p_reg) = field; if (p_alarm->hour_match) { @@ -503,7 +540,8 @@ fsp_err_t R_RTC_CalendarAlarmSet (rtc_ctrl_t * const p_ctrl, rtc_alarm_time_t * field = 0U; } - R_RTC->RHRAR = field; + p_reg = &R_RTC->RHRAR + (RTC_ALARM_REG_SIZE * alarm_channel); + (*p_reg) = field; if (p_alarm->dayofweek_match) { @@ -514,7 +552,8 @@ fsp_err_t R_RTC_CalendarAlarmSet (rtc_ctrl_t * const p_ctrl, rtc_alarm_time_t * field = 0U; } - R_RTC->RWKAR = field; + p_reg = &R_RTC->RWKAR + (RTC_ALARM_REG_SIZE * alarm_channel); + (*p_reg) = field; if (p_alarm->mday_match) { @@ -526,7 +565,8 @@ fsp_err_t R_RTC_CalendarAlarmSet (rtc_ctrl_t * const p_ctrl, rtc_alarm_time_t * field = 1U; } - R_RTC->RDAYAR = field; + p_reg = &R_RTC->RDAYAR + (RTC_ALARM_REG_SIZE * alarm_channel); + (*p_reg) = field; if (p_alarm->mon_match) { @@ -539,7 +579,8 @@ fsp_err_t R_RTC_CalendarAlarmSet (rtc_ctrl_t * const p_ctrl, rtc_alarm_time_t * field = 0U; } - R_RTC->RMONAR = field; + p_reg = &R_RTC->RMONAR + (RTC_ALARM_REG_SIZE * alarm_channel); + (*p_reg) = field; if (p_alarm->year_match) { @@ -550,15 +591,19 @@ fsp_err_t R_RTC_CalendarAlarmSet (rtc_ctrl_t * const p_ctrl, rtc_alarm_time_t * field = 0U; } - R_RTC->RYRAR = field; - R_RTC->RYRAREN_b.ENB = (p_alarm->year_match); + /*It is a pointer to uint16_t so the offset needs to be halved */ + p_reg_ryrar = &R_RTC->RYRAR + (RTC_ALARM_REG_SIZE * alarm_channel) / 2; + (*p_reg_ryrar) = field; + + p_reg = &R_RTC->RYRAREN + (RTC_ALARM_REG_SIZE * alarm_channel); + (*p_reg) = (uint8_t) (p_alarm->year_match << R_RTC_RYRAREN_ENB_Pos); /* Enable the alarm interrupt */ r_rtc_irq_set(true, R_RTC_RCR1_AIE_Msk); - R_BSP_IrqEnable(p_instance_ctrl->p_cfg->alarm_irq); + R_BSP_IrqEnable(alarm_irq); - return err; + return FSP_SUCCESS; } /*******************************************************************************************************************//** @@ -581,25 +626,58 @@ fsp_err_t R_RTC_CalendarAlarmGet (rtc_ctrl_t * const p_ctrl, rtc_alarm_time_t * FSP_PARAMETER_NOT_USED(p_ctrl); #endif - p_alarm->time.tm_sec = rtc_bcd_to_dec(R_RTC->RSECAR & RTC_MASK_8TH_BIT); - p_alarm->time.tm_min = rtc_bcd_to_dec(R_RTC->RMINAR & RTC_MASK_8TH_BIT); - p_alarm->time.tm_hour = rtc_bcd_to_dec(R_RTC->RHRAR & RTC_MASK_8TH_BIT); - p_alarm->time.tm_wday = rtc_bcd_to_dec(R_RTC->RWKAR & RTC_MASK_8TH_BIT); - p_alarm->time.tm_mday = rtc_bcd_to_dec(R_RTC->RDAYAR & RTC_MASK_8TH_BIT); + volatile uint8_t * p_reg; + volatile uint16_t * p_reg_ryrar; + uint8_t reg_val; + uint16_t reg_ryrar_val; + + rtc_alarm_channel_t alarm_channel = RTC_ALARM_CHANNEL_0; + +#if BSP_FEATURE_RTC_IS_IRTC + alarm_channel = p_alarm->channel; +#endif + + p_reg = &R_RTC->RSECAR + (RTC_ALARM_REG_SIZE * alarm_channel); + reg_val = *p_reg; + p_alarm->time.tm_sec = rtc_bcd_to_dec(reg_val & RTC_MASK_8TH_BIT); + p_alarm->sec_match = (bool) (reg_val & R_RTC_RSECAR_ENB_Msk); + + p_reg = &R_RTC->RMINAR + (RTC_ALARM_REG_SIZE * alarm_channel); + reg_val = *p_reg; + p_alarm->time.tm_min = rtc_bcd_to_dec(reg_val & RTC_MASK_8TH_BIT); + p_alarm->min_match = (bool) (reg_val & R_RTC_RMINAR_ENB_Msk); + + p_reg = &R_RTC->RHRAR + (RTC_ALARM_REG_SIZE * alarm_channel); + reg_val = *p_reg; + p_alarm->time.tm_hour = rtc_bcd_to_dec(reg_val & RTC_MASK_8TH_BIT); + p_alarm->hour_match = (bool) (reg_val & R_RTC_RHRAR_ENB_Msk); + + p_reg = &R_RTC->RWKAR + (RTC_ALARM_REG_SIZE * alarm_channel); + reg_val = *p_reg; + p_alarm->time.tm_wday = rtc_bcd_to_dec(reg_val & RTC_MASK_8TH_BIT); + p_alarm->dayofweek_match = (bool) (reg_val & R_RTC_RWKAR_ENB_Msk); + + p_reg = &R_RTC->RDAYAR + (RTC_ALARM_REG_SIZE * alarm_channel); + reg_val = *p_reg; + p_alarm->time.tm_mday = rtc_bcd_to_dec(reg_val & RTC_MASK_8TH_BIT); + p_alarm->mday_match = (bool) (reg_val & R_RTC_RDAYAR_ENB_Msk); /* Subtract one from month to match with C time.h standards */ - p_alarm->time.tm_mon = rtc_bcd_to_dec(R_RTC->RMONAR & RTC_MASK_8TH_BIT) - (uint8_t) 1; + p_reg = &R_RTC->RMONAR + (RTC_ALARM_REG_SIZE * alarm_channel); + reg_val = *p_reg; + p_alarm->time.tm_mon = rtc_bcd_to_dec(reg_val & RTC_MASK_8TH_BIT) - (uint8_t) 1; + p_alarm->mon_match = (bool) (reg_val & R_RTC_RMONAR_ENB_Msk); + + /*It is a pointer to uint16_t so the offset needs to be halved */ + p_reg_ryrar = &R_RTC->RYRAR + (RTC_ALARM_REG_SIZE * alarm_channel) / 2; + reg_ryrar_val = *p_reg_ryrar; /* Add 100 to the year to match with C time.h standards */ - p_alarm->time.tm_year = rtc_bcd_to_dec((uint8_t) R_RTC->RYRAR) + (uint8_t) RTC_C_TIME_OFFSET; + p_alarm->time.tm_year = rtc_bcd_to_dec((uint8_t) reg_ryrar_val) + (uint8_t) RTC_C_TIME_OFFSET; - p_alarm->sec_match = (bool) R_RTC->RSECAR_b.ENB; - p_alarm->min_match = (bool) R_RTC->RMINAR_b.ENB; - p_alarm->hour_match = (bool) R_RTC->RHRAR_b.ENB; - p_alarm->dayofweek_match = (bool) R_RTC->RWKAR_b.ENB; - p_alarm->mday_match = (bool) R_RTC->RDAYAR_b.ENB; - p_alarm->mon_match = (bool) R_RTC->RMONAR_b.ENB; - p_alarm->year_match = (bool) R_RTC->RYRAREN_b.ENB; + p_reg = &R_RTC->RYRAREN + (RTC_ALARM_REG_SIZE * alarm_channel); + reg_val = *p_reg; + p_alarm->year_match = (bool) (reg_val & R_RTC_RYRAREN_ENB_Msk); return FSP_SUCCESS; } @@ -869,6 +947,14 @@ static void r_rtc_config_rtc_interrupts (rtc_instance_ctrl_t * const p_ctrl, rtc R_BSP_IrqCfg(p_cfg->alarm_irq, p_cfg->alarm_ipl, p_ctrl); } +#if BSP_FEATURE_RTC_IS_IRTC + if (((rtc_extended_cfg_t *) p_cfg->p_extend)->alarm1_irq >= 0) + { + R_BSP_IrqCfg(((rtc_extended_cfg_t *) p_cfg->p_extend)->alarm1_irq, + ((rtc_extended_cfg_t *) p_cfg->p_extend)->alarm1_ipl, + p_ctrl); + } +#endif if (p_cfg->carry_irq >= 0) { R_BSP_IrqCfg(p_cfg->carry_irq, p_cfg->carry_ipl, p_ctrl); @@ -1366,6 +1452,13 @@ void rtc_alarm_periodic_isr (void) { event = RTC_EVENT_ALARM_IRQ; } + +#if BSP_FEATURE_RTC_IS_IRTC + else if (irq == ((rtc_extended_cfg_t *) p_ctrl->p_cfg->p_extend)->alarm1_irq) + { + event = RTC_EVENT_ALARM1_IRQ; + } +#endif else { event = RTC_EVENT_PERIODIC_IRQ; diff --git a/ra/fsp/src/r_sce/aes2/adaptors/hw_sce_ra_private.h b/ra/fsp/src/r_sce/aes2/adaptors/hw_sce_ra_private.h index 90c7939c8..eee2051bb 100644 --- a/ra/fsp/src/r_sce/aes2/adaptors/hw_sce_ra_private.h +++ b/ra/fsp/src/r_sce/aes2/adaptors/hw_sce_ra_private.h @@ -29,6 +29,12 @@ /********************************************************************************************************************** * Macro definitions *********************************************************************************************************************/ + +#define SIZE_AES_GCM_IN_DATA_BYTES (256) +#define SIZE_AES_GCM_IN_DATA_IV_LEN_BYTES (16) +#define SIZE_AES_GCM_IN_DATA_IV_GCM_LEN_BYTES (128) +#define SIZE_AES_GCM_IN_DATA_AAD_LEN_BYTES (128) + #define SCE_AES_IN_DATA_CMD_ECB_ENCRYPTION (0x00000000U) #define SCE_AES_IN_DATA_CMD_ECB_DECRYPTION (0x00000001U) #define SCE_AES_IN_DATA_CMD_CBC_ENCRYPTION (0x00000002U) @@ -48,6 +54,65 @@ #define SIZE_AES_256BIT_KEYLEN_BYTES_WRAPPED ((SIZE_AES_256BIT_KEYLEN_BITS_WRAPPED) / 8) #define SIZE_AES_256BIT_KEYLEN_WORDS_WRAPPED ((SIZE_AES_256BIT_KEYLEN_BITS_WRAPPED) / 32) +#define R_AES_AESCNTH_INIT (0x8000UL) /*!< AESCNTH initialization: Initialization AES Circuit */ +#define R_AES_AESCNTH_DEINIT (0x0000UL) /*!< AESCNTH deinitialization: Don’t Initialize AES Circuit */ +#define R_AES_AESCNTL_GCM_MODE (0x00A0UL) /*!< AESCNTL: Assign bit of Cipher use Mode: GCM mode */ +#define R_AES_AESCNTL_128_DEC (0x0008UL) /*!< AESCNTL: Decryption 128 bit (Bit 0-3 Selection bit of Encryption/Decryption and Key Length) */ + +#define R_AES_AESCNTL_CBC_128_ENC (0x0000UL) /*!< AESCNTL: Encryption - CBC mode - 128 bits */ +#define R_AES_AESCNTL_CBC_192_ENC (0x0002UL) /*!< AESCNTL: Encryption - CBC mode - 192 bits */ +#define R_AES_AESCNTL_CBC_256_ENC (0x0004UL) /*!< AESCNTL: Encryption - CBC mode - 256 bits */ +#define R_AES_AESCNTL_CBC_128_DEC (0x0008UL) /*!< AESCNTL: Decryption - CBC mode - 128 bits */ +#define R_AES_AESCNTL_CBC_192_DEC (0x000AUL) /*!< AESCNTL: Decryption - CBC mode - 128 bits */ +#define R_AES_AESCNTL_CBC_256_DEC (0x000CUL) /*!< AESCNTL: Decryption - CBC mode - 128 bits */ + +#define R_AES_AESCNTL_ECB_128_ENC (0x0010UL) /*!< AESCNTL: Encryption - ECB mode - 128 bits */ +#define R_AES_AESCNTL_ECB_192_ENC (0x0012UL) /*!< AESCNTL: Encryption - ECB mode - 192 bits */ +#define R_AES_AESCNTL_ECB_256_ENC (0x0014UL) /*!< AESCNTL: Encryption - ECB mode - 256 bits */ +#define R_AES_AESCNTL_ECB_128_DEC (0x0018UL) /*!< AESCNTL: Decryption - ECB mode - 128 bits */ +#define R_AES_AESCNTL_ECB_192_DEC (0x001AUL) /*!< AESCNTL: Decryption - ECB mode - 128 bits */ +#define R_AES_AESCNTL_ECB_256_DEC (0x001CUL) /*!< AESCNTL: Decryption - ECB mode - 128 bits */ + +#define R_AES_AESCNTL_CTR_128_ENC (0x0040UL) /*!< AESCNTL: Encryption - CTR mode - 128 bits */ +#define R_AES_AESCNTL_CTR_192_ENC (0x0042UL) /*!< AESCNTL: Encryption - CTR mode - 192 bits */ +#define R_AES_AESCNTL_CTR_256_ENC (0x0044UL) /*!< AESCNTL: Encryption - CTR mode - 256 bits */ +#define R_AES_AESCNTL_CTR_128_DEC (0x0048UL) /*!< AESCNTL: Decryption - CTR mode - 128 bits */ +#define R_AES_AESCNTL_CTR_192_DEC (0x004AUL) /*!< AESCNTL: Decryption - CTR mode - 128 bits */ +#define R_AES_AESCNTL_CTR_256_DEC (0x004CUL) /*!< AESCNTL: Decryption - CTR mode - 128 bits */ + +#define R_AES_AESCNTL_CMAC_128_ENC (0x0080UL) /*!< AESCNTL: Encryption - CMAC mode - 128 bits */ +#define R_AES_AESCNTL_CMAC_192_ENC (0x0082UL) /*!< AESCNTL: Encryption - CMAC mode - 192 bits */ +#define R_AES_AESCNTL_CMAC_256_ENC (0x0084UL) /*!< AESCNTL: Encryption - CMAC mode - 256 bits */ +#define R_AES_AESCNTL_CMAC_128_DEC (0x0088UL) /*!< AESCNTL: Decryption - CMAC mode - 128 bits */ +#define R_AES_AESCNTL_CMAC_192_DEC (0x008AUL) /*!< AESCNTL: Decryption - CMAC mode - 128 bits */ +#define R_AES_AESCNTL_CMAC_256_DEC (0x008CUL) /*!< AESCNTL: Decryption - CMAC mode - 128 bits */ + +#define R_AES_AESCNTL_GCM_128_ENC (0x00A0UL) /*!< AESCNTL: Encryption - GCM mode - 128 bits */ +#define R_AES_AESCNTL_GCM_192_ENC (0x00A2UL) /*!< AESCNTL: Encryption - GCM mode - 192 bits */ +#define R_AES_AESCNTL_GCM_256_ENC (0x00A4UL) /*!< AESCNTL: Encryption - GCM mode - 256 bits */ +#define R_AES_AESCNTL_GCM_128_DEC (0x00A8UL) /*!< AESCNTL: Decryption - GCM mode - 128 bits */ +#define R_AES_AESCNTL_GCM_192_DEC (0x00AAUL) /*!< AESCNTL: Decryption - GCM mode - 128 bits */ +#define R_AES_AESCNTL_GCM_256_DEC (0x00ACUL) /*!< AESCNTL: Decryption - GCM mode - 128 bits */ + +#define R_AES_AESCNTL_CCM_128_ENC (0x00C0UL) /*!< AESCNTL: Encryption - CCM mode - 128 bits */ +#define R_AES_AESCNTL_CCM_192_ENC (0x00C2UL) /*!< AESCNTL: Encryption - CCM mode - 192 bits */ +#define R_AES_AESCNTL_CCM_256_ENC (0x00C4UL) /*!< AESCNTL: Encryption - CCM mode - 256 bits */ +#define R_AES_AESCNTL_CCM_128_DEC (0x00C8UL) /*!< AESCNTL: Decryption - CCM mode - 128 bits */ +#define R_AES_AESCNTL_CCM_192_DEC (0x00CAUL) /*!< AESCNTL: Decryption - CCM mode - 128 bits */ +#define R_AES_AESCNTL_CCM_256_DEC (0x00CCUL) /*!< AESCNTL: Decryption - CCM mode - 128 bits */ + +#define R_AES_AESDCNTL_ASSIGN_DATA_DISABLE (0x0004UL) /*!< AESDCNTL: Bit to assign Data to update/no-update */ +#define R_AES_AESDCNTL_BIT_2_3_MODE_1 (0x0008UL) /*!< AESDCNTL: Key update assign bit: Enable + First block contents control assign bit: Use (AES-ECB, AES-GCM) */ +#define R_AES_AESDCNTL_BIT_2_3_MODE_2 (0x000CUL) /*!< AESDCNTL: Key update assign bit: Enable + First block contents control assign bit: Not use (AES-CBC, AES-CTR) */ +#define R_AES_AESDCNTL_CALCULATE_START (0x0003UL) /*!< AESDCNTL: Start AES calculation - Start reflect AES Encryption/Decryption calculation result to AESODATnRegister.*/ +#define R_AES_AESDCNTL_BIT_2 (0x0004UL) /*!< AESDCNTL: Bit 2 */ +#define R_AES_AESDCNTL_BIT_4 (0x0010UL) /*!< AESDCNTL: Bit 4 */ +#define R_AES_AESDCNTL_BIT_5 (0x0020UL) /*!< AESDCNTL: Bit 5 */ +#define R_AES_AESDCNTL_BIT_6 (0x0040UL) /*!< AESDCNTL: Bit 6 */ +#define R_AES_AESSTSL_BIT_5 (0x0020UL) /*!< AESSTSL: Bit 5: Status Bit to show AES operation status */ +#define R_AES_AESSTSL_CALCULATE_COMPLETED (0x0003UL) /*!< AESSTSL: Bit 0-1: Status Bit to show AES Encryption/Decryption completion */ +#define R_AES_AESSTSCL_DATA_CLEAN (0x0003UL) /*!< AESSTSCL: Bit 0-1: clear bit1.0 state in AES Status Register */ + /********************************************************************************************************************** * Global Typedef definitions *********************************************************************************************************************/ @@ -63,8 +128,18 @@ /*********************************************************************************************************************** * Private global variables and functions ***********************************************************************************************************************/ -uint32_t change_endian_long(uint32_t data); - +uint32_t change_endian_long(uint32_t data); +void tc_aes_set_key(uint8_t * key, uint32_t KeyLen); +void tc_aes_set_iv(uint8_t * initialize_vetor); +void tc_aes_start(uint8_t * input, uint8_t * output, uint32_t block); +fsp_err_t tc_gcm_calculation(uint8_t * input, + uint8_t * output, + uint32_t data_len, + uint8_t * atag, + uint8_t * initial_vector, + uint32_t iv_len, + uint8_t * aad, + uint32_t aad_len); fsp_err_t HW_SCE_Aes128EncryptDecryptInitSub(const uint32_t * InData_KeyType, const uint32_t * InData_Cmd, const uint32_t * InData_KeyIndex, @@ -90,4 +165,97 @@ void HW_SCE_Aes256EncryptDecryptUpdateSub(const uint32_t * InData_Text, const uint32_t MAX_CNT); fsp_err_t HW_SCE_Aes256EncryptDecryptFinalSub(void); +fsp_err_t HW_SCE_Aes128GcmEncryptInitSub(uint32_t * InData_KeyType, uint32_t * InData_KeyIndex, uint32_t * InData_IV); +void HW_SCE_Aes128GcmEncryptUpdateAADSub(uint32_t * InData_DataA, uint32_t MAX_CNT); +void HW_SCE_Aes128GcmEncryptUpdateTransitionSub(void); +void HW_SCE_Aes128GcmEncryptUpdateSub(uint32_t * InData_Text, uint32_t * OutData_Text, uint32_t MAX_CNT); +fsp_err_t HW_SCE_Aes128GcmEncryptFinalSub(uint32_t * InData_Text, + uint32_t * InData_DataALen, + uint32_t * InData_TextLen, + uint32_t * OutData_Text, + uint32_t * OutData_DataT); +fsp_err_t HW_SCE_Aes128GcmDecryptInitSub(uint32_t * InData_KeyType, uint32_t * InData_KeyIndex, uint32_t * InData_IV); +void HW_SCE_Aes128GcmDecryptUpdateAADSub(uint32_t * InData_DataA, uint32_t MAX_CNT); +void HW_SCE_Aes128GcmDecryptUpdateTransitionSub(void); +void HW_SCE_Aes128GcmDecryptUpdateSub(uint32_t * InData_Text, uint32_t * OutData_Text, uint32_t MAX_CNT); +fsp_err_t HW_SCE_Aes128GcmDecryptFinalSub(uint32_t * InData_Text, + uint32_t * InData_DataT, + uint32_t * InData_DataALen, + uint32_t * InData_TextLen, + uint32_t * InData_DataTLen, + uint32_t * OutData_Text); + +fsp_err_t HW_SCE_Aes192GcmEncryptInitSub(uint32_t * InData_KeyType, uint32_t * InData_KeyIndex, uint32_t * InData_IV); +void HW_SCE_Aes192GcmEncryptUpdateAADSub(uint32_t * InData_DataA, uint32_t MAX_CNT); +void HW_SCE_Aes192GcmEncryptUpdateTransitionSub(void); +void HW_SCE_Aes192GcmEncryptUpdateSub(uint32_t * InData_Text, uint32_t * OutData_Text, uint32_t MAX_CNT); +fsp_err_t HW_SCE_Aes192GcmEncryptFinalSub(uint32_t * InData_Text, + uint32_t * InData_DataALen, + uint32_t * InData_TextLen, + uint32_t * OutData_Text, + uint32_t * OutData_DataT); +fsp_err_t HW_SCE_Aes192GcmDecryptInitSub(uint32_t * InData_KeyType, uint32_t * InData_KeyIndex, uint32_t * InData_IV); +void HW_SCE_Aes192GcmDecryptUpdateAADSub(uint32_t * InData_DataA, uint32_t MAX_CNT); +void HW_SCE_Aes192GcmDecryptUpdateTransitionSub(void); +void HW_SCE_Aes192GcmDecryptUpdateSub(uint32_t * InData_Text, uint32_t * OutData_Text, uint32_t MAX_CNT); +fsp_err_t HW_SCE_Aes192GcmDecryptFinalSub(uint32_t * InData_Text, + uint32_t * InData_DataT, + uint32_t * InData_DataALen, + uint32_t * InData_TextLen, + uint32_t * InData_DataTLen, + uint32_t * OutData_Text); + +fsp_err_t HW_SCE_Aes256GcmEncryptInitSub(uint32_t * InData_KeyType, uint32_t * InData_KeyIndex, uint32_t * InData_IV); +void HW_SCE_Aes256GcmEncryptUpdateAADSub(uint32_t * InData_DataA, uint32_t MAX_CNT); +void HW_SCE_Aes256GcmEncryptUpdateTransitionSub(void); +void HW_SCE_Aes256GcmEncryptUpdateSub(uint32_t * InData_Text, uint32_t * OutData_Text, uint32_t MAX_CNT); +fsp_err_t HW_SCE_Aes256GcmEncryptFinalSub(uint32_t * InData_Text, + uint32_t * InData_DataALen, + uint32_t * InData_TextLen, + uint32_t * OutData_Text, + uint32_t * OutData_DataT); +fsp_err_t HW_SCE_Aes256GcmDecryptInitSub(uint32_t * InData_KeyType, uint32_t * InData_KeyIndex, uint32_t * InData_IV); +void HW_SCE_Aes256GcmDecryptUpdateAADSub(uint32_t * InData_DataA, uint32_t MAX_CNT); +void HW_SCE_Aes256GcmDecryptUpdateTransitionSub(void); +void HW_SCE_Aes256GcmDecryptUpdateSub(uint32_t * InData_Text, uint32_t * OutData_Text, uint32_t MAX_CNT); +fsp_err_t HW_SCE_Aes256GcmDecryptFinalSub(uint32_t * InData_Text, + uint32_t * InData_DataT, + uint32_t * InData_DataALen, + uint32_t * InData_TextLen, + uint32_t * InData_DataTLen, + uint32_t * OutData_Text); +fsp_err_t HW_SCE_AES_128CtrEncrypt(const uint32_t * InData_Key, + const uint32_t * InData_IV, + const uint32_t num_words, + const uint32_t * InData_Text, + uint32_t * OutData_Text, + uint32_t * OutData_IV); +fsp_err_t HW_SCE_AES_192CtrEncrypt(const uint32_t * InData_Key, + const uint32_t * InData_IV, + const uint32_t num_words, + const uint32_t * InData_Text, + uint32_t * OutData_Text, + uint32_t * OutData_IV); +fsp_err_t HW_SCE_AES_256CtrEncrypt(const uint32_t * InData_Key, + const uint32_t * InData_IV, + const uint32_t num_words, + const uint32_t * InData_Text, + uint32_t * OutData_Text, + uint32_t * OutData_IV); +fsp_err_t HW_SCE_AES_128CtrDecrypt(const uint32_t * InData_Key, + const uint32_t * InData_IV, + const uint32_t num_words, + const uint32_t * InData_Text, + uint32_t * OutData_Text); +fsp_err_t HW_SCE_AES_192CtrDecrypt(const uint32_t * InData_Key, + const uint32_t * InData_IV, + const uint32_t num_words, + const uint32_t * InData_Text, + uint32_t * OutData_Text); +fsp_err_t HW_SCE_AES_256CtrDecrypt(const uint32_t * InData_Key, + const uint32_t * InData_IV, + const uint32_t num_words, + const uint32_t * InData_Text, + uint32_t * OutData_Text); + #endif /* HW_SCE_RA_PRIVATE_HEADER_FILE */ diff --git a/ra/fsp/src/r_sce/aes2/adaptors/r_sce_AES_adapt.c b/ra/fsp/src/r_sce/aes2/adaptors/r_sce_AES_adapt.c index b4e11078d..ad44560b2 100644 --- a/ra/fsp/src/r_sce/aes2/adaptors/r_sce_AES_adapt.c +++ b/ra/fsp/src/r_sce/aes2/adaptors/r_sce_AES_adapt.c @@ -22,6 +22,10 @@ * Includes <System Includes> , "Project Includes" ***********************************************************************************************************************/ #include "hw_sce_ra_private.h" +#include "tinycrypt/gcm_mode.h" +#include <tinycrypt/utils.h> +#include "bsp_api.h" +#include <stdint.h> /*********************************************************************************************************************** * Macro definitions @@ -43,11 +47,152 @@ * Private global variables and functions ***********************************************************************************************************************/ +static uint8_t InputData_DataA[SIZE_AES_GCM_IN_DATA_AAD_LEN_BYTES]; +static uint8_t InputData_IV_GCM[SIZE_AES_GCM_IN_DATA_IV_GCM_LEN_BYTES]; + uint32_t change_endian_long (uint32_t a) { return __REV(a); } +/*********************************************************************************************************************** + * Function Name: tc_aes_set_key + * Description : This function move the key from specified address (1st arg "key" to AES peripheral register with define + * length (2nd arg "KeyLen") + * Arguments : key : key data area + * KeyLen : key length in bits + * Return Value : None + ***********************************************************************************************************************/ +void tc_aes_set_key (uint8_t * key, uint32_t KeyLen) +{ + uint16_t * ptr = (uint16_t *) key; + + if (KeyLen > SIZE_AES_192BIT_KEYLEN_BYTES) + { + R_AES_B->AESKEY7.AESKEYH = *ptr; + R_AES_B->AESKEY7.AESKEYL = *(ptr + 1); + R_AES_B->AESKEY6.AESKEYH = *(ptr + 2); + R_AES_B->AESKEY6.AESKEYL = *(ptr + 3); + ptr += 4; + } + + if (KeyLen > SIZE_AES_128BIT_KEYLEN_BYTES) + { + R_AES_B->AESKEY5.AESKEYH = *ptr; + R_AES_B->AESKEY5.AESKEYL = *(ptr + 1); + R_AES_B->AESKEY4.AESKEYH = *(ptr + 2); + R_AES_B->AESKEY4.AESKEYL = *(ptr + 3); + ptr += 4; + } + + R_AES_B->AESKEY3.AESKEYH = *ptr; + R_AES_B->AESKEY3.AESKEYL = *(ptr + 1); + R_AES_B->AESKEY2.AESKEYH = *(ptr + 2); + R_AES_B->AESKEY2.AESKEYL = *(ptr + 3); + R_AES_B->AESKEY1.AESKEYH = *(ptr + 4); + R_AES_B->AESKEY1.AESKEYL = *(ptr + 5); + R_AES_B->AESKEY0.AESKEYH = *(ptr + 6); + R_AES_B->AESKEY0.AESKEYL = *(ptr + 7); +} + +/*********************************************************************************************************************** + * Function Name: tc_aes_set_iv + * Description : This function move Initialize vector from specified address (1st arg. "iv") to AES register. + * Arguments : iv : Initialization vector area (16 byte) + * Return Value : None + ***********************************************************************************************************************/ +void tc_aes_set_iv (uint8_t * initialize_vector) +{ + uint16_t * p_in = (uint16_t *) initialize_vector; + + R_AES_B->AESIV3.AESIVH = *p_in; + R_AES_B->AESIV3.AESIVL = *(p_in + 1); + R_AES_B->AESIV2.AESIVH = *(p_in + 2); + R_AES_B->AESIV2.AESIVL = *(p_in + 3); + R_AES_B->AESIV1.AESIVH = *(p_in + 4); + R_AES_B->AESIV1.AESIVL = *(p_in + 5); + R_AES_B->AESIV0.AESIVH = *(p_in + 6); + R_AES_B->AESIV0.AESIVL = *(p_in + 7); +} + +/*********************************************************************************************************************** + * Function Name: tc_aes_set_plaintext + * Description : This function move input test from specified address(1st arg. "ptext") to AES Data Input register. + * Arguments : ptext : Input data area (block * 16bytes) + * Return Value : None + ***********************************************************************************************************************/ +static void tc_aes_set_plaintext (uint8_t * ptext) +{ + uint16_t * p_in = (uint16_t *) ptext; + + R_AES_B->AESIDAT3.AESIDATH = *p_in; + R_AES_B->AESIDAT3.AESIDATL = *(p_in + 1); + R_AES_B->AESIDAT2.AESIDATH = *(p_in + 2); + R_AES_B->AESIDAT2.AESIDATL = *(p_in + 3); + R_AES_B->AESIDAT1.AESIDATH = *(p_in + 4); + R_AES_B->AESIDAT1.AESIDATL = *(p_in + 5); + R_AES_B->AESIDAT0.AESIDATH = *(p_in + 6); + R_AES_B->AESIDAT0.AESIDATL = *(p_in + 7); +} + +/*********************************************************************************************************************** + * Function Name: tc_aes_get_ciphertext + * Description : This function move AES register output to specified address (1st arg. "output"). + * Arguments : output : output data area (block * 16bytes) + * Return Value : None + ***********************************************************************************************************************/ +static void tc_aes_get_ciphertext (uint8_t * output) +{ + uint16_t * ptr; + ptr = (uint16_t *) output; + + *ptr = R_AES_B->AESODAT3.AESODATH; + *(ptr + 1) = R_AES_B->AESODAT3.AESODATL; + *(ptr + 2) = R_AES_B->AESODAT2.AESODATH; + *(ptr + 3) = R_AES_B->AESODAT2.AESODATL; + *(ptr + 4) = R_AES_B->AESODAT1.AESODATH; + *(ptr + 5) = R_AES_B->AESODAT1.AESODATL; + *(ptr + 6) = R_AES_B->AESODAT0.AESODATH; + *(ptr + 7) = R_AES_B->AESODAT0.AESODATL; +} + +void tc_aes_start (uint8_t * input, uint8_t * output, uint32_t block) +{ + uint8_t * ptr; + uint8_t * ptr_out; + uint32_t block_ctr = 0; + + if (block < 1) + { + return; + } + + ptr = input; + ptr_out = output; + block_ctr = 0; + do + { + tc_aes_set_plaintext(ptr); + R_AES_B->AESDCNTL |= R_AES_AESDCNTL_CALCULATE_START; + + while ((R_AES_B->AESSTSL & R_AES_AESSTSL_BIT_5) != 0) + { + ; + } + + if ((R_AES_B->AESSTSL & R_AES_AESSTSL_CALCULATE_COMPLETED) != 0) + { + tc_aes_get_ciphertext(ptr_out); + R_AES_B->AESSTSCL = R_AES_AESSTSCL_DATA_CLEAN; + R_AES_B->AESDCNTL = 0; + } + + ptr += 16; + ptr_out += 16; + block_ctr++; + } while (block_ctr < block); +} + fsp_err_t HW_SCE_GenerateAes128RandomKeyIndexSub (uint32_t * OutData_KeyIndex) { FSP_PARAMETER_NOT_USED(OutData_KeyIndex); @@ -73,24 +218,78 @@ fsp_err_t HW_SCE_Aes192EncryptDecryptInitSub (const uint32_t * InData_Cmd, const uint32_t * InData_KeyIndex, const uint32_t * InData_IV) { - FSP_PARAMETER_NOT_USED(InData_Cmd); - FSP_PARAMETER_NOT_USED(InData_KeyIndex); - FSP_PARAMETER_NOT_USED(InData_IV); +#if RM_TINYCRYPT_PORT_CFG_PARAM_CHECKING_ENABLE + if ((InData_Cmd == (const uint32_t *) 0) || + (InData_KeyIndex == (const uint32_t *) 0) || + (InData_IV == (const uint32_t *) 0)) + { + return FSP_ERR_CRYPTO_SCE_FAIL; + } +#endif - return FSP_ERR_UNSUPPORTED; + tc_aes_set_key((uint8_t *) InData_KeyIndex, SIZE_AES_192BIT_KEYLEN_BYTES); + tc_aes_set_iv((uint8_t *) InData_IV); + switch (change_endian_long(*InData_Cmd)) + { + case SCE_AES_IN_DATA_CMD_CTR_ENCRYPTION_DECRYPTION: + { + R_AES_B->AESDCNTL = R_AES_AESDCNTL_BIT_2_3_MODE_2; + R_AES_B->AESCNTL = R_AES_AESCNTL_CTR_192_ENC; + break; + } + + case SCE_AES_IN_DATA_CMD_ECB_ENCRYPTION: + { + R_AES_B->AESDCNTL = R_AES_AESDCNTL_BIT_2_3_MODE_1; + R_AES_B->AESCNTL = R_AES_AESCNTL_ECB_192_ENC; + break; + } + + case SCE_AES_IN_DATA_CMD_ECB_DECRYPTION: + { + R_AES_B->AESDCNTL = R_AES_AESDCNTL_BIT_2_3_MODE_1; + R_AES_B->AESCNTL = R_AES_AESCNTL_ECB_192_DEC; + break; + } + + case SCE_AES_IN_DATA_CMD_CBC_ENCRYPTION: + { + R_AES_B->AESDCNTL = R_AES_AESDCNTL_BIT_2_3_MODE_2; + R_AES_B->AESCNTL = R_AES_AESCNTL_CBC_192_ENC; + break; + } + + case SCE_AES_IN_DATA_CMD_CBC_DECRYPTION: + { + R_AES_B->AESDCNTL = R_AES_AESDCNTL_BIT_2_3_MODE_2; + R_AES_B->AESCNTL = R_AES_AESCNTL_CBC_192_DEC; + break; + } + } + + return FSP_SUCCESS; } void HW_SCE_Aes192EncryptDecryptUpdateSub (const uint32_t * InData_Text, uint32_t * OutData_Text, const uint32_t MAX_CNT) { - FSP_PARAMETER_NOT_USED(InData_Text); - FSP_PARAMETER_NOT_USED(OutData_Text); - FSP_PARAMETER_NOT_USED(MAX_CNT); + tc_aes_start((uint8_t *) InData_Text, (uint8_t *) OutData_Text, MAX_CNT / 4); } fsp_err_t HW_SCE_Aes192EncryptDecryptFinalSub (void) { - return FSP_ERR_UNSUPPORTED; + while ((R_AES_B->AESSTSL & R_AES_AESSTSL_BIT_5) != 0) + { + ; + } + + if ((R_AES_B->AESSTSL & R_AES_AESSTSL_CALCULATE_COMPLETED) != 0) + { + R_AES_B->AESSTSCL = R_AES_AESSTSCL_DATA_CLEAN; + R_AES_B->AESDCNTL = 0; + } + + return FSP_SUCCESS; } fsp_err_t HW_SCE_Aes128EncryptDecryptInitSub (const uint32_t * InData_KeyType, @@ -99,24 +298,78 @@ fsp_err_t HW_SCE_Aes128EncryptDecryptInitSub (const uint32_t * InData_KeyType, const uint32_t * InData_IV) { FSP_PARAMETER_NOT_USED(InData_KeyType); - FSP_PARAMETER_NOT_USED(InData_Cmd); - FSP_PARAMETER_NOT_USED(InData_KeyIndex); - FSP_PARAMETER_NOT_USED(InData_IV); +#if RM_TINYCRYPT_PORT_CFG_PARAM_CHECKING_ENABLE + if ((InData_Cmd == (const uint32_t *) 0) || + (InData_KeyIndex == (const uint32_t *) 0) || + (InData_IV == (const uint32_t *) 0)) + { + return FSP_ERR_CRYPTO_SCE_FAIL; + } +#endif - return FSP_ERR_UNSUPPORTED; + tc_aes_set_key((uint8_t *) InData_KeyIndex, SIZE_AES_128BIT_KEYLEN_BYTES); + tc_aes_set_iv((uint8_t *) InData_IV); + switch (change_endian_long(*InData_Cmd)) + { + case SCE_AES_IN_DATA_CMD_CTR_ENCRYPTION_DECRYPTION: + { + R_AES_B->AESDCNTL = R_AES_AESDCNTL_BIT_2_3_MODE_2; + R_AES_B->AESCNTL = R_AES_AESCNTL_CTR_128_ENC; + break; + } + + case SCE_AES_IN_DATA_CMD_ECB_ENCRYPTION: + { + R_AES_B->AESDCNTL = R_AES_AESDCNTL_BIT_2_3_MODE_1; + R_AES_B->AESCNTL = R_AES_AESCNTL_ECB_128_ENC; + break; + } + + case SCE_AES_IN_DATA_CMD_ECB_DECRYPTION: + { + R_AES_B->AESDCNTL = R_AES_AESDCNTL_BIT_2_3_MODE_1; + R_AES_B->AESCNTL = R_AES_AESCNTL_ECB_128_DEC; + break; + } + + case SCE_AES_IN_DATA_CMD_CBC_ENCRYPTION: + { + R_AES_B->AESDCNTL = R_AES_AESDCNTL_BIT_2_3_MODE_2; + R_AES_B->AESCNTL = R_AES_AESCNTL_CBC_128_ENC; + break; + } + + case SCE_AES_IN_DATA_CMD_CBC_DECRYPTION: + { + R_AES_B->AESDCNTL = R_AES_AESDCNTL_BIT_2_3_MODE_2; + R_AES_B->AESCNTL = R_AES_AESCNTL_CBC_128_DEC; + break; + } + } + + return FSP_SUCCESS; } void HW_SCE_Aes128EncryptDecryptUpdateSub (const uint32_t * InData_Text, uint32_t * OutData_Text, const uint32_t MAX_CNT) { - FSP_PARAMETER_NOT_USED(InData_Text); - FSP_PARAMETER_NOT_USED(OutData_Text); - FSP_PARAMETER_NOT_USED(MAX_CNT); + tc_aes_start((uint8_t *) InData_Text, (uint8_t *) OutData_Text, MAX_CNT / 4); } fsp_err_t HW_SCE_Aes128EncryptDecryptFinalSub (void) { - return FSP_ERR_UNSUPPORTED; + while ((R_AES_B->AESSTSL & R_AES_AESSTSL_BIT_5) != 0) + { + ; + } + + if ((R_AES_B->AESSTSL & R_AES_AESSTSL_CALCULATE_COMPLETED) != 0) + { + R_AES_B->AESSTSCL = R_AES_AESSTSCL_DATA_CLEAN; + R_AES_B->AESDCNTL = 0; + } + + return FSP_SUCCESS; } fsp_err_t HW_SCE_Aes256EncryptDecryptInitSub (const uint32_t * InData_KeyType, @@ -125,22 +378,466 @@ fsp_err_t HW_SCE_Aes256EncryptDecryptInitSub (const uint32_t * InData_KeyType, const uint32_t * InData_IV) { FSP_PARAMETER_NOT_USED(InData_KeyType); - FSP_PARAMETER_NOT_USED(InData_Cmd); - FSP_PARAMETER_NOT_USED(InData_KeyIndex); - FSP_PARAMETER_NOT_USED(InData_IV); +#if RM_TINYCRYPT_PORT_CFG_PARAM_CHECKING_ENABLE + if ((InData_Cmd == (const uint32_t *) 0) || + (InData_KeyIndex == (const uint32_t *) 0) || + (InData_IV == (const uint32_t *) 0)) + { + return FSP_ERR_CRYPTO_SCE_FAIL; + } +#endif - return FSP_ERR_UNSUPPORTED; + tc_aes_set_key((uint8_t *) InData_KeyIndex, SIZE_AES_256BIT_KEYLEN_BYTES); + tc_aes_set_iv((uint8_t *) InData_IV); + switch (change_endian_long(*InData_Cmd)) + { + case SCE_AES_IN_DATA_CMD_CTR_ENCRYPTION_DECRYPTION: + { + R_AES_B->AESDCNTL = R_AES_AESDCNTL_BIT_2_3_MODE_2; + R_AES_B->AESCNTL = R_AES_AESCNTL_CTR_256_ENC; + break; + } + + case SCE_AES_IN_DATA_CMD_ECB_ENCRYPTION: + { + R_AES_B->AESDCNTL = R_AES_AESDCNTL_BIT_2_3_MODE_1; + R_AES_B->AESCNTL = R_AES_AESCNTL_ECB_256_ENC; + break; + } + + case SCE_AES_IN_DATA_CMD_ECB_DECRYPTION: + { + R_AES_B->AESDCNTL = R_AES_AESDCNTL_BIT_2_3_MODE_1; + R_AES_B->AESCNTL = R_AES_AESCNTL_ECB_256_DEC; + break; + } + + case SCE_AES_IN_DATA_CMD_CBC_ENCRYPTION: + { + R_AES_B->AESDCNTL = R_AES_AESDCNTL_BIT_2_3_MODE_2; + R_AES_B->AESCNTL = R_AES_AESCNTL_CBC_256_ENC; + break; + } + + case SCE_AES_IN_DATA_CMD_CBC_DECRYPTION: + { + R_AES_B->AESDCNTL = R_AES_AESDCNTL_BIT_2_3_MODE_2; + R_AES_B->AESCNTL = R_AES_AESCNTL_CBC_256_DEC; + break; + } + } + + return FSP_SUCCESS; } void HW_SCE_Aes256EncryptDecryptUpdateSub (const uint32_t * InData_Text, uint32_t * OutData_Text, const uint32_t MAX_CNT) +{ + tc_aes_start((uint8_t *) InData_Text, (uint8_t *) OutData_Text, MAX_CNT / 4); +} + +fsp_err_t HW_SCE_Aes256EncryptDecryptFinalSub (void) +{ + while ((R_AES_B->AESSTSL & R_AES_AESSTSL_BIT_5) != 0) + { + ; + } + + if ((R_AES_B->AESSTSL & R_AES_AESSTSL_CALCULATE_COMPLETED) != 0) + { + R_AES_B->AESSTSCL = R_AES_AESSTSCL_DATA_CLEAN; + R_AES_B->AESDCNTL = 0; + } + + return FSP_SUCCESS; +} + +fsp_err_t HW_SCE_Aes128GcmEncryptInitSub (uint32_t * InData_KeyType, uint32_t * InData_KeyIndex, uint32_t * InData_IV) +{ + FSP_PARAMETER_NOT_USED(InData_KeyType); + + R_AES_B->AESCNTL = R_AES_AESCNTL_GCM_128_ENC; + tc_aes_set_key((uint8_t *) InData_KeyIndex, SIZE_AES_128BIT_KEYLEN_BYTES); + R_AES_B->AESDCNTL = R_AES_AESDCNTL_BIT_2_3_MODE_1; + _copy((uint8_t *) &InputData_IV_GCM[0], sizeof(InputData_IV_GCM), (uint8_t *) InData_IV, sizeof(InputData_IV_GCM)); + + return FSP_SUCCESS; +} + +void HW_SCE_Aes128GcmEncryptUpdateAADSub (uint32_t * InData_DataA, uint32_t MAX_CNT) +{ + FSP_PARAMETER_NOT_USED(MAX_CNT); + _copy((uint8_t *) &InputData_DataA[0], sizeof(InputData_DataA), (uint8_t *) InData_DataA, sizeof(InputData_DataA)); +} + +void HW_SCE_Aes128GcmEncryptUpdateTransitionSub (void) +{ +} + +void HW_SCE_Aes128GcmEncryptUpdateSub (uint32_t * InData_Text, uint32_t * OutData_Text, uint32_t MAX_CNT) { FSP_PARAMETER_NOT_USED(InData_Text); FSP_PARAMETER_NOT_USED(OutData_Text); FSP_PARAMETER_NOT_USED(MAX_CNT); } -fsp_err_t HW_SCE_Aes256EncryptDecryptFinalSub (void) +fsp_err_t HW_SCE_Aes128GcmEncryptFinalSub (uint32_t * InData_Text, + uint32_t * InData_DataALen, + uint32_t * InData_TextLen, + uint32_t * OutData_Text, + uint32_t * OutData_DataT) { - return FSP_ERR_UNSUPPORTED; + fsp_err_t status; + status = tc_gcm_calculation((uint8_t *) InData_Text, + (uint8_t *) OutData_Text, + (uint8_t) *InData_TextLen, + (uint8_t *) OutData_DataT, + &InputData_IV_GCM[0], + 16 * 8, + &InputData_DataA[0], + (uint8_t) *InData_DataALen); + + return status; +} + +fsp_err_t HW_SCE_Aes128GcmDecryptInitSub (uint32_t * InData_KeyType, uint32_t * InData_KeyIndex, uint32_t * InData_IV) +{ + FSP_PARAMETER_NOT_USED(InData_KeyType); + + R_AES_B->AESCNTL = R_AES_AESCNTL_GCM_128_DEC; + tc_aes_set_key((uint8_t *) InData_KeyIndex, SIZE_AES_128BIT_KEYLEN_BYTES); + R_AES_B->AESDCNTL = R_AES_AESDCNTL_BIT_2_3_MODE_1; + _copy((uint8_t *) &InputData_IV_GCM[0], sizeof(InputData_IV_GCM), (uint8_t *) InData_IV, sizeof(InputData_IV_GCM)); + + return FSP_SUCCESS; +} + +void HW_SCE_Aes128GcmDecryptUpdateAADSub (uint32_t * InData_DataA, uint32_t MAX_CNT) +{ + FSP_PARAMETER_NOT_USED(MAX_CNT); + _copy((uint8_t *) &InputData_DataA[0], sizeof(InputData_DataA), (uint8_t *) InData_DataA, sizeof(InputData_DataA)); +} + +void HW_SCE_Aes128GcmDecryptUpdateTransitionSub (void) +{ +} + +void HW_SCE_Aes128GcmDecryptUpdateSub (uint32_t * InData_Text, uint32_t * OutData_Text, uint32_t MAX_CNT) +{ + FSP_PARAMETER_NOT_USED(InData_Text); + FSP_PARAMETER_NOT_USED(OutData_Text); + FSP_PARAMETER_NOT_USED(MAX_CNT); +} + +fsp_err_t HW_SCE_Aes128GcmDecryptFinalSub (uint32_t * InData_Text, + uint32_t * InData_DataT, + uint32_t * InData_DataALen, + uint32_t * InData_TextLen, + uint32_t * InData_DataTLen, + uint32_t * OutData_Text) +{ + uint8_t Tag[16]; + uint8_t temp; + fsp_err_t status; + uint8_t Target_Tag[16] = {0}; + memcpy(&Target_Tag[0], InData_DataT, (uint8_t) *InData_DataTLen); + + status = tc_gcm_calculation((uint8_t *) InData_Text, + (uint8_t *) OutData_Text, + (uint8_t) *InData_TextLen, + &Tag[0], + &InputData_IV_GCM[0], + 16 * 8, + &InputData_DataA[0], + (uint8_t) *InData_DataALen); + if (status != FSP_SUCCESS) + { + return FSP_ERR_CRYPTO_UNKNOWN; + } + + /* Athentication Tag Verification*/ + if ((uint8_t) *InData_DataTLen != 0) + { + for (uint8_t iLoop = 0; iLoop < (uint8_t) *InData_DataTLen; iLoop++) + { + temp = Target_Tag[iLoop]; + if (temp != Tag[iLoop]) + { + status = FSP_ERR_INVALID_ARGUMENT; + break; + } + } + + if (status == FSP_ERR_INVALID_ARGUMENT) + { + for (uint32_t iLoop = 0; iLoop < (uint8_t) *InData_TextLen; iLoop++) + { + *((uint8_t *) OutData_Text + iLoop) = 0; + } + + return FSP_ERR_CRYPTO_UNKNOWN; + } + } + + return FSP_SUCCESS; +} + +fsp_err_t HW_SCE_Aes192GcmEncryptInitSub (uint32_t * InData_KeyType, uint32_t * InData_KeyIndex, uint32_t * InData_IV) +{ + FSP_PARAMETER_NOT_USED(InData_KeyType); + + R_AES_B->AESCNTL = R_AES_AESCNTL_GCM_192_ENC; + tc_aes_set_key((uint8_t *) InData_KeyIndex, SIZE_AES_192BIT_KEYLEN_BYTES); + R_AES_B->AESDCNTL = R_AES_AESDCNTL_BIT_2_3_MODE_1; + _copy((uint8_t *) &InputData_IV_GCM[0], sizeof(InputData_IV_GCM), (uint8_t *) InData_IV, sizeof(InputData_IV_GCM)); + + return FSP_SUCCESS; +} + +void HW_SCE_Aes192GcmEncryptUpdateAADSub (uint32_t * InData_DataA, uint32_t MAX_CNT) +{ + FSP_PARAMETER_NOT_USED(MAX_CNT); + _copy((uint8_t *) &InputData_DataA[0], sizeof(InputData_DataA), (uint8_t *) InData_DataA, sizeof(InputData_DataA)); +} + +void HW_SCE_Aes192GcmEncryptUpdateTransitionSub (void) +{ +} + +void HW_SCE_Aes192GcmEncryptUpdateSub (uint32_t * InData_Text, uint32_t * OutData_Text, uint32_t MAX_CNT) +{ + FSP_PARAMETER_NOT_USED(InData_Text); + FSP_PARAMETER_NOT_USED(OutData_Text); + FSP_PARAMETER_NOT_USED(MAX_CNT); +} + +fsp_err_t HW_SCE_Aes192GcmEncryptFinalSub (uint32_t * InData_Text, + uint32_t * InData_DataALen, + uint32_t * InData_TextLen, + uint32_t * OutData_Text, + uint32_t * OutData_DataT) +{ + fsp_err_t status; + status = tc_gcm_calculation((uint8_t *) InData_Text, + (uint8_t *) OutData_Text, + (uint8_t) *InData_TextLen, + (uint8_t *) OutData_DataT, + &InputData_IV_GCM[0], + 16 * 8, + &InputData_DataA[0], + (uint8_t) *InData_DataALen); + + return status; +} + +fsp_err_t HW_SCE_Aes192GcmDecryptInitSub (uint32_t * InData_KeyType, uint32_t * InData_KeyIndex, uint32_t * InData_IV) +{ + FSP_PARAMETER_NOT_USED(InData_KeyType); + + R_AES_B->AESCNTL = R_AES_AESCNTL_GCM_192_DEC; + tc_aes_set_key((uint8_t *) InData_KeyIndex, SIZE_AES_192BIT_KEYLEN_BYTES); + R_AES_B->AESDCNTL = R_AES_AESDCNTL_BIT_2_3_MODE_1; + _copy((uint8_t *) &InputData_IV_GCM[0], sizeof(InputData_IV_GCM), (uint8_t *) InData_IV, sizeof(InputData_IV_GCM)); + + return FSP_SUCCESS; +} + +void HW_SCE_Aes192GcmDecryptUpdateAADSub (uint32_t * InData_DataA, uint32_t MAX_CNT) +{ + FSP_PARAMETER_NOT_USED(MAX_CNT); + _copy((uint8_t *) &InputData_DataA[0], sizeof(InputData_DataA), (uint8_t *) InData_DataA, sizeof(InputData_DataA)); +} + +void HW_SCE_Aes192GcmDecryptUpdateTransitionSub (void) +{ +} + +void HW_SCE_Aes192GcmDecryptUpdateSub (uint32_t * InData_Text, uint32_t * OutData_Text, uint32_t MAX_CNT) +{ + FSP_PARAMETER_NOT_USED(InData_Text); + FSP_PARAMETER_NOT_USED(OutData_Text); + FSP_PARAMETER_NOT_USED(MAX_CNT); +} + +fsp_err_t HW_SCE_Aes192GcmDecryptFinalSub (uint32_t * InData_Text, + uint32_t * InData_DataT, + uint32_t * InData_DataALen, + uint32_t * InData_TextLen, + uint32_t * InData_DataTLen, + uint32_t * OutData_Text) +{ + uint8_t Tag[16]; + uint8_t temp; + fsp_err_t status; + uint8_t Target_Tag[16] = {0}; + memcpy(&Target_Tag[0], InData_DataT, (uint8_t) *InData_DataTLen); + + status = tc_gcm_calculation((uint8_t *) InData_Text, + (uint8_t *) OutData_Text, + (uint8_t) *InData_TextLen, + &Tag[0], + &InputData_IV_GCM[0], + 16 * 8, + &InputData_DataA[0], + (uint8_t) *InData_DataALen); + if (status != FSP_SUCCESS) + { + return FSP_ERR_CRYPTO_UNKNOWN; + } + + /* Athentication Tag Verification*/ + if (*InData_DataTLen != 0) + { + for (uint32_t iLoop = 0; iLoop < (uint8_t) *InData_DataTLen; iLoop++) + { + temp = Target_Tag[iLoop]; + if (temp != Tag[iLoop]) + { + status = FSP_ERR_INVALID_ARGUMENT; + break; + } + } + + if (status == FSP_ERR_INVALID_ARGUMENT) + { + for (uint32_t iLoop = 0; iLoop < (uint8_t) *InData_TextLen; iLoop++) + { + *((uint8_t *) OutData_Text + iLoop) = 0; + } + + return FSP_ERR_CRYPTO_UNKNOWN; + } + } + + return FSP_SUCCESS; +} + +fsp_err_t HW_SCE_Aes256GcmEncryptInitSub (uint32_t * InData_KeyType, uint32_t * InData_KeyIndex, uint32_t * InData_IV) +{ + FSP_PARAMETER_NOT_USED(InData_KeyType); + + R_AES_B->AESCNTL = R_AES_AESCNTL_GCM_256_ENC; + tc_aes_set_key((uint8_t *) InData_KeyIndex, SIZE_AES_256BIT_KEYLEN_BYTES); + R_AES_B->AESDCNTL = R_AES_AESDCNTL_BIT_2_3_MODE_1; + _copy((uint8_t *) &InputData_IV_GCM[0], sizeof(InputData_IV_GCM), (uint8_t *) InData_IV, sizeof(InputData_IV_GCM)); + + return FSP_SUCCESS; +} + +void HW_SCE_Aes256GcmEncryptUpdateAADSub (uint32_t * InData_DataA, uint32_t MAX_CNT) +{ + FSP_PARAMETER_NOT_USED(MAX_CNT); + _copy((uint8_t *) &InputData_DataA[0], sizeof(InputData_DataA), (uint8_t *) InData_DataA, sizeof(InputData_DataA)); +} + +void HW_SCE_Aes256GcmEncryptUpdateTransitionSub (void) +{ +} + +void HW_SCE_Aes256GcmEncryptUpdateSub (uint32_t * InData_Text, uint32_t * OutData_Text, uint32_t MAX_CNT) +{ + FSP_PARAMETER_NOT_USED(InData_Text); + FSP_PARAMETER_NOT_USED(OutData_Text); + FSP_PARAMETER_NOT_USED(MAX_CNT); +} + +fsp_err_t HW_SCE_Aes256GcmEncryptFinalSub (uint32_t * InData_Text, + uint32_t * InData_DataALen, + uint32_t * InData_TextLen, + uint32_t * OutData_Text, + uint32_t * OutData_DataT) +{ + fsp_err_t status; + status = tc_gcm_calculation((uint8_t *) InData_Text, + (uint8_t *) OutData_Text, + (uint8_t) *InData_TextLen, + (uint8_t *) OutData_DataT, + &InputData_IV_GCM[0], + 16 * 8, + &InputData_DataA[0], + (uint8_t) *InData_DataALen); + + return status; +} + +fsp_err_t HW_SCE_Aes256GcmDecryptInitSub (uint32_t * InData_KeyType, uint32_t * InData_KeyIndex, uint32_t * InData_IV) +{ + FSP_PARAMETER_NOT_USED(InData_KeyType); + + R_AES_B->AESCNTL = R_AES_AESCNTL_GCM_256_DEC; + tc_aes_set_key((uint8_t *) InData_KeyIndex, SIZE_AES_256BIT_KEYLEN_BYTES); + R_AES_B->AESDCNTL = R_AES_AESDCNTL_BIT_2_3_MODE_1; + _copy((uint8_t *) &InputData_IV_GCM[0], sizeof(InputData_IV_GCM), (uint8_t *) InData_IV, sizeof(InputData_IV_GCM)); + + return FSP_SUCCESS; +} + +void HW_SCE_Aes256GcmDecryptUpdateAADSub (uint32_t * InData_DataA, uint32_t MAX_CNT) +{ + FSP_PARAMETER_NOT_USED(MAX_CNT); + _copy((uint8_t *) &InputData_DataA[0], sizeof(InputData_DataA), (uint8_t *) InData_DataA, sizeof(InputData_DataA)); +} + +void HW_SCE_Aes256GcmDecryptUpdateTransitionSub (void) +{ +} + +void HW_SCE_Aes256GcmDecryptUpdateSub (uint32_t * InData_Text, uint32_t * OutData_Text, uint32_t MAX_CNT) +{ + FSP_PARAMETER_NOT_USED(InData_Text); + FSP_PARAMETER_NOT_USED(OutData_Text); + FSP_PARAMETER_NOT_USED(MAX_CNT); +} + +fsp_err_t HW_SCE_Aes256GcmDecryptFinalSub (uint32_t * InData_Text, + uint32_t * InData_DataT, + uint32_t * InData_DataALen, + uint32_t * InData_TextLen, + uint32_t * InData_DataTLen, + uint32_t * OutData_Text) +{ + uint8_t Tag[16]; + uint8_t temp; + fsp_err_t status; + uint8_t Target_Tag[16] = {0}; + memcpy(&Target_Tag[0], InData_DataT, (uint8_t) *InData_DataTLen); + + status = tc_gcm_calculation((uint8_t *) InData_Text, + (uint8_t *) OutData_Text, + (uint8_t) *InData_TextLen, + &Tag[0], + &InputData_IV_GCM[0], + 16 * 8, + InputData_DataA, + (uint8_t) *InData_DataALen); + if (status != 0) + { + return FSP_ERR_CRYPTO_UNKNOWN; + } + + /* Athentication Tag Verification*/ + if (*InData_DataTLen != 0) + { + for (uint32_t iLoop = 0; iLoop < (uint8_t) *InData_DataTLen; iLoop++) + { + temp = Target_Tag[iLoop]; + if (temp != Tag[iLoop]) + { + status = FSP_ERR_INVALID_ARGUMENT; + break; + } + } + + if (status == FSP_ERR_INVALID_ARGUMENT) + { + for (uint32_t iLoop = 0; iLoop < (uint8_t) *InData_TextLen; iLoop++) + { + *((uint8_t *) OutData_Text + iLoop) = 0; + } + + return FSP_ERR_CRYPTO_UNKNOWN; + } + } + + return FSP_SUCCESS; } diff --git a/ra/fsp/src/r_sce/aes2/ctr_mode.c b/ra/fsp/src/r_sce/aes2/ctr_mode.c new file mode 100644 index 000000000..33f6ce714 --- /dev/null +++ b/ra/fsp/src/r_sce/aes2/ctr_mode.c @@ -0,0 +1,212 @@ +/*********************************************************************************************************************** + * Copyright [2020-2023] Renesas Electronics Corporation and/or its affiliates. All Rights Reserved. + * + * This software and documentation are supplied by Renesas Electronics America Inc. and may only be used with products + * of Renesas Electronics Corp. and its affiliates ("Renesas"). No other uses are authorized. Renesas products are + * sold pursuant to Renesas terms and conditions of sale. Purchasers are solely responsible for the selection and use + * of Renesas products and Renesas assumes no liability. No license, express or implied, to any intellectual property + * right is granted by Renesas. This software is protected under all applicable laws, including copyright laws. Renesas + * reserves the right to change or discontinue this software and/or this documentation. THE SOFTWARE AND DOCUMENTATION + * IS DELIVERED TO YOU "AS IS," AND RENESAS MAKES NO REPRESENTATIONS OR WARRANTIES, AND TO THE FULLEST EXTENT + * PERMISSIBLE UNDER APPLICABLE LAW, DISCLAIMS ALL WARRANTIES, WHETHER EXPLICITLY OR IMPLICITLY, INCLUDING WARRANTIES + * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, AND NONINFRINGEMENT, WITH RESPECT TO THE SOFTWARE OR + * DOCUMENTATION. RENESAS SHALL HAVE NO LIABILITY ARISING OUT OF ANY SECURITY VULNERABILITY OR BREACH. TO THE MAXIMUM + * EXTENT PERMITTED BY LAW, IN NO EVENT WILL RENESAS BE LIABLE TO YOU IN CONNECTION WITH THE SOFTWARE OR DOCUMENTATION + * (OR ANY PERSON OR ENTITY CLAIMING RIGHTS DERIVED FROM YOU) FOR ANY LOSS, DAMAGES, OR CLAIMS WHATSOEVER, INCLUDING, + * WITHOUT LIMITATION, ANY DIRECT, CONSEQUENTIAL, SPECIAL, INDIRECT, PUNITIVE, OR INCIDENTAL DAMAGES; ANY LOST PROFITS, + * OTHER ECONOMIC DAMAGE, PROPERTY DAMAGE, OR PERSONAL INJURY; AND EVEN IF RENESAS HAS BEEN ADVISED OF THE POSSIBILITY + * OF SUCH LOSS, DAMAGES, CLAIMS OR COSTS. + **********************************************************************************************************************/ + +/*********************************************************************************************************************** + * Includes + ***********************************************************************************************************************/ + +#include <tinycrypt/ctr_mode.h> +#include "bsp_api.h" +#include "hw_sce_aes_private.h" +#include "hw_sce_ra_private.h" + +/*********************************************************************************************************************** + * Global variables and functions + ***********************************************************************************************************************/ + +fsp_err_t HW_SCE_AES_128CtrEncrypt (const uint32_t * InData_Key, + const uint32_t * InData_IV, + const uint32_t num_words, + const uint32_t * InData_Text, + uint32_t * OutData_Text, + uint32_t * OutData_IV) +{ + fsp_err_t iret = FSP_SUCCESS; + FSP_PARAMETER_NOT_USED(OutData_IV); +#if RM_TINYCRYPT_PORT_CFG_PARAM_CHECKING_ENABLE + if ((InData_Key == (const uint32_t *) 0) || + ((InData_IV == (const uint32_t *) 0) || (InData_Text == (const uint32_t *) 0)) || + (OutData_Text == (const uint32_t *) 0) || (num_words == 0)) + { + iret = FSP_ERR_INVALID_ARGUMENT; + } +#endif + + R_AES_B->AESCNTL = R_AES_AESCNTL_CTR_128_ENC; + tc_aes_set_key((uint8_t *) InData_Key, SIZE_AES_128BIT_KEYLEN_BYTES); + + if (FSP_SUCCESS == iret) + { + tc_aes_set_iv((uint8_t *) InData_IV); + R_AES_B->AESDCNTL = R_AES_AESDCNTL_BIT_2_3_MODE_2; + tc_aes_start((uint8_t *) InData_Text, (uint8_t *) OutData_Text, num_words); + } + + return iret; +} + +fsp_err_t HW_SCE_AES_192CtrEncrypt (const uint32_t * InData_Key, + const uint32_t * InData_IV, + const uint32_t num_words, + const uint32_t * InData_Text, + uint32_t * OutData_Text, + uint32_t * OutData_IV) +{ + fsp_err_t iret = FSP_SUCCESS; + FSP_PARAMETER_NOT_USED(OutData_IV); +#if RM_TINYCRYPT_PORT_CFG_PARAM_CHECKING_ENABLE + if ((InData_Key == (const uint32_t *) 0) || + ((InData_IV == (const uint32_t *) 0) || (InData_Text == (const uint32_t *) 0)) || + (OutData_Text == (const uint32_t *) 0) || (num_words == 0)) + { + iret = FSP_ERR_INVALID_ARGUMENT; + } +#endif + + R_AES_B->AESCNTL = R_AES_AESCNTL_CTR_192_ENC; + tc_aes_set_key((uint8_t *) InData_Key, SIZE_AES_192BIT_KEYLEN_BYTES); + + if (FSP_SUCCESS == iret) + { + tc_aes_set_iv((uint8_t *) InData_IV); + R_AES_B->AESDCNTL = R_AES_AESDCNTL_BIT_2_3_MODE_2; + tc_aes_start((uint8_t *) InData_Text, (uint8_t *) OutData_Text, num_words); + } + + return iret; +} + +fsp_err_t HW_SCE_AES_256CtrEncrypt (const uint32_t * InData_Key, + const uint32_t * InData_IV, + const uint32_t num_words, + const uint32_t * InData_Text, + uint32_t * OutData_Text, + uint32_t * OutData_IV) +{ + fsp_err_t iret = FSP_SUCCESS; + FSP_PARAMETER_NOT_USED(OutData_IV); +#if RM_TINYCRYPT_PORT_CFG_PARAM_CHECKING_ENABLE + if ((InData_Key == (const uint32_t *) 0) || + ((InData_IV == (const uint32_t *) 0) || (InData_Text == (const uint32_t *) 0)) || + (OutData_Text == (const uint32_t *) 0) || (num_words == 0)) + { + iret = FSP_ERR_INVALID_ARGUMENT; + } +#endif + + R_AES_B->AESCNTL = R_AES_AESCNTL_CTR_256_ENC; + tc_aes_set_key((uint8_t *) InData_Key, SIZE_AES_256BIT_KEYLEN_BYTES); + + if (FSP_SUCCESS == iret) + { + tc_aes_set_iv((uint8_t *) InData_IV); + R_AES_B->AESDCNTL = R_AES_AESDCNTL_BIT_2_3_MODE_2; + tc_aes_start((uint8_t *) InData_Text, (uint8_t *) OutData_Text, num_words); + } + + return iret; +} + +fsp_err_t HW_SCE_AES_128CtrDecrypt (const uint32_t * InData_Key, + const uint32_t * InData_IV, + const uint32_t num_words, + const uint32_t * InData_Text, + uint32_t * OutData_Text) +{ + fsp_err_t iret = FSP_SUCCESS; +#if RM_TINYCRYPT_PORT_CFG_PARAM_CHECKING_ENABLE + if ((InData_Key == (const uint32_t *) 0) || + ((InData_IV == (const uint32_t *) 0) || (InData_Text == (const uint32_t *) 0)) || + (OutData_Text == (const uint32_t *) 0)) + { + iret = FSP_ERR_INVALID_ARGUMENT; + } +#endif + + R_AES_B->AESCNTL = R_AES_AESCNTL_CTR_128_DEC; + tc_aes_set_key((uint8_t *) InData_Key, SIZE_AES_128BIT_KEYLEN_BYTES); + + if (FSP_SUCCESS == iret) + { + tc_aes_set_iv((uint8_t *) InData_IV); + R_AES_B->AESDCNTL = R_AES_AESDCNTL_BIT_2_3_MODE_2; + tc_aes_start((uint8_t *) InData_Text, (uint8_t *) OutData_Text, num_words); + } + + return iret; +} + +fsp_err_t HW_SCE_AES_192CtrDecrypt (const uint32_t * InData_Key, + const uint32_t * InData_IV, + const uint32_t num_words, + const uint32_t * InData_Text, + uint32_t * OutData_Text) +{ + fsp_err_t iret = FSP_SUCCESS; +#if RM_TINYCRYPT_PORT_CFG_PARAM_CHECKING_ENABLE + if ((InData_Key == (const uint32_t *) 0) || + ((InData_IV == (const uint32_t *) 0) || (InData_Text == (const uint32_t *) 0)) || + (OutData_Text == (const uint32_t *) 0)) + { + iret = FSP_ERR_INVALID_ARGUMENT; + } +#endif + + R_AES_B->AESCNTL = R_AES_AESCNTL_CTR_192_DEC; + tc_aes_set_key((uint8_t *) InData_Key, SIZE_AES_192BIT_KEYLEN_BYTES); + + if (FSP_SUCCESS == iret) + { + tc_aes_set_iv((uint8_t *) InData_IV); + R_AES_B->AESDCNTL = R_AES_AESDCNTL_BIT_2_3_MODE_2; + tc_aes_start((uint8_t *) InData_Text, (uint8_t *) OutData_Text, num_words); + } + + return iret; +} + +fsp_err_t HW_SCE_AES_256CtrDecrypt (const uint32_t * InData_Key, + const uint32_t * InData_IV, + const uint32_t num_words, + const uint32_t * InData_Text, + uint32_t * OutData_Text) +{ + fsp_err_t iret = FSP_SUCCESS; +#if RM_TINYCRYPT_PORT_CFG_PARAM_CHECKING_ENABLE + if ((InData_Key == (const uint32_t *) 0) || + ((InData_IV == (const uint32_t *) 0) || (InData_Text == (const uint32_t *) 0)) || + (OutData_Text == (const uint32_t *) 0)) + { + iret = FSP_ERR_INVALID_ARGUMENT; + } +#endif + + R_AES_B->AESCNTL = R_AES_AESCNTL_CTR_256_DEC; + tc_aes_set_key((uint8_t *) InData_Key, SIZE_AES_256BIT_KEYLEN_BYTES); + + if (FSP_SUCCESS == iret) + { + tc_aes_set_iv((uint8_t *) InData_IV); + R_AES_B->AESDCNTL = R_AES_AESDCNTL_BIT_2_3_MODE_2; + tc_aes_start((uint8_t *) InData_Text, (uint8_t *) OutData_Text, num_words); + } + + return iret; +} diff --git a/ra/fsp/src/r_sce/aes2/gcm_mode.c b/ra/fsp/src/r_sce/aes2/gcm_mode.c new file mode 100644 index 000000000..5a1390d2d --- /dev/null +++ b/ra/fsp/src/r_sce/aes2/gcm_mode.c @@ -0,0 +1,217 @@ +/*********************************************************************************************************************** + * Copyright [2020-2023] Renesas Electronics Corporation and/or its affiliates. All Rights Reserved. + * + * This software and documentation are supplied by Renesas Electronics America Inc. and may only be used with products + * of Renesas Electronics Corp. and its affiliates ("Renesas"). No other uses are authorized. Renesas products are + * sold pursuant to Renesas terms and conditions of sale. Purchasers are solely responsible for the selection and use + * of Renesas products and Renesas assumes no liability. No license, express or implied, to any intellectual property + * right is granted by Renesas. This software is protected under all applicable laws, including copyright laws. Renesas + * reserves the right to change or discontinue this software and/or this documentation. THE SOFTWARE AND DOCUMENTATION + * IS DELIVERED TO YOU "AS IS," AND RENESAS MAKES NO REPRESENTATIONS OR WARRANTIES, AND TO THE FULLEST EXTENT + * PERMISSIBLE UNDER APPLICABLE LAW, DISCLAIMS ALL WARRANTIES, WHETHER EXPLICITLY OR IMPLICITLY, INCLUDING WARRANTIES + * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, AND NONINFRINGEMENT, WITH RESPECT TO THE SOFTWARE OR + * DOCUMENTATION. RENESAS SHALL HAVE NO LIABILITY ARISING OUT OF ANY SECURITY VULNERABILITY OR BREACH. TO THE MAXIMUM + * EXTENT PERMITTED BY LAW, IN NO EVENT WILL RENESAS BE LIABLE TO YOU IN CONNECTION WITH THE SOFTWARE OR DOCUMENTATION + * (OR ANY PERSON OR ENTITY CLAIMING RIGHTS DERIVED FROM YOU) FOR ANY LOSS, DAMAGES, OR CLAIMS WHATSOEVER, INCLUDING, + * WITHOUT LIMITATION, ANY DIRECT, CONSEQUENTIAL, SPECIAL, INDIRECT, PUNITIVE, OR INCIDENTAL DAMAGES; ANY LOST PROFITS, + * OTHER ECONOMIC DAMAGE, PROPERTY DAMAGE, OR PERSONAL INJURY; AND EVEN IF RENESAS HAS BEEN ADVISED OF THE POSSIBILITY + * OF SUCH LOSS, DAMAGES, CLAIMS OR COSTS. + **********************************************************************************************************************/ + +/*********************************************************************************************************************** + * Includes + ***********************************************************************************************************************/ + +#include <tinycrypt/gcm_mode.h> +#include "bsp_api.h" +#include "hw_sce_aes_private.h" +#include "hw_sce_ra_private.h" + +/*********************************************************************************************************************** + * Global variables and functions + ***********************************************************************************************************************/ + +fsp_err_t tc_gcm_calculation (uint8_t * input, + uint8_t * output, + uint32_t data_len, + uint8_t * atag, + uint8_t * initial_vector, + uint32_t iv_len, + uint8_t * aad, + uint32_t aad_len) +{ + uint8_t Jn[16] = {0}; + uint8_t J0[16] = {0}; + uint8_t data[16] = {0}; + uint8_t temp; + uint64_t temp_len; + uint16_t temp1; + int16_t len; + uint8_t * ptr; + uint8_t * ptr_out_temp; + uint8_t * ptr_out; + fsp_err_t status = FSP_SUCCESS; + uint8_t temp_tag[TC_AES_BLOCK_SIZE]; + uint8_t temp_output[TC_AES_BLOCK_SIZE]; + + if ((uint8_t) iv_len == 12) + { + memcpy(&J0, initial_vector, 12); + J0[15] = 1; + } + else + { + ptr = initial_vector; + temp_len = (uint8_t) iv_len; + R_AES_B->AESDCNTL |= R_AES_AESDCNTL_ASSIGN_DATA_DISABLE; + do + { + len = 16; + if (temp_len < 16) + { + len = (int16_t) temp_len; + } + + temp_len -= (uint64_t) len; + memcpy(data, ptr, (size_t) len); + tc_aes_start(&data[0], &J0[0], 1); + ptr += len; + } while (temp_len > 0); + + for (int16_t iLoop = 0; iLoop < 8; iLoop++) + { + data[iLoop] = 0; + } + + for (int16_t iLoop = 0; iLoop < 8; iLoop++) + { + temp_len = (uint64_t) ((uint8_t) iv_len * 8); + temp_len >>= (8 * iLoop); + data[15 - iLoop] = (uint8_t) temp_len; + } + + tc_aes_start(&data[0], &J0[0], 1); + } + + /* Flow to Obtain J0 from IV End */ + /* Flow to Obtain J1 from J0 */ + + memcpy(Jn, J0, 16); + + for (int16_t iLoop = 0; iLoop < 4; iLoop++) + { + temp = Jn[15 - iLoop]; + if (temp != 0xFF) // NOLINT(readability-magic-numbers) + { + Jn[15 - iLoop] += 1; + break; + } + + Jn[15 - iLoop] = 0; + } + + tc_aes_set_iv(Jn); + + /* Athentication Tag Creation Start */ + if ((uint8_t) aad_len != 0) + { + /* Flow to Obtain AAD Hash Value Start */ + ptr = aad; + R_AES_B->AESDCNTL |= R_AES_AESDCNTL_BIT_2; + temp_len = (uint8_t) aad_len; + + do + { + len = 16; + if (temp_len < 16) + { + len = (int16_t) temp_len; + } + + temp_len -= (uint64_t) len; + memset(data, 0, (size_t) sizeof(data)); + memcpy(data, ptr, (size_t) len); + tc_aes_start(&data[0], &data[0], 1); + ptr += len; + } while (temp_len > 0); + + /* Flow to Obtain AAD Hash Value End */ + } + + /* Encryption Flow Start */ + if ((uint8_t) data_len != 0) + { + ptr = input; + ptr_out = output; + temp_len = (uint8_t) data_len; + do + { + ptr_out_temp = &temp_output[0]; + temp1 = 0; + len = 16; + if (temp_len < 16) + { + len = (int16_t) temp_len; + temp1 = ((uint16_t) temp_len) * 8; + temp1 <<= 8; + temp1 |= R_AES_AESDCNTL_BIT_4; + } + + temp_len -= (uint64_t) len; + memset(data, 0, sizeof(data)); + memcpy(data, ptr, (size_t) len); + R_AES_B->AESDCNTL = (temp1 | R_AES_AESDCNTL_BIT_5); + tc_aes_start(&data[0], ptr_out_temp, 1); + if (temp_len > 0) + { + memcpy(ptr_out, &temp_output[0], TC_AES_BLOCK_SIZE); + ptr_out += TC_AES_BLOCK_SIZE; + } + else + { + memcpy(ptr_out, &temp_output[0], (size_t) len); + } + + ptr_out_temp += 16; + ptr += len; + for (int16_t iLoop = 0; iLoop < 4; iLoop++) + { + temp = Jn[15 - iLoop]; + if (temp == 0xFF) // NOLINT(readability-magic-numbers) + { + Jn[15 - iLoop] = 0; + } + else + { + Jn[15 - iLoop] += 1; + break; + } + } + + tc_aes_set_iv(Jn); + } while (temp_len > 0); + } + + /* Encryption Flow End */ + + if ((uint8_t) aad_len != 0) + { + tc_aes_set_iv(J0); + for (int16_t iLoop = 0; iLoop < 8; iLoop++) + { + temp_len = (uint64_t) ((uint8_t) aad_len * 8); + temp_len >>= (8 * iLoop); + Jn[7 - iLoop] = (uint8_t) temp_len; + temp_len = (uint64_t) ((uint8_t) data_len * 8); + temp_len >>= (8 * iLoop); + Jn[15 - iLoop] = (uint8_t) temp_len; + } + + R_AES_B->AESDCNTL |= R_AES_AESDCNTL_BIT_6; + tc_aes_start(&Jn[0], &temp_tag[0], 1); + memcpy(atag, &temp_tag[0], sizeof(temp_tag)); + } + + /* Athentication Tag Creation End*/ + return status; +} diff --git a/ra/fsp/src/r_sce/crypto_procedures/src/sce5/plainkey/adaptors/r_sce_adapt.c b/ra/fsp/src/r_sce/crypto_procedures/src/sce5/plainkey/adaptors/r_sce_adapt.c index 5c4afdb2c..821351358 100644 --- a/ra/fsp/src/r_sce/crypto_procedures/src/sce5/plainkey/adaptors/r_sce_adapt.c +++ b/ra/fsp/src/r_sce/crypto_procedures/src/sce5/plainkey/adaptors/r_sce_adapt.c @@ -351,3 +351,175 @@ fsp_err_t HW_SCE_Aes256CmacFinal(const uint32_t InData_Cmd[], return HW_SCE_Aes256CmacFinalSub((uint32_t *)InData_Cmd, (uint32_t *)InData_Text, (uint32_t *)InData_DataT, (uint32_t *)InData_DataTLen, OutData_DataT); } + +void HW_SCE_Aes192CcmEncryptUpdateSub(uint32_t *InData_Text, uint32_t *OutData_Text, uint32_t MAX_CNT) +{ + FSP_PARAMETER_NOT_USED(InData_Text); + FSP_PARAMETER_NOT_USED(OutData_Text); + FSP_PARAMETER_NOT_USED(MAX_CNT); +} + +void HW_SCE_Aes192CcmDecryptUpdateSub(uint32_t *InData_Text, uint32_t *OutData_Text, uint32_t MAX_CNT) +{ + FSP_PARAMETER_NOT_USED(InData_Text); + FSP_PARAMETER_NOT_USED(OutData_Text); + FSP_PARAMETER_NOT_USED(MAX_CNT); +} + +fsp_err_t HW_SCE_Aes192CcmEncryptFinalSub(uint32_t *InData_TextLen, uint32_t *InData_Text, uint32_t *OutData_Text, uint32_t *OutData_MAC) +{ + FSP_PARAMETER_NOT_USED(InData_TextLen); + FSP_PARAMETER_NOT_USED(InData_Text); + FSP_PARAMETER_NOT_USED(OutData_Text); + FSP_PARAMETER_NOT_USED(OutData_MAC); + return FSP_ERR_UNSUPPORTED; +} + +fsp_err_t HW_SCE_Aes192CcmDecryptFinalSub(uint32_t *InData_Text, uint32_t *InData_TextLen, uint32_t *InData_MAC, uint32_t *InData_MACLength, uint32_t *OutData_Text) +{ + FSP_PARAMETER_NOT_USED(InData_Text); + FSP_PARAMETER_NOT_USED(InData_TextLen); + FSP_PARAMETER_NOT_USED(InData_MAC); + FSP_PARAMETER_NOT_USED(InData_MACLength); + FSP_PARAMETER_NOT_USED(OutData_Text); + return FSP_ERR_UNSUPPORTED; +} + +fsp_err_t HW_SCE_Aes128CcmEncryptInitSubGeneral (uint32_t InData_KeyType[], + uint32_t InData_DataType[], + uint32_t InData_Cmd[], + uint32_t InData_TextLen[], + uint32_t InData_KeyIndex[], + uint32_t InData_IV[], + uint32_t InData_Header[], + uint32_t InData_SeqNum[], + uint32_t Header_Len) +{ + FSP_PARAMETER_NOT_USED(InData_KeyType); + FSP_PARAMETER_NOT_USED(InData_DataType); + FSP_PARAMETER_NOT_USED(InData_Cmd); + FSP_PARAMETER_NOT_USED(InData_TextLen); + FSP_PARAMETER_NOT_USED(InData_SeqNum); + + return (HW_SCE_Aes128CcmEncryptInitSub(InData_KeyIndex, InData_IV, InData_Header, Header_Len)); +} + +fsp_err_t HW_SCE_Aes192CcmEncryptInitSubGeneral (uint32_t InData_KeyType[], + uint32_t InData_DataType[], + uint32_t InData_Cmd[], + uint32_t InData_TextLen[], + uint32_t InData_KeyIndex[], + uint32_t InData_IV[], + uint32_t InData_Header[], + uint32_t InData_SeqNum[], + uint32_t Header_Len) +{ + FSP_PARAMETER_NOT_USED(InData_KeyType); + FSP_PARAMETER_NOT_USED(InData_DataType); + FSP_PARAMETER_NOT_USED(InData_Cmd); + FSP_PARAMETER_NOT_USED(InData_TextLen); + FSP_PARAMETER_NOT_USED(InData_KeyIndex); + FSP_PARAMETER_NOT_USED(InData_IV); + FSP_PARAMETER_NOT_USED(InData_Header); + FSP_PARAMETER_NOT_USED(InData_SeqNum); + FSP_PARAMETER_NOT_USED(Header_Len); + return FSP_ERR_UNSUPPORTED; +} + +fsp_err_t HW_SCE_Aes256CcmEncryptInitSubGeneral (uint32_t InData_KeyType[], + uint32_t InData_DataType[], + uint32_t InData_Cmd[], + uint32_t InData_TextLen[], + uint32_t InData_KeyIndex[], + uint32_t InData_IV[], + uint32_t InData_Header[], + uint32_t InData_SeqNum[], + uint32_t Header_Len) +{ + FSP_PARAMETER_NOT_USED(InData_KeyType); + FSP_PARAMETER_NOT_USED(InData_DataType); + FSP_PARAMETER_NOT_USED(InData_Cmd); + FSP_PARAMETER_NOT_USED(InData_TextLen); + FSP_PARAMETER_NOT_USED(InData_SeqNum); + + return (HW_SCE_Aes256CcmEncryptInitSub(InData_KeyIndex, InData_IV, InData_Header, Header_Len)); +} + +fsp_err_t HW_SCE_Aes128CcmDecryptInitSubGeneral (uint32_t InData_KeyType[], + uint32_t InData_DataType[], + uint32_t InData_Cmd[], + uint32_t InData_TextLen[], + uint32_t InData_MACLength[], + uint32_t InData_KeyIndex[], + uint32_t InData_IV[], + uint32_t InData_Header[], + uint32_t InData_SeqNum[], + uint32_t Header_Len) +{ + FSP_PARAMETER_NOT_USED(InData_KeyType); + FSP_PARAMETER_NOT_USED(InData_DataType); + FSP_PARAMETER_NOT_USED(InData_Cmd); + FSP_PARAMETER_NOT_USED(InData_TextLen); + FSP_PARAMETER_NOT_USED(InData_MACLength); + FSP_PARAMETER_NOT_USED(InData_SeqNum); + + return (HW_SCE_Aes128CcmDecryptInitSub(InData_KeyIndex, InData_IV, InData_Header, Header_Len)); +} + +fsp_err_t HW_SCE_Aes192CcmDecryptInitSubGeneral (uint32_t InData_KeyType[], + uint32_t InData_DataType[], + uint32_t InData_Cmd[], + uint32_t InData_TextLen[], + uint32_t InData_MACLength[], + uint32_t InData_KeyIndex[], + uint32_t InData_IV[], + uint32_t InData_Header[], + uint32_t InData_SeqNum[], + uint32_t Header_Len) +{ + FSP_PARAMETER_NOT_USED(InData_KeyType); + FSP_PARAMETER_NOT_USED(InData_DataType); + FSP_PARAMETER_NOT_USED(InData_Cmd); + FSP_PARAMETER_NOT_USED(InData_TextLen); + FSP_PARAMETER_NOT_USED(InData_MACLength); + FSP_PARAMETER_NOT_USED(InData_KeyIndex); + FSP_PARAMETER_NOT_USED(InData_IV); + FSP_PARAMETER_NOT_USED(InData_Header); + FSP_PARAMETER_NOT_USED(InData_SeqNum); + FSP_PARAMETER_NOT_USED(Header_Len); + return FSP_ERR_UNSUPPORTED; +} + +fsp_err_t HW_SCE_Aes256CcmDecryptInitSubGeneral (uint32_t InData_KeyType[], + uint32_t InData_DataType[], + uint32_t InData_Cmd[], + uint32_t InData_TextLen[], + uint32_t InData_MACLength[], + uint32_t InData_KeyIndex[], + uint32_t InData_IV[], + uint32_t InData_Header[], + uint32_t InData_SeqNum[], + uint32_t Header_Len) +{ + FSP_PARAMETER_NOT_USED(InData_KeyType); + FSP_PARAMETER_NOT_USED(InData_DataType); + FSP_PARAMETER_NOT_USED(InData_Cmd); + FSP_PARAMETER_NOT_USED(InData_TextLen); + FSP_PARAMETER_NOT_USED(InData_MACLength); + FSP_PARAMETER_NOT_USED(InData_SeqNum); + return (HW_SCE_Aes256CcmDecryptInitSub(InData_KeyIndex, InData_IV, InData_Header, Header_Len)); +} + +fsp_err_t HW_SCE_Aes128CcmEncryptFinalSubGeneral (uint32_t *InData_TextLen, uint32_t *InData_Text, uint32_t *OutData_Text, uint32_t *OutData_MAC) +{ + return (HW_SCE_Aes128CcmEncryptFinalSub(InData_TextLen, InData_Text, OutData_Text, OutData_MAC)); +} + +fsp_err_t HW_SCE_Aes128CcmDecryptFinalSubGeneral(uint32_t *InData_Text, + uint32_t *InData_TextLen, + uint32_t *InData_MAC, + uint32_t *InData_MACLength, + uint32_t *OutData_Text) +{ + return (HW_SCE_Aes128CcmDecryptFinalSub(InData_Text, InData_TextLen, InData_MAC, InData_MACLength, OutData_Text)); +} diff --git a/ra/fsp/src/r_sce/crypto_procedures/src/sce5/plainkey/private/inc/hw_sce_ra_private.h b/ra/fsp/src/r_sce/crypto_procedures/src/sce5/plainkey/private/inc/hw_sce_ra_private.h index ad1ecf988..1ffe23817 100644 --- a/ra/fsp/src/r_sce/crypto_procedures/src/sce5/plainkey/private/inc/hw_sce_ra_private.h +++ b/ra/fsp/src/r_sce/crypto_procedures/src/sce5/plainkey/private/inc/hw_sce_ra_private.h @@ -179,6 +179,35 @@ fsp_err_t HW_SCE_Aes256CmacVerifyUpdatePrivate(uint32_t *InData_Text, uint32_t M fsp_err_t HW_SCE_Aes256CmacVerifyFinalPrivate(uint32_t All_Msg_Len, uint32_t *InData_Text, uint32_t *InData_DataT, uint32_t *InData_DataTLen); +void HW_SCE_Aes192CcmEncryptUpdateSub(uint32_t *InData_Text, uint32_t *OutData_Text, uint32_t MAX_CNT); +fsp_err_t HW_SCE_Aes192CcmEncryptFinalSub(uint32_t *InData_TextLen, uint32_t *InData_Text, uint32_t *OutData_Text, + uint32_t *OutData_MAC); +void HW_SCE_Aes192CcmDecryptUpdateSub(uint32_t *InData_Text, uint32_t *OutData_Text, uint32_t MAX_CNT); +fsp_err_t HW_SCE_Aes192CcmDecryptFinalSub(uint32_t *InData_Text, uint32_t *InData_TextLen, uint32_t *InData_MAC, + uint32_t *InData_MACLength, uint32_t *OutData_Text); +fsp_err_t HW_SCE_Aes128CcmEncryptInitSubGeneral (uint32_t InData_KeyType[], uint32_t InData_DataType[], + uint32_t InData_Cmd[], uint32_t InData_TextLen[], uint32_t InData_KeyIndex[], uint32_t InData_IV[], + uint32_t InData_Header[], uint32_t InData_SeqNum[], uint32_t Header_Len); +fsp_err_t HW_SCE_Aes192CcmEncryptInitSubGeneral (uint32_t InData_KeyType[], uint32_t InData_DataType[], + uint32_t InData_Cmd[],uint32_t InData_TextLen[], uint32_t InData_KeyIndex[],uint32_t InData_IV[], + uint32_t InData_Header[], uint32_t InData_SeqNum[],uint32_t Header_Len); +fsp_err_t HW_SCE_Aes256CcmEncryptInitSubGeneral (uint32_t InData_KeyType[], uint32_t InData_DataType[], + uint32_t InData_Cmd[],uint32_t InData_TextLen[], uint32_t InData_KeyIndex[],uint32_t InData_IV[], + uint32_t InData_Header[], uint32_t InData_SeqNum[],uint32_t Header_Len); +fsp_err_t HW_SCE_Aes128CcmDecryptInitSubGeneral (uint32_t InData_KeyType[], uint32_t InData_DataType[], + uint32_t InData_Cmd[], uint32_t InData_TextLen[], uint32_t InData_MACLength[], uint32_t InData_KeyIndex[], + uint32_t InData_IV[], uint32_t InData_Header[], uint32_t InData_SeqNum[], uint32_t Header_Len); +fsp_err_t HW_SCE_Aes192CcmDecryptInitSubGeneral (uint32_t InData_KeyType[], uint32_t InData_DataType[], + uint32_t InData_Cmd[], uint32_t InData_TextLen[], uint32_t InData_MACLength[], uint32_t InData_KeyIndex[], + uint32_t InData_IV[], uint32_t InData_Header[], uint32_t InData_SeqNum[], uint32_t Header_Len); +fsp_err_t HW_SCE_Aes256CcmDecryptInitSubGeneral (uint32_t InData_KeyType[],uint32_t InData_DataType[], + uint32_t InData_Cmd[],uint32_t InData_TextLen[],uint32_t InData_MACLength[],uint32_t InData_KeyIndex[], + uint32_t InData_IV[],uint32_t InData_Header[],uint32_t InData_SeqNum[],uint32_t Header_Len); +fsp_err_t HW_SCE_Aes128CcmEncryptFinalSubGeneral (uint32_t *InData_TextLen, uint32_t *InData_Text, + uint32_t *OutData_Text, uint32_t *OutData_MAC); +fsp_err_t HW_SCE_Aes128CcmDecryptFinalSubGeneral(uint32_t *InData_Text, uint32_t *InData_TextLen, + uint32_t *InData_MAC, uint32_t *InData_MACLength, uint32_t *OutData_Text); + fsp_err_t HW_SCE_Aes192EncryptDecryptInitSub(const uint32_t *InData_Cmd, const uint32_t *InData_KeyIndex, const uint32_t *InData_IV); void HW_SCE_Aes192EncryptDecryptUpdateSub(const uint32_t *InData_Text, uint32_t *OutData_Text, const uint32_t MAX_CNT); fsp_err_t HW_SCE_Aes192EncryptDecryptFinalSub(void); diff --git a/ra/fsp/src/r_sce/crypto_procedures/src/sce5b/plainkey/adaptors/r_sce_adapt.c b/ra/fsp/src/r_sce/crypto_procedures/src/sce5b/plainkey/adaptors/r_sce_adapt.c index d4b955cb3..02536f7cb 100644 --- a/ra/fsp/src/r_sce/crypto_procedures/src/sce5b/plainkey/adaptors/r_sce_adapt.c +++ b/ra/fsp/src/r_sce/crypto_procedures/src/sce5b/plainkey/adaptors/r_sce_adapt.c @@ -364,3 +364,175 @@ fsp_err_t HW_SCE_Aes256CmacFinal(const uint32_t InData_Cmd[], return HW_SCE_Aes256CmacFinalSub((uint32_t *)InData_Cmd, (uint32_t *)InData_Text, (uint32_t *)InData_DataT, (uint32_t *)InData_DataTLen, OutData_DataT); } + +void HW_SCE_Aes192CcmEncryptUpdateSub(uint32_t *InData_Text, uint32_t *OutData_Text, uint32_t MAX_CNT) +{ + FSP_PARAMETER_NOT_USED(InData_Text); + FSP_PARAMETER_NOT_USED(OutData_Text); + FSP_PARAMETER_NOT_USED(MAX_CNT); +} + +void HW_SCE_Aes192CcmDecryptUpdateSub(uint32_t *InData_Text, uint32_t *OutData_Text, uint32_t MAX_CNT) +{ + FSP_PARAMETER_NOT_USED(InData_Text); + FSP_PARAMETER_NOT_USED(OutData_Text); + FSP_PARAMETER_NOT_USED(MAX_CNT); +} + +fsp_err_t HW_SCE_Aes192CcmEncryptFinalSub(uint32_t *InData_TextLen, uint32_t *InData_Text, uint32_t *OutData_Text, uint32_t *OutData_MAC) +{ + FSP_PARAMETER_NOT_USED(InData_TextLen); + FSP_PARAMETER_NOT_USED(InData_Text); + FSP_PARAMETER_NOT_USED(OutData_Text); + FSP_PARAMETER_NOT_USED(OutData_MAC); + return FSP_ERR_UNSUPPORTED; +} + +fsp_err_t HW_SCE_Aes192CcmDecryptFinalSub(uint32_t *InData_Text, uint32_t *InData_TextLen, uint32_t *InData_MAC, uint32_t *InData_MACLength, uint32_t *OutData_Text) +{ + FSP_PARAMETER_NOT_USED(InData_Text); + FSP_PARAMETER_NOT_USED(InData_TextLen); + FSP_PARAMETER_NOT_USED(InData_MAC); + FSP_PARAMETER_NOT_USED(InData_MACLength); + FSP_PARAMETER_NOT_USED(OutData_Text); + return FSP_ERR_UNSUPPORTED; +} + +fsp_err_t HW_SCE_Aes128CcmEncryptInitSubGeneral (uint32_t InData_KeyType[], + uint32_t InData_DataType[], + uint32_t InData_Cmd[], + uint32_t InData_TextLen[], + uint32_t InData_KeyIndex[], + uint32_t InData_IV[], + uint32_t InData_Header[], + uint32_t InData_SeqNum[], + uint32_t Header_Len) +{ + FSP_PARAMETER_NOT_USED(InData_KeyType); + FSP_PARAMETER_NOT_USED(InData_DataType); + FSP_PARAMETER_NOT_USED(InData_Cmd); + FSP_PARAMETER_NOT_USED(InData_TextLen); + FSP_PARAMETER_NOT_USED(InData_SeqNum); + + return (HW_SCE_Aes128CcmEncryptInitSub(InData_KeyIndex, InData_IV, InData_Header, Header_Len)); +} + +fsp_err_t HW_SCE_Aes192CcmEncryptInitSubGeneral (uint32_t InData_KeyType[], + uint32_t InData_DataType[], + uint32_t InData_Cmd[], + uint32_t InData_TextLen[], + uint32_t InData_KeyIndex[], + uint32_t InData_IV[], + uint32_t InData_Header[], + uint32_t InData_SeqNum[], + uint32_t Header_Len) +{ + FSP_PARAMETER_NOT_USED(InData_KeyType); + FSP_PARAMETER_NOT_USED(InData_DataType); + FSP_PARAMETER_NOT_USED(InData_Cmd); + FSP_PARAMETER_NOT_USED(InData_TextLen); + FSP_PARAMETER_NOT_USED(InData_KeyIndex); + FSP_PARAMETER_NOT_USED(InData_IV); + FSP_PARAMETER_NOT_USED(InData_Header); + FSP_PARAMETER_NOT_USED(InData_SeqNum); + FSP_PARAMETER_NOT_USED(Header_Len); + return FSP_ERR_UNSUPPORTED; +} + +fsp_err_t HW_SCE_Aes256CcmEncryptInitSubGeneral (uint32_t InData_KeyType[], + uint32_t InData_DataType[], + uint32_t InData_Cmd[], + uint32_t InData_TextLen[], + uint32_t InData_KeyIndex[], + uint32_t InData_IV[], + uint32_t InData_Header[], + uint32_t InData_SeqNum[], + uint32_t Header_Len) +{ + FSP_PARAMETER_NOT_USED(InData_KeyType); + FSP_PARAMETER_NOT_USED(InData_DataType); + FSP_PARAMETER_NOT_USED(InData_Cmd); + FSP_PARAMETER_NOT_USED(InData_TextLen); + FSP_PARAMETER_NOT_USED(InData_SeqNum); + + return (HW_SCE_Aes256CcmEncryptInitSub(InData_KeyIndex, InData_IV, InData_Header, Header_Len)); +} + +fsp_err_t HW_SCE_Aes128CcmDecryptInitSubGeneral (uint32_t InData_KeyType[], + uint32_t InData_DataType[], + uint32_t InData_Cmd[], + uint32_t InData_TextLen[], + uint32_t InData_MACLength[], + uint32_t InData_KeyIndex[], + uint32_t InData_IV[], + uint32_t InData_Header[], + uint32_t InData_SeqNum[], + uint32_t Header_Len) +{ + FSP_PARAMETER_NOT_USED(InData_KeyType); + FSP_PARAMETER_NOT_USED(InData_DataType); + FSP_PARAMETER_NOT_USED(InData_Cmd); + FSP_PARAMETER_NOT_USED(InData_TextLen); + FSP_PARAMETER_NOT_USED(InData_MACLength); + FSP_PARAMETER_NOT_USED(InData_SeqNum); + + return (HW_SCE_Aes128CcmDecryptInitSub(InData_KeyIndex, InData_IV, InData_Header, Header_Len)); +} + +fsp_err_t HW_SCE_Aes192CcmDecryptInitSubGeneral (uint32_t InData_KeyType[], + uint32_t InData_DataType[], + uint32_t InData_Cmd[], + uint32_t InData_TextLen[], + uint32_t InData_MACLength[], + uint32_t InData_KeyIndex[], + uint32_t InData_IV[], + uint32_t InData_Header[], + uint32_t InData_SeqNum[], + uint32_t Header_Len) +{ + FSP_PARAMETER_NOT_USED(InData_KeyType); + FSP_PARAMETER_NOT_USED(InData_DataType); + FSP_PARAMETER_NOT_USED(InData_Cmd); + FSP_PARAMETER_NOT_USED(InData_TextLen); + FSP_PARAMETER_NOT_USED(InData_MACLength); + FSP_PARAMETER_NOT_USED(InData_KeyIndex); + FSP_PARAMETER_NOT_USED(InData_IV); + FSP_PARAMETER_NOT_USED(InData_Header); + FSP_PARAMETER_NOT_USED(InData_SeqNum); + FSP_PARAMETER_NOT_USED(Header_Len); + return FSP_ERR_UNSUPPORTED; +} + +fsp_err_t HW_SCE_Aes256CcmDecryptInitSubGeneral (uint32_t InData_KeyType[], + uint32_t InData_DataType[], + uint32_t InData_Cmd[], + uint32_t InData_TextLen[], + uint32_t InData_MACLength[], + uint32_t InData_KeyIndex[], + uint32_t InData_IV[], + uint32_t InData_Header[], + uint32_t InData_SeqNum[], + uint32_t Header_Len) +{ + FSP_PARAMETER_NOT_USED(InData_KeyType); + FSP_PARAMETER_NOT_USED(InData_DataType); + FSP_PARAMETER_NOT_USED(InData_Cmd); + FSP_PARAMETER_NOT_USED(InData_TextLen); + FSP_PARAMETER_NOT_USED(InData_MACLength); + FSP_PARAMETER_NOT_USED(InData_SeqNum); + return (HW_SCE_Aes256CcmDecryptInitSub(InData_KeyIndex, InData_IV, InData_Header, Header_Len)); +} + +fsp_err_t HW_SCE_Aes128CcmEncryptFinalSubGeneral (uint32_t *InData_TextLen, uint32_t *InData_Text, uint32_t *OutData_Text, uint32_t *OutData_MAC) +{ + return (HW_SCE_Aes128CcmEncryptFinalSub(InData_TextLen, InData_Text, OutData_Text, OutData_MAC)); +} + +fsp_err_t HW_SCE_Aes128CcmDecryptFinalSubGeneral(uint32_t *InData_Text, + uint32_t *InData_TextLen, + uint32_t *InData_MAC, + uint32_t *InData_MACLength, + uint32_t *OutData_Text) +{ + return (HW_SCE_Aes128CcmDecryptFinalSub(InData_Text, InData_TextLen, InData_MAC, InData_MACLength, OutData_Text)); +} diff --git a/ra/fsp/src/r_sce/crypto_procedures/src/sce5b/plainkey/private/inc/hw_sce_ra_private.h b/ra/fsp/src/r_sce/crypto_procedures/src/sce5b/plainkey/private/inc/hw_sce_ra_private.h index 6b85d9a39..2c259d7f2 100644 --- a/ra/fsp/src/r_sce/crypto_procedures/src/sce5b/plainkey/private/inc/hw_sce_ra_private.h +++ b/ra/fsp/src/r_sce/crypto_procedures/src/sce5b/plainkey/private/inc/hw_sce_ra_private.h @@ -559,6 +559,28 @@ fsp_err_t HW_SCE_Aes256CcmDecryptInitSub(uint32_t *InData_KeyIndex, uint32_t *In void HW_SCE_Aes256CcmDecryptUpdateSub(uint32_t *InData_Text, uint32_t *OutData_Text, uint32_t MAX_CNT); fsp_err_t HW_SCE_Aes256CcmDecryptFinalSub(uint32_t *InData_Text, uint32_t *InData_TextLen, uint32_t *InData_MAC, uint32_t *InData_MACLength, uint32_t *OutData_Text); +fsp_err_t HW_SCE_Aes128CcmEncryptInitSubGeneral (uint32_t InData_KeyType[], uint32_t InData_DataType[], + uint32_t InData_Cmd[], uint32_t InData_TextLen[], uint32_t InData_KeyIndex[], uint32_t InData_IV[], + uint32_t InData_Header[], uint32_t InData_SeqNum[], uint32_t Header_Len); +fsp_err_t HW_SCE_Aes192CcmEncryptInitSubGeneral (uint32_t InData_KeyType[], uint32_t InData_DataType[], + uint32_t InData_Cmd[],uint32_t InData_TextLen[], uint32_t InData_KeyIndex[],uint32_t InData_IV[], + uint32_t InData_Header[], uint32_t InData_SeqNum[],uint32_t Header_Len); +fsp_err_t HW_SCE_Aes256CcmEncryptInitSubGeneral (uint32_t InData_KeyType[], uint32_t InData_DataType[], + uint32_t InData_Cmd[],uint32_t InData_TextLen[], uint32_t InData_KeyIndex[],uint32_t InData_IV[], + uint32_t InData_Header[], uint32_t InData_SeqNum[],uint32_t Header_Len); +fsp_err_t HW_SCE_Aes128CcmDecryptInitSubGeneral (uint32_t InData_KeyType[], uint32_t InData_DataType[], + uint32_t InData_Cmd[], uint32_t InData_TextLen[], uint32_t InData_MACLength[], uint32_t InData_KeyIndex[], + uint32_t InData_IV[], uint32_t InData_Header[], uint32_t InData_SeqNum[], uint32_t Header_Len); +fsp_err_t HW_SCE_Aes192CcmDecryptInitSubGeneral (uint32_t InData_KeyType[], uint32_t InData_DataType[], + uint32_t InData_Cmd[], uint32_t InData_TextLen[], uint32_t InData_MACLength[], uint32_t InData_KeyIndex[], + uint32_t InData_IV[], uint32_t InData_Header[], uint32_t InData_SeqNum[], uint32_t Header_Len); +fsp_err_t HW_SCE_Aes256CcmDecryptInitSubGeneral (uint32_t InData_KeyType[],uint32_t InData_DataType[], + uint32_t InData_Cmd[],uint32_t InData_TextLen[],uint32_t InData_MACLength[],uint32_t InData_KeyIndex[], + uint32_t InData_IV[],uint32_t InData_Header[],uint32_t InData_SeqNum[],uint32_t Header_Len); +fsp_err_t HW_SCE_Aes128CcmEncryptFinalSubGeneral (uint32_t *InData_TextLen, uint32_t *InData_Text, + uint32_t *OutData_Text, uint32_t *OutData_MAC); +fsp_err_t HW_SCE_Aes128CcmDecryptFinalSubGeneral(uint32_t *InData_Text, uint32_t *InData_TextLen, + uint32_t *InData_MAC, uint32_t *InData_MACLength, uint32_t *OutData_Text); fsp_err_t HW_SCE_Aes128CmacInitSub(uint32_t *InData_KeyIndex); void HW_SCE_Aes128CmacUpdateSub(uint32_t *InData_Text, uint32_t MAX_CNT); diff --git a/ra/fsp/src/r_sce/crypto_procedures/src/sce7/plainkey/adaptors/r_sce_adapt.c b/ra/fsp/src/r_sce/crypto_procedures/src/sce7/plainkey/adaptors/r_sce_adapt.c index 894d79620..cc0af1395 100644 --- a/ra/fsp/src/r_sce/crypto_procedures/src/sce7/plainkey/adaptors/r_sce_adapt.c +++ b/ra/fsp/src/r_sce/crypto_procedures/src/sce7/plainkey/adaptors/r_sce_adapt.c @@ -331,3 +331,135 @@ fsp_err_t HW_SCE_Aes256CmacFinal(const uint32_t InData_Cmd[], return HW_SCE_Aes256CmacFinalSub((uint32_t *)InData_Cmd, (uint32_t *)InData_Text, (uint32_t *)InData_DataT, (uint32_t *)InData_DataTLen, OutData_DataT); } + +fsp_err_t HW_SCE_Aes128CcmEncryptInitSubGeneral (uint32_t InData_KeyType[], + uint32_t InData_DataType[], + uint32_t InData_Cmd[], + uint32_t InData_TextLen[], + uint32_t InData_KeyIndex[], + uint32_t InData_IV[], + uint32_t InData_Header[], + uint32_t InData_SeqNum[], + uint32_t Header_Len) +{ + FSP_PARAMETER_NOT_USED(InData_DataType); + FSP_PARAMETER_NOT_USED(InData_Cmd); + FSP_PARAMETER_NOT_USED(InData_TextLen); + FSP_PARAMETER_NOT_USED(InData_SeqNum); + + return (HW_SCE_Aes128CcmEncryptInitSub(InData_KeyType, InData_KeyIndex, InData_IV, InData_Header, Header_Len)); +} + +fsp_err_t HW_SCE_Aes192CcmEncryptInitSubGeneral (uint32_t InData_KeyType[], + uint32_t InData_DataType[], + uint32_t InData_Cmd[], + uint32_t InData_TextLen[], + uint32_t InData_KeyIndex[], + uint32_t InData_IV[], + uint32_t InData_Header[], + uint32_t InData_SeqNum[], + uint32_t Header_Len) +{ + FSP_PARAMETER_NOT_USED(InData_KeyType); + FSP_PARAMETER_NOT_USED(InData_DataType); + FSP_PARAMETER_NOT_USED(InData_Cmd); + FSP_PARAMETER_NOT_USED(InData_TextLen); + FSP_PARAMETER_NOT_USED(InData_SeqNum); + + return (HW_SCE_Aes192CcmEncryptInitSub(InData_KeyIndex, InData_IV, InData_Header, Header_Len)); +} + +fsp_err_t HW_SCE_Aes256CcmEncryptInitSubGeneral (uint32_t InData_KeyType[], + uint32_t InData_DataType[], + uint32_t InData_Cmd[], + uint32_t InData_TextLen[], + uint32_t InData_KeyIndex[], + uint32_t InData_IV[], + uint32_t InData_Header[], + uint32_t InData_SeqNum[], + uint32_t Header_Len) +{ + FSP_PARAMETER_NOT_USED(InData_KeyType); + FSP_PARAMETER_NOT_USED(InData_DataType); + FSP_PARAMETER_NOT_USED(InData_Cmd); + FSP_PARAMETER_NOT_USED(InData_TextLen); + FSP_PARAMETER_NOT_USED(InData_SeqNum); + + return (HW_SCE_Aes256CcmEncryptInitSub(InData_KeyType, InData_KeyIndex, InData_IV, InData_Header, Header_Len)); +} + +fsp_err_t HW_SCE_Aes128CcmDecryptInitSubGeneral (uint32_t InData_KeyType[], + uint32_t InData_DataType[], + uint32_t InData_Cmd[], + uint32_t InData_TextLen[], + uint32_t InData_MACLength[], + uint32_t InData_KeyIndex[], + uint32_t InData_IV[], + uint32_t InData_Header[], + uint32_t InData_SeqNum[], + uint32_t Header_Len) +{ + FSP_PARAMETER_NOT_USED(InData_KeyType); + FSP_PARAMETER_NOT_USED(InData_DataType); + FSP_PARAMETER_NOT_USED(InData_Cmd); + FSP_PARAMETER_NOT_USED(InData_TextLen); + FSP_PARAMETER_NOT_USED(InData_MACLength); + FSP_PARAMETER_NOT_USED(InData_SeqNum); + + return (HW_SCE_Aes128CcmDecryptInitSub(InData_KeyType, InData_KeyIndex, InData_IV, InData_Header, Header_Len)); +} + +fsp_err_t HW_SCE_Aes192CcmDecryptInitSubGeneral (uint32_t InData_KeyType[], + uint32_t InData_DataType[], + uint32_t InData_Cmd[], + uint32_t InData_TextLen[], + uint32_t InData_MACLength[], + uint32_t InData_KeyIndex[], + uint32_t InData_IV[], + uint32_t InData_Header[], + uint32_t InData_SeqNum[], + uint32_t Header_Len) +{ + FSP_PARAMETER_NOT_USED(InData_KeyType); + FSP_PARAMETER_NOT_USED(InData_DataType); + FSP_PARAMETER_NOT_USED(InData_Cmd); + FSP_PARAMETER_NOT_USED(InData_TextLen); + FSP_PARAMETER_NOT_USED(InData_MACLength); + FSP_PARAMETER_NOT_USED(InData_SeqNum); + + return (HW_SCE_Aes192CcmDecryptInitSub(InData_KeyIndex, InData_IV, InData_Header, Header_Len)); +} + +fsp_err_t HW_SCE_Aes256CcmDecryptInitSubGeneral (uint32_t InData_KeyType[], + uint32_t InData_DataType[], + uint32_t InData_Cmd[], + uint32_t InData_TextLen[], + uint32_t InData_MACLength[], + uint32_t InData_KeyIndex[], + uint32_t InData_IV[], + uint32_t InData_Header[], + uint32_t InData_SeqNum[], + uint32_t Header_Len) +{ + FSP_PARAMETER_NOT_USED(InData_KeyType); + FSP_PARAMETER_NOT_USED(InData_DataType); + FSP_PARAMETER_NOT_USED(InData_Cmd); + FSP_PARAMETER_NOT_USED(InData_TextLen); + FSP_PARAMETER_NOT_USED(InData_MACLength); + FSP_PARAMETER_NOT_USED(InData_SeqNum); + return (HW_SCE_Aes256CcmDecryptInitSub(InData_KeyType, InData_KeyIndex, InData_IV, InData_Header, Header_Len)); +} + +fsp_err_t HW_SCE_Aes128CcmEncryptFinalSubGeneral (uint32_t *InData_TextLen, uint32_t *InData_Text, uint32_t *OutData_Text, uint32_t *OutData_MAC) +{ + return (HW_SCE_Aes128CcmEncryptFinalSub(InData_TextLen, InData_Text, OutData_Text, OutData_MAC)); +} + +fsp_err_t HW_SCE_Aes128CcmDecryptFinalSubGeneral(uint32_t *InData_Text, + uint32_t *InData_TextLen, + uint32_t *InData_MAC, + uint32_t *InData_MACLength, + uint32_t *OutData_Text) +{ + return (HW_SCE_Aes128CcmDecryptFinalSub(InData_Text, InData_TextLen, InData_MAC, InData_MACLength, OutData_Text)); +} diff --git a/ra/fsp/src/r_sce/crypto_procedures/src/sce7/plainkey/private/inc/hw_sce_ra_private.h b/ra/fsp/src/r_sce/crypto_procedures/src/sce7/plainkey/private/inc/hw_sce_ra_private.h index 500bb111b..4f8465474 100644 --- a/ra/fsp/src/r_sce/crypto_procedures/src/sce7/plainkey/private/inc/hw_sce_ra_private.h +++ b/ra/fsp/src/r_sce/crypto_procedures/src/sce7/plainkey/private/inc/hw_sce_ra_private.h @@ -603,6 +603,28 @@ fsp_err_t HW_SCE_Aes256CcmDecryptInitSub(uint32_t *InData_KeyType, uint32_t *InD void HW_SCE_Aes256CcmDecryptUpdateSub(uint32_t *InData_Text, uint32_t *OutData_Text, uint32_t MAX_CNT); fsp_err_t HW_SCE_Aes256CcmDecryptFinalSub(uint32_t *InData_Text, uint32_t *InData_TextLen, uint32_t *InData_MAC, uint32_t *InData_MACLength, uint32_t *OutData_Text); +fsp_err_t HW_SCE_Aes128CcmEncryptInitSubGeneral (uint32_t InData_KeyType[], uint32_t InData_DataType[], + uint32_t InData_Cmd[], uint32_t InData_TextLen[], uint32_t InData_KeyIndex[], uint32_t InData_IV[], + uint32_t InData_Header[], uint32_t InData_SeqNum[], uint32_t Header_Len); +fsp_err_t HW_SCE_Aes192CcmEncryptInitSubGeneral (uint32_t InData_KeyType[], uint32_t InData_DataType[], + uint32_t InData_Cmd[],uint32_t InData_TextLen[], uint32_t InData_KeyIndex[],uint32_t InData_IV[], + uint32_t InData_Header[], uint32_t InData_SeqNum[],uint32_t Header_Len); +fsp_err_t HW_SCE_Aes256CcmEncryptInitSubGeneral (uint32_t InData_KeyType[], uint32_t InData_DataType[], + uint32_t InData_Cmd[],uint32_t InData_TextLen[], uint32_t InData_KeyIndex[],uint32_t InData_IV[], + uint32_t InData_Header[], uint32_t InData_SeqNum[],uint32_t Header_Len); +fsp_err_t HW_SCE_Aes128CcmDecryptInitSubGeneral (uint32_t InData_KeyType[], uint32_t InData_DataType[], + uint32_t InData_Cmd[], uint32_t InData_TextLen[], uint32_t InData_MACLength[], uint32_t InData_KeyIndex[], + uint32_t InData_IV[], uint32_t InData_Header[], uint32_t InData_SeqNum[], uint32_t Header_Len); +fsp_err_t HW_SCE_Aes192CcmDecryptInitSubGeneral (uint32_t InData_KeyType[], uint32_t InData_DataType[], + uint32_t InData_Cmd[], uint32_t InData_TextLen[], uint32_t InData_MACLength[], uint32_t InData_KeyIndex[], + uint32_t InData_IV[], uint32_t InData_Header[], uint32_t InData_SeqNum[], uint32_t Header_Len); +fsp_err_t HW_SCE_Aes256CcmDecryptInitSubGeneral (uint32_t InData_KeyType[],uint32_t InData_DataType[], + uint32_t InData_Cmd[],uint32_t InData_TextLen[],uint32_t InData_MACLength[],uint32_t InData_KeyIndex[], + uint32_t InData_IV[],uint32_t InData_Header[],uint32_t InData_SeqNum[],uint32_t Header_Len); +fsp_err_t HW_SCE_Aes128CcmEncryptFinalSubGeneral (uint32_t *InData_TextLen, uint32_t *InData_Text, + uint32_t *OutData_Text, uint32_t *OutData_MAC); +fsp_err_t HW_SCE_Aes128CcmDecryptFinalSubGeneral(uint32_t *InData_Text, uint32_t *InData_TextLen, + uint32_t *InData_MAC, uint32_t *InData_MACLength, uint32_t *OutData_Text); fsp_err_t HW_SCE_Aes128CmacInitSub(uint32_t *InData_KeyType, uint32_t *InData_KeyIndex); void HW_SCE_Aes128CmacUpdateSub(uint32_t *InData_Text, uint32_t MAX_CNT); diff --git a/ra/fsp/src/r_sce/crypto_procedures/src/sce9/plainkey/adaptors/r_sce_adapt.c b/ra/fsp/src/r_sce/crypto_procedures/src/sce9/plainkey/adaptors/r_sce_adapt.c index 688ba1133..d54c2d137 100644 --- a/ra/fsp/src/r_sce/crypto_procedures/src/sce9/plainkey/adaptors/r_sce_adapt.c +++ b/ra/fsp/src/r_sce/crypto_procedures/src/sce9/plainkey/adaptors/r_sce_adapt.c @@ -257,3 +257,130 @@ fsp_err_t HW_SCE_Aes256CmacFinal(const uint32_t InData_Cmd[], return HW_SCE_Aes256CmacFinalSub((uint32_t *)InData_Cmd, (uint32_t *)InData_Text, (uint32_t *)InData_DataT, (uint32_t *)InData_DataTLen, OutData_DataT); } + +fsp_err_t HW_SCE_Aes128CcmEncryptInitSubGeneral (uint32_t InData_KeyType[], + uint32_t InData_DataType[], + uint32_t InData_Cmd[], + uint32_t InData_TextLen[], + uint32_t InData_KeyIndex[], + uint32_t InData_IV[], + uint32_t InData_Header[], + uint32_t InData_SeqNum[], + uint32_t Header_Len) +{ + return (HW_SCE_Aes128CcmEncryptInitSub(InData_KeyType, InData_DataType, InData_Cmd, InData_TextLen, + InData_KeyIndex, InData_IV, InData_Header, Header_Len, + InData_SeqNum)); +} + +fsp_err_t HW_SCE_Aes192CcmEncryptInitSubGeneral (uint32_t InData_KeyType[], + uint32_t InData_DataType[], + uint32_t InData_Cmd[], + uint32_t InData_TextLen[], + uint32_t InData_KeyIndex[], + uint32_t InData_IV[], + uint32_t InData_Header[], + uint32_t InData_SeqNum[], + uint32_t Header_Len) +{ + FSP_PARAMETER_NOT_USED(InData_KeyType); + FSP_PARAMETER_NOT_USED(InData_DataType); + FSP_PARAMETER_NOT_USED(InData_Cmd); + FSP_PARAMETER_NOT_USED(InData_TextLen); + FSP_PARAMETER_NOT_USED(InData_SeqNum); + + return (HW_SCE_Aes192CcmEncryptInitSub(InData_KeyIndex, InData_IV, InData_Header, Header_Len)); +} + +fsp_err_t HW_SCE_Aes256CcmEncryptInitSubGeneral (uint32_t InData_KeyType[], + uint32_t InData_DataType[], + uint32_t InData_Cmd[], + uint32_t InData_TextLen[], + uint32_t InData_KeyIndex[], + uint32_t InData_IV[], + uint32_t InData_Header[], + uint32_t InData_SeqNum[], + uint32_t Header_Len) +{ + FSP_PARAMETER_NOT_USED(InData_KeyType); + FSP_PARAMETER_NOT_USED(InData_DataType); + FSP_PARAMETER_NOT_USED(InData_Cmd); + FSP_PARAMETER_NOT_USED(InData_TextLen); + FSP_PARAMETER_NOT_USED(InData_SeqNum); + + return (HW_SCE_Aes256CcmEncryptInitSub(InData_KeyIndex, InData_IV, InData_Header, Header_Len)); +} + +fsp_err_t HW_SCE_Aes128CcmDecryptInitSubGeneral (uint32_t InData_KeyType[], + uint32_t InData_DataType[], + uint32_t InData_Cmd[], + uint32_t InData_TextLen[], + uint32_t InData_MACLength[], + uint32_t InData_KeyIndex[], + uint32_t InData_IV[], + uint32_t InData_Header[], + uint32_t InData_SeqNum[], + uint32_t Header_Len) +{ + return (HW_SCE_Aes128CcmDecryptInitSub(InData_KeyType, InData_DataType, InData_Cmd, InData_TextLen, + InData_MACLength, InData_KeyIndex, InData_IV, InData_Header, + Header_Len, InData_SeqNum)); +} + +fsp_err_t HW_SCE_Aes192CcmDecryptInitSubGeneral (uint32_t InData_KeyType[], + uint32_t InData_DataType[], + uint32_t InData_Cmd[], + uint32_t InData_TextLen[], + uint32_t InData_MACLength[], + uint32_t InData_KeyIndex[], + uint32_t InData_IV[], + uint32_t InData_Header[], + uint32_t InData_SeqNum[], + uint32_t Header_Len) +{ + FSP_PARAMETER_NOT_USED(InData_KeyType); + FSP_PARAMETER_NOT_USED(InData_DataType); + FSP_PARAMETER_NOT_USED(InData_Cmd); + FSP_PARAMETER_NOT_USED(InData_TextLen); + FSP_PARAMETER_NOT_USED(InData_MACLength); + FSP_PARAMETER_NOT_USED(InData_SeqNum); + + return (HW_SCE_Aes192CcmDecryptInitSub(InData_KeyIndex, InData_IV, InData_Header, Header_Len)); +} + +fsp_err_t HW_SCE_Aes256CcmDecryptInitSubGeneral (uint32_t InData_KeyType[], + uint32_t InData_DataType[], + uint32_t InData_Cmd[], + uint32_t InData_TextLen[], + uint32_t InData_MACLength[], + uint32_t InData_KeyIndex[], + uint32_t InData_IV[], + uint32_t InData_Header[], + uint32_t InData_SeqNum[], + uint32_t Header_Len) +{ + FSP_PARAMETER_NOT_USED(InData_KeyType); + FSP_PARAMETER_NOT_USED(InData_DataType); + FSP_PARAMETER_NOT_USED(InData_Cmd); + FSP_PARAMETER_NOT_USED(InData_TextLen); + FSP_PARAMETER_NOT_USED(InData_MACLength); + FSP_PARAMETER_NOT_USED(InData_SeqNum); + return (HW_SCE_Aes256CcmDecryptInitSub(InData_KeyIndex, InData_IV, InData_Header, Header_Len)); +} + +fsp_err_t HW_SCE_Aes128CcmEncryptFinalSubGeneral (uint32_t *InData_TextLen, uint32_t *InData_Text, uint32_t *OutData_Text, uint32_t *OutData_MAC) +{ + FSP_PARAMETER_NOT_USED(InData_TextLen); + return (HW_SCE_Aes128CcmEncryptFinalSub(InData_Text, OutData_Text, OutData_MAC)); +} + +fsp_err_t HW_SCE_Aes128CcmDecryptFinalSubGeneral(uint32_t *InData_Text, + uint32_t *InData_TextLen, + uint32_t *InData_MAC, + uint32_t *InData_MACLength, + uint32_t *OutData_Text) +{ + FSP_PARAMETER_NOT_USED(InData_TextLen); + FSP_PARAMETER_NOT_USED(InData_MACLength); + return (HW_SCE_Aes128CcmDecryptFinalSub(InData_Text, InData_MAC, OutData_Text)); +} diff --git a/ra/fsp/src/r_sce/crypto_procedures/src/sce9/plainkey/primitive/hw_sce_p_func304.c b/ra/fsp/src/r_sce/crypto_procedures/src/sce9/plainkey/primitive/hw_sce_p_func304.c index eaeaec177..7c5a4662a 100644 --- a/ra/fsp/src/r_sce/crypto_procedures/src/sce9/plainkey/primitive/hw_sce_p_func304.c +++ b/ra/fsp/src/r_sce/crypto_procedures/src/sce9/plainkey/primitive/hw_sce_p_func304.c @@ -48,7 +48,7 @@ Exported global variables (to be accessed by other files) Private global variables and functions ***********************************************************************************************************************/ -void HW_SCE_p_func304(void) +void HW_SCE_p_func304_r1(void) { uint32_t iLoop = 0U; uint32_t iLoop1 = 0U; @@ -1802,8 +1802,8 @@ void HW_SCE_p_func304(void) SCE->REG_ECH = 0x00000080U; SCE->REG_ECH = 0x000037daU; SCE->REG_ECH = 0x0000b400U; - SCE->REG_ECH = 0x00000097U; - HW_SCE_p_func101(0x3f40f3f7U, 0xbcae5503U, 0xa1e66292U, 0x25e9989cU); + SCE->REG_ECH = 0x00000094U; + HW_SCE_p_func101(0xbffe9b14U, 0xa3660d87U, 0x6afbfd85U, 0x60ee86c1U); HW_SCE_p_func310(); SCE->REG_ECH = 0x0000b7c0U; SCE->REG_ECH = 0x000000a0U; @@ -1824,10 +1824,10 @@ void HW_SCE_p_func304(void) SCE->REG_ECH = 0x00000080U; SCE->REG_ECH = 0x000037d9U; SCE->REG_ECH = 0x0000b400U; - SCE->REG_ECH = 0x00000098U; - HW_SCE_p_func101(0x2549e4eaU, 0xa0d3cc6fU, 0x23a5edaaU, 0xd5bffedaU); + SCE->REG_ECH = 0x00000095U; + HW_SCE_p_func101(0xd1f5d657U, 0xe314d678U, 0x376c88dcU, 0x75df4615U); HW_SCE_p_func310(); - HW_SCE_p_func100(0xe6e2105fU, 0xf966fefeU, 0x430a3701U, 0x6a1b7bcbU); + HW_SCE_p_func100(0x4aa63900U, 0xc38d6a07U, 0xb3fe94bcU, 0x286da68cU); SCE->REG_104H = 0x00000058U; SCE->REG_E0H = 0x80010020U; /* WAIT_LOOP */ @@ -1848,10 +1848,10 @@ void HW_SCE_p_func304(void) SCE->REG_ECH = 0x00000080U; SCE->REG_ECH = 0x000037d8U; SCE->REG_ECH = 0x0000b400U; - SCE->REG_ECH = 0x00000099U; - HW_SCE_p_func101(0xfa5ebe91U, 0x608dd2a2U, 0x703e6190U, 0xe345f97aU); + SCE->REG_ECH = 0x00000096U; + HW_SCE_p_func101(0x5a216a36U, 0x6416411bU, 0xc2a7f063U, 0x4bca700bU); HW_SCE_p_func310(); - HW_SCE_p_func100(0x7098f4e1U, 0x755029a7U, 0xcf086487U, 0x3a769432U); + HW_SCE_p_func100(0xd59a05dbU, 0x8ad34186U, 0x98e6f9a9U, 0x07ded72dU); SCE->REG_104H = 0x00000058U; SCE->REG_E0H = 0x80010020U; /* WAIT_LOOP */ @@ -1867,7 +1867,7 @@ void HW_SCE_p_func304(void) SCE->REG_ECH = 0x3800db78U; SCE->REG_E0H = 0x00000080U; SCE->REG_1CH = 0x00A60000U; - HW_SCE_p_func100(0xb5e88869U, 0x47d1e807U, 0x1f8e358dU, 0x13c8289fU); + HW_SCE_p_func100(0xf2afe4e5U, 0x068a0897U, 0x1c1fdb88U, 0x10ebfab5U); SCE->REG_1CH = 0x00400000U; SCE->REG_1D0H = 0x00000000U; if (1U == (SCE->REG_1CH_b.B22)) @@ -1896,11 +1896,11 @@ void HW_SCE_p_func304(void) } SCE->REG_100H = change_endian_long(0x00000000U); SCE->REG_28H = 0x00bf0001U; - HW_SCE_p_func101(0x1e90575aU, 0x6f9e8914U, 0x56924477U, 0x20dfd07dU); + HW_SCE_p_func101(0x91c25c8fU, 0xeb55526cU, 0xbd5b2addU, 0x3054a131U); } else { - HW_SCE_p_func101(0xee9e77e3U, 0x6eae0791U, 0x4ab75099U, 0x0a8da033U); + HW_SCE_p_func101(0x7286ef8fU, 0x826423faU, 0x7d02c7d2U, 0xa490a0b7U); } SCE->REG_24H = 0x000009c0U; /* WAIT_LOOP */ @@ -2180,5 +2180,5 @@ void HW_SCE_p_func304(void) } /*********************************************************************************************************************** -End of function ./input_dir/S6C1/Cryptographic_PlainKey/HW_SCE_p_func304.prc +End of function ./input_dir/S6C1/Cryptographic_PlainKey/HW_SCEp_func304_r1.prc ***********************************************************************************************************************/ diff --git a/ra/fsp/src/r_sce/crypto_procedures/src/sce9/plainkey/primitive/hw_sce_p_func307.c b/ra/fsp/src/r_sce/crypto_procedures/src/sce9/plainkey/primitive/hw_sce_p_func307.c index 098af78ab..624982da6 100644 --- a/ra/fsp/src/r_sce/crypto_procedures/src/sce9/plainkey/primitive/hw_sce_p_func307.c +++ b/ra/fsp/src/r_sce/crypto_procedures/src/sce9/plainkey/primitive/hw_sce_p_func307.c @@ -48,7 +48,7 @@ Exported global variables (to be accessed by other files) Private global variables and functions ***********************************************************************************************************************/ -void HW_SCE_p_func307(void) +void HW_SCE_p_func307_r1(void) { uint32_t iLoop = 0U; uint32_t iLoop1 = 0U; @@ -81,7 +81,7 @@ void HW_SCE_p_func307(void) SCE->REG_ECH = 0x0000b400U; SCE->REG_ECH = 0x00000080U; HW_SCE_p_func101(0x46765f77U, 0x5749f546U, 0xffae0ff7U, 0x8b2d018eU); - HW_SCE_p_func311(); + HW_SCE_p_func311_r1(); SCE->REG_ECH = 0x00000a73U; SCE->REG_ECH = 0x00000a31U; for(jLoop = 0; jLoop < 32; jLoop = jLoop + 1) @@ -192,7 +192,7 @@ void HW_SCE_p_func307(void) SCE->REG_ECH = 0x0000b400U; SCE->REG_ECH = 0x00000081U; HW_SCE_p_func101(0xca53192fU, 0x211abfddU, 0xa870386fU, 0xb8e79d3eU); - HW_SCE_p_func309(); + HW_SCE_p_func309_r1(); HW_SCE_p_func100(0xcd35d372U, 0x54dbdbceU, 0xb0afbbdbU, 0xf796fc29U); SCE->REG_104H = 0x00000058U; SCE->REG_E0H = 0x80010020U; @@ -358,7 +358,7 @@ void HW_SCE_p_func307(void) SCE->REG_ECH = 0x0000b400U; SCE->REG_ECH = 0x00000082U; HW_SCE_p_func101(0x8389d01fU, 0xe6c6ffddU, 0x142d5ccfU, 0x7a0e9c6dU); - HW_SCE_p_func309(); + HW_SCE_p_func309_r1(); HW_SCE_p_func100(0xdee3518fU, 0xb273ad82U, 0x9fe71ee7U, 0x2edf8f2cU); SCE->REG_104H = 0x00000058U; SCE->REG_E0H = 0x80010020U; @@ -519,7 +519,7 @@ void HW_SCE_p_func307(void) SCE->REG_ECH = 0x0000b400U; SCE->REG_ECH = 0x00000083U; HW_SCE_p_func101(0x24e91976U, 0x418be7b2U, 0x2aeeec01U, 0x65afa0b3U); - HW_SCE_p_func309(); + HW_SCE_p_func309_r1(); SCE->REG_ECH = 0x0000b7c0U; SCE->REG_ECH = 0x00000090U; SCE->REG_ECH = 0x0000381eU; @@ -528,5 +528,5 @@ void HW_SCE_p_func307(void) } /*********************************************************************************************************************** -End of function ./input_dir/S6C1/Cryptographic_PlainKey/HW_SCE_p_func307.prc +End of function ./input_dir/S6C1/Cryptographic_PlainKey/HW_SCEp_func307_r1.prc ***********************************************************************************************************************/ diff --git a/ra/fsp/src/r_sce/crypto_procedures/src/sce9/plainkey/primitive/hw_sce_p_func309.c b/ra/fsp/src/r_sce/crypto_procedures/src/sce9/plainkey/primitive/hw_sce_p_func309.c index 71e5429f2..4a059d372 100644 --- a/ra/fsp/src/r_sce/crypto_procedures/src/sce9/plainkey/primitive/hw_sce_p_func309.c +++ b/ra/fsp/src/r_sce/crypto_procedures/src/sce9/plainkey/primitive/hw_sce_p_func309.c @@ -48,7 +48,7 @@ Exported global variables (to be accessed by other files) Private global variables and functions ***********************************************************************************************************************/ -void HW_SCE_p_func309(void) +void HW_SCE_p_func309_r1(void) { uint32_t iLoop = 0U; uint32_t iLoop1 = 0U; @@ -869,7 +869,7 @@ void HW_SCE_p_func309(void) SCE->REG_ECH = 0x0000b400U; SCE->REG_ECH = 0x00000092U; HW_SCE_p_func101(0xb3093a43U, 0xac9c9129U, 0x503622eeU, 0x14cdab75U); - HW_SCE_p_func304(); + HW_SCE_p_func304_r1(); HW_SCE_p_func100(0xe32e76f5U, 0x11a6942dU, 0xdf08bb94U, 0x69570b0dU); SCE->REG_ECH = 0x0000b7c0U; SCE->REG_ECH = 0x000000a0U; @@ -1674,7 +1674,7 @@ void HW_SCE_p_func309(void) SCE->REG_ECH = 0x0000b400U; SCE->REG_ECH = 0x00000094U; HW_SCE_p_func101(0x51e65f45U, 0x2cdb1de0U, 0xf57eea4aU, 0x2c370be4U); - HW_SCE_p_func304(); + HW_SCE_p_func304_r1(); HW_SCE_p_func100(0x725794c2U, 0x871ac300U, 0xac83aff0U, 0xf400d18dU); SCE->REG_ECH = 0x0000b7c0U; SCE->REG_ECH = 0x000000a0U; @@ -3073,5 +3073,5 @@ void HW_SCE_p_func309(void) } /*********************************************************************************************************************** -End of function ./input_dir/S6C1/Cryptographic_PlainKey/HW_SCE_p_func309.prc +End of function ./input_dir/S6C1/Cryptographic_PlainKey/HW_SCEp_func309_r1.prc ***********************************************************************************************************************/ diff --git a/ra/fsp/src/r_sce/crypto_procedures/src/sce9/plainkey/primitive/hw_sce_p_func311.c b/ra/fsp/src/r_sce/crypto_procedures/src/sce9/plainkey/primitive/hw_sce_p_func311.c index 177446a16..fe22d4aee 100644 --- a/ra/fsp/src/r_sce/crypto_procedures/src/sce9/plainkey/primitive/hw_sce_p_func311.c +++ b/ra/fsp/src/r_sce/crypto_procedures/src/sce9/plainkey/primitive/hw_sce_p_func311.c @@ -48,7 +48,7 @@ Exported global variables (to be accessed by other files) Private global variables and functions ***********************************************************************************************************************/ -void HW_SCE_p_func311(void) +void HW_SCE_p_func311_r1(void) { uint32_t iLoop = 0U; uint32_t iLoop1 = 0U; @@ -460,7 +460,7 @@ void HW_SCE_p_func311(void) SCE->REG_ECH = 0x0000b400U; SCE->REG_ECH = 0x00000085U; HW_SCE_p_func101(0x6d1dde65U, 0x27e804aaU, 0x0353a48aU, 0xc63e1af4U); - HW_SCE_p_func309(); + HW_SCE_p_func309_r1(); HW_SCE_p_func100(0x52609d4fU, 0x2847540dU, 0xe7fd5f89U, 0xf730b53dU); SCE->REG_104H = 0x00000058U; SCE->REG_E0H = 0x80010020U; @@ -626,7 +626,7 @@ void HW_SCE_p_func311(void) SCE->REG_ECH = 0x0000b400U; SCE->REG_ECH = 0x00000086U; HW_SCE_p_func101(0x3cbf7cedU, 0x9f0ca8c1U, 0x9fc1b0a7U, 0x1fb8e5cbU); - HW_SCE_p_func309(); + HW_SCE_p_func309_r1(); HW_SCE_p_func100(0xd887c518U, 0x5a403aa4U, 0xc6176be4U, 0x5ce2816eU); SCE->REG_104H = 0x00000058U; SCE->REG_E0H = 0x80010020U; @@ -667,5 +667,5 @@ void HW_SCE_p_func311(void) } /*********************************************************************************************************************** -End of function ./input_dir/S6C1/Cryptographic_PlainKey/HW_SCE_p_func311.prc +End of function ./input_dir/S6C1/Cryptographic_PlainKey/HW_SCEp_func311_r1.prc ***********************************************************************************************************************/ diff --git a/ra/fsp/src/r_sce/crypto_procedures/src/sce9/plainkey/primitive/hw_sce_p_func325.c b/ra/fsp/src/r_sce/crypto_procedures/src/sce9/plainkey/primitive/hw_sce_p_func325.c index 2b829ea66..7e780c624 100644 --- a/ra/fsp/src/r_sce/crypto_procedures/src/sce9/plainkey/primitive/hw_sce_p_func325.c +++ b/ra/fsp/src/r_sce/crypto_procedures/src/sce9/plainkey/primitive/hw_sce_p_func325.c @@ -48,7 +48,7 @@ Exported global variables (to be accessed by other files) Private global variables and functions ***********************************************************************************************************************/ -void HW_SCE_p_func325(void) +void HW_SCE_p_func325_r1(void) { uint32_t iLoop = 0U; uint32_t iLoop1 = 0U; @@ -236,10 +236,10 @@ void HW_SCE_p_func325(void) HW_SCE_p_func100(0xb8afe95dU, 0xf0a676a8U, 0x278ca2e7U, 0xd432ab29U); HW_SCE_p_func314(616+32); SCE->REG_ECH = 0x0000b7a0U; - SCE->REG_ECH = 0x000000f0U; - HW_SCE_p_func101(0x4b583ae7U, 0x56d78152U, 0xd8cd207fU, 0x9097cbb4U); + SCE->REG_ECH = 0x000000f4U; + HW_SCE_p_func101(0x9db26816U, 0x580414a7U, 0xd9ca64dfU, 0x92bde1e2U); HW_SCE_p_func318(); - HW_SCE_p_func100(0xa29f08daU, 0x8b21226dU, 0xba1aa171U, 0x8c03bd6bU); + HW_SCE_p_func100(0x44a0ca14U, 0x4d979e4fU, 0xfbee0bd6U, 0x9345c810U); SCE->REG_28H = 0x009f0001U; SCE->REG_104H = 0x00000058U; SCE->REG_E0H = 0x80010020U; @@ -250,13 +250,13 @@ void HW_SCE_p_func325(void) } SCE->REG_100H = change_endian_long(0x01ef2f1cU); HW_SCE_p_func080(); - HW_SCE_p_func100(0x3e09f796U, 0x1f5513baU, 0xf2906a3aU, 0xf6a264a1U); + HW_SCE_p_func100(0xb954f024U, 0x7851d4d1U, 0x8047587aU, 0x5d6d0f8cU); SCE->REG_00H = 0x00002383U; SCE->REG_2CH = 0x00000022U; HW_SCE_p_func319(136); - HW_SCE_p_func100(0x83f2f5c5U, 0xdb4b3aa1U, 0xacb5ab71U, 0xe7159fd6U); + HW_SCE_p_func100(0xb4570d2aU, 0xb4dde668U, 0x71a8e6cdU, 0xf3f1a820U); HW_SCE_p_func314(136+32); - HW_SCE_p_func100(0xc6cc13adU, 0x22bf318cU, 0xd52ea535U, 0x0bfda6bcU); + HW_SCE_p_func100(0x237eef91U, 0xda59697dU, 0xa4eb0859U, 0x1ccbde57U); SCE->REG_104H = 0x00000058U; SCE->REG_E0H = 0x80010020U; /* WAIT_LOOP */ @@ -266,13 +266,13 @@ void HW_SCE_p_func325(void) } SCE->REG_100H = change_endian_long(0x012e06e6U); HW_SCE_p_func080(); - HW_SCE_p_func100(0x4434b13aU, 0x76d201adU, 0x198d4932U, 0xd9a8e8c6U); + HW_SCE_p_func100(0xebf5c34bU, 0x4a1f0b74U, 0x087a146fU, 0xc062284bU); SCE->REG_00H = 0x00002383U; SCE->REG_2CH = 0x00000023U; HW_SCE_p_func319(172); - HW_SCE_p_func100(0x2034127aU, 0x60179772U, 0x9d4f2692U, 0xf359f550U); + HW_SCE_p_func100(0x0b29ed31U, 0x15bc55dbU, 0x05b50a90U, 0xe989c69bU); HW_SCE_p_func314(172+32); - HW_SCE_p_func100(0x03be931eU, 0x9b569d30U, 0xf39d0140U, 0x2f929436U); + HW_SCE_p_func100(0x720a6ae8U, 0x68450d1bU, 0x0db485e6U, 0x36d04b94U); SCE->REG_104H = 0x00000058U; SCE->REG_E0H = 0x80010020U; /* WAIT_LOOP */ @@ -282,13 +282,13 @@ void HW_SCE_p_func325(void) } SCE->REG_100H = change_endian_long(0x0100abe1U); HW_SCE_p_func080(); - HW_SCE_p_func100(0xd22044a4U, 0x1911ee48U, 0x559c468eU, 0x6062e4e5U); + HW_SCE_p_func100(0xc8b750e8U, 0x2793fffbU, 0xfe12fbdaU, 0x766955d4U); SCE->REG_00H = 0x00002383U; SCE->REG_2CH = 0x00000020U; HW_SCE_p_func319(208); - HW_SCE_p_func100(0xf4dc0b69U, 0xee39d2a1U, 0x3638a4f4U, 0x87ad8cf6U); + HW_SCE_p_func100(0xe0cd750bU, 0x5a01adacU, 0x7aab12edU, 0x108d270aU); HW_SCE_p_func314(208+32); - HW_SCE_p_func101(0x48c6011cU, 0x2d1d0c0eU, 0x3ad508d0U, 0x1863f5c7U); + HW_SCE_p_func101(0x8320ae07U, 0x9ec01e29U, 0x20e024c6U, 0x210b2ed0U); } SCE->REG_ECH = 0x3800da9fU; SCE->REG_E0H = 0x00000080U; @@ -478,10 +478,10 @@ void HW_SCE_p_func325(void) HW_SCE_p_func100(0x58ee5ddbU, 0x9061965bU, 0xfdbfec79U, 0xab87a7f8U); HW_SCE_p_func314(616+32); SCE->REG_ECH = 0x0000b7a0U; - SCE->REG_ECH = 0x000000f1U; - HW_SCE_p_func101(0x55a0f782U, 0xc388d766U, 0xc11aff3bU, 0x804653c6U); + SCE->REG_ECH = 0x000000f5U; + HW_SCE_p_func101(0x05b6651dU, 0x48026b34U, 0x58ac622fU, 0x14f9c9f5U); HW_SCE_p_func318(); - HW_SCE_p_func100(0x8f95701eU, 0x150383aaU, 0x313ca36dU, 0x62f31989U); + HW_SCE_p_func100(0x6e700f7dU, 0x2298cb4bU, 0x32e82298U, 0x484d8424U); SCE->REG_28H = 0x009f0001U; SCE->REG_104H = 0x00000058U; SCE->REG_E0H = 0x80010020U; @@ -492,13 +492,13 @@ void HW_SCE_p_func325(void) } SCE->REG_100H = change_endian_long(0x01ef2f1cU); HW_SCE_p_func080(); - HW_SCE_p_func100(0x27b6018dU, 0xc2d58137U, 0xdaca4f73U, 0xa52f81c8U); + HW_SCE_p_func100(0x4a3a5487U, 0xa5840bb3U, 0xc732bae8U, 0xa2ad21fcU); SCE->REG_00H = 0x00002383U; SCE->REG_2CH = 0x00000022U; HW_SCE_p_func319(136); - HW_SCE_p_func100(0x7431f476U, 0x94a93defU, 0x3ba1ad1dU, 0x21d00227U); + HW_SCE_p_func100(0xcc9ac09dU, 0x0081ac03U, 0x4ab916edU, 0x9d913812U); HW_SCE_p_func314(136+32); - HW_SCE_p_func100(0x25a731a2U, 0x4a77f567U, 0xe605568cU, 0x0e3a4862U); + HW_SCE_p_func100(0xbc6549c2U, 0xd9456641U, 0xb34e86e6U, 0xe288c583U); SCE->REG_104H = 0x00000058U; SCE->REG_E0H = 0x80010020U; /* WAIT_LOOP */ @@ -508,13 +508,13 @@ void HW_SCE_p_func325(void) } SCE->REG_100H = change_endian_long(0x012e06e6U); HW_SCE_p_func080(); - HW_SCE_p_func100(0x4d9ad891U, 0x883ad05fU, 0x12dd6651U, 0x691f5aafU); + HW_SCE_p_func100(0x16113b33U, 0x794e7aecU, 0x3cea8c45U, 0x075c5a35U); SCE->REG_00H = 0x00002383U; SCE->REG_2CH = 0x00000023U; HW_SCE_p_func319(172); - HW_SCE_p_func100(0x0e617478U, 0xaec9a0f7U, 0xab6c622bU, 0xc06428feU); + HW_SCE_p_func100(0x2b248b83U, 0xa35118afU, 0xd2039341U, 0x88e2a7caU); HW_SCE_p_func314(172+32); - HW_SCE_p_func100(0x8c9380feU, 0x7636013aU, 0x4796f2c7U, 0xb9a6e0b0U); + HW_SCE_p_func100(0xe2d50f2eU, 0xa24a6f89U, 0x54e55185U, 0x3e958e8cU); SCE->REG_104H = 0x00000058U; SCE->REG_E0H = 0x80010020U; /* WAIT_LOOP */ @@ -524,14 +524,14 @@ void HW_SCE_p_func325(void) } SCE->REG_100H = change_endian_long(0x0100abe1U); HW_SCE_p_func080(); - HW_SCE_p_func100(0xe3018af1U, 0x5ca863f5U, 0xc01f235dU, 0xd337275fU); + HW_SCE_p_func100(0x5a52d3d2U, 0x714fcb0eU, 0x4ebf21a2U, 0x64792c7dU); SCE->REG_00H = 0x00002383U; SCE->REG_2CH = 0x00000020U; HW_SCE_p_func319(208); - HW_SCE_p_func100(0xb42aa5c7U, 0xde19d9caU, 0x018b5d65U, 0xef529d6fU); + HW_SCE_p_func100(0xb1242de9U, 0x181a13e5U, 0x5a2970e3U, 0x03564c58U); HW_SCE_p_func314(208+32); SCE->REG_ECH = 0x0000d260U; - HW_SCE_p_func101(0x96bd80abU, 0xe755313eU, 0x61b1ac43U, 0xfe71c8cfU); + HW_SCE_p_func101(0x19f26e8cU, 0x8e32d1ccU, 0x201b6801U, 0x24d584e1U); } SCE->REG_ECH = 0x01816e94U; HW_SCE_p_func101(0xa7c7f7dfU, 0x2e444bafU, 0x34990ba4U, 0x0ce22f12U); @@ -706,8 +706,8 @@ void HW_SCE_p_func325(void) HW_SCE_p_func100(0x6a8a5afdU, 0x62926c28U, 0x8e1be5b5U, 0x89cbfff9U); HW_SCE_p_func314(580+32); SCE->REG_ECH = 0x0000b7a0U; - SCE->REG_ECH = 0x000000f2U; - HW_SCE_p_func101(0xe3857bc5U, 0x0bf35aafU, 0xe3f75101U, 0x83c810b1U); + SCE->REG_ECH = 0x000000f6U; + HW_SCE_p_func101(0xb4164b6fU, 0x32459ef0U, 0x26b1ec51U, 0x36eee209U); HW_SCE_p_func318(); SCE->REG_ECH = 0x0000b7c0U; SCE->REG_ECH = 0x00000000U; @@ -717,5 +717,5 @@ void HW_SCE_p_func325(void) } /*********************************************************************************************************************** -End of function ./input_dir/S6C1/Cryptographic_PlainKey/HW_SCE_p_func325.prc +End of function ./input_dir/S6C1/Cryptographic_PlainKey/HW_SCEp_func325_r1.prc ***********************************************************************************************************************/ diff --git a/ra/fsp/src/r_sce/crypto_procedures/src/sce9/plainkey/primitive/hw_sce_p_p79.c b/ra/fsp/src/r_sce/crypto_procedures/src/sce9/plainkey/primitive/hw_sce_p_p79.c index 09fa9cad3..c9018b778 100644 --- a/ra/fsp/src/r_sce/crypto_procedures/src/sce9/plainkey/primitive/hw_sce_p_p79.c +++ b/ra/fsp/src/r_sce/crypto_procedures/src/sce9/plainkey/primitive/hw_sce_p_p79.c @@ -710,9 +710,9 @@ fsp_err_t HW_SCE_Rsa3072ModularExponentEncryptSub(const uint32_t *InData_KeyInde SCE->REG_ECH = 0x0000b7a0U; SCE->REG_ECH = 0x00000079U; HW_SCE_p_func101(0xee77e57cU, 0x9533b284U, 0x8d1c3bc5U, 0x7dafdaabU); - HW_SCE_p_func325(); + HW_SCE_p_func325_r1(); SCE->REG_28H = 0x009f0001U; - HW_SCE_p_func100(0x89f73d3fU, 0x7ca8dee1U, 0x9173e011U, 0x633d40e3U); + HW_SCE_p_func100(0xad4e3029U, 0x051ef4dfU, 0xf5ba502aU, 0x0f985354U); SCE->REG_2CH = 0x00000020U; SCE->REG_04H = 0x00000382U; /* WAIT_LOOP */ @@ -753,7 +753,7 @@ fsp_err_t HW_SCE_Rsa3072ModularExponentEncryptSub(const uint32_t *InData_KeyInde OutData_Text[30] = SCE->REG_100H; OutData_Text[31] = SCE->REG_100H; SCE->REG_28H = 0x00bf0001U; - HW_SCE_p_func100(0xa42466f5U, 0x57bd3bb3U, 0xb6f415b2U, 0xe32c0359U); + HW_SCE_p_func100(0x1ecc620bU, 0x57edb624U, 0x96cb0511U, 0x89d05b36U); SCE->REG_2CH = 0x00000022U; SCE->REG_04H = 0x00000302U; /* WAIT_LOOP */ @@ -825,7 +825,7 @@ fsp_err_t HW_SCE_Rsa3072ModularExponentEncryptSub(const uint32_t *InData_KeyInde OutData_Text[93] = SCE->REG_100H; OutData_Text[94] = SCE->REG_100H; OutData_Text[95] = SCE->REG_100H; - HW_SCE_p_func102(0xfeb44e6eU, 0x7548637dU, 0x57cf5ec8U, 0xef21b7b0U); + HW_SCE_p_func102(0x0bd7bf02U, 0xee336e55U, 0xbb83a9edU, 0x0c98b241U); SCE->REG_1B8H = 0x00000040U; /* WAIT_LOOP */ while (0U != SCE->REG_18H_b.B12) @@ -838,5 +838,5 @@ fsp_err_t HW_SCE_Rsa3072ModularExponentEncryptSub(const uint32_t *InData_KeyInde } /*********************************************************************************************************************** -End of function ./input_dir/S6C1/Cryptographic_PlainKey/HW_SCE_p_p79_r2.prc +End of function ./input_dir/S6C1/Cryptographic_PlainKey/HW_SCEp_p79_r3.prc ***********************************************************************************************************************/ diff --git a/ra/fsp/src/r_sce/crypto_procedures/src/sce9/plainkey/primitive/hw_sce_p_p7b.c b/ra/fsp/src/r_sce/crypto_procedures/src/sce9/plainkey/primitive/hw_sce_p_p7b.c index bce9f1bc6..b1d3bc2a8 100644 --- a/ra/fsp/src/r_sce/crypto_procedures/src/sce9/plainkey/primitive/hw_sce_p_p7b.c +++ b/ra/fsp/src/r_sce/crypto_procedures/src/sce9/plainkey/primitive/hw_sce_p_p7b.c @@ -636,7 +636,7 @@ fsp_err_t HW_SCE_Rsa4096ModularExponentEncryptSub(const uint32_t *InData_KeyInde SCE->REG_ECH = 0x0000b400U; SCE->REG_ECH = 0x0000007bU; HW_SCE_p_func101(0xad1ea16dU, 0xf8e9b417U, 0x6e7fb16aU, 0x0cb69393U); - HW_SCE_p_func307(); + HW_SCE_p_func307_r1(); HW_SCE_p_func100(0x79311285U, 0xe19252e8U, 0x6b8254d5U, 0x5380f50eU); SCE->REG_2CH = 0x00000020U; SCE->REG_04H = 0x00000302U; @@ -794,5 +794,5 @@ fsp_err_t HW_SCE_Rsa4096ModularExponentEncryptSub(const uint32_t *InData_KeyInde } /*********************************************************************************************************************** -End of function ./input_dir/S6C1/Cryptographic_PlainKey/HW_SCE_p_p7b_r2.prc +End of function ./input_dir/S6C1/Cryptographic_PlainKey/HW_SCEp_p7b_r3.prc ***********************************************************************************************************************/ diff --git a/ra/fsp/src/r_sce/crypto_procedures/src/sce9/plainkey/primitive/hw_sce_p_pa1i.c b/ra/fsp/src/r_sce/crypto_procedures/src/sce9/plainkey/primitive/hw_sce_p_pa1i.c index a55d30917..9cd584e2e 100644 --- a/ra/fsp/src/r_sce/crypto_procedures/src/sce9/plainkey/primitive/hw_sce_p_pa1i.c +++ b/ra/fsp/src/r_sce/crypto_procedures/src/sce9/plainkey/primitive/hw_sce_p_pa1i.c @@ -62,7 +62,6 @@ fsp_err_t HW_SCE_Aes256CcmEncryptInitSub(uint32_t *InData_KeyIndex, uint32_t *In uint32_t KEY_ADR = 0U; uint32_t OFS_ADR = 0U; uint32_t MAX_CNT2 = 0U; - uint32_t InData_KeyType[1] = {0}; (void)iLoop; (void)iLoop1; (void)iLoop2; @@ -75,6 +74,7 @@ fsp_err_t HW_SCE_Aes256CcmEncryptInitSub(uint32_t *InData_KeyIndex, uint32_t *In (void)KEY_ADR; (void)OFS_ADR; (void)MAX_CNT2; + uint32_t InData_KeyType[1] = {0}; if (0x0U != (SCE->REG_1BCH & 0x1fU)) { return FSP_ERR_CRYPTO_SCE_RESOURCE_CONFLICT; @@ -166,12 +166,12 @@ fsp_err_t HW_SCE_Aes256CcmEncryptInitSub(uint32_t *InData_KeyIndex, uint32_t *In { /* waiting */ } - SCE->REG_100H = change_endian_long(0x00000041U); - HW_SCE_p_func101(0x99001baaU, 0xbbc90a1bU, 0x2d78cff1U, 0x86c63a14U); + SCE->REG_100H = change_endian_long(0x000000a1U); + HW_SCE_p_func101(0xd206830aU, 0xb87a4d75U, 0x6583f40eU, 0x6464e8b7U); HW_SCE_p_func068(); SCE->REG_ECH = 0x0000b4e0U; SCE->REG_ECH = 0x01d04999U; - HW_SCE_p_func101(0xae2770a2U, 0x4aaa0e2cU, 0xd3b80b64U, 0x1eb5ae96U); + HW_SCE_p_func101(0x27595344U, 0x35dc3700U, 0x9f30fa1fU, 0xc3288152U); } SCE->REG_104H = 0x00000058U; SCE->REG_E0H = 0x800103a0U; @@ -332,5 +332,5 @@ fsp_err_t HW_SCE_Aes256CcmEncryptInitSub(uint32_t *InData_KeyIndex, uint32_t *In } /*********************************************************************************************************************** -End of function ./input_dir/S6C1/Cryptographic_PlainKey/HW_SCE_p_pa1i_r1.prc +End of function ./input_dir/S6C1/Cryptographic_PlainKey/HW_SCEp_pa1i_r2.prc ***********************************************************************************************************************/ diff --git a/ra/fsp/src/r_sce/crypto_procedures/src/sce9/plainkey/private/inc/hw_sce_ra_private.h b/ra/fsp/src/r_sce/crypto_procedures/src/sce9/plainkey/private/inc/hw_sce_ra_private.h index 0f2c73c6b..50ee7e5f6 100644 --- a/ra/fsp/src/r_sce/crypto_procedures/src/sce9/plainkey/private/inc/hw_sce_ra_private.h +++ b/ra/fsp/src/r_sce/crypto_procedures/src/sce9/plainkey/private/inc/hw_sce_ra_private.h @@ -591,6 +591,28 @@ fsp_err_t HW_SCE_Aes256CcmDecryptInitSub(uint32_t *InData_KeyIndex, uint32_t *In void HW_SCE_Aes256CcmDecryptUpdateSub(uint32_t *InData_Text, uint32_t *OutData_Text, uint32_t MAX_CNT); fsp_err_t HW_SCE_Aes256CcmDecryptFinalSub(uint32_t *InData_Text, uint32_t *InData_TextLen, uint32_t *InData_MAC, uint32_t *InData_MACLength, uint32_t *OutData_Text); +fsp_err_t HW_SCE_Aes128CcmEncryptInitSubGeneral (uint32_t InData_KeyType[], uint32_t InData_DataType[], + uint32_t InData_Cmd[], uint32_t InData_TextLen[], uint32_t InData_KeyIndex[], uint32_t InData_IV[], + uint32_t InData_Header[], uint32_t InData_SeqNum[], uint32_t Header_Len); +fsp_err_t HW_SCE_Aes192CcmEncryptInitSubGeneral (uint32_t InData_KeyType[], uint32_t InData_DataType[], + uint32_t InData_Cmd[],uint32_t InData_TextLen[], uint32_t InData_KeyIndex[],uint32_t InData_IV[], + uint32_t InData_Header[], uint32_t InData_SeqNum[],uint32_t Header_Len); +fsp_err_t HW_SCE_Aes256CcmEncryptInitSubGeneral (uint32_t InData_KeyType[], uint32_t InData_DataType[], + uint32_t InData_Cmd[],uint32_t InData_TextLen[], uint32_t InData_KeyIndex[],uint32_t InData_IV[], + uint32_t InData_Header[], uint32_t InData_SeqNum[],uint32_t Header_Len); +fsp_err_t HW_SCE_Aes128CcmDecryptInitSubGeneral (uint32_t InData_KeyType[], uint32_t InData_DataType[], + uint32_t InData_Cmd[], uint32_t InData_TextLen[], uint32_t InData_MACLength[], uint32_t InData_KeyIndex[], + uint32_t InData_IV[], uint32_t InData_Header[], uint32_t InData_SeqNum[], uint32_t Header_Len); +fsp_err_t HW_SCE_Aes192CcmDecryptInitSubGeneral (uint32_t InData_KeyType[], uint32_t InData_DataType[], + uint32_t InData_Cmd[], uint32_t InData_TextLen[], uint32_t InData_MACLength[], uint32_t InData_KeyIndex[], + uint32_t InData_IV[], uint32_t InData_Header[], uint32_t InData_SeqNum[], uint32_t Header_Len); +fsp_err_t HW_SCE_Aes256CcmDecryptInitSubGeneral (uint32_t InData_KeyType[],uint32_t InData_DataType[], + uint32_t InData_Cmd[],uint32_t InData_TextLen[],uint32_t InData_MACLength[],uint32_t InData_KeyIndex[], + uint32_t InData_IV[],uint32_t InData_Header[],uint32_t InData_SeqNum[],uint32_t Header_Len); +fsp_err_t HW_SCE_Aes128CcmEncryptFinalSubGeneral (uint32_t *InData_TextLen, uint32_t *InData_Text, + uint32_t *OutData_Text, uint32_t *OutData_MAC); +fsp_err_t HW_SCE_Aes128CcmDecryptFinalSubGeneral(uint32_t *InData_Text, uint32_t *InData_TextLen, + uint32_t *InData_MAC, uint32_t *InData_MACLength, uint32_t *OutData_Text); fsp_err_t HW_SCE_Aes128CmacInitSub(uint32_t *InData_KeyIndex); void HW_SCE_Aes128CmacUpdateSub(uint32_t *InData_Text, uint32_t MAX_CNT); @@ -754,12 +776,12 @@ void HW_SCE_p_func207(void); void HW_SCE_p_func300(void); void HW_SCE_p_func301(void); void HW_SCE_p_func302(void); -void HW_SCE_p_func304(void); -void HW_SCE_p_func307(void); +void HW_SCE_p_func304_r1(void); +void HW_SCE_p_func307_r1(void); void HW_SCE_p_func308(void); -void HW_SCE_p_func309(void); +void HW_SCE_p_func309_r1(void); void HW_SCE_p_func310(void); -void HW_SCE_p_func311(void); +void HW_SCE_p_func311_r1(void); void HW_SCE_p_func312(uint32_t ARG1); void HW_SCE_p_func313(uint32_t ARG1); void HW_SCE_p_func314(uint32_t ARG1); @@ -773,7 +795,7 @@ void HW_SCE_p_func321(uint32_t ARG1); void HW_SCE_p_func322(uint32_t ARG1); void HW_SCE_p_func323(void); void HW_SCE_p_func324(void); -void HW_SCE_p_func325(void); +void HW_SCE_p_func325_r1(void); void firm_mac_read(uint32_t *InData_Program); diff --git a/ra/fsp/src/r_sce/hw_sce_aes_private.h b/ra/fsp/src/r_sce/hw_sce_aes_private.h index 0005a33a4..bcf01166e 100644 --- a/ra/fsp/src/r_sce/hw_sce_aes_private.h +++ b/ra/fsp/src/r_sce/hw_sce_aes_private.h @@ -53,14 +53,11 @@ typedef struct st_sce_data uint32_t * p_data; } r_sce_data_t; - -typedef fsp_err_t (* hw_sce_cmac_init_t) (const uint32_t InData_KeyType[], const uint32_t InData_KeyIndex[]); +typedef fsp_err_t (* hw_sce_cmac_init_t)(const uint32_t InData_KeyType[], const uint32_t InData_KeyIndex[]); typedef void (* hw_sce_cmac_update_t)(const uint32_t InData_Text[], const uint32_t MAX_CNT); -typedef fsp_err_t (* hw_sce_cmac_final_t)(const uint32_t InData_Cmd[], - const uint32_t InData_Text[], - const uint32_t InData_DataT[], - const uint32_t InData_DataTLen[], - uint32_t OutData_DataT[]); +typedef fsp_err_t (* hw_sce_cmac_final_t)(const uint32_t InData_Cmd[], const uint32_t InData_Text[], + const uint32_t InData_DataT[], const uint32_t InData_DataTLen[], + uint32_t OutData_DataT[]); typedef fsp_err_t (* hw_sce_aes_gcm_crypt_init_t)(uint32_t * InData_KeyType, uint32_t * InData_KeyIndex, uint32_t * InData_IV); @@ -73,6 +70,22 @@ typedef fsp_err_t (* hw_sce_aes_gcm_encrypt_final_t)(uint32_t * InData_Text, uin typedef fsp_err_t (* hw_sce_aes_gcm_decrypt_final_t)(uint32_t * InData_Text, uint32_t * InData_DataT, uint32_t * InData_DataALen, uint32_t * InData_TextLen, uint32_t * InData_DataTLen, uint32_t * OutData_Text); +typedef fsp_err_t (* hw_sce_aes_ccm_encrypt_init_t)(uint32_t *InData_KeyType, uint32_t *InData_DataType, + uint32_t *InData_Cmd, uint32_t *InData_TextLen, + uint32_t *InData_KeyIndex, uint32_t *InData_IV, + uint32_t *InData_Header, uint32_t *InData_SeqNum, + uint32_t Header_Len); +typedef fsp_err_t (* hw_sce_aes_ccm_decrypt_init_t)(uint32_t *InData_KeyType, uint32_t *InData_DataType, + uint32_t *InData_Cmd, uint32_t *InData_TextLen, + uint32_t *InData_MACLength, uint32_t *InData_KeyIndex, + uint32_t *InData_IV, uint32_t *InData_Header, + uint32_t *InData_SeqNum, uint32_t Header_Len); +typedef void (* hw_sce_aes_ccm_crypt_update_t)(uint32_t *InData_Text, uint32_t *OutData_Text, uint32_t MAX_CNT); +typedef fsp_err_t (* hw_sce_aes_ccm_encrypt_final_t)(uint32_t *InData_TextLen, uint32_t *InData_Text, + uint32_t *OutData_Text, uint32_t *OutData_MAC); +typedef fsp_err_t (* hw_sce_aes_ccm_decrypt_final_t)(uint32_t *InData_Text, uint32_t *InData_TextLen, + uint32_t *InData_MAC, uint32_t *InData_MACLength, + uint32_t *OutData_Text); typedef fsp_err_t (* hw_sce_aes_ecb_encrypt_using_encrypted_key)(const uint32_t * InData_KeyIndex, const uint32_t num_words, const uint32_t * InData_Text, uint32_t * OutData_Text); @@ -361,4 +374,14 @@ fsp_err_t HW_SCE_Aes192CtrEncryptDecryptInitSubGeneral(uint32_t * InData_KeyInde fsp_err_t HW_SCE_Aes256CtrEncryptDecryptInitSubGeneral(uint32_t * InData_KeyIndex, uint32_t * InData_IV); +fsp_err_t HW_SCE_Aes128EncryptDecryptInitSub(const uint32_t * InData_KeyType, + const uint32_t * InData_Cmd, + const uint32_t * InData_KeyIndex, + const uint32_t * InData_IV); + +void HW_SCE_Aes128EncryptDecryptUpdateSub(const uint32_t * InData_Text, uint32_t * OutData_Text, + const uint32_t MAX_CNT); + +fsp_err_t HW_SCE_Aes128EncryptDecryptFinalSub(void); + #endif /* HW_SCE_AES_PRIVATE_H */ diff --git a/ra/fsp/src/r_sce/ra2/adaptors/r_sce_AES_adapt.c b/ra/fsp/src/r_sce/ra2/adaptors/r_sce_AES_adapt.c index 526ef3597..c04012834 100644 --- a/ra/fsp/src/r_sce/ra2/adaptors/r_sce_AES_adapt.c +++ b/ra/fsp/src/r_sce/ra2/adaptors/r_sce_AES_adapt.c @@ -172,7 +172,6 @@ void HW_SCE_Aes128EncryptDecryptUpdateSub (const uint32_t * InData_Text, uint32_ &InputData_IV[0]); break; } - } } diff --git a/ra/fsp/src/r_sce_protected/crypto_procedures_protected/src/sce9/primitive/r_sce_func304.c b/ra/fsp/src/r_sce_protected/crypto_procedures_protected/src/sce9/primitive/r_sce_func304.c index 9a1687fa8..f1c4a4483 100644 --- a/ra/fsp/src/r_sce_protected/crypto_procedures_protected/src/sce9/primitive/r_sce_func304.c +++ b/ra/fsp/src/r_sce_protected/crypto_procedures_protected/src/sce9/primitive/r_sce_func304.c @@ -48,7 +48,7 @@ Exported global variables (to be accessed by other files) Private global variables and functions ***********************************************************************************************************************/ -void R_SCE_func304(void) +void R_SCE_func304_r1(void) { uint32_t iLoop = 0U; uint32_t iLoop1 = 0U; @@ -1802,8 +1802,8 @@ void R_SCE_func304(void) SCE->REG_ECH = 0x00000080U; SCE->REG_ECH = 0x000037daU; SCE->REG_ECH = 0x0000b400U; - SCE->REG_ECH = 0x00000097U; - R_SCE_func101(0xb5beeb77U, 0x639a74ceU, 0xaa351464U, 0x56c04524U); + SCE->REG_ECH = 0x00000094U; + R_SCE_func101(0xd829182cU, 0xc047fe4aU, 0xb8f1178eU, 0x311c4301U); R_SCE_func310(); SCE->REG_ECH = 0x0000b7c0U; SCE->REG_ECH = 0x000000a0U; @@ -1824,10 +1824,10 @@ void R_SCE_func304(void) SCE->REG_ECH = 0x00000080U; SCE->REG_ECH = 0x000037d9U; SCE->REG_ECH = 0x0000b400U; - SCE->REG_ECH = 0x00000098U; - R_SCE_func101(0x7b385a43U, 0x9c412010U, 0x9a0462d1U, 0xfff8fa33U); + SCE->REG_ECH = 0x00000095U; + R_SCE_func101(0xe0b1214eU, 0x643ced42U, 0xd081e694U, 0x4ff3b264U); R_SCE_func310(); - R_SCE_func100(0xbbd74204U, 0xba55a969U, 0x0a288a89U, 0x4e58bd07U); + R_SCE_func100(0x1edc8c2bU, 0xa331f7c6U, 0xfe78ce71U, 0xc98d8c82U); SCE->REG_104H = 0x00000058U; SCE->REG_E0H = 0x80010020U; /* WAIT_LOOP */ @@ -1848,10 +1848,10 @@ void R_SCE_func304(void) SCE->REG_ECH = 0x00000080U; SCE->REG_ECH = 0x000037d8U; SCE->REG_ECH = 0x0000b400U; - SCE->REG_ECH = 0x00000099U; - R_SCE_func101(0xe9f4d766U, 0xc60e2d03U, 0x1fa7a830U, 0xed3e60ddU); + SCE->REG_ECH = 0x00000096U; + R_SCE_func101(0x274cdf79U, 0x168d2df4U, 0x70dbae58U, 0x1fc0b450U); R_SCE_func310(); - R_SCE_func100(0x751b1264U, 0xe2a38d23U, 0x0052a8a3U, 0xf6e02c2eU); + R_SCE_func100(0x79509467U, 0x157a6536U, 0x0f364fdeU, 0x331f1e3eU); SCE->REG_104H = 0x00000058U; SCE->REG_E0H = 0x80010020U; /* WAIT_LOOP */ @@ -1867,7 +1867,7 @@ void R_SCE_func304(void) SCE->REG_ECH = 0x3800db78U; SCE->REG_E0H = 0x00000080U; SCE->REG_1CH = 0x00A60000U; - R_SCE_func100(0x7a2639a9U, 0xb43e18a0U, 0x350f43f8U, 0xe16b9a92U); + R_SCE_func100(0x765323ebU, 0x5f07d838U, 0x08a60b85U, 0x97010f18U); SCE->REG_1CH = 0x00400000U; SCE->REG_1D0H = 0x00000000U; if (1U == (SCE->REG_1CH_b.B22)) @@ -1896,11 +1896,11 @@ void R_SCE_func304(void) } SCE->REG_100H = change_endian_long(0x00000000U); SCE->REG_28H = 0x00bf0001U; - R_SCE_func101(0xa354f5b9U, 0xd19e8d7aU, 0xa9ad322dU, 0x023d5281U); + R_SCE_func101(0x383e941aU, 0x8cb6cb0fU, 0xd6cd380eU, 0xa92c012eU); } else { - R_SCE_func101(0xf17c2d3bU, 0x4df9c4c4U, 0x9e3a4a88U, 0x8c116bf4U); + R_SCE_func101(0xdbcdfe3aU, 0xb3df35d7U, 0xe8ce3c87U, 0x4632da37U); } SCE->REG_24H = 0x000009c0U; /* WAIT_LOOP */ @@ -2180,5 +2180,5 @@ void R_SCE_func304(void) } /*********************************************************************************************************************** -End of function ./input_dir/S6C1/Cryptographic/R_SCE_func304.prc +End of function ./input_dir/S6C1/Cryptographic/R_SCE_func304_r1.prc ***********************************************************************************************************************/ diff --git a/ra/fsp/src/r_sce_protected/crypto_procedures_protected/src/sce9/primitive/r_sce_func307.c b/ra/fsp/src/r_sce_protected/crypto_procedures_protected/src/sce9/primitive/r_sce_func307.c index 1392f4a51..c05089ba2 100644 --- a/ra/fsp/src/r_sce_protected/crypto_procedures_protected/src/sce9/primitive/r_sce_func307.c +++ b/ra/fsp/src/r_sce_protected/crypto_procedures_protected/src/sce9/primitive/r_sce_func307.c @@ -48,7 +48,7 @@ Exported global variables (to be accessed by other files) Private global variables and functions ***********************************************************************************************************************/ -void R_SCE_func307(void) +void R_SCE_func307_r1(void) { uint32_t iLoop = 0U; uint32_t iLoop1 = 0U; @@ -81,7 +81,7 @@ void R_SCE_func307(void) SCE->REG_ECH = 0x0000b400U; SCE->REG_ECH = 0x00000080U; R_SCE_func101(0x89e510feU, 0x394c1c77U, 0xd552f2e2U, 0x6ac5d5aaU); - R_SCE_func311(); + R_SCE_func311_r1(); SCE->REG_ECH = 0x00000a73U; SCE->REG_ECH = 0x00000a31U; for(jLoop = 0; jLoop < 32; jLoop = jLoop + 1) @@ -192,7 +192,7 @@ void R_SCE_func307(void) SCE->REG_ECH = 0x0000b400U; SCE->REG_ECH = 0x00000081U; R_SCE_func101(0x59e2797cU, 0x9b3a97d6U, 0x0d8cad4cU, 0xccf47f58U); - R_SCE_func309(); + R_SCE_func309_r1(); R_SCE_func100(0x4d425083U, 0xab1bd6e2U, 0x32f75dc3U, 0x0a0d3f01U); SCE->REG_104H = 0x00000058U; SCE->REG_E0H = 0x80010020U; @@ -358,7 +358,7 @@ void R_SCE_func307(void) SCE->REG_ECH = 0x0000b400U; SCE->REG_ECH = 0x00000082U; R_SCE_func101(0xb813cd50U, 0xaa5a905cU, 0x8b4a9838U, 0x864d3a8fU); - R_SCE_func309(); + R_SCE_func309_r1(); R_SCE_func100(0xe86ac439U, 0x52299c20U, 0x34cb67a5U, 0x9406a945U); SCE->REG_104H = 0x00000058U; SCE->REG_E0H = 0x80010020U; @@ -519,7 +519,7 @@ void R_SCE_func307(void) SCE->REG_ECH = 0x0000b400U; SCE->REG_ECH = 0x00000083U; R_SCE_func101(0x0a8b5e81U, 0x3381ec5fU, 0x8db9ae0bU, 0x3ee54ba8U); - R_SCE_func309(); + R_SCE_func309_r1(); SCE->REG_ECH = 0x0000b7c0U; SCE->REG_ECH = 0x00000090U; SCE->REG_ECH = 0x0000381eU; @@ -528,5 +528,5 @@ void R_SCE_func307(void) } /*********************************************************************************************************************** -End of function ./input_dir/S6C1/Cryptographic/R_SCE_func307.prc +End of function ./input_dir/S6C1/Cryptographic/R_SCE_func307_r1.prc ***********************************************************************************************************************/ diff --git a/ra/fsp/src/r_sce_protected/crypto_procedures_protected/src/sce9/primitive/r_sce_func309.c b/ra/fsp/src/r_sce_protected/crypto_procedures_protected/src/sce9/primitive/r_sce_func309.c index 07de235c1..ce3fe2cde 100644 --- a/ra/fsp/src/r_sce_protected/crypto_procedures_protected/src/sce9/primitive/r_sce_func309.c +++ b/ra/fsp/src/r_sce_protected/crypto_procedures_protected/src/sce9/primitive/r_sce_func309.c @@ -48,7 +48,7 @@ Exported global variables (to be accessed by other files) Private global variables and functions ***********************************************************************************************************************/ -void R_SCE_func309(void) +void R_SCE_func309_r1(void) { uint32_t iLoop = 0U; uint32_t iLoop1 = 0U; @@ -869,7 +869,7 @@ void R_SCE_func309(void) SCE->REG_ECH = 0x0000b400U; SCE->REG_ECH = 0x00000092U; R_SCE_func101(0x6b69288eU, 0xd1ecfcbaU, 0x82e19566U, 0x6b62af3aU); - R_SCE_func304(); + R_SCE_func304_r1(); R_SCE_func100(0x368d2f14U, 0x93f1d277U, 0x8ccd8026U, 0x3381bbe1U); SCE->REG_ECH = 0x0000b7c0U; SCE->REG_ECH = 0x000000a0U; @@ -1674,7 +1674,7 @@ void R_SCE_func309(void) SCE->REG_ECH = 0x0000b400U; SCE->REG_ECH = 0x00000094U; R_SCE_func101(0x76e2fda6U, 0x0de14033U, 0xe3bbccb0U, 0x6cdee050U); - R_SCE_func304(); + R_SCE_func304_r1(); R_SCE_func100(0xe49c519cU, 0x97153a06U, 0xcb96ad65U, 0x2fd3f2a8U); SCE->REG_ECH = 0x0000b7c0U; SCE->REG_ECH = 0x000000a0U; @@ -3073,5 +3073,5 @@ void R_SCE_func309(void) } /*********************************************************************************************************************** -End of function ./input_dir/S6C1/Cryptographic/R_SCE_func309.prc +End of function ./input_dir/S6C1/Cryptographic/R_SCE_func309_r1.prc ***********************************************************************************************************************/ diff --git a/ra/fsp/src/r_sce_protected/crypto_procedures_protected/src/sce9/primitive/r_sce_func311.c b/ra/fsp/src/r_sce_protected/crypto_procedures_protected/src/sce9/primitive/r_sce_func311.c index 9a711e254..046e52a39 100644 --- a/ra/fsp/src/r_sce_protected/crypto_procedures_protected/src/sce9/primitive/r_sce_func311.c +++ b/ra/fsp/src/r_sce_protected/crypto_procedures_protected/src/sce9/primitive/r_sce_func311.c @@ -48,7 +48,7 @@ Exported global variables (to be accessed by other files) Private global variables and functions ***********************************************************************************************************************/ -void R_SCE_func311(void) +void R_SCE_func311_r1(void) { uint32_t iLoop = 0U; uint32_t iLoop1 = 0U; @@ -460,7 +460,7 @@ void R_SCE_func311(void) SCE->REG_ECH = 0x0000b400U; SCE->REG_ECH = 0x00000085U; R_SCE_func101(0xd2fab61cU, 0x19e55020U, 0xbfd2c9cfU, 0xa138f98aU); - R_SCE_func309(); + R_SCE_func309_r1(); R_SCE_func100(0xfe6cc685U, 0xf2374263U, 0x7d4e35eaU, 0x54b68c15U); SCE->REG_104H = 0x00000058U; SCE->REG_E0H = 0x80010020U; @@ -626,7 +626,7 @@ void R_SCE_func311(void) SCE->REG_ECH = 0x0000b400U; SCE->REG_ECH = 0x00000086U; R_SCE_func101(0xc2bab545U, 0x4b633385U, 0x800a7901U, 0xfe430d39U); - R_SCE_func309(); + R_SCE_func309_r1(); R_SCE_func100(0x7569cd34U, 0x193e9b08U, 0x5bfba64aU, 0xb7275878U); SCE->REG_104H = 0x00000058U; SCE->REG_E0H = 0x80010020U; @@ -667,5 +667,5 @@ void R_SCE_func311(void) } /*********************************************************************************************************************** -End of function ./input_dir/S6C1/Cryptographic/R_SCE_func311.prc +End of function ./input_dir/S6C1/Cryptographic/R_SCE_func311_r1.prc ***********************************************************************************************************************/ diff --git a/ra/fsp/src/r_sce_protected/crypto_procedures_protected/src/sce9/primitive/r_sce_func325.c b/ra/fsp/src/r_sce_protected/crypto_procedures_protected/src/sce9/primitive/r_sce_func325.c index eae2431a4..45301ef8c 100644 --- a/ra/fsp/src/r_sce_protected/crypto_procedures_protected/src/sce9/primitive/r_sce_func325.c +++ b/ra/fsp/src/r_sce_protected/crypto_procedures_protected/src/sce9/primitive/r_sce_func325.c @@ -48,7 +48,7 @@ Exported global variables (to be accessed by other files) Private global variables and functions ***********************************************************************************************************************/ -void R_SCE_func325(void) +void R_SCE_func325_r1(void) { uint32_t iLoop = 0U; uint32_t iLoop1 = 0U; @@ -236,10 +236,10 @@ void R_SCE_func325(void) R_SCE_func100(0x5e070d2bU, 0x2861ec9cU, 0xddebfea5U, 0x5e6be40aU); R_SCE_func314(616+32); SCE->REG_ECH = 0x0000b7a0U; - SCE->REG_ECH = 0x000000f0U; - R_SCE_func101(0x8504baf0U, 0x98c213a7U, 0x7ba693a6U, 0xbe05b697U); + SCE->REG_ECH = 0x000000f4U; + R_SCE_func101(0xff70890fU, 0x42bf2db5U, 0x47f3d876U, 0x15efdd95U); R_SCE_func318(); - R_SCE_func100(0xc97a2978U, 0x949d76fcU, 0x49120e25U, 0xfb5ec39aU); + R_SCE_func100(0x33b2c103U, 0x35cb8539U, 0x56b06866U, 0x4496966fU); SCE->REG_28H = 0x009f0001U; SCE->REG_104H = 0x00000058U; SCE->REG_E0H = 0x80010020U; @@ -250,13 +250,13 @@ void R_SCE_func325(void) } SCE->REG_100H = change_endian_long(0x01ef2f1cU); R_SCE_func080(); - R_SCE_func100(0xc9848707U, 0x732fe66bU, 0xa4c3e64aU, 0x0ab5e387U); + R_SCE_func100(0xea115848U, 0xc136437aU, 0x04fe56c0U, 0xd48d25ddU); SCE->REG_00H = 0x00002383U; SCE->REG_2CH = 0x00000022U; R_SCE_func319(136); - R_SCE_func100(0x7a59ac3cU, 0xab0ae38aU, 0xd0306db7U, 0x8c5feb38U); + R_SCE_func100(0xbc4c710eU, 0xc7de105dU, 0xc8d43f55U, 0x27945787U); R_SCE_func314(136+32); - R_SCE_func100(0xf3a0d3c7U, 0x0dec92b0U, 0xd17099d7U, 0x06a2d285U); + R_SCE_func100(0x65d1858eU, 0x03b01766U, 0x42993855U, 0x94615f05U); SCE->REG_104H = 0x00000058U; SCE->REG_E0H = 0x80010020U; /* WAIT_LOOP */ @@ -266,13 +266,13 @@ void R_SCE_func325(void) } SCE->REG_100H = change_endian_long(0x012e06e6U); R_SCE_func080(); - R_SCE_func100(0x0cef17afU, 0x00de804eU, 0xd14e112aU, 0x797d9bdeU); + R_SCE_func100(0x9e9a7975U, 0xdc725576U, 0xef02d451U, 0xa467d07bU); SCE->REG_00H = 0x00002383U; SCE->REG_2CH = 0x00000023U; R_SCE_func319(172); - R_SCE_func100(0x9ca71154U, 0x37bd596bU, 0x21278a1eU, 0x551d02f1U); + R_SCE_func100(0x6a7e51c7U, 0x0eb23b27U, 0x03540e70U, 0xe742d295U); R_SCE_func314(172+32); - R_SCE_func100(0xea715054U, 0x50f39232U, 0x606179a9U, 0xaa3c0311U); + R_SCE_func100(0x317f2bafU, 0xb085e6b7U, 0x9f0747f6U, 0x64a609a5U); SCE->REG_104H = 0x00000058U; SCE->REG_E0H = 0x80010020U; /* WAIT_LOOP */ @@ -282,13 +282,13 @@ void R_SCE_func325(void) } SCE->REG_100H = change_endian_long(0x0100abe1U); R_SCE_func080(); - R_SCE_func100(0xa687f8dbU, 0x5cb7e174U, 0x0e863223U, 0x911f200bU); + R_SCE_func100(0xd3e19b21U, 0xb41fa8a9U, 0x435dd6abU, 0xbe11660eU); SCE->REG_00H = 0x00002383U; SCE->REG_2CH = 0x00000020U; R_SCE_func319(208); - R_SCE_func100(0x909ebb52U, 0x60af5848U, 0x6997f317U, 0xf434ba3fU); + R_SCE_func100(0x5576a380U, 0x6246414cU, 0xad16a8caU, 0x4339e99eU); R_SCE_func314(208+32); - R_SCE_func101(0x45c1f242U, 0x313d5619U, 0x3572a9ecU, 0xf5a37769U); + R_SCE_func101(0xbb2ae5dfU, 0x7a22b126U, 0xac410c1cU, 0x20aeb880U); } SCE->REG_ECH = 0x3800da9fU; SCE->REG_E0H = 0x00000080U; @@ -478,10 +478,10 @@ void R_SCE_func325(void) R_SCE_func100(0x0b5d830eU, 0x25e4e603U, 0xddf8cacdU, 0x8cc7eea0U); R_SCE_func314(616+32); SCE->REG_ECH = 0x0000b7a0U; - SCE->REG_ECH = 0x000000f1U; - R_SCE_func101(0x9e2fe872U, 0xe3fe8487U, 0xe8e3d1c3U, 0x3600421cU); + SCE->REG_ECH = 0x000000f5U; + R_SCE_func101(0x5e20bf36U, 0x3430e9e4U, 0x748595e5U, 0x1fa1c9d6U); R_SCE_func318(); - R_SCE_func100(0x9993f00bU, 0xd43b20d5U, 0x8ccd0186U, 0x169b9b48U); + R_SCE_func100(0xc2ba1825U, 0x298bad26U, 0x9071d1a1U, 0x66e7b5dcU); SCE->REG_28H = 0x009f0001U; SCE->REG_104H = 0x00000058U; SCE->REG_E0H = 0x80010020U; @@ -492,13 +492,13 @@ void R_SCE_func325(void) } SCE->REG_100H = change_endian_long(0x01ef2f1cU); R_SCE_func080(); - R_SCE_func100(0xa0044513U, 0x02c142f2U, 0xb083d6b6U, 0xf436a715U); + R_SCE_func100(0x996c6c24U, 0x58ae383bU, 0xcae34a0dU, 0x11cb0722U); SCE->REG_00H = 0x00002383U; SCE->REG_2CH = 0x00000022U; R_SCE_func319(136); - R_SCE_func100(0xdd3473c5U, 0x5c56b339U, 0x44be53d2U, 0xdec4eae4U); + R_SCE_func100(0x16da167aU, 0x70428448U, 0x883bc530U, 0x348535edU); R_SCE_func314(136+32); - R_SCE_func100(0xe3c006cdU, 0x4a3d24b9U, 0x35583656U, 0x7e1c7f89U); + R_SCE_func100(0x0282e010U, 0xaf6c444aU, 0xce5dfdc8U, 0x973108adU); SCE->REG_104H = 0x00000058U; SCE->REG_E0H = 0x80010020U; /* WAIT_LOOP */ @@ -508,13 +508,13 @@ void R_SCE_func325(void) } SCE->REG_100H = change_endian_long(0x012e06e6U); R_SCE_func080(); - R_SCE_func100(0xf05de98dU, 0x1a5391c5U, 0x250f290cU, 0x9b2cc401U); + R_SCE_func100(0x5a2de7abU, 0x358ae496U, 0xe8681248U, 0xe641ba7bU); SCE->REG_00H = 0x00002383U; SCE->REG_2CH = 0x00000023U; R_SCE_func319(172); - R_SCE_func100(0x83c9a339U, 0xc45bf34eU, 0x3fe26839U, 0x15bad4b9U); + R_SCE_func100(0xaa0cd971U, 0x6f2b0338U, 0x56b40b8eU, 0xcb3e497dU); R_SCE_func314(172+32); - R_SCE_func100(0x51dc2d74U, 0xb77c6ffbU, 0x4c087d2cU, 0x3451a641U); + R_SCE_func100(0x7fdf44c1U, 0x759c90c9U, 0x2b088811U, 0x79fa617fU); SCE->REG_104H = 0x00000058U; SCE->REG_E0H = 0x80010020U; /* WAIT_LOOP */ @@ -524,14 +524,14 @@ void R_SCE_func325(void) } SCE->REG_100H = change_endian_long(0x0100abe1U); R_SCE_func080(); - R_SCE_func100(0x1a63ef1aU, 0x5c00b85eU, 0xf01ab08aU, 0xc5d4d7a5U); + R_SCE_func100(0x7574fb68U, 0xade5f513U, 0x46a83200U, 0xb32cac21U); SCE->REG_00H = 0x00002383U; SCE->REG_2CH = 0x00000020U; R_SCE_func319(208); - R_SCE_func100(0x3c2dd259U, 0x4ac8966aU, 0x27321effU, 0x915b8750U); + R_SCE_func100(0x5fd23420U, 0x31d8cb19U, 0x253a683bU, 0x2e50909dU); R_SCE_func314(208+32); SCE->REG_ECH = 0x0000d260U; - R_SCE_func101(0x406287bdU, 0x8532f418U, 0xd7387695U, 0x41798135U); + R_SCE_func101(0xaf15ab61U, 0xd69547d4U, 0x1b1dfc32U, 0x1f03a066U); } SCE->REG_ECH = 0x01816e94U; R_SCE_func101(0x359452aaU, 0x98453f58U, 0x1fd0e35dU, 0x137f3a69U); @@ -706,8 +706,8 @@ void R_SCE_func325(void) R_SCE_func100(0x88f4a784U, 0x630c5a7aU, 0x26cbe993U, 0xf47e6630U); R_SCE_func314(580+32); SCE->REG_ECH = 0x0000b7a0U; - SCE->REG_ECH = 0x000000f2U; - R_SCE_func101(0x655c5497U, 0xae524564U, 0x2b01826cU, 0x6a8cb6a5U); + SCE->REG_ECH = 0x000000f6U; + R_SCE_func101(0xaa073ed7U, 0x47dc9a56U, 0xc4576573U, 0xa0389521U); R_SCE_func318(); SCE->REG_ECH = 0x0000b7c0U; SCE->REG_ECH = 0x00000000U; @@ -717,5 +717,5 @@ void R_SCE_func325(void) } /*********************************************************************************************************************** -End of function ./input_dir/S6C1/Cryptographic/R_SCE_func325.prc +End of function ./input_dir/S6C1/Cryptographic/R_SCE_func325_r1.prc ***********************************************************************************************************************/ diff --git a/ra/fsp/src/r_sce_protected/crypto_procedures_protected/src/sce9/primitive/r_sce_p5d.c b/ra/fsp/src/r_sce_protected/crypto_procedures_protected/src/sce9/primitive/r_sce_p5d.c index 4ffe3d469..1e56e6b0b 100644 --- a/ra/fsp/src/r_sce_protected/crypto_procedures_protected/src/sce9/primitive/r_sce_p5d.c +++ b/ra/fsp/src/r_sce_protected/crypto_procedures_protected/src/sce9/primitive/r_sce_p5d.c @@ -339,8 +339,8 @@ fsp_err_t R_SCE_DlmsCosemCalculateKekSub(uint32_t *InData_KeyIndexType, uint32_t { /* waiting */ } - SCE->REG_100H = change_endian_long(0x0000005dU); - R_SCE_func101(0xd3b63ebaU, 0xdf40eb06U, 0x5ccf9b8eU, 0x18586887U); + SCE->REG_100H = change_endian_long(0x00000014U); + R_SCE_func101(0x21bd3ba3U, 0xace59435U, 0x2144095fU, 0xcbed6a94U); R_SCE_func044(); SCE->REG_104H = 0x00000762U; SCE->REG_D0H = 0x40000100U; @@ -391,14 +391,14 @@ fsp_err_t R_SCE_DlmsCosemCalculateKekSub(uint32_t *InData_KeyIndexType, uint32_t /* waiting */ } SCE->REG_1CH = 0x00001800U; - R_SCE_func100(0x0bd04d21U, 0xf801c559U, 0x95c29e91U, 0x8eb78d6aU); + R_SCE_func100(0x6ef83b2eU, 0xdff7fc1eU, 0x626672f8U, 0x06755467U); SCE->REG_1CH = 0x00400000U; SCE->REG_1D0H = 0x00000000U; if (1U == (SCE->REG_1CH_b.B22)) { SCE->REG_ECH = 0x0000b780U; SCE->REG_ECH = 0x00000001U; - R_SCE_func101(0x95c00417U, 0x3e17da91U, 0xd4e707f5U, 0x507b8334U); + R_SCE_func101(0x257e9a39U, 0xa8410bdaU, 0xa184d788U, 0xec6ce470U); } else { @@ -534,7 +534,7 @@ fsp_err_t R_SCE_DlmsCosemCalculateKekSub(uint32_t *InData_KeyIndexType, uint32_t } SCE->REG_74H = 0x00000000U; SCE->REG_1CH = 0x00001600U; - R_SCE_func101(0xf99572cfU, 0x5ac43682U, 0x4fb9fccbU, 0xf028997eU); + R_SCE_func101(0xd45fbaa4U, 0xd6b6a7dbU, 0xcb09a1fbU, 0x26188556U); } } SCE->REG_ECH = 0x38000f9cU; @@ -756,5 +756,5 @@ fsp_err_t R_SCE_DlmsCosemCalculateKekSub(uint32_t *InData_KeyIndexType, uint32_t } /*********************************************************************************************************************** -End of function ./input_dir/S6C1/Cryptographic/R_SCE_p5d_r2.prc +End of function ./input_dir/S6C1/Cryptographic/R_SCE_p5d_r3.prc ***********************************************************************************************************************/ diff --git a/ra/fsp/src/r_sce_protected/crypto_procedures_protected/src/sce9/primitive/r_sce_p79.c b/ra/fsp/src/r_sce_protected/crypto_procedures_protected/src/sce9/primitive/r_sce_p79.c index bb89f793f..681282c75 100644 --- a/ra/fsp/src/r_sce_protected/crypto_procedures_protected/src/sce9/primitive/r_sce_p79.c +++ b/ra/fsp/src/r_sce_protected/crypto_procedures_protected/src/sce9/primitive/r_sce_p79.c @@ -710,9 +710,9 @@ fsp_err_t R_SCE_Rsa3072ModularExponentEncryptSub(uint32_t *InData_KeyIndex, uint SCE->REG_ECH = 0x0000b7a0U; SCE->REG_ECH = 0x00000079U; R_SCE_func101(0xf53c859fU, 0x88e5bcc8U, 0x4a2d21a2U, 0xb21edb0aU); - R_SCE_func325(); + R_SCE_func325_r1(); SCE->REG_28H = 0x009f0001U; - R_SCE_func100(0xbb65f7f3U, 0xd08c83a1U, 0x3a33f9eaU, 0x28c13174U); + R_SCE_func100(0xa2e7d0afU, 0xbd515886U, 0x04c2396aU, 0xf20f30eaU); SCE->REG_2CH = 0x00000020U; SCE->REG_04H = 0x00000382U; /* WAIT_LOOP */ @@ -753,7 +753,7 @@ fsp_err_t R_SCE_Rsa3072ModularExponentEncryptSub(uint32_t *InData_KeyIndex, uint OutData_Text[30] = SCE->REG_100H; OutData_Text[31] = SCE->REG_100H; SCE->REG_28H = 0x00bf0001U; - R_SCE_func100(0x3832473fU, 0x9f8a2731U, 0x2b7f0621U, 0x044e8a0dU); + R_SCE_func100(0xdebd9710U, 0x790c4a14U, 0x530cf67fU, 0x69c3affaU); SCE->REG_2CH = 0x00000022U; SCE->REG_04H = 0x00000302U; /* WAIT_LOOP */ @@ -825,7 +825,7 @@ fsp_err_t R_SCE_Rsa3072ModularExponentEncryptSub(uint32_t *InData_KeyIndex, uint OutData_Text[93] = SCE->REG_100H; OutData_Text[94] = SCE->REG_100H; OutData_Text[95] = SCE->REG_100H; - R_SCE_func102(0x150da20dU, 0xa1749a49U, 0x21ab47b6U, 0x7af769c3U); + R_SCE_func102(0x49e2f88cU, 0x05b4f64eU, 0xec164a7bU, 0x0f11324eU); SCE->REG_1B8H = 0x00000040U; /* WAIT_LOOP */ while (0U != SCE->REG_18H_b.B12) @@ -838,5 +838,5 @@ fsp_err_t R_SCE_Rsa3072ModularExponentEncryptSub(uint32_t *InData_KeyIndex, uint } /*********************************************************************************************************************** -End of function ./input_dir/S6C1/Cryptographic/R_SCE_p79_r2.prc +End of function ./input_dir/S6C1/Cryptographic/R_SCE_p79_r3.prc ***********************************************************************************************************************/ diff --git a/ra/fsp/src/r_sce_protected/crypto_procedures_protected/src/sce9/primitive/r_sce_p7b.c b/ra/fsp/src/r_sce_protected/crypto_procedures_protected/src/sce9/primitive/r_sce_p7b.c index 051fd3d48..35edefbe6 100644 --- a/ra/fsp/src/r_sce_protected/crypto_procedures_protected/src/sce9/primitive/r_sce_p7b.c +++ b/ra/fsp/src/r_sce_protected/crypto_procedures_protected/src/sce9/primitive/r_sce_p7b.c @@ -636,7 +636,7 @@ fsp_err_t R_SCE_Rsa4096ModularExponentEncryptSub(const uint32_t *InData_KeyIndex SCE->REG_ECH = 0x0000b400U; SCE->REG_ECH = 0x0000007bU; R_SCE_func101(0x6d2f8001U, 0x84e44900U, 0xefad9bb2U, 0x7eae5acdU); - R_SCE_func307(); + R_SCE_func307_r1(); R_SCE_func100(0xc9dbdeffU, 0x9dc1302aU, 0x9293827eU, 0xa2d5d039U); SCE->REG_2CH = 0x00000020U; SCE->REG_04H = 0x00000302U; @@ -794,5 +794,5 @@ fsp_err_t R_SCE_Rsa4096ModularExponentEncryptSub(const uint32_t *InData_KeyIndex } /*********************************************************************************************************************** -End of function ./input_dir/S6C1/Cryptographic/R_SCE_p7b_r2.prc +End of function ./input_dir/S6C1/Cryptographic/R_SCE_p7b_r3.prc ***********************************************************************************************************************/ diff --git a/ra/fsp/src/r_sce_protected/crypto_procedures_protected/src/sce9/primitive/r_sce_p82.c b/ra/fsp/src/r_sce_protected/crypto_procedures_protected/src/sce9/primitive/r_sce_p82.c index 4636cbcec..6ad1979d0 100644 --- a/ra/fsp/src/r_sce_protected/crypto_procedures_protected/src/sce9/primitive/r_sce_p82.c +++ b/ra/fsp/src/r_sce_protected/crypto_procedures_protected/src/sce9/primitive/r_sce_p82.c @@ -378,10 +378,10 @@ fsp_err_t R_SCE_SelfCheck2Sub(void) { /* waiting */ } - S_RAM[20] = change_endian_long(SCE->REG_100H); - S_RAM[21] = change_endian_long(SCE->REG_100H); - S_RAM[22] = change_endian_long(SCE->REG_100H); - S_RAM[23] = change_endian_long(SCE->REG_100H); + S_RAM[20] = SCE->REG_100H; + S_RAM[21] = SCE->REG_100H; + S_RAM[22] = SCE->REG_100H; + S_RAM[23] = SCE->REG_100H; SCE->REG_13CH = 0x00000202U; R_SCE_func102(0x1d57682dU, 0xfd419ecbU, 0xe66c4158U, 0x102b1470U); SCE->REG_1BCH = 0x00000040U; diff --git a/ra/fsp/src/r_sce_protected/crypto_procedures_protected/src/sce9/primitive/r_sce_pa1i.c b/ra/fsp/src/r_sce_protected/crypto_procedures_protected/src/sce9/primitive/r_sce_pa1i.c index 343978fb5..35fba798a 100644 --- a/ra/fsp/src/r_sce_protected/crypto_procedures_protected/src/sce9/primitive/r_sce_pa1i.c +++ b/ra/fsp/src/r_sce_protected/crypto_procedures_protected/src/sce9/primitive/r_sce_pa1i.c @@ -165,12 +165,12 @@ fsp_err_t R_SCE_Aes256CcmEncryptInitSub(uint32_t *InData_KeyType, uint32_t *InDa { /* waiting */ } - SCE->REG_100H = change_endian_long(0x00000041U); - R_SCE_func101(0xcbac6198U, 0x8ebbe462U, 0xcedd92ffU, 0x4aa67becU); + SCE->REG_100H = change_endian_long(0x000000a1U); + R_SCE_func101(0x3c04eaf7U, 0xfc9bc703U, 0xf1b9b14aU, 0x850bdd81U); R_SCE_func068(); SCE->REG_ECH = 0x0000b4e0U; SCE->REG_ECH = 0x85d04999U; - R_SCE_func101(0xbd5fb9a7U, 0xdda0e121U, 0x9cdf3d11U, 0x428c52f0U); + R_SCE_func101(0xc1c43a08U, 0x0d921fc5U, 0xdd7cab74U, 0x7095efa7U); } SCE->REG_104H = 0x00000058U; SCE->REG_E0H = 0x800103a0U; @@ -331,5 +331,5 @@ fsp_err_t R_SCE_Aes256CcmEncryptInitSub(uint32_t *InData_KeyType, uint32_t *InDa } /*********************************************************************************************************************** -End of function ./input_dir/S6C1/Cryptographic/R_SCE_pa1i_r1.prc +End of function ./input_dir/S6C1/Cryptographic/R_SCE_pa1i_r2.prc ***********************************************************************************************************************/ diff --git a/ra/fsp/src/r_sce_protected/crypto_procedures_protected/src/sce9/primitive/r_sce_pe1.c b/ra/fsp/src/r_sce_protected/crypto_procedures_protected/src/sce9/primitive/r_sce_pe1.c index d69d8ecea..13af96d6b 100644 --- a/ra/fsp/src/r_sce_protected/crypto_procedures_protected/src/sce9/primitive/r_sce_pe1.c +++ b/ra/fsp/src/r_sce_protected/crypto_procedures_protected/src/sce9/primitive/r_sce_pe1.c @@ -1680,10 +1680,10 @@ fsp_err_t R_SCE_TlsCertificateVerificationSub(uint32_t *InData_Sel_PubKeyType, u { /* waiting */ } - SCE->REG_100H = change_endian_long(0x00000032U); - R_SCE_func101(0x4760d501U, 0x6b43073cU, 0xee8dcf28U, 0xd45cfbc6U); + SCE->REG_100H = change_endian_long(0x00000020U); + R_SCE_func101(0x5bd5fab7U, 0xeb5a38c5U, 0x80588e35U, 0x68f7839cU); R_SCE_func059(); - R_SCE_func100(0x535465c0U, 0x9e2f5419U, 0xc0fe56c9U, 0xa1fac8f0U); + R_SCE_func100(0xb3222b07U, 0x1a52c9a6U, 0xe0c5fb33U, 0xed989deeU); SCE->REG_00H = 0x00002343U; SCE->REG_2CH = 0x00000020U; SCE->REG_D0H = 0x40000300U; @@ -1707,7 +1707,7 @@ fsp_err_t R_SCE_TlsCertificateVerificationSub(uint32_t *InData_Sel_PubKeyType, u /* waiting */ } SCE->REG_1CH = 0x00001800U; - R_SCE_func100(0x513c1e16U, 0xfac98e31U, 0xf6689673U, 0x6a120cb0U); + R_SCE_func100(0x596ef83eU, 0x91ba2375U, 0xcc25c61cU, 0x73d04be2U); SCE->REG_104H = 0x00000052U; SCE->REG_C4H = 0x00000c84U; /* WAIT_LOOP */ @@ -1735,7 +1735,7 @@ fsp_err_t R_SCE_TlsCertificateVerificationSub(uint32_t *InData_Sel_PubKeyType, u OutData_PubKey[iLoop + 1] = SCE->REG_100H; OutData_PubKey[iLoop + 2] = SCE->REG_100H; OutData_PubKey[iLoop + 3] = SCE->REG_100H; - R_SCE_func100(0xc464e8c7U, 0xb500ad01U, 0xde08bb5cU, 0xe30e1e33U); + R_SCE_func100(0xb4dbcc80U, 0xe818c300U, 0x5d8f4fcaU, 0x7ef22a85U); SCE->REG_E0H = 0x81040000U; SCE->REG_04H = 0x00000612U; /* WAIT_LOOP */ @@ -1762,7 +1762,7 @@ fsp_err_t R_SCE_TlsCertificateVerificationSub(uint32_t *InData_Sel_PubKeyType, u /* waiting */ } OutData_PubKey[3] = SCE->REG_100H; - R_SCE_func102(0xf7df9bd1U, 0x002f88b6U, 0x618e9838U, 0x5b36a4fcU); + R_SCE_func102(0x90855fa8U, 0xe3f70507U, 0xd9811172U, 0x4b728c9dU); SCE->REG_1B8H = 0x00000040U; /* WAIT_LOOP */ while (0U != SCE->REG_18H_b.B12) @@ -1780,5 +1780,5 @@ fsp_err_t R_SCE_TlsCertificateVerificationSub(uint32_t *InData_Sel_PubKeyType, u } /*********************************************************************************************************************** -End of function ./input_dir/S6C1/Cryptographic/R_SCE_pe1_r2.prc +End of function ./input_dir/S6C1/Cryptographic/R_SCE_pe1_r3.prc ***********************************************************************************************************************/ diff --git a/ra/fsp/src/r_sce_protected/crypto_procedures_protected/src/sce9/primitive/r_sce_pe5.c b/ra/fsp/src/r_sce_protected/crypto_procedures_protected/src/sce9/primitive/r_sce_pe5.c index be7b495ec..ae8b2b306 100644 --- a/ra/fsp/src/r_sce_protected/crypto_procedures_protected/src/sce9/primitive/r_sce_pe5.c +++ b/ra/fsp/src/r_sce_protected/crypto_procedures_protected/src/sce9/primitive/r_sce_pe5.c @@ -2124,10 +2124,10 @@ fsp_err_t R_SCE_TlsGenerateSessionKeySub(uint32_t *InData_Sel_CipherSuite, uint3 { /* waiting */ } - SCE->REG_100H = change_endian_long(0x00000047U); - R_SCE_func101(0x391f2b72U, 0x604c828eU, 0xf02151fcU, 0xb6f57c6eU); + SCE->REG_100H = change_endian_long(0x00000021U); + R_SCE_func101(0x4a7d177eU, 0x10298af1U, 0xe458f86fU, 0x9b69d476U); R_SCE_func059(); - R_SCE_func100(0x6a995976U, 0x1e17ac48U, 0xa362ceaeU, 0x2b99a636U); + R_SCE_func100(0x01db4253U, 0xb764e5afU, 0x8f022087U, 0x097eb48dU); SCE->REG_D0H = 0x40000100U; SCE->REG_C4H = 0x02e087b7U; SCE->REG_00H = 0x00002323U; @@ -2157,7 +2157,7 @@ fsp_err_t R_SCE_TlsGenerateSessionKeySub(uint32_t *InData_Sel_CipherSuite, uint3 OutData_ClientMACKeyOperationCode[9] = SCE->REG_100H; OutData_ClientMACKeyOperationCode[10] = SCE->REG_100H; OutData_ClientMACKeyOperationCode[11] = SCE->REG_100H; - R_SCE_func100(0x2528ed6aU, 0xee5508efU, 0x041256d4U, 0x135e931bU); + R_SCE_func100(0x39ce140cU, 0x8fee909aU, 0x6bc1034eU, 0xd7025579U); SCE->REG_104H = 0x00000052U; SCE->REG_C4H = 0x00000c84U; /* WAIT_LOOP */ @@ -2185,7 +2185,7 @@ fsp_err_t R_SCE_TlsGenerateSessionKeySub(uint32_t *InData_Sel_CipherSuite, uint3 OutData_ClientMACKeyOperationCode[13] = SCE->REG_100H; OutData_ClientMACKeyOperationCode[14] = SCE->REG_100H; OutData_ClientMACKeyOperationCode[15] = SCE->REG_100H; - R_SCE_func100(0x2611fb28U, 0x7120c9b9U, 0x3ff28142U, 0x5ab80dc5U); + R_SCE_func100(0x9f885f43U, 0x631a0a16U, 0x008b60c1U, 0xfcd16548U); SCE->REG_E0H = 0x81040040U; SCE->REG_04H = 0x00000612U; /* WAIT_LOOP */ @@ -2212,7 +2212,7 @@ fsp_err_t R_SCE_TlsGenerateSessionKeySub(uint32_t *InData_Sel_CipherSuite, uint3 /* waiting */ } OutData_ClientMACKeyOperationCode[3] = SCE->REG_100H; - R_SCE_func100(0x2ad1ea05U, 0xfeb9daccU, 0xfa7d8258U, 0x313d7b50U); + R_SCE_func100(0x772d5fe5U, 0x00d1bd61U, 0x5e123603U, 0x75cba3f1U); SCE->REG_104H = 0x00000058U; SCE->REG_E0H = 0x80010040U; /* WAIT_LOOP */ @@ -2257,7 +2257,7 @@ fsp_err_t R_SCE_TlsGenerateSessionKeySub(uint32_t *InData_Sel_CipherSuite, uint3 /* waiting */ } SCE->REG_100H = change_endian_long(0x00000048U); - R_SCE_func101(0xa052679eU, 0xc9463cadU, 0x7a7723c0U, 0x571da606U); + R_SCE_func101(0x07a7255fU, 0x1aea69bbU, 0x8640ceccU, 0x986ee422U); R_SCE_func059(); R_SCE_func100(0xe4a6b9e8U, 0x2a75331eU, 0x381cf253U, 0xc5fcdda5U); SCE->REG_D0H = 0x40000100U; @@ -2518,10 +2518,10 @@ fsp_err_t R_SCE_TlsGenerateSessionKeySub(uint32_t *InData_Sel_CipherSuite, uint3 { /* waiting */ } - SCE->REG_100H = change_endian_long(0x00000050U); - R_SCE_func101(0xbd549649U, 0x68718587U, 0xd9dee92dU, 0x6d7b4a07U); + SCE->REG_100H = change_endian_long(0x00000026U); + R_SCE_func101(0x40f3b61dU, 0x2e645724U, 0xcd2ad425U, 0x0837effcU); R_SCE_func059(); - R_SCE_func100(0x76cda59bU, 0xa9d4ec46U, 0xed7c6ddcU, 0x29ae654aU); + R_SCE_func100(0x0e96be0eU, 0xc535cd0dU, 0x9b19720cU, 0x45fcc98aU); SCE->REG_D0H = 0x40000100U; SCE->REG_C4H = 0x02e087b7U; SCE->REG_00H = 0x00002323U; @@ -2550,7 +2550,7 @@ fsp_err_t R_SCE_TlsGenerateSessionKeySub(uint32_t *InData_Sel_CipherSuite, uint3 OutData_ServerEncKeyOperationCode[9] = SCE->REG_100H; OutData_ServerEncKeyOperationCode[10] = SCE->REG_100H; OutData_ServerEncKeyOperationCode[11] = SCE->REG_100H; - R_SCE_func100(0xd8a6c459U, 0x9f202e30U, 0x90d41d36U, 0xc37f6af4U); + R_SCE_func100(0xe6e8a154U, 0x9ac149b6U, 0x97fb6450U, 0x18d20914U); SCE->REG_104H = 0x00000052U; SCE->REG_C4H = 0x00000c84U; /* WAIT_LOOP */ @@ -2578,7 +2578,7 @@ fsp_err_t R_SCE_TlsGenerateSessionKeySub(uint32_t *InData_Sel_CipherSuite, uint3 OutData_ServerEncKeyOperationCode[13] = SCE->REG_100H; OutData_ServerEncKeyOperationCode[14] = SCE->REG_100H; OutData_ServerEncKeyOperationCode[15] = SCE->REG_100H; - R_SCE_func100(0xaa972a2dU, 0x4cdd43a0U, 0x3d4924e7U, 0xf0394f8cU); + R_SCE_func100(0x135cf8e9U, 0x22e34a6fU, 0xd538c9b6U, 0x8860e6fdU); SCE->REG_E0H = 0x81040040U; SCE->REG_04H = 0x00000612U; /* WAIT_LOOP */ @@ -2605,7 +2605,7 @@ fsp_err_t R_SCE_TlsGenerateSessionKeySub(uint32_t *InData_Sel_CipherSuite, uint3 /* waiting */ } OutData_ServerEncKeyOperationCode[3] = SCE->REG_100H; - R_SCE_func101(0xdda209e2U, 0xb9558724U, 0x765e3d19U, 0x7dd04af1U); + R_SCE_func101(0xb8a02f80U, 0x6869578bU, 0x0d019f50U, 0x0a081d23U); } else if (0x06000000U == (SCE->REG_1CH & 0xff000000U)) { @@ -3004,5 +3004,5 @@ fsp_err_t R_SCE_TlsGenerateSessionKeySub(uint32_t *InData_Sel_CipherSuite, uint3 } /*********************************************************************************************************************** -End of function ./input_dir/S6C1/Cryptographic/R_SCE_pe5_r2.prc +End of function ./input_dir/S6C1/Cryptographic/R_SCE_pe5_r3.prc ***********************************************************************************************************************/ diff --git a/ra/fsp/src/r_sce_protected/crypto_procedures_protected/src/sce9/private/inc/r_sce_private.h b/ra/fsp/src/r_sce_protected/crypto_procedures_protected/src/sce9/private/inc/r_sce_private.h index 0752bffde..6dd7e0b74 100644 --- a/ra/fsp/src/r_sce_protected/crypto_procedures_protected/src/sce9/private/inc/r_sce_private.h +++ b/ra/fsp/src/r_sce_protected/crypto_procedures_protected/src/sce9/private/inc/r_sce_private.h @@ -780,13 +780,13 @@ void R_SCE_func300(void); void R_SCE_func301(void); void R_SCE_func302(void); void R_SCE_func303(void); -void R_SCE_func304(void); +void R_SCE_func304_r1(void); void R_SCE_func305(void); -void R_SCE_func307(void); +void R_SCE_func307_r1(void); void R_SCE_func308(void); -void R_SCE_func309(void); +void R_SCE_func309_r1(void); void R_SCE_func310(void); -void R_SCE_func311(void); +void R_SCE_func311_r1(void); void R_SCE_func312(uint32_t ARG1); void R_SCE_func313(uint32_t ARG1); void R_SCE_func314(uint32_t ARG1); @@ -800,7 +800,7 @@ void R_SCE_func321(uint32_t ARG1); void R_SCE_func322(uint32_t ARG1); void R_SCE_func323(void); void R_SCE_func324(void); -void R_SCE_func325(void); +void R_SCE_func325_r1(void); uint32_t change_endian_long(uint32_t data); diff --git a/ra/fsp/src/r_sci_b_i2c/r_sci_b_i2c.c b/ra/fsp/src/r_sci_b_i2c/r_sci_b_i2c.c index cc43fc607..77649bc37 100644 --- a/ra/fsp/src/r_sci_b_i2c/r_sci_b_i2c.c +++ b/ra/fsp/src/r_sci_b_i2c/r_sci_b_i2c.c @@ -176,14 +176,15 @@ i2c_master_api_t const g_i2c_master_on_sci_b = /******************************************************************************************************************//** * Opens the I2C device. * - * @retval FSP_SUCCESS Requested clock rate was set exactly. - * @retval FSP_ERR_ALREADY_OPEN Module is already open. - * @retval FSP_ERR_ASSERTION Parameter check failure due to one or more reasons below: - * 1. p_api_ctrl or p_cfg is NULL. - * 2. extended parameter is NULL. - * 3. Callback parameter is NULL. - * 4. Clock rate requested is greater than 400KHz - * 5. Invalid IRQ number assigned + * @retval FSP_SUCCESS Requested clock rate was set exactly. + * @retval FSP_ERR_ALREADY_OPEN Module is already open. + * @retval FSP_ERR_IP_CHANNEL_NOT_PRESENT Channel is not available on this MCU. + * @retval FSP_ERR_ASSERTION Parameter check failure due to one or more reasons below: + * 1. p_api_ctrl or p_cfg is NULL. + * 2. extended parameter is NULL. + * 3. Callback parameter is NULL. + * 4. Clock rate requested is greater than 400KHz + * 5. Invalid IRQ number assigned **********************************************************************************************************************/ fsp_err_t R_SCI_B_I2C_Open (i2c_master_ctrl_t * const p_api_ctrl, i2c_master_cfg_t const * const p_cfg) { @@ -196,6 +197,8 @@ fsp_err_t R_SCI_B_I2C_Open (i2c_master_ctrl_t * const p_api_ctrl, i2c_master_cfg FSP_ASSERT(p_cfg->txi_irq >= (IRQn_Type) 0); FSP_ASSERT(p_cfg->tei_irq >= (IRQn_Type) 0); FSP_ERROR_RETURN(SCI_B_I2C_OPEN != p_ctrl->open, FSP_ERR_ALREADY_OPEN); + FSP_ERROR_RETURN((p_cfg->channel < 8 * sizeof(unsigned int)) && (BSP_FEATURE_SCI_CHANNELS & (1U << p_cfg->channel)), + FSP_ERR_IP_CHANNEL_NOT_PRESENT); sci_b_i2c_extended_cfg_t * pextend = (sci_b_i2c_extended_cfg_t *) p_cfg->p_extend; if (true == pextend->clock_settings.bitrate_modulation) { diff --git a/ra/fsp/src/r_sci_b_spi/r_sci_b_spi.c b/ra/fsp/src/r_sci_b_spi/r_sci_b_spi.c index e0ab938d2..25ff09b11 100644 --- a/ra/fsp/src/r_sci_b_spi/r_sci_b_spi.c +++ b/ra/fsp/src/r_sci_b_spi/r_sci_b_spi.c @@ -500,7 +500,9 @@ static void r_sci_b_spi_hw_config (sci_b_spi_instance_ctrl_t * const p_ctrl) uint32_t ccr2 = 0U; uint32_t ccr3 = R_SCI_B0_CCR3_CPHA_Msk | R_SCI_B0_CCR3_CPOL_Msk | R_SCI_B0_CCR3_LSBF_Msk | SCI_B_SPI_PRV_CHR_RST_VALUE; - uint32_t ccr4 = 0U; + + /* CCR4.SCKSEL selects the master receive clock used in simple spi mode on supported MCUs. */ + uint32_t ccr4 = (BSP_FEATURE_SCI_SPI_SCKSEL_VALUE << R_SCI_B0_CCR4_SCKSEL_Pos); uint32_t cfclr = 0U; uint32_t ffclr = 0U; diff --git a/ra/fsp/src/r_sci_b_uart/r_sci_b_uart.c b/ra/fsp/src/r_sci_b_uart/r_sci_b_uart.c index 925c4378a..8b6b7187e 100644 --- a/ra/fsp/src/r_sci_b_uart/r_sci_b_uart.c +++ b/ra/fsp/src/r_sci_b_uart/r_sci_b_uart.c @@ -966,7 +966,11 @@ fsp_err_t R_SCI_B_UART_BaudCalculate (uint32_t baudrate, uint32_t hit_mddr = 0U; uint32_t divisor = 0U; +#if (BSP_FEATURE_BSP_HAS_SCISPI_CLOCK) uint32_t freq_hz = R_FSP_SciSpiClockHzGet(); +#else + uint32_t freq_hz = R_FSP_SciClockHzGet(); +#endif for (uint32_t select_16_base_clk_cycles = 0U; select_16_base_clk_cycles <= 1U && (hit_bit_err > ((int32_t) baud_rate_error_x_1000)); diff --git a/ra/fsp/src/r_sci_i2c/r_sci_i2c.c b/ra/fsp/src/r_sci_i2c/r_sci_i2c.c index 1e08a0a17..4e3583b08 100644 --- a/ra/fsp/src/r_sci_i2c/r_sci_i2c.c +++ b/ra/fsp/src/r_sci_i2c/r_sci_i2c.c @@ -192,14 +192,15 @@ i2c_master_api_t const g_i2c_master_on_sci = /******************************************************************************************************************//** * Opens the I2C device. * - * @retval FSP_SUCCESS Requested clock rate was set exactly. - * @retval FSP_ERR_ALREADY_OPEN Module is already open. - * @retval FSP_ERR_ASSERTION Parameter check failure due to one or more reasons below: - * 1. p_api_ctrl or p_cfg is NULL. - * 2. extended parameter is NULL. - * 3. Callback parameter is NULL. - * 4. Clock rate requested is greater than 400KHz - * 5. Invalid IRQ number assigned + * @retval FSP_SUCCESS Requested clock rate was set exactly. + * @retval FSP_ERR_ALREADY_OPEN Module is already open. + * @retval FSP_ERR_IP_CHANNEL_NOT_PRESENT Channel is not available on this MCU. + * @retval FSP_ERR_ASSERTION Parameter check failure due to one or more reasons below: + * 1. p_api_ctrl or p_cfg is NULL. + * 2. extended parameter is NULL. + * 3. Callback parameter is NULL. + * 4. Clock rate requested is greater than 400KHz + * 5. Invalid IRQ number assigned **********************************************************************************************************************/ fsp_err_t R_SCI_I2C_Open (i2c_master_ctrl_t * const p_api_ctrl, i2c_master_cfg_t const * const p_cfg) { @@ -212,6 +213,8 @@ fsp_err_t R_SCI_I2C_Open (i2c_master_ctrl_t * const p_api_ctrl, i2c_master_cfg_t FSP_ASSERT(p_cfg->txi_irq >= (IRQn_Type) 0); FSP_ASSERT(p_cfg->tei_irq >= (IRQn_Type) 0); FSP_ERROR_RETURN(SCI_I2C_OPEN != p_ctrl->open, FSP_ERR_ALREADY_OPEN); + FSP_ERROR_RETURN((p_cfg->channel < 8 * sizeof(unsigned int)) && (BSP_FEATURE_SCI_CHANNELS & (1U << p_cfg->channel)), + FSP_ERR_IP_CHANNEL_NOT_PRESENT); sci_i2c_extended_cfg_t * pextend = (sci_i2c_extended_cfg_t *) p_cfg->p_extend; if (true == pextend->clock_settings.bitrate_modulation) { diff --git a/ra/fsp/src/r_sci_smci/r_sci_smci.c b/ra/fsp/src/r_sci_smci/r_sci_smci.c new file mode 100644 index 000000000..ddb241886 --- /dev/null +++ b/ra/fsp/src/r_sci_smci/r_sci_smci.c @@ -0,0 +1,1203 @@ +/*********************************************************************************************************************** + * Copyright [2020-2023] Renesas Electronics Corporation and/or its affiliates. All Rights Reserved. + * + * This software and documentation are supplied by Renesas Electronics America Inc. and may only be used with products + * of Renesas Electronics Corp. and its affiliates ("Renesas"). No other uses are authorized. Renesas products are + * sold pursuant to Renesas terms and conditions of sale. Purchasers are solely responsible for the selection and use + * of Renesas products and Renesas assumes no liability. No license, express or implied, to any intellectual property + * right is granted by Renesas. This software is protected under all applicable laws, including copyright laws. Renesas + * reserves the right to change or discontinue this software and/or this documentation. THE SOFTWARE AND DOCUMENTATION + * IS DELIVERED TO YOU "AS IS," AND RENESAS MAKES NO REPRESENTATIONS OR WARRANTIES, AND TO THE FULLEST EXTENT + * PERMISSIBLE UNDER APPLICABLE LAW, DISCLAIMS ALL WARRANTIES, WHETHER EXPLICITLY OR IMPLICITLY, INCLUDING WARRANTIES + * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, AND NONINFRINGEMENT, WITH RESPECT TO THE SOFTWARE OR + * DOCUMENTATION. RENESAS SHALL HAVE NO LIABILITY ARISING OUT OF ANY SECURITY VULNERABILITY OR BREACH. TO THE MAXIMUM + * EXTENT PERMITTED BY LAW, IN NO EVENT WILL RENESAS BE LIABLE TO YOU IN CONNECTION WITH THE SOFTWARE OR DOCUMENTATION + * (OR ANY PERSON OR ENTITY CLAIMING RIGHTS DERIVED FROM YOU) FOR ANY LOSS, DAMAGES, OR CLAIMS WHATSOEVER, INCLUDING, + * WITHOUT LIMITATION, ANY DIRECT, CONSEQUENTIAL, SPECIAL, INDIRECT, PUNITIVE, OR INCIDENTAL DAMAGES; ANY LOST PROFITS, + * OTHER ECONOMIC DAMAGE, PROPERTY DAMAGE, OR PERSONAL INJURY; AND EVEN IF RENESAS HAS BEEN ADVISED OF THE POSSIBILITY + * OF SUCH LOSS, DAMAGES, CLAIMS OR COSTS. + **********************************************************************************************************************/ + +/*********************************************************************************************************************** + * Includes + **********************************************************************************************************************/ +#include "bsp_api.h" +#include "r_sci_smci.h" + +/*********************************************************************************************************************** + * Macro definitions + **********************************************************************************************************************/ + +/* "SMCI" in ASCII. Used to determine if the control block is open. */ +#define SCI_SMCI_OPEN (0x534D4349U) /*literal ascii 'SMCI'*/ + +#define SCI_SMCI_SCI_REG_SIZE (R_SCI1_BASE - R_SCI0_BASE) + +/* The bit rate register is 8-bits, so the maximum value is 255. */ +#define SCI_SMCI_BRR_MAX (255U) + +/* Number of divisors in input clock calculation. */ +#define SCI_SMCI_NUM_DIVISORS (4U) + +#define SCI_SMCI_SSR_ERR_MASK (R_SCI0_SSR_SMCI_PER_Msk | R_SCI0_SSR_SMCI_ERS_Msk | \ + R_SCI0_SSR_SMCI_ORER_Msk) + +#define SCI_SMCI_100_PERCENT_X_1000 (100000) + +#define SCI_SMCI_MAX_BAUD_RATE_ERROR_X_1000 (20000) /* 20 percent Error */ + +#define SCI_SMCI_S_LOOKUP_TABLE_ENTRIES (8) +#define SCI_SMCI_CKS_MASK (0x03) /* only two bits*/ + +/*********************************************************************************************************************** + * Private constants + **********************************************************************************************************************/ + +/*********************************************************************************************************************** + * Typedef definitions + **********************************************************************************************************************/ +typedef struct st_sci_smci_bcp_setting_const_t +{ + uint8_t smr_smci_bcp01 : 2; + uint8_t scmr_bcp2 : 1; + uint16_t bit_clock_conversion_number_s; /* number of base clock cycles S in a 1-bit data transfer, + * referred to as S in HW Manual*/ +} sci_smci_bcp_setting_const_t; + +typedef struct st_sci_smci_ffmax_lut_const_t +{ + uint16_t f_value; + uint32_t freq_max; +} sci_smci_ffmax_lut_const_t; + +typedef enum e_smci_clock_conversion_ratio_s +{ + SMCI_CLOCK_CONVERSION_RATIO_32 = 0U, ///< 32 base clock cycles for 1-bit period + SMCI_CLOCK_CONVERSION_RATIO_64 = 1U, ///< 64 base clock cycles for 1-bit period + SMCI_CLOCK_CONVERSION_RATIO_93 = 2U, ///< 93 base clock cycles for 1-bit period + SMCI_CLOCK_CONVERSION_RATIO_128 = 3U, ///< 128 base clock cycles for 1-bit period + SMCI_CLOCK_CONVERSION_RATIO_186 = 4U, ///< 186 base clock cycles for 1-bit period + SMCI_CLOCK_CONVERSION_RATIO_256 = 5U, ///< 256 base clock cycles for 1-bit period + SMCI_CLOCK_CONVERSION_RATIO_372 = 6U, ///< 372 base clock cycles for 1-bit period + SMCI_CLOCK_CONVERSION_RATIO_512 = 7U, ///< 512 base clock cycles for 1-bit period + SMCI_CLOCK_CONVERSION_RATIO_UNSUPPORTED = 8U, ///< Unsupported Clock Cycles +} smci_clock_conversion_ratio_s_t; + +/*********************************************************************************************************************** + * Private function prototypes + **********************************************************************************************************************/ +static void r_sci_irqs_cfg(sci_smci_instance_ctrl_t * const p_ctrl, smci_cfg_t const * const p_cfg); +static void r_sci_smci_config_set(sci_smci_instance_ctrl_t * const p_ctrl, + smci_transfer_mode_t * p_transfer_mode_params); +static fsp_err_t r_sci_smci_brr_calculate(smci_speed_params_t const * const p_speed_params, + uint32_t baud_rate_error_x_1000, + smci_baud_setting_t * const p_baud_setting); +static void r_sci_smci_baud_set(R_SCI0_Type * p_sci_reg, smci_baud_setting_t const * const p_baud_setting); + +/*********************************************************************************************************************** + * Private global variables + **********************************************************************************************************************/ + +/* Base Clock Cycles for 1-bit transfer period information (Smart Card mode) */ + +/* this is just a lookup table for S (which is different than F)*/ + +/* This table is the "Combinations of the SCMR.BCP2 and SMR_SMCI.BCP[1:0] bits" table from the + * HW user manual */ +static const sci_smci_bcp_setting_const_t g_bit_clock_conversion_setting_lut[SCI_SMCI_S_LOOKUP_TABLE_ENTRIES] = +{ + /*bcp01,bcp2,S*/ + {0U, 1U, 32 }, + {1U, 1U, 64 }, + {0U, 0U, 93 }, + {1U, 0U, 128}, + {2U, 0U, 186}, + {3U, 1U, 256}, + {2U, 1U, 372}, + {3U, 0U, 512} +}; + +/* This is "Table 7 — Fi and f (max.) Bits" & from ISO/IEC7816-3 Third edition + * 2006-11-01".. NOTE only the F values that can yield at last one possible supported + * S value are listed. */ +static const sci_smci_ffmax_lut_const_t g_f_value_lut[SMCI_CLOCK_CONVERSION_INTEGER_MAX] = +{ + [0] = {372, 4000000 }, + [1] = {372, 5000000 }, + [2] = {0, 0 }, /* there is no value of the associated f value (558) that the SMCI hardware will support*/ + [3] = {744, 8000000 }, + [4] = {1116, 1200000 }, + [5] = {1488, 1600000 }, + [6] = {1860, 2000000 }, + [7] = {0, 0 }, + [8] = {0, 0 }, + [9] = {512, 5000000 }, + [10] = {768, 7500000 }, + [11] = {1024, 10000000 }, + [12] = {1536, 15000000 }, + [13] = {2048, 20000000 }, + [14] = {0, 0 }, + [15] = {0, 0 } +}; + +static const uint8_t g_d_value_lut[SMCI_BAUDRATE_ADJUSTMENT_INTEGER_MAX] = +{ + [0] = 0, + [1] = 1, + [2] = 2, + [3] = 4, + [4] = 8, + [5] = 16, + [6] = 32, + [7] = 64, + [8] = 12, + [9] = 20, + [10] = 0, + [11] = 0, + [12] = 0, + [13] = 0, + [14] = 0, + [15] = 0 +}; + +/* This is the divisor 2^(2n+1) as defined in Table 27.6 "Relationship between N setting in BRR and bit rate B" in the RA4M2 manual + * R01UH0892EJ0110 or the relevant section for the MCU being used. */ +static const uint8_t g_clock_div_setting[SCI_SMCI_NUM_DIVISORS] = +{ + 2U, + 8U, + 32U, + 128U +}; + +/* SMCI on SCI HAL API mapping for SMCI interface */ +const smci_api_t g_smci_on_sci = +{ + .open = R_SCI_SMCI_Open, + .close = R_SCI_SMCI_Close, + .write = R_SCI_SMCI_Write, + .read = R_SCI_SMCI_Read, + .transferModeSet = R_SCI_SMCI_TransferModeSet, + .baudSet = R_SCI_SMCI_BaudSet, + .statusGet = R_SCI_SMCI_StatusGet, + .clockControl = R_SCI_SMCI_ClockControl, + .callbackSet = R_SCI_SMCI_CallbackSet, +}; + +/*******************************************************************************************************************//** + * @addtogroup SCI_SMCI + * @{ + **********************************************************************************************************************/ + +/*********************************************************************************************************************** + * Functions + **********************************************************************************************************************/ + +/*******************************************************************************************************************//** + * Configures the Smart Card Interface driver based on the input configurations. The interface stays in the clock-off + * state without enabling reception at the end of this function. ISO7816-3 default communication parameters are used to initial + * ize SMCI port speed and parameters, as the ATR message is always sent in that format. Only if Inverse convention is + * expected should the transfer mode be changed after reset. Implements @ref smci_api_t::open + * + * @param[inout] p_api_ctrl Pointer to SMCI control block that is to be opened + * @param[in] p_cfg Pointer to the config structure that shall be used to set paramters of the SMCI + * baud calculations needed to be have done and set into + * p_cfg->p_extend->p_smci_baud_setting + * + * @retval FSP_SUCCESS Channel opened successfully. + * @retval FSP_ERR_ASSERTION Pointer to SMCI control block or configuration structure is NULL. + * @retval FSP_ERR_IP_CHANNEL_NOT_PRESENT The requested channel does not exist on this MCU. + * @retval FSP_ERR_ALREADY_OPEN Control block has already been opened or channel is being used by another + * instance. Call close() then open() to reconfigure. + * + * @return See @ref RENESAS_ERROR_CODES or functions called by this function for other possible + * return codes. + **********************************************************************************************************************/ +fsp_err_t R_SCI_SMCI_Open (smci_ctrl_t * const p_api_ctrl, smci_cfg_t const * const p_cfg) +{ + sci_smci_instance_ctrl_t * p_ctrl = (sci_smci_instance_ctrl_t *) p_api_ctrl; + sci_smci_extended_cfg_t * p_ext; + smci_transfer_mode_t comm_params; + +#if (SCI_SMCI_CFG_PARAM_CHECKING_ENABLE) + + /* Check parameters. */ + FSP_ASSERT(p_ctrl); + FSP_ASSERT(p_cfg); + + FSP_ERROR_RETURN(SCI_SMCI_OPEN != p_ctrl->open, FSP_ERR_ALREADY_OPEN); + + FSP_ASSERT(p_cfg->rxi_irq >= 0); + FSP_ASSERT(p_cfg->txi_irq >= 0); + FSP_ASSERT(p_cfg->eri_irq >= 0); +#endif + + p_ext = (sci_smci_extended_cfg_t *) p_cfg->p_extend; + +#if (SCI_SMCI_CFG_PARAM_CHECKING_ENABLE) + FSP_ASSERT(p_cfg->p_callback); + FSP_ASSERT(p_ext); + FSP_ASSERT(p_ext->p_smci_baud_setting); + + /* Make sure this channel exists. */ + FSP_ERROR_RETURN(BSP_FEATURE_SCI_CHANNELS & (1U << p_cfg->channel), FSP_ERR_IP_CHANNEL_NOT_PRESENT); +#endif + + p_ctrl->p_reg = ((R_SCI0_Type *) (R_SCI0_BASE + (SCI_SMCI_SCI_REG_SIZE * p_cfg->channel))); + p_ctrl->p_cfg = p_cfg; + + p_ctrl->p_callback = p_cfg->p_callback; + p_ctrl->p_context = p_cfg->p_context; + p_ctrl->p_callback_memory = NULL; + + comm_params.protocol = SMCI_PROTOCOL_TYPE_T0; + comm_params.convention = SMCI_CONVENTION_TYPE_DIRECT; + comm_params.gsm_mode = true; + + /* Configure the interrupts. */ + r_sci_irqs_cfg(p_ctrl, p_cfg); + + /* Enable the SCI channel and reset the registers to their initial state. */ + R_BSP_MODULE_START(FSP_IP_SCI, p_cfg->channel); + + /* Initialize registers as defined in section 34.6.5 "SCI Initialization in Smart Card Mode" in the RA6M3 manual + * R01UH0886EJ0100 or the relevant section for the MCU being used. */ + r_sci_smci_config_set(p_ctrl, &comm_params); + + p_ctrl->p_tx_src = NULL; + p_ctrl->tx_src_bytes = 0U; + p_ctrl->p_rx_dest = NULL; + p_ctrl->rx_dest_bytes = 0; + p_ctrl->rx_bytes_received = 0; + + /* NOTE: Receiver and its interrupt are enabled at clock out. */ + R_BSP_IrqEnable(p_ctrl->p_cfg->rxi_irq); + R_BSP_IrqEnable(p_ctrl->p_cfg->eri_irq); + + /* NOTE: Transmitter and its interrupt are enabled in SCI_SMCI_Write(). */ + R_BSP_IrqEnable(p_ctrl->p_cfg->txi_irq); + + r_sci_smci_baud_set(p_ctrl->p_reg, p_ext->p_smci_baud_setting); + + p_ctrl->open = SCI_SMCI_OPEN; + p_ctrl->smci_state = SMCI_STATE_IDLE_CLOCK_OFF; + + return FSP_SUCCESS; +} + +/*******************************************************************************************************************//** + * Transmits user specified number of bytes from the source buffer pointer. Implements @ref smci_api_t::write + * + * @param[inout] p_api_ctrl Pointer to SMCI control block that is to be opened + * @param[in] p_src Pointer to buffer that will be written out + * @param[in] bytes Number of bytes to be transferred + * + * @retval FSP_SUCCESS Data transmission started successfully. + * @retval FSP_ERR_ASSERTION Pointer to SMCI control block is NULL. + * @retval FSP_ERR_NOT_OPEN The control block has not been opened + * @retval FSP_ERR_IN_USE A SMCI transmission is in progress + * + * @return See @ref RENESAS_ERROR_CODES or functions called by this function for other possible + * return codes. + * + **********************************************************************************************************************/ +fsp_err_t R_SCI_SMCI_Write (smci_ctrl_t * const p_api_ctrl, uint8_t const * const p_src, uint32_t const bytes) +{ + sci_smci_instance_ctrl_t * p_ctrl = (sci_smci_instance_ctrl_t *) p_api_ctrl; + uint8_t scr; +#if (SCI_SMCI_CFG_PARAM_CHECKING_ENABLE) + FSP_ASSERT(p_ctrl); + FSP_ASSERT(p_src); + FSP_ASSERT(0U != bytes); + FSP_ERROR_RETURN(0U == p_ctrl->tx_src_bytes, FSP_ERR_IN_USE); + FSP_ERROR_RETURN(SCI_SMCI_OPEN == p_ctrl->open, FSP_ERR_NOT_OPEN); +#endif + + scr = p_ctrl->p_reg->SCR_SMCI; + + /* disable the receiver ,and enable the receiver*/ + scr &= (uint8_t) ~(R_SCI0_SCR_SMCI_RE_Msk | R_SCI0_SCR_SMCI_RIE_Msk); + scr |= R_SCI0_SCR_SMCI_TE_Msk; + + p_ctrl->p_reg->SCR_SMCI = scr; + + /* The FIFO is not used, so the first write will be done from this function. Subsequent writes will be done + * from txi_isr */ + p_ctrl->tx_src_bytes = bytes - 1; + p_ctrl->p_tx_src = p_src + 1; + + p_ctrl->smci_state = SMCI_STATE_TX_PROGRESSING; + + /* Enable the TX interrupt before putting data in TDR.. also enable RIE as it enables the error intterupts + * that may occur */ + p_ctrl->p_reg->SCR_SMCI |= (R_SCI0_SCR_SMCI_TIE_Msk | R_SCI0_SCR_SMCI_RIE_Msk); + + p_ctrl->p_reg->TDR = *(p_src); + + return FSP_SUCCESS; +} + +/*******************************************************************************************************************//** + * Receives user specified number of bytes into destination buffer pointer. Receiving is done at the isr level as + * there is no FIFO. If 0 is passed in as the length, reception will always invoke the user callback. + * Implements @ref smci_api_t::read + * + * @param[inout] p_api_ctrl Pointer to SMCI control block that is to be opened + * @param[inout] p_dest Pointer to the buffer top be read into + * @param[in] bytes Number of bytes to copy from the SMCI receive register + * + * @retval FSP_SUCCESS Data reception successfully ends. + * @retval FSP_ERR_ASSERTION Pointer to SMCI control block or read buffer is NULL. + * @retval FSP_ERR_NOT_OPEN The control block has not been opened + * @retval FSP_ERR_IN_USE A previous read operation is still in progress. + * + * @return See @ref RENESAS_ERROR_CODES or functions called by this function for other possible + * return codes. + * + **********************************************************************************************************************/ +fsp_err_t R_SCI_SMCI_Read (smci_ctrl_t * const p_api_ctrl, uint8_t * const p_dest, uint32_t const bytes) +{ + sci_smci_instance_ctrl_t * p_ctrl = (sci_smci_instance_ctrl_t *) p_api_ctrl; +#if (SCI_SMCI_CFG_PARAM_CHECKING_ENABLE) + FSP_ASSERT(p_ctrl); + FSP_ASSERT((p_dest) || (bytes == 0)); + FSP_ERROR_RETURN(SCI_SMCI_OPEN == p_ctrl->open, FSP_ERR_NOT_OPEN); + FSP_ERROR_RETURN((bytes == 0) || (0U == p_ctrl->rx_dest_bytes - p_ctrl->rx_bytes_received), FSP_ERR_IN_USE); +#endif + if (0 == bytes) /* 0 bytes indicate a reset of the read states */ + { + p_ctrl->smci_state = SMCI_STATE_TX_RX_IDLE; + } + +#if (SCI_SMCI_CFG_PARAM_CHECKING_ENABLE) + FSP_ERROR_RETURN((SMCI_STATE_TX_RX_IDLE == p_ctrl->smci_state), FSP_ERR_IN_USE); +#endif + + /* Transmit and receive interrupts must be disabled to start with */ + /* Disable transmit */ + p_ctrl->p_reg->SCR_SMCI &= (uint8_t) ~(R_SCI0_SCR_SMCI_TIE_Msk | R_SCI0_SCR_SMCI_TE_Msk | R_SCI0_SCR_SMCI_RIE_Msk); + + /* Save the destination address and size for use in rxi_isr. */ + p_ctrl->p_rx_dest = p_dest; + p_ctrl->rx_dest_bytes = bytes; + p_ctrl->rx_bytes_received = 0; + + /* Enable receiver and its interrupt */ + p_ctrl->p_reg->SCR_SMCI |= (R_SCI0_SCR_SMCI_RIE_Msk | R_SCI0_SCR_SMCI_RE_Msk); + + return FSP_SUCCESS; +} + +/*******************************************************************************************************************//** + * Updates the settings of block transfer mode and data transfer convention. The SCMR and SMR_SMCI registers + * will be set according to the input arguments of protocol type, data convention type, and mode. + * Implements @ref smci_api_t::transferModeSet + * + * @param[inout] p_api_ctrl Pointer to SMCI control block that is to be modified + * @param[in] p_transfer_mode_params Pointer to SMCI settings like protocol, convention, and gsm_mode + * + * @warning This terminates any in-progress transmission and reception. + * + * @retval FSP_SUCCESS Transfer mode and data transfer direction was successfully changed. + * @retval FSP_ERR_IN_USE Unable to change transfer mode as device has clock off or is actively RX or TX + * @retval FSP_ERR_ASSERTION Null pointer was passed as a parameter + * @retval FSP_ERR_NOT_OPEN The control block has not been opened + * + * @return See @ref RENESAS_ERROR_CODES or functions called by this function for other possible + * return codes. + **********************************************************************************************************************/ +fsp_err_t R_SCI_SMCI_TransferModeSet (smci_ctrl_t * const p_api_ctrl, + smci_transfer_mode_t const * const p_transfer_mode_params) + +{ + sci_smci_instance_ctrl_t * p_ctrl = (sci_smci_instance_ctrl_t *) p_api_ctrl; + +#if (SCI_SMCI_CFG_PARAM_CHECKING_ENABLE) + + /* Check parameters. */ + FSP_ASSERT(p_ctrl); + FSP_ASSERT(p_transfer_mode_params); + + FSP_ERROR_RETURN(SCI_SMCI_OPEN == p_ctrl->open, FSP_ERR_NOT_OPEN); + + FSP_ERROR_RETURN((SMCI_STATE_IDLE_CLOCK_OFF == p_ctrl->smci_state) || + (SMCI_STATE_TX_RX_IDLE == p_ctrl->smci_state), + FSP_ERR_IN_USE); +#endif + + /* Save SCR configurations except transmit interrupts. Resuming transmission after reconfiguring transfer mode is + * not supported. */ + uint8_t preserved_scr_smci = p_ctrl->p_reg->SCR_SMCI & + (uint8_t) ~((R_SCI0_SCR_SMCI_TIE_Msk) | (R_SCI0_SCR_SMCI_TE_Msk)); + + /* If TX and RX arent disable writing to speed and mode registers wont occure according to datasheet*/ + p_ctrl->p_reg->SCR_SMCI = preserved_scr_smci & (uint8_t) ~(R_SCI0_SCR_SMCI_TE_Msk | R_SCI0_SCR_SMCI_RE_Msk); + p_ctrl->p_tx_src = NULL; + + uint8_t smr_smci = 0; + uint8_t scmr = 0; + + smr_smci = p_ctrl->p_reg->SMR_SMCI; + scmr = p_ctrl->p_reg->SCMR; + + /* Enable parity for SMCI mode */ + smr_smci |= (uint8_t) (R_SCI0_SMR_SMCI_PE_Msk); + + if (SMCI_PROTOCOL_TYPE_T1 == p_transfer_mode_params->protocol) + { + smr_smci |= (uint8_t) (SMCI_PROTOCOL_TYPE_T1 << R_SCI0_SMR_SMCI_BLK_Pos); + } + else + { + smr_smci &= (uint8_t) (~(SMCI_PROTOCOL_TYPE_T1 << R_SCI0_SMR_SMCI_BLK_Pos)); + } + + if (SMCI_CONVENTION_TYPE_DIRECT == p_transfer_mode_params->convention) + { + smr_smci &= (uint8_t) (~R_SCI0_SMR_SMCI_PM_Msk); + scmr &= (uint8_t) (~R_SCI0_SCMR_SINV_Msk); + scmr &= (uint8_t) (~R_SCI0_SCMR_SDIR_Msk); + } + else if (SMCI_CONVENTION_TYPE_INVERSE == p_transfer_mode_params->convention) + { + smr_smci |= R_SCI0_SMR_SMCI_PM_Msk; /* Because the SINV bit of the MCU only inverts data bits D7 to D0, */ + /* write 1 to the PM bit in SMR_SMCI to invert the parity bit for */ + /* both transmission and reception.*/ + scmr |= R_SCI0_SCMR_SINV_Msk; + scmr |= R_SCI0_SCMR_SDIR_Msk; + } + else + { + /* unhandled convention type*/ + } + + /* save off and set thwe GSM mode */ + if (p_transfer_mode_params->gsm_mode) + { + smr_smci |= (uint8_t) (R_SCI0_SMR_SMCI_GM_Msk); + } + else + { + smr_smci &= (uint8_t) (~R_SCI0_SMR_SMCI_GM_Msk); + } + + p_ctrl->p_reg->SMR_SMCI = smr_smci; + p_ctrl->p_reg->SCMR = scmr; + + /* Restore all settings except transmit enable interrupts. */ + /* Keep the receiver on, thats the normal idle state */ + p_ctrl->p_reg->SCR_SMCI = (preserved_scr_smci | R_SCI0_SCR_SMCI_RE_Msk | R_SCI0_SCR_SMCI_RIE_Msk); + + return FSP_SUCCESS; +} + +/*******************************************************************************************************************//** + * Updates the baud rate and clock output. p_baud_setting is a pointer to a smci_baud_setting_t structure that needs + * to have already been filled by R_SCI_SMCI_BaudCalculate + * Implements @ref smci_api_t::baudSet + * + * @warning This terminates any in-progress transmission. + * + * @param[inout] p_api_ctrl Pointer to SMCI control block that is to be modified + * @param[in] p_baud_setting Pointer to baud setting information to be written to the SMCI hardware registers + * + * @retval FSP_SUCCESS Baud rate was successfully changed. + * @retval FSP_ERR_ASSERTION Pointer to SMCI control block or p_baud_setting is NUL + * @retval FSP_ERR_NOT_OPEN The control block has not been opened + * @retval FSP_ERR_INVALID_ARGUMENT The p_baud_setting does not seem to be set correctly + **********************************************************************************************************************/ +fsp_err_t R_SCI_SMCI_BaudSet (smci_ctrl_t * const p_api_ctrl, void const * const p_baud_setting) +{ + sci_smci_instance_ctrl_t * p_ctrl = (sci_smci_instance_ctrl_t *) p_api_ctrl; + +#if (SCI_SMCI_CFG_PARAM_CHECKING_ENABLE) + + /* Check parameters. */ + FSP_ASSERT(p_ctrl); + FSP_ASSERT(p_baud_setting); + FSP_ERROR_RETURN(SCI_SMCI_OPEN == p_ctrl->open, FSP_ERR_NOT_OPEN); + FSP_ERROR_RETURN(((smci_baud_setting_t *) p_baud_setting)->computed_baud_rate != 0, FSP_ERR_INVALID_ARGUMENT); +#endif + + /* Save SCR configurations except transmit interrupts. Resuming transmission after reconfiguring baud settings is + * not supported. */ + uint8_t preserved_scr_smci = p_ctrl->p_reg->SCR_SMCI & (uint8_t) ~(R_SCI0_SCR_SMCI_TIE_Msk); + + /* If TX and RX arent disable writing to speed and mode registers wont occure according to datasheet*/ + p_ctrl->p_reg->SCR_SMCI = preserved_scr_smci & (uint8_t) ~(R_SCI0_SCR_SMCI_TE_Msk | R_SCI0_SCR_SMCI_RE_Msk); + + p_ctrl->p_tx_src = NULL; + + /* Apply new baud rate register settings. */ + r_sci_smci_baud_set(p_ctrl->p_reg, p_baud_setting); + + /* Restore all settings except transmit enable interrupts. */ + /* Keep the receiver on, thats the normal idle state */ + p_ctrl->p_reg->SCR_SMCI = (preserved_scr_smci | R_SCI0_SCR_SMCI_RE_Msk | R_SCI0_SCR_SMCI_RIE_Msk); + + return FSP_SUCCESS; +} + +/*******************************************************************************************************************//** + * Provides the state of the driver and the # of bytes received since read was called + * Implements @ref smci_api_t::statusGet + * + * @param[in] p_api_ctrl Pointer to SMCI control block of this SMCI instance + * @param[out] p_status Pointer structure that will be filled in with status info + * + * @retval FSP_SUCCESS Information stored in provided p_info. + * @retval FSP_ERR_ASSERTION Pointer to SMCI control block, or info structure is NULL. + * @retval FSP_ERR_NOT_OPEN The control block has not been opened + **********************************************************************************************************************/ +fsp_err_t R_SCI_SMCI_StatusGet (smci_ctrl_t * const p_api_ctrl, smci_status_t * const p_status) +{ + sci_smci_instance_ctrl_t * p_ctrl = (sci_smci_instance_ctrl_t *) p_api_ctrl; + +#if (SCI_SMCI_CFG_PARAM_CHECKING_ENABLE) + FSP_PARAMETER_NOT_USED(p_api_ctrl); + FSP_ASSERT(p_ctrl); + FSP_ASSERT(p_status); + FSP_ERROR_RETURN(SCI_SMCI_OPEN == p_ctrl->open, FSP_ERR_NOT_OPEN); +#endif + + p_status->smci_state = p_ctrl->smci_state; + + /* the number of bytes received */ + p_status->bytes_recvd = p_ctrl->rx_bytes_received; + + return FSP_SUCCESS; +} + +/*******************************************************************************************************************//** + * Enable or disable the clock signal that is provided by interface the baud rate. When the clock is enabled, reception + * is enabled at the end of this function. "Clock output control as defined in section 34.6.8 "Clock Output Control in + * Smart Card Interface Mode" in the RA6M3 manual R01UH0886EJ0100 or the relevant section for the MCU being used. + * Implements @ref smci_api_t::clockControl + * + * @warning This terminates any in-progress transmission and reception. + * + * @param[inout] p_api_ctrl Pointer to SMCI control block + * @param[in] clock_enable true=Enable or false=disable the Smart Card Interface clock + * + * @retval FSP_SUCCESS Clock output setting was successfully changed. + * @retval FSP_ERR_ASSERTION Pointer to SMCI control block is NULL + * @retval FSP_ERR_NOT_OPEN The control block has not been opened + * @retval FSP_ERR_INVALID_MODE Clock cannot be disabled if GSM mode isnt active + * + **********************************************************************************************************************/ +fsp_err_t R_SCI_SMCI_ClockControl (smci_ctrl_t * const p_api_ctrl, bool clock_enable) +{ + sci_smci_instance_ctrl_t * p_ctrl = (sci_smci_instance_ctrl_t *) p_api_ctrl; + uint8_t smci_temp; +#if (SCI_SMCI_CFG_PARAM_CHECKING_ENABLE) + + /* Check parameters. */ + FSP_ASSERT(p_ctrl); + FSP_ERROR_RETURN(SCI_SMCI_OPEN == p_ctrl->open, FSP_ERR_NOT_OPEN); + + /* only allow clock off in GSM Mode */ + if (clock_enable == false) + { + FSP_ERROR_RETURN((1 == p_ctrl->p_reg->SMR_SMCI_b.GM), FSP_ERR_INVALID_MODE); + } +#endif + smci_temp = p_ctrl->p_reg->SCR_SMCI; + + /* Clock Enable control bit can be written only when TE=0 and RE=0 + * The setting of RIE and TIE are reset because resuming reception or transmission after clock state change is not supported */ + p_ctrl->p_reg->SCR_SMCI = smci_temp & (uint8_t) ~(R_SCI0_SCR_SMCI_RE_Msk | + R_SCI0_SCR_SMCI_TE_Msk | R_SCI0_SCR_SMCI_RIE_Msk | + R_SCI0_SCR_SMCI_TIE_Msk); + + if (clock_enable) + { + /* output clock */ + p_ctrl->p_reg->SCR_SMCI_b.CKE = 1; + + /* enable received transfer as default */ + p_ctrl->p_reg->SCR_SMCI |= R_SCI0_SCR_SMCI_RIE_Msk | R_SCI0_SCR_SMCI_RE_Msk; + p_ctrl->p_reg->SCR_SMCI &= (uint8_t) ~(R_SCI0_SCR_SMCI_TIE_Msk | R_SCI0_SCR_SMCI_TE_Msk); + + /* indicate we are ready to transmit*/ + p_ctrl->smci_state = SMCI_STATE_TX_RX_IDLE; + } + else + { + /* stop clock */ + p_ctrl->p_reg->SCR_SMCI_b.CKE = 0; + } + + return FSP_SUCCESS; +} + +/*******************************************************************************************************************//** + * Updates the user callback and has option of providing memory for callback structure. + * Implements smci_api_t::callbackSet + * + * @retval FSP_SUCCESS Callback updated successfully. + * @retval FSP_ERR_ASSERTION A required pointer is NULL. + * @retval FSP_ERR_NOT_OPEN The control block has not been opened. + * @retval FSP_ERR_NO_CALLBACK_MEMORY p_callback is non-secure and p_callback_memory is either secure or NULL. + **********************************************************************************************************************/ +fsp_err_t R_SCI_SMCI_CallbackSet (smci_ctrl_t * const p_api_ctrl, + void ( * p_callback)(smci_callback_args_t *), + void const * const p_context, + smci_callback_args_t * const p_callback_memory) +{ + sci_smci_instance_ctrl_t * p_ctrl = (sci_smci_instance_ctrl_t *) p_api_ctrl; + +#if (SCI_SMCI_CFG_PARAM_CHECKING_ENABLE) + FSP_ASSERT(p_ctrl); + FSP_ASSERT(p_callback); + FSP_ERROR_RETURN(SCI_SMCI_OPEN == p_ctrl->open, FSP_ERR_NOT_OPEN); +#endif + +#if BSP_TZ_SECURE_BUILD + + /* Get security state of p_callback */ + bool callback_is_secure = + (NULL == cmse_check_address_range((void *) p_callback, sizeof(void *), CMSE_AU_NONSECURE)); + + #if SCI_SMCI_CFG_PARAM_CHECKING_ENABLE + + /* In secure projects, p_callback_memory must be provided in non-secure space if p_callback is non-secure */ + smci_callback_args_t * const p_callback_memory_checked = cmse_check_pointed_object(p_callback_memory, + CMSE_AU_NONSECURE); + FSP_ERROR_RETURN(callback_is_secure || (NULL != p_callback_memory_checked), FSP_ERR_NO_CALLBACK_MEMORY); + #endif +#endif + + /* Store callback and context */ +#if BSP_TZ_SECURE_BUILD + p_ctrl->p_callback = callback_is_secure ? p_callback : + (void (*)(smci_callback_args_t *))cmse_nsfptr_create(p_callback); +#else + p_ctrl->p_callback = p_callback; +#endif + p_ctrl->p_context = p_context; + p_ctrl->p_callback_memory = p_callback_memory; + + return FSP_SUCCESS; +} + +/*******************************************************************************************************************//** + * Aborts any in progress transfers. Disables interrupts, receiver, and transmitter. + * Implements @ref smci_api_t::close + * + * @param[in] p_api_ctrl Pointer to SMCI control block that is reqested to close + * + * @retval FSP_SUCCESS Channel successfully closed. + * @retval FSP_ERR_ASSERTION Pointer to SMCI control block is NULL. + * @retval FSP_ERR_NOT_OPEN The control block has not been opened + **********************************************************************************************************************/ +fsp_err_t R_SCI_SMCI_Close (smci_ctrl_t * const p_api_ctrl) +{ + sci_smci_instance_ctrl_t * p_ctrl = (sci_smci_instance_ctrl_t *) p_api_ctrl; +#if (SCI_SMCI_CFG_PARAM_CHECKING_ENABLE) + FSP_ASSERT(p_ctrl); + FSP_ERROR_RETURN(SCI_SMCI_OPEN == p_ctrl->open, FSP_ERR_NOT_OPEN); +#endif + + /* Mark the channel not open so other APIs cannot use it. */ + p_ctrl->open = 0U; + + /* Disable interrupts, receiver, and transmitter. Disable baud clock output.*/ + p_ctrl->p_reg->SCR_SMCI = 0U; + + /* Disable reception irqs. */ + R_BSP_IrqDisable(p_ctrl->p_cfg->rxi_irq); + R_BSP_IrqDisable(p_ctrl->p_cfg->eri_irq); + + /* Disable transmission irqs. */ + R_BSP_IrqDisable(p_ctrl->p_cfg->txi_irq); + + /* Enter module stop mode */ + R_BSP_MODULE_STOP(FSP_IP_SCI, p_ctrl->p_cfg->channel); + + return FSP_SUCCESS; +} + +/*******************************************************************************************************************//** + * Calculates baud rate register settings. Evaluates and determines the best possible settings set to the baud rate + * related registers. And then updates the SCI registers. + * + * @param[in] p_speed_params structure including speed defining paramets, baud, F, D, and max frequency + * @param[in] baud_rate_error_x_1000 <baud_rate_percent_error> x 1000 required for module to function. + * Absolute max baud_rate_error is 20000 (20%) according to the ISO spec. + * @param[out] p_baud_setting Baud setting information stored here if successful + * + * @retval FSP_SUCCESS Baud rate setting calculation successful + * @retval FSP_ERR_ASSERTION p_speed params or p_baud is a null pointer + * @retval FSP_ERR_INVALID_ARGUMENT Baud rate is '0', freq is '0', or error in + * calculated baud rate is larger than 20%. + **********************************************************************************************************************/ +fsp_err_t R_SCI_SMCI_BaudCalculate (smci_speed_params_t const * const p_speed_params, + uint32_t baud_rate_error_x_1000, + void * const p_baud_setting) +{ + smci_baud_setting_t * p_baud = (smci_baud_setting_t *) p_baud_setting; + +#if (SCI_SMCI_CFG_PARAM_CHECKING_ENABLE) + FSP_ASSERT(p_speed_params); + FSP_ERROR_RETURN((0U != p_speed_params->baudrate), FSP_ERR_INVALID_ARGUMENT); + FSP_ERROR_RETURN((0U != g_f_value_lut[p_speed_params->fi].freq_max), FSP_ERR_INVALID_ARGUMENT); + FSP_ERROR_RETURN(SCI_SMCI_MAX_BAUD_RATE_ERROR_X_1000 > baud_rate_error_x_1000, FSP_ERR_INVALID_ARGUMENT); + FSP_ASSERT(p_baud); +#endif + + fsp_err_t err; + + /* Update the SCI baudrate registers configuration. The TE, RE should be set to 0 prior to this step */ + err = r_sci_smci_brr_calculate(p_speed_params, baud_rate_error_x_1000, p_baud); + + if (FSP_SUCCESS != err) + { + p_baud->computed_baud_rate = 0; + } + + return err; +} + +/*******************************************************************************************************************//** + * @} (end addtogroup SCI_SMCI) + **********************************************************************************************************************/ + +/*******************************************************************************************************************//** + * Sets interrupt priority and initializes vector info for all interrupts. + * + * @param[in] p_ctrl Pointer to SMCI control block + * @param[in] p_cfg Pointer to SMCI specific configuration structure + **********************************************************************************************************************/ +static void r_sci_irqs_cfg (sci_smci_instance_ctrl_t * const p_ctrl, smci_cfg_t const * const p_cfg) +{ + R_BSP_IrqCfg(p_cfg->eri_irq, p_cfg->eri_ipl, p_ctrl); + R_BSP_IrqCfg(p_cfg->rxi_irq, p_cfg->rxi_ipl, p_ctrl); + R_BSP_IrqCfg(p_cfg->txi_irq, p_cfg->txi_ipl, p_ctrl); +} + +/*******************************************************************************************************************//** + * computes the brr register value required for the given input params + * @param[in] p_speed_params Pointer to structure containing etu definition params + * @param[in] baud_rate_error_x_1000 Allowable baud rate error + * @param[out] p_baud_setting Pointer to structure containing computed values to achieve baud/error rate + * + * @retval FSP_SUCCESS Register settings updated in provided p_baud_setting + * @retval FSP_ERR_INVALID_ARGUMENT Cant achieve output etu/freq with given params + **********************************************************************************************************************/ +static fsp_err_t r_sci_smci_brr_calculate (smci_speed_params_t const * const p_speed_params, + uint32_t baud_rate_error_x_1000, + smci_baud_setting_t * const p_baud_setting) +{ + uint32_t max_baudrate = 0U; + static uint32_t actual_baudrate = 0U; + int32_t hit_bit_err = SCI_SMCI_100_PERCENT_X_1000; + static uint32_t divisor = 0U; + uint32_t f_value = 0U; + uint32_t freq_hz = R_FSP_SystemClockHzGet(BSP_FEATURE_SCI_CLOCK); + int32_t err_divisor = 0; + int32_t bit_err = 0; + uint32_t temp_brr = 0; + uint32_t s_value = 0U; + uint8_t s_index = 0; + uint32_t target_baudrate = 0U; + + target_baudrate = p_speed_params->baudrate; + + /* Find the best BRR (bit rate register) value in Smart Card mode */ + + /* first determine if we can get to the spec'd baudrate withe params given*/ + f_value = (uint32_t) g_f_value_lut[p_speed_params->fi].f_value; + + max_baudrate = (g_d_value_lut[p_speed_params->di] * g_f_value_lut[p_speed_params->fi].freq_max) / f_value; + + s_value = f_value / g_d_value_lut[p_speed_params->di]; + if (target_baudrate > max_baudrate) + { + /* Error out if the parameters supplied will not allow the baud rate generated to be within error range */ + FSP_ERROR_RETURN(((((target_baudrate - max_baudrate) * 100000) / max_baudrate) < baud_rate_error_x_1000), + FSP_ERR_INVALID_ARGUMENT); + target_baudrate = max_baudrate; + } + + /* validate that a S value for the given F and D exists on the SMCI hardware*/ + /* find the S value that corresponds, from our look up table */ + while ((s_index < SCI_SMCI_S_LOOKUP_TABLE_ENTRIES) && + (s_value != g_bit_clock_conversion_setting_lut[s_index].bit_clock_conversion_number_s)) + { + s_index++; + } + + FSP_ERROR_RETURN((s_index != SCI_SMCI_S_LOOKUP_TABLE_ENTRIES), FSP_ERR_INVALID_ARGUMENT); + + for (uint8_t cks_value = 0U; + cks_value < (SCI_SMCI_NUM_DIVISORS) && (hit_bit_err > ((int32_t) baud_rate_error_x_1000)); + cks_value++) + { + /* This is the based on smci brr setting as defined in Table 27.6 "Relationship between N setting in BRR and bit rate B" in the RA4M2 manual + * R01UH0892EJ0110 or the relevant section for the MCU being used. */ + divisor = (uint32_t) g_clock_div_setting[cks_value] * target_baudrate * + s_value; + temp_brr = freq_hz / divisor; + + if (temp_brr <= (SCI_SMCI_BRR_MAX + 1U)) + { + if (temp_brr > 0U) + { + temp_brr -= 1U; + + /* Calculate the bit rate error. The formula is as follows: + * bit rate error[%] = {(PCLK / (baud * div_coefficient * (BRR + 1)) - 1} x 100 + * calculates bit rate error[%] to three decimal places + */ + err_divisor = (int32_t) (divisor * (temp_brr + 1U)); + + /* Promoting to 64 bits for calculation, but the final value can never be more than 32 bits, as + * described below, so this cast is safe. + * 1. (temp_brr + 1) can be off by an upper limit of 1 due to rounding from the calculation: + * freq_hz / divisor, or: + * freq_hz / divisor <= (temp_brr + 1) < (freq_hz / divisor) + 1 + * 2. Solving for err_divisor: + * freq_hz <= err_divisor < freq_hz + divisor + * 3. Solving for bit_err: + * 0 >= bit_err >= (freq_hz * 100000 / (freq_hz + divisor)) - 100000 + * 4. freq_hz >= divisor (or temp_brr would be -1 and we would never enter this while loop), so: + * 0 >= bit_err >= 100000 / freq_hz - 100000 + * 5. Larger frequencies yield larger bit errors (absolute value). As the frequency grows, + * the bit_err approaches -100000, so: + * 0 >= bit_err >= -100000 + * 6. bit_err is between -100000 and 0. This entire range fits in an int32_t type, so the cast + * to (int32_t) is safe. + */ + bit_err = (int32_t) (((((int64_t) freq_hz) * SCI_SMCI_100_PERCENT_X_1000) / + err_divisor) - SCI_SMCI_100_PERCENT_X_1000); + + /* Bit error will always be > 0 because we are effectively rouding down brr, so we dont need to + * do absolute value */ + + actual_baudrate = + (uint32_t) (freq_hz / + (g_clock_div_setting[cks_value] * s_value * + (temp_brr + 1U))); + + /* If the absolute value of the bit rate error is less than the previous lowest absolute value of + * bit rate error, then store these settings as the best value. + */ + if (bit_err < hit_bit_err) + { + /* look up the settings based on the s_index we found above*/ + p_baud_setting->smr_smci_clock_bits_b.bcp01 = + g_bit_clock_conversion_setting_lut[s_index].smr_smci_bcp01; + p_baud_setting->smr_smci_clock_bits_b.cks = (uint8_t) (cks_value & SCI_SMCI_CKS_MASK); + p_baud_setting->scmr_bcp2 = g_bit_clock_conversion_setting_lut[s_index].scmr_bcp2; + p_baud_setting->brr = (uint8_t) temp_brr; + hit_bit_err = bit_err; + } + } + } + } + + p_baud_setting->computed_baud_rate = actual_baudrate; + FSP_ERROR_RETURN((p_baud_setting->brr > 0), FSP_ERR_INVALID_ARGUMENT); + + /* Return an error if the percent error is larger than the maximum percent error allowed for this instance */ + FSP_ERROR_RETURN((hit_bit_err <= (int32_t) baud_rate_error_x_1000), FSP_ERR_INVALID_ARGUMENT); + + return FSP_SUCCESS; +} + +/*******************************************************************************************************************//** + * Changes baud rate based on predetermined register settings. + * + * @param[in] p_sci_reg Base pointer for SCI registers + * @param[in] p_baud_setting Pointer to other divisor related settings + * + * @note The transmitter and receiver (TE and RE bits in SCR) must be disabled prior to calling this function. + **********************************************************************************************************************/ +static void r_sci_smci_baud_set (R_SCI0_Type * p_sci_reg, smci_baud_setting_t const * const p_baud_setting) +{ + uint8_t smr_smci = + (p_sci_reg->SMR_SMCI) & (uint8_t) + ~((R_SCI0_SMR_SMCI_BCP_Msk | R_SCI0_SMR_SMCI_CKS_Msk)); + + /* Set Base Clock Pulse 0, 1 */ + /* and Clock Select */ + smr_smci |= + (uint8_t) (((uint8_t) ((p_baud_setting->smr_smci_clock_bits_b.bcp01 << R_SCI0_SMR_SMCI_BCP_Pos) & + (uint8_t) R_SCI0_SMR_SMCI_BCP_Msk) | + ((uint8_t) ((p_baud_setting->smr_smci_clock_bits_b.cks << R_SCI0_SMR_SMCI_CKS_Pos) & + (uint8_t) R_SCI0_SMR_SMCI_CKS_Msk)))); + + p_sci_reg->SMR_SMCI = smr_smci; + + /* Set Base Clock Pulse 2 */ + p_sci_reg->SCMR_b.BCP2 = p_baud_setting->scmr_bcp2; + + /* Set the BRR */ + p_sci_reg->BRR = p_baud_setting->brr; +} + +/*******************************************************************************************************************//** + * Configures SCI related registers for Smart Card mode. + * + * @param[in] p_ctrl Pointer to SMCI control structure + * @param[in] p_transfer_mode_params Pointer to SMCI specific comm parameters + **********************************************************************************************************************/ +static void r_sci_smci_config_set (sci_smci_instance_ctrl_t * const p_ctrl, + smci_transfer_mode_t * p_transfer_mode_params) +{ + /* Stop communication and initialize CKE - Set TIE, RIE, TE, RE, TEIE, CKE to 0 */ + p_ctrl->p_reg->SCR_SMCI = 0U; + + p_ctrl->p_reg->SIMR1 = 0U; /* ensure iic mode is not selected */ + + /* Set to smart card interface mode. */ + p_ctrl->p_reg->SIMR1_b.IICM = 0U; + p_ctrl->p_reg->SCMR_b.SMIF = 1; + + /* Write to SSR_SMCI after read SSR_SMCI - Set SSR_SMCI.ORER, ERS, PER to 0*/ + p_ctrl->p_reg->SSR_SMCI = + (p_ctrl->p_reg->SSR_SMCI & + (uint8_t) (~(R_SCI0_SSR_SMCI_ORER_Msk | R_SCI0_SSR_SMCI_ERS_Msk | R_SCI0_SSR_SMCI_PER_Msk))); + + /* Set the transmission or reception format in SPMR - Set SPMR.CKPH, CKPOL */ + p_ctrl->p_reg->SPMR_b.CKPOL = 0U; + p_ctrl->p_reg->SPMR_b.CKPH = 0U; + + /* Set the operation mode and the transmission or reception format in SMR_SMCI. */ + uint8_t smr_smci = p_ctrl->p_reg->SMR_SMCI; + uint8_t scmr = p_ctrl->p_reg->SCMR; + + /* Enable parity for SMCI mode */ + smr_smci |= (uint8_t) (R_SCI0_SMR_SMCI_PE_Msk); + + if (true == p_transfer_mode_params->gsm_mode) + { + smr_smci |= (uint8_t) (R_SCI0_SMR_SMCI_GM_Msk); + } + else + { + smr_smci &= (uint8_t) (~R_SCI0_SMR_SMCI_GM_Msk); + } + + if (SMCI_PROTOCOL_TYPE_T1 == p_transfer_mode_params->protocol) + { + smr_smci |= (uint8_t) (SMCI_PROTOCOL_TYPE_T1 << R_SCI0_SMR_SMCI_BLK_Pos); + } + else + { + smr_smci &= (uint8_t) (~(SMCI_PROTOCOL_TYPE_T1 << R_SCI0_SMR_SMCI_BLK_Pos)); + } + + if (SMCI_CONVENTION_TYPE_DIRECT == p_transfer_mode_params->convention) + { + smr_smci &= (uint8_t) (~R_SCI0_SMR_SMCI_PM_Msk); + scmr &= (uint8_t) (~R_SCI0_SCMR_SINV_Msk); + scmr &= (uint8_t) (~R_SCI0_SCMR_SDIR_Msk); + } + else if (SMCI_CONVENTION_TYPE_INVERSE == p_transfer_mode_params->convention) + { + smr_smci |= (uint8_t) (R_SCI0_SMR_SMCI_PM_Msk); /* need to invert parity as well */ + scmr |= R_SCI0_SCMR_SINV_Msk; + scmr |= R_SCI0_SCMR_SDIR_Msk; + } + else + { + /* unhandled convention type*/ + } + + p_ctrl->p_reg->SEMR = 0; + + p_ctrl->p_reg->SMR_SMCI = smr_smci; + + /* Set the transmission or reception format in to 8-bit mode */ + scmr |= R_SCI0_SCMR_CHR1_Msk; + p_ctrl->p_reg->SCMR = scmr; + + /* Set SPTR to initial value */ + p_ctrl->p_reg->SPTR = (uint8_t) ~(R_SCI0_SPTR_SPB2IO_Msk | R_SCI0_SPTR_RINV_Msk | R_SCI0_SPTR_TINV_Msk); +} + +/*******************************************************************************************************************//** + * Calls user callback. + * + * @param[in] p_ctrl Pointer to SMCI instance control block + * @param[in] data See smci_callback_args_t in r_smci_api.h + * @param[in] event Event code + **********************************************************************************************************************/ +static void r_sci_smci_call_callback (sci_smci_instance_ctrl_t * p_ctrl, uint8_t data, smci_event_t event) +{ + smci_callback_args_t args; + + /* Store callback arguments in memory provided by user if available. This allows callback arguments to be + * stored in non-secure memory so they can be accessed by a non-secure callback function. */ + smci_callback_args_t * p_args = p_ctrl->p_callback_memory; + if (NULL == p_args) + { + /* Store on stack */ + p_args = &args; + } + else + { + /* Save current arguments on the stack in case this is a nested interrupt. */ + args = *p_args; + } + + p_args->channel = p_ctrl->p_cfg->channel; + p_args->data = data; + p_args->event = event; + p_args->p_context = p_ctrl->p_context; + +#if BSP_TZ_SECURE_BUILD + + /* p_callback can point to a secure function or a non-secure function. */ + if (!cmse_is_nsfptr(p_ctrl->p_callback)) + { + /* If p_callback is secure, then the project does not need to change security state. */ + p_ctrl->p_callback(p_args); + } + else + { + /* If p_callback is Non-secure, then the project must change to Non-secure state in order to call the callback. */ + sci_smci_prv_ns_callback p_callback = (sci_smci_prv_ns_callback) (p_ctrl->p_callback); + p_callback(p_args); + } + +#else + + /* If the project is not Trustzone Secure, then it will never need to change security state in order to call the callback. */ + p_ctrl->p_callback(p_args); +#endif + if (NULL != p_ctrl->p_callback_memory) + { + /* Restore callback memory in case this is a nested interrupt. */ + *p_ctrl->p_callback_memory = args; + } +} + +/*******************************************************************************************************************//** + * Receiver ISR receives data into the receive buffer or initiates user callback. + * + **********************************************************************************************************************/ +void sci_smci_rxi_isr (void) +{ + /* Save context if RTOS is used */ + FSP_CONTEXT_SAVE; + + IRQn_Type irq = R_FSP_CurrentIrqGet(); + + /* Clear pending IRQ to make sure it doesn't fire again after exiting */ + R_BSP_IrqStatusClear(irq); + + /* Recover ISR context saved in open. */ + sci_smci_instance_ctrl_t * p_ctrl = (sci_smci_instance_ctrl_t *) R_FSP_IsrContextGet(irq); + + uint8_t data; + + data = p_ctrl->p_reg->RDR; + + if (0 == (p_ctrl->rx_dest_bytes - p_ctrl->rx_bytes_received)) + { + /* Call user callback with the data. */ + r_sci_smci_call_callback(p_ctrl, data, SMCI_EVENT_RX_CHAR); + } + else + { + *p_ctrl->p_rx_dest = data; + p_ctrl->p_rx_dest += 1; + p_ctrl->rx_bytes_received += 1; + p_ctrl->smci_state = SMCI_STATE_RX_PROGRESSING; + if (0 == p_ctrl->rx_dest_bytes - p_ctrl->rx_bytes_received) + { + p_ctrl->smci_state = SMCI_STATE_TX_RX_IDLE; + r_sci_smci_call_callback(p_ctrl, 0U, SMCI_EVENT_RX_COMPLETE); + } + } + + /* Restore context if RTOS is used */ + FSP_CONTEXT_RESTORE; +} + +/*******************************************************************************************************************//** + * Transmit ISR, loads the transmit register from the transmit buffer, until all data is sent + * after which callback is initiated + * + **********************************************************************************************************************/ +void sci_smci_txi_isr (void) +{ + /* Save context if RTOS is used */ + FSP_CONTEXT_SAVE; + + IRQn_Type irq = R_FSP_CurrentIrqGet(); + + /* Clear pending IRQ to make sure it doesn't fire again after exiting */ + R_BSP_IrqStatusClear(irq); + + /* Recover ISR context saved in open. */ + sci_smci_instance_ctrl_t * p_ctrl = (sci_smci_instance_ctrl_t *) R_FSP_IsrContextGet(irq); + + if (0U != p_ctrl->tx_src_bytes) + { + /* Write 1byte (uint8_t) data to (uint8_t) data register */ + p_ctrl->p_reg->TDR = *(p_ctrl->p_tx_src); + + /* Update pointer to the next data and number of remaining bytes in the control block. */ + p_ctrl->tx_src_bytes -= 1; + p_ctrl->p_tx_src += 1; + } + else + { + p_ctrl->p_tx_src = NULL; + p_ctrl->smci_state = SMCI_STATE_TX_RX_IDLE; + + uint8_t scr_temp = p_ctrl->p_reg->SCR_SMCI; + scr_temp &= (uint8_t) ~(R_SCI0_SCR_SMCI_TIE_Msk | R_SCI0_SCR_SMCI_TE_Msk); + scr_temp |= (R_SCI0_SCR_SMCI_RE_Msk); + p_ctrl->p_reg->SCR_SMCI = scr_temp; + + r_sci_smci_call_callback(p_ctrl, 0U, SMCI_EVENT_TX_COMPLETE); + } + + /* Restore context if RTOS is used */ + FSP_CONTEXT_RESTORE; +} + +/*******************************************************************************************************************//** + * Error ISR, clears all three error Error Signal Status, Parity Error Flag, and Overrun Error Flag, then initiates + * the callback with an event code + **********************************************************************************************************************/ + +void sci_smci_eri_isr (void) +{ + /* Save context if RTOS is used */ + FSP_CONTEXT_SAVE; + + IRQn_Type irq = R_FSP_CurrentIrqGet(); + + /* Recover ISR context saved in open. */ + sci_smci_instance_ctrl_t * p_ctrl = (sci_smci_instance_ctrl_t *) R_FSP_IsrContextGet(irq); + + uint8_t data = 0U; + volatile uint8_t forceRead; + smci_event_t event; + + /* Read data. */ + data = p_ctrl->p_reg->RDR; + + event = (smci_event_t) (p_ctrl->p_reg->SSR_SMCI & SCI_SMCI_SSR_ERR_MASK); + + p_ctrl->p_reg->SSR_SMCI &= + (uint8_t) ~(R_SCI0_SSR_SMCI_ORER_Msk | R_SCI0_SSR_SMCI_ERS_Msk | R_SCI0_SSR_SMCI_PER_Msk); + + /* The data sheet says after writing you should readback 0 from the error bit */ + forceRead = p_ctrl->p_reg->SSR_SMCI; + forceRead++; + + /* Call callback. */ + r_sci_smci_call_callback(p_ctrl, data, event); + + /* Clear pending IRQ to make sure it doesn't fire again after exiting */ + R_BSP_IrqStatusClear(irq); + + /* Restore context if RTOS is used */ + FSP_CONTEXT_RESTORE; +} diff --git a/ra/fsp/src/r_slcdc/r_slcdc.c b/ra/fsp/src/r_slcdc/r_slcdc.c index a58d1c1f3..4c921c92d 100644 --- a/ra/fsp/src/r_slcdc/r_slcdc.c +++ b/ra/fsp/src/r_slcdc/r_slcdc.c @@ -38,7 +38,7 @@ #define SLCDC_PRV_LCDM1_SCOC_LCDON (0xC0) #define SLCDC_PRV_LCDM1_LCDVLM_THRESHOLD (3300) #define SLCDC_PRV_VLCD_CONTRAST_OFFSET (4) -#define SLCDC_PRV_CONTRAST_MAX_4BIAS (SLCDC_CONTRAST_6) +#define SLCDC_PRV_VLCD_DEFAULT (0x4U) /*********************************************************************************************************************** * Private function prototypes @@ -106,6 +106,14 @@ fsp_err_t R_SLCDC_Open (slcdc_ctrl_t * const p_ctrl, slcdc_cfg_t const * const p /* Start the SLCDC module */ R_BSP_MODULE_START(FSP_IP_SLCDC, 0); +#if BSP_FEATURE_SLCDC_HAS_VL1SEL + + /* Set voltage reference */ + R_SLCDC->VLCD = + (uint8_t) (((p_cfg->ref_volt_sel << R_SLCDC_VLCD_MDSET2_Pos) & R_SLCDC_VLCD_MDSET2_Msk) | + SLCDC_PRV_VLCD_DEFAULT); +#endif + /* Set Mode, waveform, timeslice and bias method */ R_SLCDC->LCDM0 = (uint8_t) ((p_cfg->drive_volt_gen << R_SLCDC_LCDM0_MDSET_Pos) + (p_cfg->waveform << R_SLCDC_LCDM0_LWAVE_Pos) + @@ -132,12 +140,17 @@ fsp_err_t R_SLCDC_Open (slcdc_ctrl_t * const p_ctrl, slcdc_cfg_t const * const p if (SLCDC_VOLT_INTERNAL == p_cfg->drive_volt_gen) { /* Set boost (contrast) setting */ + #if BSP_FEATURE_SLCDC_HAS_VL1SEL + R_SLCDC->VLCD = (uint8_t) (((R_SLCDC->VLCD) & R_SLCDC_VLCD_MDSET2_Msk) | + (p_cfg->contrast + SLCDC_PRV_VLCD_CONTRAST_OFFSET)); + #else R_SLCDC->VLCD = (uint8_t) (p_cfg->contrast + SLCDC_PRV_VLCD_CONTRAST_OFFSET); + #endif } else { /* Non-boost modes must use the default setting for VLCD */ - R_SLCDC->VLCD = (uint8_t) SLCDC_PRV_VLCD_CONTRAST_OFFSET; + R_SLCDC->VLCD_b.VLCD = (uint8_t) SLCDC_PRV_VLCD_CONTRAST_OFFSET; } #endif @@ -326,7 +339,7 @@ fsp_err_t R_SLCDC_SetContrast (slcdc_ctrl_t * const p_ctrl, slcdc_contrast_t con } /* Verify the new setting is within the range. */ - if ((SLCDC_BIAS_4 == p_cfg->bias_method) && (SLCDC_PRV_CONTRAST_MAX_4BIAS < contrast)) + if ((SLCDC_BIAS_4 == p_cfg->bias_method) && (BSP_FEATURE_SLCDC_CONTRAST_MAX_4BIAS < contrast)) { return FSP_ERR_UNSUPPORTED; } @@ -339,7 +352,12 @@ fsp_err_t R_SLCDC_SetContrast (slcdc_ctrl_t * const p_ctrl, slcdc_contrast_t con R_SLCDC->LCDM1_b.VLCON = 0; /* Set new voltage value. */ + #if BSP_FEATURE_SLCDC_HAS_VL1SEL + R_SLCDC->VLCD = + (uint8_t) (((R_SLCDC->VLCD) & R_SLCDC_VLCD_MDSET2_Msk) | (contrast + SLCDC_PRV_VLCD_CONTRAST_OFFSET)); + #else R_SLCDC->VLCD = (uint8_t) (contrast + SLCDC_PRV_VLCD_CONTRAST_OFFSET); + #endif /* Enable the voltage boost circuit */ R_SLCDC->LCDM1_b.VLCON = 1; @@ -364,9 +382,9 @@ fsp_err_t R_SLCDC_SetDisplayArea (slcdc_ctrl_t * const p_ctrl, slcdc_display_are FSP_ASSERT(p_instance_ctrl); FSP_ERROR_RETURN(SLCDC_CLOSED != p_instance_ctrl->open, FSP_ERR_NOT_OPEN); - /* When the number of time slices is eight, LCD display data registers + /* When the number of time slices is six or eight, LCD display data registers * (A-pattern, B-pattern, or blinking display) cannot be selected. */ - if (SLCDC_SLICE_8 == p_instance_ctrl->p_cfg->time_slice) + if (p_instance_ctrl->p_cfg->time_slice >= SLCDC_SLICE_6) { return FSP_ERR_UNSUPPORTED; } @@ -405,12 +423,22 @@ fsp_err_t R_SLCDC_Close (slcdc_ctrl_t * const p_ctrl) /* Disable voltage circuit */ R_SLCDC->LCDM1_b.VLCON = 0; + + #if BSP_FEATURE_SLCDC_HAS_VL1SEL + R_PFS->VLSEL.VL1SEL_b.SELVL = 0; + #endif #endif /* Switch to external resistance method to reduce idle power consumption (per RA4M1 User's Manual (R01UH0887EJ0100) * section 45.2.2 "LCD Mode Register 1 (LCDM1)" Note 2) */ R_SLCDC->LCDM0_b.MDSET = 0; +#if BSP_FEATURE_SLCDC_HAS_VL1SEL + + /* Switch to external resistance method (MREF_INTERNAL_007)*/ + R_SLCDC->VLCD_b.MDSET2 = 0; +#endif + /* Disable CGC register protection */ R_BSP_RegisterProtectDisable(BSP_REG_PROTECT_CGC); @@ -456,17 +484,30 @@ static fsp_err_t r_slcdc_check_display_mode (slcdc_cfg_t const * const p_cfg) slcdc_drive_volt_gen_t drive_volt_gen = p_cfg->drive_volt_gen; slcdc_waveform_t waveform = p_cfg->waveform; + #if BSP_FEATURE_SLCDC_HAS_VL1SEL + slcdc_ref_volt_sel_t ref_volt_sel = p_cfg->ref_volt_sel; + #endif + /* Pre-run a few boolean operations */ bool drive_is_external = (SLCDC_VOLT_EXTERNAL == drive_volt_gen); + #if BSP_FEATURE_SLCDC_HAS_INTERNAL_VOLT_GEN - bool drive_is_internal = (SLCDC_VOLT_INTERNAL == drive_volt_gen); + #if BSP_FEATURE_SLCDC_HAS_VL1SEL + drive_is_external = ((SLCDC_VOLT_EXTERNAL == drive_volt_gen) && + (ref_volt_sel == SLCDC_REF_INTERNAL_VL1_CAPACITOR_VCC_EXTERNAL)); + bool drive_is_invalid_external = ((SLCDC_VOLT_EXTERNAL == drive_volt_gen) && + (ref_volt_sel == SLCDC_REF_INTERNAL_VL2_CAPACITOR_VL4)); + bool internal_vl1_ref = ((SLCDC_VOLT_INTERNAL == drive_volt_gen) && + (ref_volt_sel == SLCDC_REF_INTERNAL_VL1_CAPACITOR_VCC_EXTERNAL)); + #endif #endif - bool bias_is_3 = (SLCDC_BIAS_3 == bias_method); - bool bias_is_2 = (SLCDC_BIAS_2 == bias_method); - bool slice_is_3 = (SLCDC_SLICE_3 == time_slice); - /* The below checks the configuration against the list of valid modes - * given in Table 45.6 of the RA4M1 User's Manual (R01UH0887EJ0100) */ + #if BSP_FEATURE_SLCDC_HAS_8_TIME_SLICE & !BSP_FEATURE_SLCDC_HAS_VL1SEL + bool drive_is_capacitor = (SLCDC_VOLT_CAPACITOR == drive_volt_gen); + #endif + + bool bias_is_3 = (SLCDC_BIAS_3 == bias_method); + bool bias_is_2 = (SLCDC_BIAS_2 == bias_method); #if !BSP_FEATURE_SLCDC_HAS_INTERNAL_VOLT_GEN if (!drive_is_external) @@ -475,37 +516,52 @@ static fsp_err_t r_slcdc_check_display_mode (slcdc_cfg_t const * const p_cfg) } #endif + #if BSP_FEATURE_SLCDC_HAS_VL1SEL & BSP_FEATURE_SLCDC_HAS_INTERNAL_VOLT_GEN + + /* The below checks the configuration against the list of valid modes (MREF_INTERNAL_008) */ + /* Check common compatibility modes */ - #if BSP_FEATURE_SLCDC_HAS_8_TIME_SLICE - if (((SLCDC_SLICE_8 == time_slice) && (SLCDC_BIAS_4 == bias_method) && (drive_is_external || drive_is_internal)) || - ((SLCDC_SLICE_4 == time_slice) && bias_is_3)) - #else - if ((SLCDC_SLICE_4 == time_slice) && bias_is_3) - #endif + if ((bias_is_3 && (time_slice > SLCDC_SLICE_2) && !drive_is_invalid_external) || + ((drive_is_external || internal_vl1_ref) && (SLCDC_BIAS_4 == bias_method) && (SLCDC_SLICE_8 == time_slice))) { - /* Do nothing (valid configuration) */ + return FSP_SUCCESS; } - else if (waveform == SLCDC_WAVE_A) + + /* Check further compatibility with Waveform A */ + if ((waveform == SLCDC_WAVE_A) && ((drive_is_external && bias_is_2 && (time_slice < SLCDC_SLICE_4)) || + (internal_vl1_ref && (SLCDC_BIAS_4 == bias_method) && + (SLCDC_SLICE_6 == time_slice)))) { - /* Check further compatibility with Waveform A */ - if ((slice_is_3 && bias_is_3) || - (drive_is_external && (bias_is_2 && (time_slice < SLCDC_SLICE_4)))) - { - /* Do nothing (valid configuration)*/ - } - else - { - return FSP_ERR_UNSUPPORTED; - } + return FSP_SUCCESS; } - else + + /* All other modes are unsupported for Waveform B */ + return FSP_ERR_UNSUPPORTED; + #else + + /* The below checks the configuration against the list of valid modes given in Table 45.6 of the RA4M1 User's Manual (R01UH0887EJ0100) */ + + /* Check common compatibility modes */ + #if BSP_FEATURE_SLCDC_HAS_8_TIME_SLICE + if (((SLCDC_SLICE_8 == time_slice) && (SLCDC_BIAS_4 == bias_method) && !drive_is_capacitor) || + ((SLCDC_SLICE_4 == time_slice) && bias_is_3)) + #else + if ((SLCDC_SLICE_4 == time_slice) && bias_is_3) + #endif { + return FSP_SUCCESS; + } - /* All other modes are unsupported for Waveform B */ - return FSP_ERR_UNSUPPORTED; + /* Check further compatibility with Waveform A */ + if ((waveform == SLCDC_WAVE_A) && (((SLCDC_SLICE_3 == time_slice) && bias_is_3) || + (drive_is_external && bias_is_2 && (time_slice < SLCDC_SLICE_4)))) + { + return FSP_SUCCESS; } - return FSP_SUCCESS; + /* All other modes are unsupported for Waveform B */ + return FSP_ERR_UNSUPPORTED; + #endif } #endif diff --git a/ra/fsp/src/r_usb_basic/r_usb_basic.c b/ra/fsp/src/r_usb_basic/r_usb_basic.c index e93cb673a..d84e82647 100644 --- a/ra/fsp/src/r_usb_basic/r_usb_basic.c +++ b/ra/fsp/src/r_usb_basic/r_usb_basic.c @@ -3457,6 +3457,8 @@ fsp_err_t R_USB_ClassTypeGet (usb_ctrl_t * const p_api_ctrl, usb_class_t * class { usb_instance_ctrl_t * p_ctrl = (usb_instance_ctrl_t *) p_api_ctrl; + p_ctrl->type = (usb_class_t) (p_ctrl->type | USB_VALUE_80H); + *class_type = p_ctrl->type; return FSP_SUCCESS; diff --git a/ra/fsp/src/r_usb_basic/src/driver/inc/r_usb_typedef.h b/ra/fsp/src/r_usb_basic/src/driver/inc/r_usb_typedef.h index c57f4dc14..912633f02 100644 --- a/ra/fsp/src/r_usb_basic/src/driver/inc/r_usb_typedef.h +++ b/ra/fsp/src/r_usb_basic/src/driver/inc/r_usb_typedef.h @@ -67,13 +67,18 @@ typedef void (* usb_cb_t)(struct usb_utr *, uint16_t, uint16_t); typedef struct usb_utr { - usb_mh_t msghead; /* Message header (for SH-solution) */ - usb_cb_t complete; /* Call Back Function Info */ - void const * p_tranadr; /* Transfer data Start address */ - uint32_t read_req_len; /* Read Request Length */ - uint32_t tranlen; /* Transfer data length */ - uint16_t * p_setup; /* Setup packet(for control only) */ - void * p_usr_data; + usb_mh_t msghead; /* Message header (for SH-solution) */ + usb_cb_t complete; /* Call Back Function Info */ + void const * p_tranadr; /* Transfer data Start address */ +#if (BSP_CFG_RTOS == 1) /* Azure RTOS */ + #if (USB_CFG_DMA == USB_CFG_ENABLE) + void const * p_tranadr_hold; + #endif /* #if (USB_CFG_DMA == USB_CFG_ENABLE) */ +#endif /* (BSP_CFG_RTOS == 1) */ + uint32_t read_req_len; /* Read Request Length */ + uint32_t tranlen; /* Transfer data length */ + uint16_t * p_setup; /* Setup packet(for control only) */ + void * p_usr_data; #if (BSP_CFG_RTOS != 0) usb_hdl_t cur_task_hdl; /* Task Handle */ #endif /* #if (BSP_CFG_RTOS != 0) */ diff --git a/ra/fsp/src/r_usb_pmsc/src/inc/r_usb_pmsc.h b/ra/fsp/src/r_usb_pmsc/src/inc/r_usb_pmsc.h index f0bf61e86..5fa73e099 100644 --- a/ra/fsp/src/r_usb_pmsc/src/inc/r_usb_pmsc.h +++ b/ra/fsp/src/r_usb_pmsc/src/inc/r_usb_pmsc.h @@ -167,11 +167,11 @@ typedef struct usb_msc_bcbwlun_t bcbwlun; usb_msc_bcbwcb_length_t bcbwcb_length; #if ((USB_CFG_DTC == USB_CFG_ENABLE) || (USB_CFG_DMA == USB_CFG_ENABLE)) - #if defined(BSP_MCU_GROUP_RA6M3) || defined(BSP_MCU_GROUP_RA6M5) + #if defined(USB_HIGH_SPEED_MODULE) uint8_t cbwcb[(16 + USB_VALUE_481)]; /* Hi-Speed USB_MSC_CBW_t:512Byte */ - #else /* defined(BSP_MCU_GROUP_RA6M3) || defined(BSP_MCU_GROUP_RA6M5) */ + #else /* defined(USB_HIGH_SPEED_MODULE) */ uint8_t cbwcb[(16 + USB_VALUE_33)]; /* Full-Speed USB_MSC_CBW_t:64Byte*/ - #endif /* defined(BSP_MCU_GROUP_RA6M3) || defined(BSP_MCU_GROUP_RA6M5) */ + #endif /* defined(USB_HIGH_SPEED_MODULE) */ #else /* ((USB_CFG_DTC == USB_CFG_ENABLE) || (USB_CFG_DMA == USB_CFG_ENABLE)) */ uint8_t cbwcb[16]; #endif /* ((USB_CFG_DTC == USB_CFG_ENABLE) || (USB_CFG_DMA == USB_CFG_ENABLE)) */ diff --git a/ra/fsp/src/rm_aws_sockets_wrapper_wifi_da16200/sockets_wrapper.c b/ra/fsp/src/rm_aws_sockets_wrapper_wifi_da16xxx/sockets_wrapper.c similarity index 94% rename from ra/fsp/src/rm_aws_sockets_wrapper_wifi_da16200/sockets_wrapper.c rename to ra/fsp/src/rm_aws_sockets_wrapper_wifi_da16xxx/sockets_wrapper.c index c1f7f4a32..60660a44d 100644 --- a/ra/fsp/src/rm_aws_sockets_wrapper_wifi_da16200/sockets_wrapper.c +++ b/ra/fsp/src/rm_aws_sockets_wrapper_wifi_da16xxx/sockets_wrapper.c @@ -41,7 +41,7 @@ #include "sockets_wrapper.h" /* WiFi includes. */ - #include "rm_wifi_onchip_da16200.h" + #include "rm_wifi_onchip_da16xxx.h" /* Configure logs for the functions in this file. */ #include "logging_levels.h" @@ -200,9 +200,9 @@ BaseType_t Sockets_Connect (Socket_t * pTcpSocket, } } - rm_wifi_onchip_da16200_avail_socket_get(&socketId); + rm_wifi_onchip_da16xxx_avail_socket_get(&socketId); - if ((g_sockets_num_allocated > WIFI_ONCHIP_DA16200_CFG_NUM_CREATEABLE_SOCKETS) || (socketId == UINT8_MAX)) + if ((g_sockets_num_allocated > WIFI_ONCHIP_DA16XXX_CFG_NUM_CREATEABLE_SOCKETS) || (socketId == UINT8_MAX)) { retConnect = SOCKETS_ENOSOCKETS; } @@ -211,7 +211,7 @@ BaseType_t Sockets_Connect (Socket_t * pTcpSocket, { /* Create the wrapped socket. */ err = - rm_wifi_onchip_da16200_socket_create(socketId, (uint32_t) SOCKETS_SOCK_STREAM, SOCKETS_IPPROTO_V4_DA16200); + rm_wifi_onchip_da16xxx_socket_create(socketId, (uint32_t) SOCKETS_SOCK_STREAM, SOCKETS_IPPROTO_V4_DA16XXX); if (FSP_SUCCESS != err) { IotLogError("Failed to create WiFi sockets. %d", err); @@ -221,7 +221,7 @@ BaseType_t Sockets_Connect (Socket_t * pTcpSocket, if (SOCKETS_ERROR_NONE == retConnect) { - if (g_sockets_num_allocated < WIFI_ONCHIP_DA16200_CFG_NUM_CREATEABLE_SOCKETS) + if (g_sockets_num_allocated < WIFI_ONCHIP_DA16XXX_CFG_NUM_CREATEABLE_SOCKETS) { g_sockets_num_allocated++; } @@ -243,7 +243,7 @@ BaseType_t Sockets_Connect (Socket_t * pTcpSocket, /* Perform a DNS lookup */ if (retConnect == SOCKETS_ERROR_NONE) { - err = rm_wifi_onchip_da16200_dns_query(pHostName, ipAddressArray); + err = rm_wifi_onchip_da16xxx_dns_query(pHostName, ipAddressArray); if (FSP_SUCCESS != err) { @@ -258,7 +258,7 @@ BaseType_t Sockets_Connect (Socket_t * pTcpSocket, ipAddress = ((uint32_t) (ipAddressArray[0]) << 24) + ((uint32_t) (ipAddressArray[1]) << 16) + ((uint32_t) (ipAddressArray[2]) << 8) + (uint32_t) (ipAddressArray[3]); - err = rm_wifi_onchip_da16200_tcp_connect(socketId, ipAddress, port); + err = rm_wifi_onchip_da16xxx_tcp_connect(socketId, ipAddress, port); if (FSP_SUCCESS != err) { @@ -306,7 +306,7 @@ void Sockets_Disconnect (Socket_t xSocket) /* Receive all the data before socket close. */ do { - recvLength = rm_wifi_onchip_da16200_recv(pWiFiSocketContext->socketId, + recvLength = rm_wifi_onchip_da16xxx_recv(pWiFiSocketContext->socketId, buf, 128, // NOLINT pWiFiSocketContext->receiveTimeout); @@ -314,7 +314,7 @@ void Sockets_Disconnect (Socket_t xSocket) } while (recvLength > 0); /* Close sockets. */ - if (FSP_SUCCESS != rm_wifi_onchip_da16200_socket_disconnect(pWiFiSocketContext->socketId)) + if (FSP_SUCCESS != rm_wifi_onchip_da16xxx_socket_disconnect(pWiFiSocketContext->socketId)) { IotLogWarn("Failed to destroy connection."); retClose = SOCKETS_SOCKET_ERROR; @@ -348,7 +348,7 @@ int32_t Sockets_Recv (Socket_t xSocket, void * pvBuffer, size_t xBufferLength) int32_t recvLength = 0; recvLength = - rm_wifi_onchip_da16200_recv(pWiFiSocketContext->socketId, + rm_wifi_onchip_da16xxx_recv(pWiFiSocketContext->socketId, buf, xBufferLength, pWiFiSocketContext->receiveTimeout); @@ -388,7 +388,7 @@ int32_t Sockets_Send (Socket_t xSocket, const void * pvBuffer, size_t xDataLengt else { sentLength = - rm_wifi_onchip_da16200_send(pWiFiSocketContext->socketId, buf, xDataLength, + rm_wifi_onchip_da16xxx_send(pWiFiSocketContext->socketId, buf, xDataLength, pWiFiSocketContext->sendTimeout); if (sentLength < 0) diff --git a/ra/fsp/src/rm_aws_sockets_wrapper_wifi_da16200/sockets_wrapper.h b/ra/fsp/src/rm_aws_sockets_wrapper_wifi_da16xxx/sockets_wrapper.h similarity index 100% rename from ra/fsp/src/rm_aws_sockets_wrapper_wifi_da16200/sockets_wrapper.h rename to ra/fsp/src/rm_aws_sockets_wrapper_wifi_da16xxx/sockets_wrapper.h diff --git a/ra/fsp/src/rm_block_media_ram/rm_block_media_ram.c b/ra/fsp/src/rm_block_media_ram/rm_block_media_ram.c new file mode 100644 index 000000000..f16f01428 --- /dev/null +++ b/ra/fsp/src/rm_block_media_ram/rm_block_media_ram.c @@ -0,0 +1,765 @@ +/*********************************************************************************************************************** + * Copyright [2020-2023] Renesas Electronics Corporation and/or its affiliates. All Rights Reserved. + * + * This software and documentation are supplied by Renesas Electronics America Inc. and may only be used with products + * of Renesas Electronics Corp. and its affiliates ("Renesas"). No other uses are authorized. Renesas products are + * sold pursuant to Renesas terms and conditions of sale. Purchasers are solely responsible for the selection and use + * of Renesas products and Renesas assumes no liability. No license, express or implied, to any intellectual property + * right is granted by Renesas. This software is protected under all applicable laws, including copyright laws. Renesas + * reserves the right to change or discontinue this software and/or this documentation. THE SOFTWARE AND DOCUMENTATION + * IS DELIVERED TO YOU "AS IS," AND RENESAS MAKES NO REPRESENTATIONS OR WARRANTIES, AND TO THE FULLEST EXTENT + * PERMISSIBLE UNDER APPLICABLE LAW, DISCLAIMS ALL WARRANTIES, WHETHER EXPLICITLY OR IMPLICITLY, INCLUDING WARRANTIES + * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, AND NONINFRINGEMENT, WITH RESPECT TO THE SOFTWARE OR + * DOCUMENTATION. RENESAS SHALL HAVE NO LIABILITY ARISING OUT OF ANY SECURITY VULNERABILITY OR BREACH. TO THE MAXIMUM + * EXTENT PERMITTED BY LAW, IN NO EVENT WILL RENESAS BE LIABLE TO YOU IN CONNECTION WITH THE SOFTWARE OR DOCUMENTATION + * (OR ANY PERSON OR ENTITY CLAIMING RIGHTS DERIVED FROM YOU) FOR ANY LOSS, DAMAGES, OR CLAIMS WHATSOEVER, INCLUDING, + * WITHOUT LIMITATION, ANY DIRECT, CONSEQUENTIAL, SPECIAL, INDIRECT, PUNITIVE, OR INCIDENTAL DAMAGES; ANY LOST PROFITS, + * OTHER ECONOMIC DAMAGE, PROPERTY DAMAGE, OR PERSONAL INJURY; AND EVEN IF RENESAS HAS BEEN ADVISED OF THE POSSIBILITY + * OF SUCH LOSS, DAMAGES, CLAIMS OR COSTS. + **********************************************************************************************************************/ + +/*********************************************************************************************************************** + * Includes + **********************************************************************************************************************/ + +#include "rm_block_media_ram.h" +#include "rm_block_media_ram_cfg.h" + +/*********************************************************************************************************************** + * Macro definitions + **********************************************************************************************************************/ +#define VALUE_65536 (65536) +#define VALUE_4096 (4096) +#define VALUE_512 (512) +#define VALUE_341 (341) +#define VALUE_256 (256) +#define VALUE_128 (128) +#define VALUE_16 (16UL) +#define VALUE_EBH (0xEB) +#define VALUE_3CH (0x3C) +#define VALUE_90H (0x90) +#define VALUE_FFH (0xFF) +#define VALUE_20H (0x20) + +#define STRG_SECTSIZE (VALUE_512) +#define STRG_TOTALSECT (RM_BLOCK_MEIDA_RAM_CFG_MEDIA_SIZE / STRG_SECTSIZE) + +#define RAMDISK_MEDIATYPE (0xF8U) +#define RAMDISK_SIGNATURE (0xAA55U) + +#define RAMDISK_CLSTSIZE (0x01U) +#define RAMDISK_FATNUM (0x02U) + +/* "SRAM" in ASCII, used to identify general RM_BLOCK_MEDIA_RAM control block */ +#define RM_BLOCK_MEDIA_RAM_OPEN (0x5352414D) + +/* + * If the number of data areas of clusters is smaller + * than that of value 4085(4096-11), it is FAT12. + * If the number of data areas of clusters is smaller + * than that of value 65525(65536-11), it is FAT16. + * Otherwise it is FAT32. + */ + +#if STRG_TOTALSECT < VALUE_4096 + #define RAMDISK_FATLENGTH (0x155UL) /* FAT12 */ +#else /* STRG_TOTALSECT < 4096 */ + #if STRG_TOTALSECT < VALUE_65536 + #define RAMDISK_FATLENGTH (0x100UL) /* FAT16 */ + #else /* STRG_TOTALSECT < 65536 */ + #define RAMDISK_FATLENGTH (0x80UL) /* FAT32 */ + #endif /* STRG_TOTALSECT < 65536 */ +#endif /* STRG_TOTALSECT < 4096 */ + +#define RAMDISK_FATSIZE (((STRG_TOTALSECT - 8) / RAMDISK_FATLENGTH) + 1) + +/*********************************************************************************************************************** + * Typedef definitions + **********************************************************************************************************************/ + +/*********************************************************************************************************************** + * Private function prototypes + **********************************************************************************************************************/ + +/*********************************************************************************************************************** + * Private global variables + **********************************************************************************************************************/ + +/* STRG_SECTSIZE = 512(Define for r_media_driver_api_config.h) */ +static const uint8_t g_block_media_ram_boot_sector[STRG_SECTSIZE] = +{ + /* Master boot record (FAT16) */ + /* 0x00:JMP code (PBR) */ + VALUE_EBH, VALUE_3CH, VALUE_90H, + + /* 0x03:OEM name */ + 'M', 'S', 'D', + 'O', + 'S', '5', '.', + '0', + + /* 0x0B:Sector size */ + (uint8_t) (STRG_SECTSIZE & VALUE_FFH), ((uint8_t) (STRG_SECTSIZE >> 8) & VALUE_FFH), + + /* 0x0D:Cluster size */ + RAMDISK_CLSTSIZE, + + /* 0x0E:reserved (FAT entry) */ + 0x02, 0x00, + + /* 0x10:FAT number */ + RAMDISK_FATNUM, + + /* 0x11:ROOT entry address */ + 0x00, 0x02, + + /* 0x13:Total sector(16bit) */ +#if STRG_TOTALSECT < VALUE_65536 + (uint8_t) (STRG_TOTALSECT & VALUE_FFH), ((uint8_t) (STRG_TOTALSECT >> 8) & VALUE_FFH), +#else + 0x00, 0x00, +#endif + + /* 0x15:Media type */ + RAMDISK_MEDIATYPE, + + /* 0x16:FAT size */ + (uint8_t) (RAMDISK_FATSIZE & VALUE_FFH), ((uint8_t) (RAMDISK_FATSIZE >> 8) & VALUE_FFH), + + /* 0x18:Track sector */ + 0x00, 0x00, + + /* 0x1A:Head number */ + 0x00, 0x00, + + /* 0x1C:Offset sector */ + 0x00, 0x00, 0x00, + 0x00, + + /* 0x20:Total sector(32bit) */ +#if STRG_TOTALSECT < VALUE_65536 + 0x00, 0x00, 0x00, + 0x00, +#else + (uint8_t) (STRG_TOTALSECT & VALUE_FFH), + ((uint8_t) (STRG_TOTALSECT >> 8) & VALUE_FFH), + ((uint8_t) (STRG_TOTALSECT >> 16) & VALUE_FFH), + ((uint8_t) (STRG_TOTALSECT >> 24) & VALUE_FFH), +#endif + + /* 0x24:Drive number */ + 0x00, + + /* 0x25:reserved */ + 0x00, + + /* 0x26:Boot signature */ + 0x00, + + /* 0x27:Volume serial number */ + 0x00, 0x00, 0x00, + 0x00, + + /* 0x2B:Volume label */ + 'N', 'O', ' ', + 'N', + 'A', 'M', 'E', + ' ', ' ', ' ', + ' ', + + /* 0x36:File system type */ +#if RAMDISK_FATLENGTH == VALUE_341 + 'F', 'A', 'T', + '1', + '2', ' ', ' ', + ' ', +#endif /* RAMDISK_FATLENGTH == 341 */ + +#if RAMDISK_FATLENGTH == VALUE_256 + 'F', 'A', 'T', + '1', + '6', ' ', ' ', + ' ', +#endif /* RAMDISK_FATLENGTH == 256 */ + +#if RAMDISK_FATLENGTH == VALUE_128 + 'F', 'A', 'T', + '3', + '2', ' ', ' ', + ' ', +#endif /* RAMDISK_FATLENGTH == 128 */ + + 0x00, 0x00, 0x00, + 0x00, + 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, + 0x00, 0x00, + 0x00, 0x00, 0x00, + 0x00, + 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, + 0x00, 0x00, + 0x00, 0x00, 0x00, + 0x00, + 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, + 0x00, 0x00, + 0x00, 0x00, 0x00, + 0x00, + 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, + 0x00, 0x00, + 0x00, 0x00, 0x00, + 0x00, + 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, + 0x00, 0x00, + 0x00, 0x00, 0x00, + 0x00, + 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, + 0x00, 0x00, + 0x00, 0x00, 0x00, + 0x00, + 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, + 0x00, 0x00, + 0x00, 0x00, 0x00, + 0x00, + 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, + 0x00, 0x00, + 0x00, 0x00, 0x00, + 0x00, + 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, + 0x00, 0x00, + 0x00, 0x00, 0x00, + 0x00, + 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, + 0x00, 0x00, + 0x00, 0x00, 0x00, + 0x00, + 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, + 0x00, 0x00, + 0x00, 0x00, 0x00, + 0x00, + 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, + 0x00, 0x00, + 0x00, 0x00, 0x00, + 0x00, + 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, + 0x00, 0x00, + 0x00, 0x00, 0x00, + 0x00, + 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, + 0x00, 0x00, + 0x00, 0x00, 0x00, + 0x00, + 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, + 0x00, 0x00, + 0x00, 0x00, 0x00, + 0x00, + 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, + 0x00, 0x00, + 0x00, 0x00, 0x00, + 0x00, + 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, + 0x00, 0x00, + 0x00, 0x00, 0x00, + 0x00, + 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, + 0x00, 0x00, + 0x00, 0x00, 0x00, + 0x00, + 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, + 0x00, 0x00, + 0x00, 0x00, 0x00, + 0x00, + 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, + 0x00, 0x00, + 0x00, 0x00, 0x00, + 0x00, + 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, + 0x00, 0x00, + 0x00, 0x00, 0x00, + 0x00, + 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, + 0x00, 0x00, + 0x00, 0x00, 0x00, + 0x00, + 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, + 0x00, 0x00, + 0x00, 0x00, 0x00, + 0x00, + 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, + 0x00, 0x00, + 0x00, 0x00, 0x00, + 0x00, + 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, + + /* 0x1FEB:signature */ + (uint8_t) (RAMDISK_SIGNATURE & VALUE_FFH), ((uint8_t) (RAMDISK_SIGNATURE >> 8) & VALUE_FFH), +}; + +/* STRG_SECTSIZE = 512(Define for r_media_driver_api_config.h) */ +static const uint8_t g_block_media_ram_table1[STRG_SECTSIZE] = +{ + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, +}; + +/* STRG_SECTSIZE = 512(Define for r_media_driver_api_config.h) */ +static const uint8_t g_block_media_ram_tablefat1[STRG_SECTSIZE * RAMDISK_FATSIZE] = +{ +#if RAMDISK_FATLENGTH == VALUE_341 /* FAT12 */ + RAMDISK_MEDIATYPE, VALUE_FFH, VALUE_FFH, 0x00, 0x00, 0x00, + 0x00, + 0x00, /* FAT-ID */ +#endif /* RAMDISK_FATLENGTH == 341 */ + +#if RAMDISK_FATLENGTH == VALUE_256 /* FAT16 */ + RAMDISK_MEDIATYPE, VALUE_FFH, VALUE_FFH, VALUE_FFH, 0x00, 0x00, + 0x00, + 0x00, /* FAT-ID */ +#endif /* RAMDISK_FATLENGTH == 256 */ + +#if RAMDISK_FATLENGTH == VALUE_128 /* FAT32 */ + RAMDISK_MEDIATYPE, VALUE_FFH, VALUE_FFH, VALUE_FFH, VALUE_FFH, VALUE_FFH, + VALUE_FFH, + VALUE_FFH, /* FAT-ID */ +#endif /* RAMDISK_FATLENGTH == 128 */ + + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, + 0x00, +}; + +/* STRG_SECTSIZE = 512(Define for r_media_driver_api_config.h) */ +static const uint8_t g_block_media_ram_tablefat2[STRG_SECTSIZE * RAMDISK_FATSIZE] = +{ +#if RAMDISK_FATLENGTH == VALUE_341 /* FAT12 */ + RAMDISK_MEDIATYPE, VALUE_FFH, VALUE_FFH, 0x00, 0x00, 0x00, + 0x00, + 0x00, /* FAT-ID */ +#endif /* RAMDISK_FATLENGTH == 341 */ + +#if RAMDISK_FATLENGTH == VALUE_256 /* FAT16 */ + RAMDISK_MEDIATYPE, VALUE_FFH, VALUE_FFH, VALUE_FFH, 0x00, 0x00, + 0x00, + 0x00, /* FAT-ID */ +#endif /* RAMDISK_FATLENGTH == 256 */ + +#if RAMDISK_FATLENGTH == VALUE_128 /* FAT32 */ + RAMDISK_MEDIATYPE, VALUE_FFH, VALUE_FFH, VALUE_FFH, VALUE_FFH, VALUE_FFH, + VALUE_FFH, + VALUE_FFH, /* FAT-ID */ +#endif /* RAMDISK_FATLENGTH == 128 */ + + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, + 0x00, +}; + +/* Size:8192 STRG_SECTSIZE = 512(Define for r_media_driver_api_config.h) */ +static const uint8_t g_block_media_ram_rootdir[STRG_SECTSIZE * 16UL] = +{ + 'S', 'A', 'M', 'P', 'L', 'E', ' ', ' ', + VALUE_20H, VALUE_20H, VALUE_20H, 0x08, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, +}; + +static uint8_t g_block_media_ram_area[RM_BLOCK_MEIDA_RAM_CFG_MEDIA_SIZE]; + +/*********************************************************************************************************************** + * Global Variables + **********************************************************************************************************************/ +const rm_block_media_api_t g_rm_block_media_on_ram_media = +{ + .open = RM_BLOCK_MEDIA_RAM_Open, + .mediaInit = RM_BLOCK_MEDIA_RAM_MediaInit, + .read = RM_BLOCK_MEDIA_RAM_Read, + .write = RM_BLOCK_MEDIA_RAM_Write, + .erase = RM_BLOCK_MEDIA_RAM_Erase, + .infoGet = RM_BLOCK_MEDIA_RAM_InfoGet, + .statusGet = RM_BLOCK_MEDIA_RAM_StatusGet, + .close = RM_BLOCK_MEDIA_RAM_Close, +}; + +/*******************************************************************************************************************//** + * @addtogroup RM_BLOCK_MEDIA_RAM + * @{ + **********************************************************************************************************************/ + +/*********************************************************************************************************************** + * Functions + **********************************************************************************************************************/ + +/*******************************************************************************************************************//** + * Opens the module. + * + * Implements @ref rm_block_media_api_t::open(). + * + * @retval FSP_SUCCESS Module is available and is now open. + * @retval FSP_ERR_ASSERTION An input parameter is invalid. + * @retval FSP_ERR_ALREADY_OPEN Module has already been opened with this instance of the control + * structure. + * + * @return See @ref RENESAS_ERROR_CODES or functions called by this function for other possible return codes. + * This function calls: + **********************************************************************************************************************/ +fsp_err_t RM_BLOCK_MEDIA_RAM_Open (rm_block_media_ctrl_t * const p_ctrl, rm_block_media_cfg_t const * const p_cfg) +{ + rm_block_media_ram_instance_ctrl_t * p_instance_ctrl = (rm_block_media_ram_instance_ctrl_t *) p_ctrl; + +#if RM_BLOCK_MEDIA_RAM_CFG_PARAM_CHECKING_ENABLE + FSP_ASSERT(p_ctrl); + FSP_ASSERT(p_cfg); + + FSP_ERROR_RETURN(0UL == p_instance_ctrl->open, FSP_ERR_ALREADY_OPEN); +#endif /* RM_BLOCK_MEDIA_RAM_CFG_PARAM_CHECKING_ENABLE */ + + p_instance_ctrl->p_callback = p_cfg->p_callback; + p_instance_ctrl->p_context = p_cfg->p_context; + p_instance_ctrl->p_callback_memory = NULL; + p_instance_ctrl->initialized = false; + p_instance_ctrl->write_protected = false; + + p_instance_ctrl->open = RM_BLOCK_MEDIA_RAM_OPEN; + + return FSP_SUCCESS; +} + +/*******************************************************************************************************************//** + * Initializes the RAM media area. + * + * Implements @ref rm_block_media_api_t::mediaInit(). + * + * @retval FSP_SUCCESS Module is initialized and ready to access the memory device. + * @retval FSP_ERR_ASSERTION An input parameter is invalid. + * @retval FSP_ERR_NOT_OPEN Module is not open. + * + * @return See @ref RENESAS_ERROR_CODES or functions called by this function for other possible return codes. + **********************************************************************************************************************/ +fsp_err_t RM_BLOCK_MEDIA_RAM_MediaInit (rm_block_media_ctrl_t * const p_ctrl) +{ + uint32_t adr; + uint32_t start_address; + rm_block_media_callback_args_t block_media_ram_args; + rm_block_media_ram_instance_ctrl_t * p_instance_ctrl = (rm_block_media_ram_instance_ctrl_t *) p_ctrl; + +#if RM_BLOCK_MEDIA_RAM_CFG_PARAM_CHECKING_ENABLE + FSP_ASSERT(NULL != p_instance_ctrl); + FSP_ERROR_RETURN(RM_BLOCK_MEDIA_RAM_OPEN == p_instance_ctrl->open, FSP_ERR_NOT_OPEN); +#endif /* RM_BLOCK_MEDIA_RAM_CFG_PARAM_CHECKING_ENABLE */ + + start_address = (uint32_t) &g_block_media_ram_area[0]; + + adr = start_address; + memcpy((void *) adr, (void *) &g_block_media_ram_boot_sector, STRG_SECTSIZE); + + adr += (STRG_SECTSIZE); + memcpy((void *) adr, (void *) &g_block_media_ram_table1, STRG_SECTSIZE); + + adr += (STRG_SECTSIZE); + memcpy((void *) adr, (void *) &g_block_media_ram_tablefat1, (STRG_SECTSIZE * RAMDISK_FATSIZE)); + + adr += (STRG_SECTSIZE * RAMDISK_FATSIZE); + memcpy((void *) adr, (void *) &g_block_media_ram_tablefat2, (STRG_SECTSIZE * RAMDISK_FATSIZE)); + + adr += (STRG_SECTSIZE * RAMDISK_FATSIZE); + memcpy((void *) adr, (void *) &g_block_media_ram_rootdir, (STRG_SECTSIZE * VALUE_16)); + + adr += (STRG_SECTSIZE * VALUE_16); /* rootdir are size */ + + memset((void *) adr, 0, (RM_BLOCK_MEIDA_RAM_CFG_MEDIA_SIZE - (adr - start_address))); /* user media area zero clear */ + + if (NULL != p_instance_ctrl->p_callback) + { + block_media_ram_args.event = RM_BLOCK_MEDIA_EVENT_OPERATION_COMPLETE; + p_instance_ctrl->p_callback(&block_media_ram_args); + } + + p_instance_ctrl->initialized = true; + + return FSP_SUCCESS; +} + +/*******************************************************************************************************************//** + * Reads data from RAM media. + * @ref rm_block_media_api_t::read(). + * + * This function blocks until the data is read into the destination buffer. + * + * @retval FSP_SUCCESS Data read successfully. + * @retval FSP_ERR_ASSERTION An input parameter is invalid. + * @retval FSP_ERR_NOT_OPEN Module is not open. + * @retval FSP_ERR_NOT_INITIALIZED Module has not been initialized. + * + * @return See @ref RENESAS_ERROR_CODES or functions called by this function for other possible return codes. + **********************************************************************************************************************/ +fsp_err_t RM_BLOCK_MEDIA_RAM_Read (rm_block_media_ctrl_t * const p_ctrl, + uint8_t * const p_dest_address, + uint32_t const block_address, + uint32_t const num_blocks) +{ + uint32_t start_address; + rm_block_media_callback_args_t block_media_ram_args; + rm_block_media_ram_instance_ctrl_t * p_instance_ctrl = (rm_block_media_ram_instance_ctrl_t *) p_ctrl; + +#if RM_BLOCK_MEDIA_RAM_CFG_PARAM_CHECKING_ENABLE + FSP_ASSERT(p_ctrl); + FSP_ASSERT(p_dest_address); + FSP_ASSERT(num_blocks); +#endif /* RM_BLOCK_MEDIA_RAM_CFG_PARAM_CHECKING_ENABLE */ + + FSP_ERROR_RETURN(RM_BLOCK_MEDIA_RAM_OPEN == p_instance_ctrl->open, FSP_ERR_NOT_OPEN); + FSP_ERROR_RETURN(true == p_instance_ctrl->initialized, FSP_ERR_NOT_INITIALIZED); + + start_address = (uint32_t) &g_block_media_ram_area[0]; + + /* Copy 1 block from specified ram disk block address to read_buffer. */ + memcpy(p_dest_address, (void *) (start_address + (block_address * STRG_SECTSIZE)), (STRG_SECTSIZE * num_blocks)); + + if (NULL != p_instance_ctrl->p_callback) + { + block_media_ram_args.event = RM_BLOCK_MEDIA_EVENT_OPERATION_COMPLETE; + p_instance_ctrl->p_callback(&block_media_ram_args); + } + + return FSP_SUCCESS; +} + +/*******************************************************************************************************************//** + * Writes data to RAM media. + * @ref rm_block_media_api_t::write(). + * + * This function blocks until the write operation completes. + * + * @retval FSP_SUCCESS Write finished successfully. + * @retval FSP_ERR_ASSERTION An input parameter is invalid. + * @retval FSP_ERR_NOT_OPEN Module is not open. + * @retval FSP_ERR_NOT_INITIALIZED Module has not been initialized. + * + * @return See @ref RENESAS_ERROR_CODES or functions called by this function for other possible return codes. + **********************************************************************************************************************/ +fsp_err_t RM_BLOCK_MEDIA_RAM_Write (rm_block_media_ctrl_t * const p_ctrl, + uint8_t const * const p_src_address, + uint32_t const block_address, + uint32_t const num_blocks) +{ + uint32_t start_address; + rm_block_media_callback_args_t block_media_ram_args; + rm_block_media_ram_instance_ctrl_t * p_instance_ctrl = (rm_block_media_ram_instance_ctrl_t *) p_ctrl; + +#if RM_BLOCK_MEDIA_RAM_CFG_PARAM_CHECKING_ENABLE + FSP_ASSERT(p_ctrl); + FSP_ASSERT(p_src_address); + FSP_ASSERT(num_blocks); +#endif /* RM_BLOCK_MEDIA_RAM_CFG_PARAM_CHECKING_ENABLE */ + + FSP_ERROR_RETURN(RM_BLOCK_MEDIA_RAM_OPEN == p_instance_ctrl->open, FSP_ERR_NOT_OPEN); + FSP_ERROR_RETURN(true == p_instance_ctrl->initialized, FSP_ERR_NOT_INITIALIZED); + + start_address = (uint32_t) &g_block_media_ram_area[0]; + + /* Copy 1 block from write_buffer to appropriate block address in ram disk. */ + memcpy((void *) (start_address + (block_address * STRG_SECTSIZE)), p_src_address, (STRG_SECTSIZE * num_blocks)); + + if (NULL != p_instance_ctrl->p_callback) + { + block_media_ram_args.event = RM_BLOCK_MEDIA_EVENT_OPERATION_COMPLETE; + p_instance_ctrl->p_callback(&block_media_ram_args); + } + + return FSP_SUCCESS; +} + +/*******************************************************************************************************************//** + * Erases sectors of RAM media. + * @ref rm_block_media_api_t::erase(). + * + * This function blocks until erase is complete. + * + * @retval FSP_SUCCESS Erase operation requested. + * @retval FSP_ERR_ASSERTION An input parameter is invalid. + * @retval FSP_ERR_NOT_OPEN Module is not open. + * @retval FSP_ERR_NOT_INITIALIZED Module has not been initialized. + * + * @return See @ref RENESAS_ERROR_CODES or functions called by this function for other possible return codes. + **********************************************************************************************************************/ +fsp_err_t RM_BLOCK_MEDIA_RAM_Erase (rm_block_media_ctrl_t * const p_ctrl, + uint32_t const block_address, + uint32_t const num_blocks) +{ + uint32_t start_address; + + rm_block_media_callback_args_t block_media_ram_args; + rm_block_media_ram_instance_ctrl_t * p_instance_ctrl = (rm_block_media_ram_instance_ctrl_t *) p_ctrl; + +#if RM_BLOCK_MEDIA_RAM_CFG_PARAM_CHECKING_ENABLE + FSP_ASSERT(p_ctrl); + FSP_ASSERT(num_blocks); +#endif /* RM_BLOCK_MEDIA_RAM_CFG_PARAM_CHECKING_ENABLE */ + + FSP_ERROR_RETURN(RM_BLOCK_MEDIA_RAM_OPEN == p_instance_ctrl->open, FSP_ERR_NOT_OPEN); + FSP_ERROR_RETURN(true == p_instance_ctrl->initialized, FSP_ERR_NOT_INITIALIZED); + + start_address = (uint32_t) &g_block_media_ram_area[0]; + + memset((void *) (start_address + (block_address * STRG_SECTSIZE)), 0, (STRG_SECTSIZE * num_blocks)); + + if (NULL != p_instance_ctrl->p_callback) + { + block_media_ram_args.event = RM_BLOCK_MEDIA_EVENT_OPERATION_COMPLETE; + p_instance_ctrl->p_callback(&block_media_ram_args); + } + + return FSP_SUCCESS; +} + +/*******************************************************************************************************************//** + * Provides driver status. + * @ref rm_block_media_api_t::statusGet(). + * + * @retval FSP_SUCCESS Status stored in p_status. + * @retval FSP_ERR_ASSERTION An input parameter is invalid. + * @retval FSP_ERR_NOT_OPEN Module is not open. + **********************************************************************************************************************/ +fsp_err_t RM_BLOCK_MEDIA_RAM_StatusGet (rm_block_media_ctrl_t * const p_api_ctrl, + rm_block_media_status_t * const p_status) +{ + rm_block_media_ram_instance_ctrl_t * p_instance_ctrl = (rm_block_media_ram_instance_ctrl_t *) p_api_ctrl; + +#if RM_BLOCK_MEDIA_RAM_CFG_PARAM_CHECKING_ENABLE + FSP_ASSERT(p_api_ctrl); + FSP_ASSERT(p_status); + FSP_ERROR_RETURN(RM_BLOCK_MEDIA_RAM_OPEN == p_instance_ctrl->open, FSP_ERR_NOT_OPEN); +#endif /* RM_BLOCK_MEDIA_RAM_CFG_PARAM_CHECKING_ENABLE */ + + p_status->media_inserted = true; + p_status->initialized = p_instance_ctrl->initialized; + p_status->busy = false; + + return FSP_SUCCESS; +} + +/*******************************************************************************************************************//** + * Retrieves module information. + * @ref rm_block_media_api_t::infoGet(). + * + * @retval FSP_SUCCESS Erase operation requested. + * @retval FSP_ERR_ASSERTION An input parameter is invalid. + * @retval FSP_ERR_NOT_OPEN Module is not open. + **********************************************************************************************************************/ +fsp_err_t RM_BLOCK_MEDIA_RAM_InfoGet (rm_block_media_ctrl_t * const p_ctrl, rm_block_media_info_t * const p_info) +{ + rm_block_media_ram_instance_ctrl_t * p_instance_ctrl = (rm_block_media_ram_instance_ctrl_t *) p_ctrl; + +#if RM_BLOCK_MEDIA_RAM_CFG_PARAM_CHECKING_ENABLE + FSP_ASSERT(p_ctrl); + FSP_ASSERT(p_info); + FSP_ERROR_RETURN(RM_BLOCK_MEDIA_RAM_OPEN == p_instance_ctrl->open, FSP_ERR_NOT_OPEN); +#else /* RM_BLOCK_MEDIA_RAM_CFG_PARAM_CHECKING_ENABLE */ + FSP_PARAMETER_NOT_USED(p_instance_ctrl); +#endif /* RM_BLOCK_MEDIA_RAM_CFG_PARAM_CHECKING_ENABLE */ + + p_info->sector_size_bytes = STRG_SECTSIZE; + p_info->num_sectors = (RM_BLOCK_MEIDA_RAM_CFG_MEDIA_SIZE / STRG_SECTSIZE); + p_info->reentrant = false; + p_info->write_protected = false; + + return FSP_SUCCESS; +} + +/*******************************************************************************************************************//** + * Closes an open SD/MMC device. Implements @ref rm_block_media_api_t::close(). + * + * @retval FSP_SUCCESS Successful close. + * @retval FSP_ERR_ASSERTION An input parameter is invalid. + * @retval FSP_ERR_NOT_OPEN Module is not open. + **********************************************************************************************************************/ +fsp_err_t RM_BLOCK_MEDIA_RAM_Close (rm_block_media_ctrl_t * const p_ctrl) +{ + rm_block_media_ram_instance_ctrl_t * p_instance_ctrl = (rm_block_media_ram_instance_ctrl_t *) p_ctrl; + +#if RM_BLOCK_MEDIA_RAM_CFG_PARAM_CHECKING_ENABLE + FSP_ASSERT(p_ctrl); + FSP_ERROR_RETURN(RM_BLOCK_MEDIA_RAM_OPEN == p_instance_ctrl->open, FSP_ERR_NOT_OPEN); +#endif /* RM_BLOCK_MEDIA_RAM_CFG_PARAM_CHECKING_ENABLE */ + + p_instance_ctrl->initialized = false; + p_instance_ctrl->open = 0UL; + + return FSP_SUCCESS; +} + +/*******************************************************************************************************************//** + * @} (end addtogroup RM_BLOCK_MEDIA_RAM) + **********************************************************************************************************************/ diff --git a/ra/fsp/src/rm_comms_lock/rm_comms_lock.c b/ra/fsp/src/rm_comms_lock/rm_comms_lock.c new file mode 100644 index 000000000..4c66a4e8e --- /dev/null +++ b/ra/fsp/src/rm_comms_lock/rm_comms_lock.c @@ -0,0 +1,215 @@ +/*********************************************************************************************************************** + * Copyright [2020-2023] Renesas Electronics Corporation and/or its affiliates. All Rights Reserved. + * + * This software and documentation are supplied by Renesas Electronics America Inc. and may only be used with products + * of Renesas Electronics Corp. and its affiliates ("Renesas"). No other uses are authorized. Renesas products are + * sold pursuant to Renesas terms and conditions of sale. Purchasers are solely responsible for the selection and use + * of Renesas products and Renesas assumes no liability. No license, express or implied, to any intellectual property + * right is granted by Renesas. This software is protected under all applicable laws, including copyright laws. Renesas + * reserves the right to change or discontinue this software and/or this documentation. THE SOFTWARE AND DOCUMENTATION + * IS DELIVERED TO YOU "AS IS," AND RENESAS MAKES NO REPRESENTATIONS OR WARRANTIES, AND TO THE FULLEST EXTENT + * PERMISSIBLE UNDER APPLICABLE LAW, DISCLAIMS ALL WARRANTIES, WHETHER EXPLICITLY OR IMPLICITLY, INCLUDING WARRANTIES + * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, AND NONINFRINGEMENT, WITH RESPECT TO THE SOFTWARE OR + * DOCUMENTATION. RENESAS SHALL HAVE NO LIABILITY ARISING OUT OF ANY SECURITY VULNERABILITY OR BREACH. TO THE MAXIMUM + * EXTENT PERMITTED BY LAW, IN NO EVENT WILL RENESAS BE LIABLE TO YOU IN CONNECTION WITH THE SOFTWARE OR DOCUMENTATION + * (OR ANY PERSON OR ENTITY CLAIMING RIGHTS DERIVED FROM YOU) FOR ANY LOSS, DAMAGES, OR CLAIMS WHATSOEVER, INCLUDING, + * WITHOUT LIMITATION, ANY DIRECT, CONSEQUENTIAL, SPECIAL, INDIRECT, PUNITIVE, OR INCIDENTAL DAMAGES; ANY LOST PROFITS, + * OTHER ECONOMIC DAMAGE, PROPERTY DAMAGE, OR PERSONAL INJURY; AND EVEN IF RENESAS HAS BEEN ADVISED OF THE POSSIBILITY + * OF SUCH LOSS, DAMAGES, CLAIMS OR COSTS. + **********************************************************************************************************************/ + +#include "rm_comms_lock.h" + +#if BSP_CFG_RTOS + +/********************************************************************************************************************** + * @brief Initialize a recursive mutex. + * + * @retval FSP_SUCCESS successfully initialized. + * @retval FSP_ERR_INTERNAL RTOS internal error. + * @retval FSP_ERR_UNSUPPORTED RTOS not supported. + *********************************************************************************************************************/ +fsp_err_t rm_comms_recursive_mutex_initialize (rm_comms_mutex_t * p_mutex) +{ + fsp_err_t ret = FSP_SUCCESS; + + #if BSP_CFG_RTOS == 1 + UINT status = tx_mutex_create(&p_mutex->handle, p_mutex->p_name, TX_INHERIT); + FSP_ERROR_RETURN(TX_SUCCESS == status, FSP_ERR_INTERNAL); + #elif BSP_CFG_RTOS == 2 + p_mutex->handle = xSemaphoreCreateRecursiveMutexStatic(&p_mutex->buffer); + FSP_ERROR_RETURN(p_mutex->handle != NULL, FSP_ERR_INTERNAL); + #else + ret = FSP_ERR_UNSUPPORTED; + #endif + + return ret; +} + +/********************************************************************************************************************** + * @brief Desctroy a recursive mutex. + * + * @retval FSP_SUCCESS successfully configured. + * @retval FSP_ERR_INTERNAL RTOS internal error. + * @retval FSP_ERR_UNSUPPORTED RTOS not supported. + *********************************************************************************************************************/ +fsp_err_t rm_comms_recursive_mutex_destroy (rm_comms_mutex_t * p_mutex) +{ + fsp_err_t ret = FSP_SUCCESS; + + #if BSP_CFG_RTOS == 1 + UINT status = tx_mutex_delete(&p_mutex->handle); + FSP_ERROR_RETURN(TX_SUCCESS == status, FSP_ERR_INTERNAL); + #elif BSP_CFG_RTOS == 2 + vSemaphoreDelete(p_mutex->handle); + #else + ret = FSP_ERR_UNSUPPORTED; + #endif + + return ret; +} + +/********************************************************************************************************************** + * @brief Acquire a recursive mutex. + * + * @retval FSP_SUCCESS successfully configured. + * @retval FSP_ERR_INTERNAL RTOS internal error. + * @retval FSP_ERR_UNSUPPORTED RTOS not supported. + *********************************************************************************************************************/ +fsp_err_t rm_comms_recursive_mutex_acquire (rm_comms_mutex_t * p_mutex, uint32_t const timeout) +{ + fsp_err_t ret = FSP_SUCCESS; + + #if BSP_CFG_RTOS == 1 // ThreadX + UINT status = tx_mutex_get(&p_mutex->handle, (ULONG) timeout); + FSP_ERROR_RETURN(TX_SUCCESS == status, FSP_ERR_INTERNAL); + #elif BSP_CFG_RTOS == 2 // FreeRTOS + BaseType_t sem_err = xSemaphoreTakeRecursive(p_mutex->handle, (TickType_t) timeout); + FSP_ERROR_RETURN(pdTRUE == sem_err, FSP_ERR_INTERNAL); + #else + ret = FSP_ERR_UNSUPPORTED; + #endif + + return ret; +} + +/********************************************************************************************************************** + * @brief Release a recursive mutex. + * + * @retval FSP_SUCCESS successfully configured. + * @retval FSP_ERR_INTERNAL RTOS internal error. + * @retval FSP_ERR_UNSUPPORTED RTOS not supported. + *********************************************************************************************************************/ +fsp_err_t rm_comms_recursive_mutex_release (rm_comms_mutex_t * p_mutex) +{ + fsp_err_t ret = FSP_SUCCESS; + + #if BSP_CFG_RTOS == 1 // ThreadX + UINT status = tx_mutex_put(&p_mutex->handle); + FSP_ERROR_RETURN(TX_SUCCESS == status, FSP_ERR_INTERNAL); + #elif BSP_CFG_RTOS == 2 // FreeRTOS + BaseType_t sem_err = xSemaphoreGiveRecursive(p_mutex->handle); + FSP_ERROR_RETURN(pdTRUE == sem_err, FSP_ERR_INTERNAL); + #else + ret = FSP_ERR_UNSUPPORTED; + #endif + + return ret; +} + +/********************************************************************************************************************** + * @brief Initialize a semaphore. + * + * @retval FSP_SUCCESS successfully initialized. + * @retval FSP_ERR_INTERNAL RTOS internal error. + * @retval FSP_ERR_UNSUPPORTED RTOS not supported. + *********************************************************************************************************************/ +fsp_err_t rm_comms_semaphore_initialize (rm_comms_semaphore_t * p_semaphore) +{ + fsp_err_t ret = FSP_SUCCESS; + + #if BSP_CFG_RTOS == 1 + UINT status = tx_semaphore_create(&p_semaphore->handle, p_semaphore->p_name, (ULONG) 0); + FSP_ERROR_RETURN(TX_SUCCESS == status, FSP_ERR_INTERNAL); + #elif BSP_CFG_RTOS == 2 + p_semaphore->handle = xSemaphoreCreateCountingStatic((UBaseType_t) 1, (UBaseType_t) 0, &p_semaphore->buffer); + FSP_ERROR_RETURN(p_semaphore->handle != NULL, FSP_ERR_INTERNAL); + #else + ret = FSP_ERR_UNSUPPORTED; + #endif + + return ret; +} + +/********************************************************************************************************************** + * @brief Desctroy a semaphore. + * + * @retval FSP_SUCCESS successfully configured. + * @retval FSP_ERR_INTERNAL RTOS internal error. + * @retval FSP_ERR_UNSUPPORTED RTOS not supported. + *********************************************************************************************************************/ +fsp_err_t rm_comms_semaphore_destroy (rm_comms_semaphore_t * p_semaphore) +{ + fsp_err_t ret = FSP_SUCCESS; + + #if BSP_CFG_RTOS == 1 + UINT status = tx_semaphore_delete(&p_semaphore->handle); + FSP_ERROR_RETURN(TX_SUCCESS == status, FSP_ERR_INTERNAL); + #elif BSP_CFG_RTOS == 2 + vSemaphoreDelete(p_semaphore->handle); + #else + ret = FSP_ERR_UNSUPPORTED; + #endif + + return ret; +} + +/********************************************************************************************************************** + * @brief Acquire a semaphore. + * + * @retval FSP_SUCCESS successfully configured. + * @retval FSP_ERR_INTERNAL RTOS internal error. + * @retval FSP_ERR_UNSUPPORTED RTOS not supported. + *********************************************************************************************************************/ +fsp_err_t rm_comms_semaphore_acquire (rm_comms_semaphore_t * p_semaphore, uint32_t const timeout) +{ + fsp_err_t ret = FSP_SUCCESS; + + #if BSP_CFG_RTOS == 1 // ThreadX + UINT status = tx_semaphore_get(&p_semaphore->handle, (ULONG) timeout); + FSP_ERROR_RETURN(TX_SUCCESS == status, FSP_ERR_INTERNAL); + #elif BSP_CFG_RTOS == 2 // FreeRTOS + BaseType_t sem_err = xSemaphoreTake(p_semaphore->handle, (TickType_t) timeout); + FSP_ERROR_RETURN(pdTRUE == sem_err, FSP_ERR_INTERNAL); + #else + ret = FSP_ERR_UNSUPPORTED; + #endif + + return ret; +} + +/********************************************************************************************************************** + * @brief Release a semaphore. + * + * @retval FSP_SUCCESS successfully configured. + * @retval FSP_ERR_INTERNAL RTOS internal error. + * @retval FSP_ERR_UNSUPPORTED RTOS not supported. + *********************************************************************************************************************/ +fsp_err_t rm_comms_semaphore_release (rm_comms_semaphore_t * p_semaphore) +{ + fsp_err_t ret = FSP_SUCCESS; + + #if BSP_CFG_RTOS == 1 // ThreadX + UINT status = tx_semaphore_put(&p_semaphore->handle); + FSP_ERROR_RETURN(TX_SUCCESS == status, FSP_ERR_INTERNAL); + #elif BSP_CFG_RTOS == 2 // FreeRTOS + BaseType_t sem_err = xSemaphoreGiveFromISR(p_semaphore->handle, NULL); + FSP_ERROR_RETURN(pdTRUE == sem_err, FSP_ERR_INTERNAL); + #else + ret = FSP_ERR_UNSUPPORTED; + #endif + + return ret; +} + +#endif diff --git a/ra/fsp/src/rm_comms_lock/rm_comms_lock.h b/ra/fsp/src/rm_comms_lock/rm_comms_lock.h new file mode 100644 index 000000000..d840c4886 --- /dev/null +++ b/ra/fsp/src/rm_comms_lock/rm_comms_lock.h @@ -0,0 +1,95 @@ +/*********************************************************************************************************************** + * Copyright [2020-2023] Renesas Electronics Corporation and/or its affiliates. All Rights Reserved. + * + * This software and documentation are supplied by Renesas Electronics America Inc. and may only be used with products + * of Renesas Electronics Corp. and its affiliates ("Renesas"). No other uses are authorized. Renesas products are + * sold pursuant to Renesas terms and conditions of sale. Purchasers are solely responsible for the selection and use + * of Renesas products and Renesas assumes no liability. No license, express or implied, to any intellectual property + * right is granted by Renesas. This software is protected under all applicable laws, including copyright laws. Renesas + * reserves the right to change or discontinue this software and/or this documentation. THE SOFTWARE AND DOCUMENTATION + * IS DELIVERED TO YOU "AS IS," AND RENESAS MAKES NO REPRESENTATIONS OR WARRANTIES, AND TO THE FULLEST EXTENT + * PERMISSIBLE UNDER APPLICABLE LAW, DISCLAIMS ALL WARRANTIES, WHETHER EXPLICITLY OR IMPLICITLY, INCLUDING WARRANTIES + * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, AND NONINFRINGEMENT, WITH RESPECT TO THE SOFTWARE OR + * DOCUMENTATION. RENESAS SHALL HAVE NO LIABILITY ARISING OUT OF ANY SECURITY VULNERABILITY OR BREACH. TO THE MAXIMUM + * EXTENT PERMITTED BY LAW, IN NO EVENT WILL RENESAS BE LIABLE TO YOU IN CONNECTION WITH THE SOFTWARE OR DOCUMENTATION + * (OR ANY PERSON OR ENTITY CLAIMING RIGHTS DERIVED FROM YOU) FOR ANY LOSS, DAMAGES, OR CLAIMS WHATSOEVER, INCLUDING, + * WITHOUT LIMITATION, ANY DIRECT, CONSEQUENTIAL, SPECIAL, INDIRECT, PUNITIVE, OR INCIDENTAL DAMAGES; ANY LOST PROFITS, + * OTHER ECONOMIC DAMAGE, PROPERTY DAMAGE, OR PERSONAL INJURY; AND EVEN IF RENESAS HAS BEEN ADVISED OF THE POSSIBILITY + * OF SUCH LOSS, DAMAGES, CLAIMS OR COSTS. + **********************************************************************************************************************/ + +#ifndef RM_COMMS_LOCK_H +#define RM_COMMS_LOCK_H + +#include "bsp_api.h" + +#if BSP_CFG_RTOS + +/*********************************************************************************************************************** + * Includes + **********************************************************************************************************************/ + + #if BSP_CFG_RTOS == 1 // ThreadX + #include "tx_api.h" + #elif BSP_CFG_RTOS == 2 // FreeRTOS + #include "FreeRTOS.h" + #include "task.h" + #include "queue.h" + #include "semphr.h" + #else + #endif + +/********************************************************************************************************************** + * Macro definitions + **********************************************************************************************************************/ + +/*********************************************************************************************************************** + * Typedef definitions + **********************************************************************************************************************/ + +/* Mutex structure */ +typedef struct st_rm_comms_mutex +{ + #if BSP_CFG_RTOS == 1 // ThreadX + TX_MUTEX handle; + CHAR * p_name; + #elif BSP_CFG_RTOS == 2 // FreeRTOS + SemaphoreHandle_t handle; + StaticSemaphore_t buffer; + #else + #endif +} rm_comms_mutex_t; + +/* Semaphore Structure */ +typedef struct st_rm_comms_semaphore +{ + #if BSP_CFG_RTOS == 1 // ThreadX + TX_SEMAPHORE handle; + CHAR * p_name; + #elif BSP_CFG_RTOS == 2 // FreeRTOS + SemaphoreHandle_t handle; + StaticSemaphore_t buffer; + #else + #endif +} rm_comms_semaphore_t; + +/********************************************************************************************************************** + * @brief rm_comms_lock API + * + * @retval FSP_SUCCESS Funciton call succeeds. + * @retval FSP_ERR_INTERNAL RTOS internal error. + * @retval FSP_ERR_UNSUPPORTED RTOS not supported. + *********************************************************************************************************************/ +fsp_err_t rm_comms_recursive_mutex_initialize(rm_comms_mutex_t * p_mutex); +fsp_err_t rm_comms_recursive_mutex_destroy(rm_comms_mutex_t * p_mutex); +fsp_err_t rm_comms_recursive_mutex_acquire(rm_comms_mutex_t * p_mutex, uint32_t const timeout); +fsp_err_t rm_comms_recursive_mutex_release(rm_comms_mutex_t * p_mutex); + +fsp_err_t rm_comms_semaphore_initialize(rm_comms_semaphore_t * p_semaphore); +fsp_err_t rm_comms_semaphore_destroy(rm_comms_semaphore_t * p_semaphore); +fsp_err_t rm_comms_semaphore_acquire(rm_comms_semaphore_t * p_semaphore, uint32_t const timeout); +fsp_err_t rm_comms_semaphore_release(rm_comms_semaphore_t * p_semaphore); + +#endif /* RM_COMMS_LOCK_H */ + +#endif diff --git a/ra/fsp/src/rm_comms_uart/rm_comms_uart.c b/ra/fsp/src/rm_comms_uart/rm_comms_uart.c new file mode 100644 index 000000000..181278a72 --- /dev/null +++ b/ra/fsp/src/rm_comms_uart/rm_comms_uart.c @@ -0,0 +1,428 @@ +/*********************************************************************************************************************** + * Copyright [2020-2023] Renesas Electronics Corporation and/or its affiliates. All Rights Reserved. + * + * This software and documentation are supplied by Renesas Electronics America Inc. and may only be used with products + * of Renesas Electronics Corp. and its affiliates ("Renesas"). No other uses are authorized. Renesas products are + * sold pursuant to Renesas terms and conditions of sale. Purchasers are solely responsible for the selection and use + * of Renesas products and Renesas assumes no liability. No license, express or implied, to any intellectual property + * right is granted by Renesas. This software is protected under all applicable laws, including copyright laws. Renesas + * reserves the right to change or discontinue this software and/or this documentation. THE SOFTWARE AND DOCUMENTATION + * IS DELIVERED TO YOU "AS IS," AND RENESAS MAKES NO REPRESENTATIONS OR WARRANTIES, AND TO THE FULLEST EXTENT + * PERMISSIBLE UNDER APPLICABLE LAW, DISCLAIMS ALL WARRANTIES, WHETHER EXPLICITLY OR IMPLICITLY, INCLUDING WARRANTIES + * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, AND NONINFRINGEMENT, WITH RESPECT TO THE SOFTWARE OR + * DOCUMENTATION. RENESAS SHALL HAVE NO LIABILITY ARISING OUT OF ANY SECURITY VULNERABILITY OR BREACH. TO THE MAXIMUM + * EXTENT PERMITTED BY LAW, IN NO EVENT WILL RENESAS BE LIABLE TO YOU IN CONNECTION WITH THE SOFTWARE OR DOCUMENTATION + * (OR ANY PERSON OR ENTITY CLAIMING RIGHTS DERIVED FROM YOU) FOR ANY LOSS, DAMAGES, OR CLAIMS WHATSOEVER, INCLUDING, + * WITHOUT LIMITATION, ANY DIRECT, CONSEQUENTIAL, SPECIAL, INDIRECT, PUNITIVE, OR INCIDENTAL DAMAGES; ANY LOST PROFITS, + * OTHER ECONOMIC DAMAGE, PROPERTY DAMAGE, OR PERSONAL INJURY; AND EVEN IF RENESAS HAS BEEN ADVISED OF THE POSSIBILITY + * OF SUCH LOSS, DAMAGES, CLAIMS OR COSTS. + **********************************************************************************************************************/ + +/*********************************************************************************************************************** + * Includes + **********************************************************************************************************************/ + +#include "rm_comms_uart.h" +#include "../rm_comms_lock/rm_comms_lock.h" + +/*********************************************************************************************************************** + * Macro definitions + **********************************************************************************************************************/ + +/* Definitions of Open flag "COUT" */ +#define RM_COMMS_UART_OPEN (0x434F5554UL) + +/*********************************************************************************************************************** + * Private function prototypes + **********************************************************************************************************************/ +static void rm_comms_uart_callback(uart_callback_args_t * p_args); +static void rm_comms_uart_notify_application(rm_comms_uart_instance_ctrl_t const * p_ctrl, rm_comms_event_t event); + +/*********************************************************************************************************************** + * Global variables + **********************************************************************************************************************/ +rm_comms_api_t const g_comms_on_comms_uart = +{ + .open = RM_COMMS_UART_Open, + .read = RM_COMMS_UART_Read, + .write = RM_COMMS_UART_Write, + .writeRead = RM_COMMS_UART_WriteRead, + .callbackSet = RM_COMMS_UART_CallbackSet, + .close = RM_COMMS_UART_Close, +}; + +/*******************************************************************************************************************//** + * @addtogroup RM_COMMS_UART + * @{ + **********************************************************************************************************************/ + +/*********************************************************************************************************************** + * Functions + **********************************************************************************************************************/ + +/*******************************************************************************************************************//** + * @brief Opens and configures the UART Comms module. Implements @ref rm_comms_api_t::open. + * + * + * @retval FSP_SUCCESS UART Comms module successfully configured. + * @retval FSP_ERR_ASSERTION Null pointer, or one or more configuration options is invalid. + * @retval FSP_ERR_ALREADY_OPEN Module is already open. This module can only be opened once. + * + * @return See @ref RENESAS_ERROR_CODES or functions called by this function for other possible return codes. + **********************************************************************************************************************/ +fsp_err_t RM_COMMS_UART_Open (rm_comms_ctrl_t * const p_api_ctrl, rm_comms_cfg_t const * const p_cfg) +{ + fsp_err_t err = FSP_SUCCESS; + rm_comms_uart_instance_ctrl_t * p_ctrl = (rm_comms_uart_instance_ctrl_t *) p_api_ctrl; + +#if RM_COMMS_UART_CFG_PARAM_CHECKING_ENABLE + FSP_ASSERT(NULL != p_ctrl); + FSP_ASSERT(NULL != p_cfg); + FSP_ERROR_RETURN(RM_COMMS_UART_OPEN != p_ctrl->open, FSP_ERR_ALREADY_OPEN); +#endif + + rm_comms_uart_extended_cfg_t * p_extend = (rm_comms_uart_extended_cfg_t *) p_cfg->p_extend; + +#if RM_COMMS_UART_CFG_PARAM_CHECKING_ENABLE + FSP_ASSERT(NULL != p_extend); + FSP_ASSERT(NULL != p_extend->p_uart); +#endif + + p_ctrl->p_cfg = p_cfg; + p_ctrl->p_extend = p_extend; + p_ctrl->p_callback = p_cfg->p_callback; + p_ctrl->p_context = p_cfg->p_context; + +#if BSP_CFG_RTOS + if (NULL != p_extend->p_tx_mutex) + { + /* Init mutex for writing */ + err = rm_comms_recursive_mutex_initialize(p_extend->p_tx_mutex); + FSP_ERROR_RETURN(FSP_SUCCESS == err, err); + } + + if (NULL != p_extend->p_rx_mutex) + { + /* Init mutex for reading */ + err = rm_comms_recursive_mutex_initialize(p_extend->p_rx_mutex); + FSP_ERROR_RETURN(FSP_SUCCESS == err, err); + } + + if (NULL != p_extend->p_tx_semaphore) + { + /* Init semaphore for writing */ + err = rm_comms_semaphore_initialize(p_extend->p_tx_semaphore); + FSP_ERROR_RETURN(FSP_SUCCESS == err, err); + } + + if (NULL != p_extend->p_rx_semaphore) + { + /* Init semaphore for reading */ + err = rm_comms_semaphore_initialize(p_extend->p_rx_semaphore); + FSP_ERROR_RETURN(FSP_SUCCESS == err, err); + } +#endif + + /* Calls open function of UART HAL driver */ + uart_api_t const * p_uart_api = p_extend->p_uart->p_api; + err = p_uart_api->open(p_extend->p_uart->p_ctrl, p_extend->p_uart->p_cfg); + FSP_ERROR_RETURN(FSP_SUCCESS == err, err); + + /* Set callback function */ + err = p_uart_api->callbackSet(p_extend->p_uart->p_ctrl, rm_comms_uart_callback, p_ctrl, NULL); + FSP_ERROR_RETURN(FSP_SUCCESS == err, err); + + /* Set open flag */ + p_ctrl->open = RM_COMMS_UART_OPEN; + + return FSP_SUCCESS; +} + +/*******************************************************************************************************************//** + * @brief Disables specified UART Comms module. Implements @ref rm_comms_api_t::close. + * + * @retval FSP_SUCCESS Successfully closed. + * @retval FSP_ERR_ASSERTION Null pointer passed as a parameter. + * @retval FSP_ERR_NOT_OPEN Module is not open. + * + * @return See @ref RENESAS_ERROR_CODES or functions called by this function for other possible return codes. + **********************************************************************************************************************/ +fsp_err_t RM_COMMS_UART_Close (rm_comms_ctrl_t * const p_api_ctrl) +{ + fsp_err_t err = FSP_SUCCESS; + rm_comms_uart_instance_ctrl_t * p_ctrl = (rm_comms_uart_instance_ctrl_t *) p_api_ctrl; + +#if RM_COMMS_UART_CFG_PARAM_CHECKING_ENABLE + FSP_ASSERT(NULL != p_ctrl); + FSP_ERROR_RETURN(RM_COMMS_UART_OPEN == p_ctrl->open, FSP_ERR_NOT_OPEN); +#endif + + rm_comms_uart_extended_cfg_t const * p_extend = p_ctrl->p_extend; + uart_api_t const * p_uart_api = p_extend->p_uart->p_api; + + err = p_uart_api->close(p_extend->p_uart->p_ctrl); + FSP_ERROR_RETURN(FSP_SUCCESS == err, err); + +#if BSP_CFG_RTOS + if (NULL != p_extend->p_tx_mutex) + { + err = rm_comms_recursive_mutex_destroy(p_extend->p_tx_mutex); + FSP_ERROR_RETURN(FSP_SUCCESS == err, err); + } + + if (NULL != p_extend->p_rx_mutex) + { + err = rm_comms_recursive_mutex_destroy(p_extend->p_rx_mutex); + FSP_ERROR_RETURN(FSP_SUCCESS == err, err); + } + + if (NULL != p_extend->p_tx_semaphore) + { + err = rm_comms_semaphore_destroy(p_extend->p_tx_semaphore); + FSP_ERROR_RETURN(FSP_SUCCESS == err, err); + } + + if (NULL != p_extend->p_rx_semaphore) + { + err = rm_comms_semaphore_destroy(p_extend->p_rx_semaphore); + FSP_ERROR_RETURN(FSP_SUCCESS == err, err); + } +#endif + + /* Clear open flag */ + p_ctrl->open = 0; + + return FSP_SUCCESS; +} + +/*******************************************************************************************************************//** + * @brief Updates the UART Comms callback. Implements @ref rm_comms_api_t::callbackSet. + * + * @retval FSP_SUCCESS Successfully set. + * @retval FSP_ERR_ASSERTION Null pointer passed as a parameter. + * @retval FSP_ERR_NOT_OPEN Module is not open. + * + **********************************************************************************************************************/ +fsp_err_t RM_COMMS_UART_CallbackSet (rm_comms_ctrl_t * const p_api_ctrl, + void ( * p_callback)(rm_comms_callback_args_t *), + void const * const p_context) +{ + rm_comms_uart_instance_ctrl_t * p_ctrl = (rm_comms_uart_instance_ctrl_t *) p_api_ctrl; + +#if RM_COMMS_UART_CFG_PARAM_CHECKING_ENABLE + FSP_ASSERT(NULL != p_ctrl); + FSP_ASSERT(NULL != p_callback); + FSP_ERROR_RETURN(RM_COMMS_UART_OPEN == p_ctrl->open, FSP_ERR_NOT_OPEN); +#endif + + /* Store callback and context */ + p_ctrl->p_callback = p_callback; + p_ctrl->p_context = p_context; + + return FSP_SUCCESS; +} + +/*******************************************************************************************************************//** + * @brief Performs a read from the UART device. Implements @ref rm_comms_api_t::read. + * + * @retval FSP_SUCCESS Successfully data decoded. + * @retval FSP_ERR_ASSERTION Null pointer passed as a parameter. + * @retval FSP_ERR_NOT_OPEN Module is not open. + * + * @return See @ref RENESAS_ERROR_CODES or functions called by this function for other possible return codes. + **********************************************************************************************************************/ +fsp_err_t RM_COMMS_UART_Read (rm_comms_ctrl_t * const p_api_ctrl, uint8_t * const p_dest, uint32_t const bytes) +{ + fsp_err_t err = FSP_SUCCESS; + rm_comms_uart_instance_ctrl_t * p_ctrl = (rm_comms_uart_instance_ctrl_t *) p_api_ctrl; + +#if RM_COMMS_UART_CFG_PARAM_CHECKING_ENABLE + FSP_ASSERT(NULL != p_ctrl); + FSP_ASSERT(NULL != p_dest); + FSP_ERROR_RETURN(RM_COMMS_UART_OPEN == p_ctrl->open, FSP_ERR_NOT_OPEN); +#endif + + rm_comms_uart_extended_cfg_t const * p_extend = p_ctrl->p_extend; + uart_api_t const * p_uart_api = p_extend->p_uart->p_api; + +#if BSP_CFG_RTOS + if (NULL != p_extend->p_rx_mutex) + { + /* Acquire read mutex */ + err = rm_comms_recursive_mutex_acquire(p_extend->p_rx_mutex, p_extend->mutex_timeout); + FSP_ERROR_RETURN(FSP_SUCCESS == err, err); + } +#endif + + /* Use UART driver to read data */ + err = p_uart_api->read(p_extend->p_uart->p_ctrl, p_dest, bytes); + FSP_ERROR_RETURN(FSP_SUCCESS == err, err); + +#if BSP_CFG_RTOS + if (NULL != p_extend->p_rx_semaphore) + { + /* Wait for read to complete */ + err = rm_comms_semaphore_acquire(p_extend->p_rx_semaphore, p_ctrl->p_cfg->semaphore_timeout); + FSP_ERROR_RETURN(FSP_SUCCESS == err, err); + } + + if (NULL != p_extend->p_rx_mutex) + { + /* Release read mutex */ + err = rm_comms_recursive_mutex_release(p_extend->p_rx_mutex); + FSP_ERROR_RETURN(FSP_SUCCESS == err, err); + } +#endif + + return FSP_SUCCESS; +} + +/*******************************************************************************************************************//** + * @brief Performs a write to the UART device. Implements @ref rm_comms_api_t::write. + * + * @retval FSP_SUCCESS Successfully writing data . + * @retval FSP_ERR_ASSERTION Null pointer passed as a parameter. + * @retval FSP_ERR_NOT_OPEN Module is not open. + * + * @return See @ref RENESAS_ERROR_CODES or functions called by this function for other possible return codes. + **********************************************************************************************************************/ +fsp_err_t RM_COMMS_UART_Write (rm_comms_ctrl_t * const p_api_ctrl, uint8_t * const p_src, uint32_t const bytes) +{ + fsp_err_t err = FSP_SUCCESS; + rm_comms_uart_instance_ctrl_t * p_ctrl = (rm_comms_uart_instance_ctrl_t *) p_api_ctrl; + +#if RM_COMMS_UART_CFG_PARAM_CHECKING_ENABLE + FSP_ASSERT(NULL != p_ctrl); + FSP_ASSERT(NULL != p_src); + FSP_ERROR_RETURN(RM_COMMS_UART_OPEN == p_ctrl->open, FSP_ERR_NOT_OPEN); +#endif + + rm_comms_uart_extended_cfg_t const * p_extend = p_ctrl->p_extend; + uart_api_t const * p_uart_api = p_extend->p_uart->p_api; + +#if BSP_CFG_RTOS + if (NULL != p_extend->p_tx_mutex) + { + /* Acquire write mutex */ + err = rm_comms_recursive_mutex_acquire(p_extend->p_tx_mutex, p_extend->mutex_timeout); + FSP_ERROR_RETURN(FSP_SUCCESS == err, err); + } +#endif + + /* Use UART driver to write data */ + err = p_uart_api->write(p_extend->p_uart->p_ctrl, p_src, bytes); + FSP_ERROR_RETURN(FSP_SUCCESS == err, err); + +#if BSP_CFG_RTOS + if (NULL != p_extend->p_tx_semaphore) + { + /* Wait for write to complete */ + err = rm_comms_semaphore_acquire(p_extend->p_tx_semaphore, p_ctrl->p_cfg->semaphore_timeout); + FSP_ERROR_RETURN(FSP_SUCCESS == err, err); + } + + if (NULL != p_extend->p_tx_mutex) + { + /* Release write mutex */ + err = rm_comms_recursive_mutex_release(p_extend->p_tx_mutex); + FSP_ERROR_RETURN(FSP_SUCCESS == err, err); + } +#endif + + return FSP_SUCCESS; +} + +/*******************************************************************************************************************//** + * @brief Performs a write to, then a read from the UART device. Implements @ref rm_comms_api_t::writeRead. + * + * @retval FSP_ERR_UNSUPPORTED Not supported. + * + **********************************************************************************************************************/ +fsp_err_t RM_COMMS_UART_WriteRead (rm_comms_ctrl_t * const p_api_ctrl, + rm_comms_write_read_params_t const write_read_params) +{ + FSP_PARAMETER_NOT_USED(p_api_ctrl); + FSP_PARAMETER_NOT_USED(write_read_params); + + return FSP_ERR_UNSUPPORTED; +} + +/*******************************************************************************************************************//** + * @} (end addtogroup RM_COMMS_UART) + **********************************************************************************************************************/ + +static void rm_comms_uart_notify_application (rm_comms_uart_instance_ctrl_t const * p_ctrl, rm_comms_event_t event) +{ + if (p_ctrl->p_callback) + { + rm_comms_callback_args_t args = + { + .p_context = p_ctrl->p_context, + .event = event, + }; + + p_ctrl->p_callback(&args); + } +} + +/*******************************************************************************************************************//** + * @brief Common callback function called in the UART driver callback function. + **********************************************************************************************************************/ +static void rm_comms_uart_callback (uart_callback_args_t * p_args) +{ + rm_comms_uart_instance_ctrl_t * p_ctrl = (rm_comms_uart_instance_ctrl_t *) (p_args->p_context); +#if BSP_CFG_RTOS + rm_comms_uart_extended_cfg_t const * p_extend = p_ctrl->p_extend; +#endif + + switch (p_args->event) + { + case UART_EVENT_TX_COMPLETE: + { +#if BSP_CFG_RTOS + if (NULL != p_extend->p_tx_semaphore) + { + rm_comms_semaphore_release(p_extend->p_tx_semaphore); + } +#endif + rm_comms_uart_notify_application(p_ctrl, RM_COMMS_EVENT_TX_OPERATION_COMPLETE); + break; + } + + case UART_EVENT_RX_COMPLETE: + { +#if BSP_CFG_RTOS + if (NULL != p_extend->p_rx_semaphore) + { + rm_comms_semaphore_release(p_extend->p_rx_semaphore); + } +#endif + rm_comms_uart_notify_application(p_ctrl, RM_COMMS_EVENT_RX_OPERATION_COMPLETE); + break; + } + + case UART_EVENT_RX_CHAR: + case UART_EVENT_TX_DATA_EMPTY: // Continue Tx/Rx + { + break; + } + + default: // Stop both Tx and Rx on UART Error + { +#if BSP_CFG_RTOS + if (NULL != p_extend->p_tx_semaphore) + { + rm_comms_semaphore_release(p_extend->p_tx_semaphore); + } + + if (NULL != p_extend->p_rx_semaphore) + { + rm_comms_semaphore_release(p_extend->p_rx_semaphore); + } +#endif + rm_comms_uart_notify_application(p_ctrl, RM_COMMS_EVENT_ERROR); + + break; + } + } +} diff --git a/ra/fsp/src/rm_freertos_plus_tcp/NetworkInterface.c b/ra/fsp/src/rm_freertos_plus_tcp/NetworkInterface.c index a44d80db5..d83a2fac6 100644 --- a/ra/fsp/src/rm_freertos_plus_tcp/NetworkInterface.c +++ b/ra/fsp/src/rm_freertos_plus_tcp/NetworkInterface.c @@ -103,6 +103,8 @@ BaseType_t xNetworkInterfaceInitialise (void) fsp_err_t err; BaseType_t xReturn = pdFAIL; + configASSERT(NULL != gp_freertos_ether); + if (ETHER_ZEROCOPY_ENABLE == gp_freertos_ether->p_cfg->zerocopy) { /*NOTE:Currently does not support zero copy mode*/ diff --git a/ra/fsp/src/rm_mbedtls/x509_crt.c b/ra/fsp/src/rm_mbedtls/x509_crt.c index e96c2b3d2..65a994743 100644 --- a/ra/fsp/src/rm_mbedtls/x509_crt.c +++ b/ra/fsp/src/rm_mbedtls/x509_crt.c @@ -49,27 +49,22 @@ #if defined(MBEDTLS_USE_PSA_CRYPTO) #include "psa/crypto.h" #include "mbedtls/psa_util.h" -#endif +#endif /* MBEDTLS_USE_PSA_CRYPTO */ +#include "hash_info.h" -#if defined(MBEDTLS_PLATFORM_C) #include "mbedtls/platform.h" -#else -#include <stdio.h> -#include <stdlib.h> -#define mbedtls_free free -#define mbedtls_calloc calloc -#define mbedtls_snprintf snprintf -#endif #if defined(MBEDTLS_THREADING_C) #include "mbedtls/threading.h" #endif +#if defined(MBEDTLS_HAVE_TIME) #if defined(_WIN32) && !defined(EFIX64) && !defined(EFI32) #include <windows.h> #else #include <time.h> #endif +#endif #if defined(MBEDTLS_FS_IO) #include <stdio.h> @@ -82,6 +77,7 @@ #else #include <dirent.h> #endif /* __MBED__ */ +#include <errno.h> #endif /* FSP_NOT_DEFINED */ #endif /* !_WIN32 || EFIX64 || EFI32 */ #endif /* MBEDTLS_FS_IO */ @@ -97,27 +93,27 @@ typedef struct { /* * Max size of verification chain: end-entity + intermediates + trusted root */ -#define X509_MAX_VERIFY_CHAIN_SIZE ( MBEDTLS_X509_MAX_INTERMEDIATE_CA + 2 ) +#define X509_MAX_VERIFY_CHAIN_SIZE (MBEDTLS_X509_MAX_INTERMEDIATE_CA + 2) /* Default profile. Do not remove items unless there are serious security * concerns. */ const mbedtls_x509_crt_profile mbedtls_x509_crt_profile_default = { - /* Hashes from SHA-256 and above. Note that this selection + /* Hashes from SHA-256 and above. Note that this selection * should be aligned with ssl_preset_default_hashes in ssl_tls.c. */ - MBEDTLS_X509_ID_FLAG( MBEDTLS_MD_SHA256 ) | - MBEDTLS_X509_ID_FLAG( MBEDTLS_MD_SHA384 ) | - MBEDTLS_X509_ID_FLAG( MBEDTLS_MD_SHA512 ), + MBEDTLS_X509_ID_FLAG(MBEDTLS_MD_SHA256) | + MBEDTLS_X509_ID_FLAG(MBEDTLS_MD_SHA384) | + MBEDTLS_X509_ID_FLAG(MBEDTLS_MD_SHA512), 0xFFFFFFF, /* Any PK alg */ #if defined(MBEDTLS_ECP_C) /* Curves at or above 128-bit security level. Note that this selection * should be aligned with ssl_preset_default_curves in ssl_tls.c. */ - MBEDTLS_X509_ID_FLAG( MBEDTLS_ECP_DP_SECP256R1 ) | - MBEDTLS_X509_ID_FLAG( MBEDTLS_ECP_DP_SECP384R1 ) | - MBEDTLS_X509_ID_FLAG( MBEDTLS_ECP_DP_SECP521R1 ) | - MBEDTLS_X509_ID_FLAG( MBEDTLS_ECP_DP_BP256R1 ) | - MBEDTLS_X509_ID_FLAG( MBEDTLS_ECP_DP_BP384R1 ) | - MBEDTLS_X509_ID_FLAG( MBEDTLS_ECP_DP_BP512R1 ) | + MBEDTLS_X509_ID_FLAG(MBEDTLS_ECP_DP_SECP256R1) | + MBEDTLS_X509_ID_FLAG(MBEDTLS_ECP_DP_SECP384R1) | + MBEDTLS_X509_ID_FLAG(MBEDTLS_ECP_DP_SECP521R1) | + MBEDTLS_X509_ID_FLAG(MBEDTLS_ECP_DP_BP256R1) | + MBEDTLS_X509_ID_FLAG(MBEDTLS_ECP_DP_BP384R1) | + MBEDTLS_X509_ID_FLAG(MBEDTLS_ECP_DP_BP512R1) | 0, #else 0, @@ -130,19 +126,19 @@ const mbedtls_x509_crt_profile mbedtls_x509_crt_profile_default = const mbedtls_x509_crt_profile mbedtls_x509_crt_profile_next = { /* Hashes from SHA-256 and above. */ - MBEDTLS_X509_ID_FLAG( MBEDTLS_MD_SHA256 ) | - MBEDTLS_X509_ID_FLAG( MBEDTLS_MD_SHA384 ) | - MBEDTLS_X509_ID_FLAG( MBEDTLS_MD_SHA512 ), + MBEDTLS_X509_ID_FLAG(MBEDTLS_MD_SHA256) | + MBEDTLS_X509_ID_FLAG(MBEDTLS_MD_SHA384) | + MBEDTLS_X509_ID_FLAG(MBEDTLS_MD_SHA512), 0xFFFFFFF, /* Any PK alg */ #if defined(MBEDTLS_ECP_C) /* Curves at or above 128-bit security level. */ - MBEDTLS_X509_ID_FLAG( MBEDTLS_ECP_DP_SECP256R1 ) | - MBEDTLS_X509_ID_FLAG( MBEDTLS_ECP_DP_SECP384R1 ) | - MBEDTLS_X509_ID_FLAG( MBEDTLS_ECP_DP_SECP521R1 ) | - MBEDTLS_X509_ID_FLAG( MBEDTLS_ECP_DP_BP256R1 ) | - MBEDTLS_X509_ID_FLAG( MBEDTLS_ECP_DP_BP384R1 ) | - MBEDTLS_X509_ID_FLAG( MBEDTLS_ECP_DP_BP512R1 ) | - MBEDTLS_X509_ID_FLAG( MBEDTLS_ECP_DP_SECP256K1 ), + MBEDTLS_X509_ID_FLAG(MBEDTLS_ECP_DP_SECP256R1) | + MBEDTLS_X509_ID_FLAG(MBEDTLS_ECP_DP_SECP384R1) | + MBEDTLS_X509_ID_FLAG(MBEDTLS_ECP_DP_SECP521R1) | + MBEDTLS_X509_ID_FLAG(MBEDTLS_ECP_DP_BP256R1) | + MBEDTLS_X509_ID_FLAG(MBEDTLS_ECP_DP_BP384R1) | + MBEDTLS_X509_ID_FLAG(MBEDTLS_ECP_DP_BP512R1) | + MBEDTLS_X509_ID_FLAG(MBEDTLS_ECP_DP_SECP256K1), #else 0, #endif @@ -155,15 +151,15 @@ const mbedtls_x509_crt_profile mbedtls_x509_crt_profile_next = const mbedtls_x509_crt_profile mbedtls_x509_crt_profile_suiteb = { /* Only SHA-256 and 384 */ - MBEDTLS_X509_ID_FLAG( MBEDTLS_MD_SHA256 ) | - MBEDTLS_X509_ID_FLAG( MBEDTLS_MD_SHA384 ), + MBEDTLS_X509_ID_FLAG(MBEDTLS_MD_SHA256) | + MBEDTLS_X509_ID_FLAG(MBEDTLS_MD_SHA384), /* Only ECDSA */ - MBEDTLS_X509_ID_FLAG( MBEDTLS_PK_ECDSA ) | - MBEDTLS_X509_ID_FLAG( MBEDTLS_PK_ECKEY ), + MBEDTLS_X509_ID_FLAG(MBEDTLS_PK_ECDSA) | + MBEDTLS_X509_ID_FLAG(MBEDTLS_PK_ECKEY), #if defined(MBEDTLS_ECP_C) /* Only NIST P-256 and P-384 */ - MBEDTLS_X509_ID_FLAG( MBEDTLS_ECP_DP_SECP256R1 ) | - MBEDTLS_X509_ID_FLAG( MBEDTLS_ECP_DP_SECP384R1 ), + MBEDTLS_X509_ID_FLAG(MBEDTLS_ECP_DP_SECP256R1) | + MBEDTLS_X509_ID_FLAG(MBEDTLS_ECP_DP_SECP384R1), #else 0, #endif @@ -185,133 +181,136 @@ const mbedtls_x509_crt_profile mbedtls_x509_crt_profile_none = * Check md_alg against profile * Return 0 if md_alg is acceptable for this profile, -1 otherwise */ -static int x509_profile_check_md_alg( const mbedtls_x509_crt_profile *profile, - mbedtls_md_type_t md_alg ) +static int x509_profile_check_md_alg(const mbedtls_x509_crt_profile *profile, + mbedtls_md_type_t md_alg) { - if( md_alg == MBEDTLS_MD_NONE ) - return( -1 ); + if (md_alg == MBEDTLS_MD_NONE) { + return -1; + } - if( ( profile->allowed_mds & MBEDTLS_X509_ID_FLAG( md_alg ) ) != 0 ) - return( 0 ); + if ((profile->allowed_mds & MBEDTLS_X509_ID_FLAG(md_alg)) != 0) { + return 0; + } - return( -1 ); + return -1; } /* * Check pk_alg against profile * Return 0 if pk_alg is acceptable for this profile, -1 otherwise */ -static int x509_profile_check_pk_alg( const mbedtls_x509_crt_profile *profile, - mbedtls_pk_type_t pk_alg ) +static int x509_profile_check_pk_alg(const mbedtls_x509_crt_profile *profile, + mbedtls_pk_type_t pk_alg) { - if( pk_alg == MBEDTLS_PK_NONE ) - return( -1 ); + if (pk_alg == MBEDTLS_PK_NONE) { + return -1; + } - if( ( profile->allowed_pks & MBEDTLS_X509_ID_FLAG( pk_alg ) ) != 0 ) - return( 0 ); + if ((profile->allowed_pks & MBEDTLS_X509_ID_FLAG(pk_alg)) != 0) { + return 0; + } - return( -1 ); + return -1; } /* * Check key against profile * Return 0 if pk is acceptable for this profile, -1 otherwise */ -static int x509_profile_check_key( const mbedtls_x509_crt_profile *profile, - const mbedtls_pk_context *pk ) +static int x509_profile_check_key(const mbedtls_x509_crt_profile *profile, + const mbedtls_pk_context *pk) { - const mbedtls_pk_type_t pk_alg = mbedtls_pk_get_type( pk ); + const mbedtls_pk_type_t pk_alg = mbedtls_pk_get_type(pk); #if defined(MBEDTLS_RSA_C) - if( pk_alg == MBEDTLS_PK_RSA || pk_alg == MBEDTLS_PK_RSASSA_PSS ) - { - if( mbedtls_pk_get_bitlen( pk ) >= profile->rsa_min_bitlen ) - return( 0 ); + if (pk_alg == MBEDTLS_PK_RSA || pk_alg == MBEDTLS_PK_RSASSA_PSS) { + if (mbedtls_pk_get_bitlen(pk) >= profile->rsa_min_bitlen) { + return 0; + } - return( -1 ); + return -1; } #endif #if defined(MBEDTLS_ECP_C) - if( pk_alg == MBEDTLS_PK_ECDSA || + if (pk_alg == MBEDTLS_PK_ECDSA || pk_alg == MBEDTLS_PK_ECKEY || - pk_alg == MBEDTLS_PK_ECKEY_DH ) - { - const mbedtls_ecp_group_id gid = mbedtls_pk_ec( *pk )->grp.id; + pk_alg == MBEDTLS_PK_ECKEY_DH) { + const mbedtls_ecp_group_id gid = mbedtls_pk_ec(*pk)->grp.id; - if( gid == MBEDTLS_ECP_DP_NONE ) - return( -1 ); + if (gid == MBEDTLS_ECP_DP_NONE) { + return -1; + } - if( ( profile->allowed_curves & MBEDTLS_X509_ID_FLAG( gid ) ) != 0 ) - return( 0 ); + if ((profile->allowed_curves & MBEDTLS_X509_ID_FLAG(gid)) != 0) { + return 0; + } - return( -1 ); + return -1; } #endif - return( -1 ); + return -1; } /* * Like memcmp, but case-insensitive and always returns -1 if different */ -static int x509_memcasecmp( const void *s1, const void *s2, size_t len ) +static int x509_memcasecmp(const void *s1, const void *s2, size_t len) { size_t i; unsigned char diff; const unsigned char *n1 = s1, *n2 = s2; - for( i = 0; i < len; i++ ) - { + for (i = 0; i < len; i++) { diff = n1[i] ^ n2[i]; - if( diff == 0 ) + if (diff == 0) { continue; + } - if( diff == 32 && - ( ( n1[i] >= 'a' && n1[i] <= 'z' ) || - ( n1[i] >= 'A' && n1[i] <= 'Z' ) ) ) - { + if (diff == 32 && + ((n1[i] >= 'a' && n1[i] <= 'z') || + (n1[i] >= 'A' && n1[i] <= 'Z'))) { continue; } - return( -1 ); + return -1; } - return( 0 ); + return 0; } /* * Return 0 if name matches wildcard, -1 otherwise */ -static int x509_check_wildcard( const char *cn, const mbedtls_x509_buf *name ) +static int x509_check_wildcard(const char *cn, const mbedtls_x509_buf *name) { size_t i; - size_t cn_idx = 0, cn_len = strlen( cn ); + size_t cn_idx = 0, cn_len = strlen(cn); /* We can't have a match if there is no wildcard to match */ - if( name->len < 3 || name->p[0] != '*' || name->p[1] != '.' ) - return( -1 ); + if (name->len < 3 || name->p[0] != '*' || name->p[1] != '.') { + return -1; + } - for( i = 0; i < cn_len; ++i ) - { - if( cn[i] == '.' ) - { + for (i = 0; i < cn_len; ++i) { + if (cn[i] == '.') { cn_idx = i; break; } } - if( cn_idx == 0 ) - return( -1 ); + if (cn_idx == 0) { + return -1; + } - if( cn_len - cn_idx == name->len - 1 && - x509_memcasecmp( name->p + 1, cn + cn_idx, name->len - 1 ) == 0 ) - { - return( 0 ); + if (cn_len - cn_idx == name->len - 1 && + x509_memcasecmp(name->p + 1, cn + cn_idx, name->len - 1) == 0) { + return 0; } - return( -1 ); + return -1; } /* @@ -320,24 +319,22 @@ static int x509_check_wildcard( const char *cn, const mbedtls_x509_buf *name ) * * Return 0 if equal, -1 otherwise. */ -static int x509_string_cmp( const mbedtls_x509_buf *a, const mbedtls_x509_buf *b ) +static int x509_string_cmp(const mbedtls_x509_buf *a, const mbedtls_x509_buf *b) { - if( a->tag == b->tag && + if (a->tag == b->tag && a->len == b->len && - memcmp( a->p, b->p, b->len ) == 0 ) - { - return( 0 ); + memcmp(a->p, b->p, b->len) == 0) { + return 0; } - if( ( a->tag == MBEDTLS_ASN1_UTF8_STRING || a->tag == MBEDTLS_ASN1_PRINTABLE_STRING ) && - ( b->tag == MBEDTLS_ASN1_UTF8_STRING || b->tag == MBEDTLS_ASN1_PRINTABLE_STRING ) && + if ((a->tag == MBEDTLS_ASN1_UTF8_STRING || a->tag == MBEDTLS_ASN1_PRINTABLE_STRING) && + (b->tag == MBEDTLS_ASN1_UTF8_STRING || b->tag == MBEDTLS_ASN1_PRINTABLE_STRING) && a->len == b->len && - x509_memcasecmp( a->p, b->p, b->len ) == 0 ) - { - return( 0 ); + x509_memcasecmp(a->p, b->p, b->len) == 0) { + return 0; } - return( -1 ); + return -1; } /* @@ -350,48 +347,48 @@ static int x509_string_cmp( const mbedtls_x509_buf *a, const mbedtls_x509_buf *b * * Return 0 if equal, -1 otherwise. */ -static int x509_name_cmp( const mbedtls_x509_name *a, const mbedtls_x509_name *b ) +static int x509_name_cmp(const mbedtls_x509_name *a, const mbedtls_x509_name *b) { /* Avoid recursion, it might not be optimised by the compiler */ - while( a != NULL || b != NULL ) - { - if( a == NULL || b == NULL ) - return( -1 ); + while (a != NULL || b != NULL) { + if (a == NULL || b == NULL) { + return -1; + } /* type */ - if( a->oid.tag != b->oid.tag || + if (a->oid.tag != b->oid.tag || a->oid.len != b->oid.len || - memcmp( a->oid.p, b->oid.p, b->oid.len ) != 0 ) - { - return( -1 ); + memcmp(a->oid.p, b->oid.p, b->oid.len) != 0) { + return -1; } /* value */ - if( x509_string_cmp( &a->val, &b->val ) != 0 ) - return( -1 ); + if (x509_string_cmp(&a->val, &b->val) != 0) { + return -1; + } /* structure of the list of sets */ - if( a->next_merged != b->next_merged ) - return( -1 ); + if (a->next_merged != b->next_merged) { + return -1; + } a = a->next; b = b->next; } /* a == NULL == b */ - return( 0 ); + return 0; } /* * Reset (init or clear) a verify_chain */ static void x509_crt_verify_chain_reset( - mbedtls_x509_crt_verify_chain *ver_chain ) + mbedtls_x509_crt_verify_chain *ver_chain) { size_t i; - for( i = 0; i < MBEDTLS_X509_MAX_VERIFY_CHAIN_SIZE; i++ ) - { + for (i = 0; i < MBEDTLS_X509_MAX_VERIFY_CHAIN_SIZE; i++) { ver_chain->items[i].crt = NULL; ver_chain->items[i].flags = (uint32_t) -1; } @@ -406,35 +403,36 @@ static void x509_crt_verify_chain_reset( /* * Version ::= INTEGER { v1(0), v2(1), v3(2) } */ -static int x509_get_version( unsigned char **p, - const unsigned char *end, - int *ver ) +static int x509_get_version(unsigned char **p, + const unsigned char *end, + int *ver) { int ret = MBEDTLS_ERR_ERROR_CORRUPTION_DETECTED; size_t len; - if( ( ret = mbedtls_asn1_get_tag( p, end, &len, - MBEDTLS_ASN1_CONTEXT_SPECIFIC | MBEDTLS_ASN1_CONSTRUCTED | 0 ) ) != 0 ) - { - if( ret == MBEDTLS_ERR_ASN1_UNEXPECTED_TAG ) - { + if ((ret = mbedtls_asn1_get_tag(p, end, &len, + MBEDTLS_ASN1_CONTEXT_SPECIFIC | MBEDTLS_ASN1_CONSTRUCTED | + 0)) != 0) { + if (ret == MBEDTLS_ERR_ASN1_UNEXPECTED_TAG) { *ver = 0; - return( 0 ); + return 0; } - return( MBEDTLS_ERROR_ADD( MBEDTLS_ERR_X509_INVALID_FORMAT, ret ) ); + return MBEDTLS_ERROR_ADD(MBEDTLS_ERR_X509_INVALID_FORMAT, ret); } end = *p + len; - if( ( ret = mbedtls_asn1_get_int( p, end, ver ) ) != 0 ) - return( MBEDTLS_ERROR_ADD( MBEDTLS_ERR_X509_INVALID_VERSION, ret ) ); + if ((ret = mbedtls_asn1_get_int(p, end, ver)) != 0) { + return MBEDTLS_ERROR_ADD(MBEDTLS_ERR_X509_INVALID_VERSION, ret); + } - if( *p != end ) - return( MBEDTLS_ERROR_ADD( MBEDTLS_ERR_X509_INVALID_VERSION, - MBEDTLS_ERR_ASN1_LENGTH_MISMATCH ) ); + if (*p != end) { + return MBEDTLS_ERROR_ADD(MBEDTLS_ERR_X509_INVALID_VERSION, + MBEDTLS_ERR_ASN1_LENGTH_MISMATCH); + } - return( 0 ); + return 0; } /* @@ -442,66 +440,72 @@ static int x509_get_version( unsigned char **p, * notBefore Time, * notAfter Time } */ -static int x509_get_dates( unsigned char **p, - const unsigned char *end, - mbedtls_x509_time *from, - mbedtls_x509_time *to ) +static int x509_get_dates(unsigned char **p, + const unsigned char *end, + mbedtls_x509_time *from, + mbedtls_x509_time *to) { int ret = MBEDTLS_ERR_ERROR_CORRUPTION_DETECTED; size_t len; - if( ( ret = mbedtls_asn1_get_tag( p, end, &len, - MBEDTLS_ASN1_CONSTRUCTED | MBEDTLS_ASN1_SEQUENCE ) ) != 0 ) - return( MBEDTLS_ERROR_ADD( MBEDTLS_ERR_X509_INVALID_DATE, ret ) ); + if ((ret = mbedtls_asn1_get_tag(p, end, &len, + MBEDTLS_ASN1_CONSTRUCTED | MBEDTLS_ASN1_SEQUENCE)) != 0) { + return MBEDTLS_ERROR_ADD(MBEDTLS_ERR_X509_INVALID_DATE, ret); + } end = *p + len; - if( ( ret = mbedtls_x509_get_time( p, end, from ) ) != 0 ) - return( ret ); + if ((ret = mbedtls_x509_get_time(p, end, from)) != 0) { + return ret; + } - if( ( ret = mbedtls_x509_get_time( p, end, to ) ) != 0 ) - return( ret ); + if ((ret = mbedtls_x509_get_time(p, end, to)) != 0) { + return ret; + } - if( *p != end ) - return( MBEDTLS_ERROR_ADD( MBEDTLS_ERR_X509_INVALID_DATE, - MBEDTLS_ERR_ASN1_LENGTH_MISMATCH ) ); + if (*p != end) { + return MBEDTLS_ERROR_ADD(MBEDTLS_ERR_X509_INVALID_DATE, + MBEDTLS_ERR_ASN1_LENGTH_MISMATCH); + } - return( 0 ); + return 0; } /* * X.509 v2/v3 unique identifier (not parsed) */ -static int x509_get_uid( unsigned char **p, - const unsigned char *end, - mbedtls_x509_buf *uid, int n ) +static int x509_get_uid(unsigned char **p, + const unsigned char *end, + mbedtls_x509_buf *uid, int n) { int ret = MBEDTLS_ERR_ERROR_CORRUPTION_DETECTED; - if( *p == end ) - return( 0 ); + if (*p == end) { + return 0; + } uid->tag = **p; - if( ( ret = mbedtls_asn1_get_tag( p, end, &uid->len, - MBEDTLS_ASN1_CONTEXT_SPECIFIC | MBEDTLS_ASN1_CONSTRUCTED | n ) ) != 0 ) - { - if( ret == MBEDTLS_ERR_ASN1_UNEXPECTED_TAG ) - return( 0 ); + if ((ret = mbedtls_asn1_get_tag(p, end, &uid->len, + MBEDTLS_ASN1_CONTEXT_SPECIFIC | MBEDTLS_ASN1_CONSTRUCTED | + n)) != 0) { + if (ret == MBEDTLS_ERR_ASN1_UNEXPECTED_TAG) { + return 0; + } - return( MBEDTLS_ERROR_ADD( MBEDTLS_ERR_X509_INVALID_FORMAT, ret ) ); + return MBEDTLS_ERROR_ADD(MBEDTLS_ERR_X509_INVALID_FORMAT, ret); } uid->p = *p; *p += uid->len; - return( 0 ); + return 0; } -static int x509_get_basic_constraints( unsigned char **p, - const unsigned char *end, - int *ca_istrue, - int *max_pathlen ) +static int x509_get_basic_constraints(unsigned char **p, + const unsigned char *end, + int *ca_istrue, + int *max_pathlen) { int ret = MBEDTLS_ERR_ERROR_CORRUPTION_DETECTED; size_t len; @@ -514,88 +518,52 @@ static int x509_get_basic_constraints( unsigned char **p, *ca_istrue = 0; /* DEFAULT FALSE */ *max_pathlen = 0; /* endless */ - if( ( ret = mbedtls_asn1_get_tag( p, end, &len, - MBEDTLS_ASN1_CONSTRUCTED | MBEDTLS_ASN1_SEQUENCE ) ) != 0 ) - return( MBEDTLS_ERROR_ADD( MBEDTLS_ERR_X509_INVALID_EXTENSIONS, ret ) ); + if ((ret = mbedtls_asn1_get_tag(p, end, &len, + MBEDTLS_ASN1_CONSTRUCTED | MBEDTLS_ASN1_SEQUENCE)) != 0) { + return MBEDTLS_ERROR_ADD(MBEDTLS_ERR_X509_INVALID_EXTENSIONS, ret); + } - if( *p == end ) - return( 0 ); + if (*p == end) { + return 0; + } - if( ( ret = mbedtls_asn1_get_bool( p, end, ca_istrue ) ) != 0 ) - { - if( ret == MBEDTLS_ERR_ASN1_UNEXPECTED_TAG ) - ret = mbedtls_asn1_get_int( p, end, ca_istrue ); + if ((ret = mbedtls_asn1_get_bool(p, end, ca_istrue)) != 0) { + if (ret == MBEDTLS_ERR_ASN1_UNEXPECTED_TAG) { + ret = mbedtls_asn1_get_int(p, end, ca_istrue); + } - if( ret != 0 ) - return( MBEDTLS_ERROR_ADD( MBEDTLS_ERR_X509_INVALID_EXTENSIONS, ret ) ); + if (ret != 0) { + return MBEDTLS_ERROR_ADD(MBEDTLS_ERR_X509_INVALID_EXTENSIONS, ret); + } - if( *ca_istrue != 0 ) + if (*ca_istrue != 0) { *ca_istrue = 1; + } } - if( *p == end ) - return( 0 ); + if (*p == end) { + return 0; + } - if( ( ret = mbedtls_asn1_get_int( p, end, max_pathlen ) ) != 0 ) - return( MBEDTLS_ERROR_ADD( MBEDTLS_ERR_X509_INVALID_EXTENSIONS, ret ) ); + if ((ret = mbedtls_asn1_get_int(p, end, max_pathlen)) != 0) { + return MBEDTLS_ERROR_ADD(MBEDTLS_ERR_X509_INVALID_EXTENSIONS, ret); + } - if( *p != end ) - return( MBEDTLS_ERROR_ADD( MBEDTLS_ERR_X509_INVALID_EXTENSIONS, - MBEDTLS_ERR_ASN1_LENGTH_MISMATCH ) ); + if (*p != end) { + return MBEDTLS_ERROR_ADD(MBEDTLS_ERR_X509_INVALID_EXTENSIONS, + MBEDTLS_ERR_ASN1_LENGTH_MISMATCH); + } /* Do not accept max_pathlen equal to INT_MAX to avoid a signed integer * overflow, which is an undefined behavior. */ - if( *max_pathlen == INT_MAX ) - return( MBEDTLS_ERROR_ADD( MBEDTLS_ERR_X509_INVALID_EXTENSIONS, - MBEDTLS_ERR_ASN1_INVALID_LENGTH ) ); + if (*max_pathlen == INT_MAX) { + return MBEDTLS_ERROR_ADD(MBEDTLS_ERR_X509_INVALID_EXTENSIONS, + MBEDTLS_ERR_ASN1_INVALID_LENGTH); + } (*max_pathlen)++; - return( 0 ); -} - -static int x509_get_ns_cert_type( unsigned char **p, - const unsigned char *end, - unsigned char *ns_cert_type) -{ - int ret = MBEDTLS_ERR_ERROR_CORRUPTION_DETECTED; - mbedtls_x509_bitstring bs = { 0, 0, NULL }; - - if( ( ret = mbedtls_asn1_get_bitstring( p, end, &bs ) ) != 0 ) - return( MBEDTLS_ERROR_ADD( MBEDTLS_ERR_X509_INVALID_EXTENSIONS, ret ) ); - - if( bs.len != 1 ) - return( MBEDTLS_ERROR_ADD( MBEDTLS_ERR_X509_INVALID_EXTENSIONS, - MBEDTLS_ERR_ASN1_INVALID_LENGTH ) ); - - /* Get actual bitstring */ - *ns_cert_type = *bs.p; - return( 0 ); -} - -static int x509_get_key_usage( unsigned char **p, - const unsigned char *end, - unsigned int *key_usage) -{ - int ret = MBEDTLS_ERR_ERROR_CORRUPTION_DETECTED; - size_t i; - mbedtls_x509_bitstring bs = { 0, 0, NULL }; - - if( ( ret = mbedtls_asn1_get_bitstring( p, end, &bs ) ) != 0 ) - return( MBEDTLS_ERROR_ADD( MBEDTLS_ERR_X509_INVALID_EXTENSIONS, ret ) ); - - if( bs.len < 1 ) - return( MBEDTLS_ERROR_ADD( MBEDTLS_ERR_X509_INVALID_EXTENSIONS, - MBEDTLS_ERR_ASN1_INVALID_LENGTH ) ); - - /* Get actual bitstring */ - *key_usage = 0; - for( i = 0; i < bs.len && i < sizeof( unsigned int ); i++ ) - { - *key_usage |= (unsigned int) bs.p[i] << (8*i); - } - - return( 0 ); + return 0; } /* @@ -603,140 +571,23 @@ static int x509_get_key_usage( unsigned char **p, * * KeyPurposeId ::= OBJECT IDENTIFIER */ -static int x509_get_ext_key_usage( unsigned char **p, - const unsigned char *end, - mbedtls_x509_sequence *ext_key_usage) +static int x509_get_ext_key_usage(unsigned char **p, + const unsigned char *end, + mbedtls_x509_sequence *ext_key_usage) { int ret = MBEDTLS_ERR_ERROR_CORRUPTION_DETECTED; - if( ( ret = mbedtls_asn1_get_sequence_of( p, end, ext_key_usage, MBEDTLS_ASN1_OID ) ) != 0 ) - return( MBEDTLS_ERROR_ADD( MBEDTLS_ERR_X509_INVALID_EXTENSIONS, ret ) ); + if ((ret = mbedtls_asn1_get_sequence_of(p, end, ext_key_usage, MBEDTLS_ASN1_OID)) != 0) { + return MBEDTLS_ERROR_ADD(MBEDTLS_ERR_X509_INVALID_EXTENSIONS, ret); + } /* Sequence length must be >= 1 */ - if( ext_key_usage->buf.p == NULL ) - return( MBEDTLS_ERROR_ADD( MBEDTLS_ERR_X509_INVALID_EXTENSIONS, - MBEDTLS_ERR_ASN1_INVALID_LENGTH ) ); - - return( 0 ); -} - -/* - * SubjectAltName ::= GeneralNames - * - * GeneralNames ::= SEQUENCE SIZE (1..MAX) OF GeneralName - * - * GeneralName ::= CHOICE { - * otherName [0] OtherName, - * rfc822Name [1] IA5String, - * dNSName [2] IA5String, - * x400Address [3] ORAddress, - * directoryName [4] Name, - * ediPartyName [5] EDIPartyName, - * uniformResourceIdentifier [6] IA5String, - * iPAddress [7] OCTET STRING, - * registeredID [8] OBJECT IDENTIFIER } - * - * OtherName ::= SEQUENCE { - * type-id OBJECT IDENTIFIER, - * value [0] EXPLICIT ANY DEFINED BY type-id } - * - * EDIPartyName ::= SEQUENCE { - * nameAssigner [0] DirectoryString OPTIONAL, - * partyName [1] DirectoryString } - * - * NOTE: we list all types, but only use dNSName and otherName - * of type HwModuleName, as defined in RFC 4108, at this point. - */ -static int x509_get_subject_alt_name( unsigned char **p, - const unsigned char *end, - mbedtls_x509_sequence *subject_alt_name ) -{ - int ret = MBEDTLS_ERR_ERROR_CORRUPTION_DETECTED; - size_t len, tag_len; - mbedtls_asn1_buf *buf; - unsigned char tag; - mbedtls_asn1_sequence *cur = subject_alt_name; - - /* Get main sequence tag */ - if( ( ret = mbedtls_asn1_get_tag( p, end, &len, - MBEDTLS_ASN1_CONSTRUCTED | MBEDTLS_ASN1_SEQUENCE ) ) != 0 ) - return( MBEDTLS_ERROR_ADD( MBEDTLS_ERR_X509_INVALID_EXTENSIONS, ret ) ); - - if( *p + len != end ) - return( MBEDTLS_ERROR_ADD( MBEDTLS_ERR_X509_INVALID_EXTENSIONS, - MBEDTLS_ERR_ASN1_LENGTH_MISMATCH ) ); - - while( *p < end ) - { - mbedtls_x509_subject_alternative_name dummy_san_buf; - memset( &dummy_san_buf, 0, sizeof( dummy_san_buf ) ); - - tag = **p; - (*p)++; - if( ( ret = mbedtls_asn1_get_len( p, end, &tag_len ) ) != 0 ) - return( MBEDTLS_ERROR_ADD( MBEDTLS_ERR_X509_INVALID_EXTENSIONS, ret ) ); - - if( ( tag & MBEDTLS_ASN1_TAG_CLASS_MASK ) != - MBEDTLS_ASN1_CONTEXT_SPECIFIC ) - { - return( MBEDTLS_ERROR_ADD( MBEDTLS_ERR_X509_INVALID_EXTENSIONS, - MBEDTLS_ERR_ASN1_UNEXPECTED_TAG ) ); - } - - /* - * Check that the SAN is structured correctly. - */ - ret = mbedtls_x509_parse_subject_alt_name( &(cur->buf), &dummy_san_buf ); - /* - * In case the extension is malformed, return an error, - * and clear the allocated sequences. - */ - if( ret != 0 && ret != MBEDTLS_ERR_X509_FEATURE_UNAVAILABLE ) - { - mbedtls_x509_sequence *seq_cur = subject_alt_name->next; - mbedtls_x509_sequence *seq_prv; - while( seq_cur != NULL ) - { - seq_prv = seq_cur; - seq_cur = seq_cur->next; - mbedtls_platform_zeroize( seq_prv, - sizeof( mbedtls_x509_sequence ) ); - mbedtls_free( seq_prv ); - } - subject_alt_name->next = NULL; - return( ret ); - } - - /* Allocate and assign next pointer */ - if( cur->buf.p != NULL ) - { - if( cur->next != NULL ) - return( MBEDTLS_ERR_X509_INVALID_EXTENSIONS ); - - cur->next = mbedtls_calloc( 1, sizeof( mbedtls_asn1_sequence ) ); - - if( cur->next == NULL ) - return( MBEDTLS_ERROR_ADD( MBEDTLS_ERR_X509_INVALID_EXTENSIONS, - MBEDTLS_ERR_ASN1_ALLOC_FAILED ) ); - - cur = cur->next; - } - - buf = &(cur->buf); - buf->tag = tag; - buf->p = *p; - buf->len = tag_len; - *p += buf->len; + if (ext_key_usage->buf.p == NULL) { + return MBEDTLS_ERROR_ADD(MBEDTLS_ERR_X509_INVALID_EXTENSIONS, + MBEDTLS_ERR_ASN1_INVALID_LENGTH); } - /* Set final sequence entry's next pointer to NULL */ - cur->next = NULL; - - if( *p != end ) - return( MBEDTLS_ERROR_ADD( MBEDTLS_ERR_X509_INVALID_EXTENSIONS, - MBEDTLS_ERR_ASN1_LENGTH_MISMATCH ) ); - - return( 0 ); + return 0; } /* @@ -788,9 +639,9 @@ static int x509_get_subject_alt_name( unsigned char **p, * NOTE: we only parse and use anyPolicy without qualifiers at this point * as defined in RFC 5280. */ -static int x509_get_certificate_policies( unsigned char **p, - const unsigned char *end, - mbedtls_x509_sequence *certificate_policies ) +static int x509_get_certificate_policies(unsigned char **p, + const unsigned char *end, + mbedtls_x509_sequence *certificate_policies) { int ret, parse_ret = 0; size_t len; @@ -798,39 +649,43 @@ static int x509_get_certificate_policies( unsigned char **p, mbedtls_asn1_sequence *cur = certificate_policies; /* Get main sequence tag */ - ret = mbedtls_asn1_get_tag( p, end, &len, - MBEDTLS_ASN1_CONSTRUCTED | MBEDTLS_ASN1_SEQUENCE ); - if( ret != 0 ) - return( MBEDTLS_ERROR_ADD( MBEDTLS_ERR_X509_INVALID_EXTENSIONS, ret ) ); + ret = mbedtls_asn1_get_tag(p, end, &len, + MBEDTLS_ASN1_CONSTRUCTED | MBEDTLS_ASN1_SEQUENCE); + if (ret != 0) { + return MBEDTLS_ERROR_ADD(MBEDTLS_ERR_X509_INVALID_EXTENSIONS, ret); + } - if( *p + len != end ) - return( MBEDTLS_ERROR_ADD( MBEDTLS_ERR_X509_INVALID_EXTENSIONS, - MBEDTLS_ERR_ASN1_LENGTH_MISMATCH ) ); + if (*p + len != end) { + return MBEDTLS_ERROR_ADD(MBEDTLS_ERR_X509_INVALID_EXTENSIONS, + MBEDTLS_ERR_ASN1_LENGTH_MISMATCH); + } /* * Cannot be an empty sequence. */ - if( len == 0 ) - return( MBEDTLS_ERROR_ADD( MBEDTLS_ERR_X509_INVALID_EXTENSIONS, - MBEDTLS_ERR_ASN1_LENGTH_MISMATCH ) ); + if (len == 0) { + return MBEDTLS_ERROR_ADD(MBEDTLS_ERR_X509_INVALID_EXTENSIONS, + MBEDTLS_ERR_ASN1_LENGTH_MISMATCH); + } - while( *p < end ) - { + while (*p < end) { mbedtls_x509_buf policy_oid; const unsigned char *policy_end; /* * Get the policy sequence */ - if( ( ret = mbedtls_asn1_get_tag( p, end, &len, - MBEDTLS_ASN1_CONSTRUCTED | MBEDTLS_ASN1_SEQUENCE ) ) != 0 ) - return( MBEDTLS_ERROR_ADD( MBEDTLS_ERR_X509_INVALID_EXTENSIONS, ret ) ); + if ((ret = mbedtls_asn1_get_tag(p, end, &len, + MBEDTLS_ASN1_CONSTRUCTED | MBEDTLS_ASN1_SEQUENCE)) != 0) { + return MBEDTLS_ERROR_ADD(MBEDTLS_ERR_X509_INVALID_EXTENSIONS, ret); + } policy_end = *p + len; - if( ( ret = mbedtls_asn1_get_tag( p, policy_end, &len, - MBEDTLS_ASN1_OID ) ) != 0 ) - return( MBEDTLS_ERROR_ADD( MBEDTLS_ERR_X509_INVALID_EXTENSIONS, ret ) ); + if ((ret = mbedtls_asn1_get_tag(p, policy_end, &len, + MBEDTLS_ASN1_OID)) != 0) { + return MBEDTLS_ERROR_ADD(MBEDTLS_ERR_X509_INVALID_EXTENSIONS, ret); + } policy_oid.tag = MBEDTLS_ASN1_OID; policy_oid.len = len; @@ -839,8 +694,7 @@ static int x509_get_certificate_policies( unsigned char **p, /* * Only AnyPolicy is currently supported when enforcing policy. */ - if( MBEDTLS_OID_CMP( MBEDTLS_OID_ANY_POLICY, &policy_oid ) != 0 ) - { + if (MBEDTLS_OID_CMP(MBEDTLS_OID_ANY_POLICY, &policy_oid) != 0) { /* * Set the parsing return code but continue parsing, in case this * extension is critical. @@ -849,135 +703,144 @@ static int x509_get_certificate_policies( unsigned char **p, } /* Allocate and assign next pointer */ - if( cur->buf.p != NULL ) - { - if( cur->next != NULL ) - return( MBEDTLS_ERR_X509_INVALID_EXTENSIONS ); + if (cur->buf.p != NULL) { + if (cur->next != NULL) { + return MBEDTLS_ERR_X509_INVALID_EXTENSIONS; + } - cur->next = mbedtls_calloc( 1, sizeof( mbedtls_asn1_sequence ) ); + cur->next = mbedtls_calloc(1, sizeof(mbedtls_asn1_sequence)); - if( cur->next == NULL ) - return( MBEDTLS_ERROR_ADD( MBEDTLS_ERR_X509_INVALID_EXTENSIONS, - MBEDTLS_ERR_ASN1_ALLOC_FAILED ) ); + if (cur->next == NULL) { + return MBEDTLS_ERROR_ADD(MBEDTLS_ERR_X509_INVALID_EXTENSIONS, + MBEDTLS_ERR_ASN1_ALLOC_FAILED); + } cur = cur->next; } - buf = &( cur->buf ); + buf = &(cur->buf); buf->tag = policy_oid.tag; buf->p = policy_oid.p; buf->len = policy_oid.len; *p += len; - /* - * If there is an optional qualifier, then *p < policy_end - * Check the Qualifier len to verify it doesn't exceed policy_end. - */ - if( *p < policy_end ) - { - if( ( ret = mbedtls_asn1_get_tag( p, policy_end, &len, - MBEDTLS_ASN1_CONSTRUCTED | MBEDTLS_ASN1_SEQUENCE ) ) != 0 ) - return( MBEDTLS_ERROR_ADD( MBEDTLS_ERR_X509_INVALID_EXTENSIONS, ret ) ); + /* + * If there is an optional qualifier, then *p < policy_end + * Check the Qualifier len to verify it doesn't exceed policy_end. + */ + if (*p < policy_end) { + if ((ret = mbedtls_asn1_get_tag(p, policy_end, &len, + MBEDTLS_ASN1_CONSTRUCTED | MBEDTLS_ASN1_SEQUENCE)) != + 0) { + return MBEDTLS_ERROR_ADD(MBEDTLS_ERR_X509_INVALID_EXTENSIONS, ret); + } /* * Skip the optional policy qualifiers. */ *p += len; } - if( *p != policy_end ) - return( MBEDTLS_ERROR_ADD( MBEDTLS_ERR_X509_INVALID_EXTENSIONS, - MBEDTLS_ERR_ASN1_LENGTH_MISMATCH ) ); + if (*p != policy_end) { + return MBEDTLS_ERROR_ADD(MBEDTLS_ERR_X509_INVALID_EXTENSIONS, + MBEDTLS_ERR_ASN1_LENGTH_MISMATCH); + } } /* Set final sequence entry's next pointer to NULL */ cur->next = NULL; - if( *p != end ) - return( MBEDTLS_ERROR_ADD( MBEDTLS_ERR_X509_INVALID_EXTENSIONS, - MBEDTLS_ERR_ASN1_LENGTH_MISMATCH ) ); + if (*p != end) { + return MBEDTLS_ERROR_ADD(MBEDTLS_ERR_X509_INVALID_EXTENSIONS, + MBEDTLS_ERR_ASN1_LENGTH_MISMATCH); + } - return( parse_ret ); + return parse_ret; } /* * X.509 v3 extensions * */ -static int x509_get_crt_ext( unsigned char **p, - const unsigned char *end, - mbedtls_x509_crt *crt, - mbedtls_x509_crt_ext_cb_t cb, - void *p_ctx ) +static int x509_get_crt_ext(unsigned char **p, + const unsigned char *end, + mbedtls_x509_crt *crt, + mbedtls_x509_crt_ext_cb_t cb, + void *p_ctx) { int ret = MBEDTLS_ERR_ERROR_CORRUPTION_DETECTED; size_t len; unsigned char *end_ext_data, *start_ext_octet, *end_ext_octet; - if( *p == end ) - return( 0 ); + if (*p == end) { + return 0; + } - if( ( ret = mbedtls_x509_get_ext( p, end, &crt->v3_ext, 3 ) ) != 0 ) - return( ret ); + if ((ret = mbedtls_x509_get_ext(p, end, &crt->v3_ext, 3)) != 0) { + return ret; + } end = crt->v3_ext.p + crt->v3_ext.len; - while( *p < end ) - { + while (*p < end) { /* * Extension ::= SEQUENCE { * extnID OBJECT IDENTIFIER, * critical BOOLEAN DEFAULT FALSE, * extnValue OCTET STRING } */ - mbedtls_x509_buf extn_oid = {0, 0, NULL}; + mbedtls_x509_buf extn_oid = { 0, 0, NULL }; int is_critical = 0; /* DEFAULT FALSE */ int ext_type = 0; - if( ( ret = mbedtls_asn1_get_tag( p, end, &len, - MBEDTLS_ASN1_CONSTRUCTED | MBEDTLS_ASN1_SEQUENCE ) ) != 0 ) - return( MBEDTLS_ERROR_ADD( MBEDTLS_ERR_X509_INVALID_EXTENSIONS, ret ) ); + if ((ret = mbedtls_asn1_get_tag(p, end, &len, + MBEDTLS_ASN1_CONSTRUCTED | MBEDTLS_ASN1_SEQUENCE)) != 0) { + return MBEDTLS_ERROR_ADD(MBEDTLS_ERR_X509_INVALID_EXTENSIONS, ret); + } end_ext_data = *p + len; /* Get extension ID */ - if( ( ret = mbedtls_asn1_get_tag( p, end_ext_data, &extn_oid.len, - MBEDTLS_ASN1_OID ) ) != 0 ) - return( MBEDTLS_ERROR_ADD( MBEDTLS_ERR_X509_INVALID_EXTENSIONS, ret ) ); + if ((ret = mbedtls_asn1_get_tag(p, end_ext_data, &extn_oid.len, + MBEDTLS_ASN1_OID)) != 0) { + return MBEDTLS_ERROR_ADD(MBEDTLS_ERR_X509_INVALID_EXTENSIONS, ret); + } extn_oid.tag = MBEDTLS_ASN1_OID; extn_oid.p = *p; *p += extn_oid.len; /* Get optional critical */ - if( ( ret = mbedtls_asn1_get_bool( p, end_ext_data, &is_critical ) ) != 0 && - ( ret != MBEDTLS_ERR_ASN1_UNEXPECTED_TAG ) ) - return( MBEDTLS_ERROR_ADD( MBEDTLS_ERR_X509_INVALID_EXTENSIONS, ret ) ); + if ((ret = mbedtls_asn1_get_bool(p, end_ext_data, &is_critical)) != 0 && + (ret != MBEDTLS_ERR_ASN1_UNEXPECTED_TAG)) { + return MBEDTLS_ERROR_ADD(MBEDTLS_ERR_X509_INVALID_EXTENSIONS, ret); + } /* Data should be octet string type */ - if( ( ret = mbedtls_asn1_get_tag( p, end_ext_data, &len, - MBEDTLS_ASN1_OCTET_STRING ) ) != 0 ) - return( MBEDTLS_ERROR_ADD( MBEDTLS_ERR_X509_INVALID_EXTENSIONS, ret ) ); + if ((ret = mbedtls_asn1_get_tag(p, end_ext_data, &len, + MBEDTLS_ASN1_OCTET_STRING)) != 0) { + return MBEDTLS_ERROR_ADD(MBEDTLS_ERR_X509_INVALID_EXTENSIONS, ret); + } start_ext_octet = *p; end_ext_octet = *p + len; - if( end_ext_octet != end_ext_data ) - return( MBEDTLS_ERROR_ADD( MBEDTLS_ERR_X509_INVALID_EXTENSIONS, - MBEDTLS_ERR_ASN1_LENGTH_MISMATCH ) ); + if (end_ext_octet != end_ext_data) { + return MBEDTLS_ERROR_ADD(MBEDTLS_ERR_X509_INVALID_EXTENSIONS, + MBEDTLS_ERR_ASN1_LENGTH_MISMATCH); + } /* * Detect supported extensions */ - ret = mbedtls_oid_get_x509_ext_type( &extn_oid, &ext_type ); + ret = mbedtls_oid_get_x509_ext_type(&extn_oid, &ext_type); - if( ret != 0 ) - { + if (ret != 0) { /* Give the callback (if any) a chance to handle the extension */ - if( cb != NULL ) - { - ret = cb( p_ctx, crt, &extn_oid, is_critical, *p, end_ext_octet ); - if( ret != 0 && is_critical ) - return( ret ); + if (cb != NULL) { + ret = cb(p_ctx, crt, &extn_oid, is_critical, *p, end_ext_octet); + if (ret != 0 && is_critical) { + return ret; + } *p = end_ext_octet; continue; } @@ -985,131 +848,139 @@ static int x509_get_crt_ext( unsigned char **p, /* No parser found, skip extension */ *p = end_ext_octet; - if( is_critical ) - { + if (is_critical) { /* Data is marked as critical: fail */ - return( MBEDTLS_ERROR_ADD( MBEDTLS_ERR_X509_INVALID_EXTENSIONS, - MBEDTLS_ERR_ASN1_UNEXPECTED_TAG ) ); + return MBEDTLS_ERROR_ADD(MBEDTLS_ERR_X509_INVALID_EXTENSIONS, + MBEDTLS_ERR_ASN1_UNEXPECTED_TAG); } continue; } /* Forbid repeated extensions */ - if( ( crt->ext_types & ext_type ) != 0 ) - return( MBEDTLS_ERR_X509_INVALID_EXTENSIONS ); + if ((crt->ext_types & ext_type) != 0) { + return MBEDTLS_ERR_X509_INVALID_EXTENSIONS; + } crt->ext_types |= ext_type; - switch( ext_type ) - { - case MBEDTLS_X509_EXT_BASIC_CONSTRAINTS: - /* Parse basic constraints */ - if( ( ret = x509_get_basic_constraints( p, end_ext_octet, - &crt->ca_istrue, &crt->max_pathlen ) ) != 0 ) - return( ret ); - break; + switch (ext_type) { + case MBEDTLS_X509_EXT_BASIC_CONSTRAINTS: + /* Parse basic constraints */ + if ((ret = x509_get_basic_constraints(p, end_ext_octet, + &crt->ca_istrue, &crt->max_pathlen)) != 0) { + return ret; + } + break; - case MBEDTLS_X509_EXT_KEY_USAGE: - /* Parse key usage */ - if( ( ret = x509_get_key_usage( p, end_ext_octet, - &crt->key_usage ) ) != 0 ) - return( ret ); - break; + case MBEDTLS_X509_EXT_KEY_USAGE: + /* Parse key usage */ + if ((ret = mbedtls_x509_get_key_usage(p, end_ext_octet, + &crt->key_usage)) != 0) { + return ret; + } + break; - case MBEDTLS_X509_EXT_EXTENDED_KEY_USAGE: - /* Parse extended key usage */ - if( ( ret = x509_get_ext_key_usage( p, end_ext_octet, - &crt->ext_key_usage ) ) != 0 ) - return( ret ); - break; + case MBEDTLS_X509_EXT_EXTENDED_KEY_USAGE: + /* Parse extended key usage */ + if ((ret = x509_get_ext_key_usage(p, end_ext_octet, + &crt->ext_key_usage)) != 0) { + return ret; + } + break; - case MBEDTLS_X509_EXT_SUBJECT_ALT_NAME: - /* Parse subject alt name */ - if( ( ret = x509_get_subject_alt_name( p, end_ext_octet, - &crt->subject_alt_names ) ) != 0 ) - return( ret ); - break; + case MBEDTLS_X509_EXT_SUBJECT_ALT_NAME: + /* Parse subject alt name */ + if ((ret = mbedtls_x509_get_subject_alt_name(p, end_ext_octet, + &crt->subject_alt_names)) != 0) { + return ret; + } + break; - case MBEDTLS_X509_EXT_NS_CERT_TYPE: - /* Parse netscape certificate type */ - if( ( ret = x509_get_ns_cert_type( p, end_ext_octet, - &crt->ns_cert_type ) ) != 0 ) - return( ret ); - break; + case MBEDTLS_X509_EXT_NS_CERT_TYPE: + /* Parse netscape certificate type */ + if ((ret = mbedtls_x509_get_ns_cert_type(p, end_ext_octet, + &crt->ns_cert_type)) != 0) { + return ret; + } + break; + + case MBEDTLS_OID_X509_EXT_CERTIFICATE_POLICIES: + /* Parse certificate policies type */ + if ((ret = x509_get_certificate_policies(p, end_ext_octet, + &crt->certificate_policies)) != 0) { + /* Give the callback (if any) a chance to handle the extension + * if it contains unsupported policies */ + if (ret == MBEDTLS_ERR_X509_FEATURE_UNAVAILABLE && cb != NULL && + cb(p_ctx, crt, &extn_oid, is_critical, + start_ext_octet, end_ext_octet) == 0) { + break; + } - case MBEDTLS_OID_X509_EXT_CERTIFICATE_POLICIES: - /* Parse certificate policies type */ - if( ( ret = x509_get_certificate_policies( p, end_ext_octet, - &crt->certificate_policies ) ) != 0 ) - { - /* Give the callback (if any) a chance to handle the extension - * if it contains unsupported policies */ - if( ret == MBEDTLS_ERR_X509_FEATURE_UNAVAILABLE && cb != NULL && - cb( p_ctx, crt, &extn_oid, is_critical, - start_ext_octet, end_ext_octet ) == 0 ) - break; - - if( is_critical ) - return( ret ); - else + if (is_critical) { + return ret; + } else + /* + * If MBEDTLS_ERR_X509_FEATURE_UNAVAILABLE is returned, then we + * cannot interpret or enforce the policy. However, it is up to + * the user to choose how to enforce the policies, + * unless the extension is critical. + */ + if (ret != MBEDTLS_ERR_X509_FEATURE_UNAVAILABLE) { + return ret; + } + } + break; + + default: /* - * If MBEDTLS_ERR_X509_FEATURE_UNAVAILABLE is returned, then we - * cannot interpret or enforce the policy. However, it is up to - * the user to choose how to enforce the policies, - * unless the extension is critical. + * If this is a non-critical extension, which the oid layer + * supports, but there isn't an x509 parser for it, + * skip the extension. */ - if( ret != MBEDTLS_ERR_X509_FEATURE_UNAVAILABLE ) - return( ret ); - } - break; - - default: - /* - * If this is a non-critical extension, which the oid layer - * supports, but there isn't an x509 parser for it, - * skip the extension. - */ - if( is_critical ) - return( MBEDTLS_ERR_X509_FEATURE_UNAVAILABLE ); - else - *p = end_ext_octet; + if (is_critical) { + return MBEDTLS_ERR_X509_FEATURE_UNAVAILABLE; + } else { + *p = end_ext_octet; + } } } - if( *p != end ) - return( MBEDTLS_ERROR_ADD( MBEDTLS_ERR_X509_INVALID_EXTENSIONS, - MBEDTLS_ERR_ASN1_LENGTH_MISMATCH ) ); + if (*p != end) { + return MBEDTLS_ERROR_ADD(MBEDTLS_ERR_X509_INVALID_EXTENSIONS, + MBEDTLS_ERR_ASN1_LENGTH_MISMATCH); + } - return( 0 ); + return 0; } /* * Parse and fill a single X.509 certificate in DER format */ -static int x509_crt_parse_der_core( mbedtls_x509_crt *crt, - const unsigned char *buf, - size_t buflen, - int make_copy, - mbedtls_x509_crt_ext_cb_t cb, - void *p_ctx ) +static int x509_crt_parse_der_core(mbedtls_x509_crt *crt, + const unsigned char *buf, + size_t buflen, + int make_copy, + mbedtls_x509_crt_ext_cb_t cb, + void *p_ctx) { int ret = MBEDTLS_ERR_ERROR_CORRUPTION_DETECTED; size_t len; unsigned char *p, *end, *crt_end; mbedtls_x509_buf sig_params1, sig_params2, sig_oid2; - memset( &sig_params1, 0, sizeof( mbedtls_x509_buf ) ); - memset( &sig_params2, 0, sizeof( mbedtls_x509_buf ) ); - memset( &sig_oid2, 0, sizeof( mbedtls_x509_buf ) ); + memset(&sig_params1, 0, sizeof(mbedtls_x509_buf)); + memset(&sig_params2, 0, sizeof(mbedtls_x509_buf)); + memset(&sig_oid2, 0, sizeof(mbedtls_x509_buf)); /* * Check for valid input */ - if( crt == NULL || buf == NULL ) - return( MBEDTLS_ERR_X509_BAD_INPUT_DATA ); + if (crt == NULL || buf == NULL) { + return MBEDTLS_ERR_X509_BAD_INPUT_DATA; + } /* Use the original buffer until we figure out actual length. */ - p = (unsigned char*) buf; + p = (unsigned char *) buf; len = buflen; end = p + len; @@ -1119,31 +990,28 @@ static int x509_crt_parse_der_core( mbedtls_x509_crt *crt, * signatureAlgorithm AlgorithmIdentifier, * signatureValue BIT STRING } */ - if( ( ret = mbedtls_asn1_get_tag( &p, end, &len, - MBEDTLS_ASN1_CONSTRUCTED | MBEDTLS_ASN1_SEQUENCE ) ) != 0 ) - { - mbedtls_x509_crt_free( crt ); - return( MBEDTLS_ERR_X509_INVALID_FORMAT ); + if ((ret = mbedtls_asn1_get_tag(&p, end, &len, + MBEDTLS_ASN1_CONSTRUCTED | MBEDTLS_ASN1_SEQUENCE)) != 0) { + mbedtls_x509_crt_free(crt); + return MBEDTLS_ERR_X509_INVALID_FORMAT; } end = crt_end = p + len; crt->raw.len = crt_end - buf; - if( make_copy != 0 ) - { + if (make_copy != 0) { /* Create and populate a new buffer for the raw field. */ - crt->raw.p = p = mbedtls_calloc( 1, crt->raw.len ); - if( crt->raw.p == NULL ) - return( MBEDTLS_ERR_X509_ALLOC_FAILED ); + crt->raw.p = p = mbedtls_calloc(1, crt->raw.len); + if (crt->raw.p == NULL) { + return MBEDTLS_ERR_X509_ALLOC_FAILED; + } - memcpy( crt->raw.p, buf, crt->raw.len ); + memcpy(crt->raw.p, buf, crt->raw.len); crt->own_buffer = 1; p += crt->raw.len - len; end = crt_end = p + len; - } - else - { - crt->raw.p = (unsigned char*) buf; + } else { + crt->raw.p = (unsigned char *) buf; crt->own_buffer = 0; } @@ -1152,11 +1020,10 @@ static int x509_crt_parse_der_core( mbedtls_x509_crt *crt, */ crt->tbs.p = p; - if( ( ret = mbedtls_asn1_get_tag( &p, end, &len, - MBEDTLS_ASN1_CONSTRUCTED | MBEDTLS_ASN1_SEQUENCE ) ) != 0 ) - { - mbedtls_x509_crt_free( crt ); - return( MBEDTLS_ERROR_ADD( MBEDTLS_ERR_X509_INVALID_FORMAT, ret ) ); + if ((ret = mbedtls_asn1_get_tag(&p, end, &len, + MBEDTLS_ASN1_CONSTRUCTED | MBEDTLS_ASN1_SEQUENCE)) != 0) { + mbedtls_x509_crt_free(crt); + return MBEDTLS_ERROR_ADD(MBEDTLS_ERR_X509_INVALID_FORMAT, ret); } end = p + len; @@ -1169,29 +1036,26 @@ static int x509_crt_parse_der_core( mbedtls_x509_crt *crt, * * signature AlgorithmIdentifier */ - if( ( ret = x509_get_version( &p, end, &crt->version ) ) != 0 || - ( ret = mbedtls_x509_get_serial( &p, end, &crt->serial ) ) != 0 || - ( ret = mbedtls_x509_get_alg( &p, end, &crt->sig_oid, - &sig_params1 ) ) != 0 ) - { - mbedtls_x509_crt_free( crt ); - return( ret ); + if ((ret = x509_get_version(&p, end, &crt->version)) != 0 || + (ret = mbedtls_x509_get_serial(&p, end, &crt->serial)) != 0 || + (ret = mbedtls_x509_get_alg(&p, end, &crt->sig_oid, + &sig_params1)) != 0) { + mbedtls_x509_crt_free(crt); + return ret; } - if( crt->version < 0 || crt->version > 2 ) - { - mbedtls_x509_crt_free( crt ); - return( MBEDTLS_ERR_X509_UNKNOWN_VERSION ); + if (crt->version < 0 || crt->version > 2) { + mbedtls_x509_crt_free(crt); + return MBEDTLS_ERR_X509_UNKNOWN_VERSION; } crt->version++; - if( ( ret = mbedtls_x509_get_sig_alg( &crt->sig_oid, &sig_params1, - &crt->sig_md, &crt->sig_pk, - &crt->sig_opts ) ) != 0 ) - { - mbedtls_x509_crt_free( crt ); - return( ret ); + if ((ret = mbedtls_x509_get_sig_alg(&crt->sig_oid, &sig_params1, + &crt->sig_md, &crt->sig_pk, + &crt->sig_opts)) != 0) { + mbedtls_x509_crt_free(crt); + return ret; } /* @@ -1199,17 +1063,15 @@ static int x509_crt_parse_der_core( mbedtls_x509_crt *crt, */ crt->issuer_raw.p = p; - if( ( ret = mbedtls_asn1_get_tag( &p, end, &len, - MBEDTLS_ASN1_CONSTRUCTED | MBEDTLS_ASN1_SEQUENCE ) ) != 0 ) - { - mbedtls_x509_crt_free( crt ); - return( MBEDTLS_ERROR_ADD( MBEDTLS_ERR_X509_INVALID_FORMAT, ret ) ); + if ((ret = mbedtls_asn1_get_tag(&p, end, &len, + MBEDTLS_ASN1_CONSTRUCTED | MBEDTLS_ASN1_SEQUENCE)) != 0) { + mbedtls_x509_crt_free(crt); + return MBEDTLS_ERROR_ADD(MBEDTLS_ERR_X509_INVALID_FORMAT, ret); } - if( ( ret = mbedtls_x509_get_name( &p, p + len, &crt->issuer ) ) != 0 ) - { - mbedtls_x509_crt_free( crt ); - return( ret ); + if ((ret = mbedtls_x509_get_name(&p, p + len, &crt->issuer)) != 0) { + mbedtls_x509_crt_free(crt); + return ret; } crt->issuer_raw.len = p - crt->issuer_raw.p; @@ -1220,11 +1082,10 @@ static int x509_crt_parse_der_core( mbedtls_x509_crt *crt, * notAfter Time } * */ - if( ( ret = x509_get_dates( &p, end, &crt->valid_from, - &crt->valid_to ) ) != 0 ) - { - mbedtls_x509_crt_free( crt ); - return( ret ); + if ((ret = x509_get_dates(&p, end, &crt->valid_from, + &crt->valid_to)) != 0) { + mbedtls_x509_crt_free(crt); + return ret; } /* @@ -1232,17 +1093,15 @@ static int x509_crt_parse_der_core( mbedtls_x509_crt *crt, */ crt->subject_raw.p = p; - if( ( ret = mbedtls_asn1_get_tag( &p, end, &len, - MBEDTLS_ASN1_CONSTRUCTED | MBEDTLS_ASN1_SEQUENCE ) ) != 0 ) - { - mbedtls_x509_crt_free( crt ); - return( MBEDTLS_ERROR_ADD( MBEDTLS_ERR_X509_INVALID_FORMAT, ret ) ); + if ((ret = mbedtls_asn1_get_tag(&p, end, &len, + MBEDTLS_ASN1_CONSTRUCTED | MBEDTLS_ASN1_SEQUENCE)) != 0) { + mbedtls_x509_crt_free(crt); + return MBEDTLS_ERROR_ADD(MBEDTLS_ERR_X509_INVALID_FORMAT, ret); } - if( len && ( ret = mbedtls_x509_get_name( &p, p + len, &crt->subject ) ) != 0 ) - { - mbedtls_x509_crt_free( crt ); - return( ret ); + if (len && (ret = mbedtls_x509_get_name(&p, p + len, &crt->subject)) != 0) { + mbedtls_x509_crt_free(crt); + return ret; } crt->subject_raw.len = p - crt->subject_raw.p; @@ -1251,10 +1110,9 @@ static int x509_crt_parse_der_core( mbedtls_x509_crt *crt, * SubjectPublicKeyInfo */ crt->pk_raw.p = p; - if( ( ret = mbedtls_pk_parse_subpubkey( &p, end, &crt->pk ) ) != 0 ) - { - mbedtls_x509_crt_free( crt ); - return( ret ); + if ((ret = mbedtls_pk_parse_subpubkey(&p, end, &crt->pk)) != 0) { + mbedtls_x509_crt_free(crt); + return ret; } crt->pk_raw.len = p - crt->pk_raw.p; @@ -1266,41 +1124,34 @@ static int x509_crt_parse_der_core( mbedtls_x509_crt *crt, * extensions [3] EXPLICIT Extensions OPTIONAL * -- If present, version shall be v3 */ - if( crt->version == 2 || crt->version == 3 ) - { - ret = x509_get_uid( &p, end, &crt->issuer_id, 1 ); - if( ret != 0 ) - { - mbedtls_x509_crt_free( crt ); - return( ret ); + if (crt->version == 2 || crt->version == 3) { + ret = x509_get_uid(&p, end, &crt->issuer_id, 1); + if (ret != 0) { + mbedtls_x509_crt_free(crt); + return ret; } } - if( crt->version == 2 || crt->version == 3 ) - { - ret = x509_get_uid( &p, end, &crt->subject_id, 2 ); - if( ret != 0 ) - { - mbedtls_x509_crt_free( crt ); - return( ret ); + if (crt->version == 2 || crt->version == 3) { + ret = x509_get_uid(&p, end, &crt->subject_id, 2); + if (ret != 0) { + mbedtls_x509_crt_free(crt); + return ret; } } - if( crt->version == 3 ) - { - ret = x509_get_crt_ext( &p, end, crt, cb, p_ctx ); - if( ret != 0 ) - { - mbedtls_x509_crt_free( crt ); - return( ret ); + if (crt->version == 3) { + ret = x509_get_crt_ext(&p, end, crt, cb, p_ctx); + if (ret != 0) { + mbedtls_x509_crt_free(crt); + return ret; } } - if( p != end ) - { - mbedtls_x509_crt_free( crt ); - return( MBEDTLS_ERROR_ADD( MBEDTLS_ERR_X509_INVALID_FORMAT, - MBEDTLS_ERR_ASN1_LENGTH_MISMATCH ) ); + if (p != end) { + mbedtls_x509_crt_free(crt); + return MBEDTLS_ERROR_ADD(MBEDTLS_ERR_X509_INVALID_FORMAT, + MBEDTLS_ERR_ASN1_LENGTH_MISMATCH); } end = crt_end; @@ -1312,49 +1163,45 @@ static int x509_crt_parse_der_core( mbedtls_x509_crt *crt, * signatureAlgorithm AlgorithmIdentifier, * signatureValue BIT STRING */ - if( ( ret = mbedtls_x509_get_alg( &p, end, &sig_oid2, &sig_params2 ) ) != 0 ) - { - mbedtls_x509_crt_free( crt ); - return( ret ); + if ((ret = mbedtls_x509_get_alg(&p, end, &sig_oid2, &sig_params2)) != 0) { + mbedtls_x509_crt_free(crt); + return ret; } - if( crt->sig_oid.len != sig_oid2.len || - memcmp( crt->sig_oid.p, sig_oid2.p, crt->sig_oid.len ) != 0 || + if (crt->sig_oid.len != sig_oid2.len || + memcmp(crt->sig_oid.p, sig_oid2.p, crt->sig_oid.len) != 0 || sig_params1.tag != sig_params2.tag || sig_params1.len != sig_params2.len || - ( sig_params1.len != 0 && - memcmp( sig_params1.p, sig_params2.p, sig_params1.len ) != 0 ) ) - { - mbedtls_x509_crt_free( crt ); - return( MBEDTLS_ERR_X509_SIG_MISMATCH ); + (sig_params1.len != 0 && + memcmp(sig_params1.p, sig_params2.p, sig_params1.len) != 0)) { + mbedtls_x509_crt_free(crt); + return MBEDTLS_ERR_X509_SIG_MISMATCH; } - if( ( ret = mbedtls_x509_get_sig( &p, end, &crt->sig ) ) != 0 ) - { - mbedtls_x509_crt_free( crt ); - return( ret ); + if ((ret = mbedtls_x509_get_sig(&p, end, &crt->sig)) != 0) { + mbedtls_x509_crt_free(crt); + return ret; } - if( p != end ) - { - mbedtls_x509_crt_free( crt ); - return( MBEDTLS_ERROR_ADD( MBEDTLS_ERR_X509_INVALID_FORMAT, - MBEDTLS_ERR_ASN1_LENGTH_MISMATCH ) ); + if (p != end) { + mbedtls_x509_crt_free(crt); + return MBEDTLS_ERROR_ADD(MBEDTLS_ERR_X509_INVALID_FORMAT, + MBEDTLS_ERR_ASN1_LENGTH_MISMATCH); } - return( 0 ); + return 0; } /* * Parse one X.509 certificate in DER format from a buffer and add them to a * chained list */ -static int mbedtls_x509_crt_parse_der_internal( mbedtls_x509_crt *chain, - const unsigned char *buf, - size_t buflen, - int make_copy, - mbedtls_x509_crt_ext_cb_t cb, - void *p_ctx ) +static int mbedtls_x509_crt_parse_der_internal(mbedtls_x509_crt *chain, + const unsigned char *buf, + size_t buflen, + int make_copy, + mbedtls_x509_crt_ext_cb_t cb, + void *p_ctx) { int ret = MBEDTLS_ERR_ERROR_CORRUPTION_DETECTED; mbedtls_x509_crt *crt = chain, *prev = NULL; @@ -1362,11 +1209,11 @@ static int mbedtls_x509_crt_parse_der_internal( mbedtls_x509_crt *chain, /* * Check for valid input */ - if( crt == NULL || buf == NULL ) - return( MBEDTLS_ERR_X509_BAD_INPUT_DATA ); + if (crt == NULL || buf == NULL) { + return MBEDTLS_ERR_X509_BAD_INPUT_DATA; + } - while( crt->version != 0 && crt->next != NULL ) - { + while (crt->version != 0 && crt->next != NULL) { prev = crt; crt = crt->next; } @@ -1374,64 +1221,65 @@ static int mbedtls_x509_crt_parse_der_internal( mbedtls_x509_crt *chain, /* * Add new certificate on the end of the chain if needed. */ - if( crt->version != 0 && crt->next == NULL ) - { - crt->next = mbedtls_calloc( 1, sizeof( mbedtls_x509_crt ) ); + if (crt->version != 0 && crt->next == NULL) { + crt->next = mbedtls_calloc(1, sizeof(mbedtls_x509_crt)); - if( crt->next == NULL ) - return( MBEDTLS_ERR_X509_ALLOC_FAILED ); + if (crt->next == NULL) { + return MBEDTLS_ERR_X509_ALLOC_FAILED; + } prev = crt; - mbedtls_x509_crt_init( crt->next ); + mbedtls_x509_crt_init(crt->next); crt = crt->next; } - ret = x509_crt_parse_der_core( crt, buf, buflen, make_copy, cb, p_ctx ); - if( ret != 0 ) - { - if( prev ) + ret = x509_crt_parse_der_core(crt, buf, buflen, make_copy, cb, p_ctx); + if (ret != 0) { + if (prev) { prev->next = NULL; + } - if( crt != chain ) - mbedtls_free( crt ); + if (crt != chain) { + mbedtls_free(crt); + } - return( ret ); + return ret; } - return( 0 ); + return 0; } -int mbedtls_x509_crt_parse_der_nocopy( mbedtls_x509_crt *chain, - const unsigned char *buf, - size_t buflen ) +int mbedtls_x509_crt_parse_der_nocopy(mbedtls_x509_crt *chain, + const unsigned char *buf, + size_t buflen) { - return( mbedtls_x509_crt_parse_der_internal( chain, buf, buflen, 0, NULL, NULL ) ); + return mbedtls_x509_crt_parse_der_internal(chain, buf, buflen, 0, NULL, NULL); } -int mbedtls_x509_crt_parse_der_with_ext_cb( mbedtls_x509_crt *chain, - const unsigned char *buf, - size_t buflen, - int make_copy, - mbedtls_x509_crt_ext_cb_t cb, - void *p_ctx ) +int mbedtls_x509_crt_parse_der_with_ext_cb(mbedtls_x509_crt *chain, + const unsigned char *buf, + size_t buflen, + int make_copy, + mbedtls_x509_crt_ext_cb_t cb, + void *p_ctx) { - return( mbedtls_x509_crt_parse_der_internal( chain, buf, buflen, make_copy, cb, p_ctx ) ); + return mbedtls_x509_crt_parse_der_internal(chain, buf, buflen, make_copy, cb, p_ctx); } -int mbedtls_x509_crt_parse_der( mbedtls_x509_crt *chain, - const unsigned char *buf, - size_t buflen ) +int mbedtls_x509_crt_parse_der(mbedtls_x509_crt *chain, + const unsigned char *buf, + size_t buflen) { - return( mbedtls_x509_crt_parse_der_internal( chain, buf, buflen, 1, NULL, NULL ) ); + return mbedtls_x509_crt_parse_der_internal(chain, buf, buflen, 1, NULL, NULL); } /* * Parse one or more PEM certificates from a buffer and add them to the chained * list */ -int mbedtls_x509_crt_parse( mbedtls_x509_crt *chain, - const unsigned char *buf, - size_t buflen ) +int mbedtls_x509_crt_parse(mbedtls_x509_crt *chain, + const unsigned char *buf, + size_t buflen) { #if defined(MBEDTLS_PEM_PARSE_C) int success = 0, first_error = 0, total_failed = 0; @@ -1441,59 +1289,53 @@ int mbedtls_x509_crt_parse( mbedtls_x509_crt *chain, /* * Check for valid input */ - if( chain == NULL || buf == NULL ) - return( MBEDTLS_ERR_X509_BAD_INPUT_DATA ); + if (chain == NULL || buf == NULL) { + return MBEDTLS_ERR_X509_BAD_INPUT_DATA; + } /* * Determine buffer content. Buffer contains either one DER certificate or * one or more PEM certificates. */ #if defined(MBEDTLS_PEM_PARSE_C) - if( buflen != 0 && buf[buflen - 1] == '\0' && - strstr( (const char *) buf, "-----BEGIN CERTIFICATE-----" ) != NULL ) - { + if (buflen != 0 && buf[buflen - 1] == '\0' && + strstr((const char *) buf, "-----BEGIN CERTIFICATE-----") != NULL) { buf_format = MBEDTLS_X509_FORMAT_PEM; } - if( buf_format == MBEDTLS_X509_FORMAT_DER ) - return mbedtls_x509_crt_parse_der( chain, buf, buflen ); + if (buf_format == MBEDTLS_X509_FORMAT_DER) { + return mbedtls_x509_crt_parse_der(chain, buf, buflen); + } #else - return mbedtls_x509_crt_parse_der( chain, buf, buflen ); + return mbedtls_x509_crt_parse_der(chain, buf, buflen); #endif #if defined(MBEDTLS_PEM_PARSE_C) - if( buf_format == MBEDTLS_X509_FORMAT_PEM ) - { + if (buf_format == MBEDTLS_X509_FORMAT_PEM) { int ret = MBEDTLS_ERR_ERROR_CORRUPTION_DETECTED; mbedtls_pem_context pem; /* 1 rather than 0 since the terminating NULL byte is counted in */ - while( buflen > 1 ) - { + while (buflen > 1) { size_t use_len; - mbedtls_pem_init( &pem ); + mbedtls_pem_init(&pem); /* If we get there, we know the string is null-terminated */ - ret = mbedtls_pem_read_buffer( &pem, - "-----BEGIN CERTIFICATE-----", - "-----END CERTIFICATE-----", - buf, NULL, 0, &use_len ); + ret = mbedtls_pem_read_buffer(&pem, + "-----BEGIN CERTIFICATE-----", + "-----END CERTIFICATE-----", + buf, NULL, 0, &use_len); - if( ret == 0 ) - { + if (ret == 0) { /* * Was PEM encoded */ buflen -= use_len; buf += use_len; - } - else if( ret == MBEDTLS_ERR_PEM_BAD_INPUT_DATA ) - { - return( ret ); - } - else if( ret != MBEDTLS_ERR_PEM_NO_HEADER_FOOTER_PRESENT ) - { - mbedtls_pem_free( &pem ); + } else if (ret == MBEDTLS_ERR_PEM_BAD_INPUT_DATA) { + return ret; + } else if (ret != MBEDTLS_ERR_PEM_NO_HEADER_FOOTER_PRESENT) { + mbedtls_pem_free(&pem); /* * PEM header and footer were found @@ -1501,29 +1343,31 @@ int mbedtls_x509_crt_parse( mbedtls_x509_crt *chain, buflen -= use_len; buf += use_len; - if( first_error == 0 ) + if (first_error == 0) { first_error = ret; + } total_failed++; continue; - } - else + } else { break; + } - ret = mbedtls_x509_crt_parse_der( chain, pem.buf, pem.buflen ); + ret = mbedtls_x509_crt_parse_der(chain, pem.buf, pem.buflen); - mbedtls_pem_free( &pem ); + mbedtls_pem_free(&pem); - if( ret != 0 ) - { + if (ret != 0) { /* * Quit parsing on a memory error */ - if( ret == MBEDTLS_ERR_X509_ALLOC_FAILED ) - return( ret ); + if (ret == MBEDTLS_ERR_X509_ALLOC_FAILED) { + return ret; + } - if( first_error == 0 ) + if (first_error == 0) { first_error = ret; + } total_failed++; continue; @@ -1533,12 +1377,13 @@ int mbedtls_x509_crt_parse( mbedtls_x509_crt *chain, } } - if( success ) - return( total_failed ); - else if( first_error ) - return( first_error ); - else - return( MBEDTLS_ERR_X509_CERT_UNKNOWN_FORMAT ); + if (success) { + return total_failed; + } else if (first_error) { + return first_error; + } else { + return MBEDTLS_ERR_X509_CERT_UNKNOWN_FORMAT; + } #endif /* MBEDTLS_PEM_PARSE_C */ } @@ -1547,24 +1392,25 @@ int mbedtls_x509_crt_parse( mbedtls_x509_crt *chain, /* * Load one or more certificates and add them to the chained list */ -int mbedtls_x509_crt_parse_file( mbedtls_x509_crt *chain, const char *path ) +int mbedtls_x509_crt_parse_file(mbedtls_x509_crt *chain, const char *path) { int ret = MBEDTLS_ERR_ERROR_CORRUPTION_DETECTED; size_t n; unsigned char *buf; - if( ( ret = mbedtls_pk_load_file( path, &buf, &n ) ) != 0 ) - return( ret ); + if ((ret = mbedtls_pk_load_file(path, &buf, &n)) != 0) { + return ret; + } - ret = mbedtls_x509_crt_parse( chain, buf, n ); + ret = mbedtls_x509_crt_parse(chain, buf, n); - mbedtls_platform_zeroize( buf, n ); - mbedtls_free( buf ); + mbedtls_platform_zeroize(buf, n); + mbedtls_free(buf); - return( ret ); + return ret; } -int mbedtls_x509_crt_parse_path( mbedtls_x509_crt *chain, const char *path ) +int mbedtls_x509_crt_parse_path(mbedtls_x509_crt *chain, const char *path) { int ret = 0; #if defined(_WIN32) && !defined(EFIX64) && !defined(EFI32) @@ -1572,447 +1418,141 @@ int mbedtls_x509_crt_parse_path( mbedtls_x509_crt *chain, const char *path ) WCHAR szDir[MAX_PATH]; char filename[MAX_PATH]; char *p; - size_t len = strlen( path ); + size_t len = strlen(path); WIN32_FIND_DATAW file_data; HANDLE hFind; - if( len > MAX_PATH - 3 ) - return( MBEDTLS_ERR_X509_BAD_INPUT_DATA ); + if (len > MAX_PATH - 3) { + return MBEDTLS_ERR_X509_BAD_INPUT_DATA; + } - memset( szDir, 0, sizeof(szDir) ); - memset( filename, 0, MAX_PATH ); - memcpy( filename, path, len ); + memset(szDir, 0, sizeof(szDir)); + memset(filename, 0, MAX_PATH); + memcpy(filename, path, len); filename[len++] = '\\'; p = filename + len; filename[len++] = '*'; - w_ret = MultiByteToWideChar( CP_ACP, 0, filename, (int)len, szDir, - MAX_PATH - 3 ); - if( w_ret == 0 ) - return( MBEDTLS_ERR_X509_BAD_INPUT_DATA ); + w_ret = MultiByteToWideChar(CP_ACP, 0, filename, (int) len, szDir, + MAX_PATH - 3); + if (w_ret == 0) { + return MBEDTLS_ERR_X509_BAD_INPUT_DATA; + } - hFind = FindFirstFileW( szDir, &file_data ); - if( hFind == INVALID_HANDLE_VALUE ) - return( MBEDTLS_ERR_X509_FILE_IO_ERROR ); + hFind = FindFirstFileW(szDir, &file_data); + if (hFind == INVALID_HANDLE_VALUE) { + return MBEDTLS_ERR_X509_FILE_IO_ERROR; + } len = MAX_PATH - len; - do - { - memset( p, 0, len ); + do { + memset(p, 0, len); - if( file_data.dwFileAttributes & FILE_ATTRIBUTE_DIRECTORY ) + if (file_data.dwFileAttributes & FILE_ATTRIBUTE_DIRECTORY) { continue; + } - w_ret = WideCharToMultiByte( CP_ACP, 0, file_data.cFileName, - lstrlenW( file_data.cFileName ), - p, (int) len - 1, - NULL, NULL ); - if( w_ret == 0 ) - { + w_ret = WideCharToMultiByte(CP_ACP, 0, file_data.cFileName, + -1, + p, (int) len, + NULL, NULL); + if (w_ret == 0) { ret = MBEDTLS_ERR_X509_FILE_IO_ERROR; goto cleanup; } - w_ret = mbedtls_x509_crt_parse_file( chain, filename ); - if( w_ret < 0 ) + w_ret = mbedtls_x509_crt_parse_file(chain, filename); + if (w_ret < 0) { ret++; - else + } else { ret += w_ret; - } - while( FindNextFileW( hFind, &file_data ) != 0 ); + } + } while (FindNextFileW(hFind, &file_data) != 0); - if( GetLastError() != ERROR_NO_MORE_FILES ) + if (GetLastError() != ERROR_NO_MORE_FILES) { ret = MBEDTLS_ERR_X509_FILE_IO_ERROR; + } cleanup: - FindClose( hFind ); + FindClose(hFind); #else /* _WIN32 */ int t_ret; int snp_ret; struct stat sb; struct dirent *entry; char entry_name[MBEDTLS_X509_MAX_FILE_PATH_LEN]; - DIR *dir = opendir( path ); + DIR *dir = opendir(path); - if( dir == NULL ) - return( MBEDTLS_ERR_X509_FILE_IO_ERROR ); + if (dir == NULL) { + return MBEDTLS_ERR_X509_FILE_IO_ERROR; + } #if defined(MBEDTLS_THREADING_C) - if( ( ret = mbedtls_mutex_lock( &mbedtls_threading_readdir_mutex ) ) != 0 ) - { - closedir( dir ); - return( ret ); + if ((ret = mbedtls_mutex_lock(&mbedtls_threading_readdir_mutex)) != 0) { + closedir(dir); + return ret; } #endif /* MBEDTLS_THREADING_C */ - memset( &sb, 0, sizeof( sb ) ); + memset(&sb, 0, sizeof(sb)); - while( ( entry = readdir( dir ) ) != NULL ) - { - snp_ret = mbedtls_snprintf( entry_name, sizeof entry_name, - "%s/%s", path, entry->d_name ); + while ((entry = readdir(dir)) != NULL) { + snp_ret = mbedtls_snprintf(entry_name, sizeof(entry_name), + "%s/%s", path, entry->d_name); - if( snp_ret < 0 || (size_t)snp_ret >= sizeof entry_name ) - { + if (snp_ret < 0 || (size_t) snp_ret >= sizeof(entry_name)) { ret = MBEDTLS_ERR_X509_BUFFER_TOO_SMALL; goto cleanup; - } - else if( stat( entry_name, &sb ) == -1 ) - { - ret = MBEDTLS_ERR_X509_FILE_IO_ERROR; - goto cleanup; + } else if (stat(entry_name, &sb) == -1) { + if (errno == ENOENT) { + /* Broken symbolic link - ignore this entry. + stat(2) will return this error for either (a) a dangling + symlink or (b) a missing file. + Given that we have just obtained the filename from readdir, + assume that it does exist and therefore treat this as a + dangling symlink. */ + continue; + } else { + /* Some other file error; report the error. */ + ret = MBEDTLS_ERR_X509_FILE_IO_ERROR; + goto cleanup; + } } - if( !S_ISREG( sb.st_mode ) ) + if (!S_ISREG(sb.st_mode)) { continue; + } // Ignore parse errors // - t_ret = mbedtls_x509_crt_parse_file( chain, entry_name ); - if( t_ret < 0 ) + t_ret = mbedtls_x509_crt_parse_file(chain, entry_name); + if (t_ret < 0) { ret++; - else + } else { ret += t_ret; + } } cleanup: - closedir( dir ); + closedir(dir); #if defined(MBEDTLS_THREADING_C) - if( mbedtls_mutex_unlock( &mbedtls_threading_readdir_mutex ) != 0 ) + if (mbedtls_mutex_unlock(&mbedtls_threading_readdir_mutex) != 0) { ret = MBEDTLS_ERR_THREADING_MUTEX_ERROR; + } #endif /* MBEDTLS_THREADING_C */ #endif /* _WIN32 */ - return( ret ); + return ret; } #endif /* MBEDTLS_FS_IO */ #endif /* FSP_NOT_DEFINED */ -/* - * OtherName ::= SEQUENCE { - * type-id OBJECT IDENTIFIER, - * value [0] EXPLICIT ANY DEFINED BY type-id } - * - * HardwareModuleName ::= SEQUENCE { - * hwType OBJECT IDENTIFIER, - * hwSerialNum OCTET STRING } - * - * NOTE: we currently only parse and use otherName of type HwModuleName, - * as defined in RFC 4108. - */ -static int x509_get_other_name( const mbedtls_x509_buf *subject_alt_name, - mbedtls_x509_san_other_name *other_name ) -{ - int ret = 0; - size_t len; - unsigned char *p = subject_alt_name->p; - const unsigned char *end = p + subject_alt_name->len; - mbedtls_x509_buf cur_oid; - - if( ( subject_alt_name->tag & - ( MBEDTLS_ASN1_TAG_CLASS_MASK | MBEDTLS_ASN1_TAG_VALUE_MASK ) ) != - ( MBEDTLS_ASN1_CONTEXT_SPECIFIC | MBEDTLS_X509_SAN_OTHER_NAME ) ) - { - /* - * The given subject alternative name is not of type "othername". - */ - return( MBEDTLS_ERR_X509_BAD_INPUT_DATA ); - } - - if( ( ret = mbedtls_asn1_get_tag( &p, end, &len, - MBEDTLS_ASN1_OID ) ) != 0 ) - return( MBEDTLS_ERROR_ADD( MBEDTLS_ERR_X509_INVALID_EXTENSIONS, ret ) ); - - cur_oid.tag = MBEDTLS_ASN1_OID; - cur_oid.p = p; - cur_oid.len = len; - - /* - * Only HwModuleName is currently supported. - */ - if( MBEDTLS_OID_CMP( MBEDTLS_OID_ON_HW_MODULE_NAME, &cur_oid ) != 0 ) - { - return( MBEDTLS_ERR_X509_FEATURE_UNAVAILABLE ); - } - - if( p + len >= end ) - { - mbedtls_platform_zeroize( other_name, sizeof( *other_name ) ); - return( MBEDTLS_ERROR_ADD( MBEDTLS_ERR_X509_INVALID_EXTENSIONS, - MBEDTLS_ERR_ASN1_LENGTH_MISMATCH ) ); - } - p += len; - if( ( ret = mbedtls_asn1_get_tag( &p, end, &len, - MBEDTLS_ASN1_CONSTRUCTED | MBEDTLS_ASN1_CONTEXT_SPECIFIC ) ) != 0 ) - return( MBEDTLS_ERROR_ADD( MBEDTLS_ERR_X509_INVALID_EXTENSIONS, ret ) ); - - if( ( ret = mbedtls_asn1_get_tag( &p, end, &len, - MBEDTLS_ASN1_CONSTRUCTED | MBEDTLS_ASN1_SEQUENCE ) ) != 0 ) - return( MBEDTLS_ERROR_ADD( MBEDTLS_ERR_X509_INVALID_EXTENSIONS, ret ) ); - - if( ( ret = mbedtls_asn1_get_tag( &p, end, &len, MBEDTLS_ASN1_OID ) ) != 0 ) - return( MBEDTLS_ERROR_ADD( MBEDTLS_ERR_X509_INVALID_EXTENSIONS, ret ) ); - - other_name->value.hardware_module_name.oid.tag = MBEDTLS_ASN1_OID; - other_name->value.hardware_module_name.oid.p = p; - other_name->value.hardware_module_name.oid.len = len; - - if( p + len >= end ) - { - mbedtls_platform_zeroize( other_name, sizeof( *other_name ) ); - return( MBEDTLS_ERROR_ADD( MBEDTLS_ERR_X509_INVALID_EXTENSIONS, - MBEDTLS_ERR_ASN1_LENGTH_MISMATCH ) ); - } - p += len; - if( ( ret = mbedtls_asn1_get_tag( &p, end, &len, - MBEDTLS_ASN1_OCTET_STRING ) ) != 0 ) - return( MBEDTLS_ERROR_ADD( MBEDTLS_ERR_X509_INVALID_EXTENSIONS, ret ) ); - - other_name->value.hardware_module_name.val.tag = MBEDTLS_ASN1_OCTET_STRING; - other_name->value.hardware_module_name.val.p = p; - other_name->value.hardware_module_name.val.len = len; - p += len; - if( p != end ) - { - mbedtls_platform_zeroize( other_name, - sizeof( *other_name ) ); - return( MBEDTLS_ERROR_ADD( MBEDTLS_ERR_X509_INVALID_EXTENSIONS, - MBEDTLS_ERR_ASN1_LENGTH_MISMATCH ) ); - } - return( 0 ); -} - -int mbedtls_x509_parse_subject_alt_name( const mbedtls_x509_buf *san_buf, - mbedtls_x509_subject_alternative_name *san ) -{ - int ret = MBEDTLS_ERR_ERROR_CORRUPTION_DETECTED; - switch( san_buf->tag & - ( MBEDTLS_ASN1_TAG_CLASS_MASK | - MBEDTLS_ASN1_TAG_VALUE_MASK ) ) - { - /* - * otherName - */ - case( MBEDTLS_ASN1_CONTEXT_SPECIFIC | MBEDTLS_X509_SAN_OTHER_NAME ): - { - mbedtls_x509_san_other_name other_name; - - ret = x509_get_other_name( san_buf, &other_name ); - if( ret != 0 ) - return( ret ); - - memset( san, 0, sizeof( mbedtls_x509_subject_alternative_name ) ); - san->type = MBEDTLS_X509_SAN_OTHER_NAME; - memcpy( &san->san.other_name, - &other_name, sizeof( other_name ) ); - - } - break; - - /* - * dNSName - */ - case( MBEDTLS_ASN1_CONTEXT_SPECIFIC | MBEDTLS_X509_SAN_DNS_NAME ): - { - memset( san, 0, sizeof( mbedtls_x509_subject_alternative_name ) ); - san->type = MBEDTLS_X509_SAN_DNS_NAME; - - memcpy( &san->san.unstructured_name, - san_buf, sizeof( *san_buf ) ); - - } - break; - - /* - * Type not supported - */ - default: - return( MBEDTLS_ERR_X509_FEATURE_UNAVAILABLE ); - } - return( 0 ); -} - #if !defined(MBEDTLS_X509_REMOVE_INFO) -static int x509_info_subject_alt_name( char **buf, size_t *size, - const mbedtls_x509_sequence - *subject_alt_name, - const char *prefix ) -{ - int ret = MBEDTLS_ERR_ERROR_CORRUPTION_DETECTED; - size_t n = *size; - char *p = *buf; - const mbedtls_x509_sequence *cur = subject_alt_name; - mbedtls_x509_subject_alternative_name san; - int parse_ret; - - while( cur != NULL ) - { - memset( &san, 0, sizeof( san ) ); - parse_ret = mbedtls_x509_parse_subject_alt_name( &cur->buf, &san ); - if( parse_ret != 0 ) - { - if( parse_ret == MBEDTLS_ERR_X509_FEATURE_UNAVAILABLE ) - { - ret = mbedtls_snprintf( p, n, "\n%s <unsupported>", prefix ); - MBEDTLS_X509_SAFE_SNPRINTF; - } - else - { - ret = mbedtls_snprintf( p, n, "\n%s <malformed>", prefix ); - MBEDTLS_X509_SAFE_SNPRINTF; - } - cur = cur->next; - continue; - } - - switch( san.type ) - { - /* - * otherName - */ - case MBEDTLS_X509_SAN_OTHER_NAME: - { - mbedtls_x509_san_other_name *other_name = &san.san.other_name; - - ret = mbedtls_snprintf( p, n, "\n%s otherName :", prefix ); - MBEDTLS_X509_SAFE_SNPRINTF; - - if( MBEDTLS_OID_CMP( MBEDTLS_OID_ON_HW_MODULE_NAME, - &other_name->value.hardware_module_name.oid ) != 0 ) - { - ret = mbedtls_snprintf( p, n, "\n%s hardware module name :", prefix ); - MBEDTLS_X509_SAFE_SNPRINTF; - ret = mbedtls_snprintf( p, n, "\n%s hardware type : ", prefix ); - MBEDTLS_X509_SAFE_SNPRINTF; - - ret = mbedtls_oid_get_numeric_string( p, n, &other_name->value.hardware_module_name.oid ); - MBEDTLS_X509_SAFE_SNPRINTF; - - ret = mbedtls_snprintf( p, n, "\n%s hardware serial number : ", prefix ); - MBEDTLS_X509_SAFE_SNPRINTF; - - if( other_name->value.hardware_module_name.val.len >= n ) - { - *p = '\0'; - return( MBEDTLS_ERR_X509_BUFFER_TOO_SMALL ); - } - - memcpy( p, other_name->value.hardware_module_name.val.p, - other_name->value.hardware_module_name.val.len ); - p += other_name->value.hardware_module_name.val.len; - - n -= other_name->value.hardware_module_name.val.len; - - }/* MBEDTLS_OID_ON_HW_MODULE_NAME */ - } - break; - - /* - * dNSName - */ - case MBEDTLS_X509_SAN_DNS_NAME: - { - ret = mbedtls_snprintf( p, n, "\n%s dNSName : ", prefix ); - MBEDTLS_X509_SAFE_SNPRINTF; - if( san.san.unstructured_name.len >= n ) - { - *p = '\0'; - return( MBEDTLS_ERR_X509_BUFFER_TOO_SMALL ); - } - - memcpy( p, san.san.unstructured_name.p, san.san.unstructured_name.len ); - p += san.san.unstructured_name.len; - n -= san.san.unstructured_name.len; - } - break; - - /* - * Type not supported, skip item. - */ - default: - ret = mbedtls_snprintf( p, n, "\n%s <unsupported>", prefix ); - MBEDTLS_X509_SAFE_SNPRINTF; - break; - } - - cur = cur->next; - } - - *p = '\0'; - - *size = n; - *buf = p; - - return( 0 ); -} - -#define PRINT_ITEM(i) \ - { \ - ret = mbedtls_snprintf( p, n, "%s" i, sep ); \ - MBEDTLS_X509_SAFE_SNPRINTF; \ - sep = ", "; \ - } - -#define CERT_TYPE(type,name) \ - if( ns_cert_type & (type) ) \ - PRINT_ITEM( name ); - -static int x509_info_cert_type( char **buf, size_t *size, - unsigned char ns_cert_type ) -{ - int ret = MBEDTLS_ERR_ERROR_CORRUPTION_DETECTED; - size_t n = *size; - char *p = *buf; - const char *sep = ""; - - CERT_TYPE( MBEDTLS_X509_NS_CERT_TYPE_SSL_CLIENT, "SSL Client" ); - CERT_TYPE( MBEDTLS_X509_NS_CERT_TYPE_SSL_SERVER, "SSL Server" ); - CERT_TYPE( MBEDTLS_X509_NS_CERT_TYPE_EMAIL, "Email" ); - CERT_TYPE( MBEDTLS_X509_NS_CERT_TYPE_OBJECT_SIGNING, "Object Signing" ); - CERT_TYPE( MBEDTLS_X509_NS_CERT_TYPE_RESERVED, "Reserved" ); - CERT_TYPE( MBEDTLS_X509_NS_CERT_TYPE_SSL_CA, "SSL CA" ); - CERT_TYPE( MBEDTLS_X509_NS_CERT_TYPE_EMAIL_CA, "Email CA" ); - CERT_TYPE( MBEDTLS_X509_NS_CERT_TYPE_OBJECT_SIGNING_CA, "Object Signing CA" ); - - *size = n; - *buf = p; - - return( 0 ); -} - -#define KEY_USAGE(code,name) \ - if( key_usage & (code) ) \ - PRINT_ITEM( name ); - -static int x509_info_key_usage( char **buf, size_t *size, - unsigned int key_usage ) -{ - int ret = MBEDTLS_ERR_ERROR_CORRUPTION_DETECTED; - size_t n = *size; - char *p = *buf; - const char *sep = ""; - - KEY_USAGE( MBEDTLS_X509_KU_DIGITAL_SIGNATURE, "Digital Signature" ); - KEY_USAGE( MBEDTLS_X509_KU_NON_REPUDIATION, "Non Repudiation" ); - KEY_USAGE( MBEDTLS_X509_KU_KEY_ENCIPHERMENT, "Key Encipherment" ); - KEY_USAGE( MBEDTLS_X509_KU_DATA_ENCIPHERMENT, "Data Encipherment" ); - KEY_USAGE( MBEDTLS_X509_KU_KEY_AGREEMENT, "Key Agreement" ); - KEY_USAGE( MBEDTLS_X509_KU_KEY_CERT_SIGN, "Key Cert Sign" ); - KEY_USAGE( MBEDTLS_X509_KU_CRL_SIGN, "CRL Sign" ); - KEY_USAGE( MBEDTLS_X509_KU_ENCIPHER_ONLY, "Encipher Only" ); - KEY_USAGE( MBEDTLS_X509_KU_DECIPHER_ONLY, "Decipher Only" ); - - *size = n; - *buf = p; - - return( 0 ); -} - -static int x509_info_ext_key_usage( char **buf, size_t *size, - const mbedtls_x509_sequence *extended_key_usage ) +static int x509_info_ext_key_usage(char **buf, size_t *size, + const mbedtls_x509_sequence *extended_key_usage) { int ret = MBEDTLS_ERR_ERROR_CORRUPTION_DETECTED; const char *desc; @@ -2021,12 +1561,12 @@ static int x509_info_ext_key_usage( char **buf, size_t *size, const mbedtls_x509_sequence *cur = extended_key_usage; const char *sep = ""; - while( cur != NULL ) - { - if( mbedtls_oid_get_extended_key_usage( &cur->buf, &desc ) != 0 ) + while (cur != NULL) { + if (mbedtls_oid_get_extended_key_usage(&cur->buf, &desc) != 0) { desc = "???"; + } - ret = mbedtls_snprintf( p, n, "%s%s", sep, desc ); + ret = mbedtls_snprintf(p, n, "%s%s", sep, desc); MBEDTLS_X509_SAFE_SNPRINTF; sep = ", "; @@ -2037,11 +1577,11 @@ static int x509_info_ext_key_usage( char **buf, size_t *size, *size = n; *buf = p; - return( 0 ); + return 0; } -static int x509_info_cert_policies( char **buf, size_t *size, - const mbedtls_x509_sequence *certificate_policies ) +static int x509_info_cert_policies(char **buf, size_t *size, + const mbedtls_x509_sequence *certificate_policies) { int ret = MBEDTLS_ERR_ERROR_CORRUPTION_DETECTED; const char *desc; @@ -2050,12 +1590,12 @@ static int x509_info_cert_policies( char **buf, size_t *size, const mbedtls_x509_sequence *cur = certificate_policies; const char *sep = ""; - while( cur != NULL ) - { - if( mbedtls_oid_get_certificate_policies( &cur->buf, &desc ) != 0 ) + while (cur != NULL) { + if (mbedtls_oid_get_certificate_policies(&cur->buf, &desc) != 0) { desc = "???"; + } - ret = mbedtls_snprintf( p, n, "%s%s", sep, desc ); + ret = mbedtls_snprintf(p, n, "%s%s", sep, desc); MBEDTLS_X509_SAFE_SNPRINTF; sep = ", "; @@ -2066,7 +1606,7 @@ static int x509_info_cert_policies( char **buf, size_t *size, *size = n; *buf = p; - return( 0 ); + return 0; } /* @@ -2074,8 +1614,8 @@ static int x509_info_cert_policies( char **buf, size_t *size, */ #define BEFORE_COLON 18 #define BC "18" -int mbedtls_x509_crt_info( char *buf, size_t size, const char *prefix, - const mbedtls_x509_crt *crt ) +int mbedtls_x509_crt_info(char *buf, size_t size, const char *prefix, + const mbedtls_x509_crt *crt) { int ret = MBEDTLS_ERR_ERROR_CORRUPTION_DETECTED; size_t n; @@ -2085,136 +1625,132 @@ int mbedtls_x509_crt_info( char *buf, size_t size, const char *prefix, p = buf; n = size; - if( NULL == crt ) - { - ret = mbedtls_snprintf( p, n, "\nCertificate is uninitialised!\n" ); + if (NULL == crt) { + ret = mbedtls_snprintf(p, n, "\nCertificate is uninitialised!\n"); MBEDTLS_X509_SAFE_SNPRINTF; - return( (int) ( size - n ) ); + return (int) (size - n); } - ret = mbedtls_snprintf( p, n, "%scert. version : %d\n", - prefix, crt->version ); + ret = mbedtls_snprintf(p, n, "%scert. version : %d\n", + prefix, crt->version); MBEDTLS_X509_SAFE_SNPRINTF; - ret = mbedtls_snprintf( p, n, "%sserial number : ", - prefix ); + ret = mbedtls_snprintf(p, n, "%sserial number : ", + prefix); MBEDTLS_X509_SAFE_SNPRINTF; - ret = mbedtls_x509_serial_gets( p, n, &crt->serial ); + ret = mbedtls_x509_serial_gets(p, n, &crt->serial); MBEDTLS_X509_SAFE_SNPRINTF; - ret = mbedtls_snprintf( p, n, "\n%sissuer name : ", prefix ); + ret = mbedtls_snprintf(p, n, "\n%sissuer name : ", prefix); MBEDTLS_X509_SAFE_SNPRINTF; - ret = mbedtls_x509_dn_gets( p, n, &crt->issuer ); + ret = mbedtls_x509_dn_gets(p, n, &crt->issuer); MBEDTLS_X509_SAFE_SNPRINTF; - ret = mbedtls_snprintf( p, n, "\n%ssubject name : ", prefix ); + ret = mbedtls_snprintf(p, n, "\n%ssubject name : ", prefix); MBEDTLS_X509_SAFE_SNPRINTF; - ret = mbedtls_x509_dn_gets( p, n, &crt->subject ); + ret = mbedtls_x509_dn_gets(p, n, &crt->subject); MBEDTLS_X509_SAFE_SNPRINTF; - ret = mbedtls_snprintf( p, n, "\n%sissued on : " \ - "%04d-%02d-%02d %02d:%02d:%02d", prefix, - crt->valid_from.year, crt->valid_from.mon, - crt->valid_from.day, crt->valid_from.hour, - crt->valid_from.min, crt->valid_from.sec ); + ret = mbedtls_snprintf(p, n, "\n%sissued on : " \ + "%04d-%02d-%02d %02d:%02d:%02d", prefix, + crt->valid_from.year, crt->valid_from.mon, + crt->valid_from.day, crt->valid_from.hour, + crt->valid_from.min, crt->valid_from.sec); MBEDTLS_X509_SAFE_SNPRINTF; - ret = mbedtls_snprintf( p, n, "\n%sexpires on : " \ - "%04d-%02d-%02d %02d:%02d:%02d", prefix, - crt->valid_to.year, crt->valid_to.mon, - crt->valid_to.day, crt->valid_to.hour, - crt->valid_to.min, crt->valid_to.sec ); + ret = mbedtls_snprintf(p, n, "\n%sexpires on : " \ + "%04d-%02d-%02d %02d:%02d:%02d", prefix, + crt->valid_to.year, crt->valid_to.mon, + crt->valid_to.day, crt->valid_to.hour, + crt->valid_to.min, crt->valid_to.sec); MBEDTLS_X509_SAFE_SNPRINTF; - ret = mbedtls_snprintf( p, n, "\n%ssigned using : ", prefix ); + ret = mbedtls_snprintf(p, n, "\n%ssigned using : ", prefix); MBEDTLS_X509_SAFE_SNPRINTF; - ret = mbedtls_x509_sig_alg_gets( p, n, &crt->sig_oid, crt->sig_pk, - crt->sig_md, crt->sig_opts ); + ret = mbedtls_x509_sig_alg_gets(p, n, &crt->sig_oid, crt->sig_pk, + crt->sig_md, crt->sig_opts); MBEDTLS_X509_SAFE_SNPRINTF; /* Key size */ - if( ( ret = mbedtls_x509_key_size_helper( key_size_str, BEFORE_COLON, - mbedtls_pk_get_name( &crt->pk ) ) ) != 0 ) - { - return( ret ); + if ((ret = mbedtls_x509_key_size_helper(key_size_str, BEFORE_COLON, + mbedtls_pk_get_name(&crt->pk))) != 0) { + return ret; } - ret = mbedtls_snprintf( p, n, "\n%s%-" BC "s: %d bits", prefix, key_size_str, - (int) mbedtls_pk_get_bitlen( &crt->pk ) ); + ret = mbedtls_snprintf(p, n, "\n%s%-" BC "s: %d bits", prefix, key_size_str, + (int) mbedtls_pk_get_bitlen(&crt->pk)); MBEDTLS_X509_SAFE_SNPRINTF; /* * Optional extensions */ - if( crt->ext_types & MBEDTLS_X509_EXT_BASIC_CONSTRAINTS ) - { - ret = mbedtls_snprintf( p, n, "\n%sbasic constraints : CA=%s", prefix, - crt->ca_istrue ? "true" : "false" ); + if (crt->ext_types & MBEDTLS_X509_EXT_BASIC_CONSTRAINTS) { + ret = mbedtls_snprintf(p, n, "\n%sbasic constraints : CA=%s", prefix, + crt->ca_istrue ? "true" : "false"); MBEDTLS_X509_SAFE_SNPRINTF; - if( crt->max_pathlen > 0 ) - { - ret = mbedtls_snprintf( p, n, ", max_pathlen=%d", crt->max_pathlen - 1 ); + if (crt->max_pathlen > 0) { + ret = mbedtls_snprintf(p, n, ", max_pathlen=%d", crt->max_pathlen - 1); MBEDTLS_X509_SAFE_SNPRINTF; } } - if( crt->ext_types & MBEDTLS_X509_EXT_SUBJECT_ALT_NAME ) - { - ret = mbedtls_snprintf( p, n, "\n%ssubject alt name :", prefix ); + if (crt->ext_types & MBEDTLS_X509_EXT_SUBJECT_ALT_NAME) { + ret = mbedtls_snprintf(p, n, "\n%ssubject alt name :", prefix); MBEDTLS_X509_SAFE_SNPRINTF; - if( ( ret = x509_info_subject_alt_name( &p, &n, - &crt->subject_alt_names, - prefix ) ) != 0 ) - return( ret ); + if ((ret = mbedtls_x509_info_subject_alt_name(&p, &n, + &crt->subject_alt_names, + prefix)) != 0) { + return ret; + } } - if( crt->ext_types & MBEDTLS_X509_EXT_NS_CERT_TYPE ) - { - ret = mbedtls_snprintf( p, n, "\n%scert. type : ", prefix ); + if (crt->ext_types & MBEDTLS_X509_EXT_NS_CERT_TYPE) { + ret = mbedtls_snprintf(p, n, "\n%scert. type : ", prefix); MBEDTLS_X509_SAFE_SNPRINTF; - if( ( ret = x509_info_cert_type( &p, &n, crt->ns_cert_type ) ) != 0 ) - return( ret ); + if ((ret = mbedtls_x509_info_cert_type(&p, &n, crt->ns_cert_type)) != 0) { + return ret; + } } - if( crt->ext_types & MBEDTLS_X509_EXT_KEY_USAGE ) - { - ret = mbedtls_snprintf( p, n, "\n%skey usage : ", prefix ); + if (crt->ext_types & MBEDTLS_X509_EXT_KEY_USAGE) { + ret = mbedtls_snprintf(p, n, "\n%skey usage : ", prefix); MBEDTLS_X509_SAFE_SNPRINTF; - if( ( ret = x509_info_key_usage( &p, &n, crt->key_usage ) ) != 0 ) - return( ret ); + if ((ret = mbedtls_x509_info_key_usage(&p, &n, crt->key_usage)) != 0) { + return ret; + } } - if( crt->ext_types & MBEDTLS_X509_EXT_EXTENDED_KEY_USAGE ) - { - ret = mbedtls_snprintf( p, n, "\n%sext key usage : ", prefix ); + if (crt->ext_types & MBEDTLS_X509_EXT_EXTENDED_KEY_USAGE) { + ret = mbedtls_snprintf(p, n, "\n%sext key usage : ", prefix); MBEDTLS_X509_SAFE_SNPRINTF; - if( ( ret = x509_info_ext_key_usage( &p, &n, - &crt->ext_key_usage ) ) != 0 ) - return( ret ); + if ((ret = x509_info_ext_key_usage(&p, &n, + &crt->ext_key_usage)) != 0) { + return ret; + } } - if( crt->ext_types & MBEDTLS_OID_X509_EXT_CERTIFICATE_POLICIES ) - { - ret = mbedtls_snprintf( p, n, "\n%scertificate policies : ", prefix ); + if (crt->ext_types & MBEDTLS_OID_X509_EXT_CERTIFICATE_POLICIES) { + ret = mbedtls_snprintf(p, n, "\n%scertificate policies : ", prefix); MBEDTLS_X509_SAFE_SNPRINTF; - if( ( ret = x509_info_cert_policies( &p, &n, - &crt->certificate_policies ) ) != 0 ) - return( ret ); + if ((ret = x509_info_cert_policies(&p, &n, + &crt->certificate_policies)) != 0) { + return ret; + } } - ret = mbedtls_snprintf( p, n, "\n" ); + ret = mbedtls_snprintf(p, n, "\n"); MBEDTLS_X509_SAFE_SNPRINTF; - return( (int) ( size - n ) ); + return (int) (size - n); } struct x509_crt_verify_string { @@ -2222,137 +1758,141 @@ struct x509_crt_verify_string { const char *string; }; -#define X509_CRT_ERROR_INFO( err, err_str, info ) { err, info }, +#define X509_CRT_ERROR_INFO(err, err_str, info) { err, info }, static const struct x509_crt_verify_string x509_crt_verify_strings[] = { MBEDTLS_X509_CRT_ERROR_INFO_LIST { 0, NULL } }; #undef X509_CRT_ERROR_INFO -int mbedtls_x509_crt_verify_info( char *buf, size_t size, const char *prefix, - uint32_t flags ) +int mbedtls_x509_crt_verify_info(char *buf, size_t size, const char *prefix, + uint32_t flags) { int ret = MBEDTLS_ERR_ERROR_CORRUPTION_DETECTED; const struct x509_crt_verify_string *cur; char *p = buf; size_t n = size; - for( cur = x509_crt_verify_strings; cur->string != NULL ; cur++ ) - { - if( ( flags & cur->code ) == 0 ) + for (cur = x509_crt_verify_strings; cur->string != NULL; cur++) { + if ((flags & cur->code) == 0) { continue; + } - ret = mbedtls_snprintf( p, n, "%s%s\n", prefix, cur->string ); + ret = mbedtls_snprintf(p, n, "%s%s\n", prefix, cur->string); MBEDTLS_X509_SAFE_SNPRINTF; flags ^= cur->code; } - if( flags != 0 ) - { - ret = mbedtls_snprintf( p, n, "%sUnknown reason " - "(this should not happen)\n", prefix ); + if (flags != 0) { + ret = mbedtls_snprintf(p, n, "%sUnknown reason " + "(this should not happen)\n", prefix); MBEDTLS_X509_SAFE_SNPRINTF; } - return( (int) ( size - n ) ); + return (int) (size - n); } #endif /* MBEDTLS_X509_REMOVE_INFO */ -int mbedtls_x509_crt_check_key_usage( const mbedtls_x509_crt *crt, - unsigned int usage ) +int mbedtls_x509_crt_check_key_usage(const mbedtls_x509_crt *crt, + unsigned int usage) { unsigned int usage_must, usage_may; unsigned int may_mask = MBEDTLS_X509_KU_ENCIPHER_ONLY - | MBEDTLS_X509_KU_DECIPHER_ONLY; + | MBEDTLS_X509_KU_DECIPHER_ONLY; - if( ( crt->ext_types & MBEDTLS_X509_EXT_KEY_USAGE ) == 0 ) - return( 0 ); + if ((crt->ext_types & MBEDTLS_X509_EXT_KEY_USAGE) == 0) { + return 0; + } usage_must = usage & ~may_mask; - if( ( ( crt->key_usage & ~may_mask ) & usage_must ) != usage_must ) - return( MBEDTLS_ERR_X509_BAD_INPUT_DATA ); + if (((crt->key_usage & ~may_mask) & usage_must) != usage_must) { + return MBEDTLS_ERR_X509_BAD_INPUT_DATA; + } usage_may = usage & may_mask; - if( ( ( crt->key_usage & may_mask ) | usage_may ) != usage_may ) - return( MBEDTLS_ERR_X509_BAD_INPUT_DATA ); + if (((crt->key_usage & may_mask) | usage_may) != usage_may) { + return MBEDTLS_ERR_X509_BAD_INPUT_DATA; + } - return( 0 ); + return 0; } -int mbedtls_x509_crt_check_extended_key_usage( const mbedtls_x509_crt *crt, - const char *usage_oid, - size_t usage_len ) +int mbedtls_x509_crt_check_extended_key_usage(const mbedtls_x509_crt *crt, + const char *usage_oid, + size_t usage_len) { const mbedtls_x509_sequence *cur; /* Extension is not mandatory, absent means no restriction */ - if( ( crt->ext_types & MBEDTLS_X509_EXT_EXTENDED_KEY_USAGE ) == 0 ) - return( 0 ); + if ((crt->ext_types & MBEDTLS_X509_EXT_EXTENDED_KEY_USAGE) == 0) { + return 0; + } /* * Look for the requested usage (or wildcard ANY) in our list */ - for( cur = &crt->ext_key_usage; cur != NULL; cur = cur->next ) - { + for (cur = &crt->ext_key_usage; cur != NULL; cur = cur->next) { const mbedtls_x509_buf *cur_oid = &cur->buf; - if( cur_oid->len == usage_len && - memcmp( cur_oid->p, usage_oid, usage_len ) == 0 ) - { - return( 0 ); + if (cur_oid->len == usage_len && + memcmp(cur_oid->p, usage_oid, usage_len) == 0) { + return 0; } - if( MBEDTLS_OID_CMP( MBEDTLS_OID_ANY_EXTENDED_KEY_USAGE, cur_oid ) == 0 ) - return( 0 ); + if (MBEDTLS_OID_CMP(MBEDTLS_OID_ANY_EXTENDED_KEY_USAGE, cur_oid) == 0) { + return 0; + } } - return( MBEDTLS_ERR_X509_BAD_INPUT_DATA ); + return MBEDTLS_ERR_X509_BAD_INPUT_DATA; } #if defined(MBEDTLS_X509_CRL_PARSE_C) /* * Return 1 if the certificate is revoked, or 0 otherwise. */ -int mbedtls_x509_crt_is_revoked( const mbedtls_x509_crt *crt, const mbedtls_x509_crl *crl ) +int mbedtls_x509_crt_is_revoked(const mbedtls_x509_crt *crt, const mbedtls_x509_crl *crl) { const mbedtls_x509_crl_entry *cur = &crl->entry; - while( cur != NULL && cur->serial.len != 0 ) - { - if( crt->serial.len == cur->serial.len && - memcmp( crt->serial.p, cur->serial.p, crt->serial.len ) == 0 ) - { - return( 1 ); + while (cur != NULL && cur->serial.len != 0) { + if (crt->serial.len == cur->serial.len && + memcmp(crt->serial.p, cur->serial.p, crt->serial.len) == 0) { + return 1; } cur = cur->next; } - return( 0 ); + return 0; } /* * Check that the given certificate is not revoked according to the CRL. * Skip validation if no CRL for the given CA is present. */ -static int x509_crt_verifycrl( mbedtls_x509_crt *crt, mbedtls_x509_crt *ca, - mbedtls_x509_crl *crl_list, - const mbedtls_x509_crt_profile *profile ) +static int x509_crt_verifycrl(mbedtls_x509_crt *crt, mbedtls_x509_crt *ca, + mbedtls_x509_crl *crl_list, + const mbedtls_x509_crt_profile *profile) { int flags = 0; - unsigned char hash[MBEDTLS_MD_MAX_SIZE]; + unsigned char hash[MBEDTLS_HASH_MAX_SIZE]; +#if defined(MBEDTLS_USE_PSA_CRYPTO) + psa_algorithm_t psa_algorithm; +#else const mbedtls_md_info_t *md_info; +#endif /* MBEDTLS_USE_PSA_CRYPTO */ + size_t hash_length; - if( ca == NULL ) - return( flags ); + if (ca == NULL) { + return flags; + } - while( crl_list != NULL ) - { - if( crl_list->version == 0 || - x509_name_cmp( &crl_list->issuer, &ca->subject ) != 0 ) - { + while (crl_list != NULL) { + if (crl_list->version == 0 || + x509_name_cmp(&crl_list->issuer, &ca->subject) != 0) { crl_list = crl_list->next; continue; } @@ -2360,9 +1900,8 @@ static int x509_crt_verifycrl( mbedtls_x509_crt *crt, mbedtls_x509_crt *ca, /* * Check if the CA is configured to sign CRLs */ - if( mbedtls_x509_crt_check_key_usage( ca, - MBEDTLS_X509_KU_CRL_SIGN ) != 0 ) - { + if (mbedtls_x509_crt_check_key_usage(ca, + MBEDTLS_X509_KU_CRL_SIGN) != 0) { flags |= MBEDTLS_X509_BADCRL_NOT_TRUSTED; break; } @@ -2370,27 +1909,46 @@ static int x509_crt_verifycrl( mbedtls_x509_crt *crt, mbedtls_x509_crt *ca, /* * Check if CRL is correctly signed by the trusted CA */ - if( x509_profile_check_md_alg( profile, crl_list->sig_md ) != 0 ) + if (x509_profile_check_md_alg(profile, crl_list->sig_md) != 0) { flags |= MBEDTLS_X509_BADCRL_BAD_MD; + } - if( x509_profile_check_pk_alg( profile, crl_list->sig_pk ) != 0 ) + if (x509_profile_check_pk_alg(profile, crl_list->sig_pk) != 0) { flags |= MBEDTLS_X509_BADCRL_BAD_PK; + } - md_info = mbedtls_md_info_from_type( crl_list->sig_md ); - if( mbedtls_md( md_info, crl_list->tbs.p, crl_list->tbs.len, hash ) != 0 ) - { +#if defined(MBEDTLS_USE_PSA_CRYPTO) + psa_algorithm = mbedtls_hash_info_psa_from_md(crl_list->sig_md); + if (psa_hash_compute(psa_algorithm, + crl_list->tbs.p, + crl_list->tbs.len, + hash, + sizeof(hash), + &hash_length) != PSA_SUCCESS) { + /* Note: this can't happen except after an internal error */ + flags |= MBEDTLS_X509_BADCRL_NOT_TRUSTED; + break; + } +#else + md_info = mbedtls_md_info_from_type(crl_list->sig_md); + hash_length = mbedtls_md_get_size(md_info); + if (mbedtls_md(md_info, + crl_list->tbs.p, + crl_list->tbs.len, + hash) != 0) { /* Note: this can't happen except after an internal error */ flags |= MBEDTLS_X509_BADCRL_NOT_TRUSTED; break; } +#endif /* MBEDTLS_USE_PSA_CRYPTO */ - if( x509_profile_check_key( profile, &ca->pk ) != 0 ) + if (x509_profile_check_key(profile, &ca->pk) != 0) { flags |= MBEDTLS_X509_BADCERT_BAD_KEY; + } - if( mbedtls_pk_verify_ext( crl_list->sig_pk, crl_list->sig_opts, &ca->pk, - crl_list->sig_md, hash, mbedtls_md_get_size( md_info ), - crl_list->sig.p, crl_list->sig.len ) != 0 ) - { + if (mbedtls_pk_verify_ext(crl_list->sig_pk, crl_list->sig_opts, &ca->pk, + crl_list->sig_md, hash, hash_length, + crl_list->sig.p, crl_list->sig.len) != 0) { flags |= MBEDTLS_X509_BADCRL_NOT_TRUSTED; break; } @@ -2398,17 +1956,18 @@ static int x509_crt_verifycrl( mbedtls_x509_crt *crt, mbedtls_x509_crt *ca, /* * Check for validity of CRL (Do not drop out) */ - if( mbedtls_x509_time_is_past( &crl_list->next_update ) ) + if (mbedtls_x509_time_is_past(&crl_list->next_update)) { flags |= MBEDTLS_X509_BADCRL_EXPIRED; + } - if( mbedtls_x509_time_is_future( &crl_list->this_update ) ) + if (mbedtls_x509_time_is_future(&crl_list->this_update)) { flags |= MBEDTLS_X509_BADCRL_FUTURE; + } /* * Check if certificate is revoked */ - if( mbedtls_x509_crt_is_revoked( crt, crl_list ) ) - { + if (mbedtls_x509_crt_is_revoked(crt, crl_list)) { flags |= MBEDTLS_X509_BADCERT_REVOKED; break; } @@ -2416,64 +1975,61 @@ static int x509_crt_verifycrl( mbedtls_x509_crt *crt, mbedtls_x509_crt *ca, crl_list = crl_list->next; } - return( flags ); + return flags; } #endif /* MBEDTLS_X509_CRL_PARSE_C */ /* * Check the signature of a certificate by its parent */ -static int x509_crt_check_signature( const mbedtls_x509_crt *child, - mbedtls_x509_crt *parent, - mbedtls_x509_crt_restart_ctx *rs_ctx ) +static int x509_crt_check_signature(const mbedtls_x509_crt *child, + mbedtls_x509_crt *parent, + mbedtls_x509_crt_restart_ctx *rs_ctx) { - unsigned char hash[MBEDTLS_MD_MAX_SIZE]; size_t hash_len; + unsigned char hash[MBEDTLS_HASH_MAX_SIZE]; #if !defined(MBEDTLS_USE_PSA_CRYPTO) const mbedtls_md_info_t *md_info; - md_info = mbedtls_md_info_from_type( child->sig_md ); - hash_len = mbedtls_md_get_size( md_info ); + md_info = mbedtls_md_info_from_type(child->sig_md); + hash_len = mbedtls_md_get_size(md_info); /* Note: hash errors can happen only after an internal error */ - if( mbedtls_md( md_info, child->tbs.p, child->tbs.len, hash ) != 0 ) - return( -1 ); + if (mbedtls_md(md_info, child->tbs.p, child->tbs.len, hash) != 0) { + return -1; + } #else - psa_hash_operation_t hash_operation = PSA_HASH_OPERATION_INIT; - psa_algorithm_t hash_alg = mbedtls_psa_translate_md( child->sig_md ); - - if( psa_hash_setup( &hash_operation, hash_alg ) != PSA_SUCCESS ) - return( -1 ); + psa_algorithm_t hash_alg = mbedtls_hash_info_psa_from_md(child->sig_md); + psa_status_t status = PSA_ERROR_CORRUPTION_DETECTED; - if( psa_hash_update( &hash_operation, child->tbs.p, child->tbs.len ) - != PSA_SUCCESS ) - { - return( -1 ); + status = psa_hash_compute(hash_alg, + child->tbs.p, + child->tbs.len, + hash, + sizeof(hash), + &hash_len); + if (status != PSA_SUCCESS) { + return MBEDTLS_ERR_PLATFORM_HW_ACCEL_FAILED; } - if( psa_hash_finish( &hash_operation, hash, sizeof( hash ), &hash_len ) - != PSA_SUCCESS ) - { - return( -1 ); - } #endif /* MBEDTLS_USE_PSA_CRYPTO */ /* Skip expensive computation on obvious mismatch */ - if( ! mbedtls_pk_can_do( &parent->pk, child->sig_pk ) ) - return( -1 ); + if (!mbedtls_pk_can_do(&parent->pk, child->sig_pk)) { + return -1; + } #if defined(MBEDTLS_ECDSA_C) && defined(MBEDTLS_ECP_RESTARTABLE) - if( rs_ctx != NULL && child->sig_pk == MBEDTLS_PK_ECDSA ) - { - return( mbedtls_pk_verify_restartable( &parent->pk, - child->sig_md, hash, hash_len, - child->sig.p, child->sig.len, &rs_ctx->pk ) ); + if (rs_ctx != NULL && child->sig_pk == MBEDTLS_PK_ECDSA) { + return mbedtls_pk_verify_restartable(&parent->pk, + child->sig_md, hash, hash_len, + child->sig.p, child->sig.len, &rs_ctx->pk); } #else (void) rs_ctx; #endif - return( mbedtls_pk_verify_ext( child->sig_pk, child->sig_opts, &parent->pk, - child->sig_md, hash, hash_len, - child->sig.p, child->sig.len ) ); + return mbedtls_pk_verify_ext(child->sig_pk, child->sig_opts, &parent->pk, + child->sig_md, hash, hash_len, + child->sig.p, child->sig.len); } /* @@ -2482,33 +2038,35 @@ static int x509_crt_check_signature( const mbedtls_x509_crt *child, * * top means parent is a locally-trusted certificate */ -static int x509_crt_check_parent( const mbedtls_x509_crt *child, - const mbedtls_x509_crt *parent, - int top ) +static int x509_crt_check_parent(const mbedtls_x509_crt *child, + const mbedtls_x509_crt *parent, + int top) { int need_ca_bit; /* Parent must be the issuer */ - if( x509_name_cmp( &child->issuer, &parent->subject ) != 0 ) - return( -1 ); + if (x509_name_cmp(&child->issuer, &parent->subject) != 0) { + return -1; + } /* Parent must have the basicConstraints CA bit set as a general rule */ need_ca_bit = 1; /* Exception: v1/v2 certificates that are locally trusted. */ - if( top && parent->version < 3 ) + if (top && parent->version < 3) { need_ca_bit = 0; + } - if( need_ca_bit && ! parent->ca_istrue ) - return( -1 ); + if (need_ca_bit && !parent->ca_istrue) { + return -1; + } - if( need_ca_bit && - mbedtls_x509_crt_check_key_usage( parent, MBEDTLS_X509_KU_KEY_CERT_SIGN ) != 0 ) - { - return( -1 ); + if (need_ca_bit && + mbedtls_x509_crt_check_key_usage(parent, MBEDTLS_X509_KU_KEY_CERT_SIGN) != 0) { + return -1; } - return( 0 ); + return 0; } /* @@ -2555,14 +2113,14 @@ static int x509_crt_check_parent( const mbedtls_x509_crt *child, * - MBEDTLS_ERR_ECP_IN_PROGRESS otherwise */ static int x509_crt_find_parent_in( - mbedtls_x509_crt *child, - mbedtls_x509_crt *candidates, - mbedtls_x509_crt **r_parent, - int *r_signature_is_good, - int top, - unsigned path_cnt, - unsigned self_cnt, - mbedtls_x509_crt_restart_ctx *rs_ctx ) + mbedtls_x509_crt *child, + mbedtls_x509_crt *candidates, + mbedtls_x509_crt **r_parent, + int *r_signature_is_good, + int top, + unsigned path_cnt, + unsigned self_cnt, + mbedtls_x509_crt_restart_ctx *rs_ctx) { int ret = MBEDTLS_ERR_ERROR_CORRUPTION_DETECTED; mbedtls_x509_crt *parent, *fallback_parent; @@ -2570,8 +2128,7 @@ static int x509_crt_find_parent_in( #if defined(MBEDTLS_ECDSA_C) && defined(MBEDTLS_ECP_RESTARTABLE) /* did we have something in progress? */ - if( rs_ctx != NULL && rs_ctx->parent != NULL ) - { + if (rs_ctx != NULL && rs_ctx->parent != NULL) { /* restore saved state */ parent = rs_ctx->parent; fallback_parent = rs_ctx->fallback_parent; @@ -2590,16 +2147,15 @@ static int x509_crt_find_parent_in( fallback_parent = NULL; fallback_signature_is_good = 0; - for( parent = candidates; parent != NULL; parent = parent->next ) - { + for (parent = candidates; parent != NULL; parent = parent->next) { /* basic parenting skills (name, CA bit, key usage) */ - if( x509_crt_check_parent( child, parent, top ) != 0 ) + if (x509_crt_check_parent(child, parent, top) != 0) { continue; + } /* +1 because stored max_pathlen is 1 higher that the actual value */ - if( parent->max_pathlen > 0 && - (size_t) parent->max_pathlen < 1 + path_cnt - self_cnt ) - { + if (parent->max_pathlen > 0 && + (size_t) parent->max_pathlen < 1 + path_cnt - self_cnt) { continue; } @@ -2607,32 +2163,30 @@ static int x509_crt_find_parent_in( #if defined(MBEDTLS_ECDSA_C) && defined(MBEDTLS_ECP_RESTARTABLE) check_signature: #endif - ret = x509_crt_check_signature( child, parent, rs_ctx ); + ret = x509_crt_check_signature(child, parent, rs_ctx); #if defined(MBEDTLS_ECDSA_C) && defined(MBEDTLS_ECP_RESTARTABLE) - if( rs_ctx != NULL && ret == MBEDTLS_ERR_ECP_IN_PROGRESS ) - { + if (rs_ctx != NULL && ret == MBEDTLS_ERR_ECP_IN_PROGRESS) { /* save state */ rs_ctx->parent = parent; rs_ctx->fallback_parent = fallback_parent; rs_ctx->fallback_signature_is_good = fallback_signature_is_good; - return( ret ); + return ret; } #else (void) ret; #endif signature_is_good = ret == 0; - if( top && ! signature_is_good ) + if (top && !signature_is_good) { continue; + } /* optional time check */ - if( mbedtls_x509_time_is_past( &parent->valid_to ) || - mbedtls_x509_time_is_future( &parent->valid_from ) ) - { - if( fallback_parent == NULL ) - { + if (mbedtls_x509_time_is_past(&parent->valid_to) || + mbedtls_x509_time_is_future(&parent->valid_from)) { + if (fallback_parent == NULL) { fallback_parent = parent; fallback_signature_is_good = signature_is_good; } @@ -2646,13 +2200,12 @@ static int x509_crt_find_parent_in( break; } - if( parent == NULL ) - { + if (parent == NULL) { *r_parent = fallback_parent; *r_signature_is_good = fallback_signature_is_good; } - return( 0 ); + return 0; } /* @@ -2678,14 +2231,14 @@ static int x509_crt_find_parent_in( * - MBEDTLS_ERR_ECP_IN_PROGRESS otherwise */ static int x509_crt_find_parent( - mbedtls_x509_crt *child, - mbedtls_x509_crt *trust_ca, - mbedtls_x509_crt **parent, - int *parent_is_trusted, - int *signature_is_good, - unsigned path_cnt, - unsigned self_cnt, - mbedtls_x509_crt_restart_ctx *rs_ctx ) + mbedtls_x509_crt *child, + mbedtls_x509_crt *trust_ca, + mbedtls_x509_crt **parent, + int *parent_is_trusted, + int *signature_is_good, + unsigned path_cnt, + unsigned self_cnt, + mbedtls_x509_crt_restart_ctx *rs_ctx) { int ret = MBEDTLS_ERR_ERROR_CORRUPTION_DETECTED; mbedtls_x509_crt *search_list; @@ -2694,48 +2247,46 @@ static int x509_crt_find_parent( #if defined(MBEDTLS_ECDSA_C) && defined(MBEDTLS_ECP_RESTARTABLE) /* restore then clear saved state if we have some stored */ - if( rs_ctx != NULL && rs_ctx->parent_is_trusted != -1 ) - { + if (rs_ctx != NULL && rs_ctx->parent_is_trusted != -1) { *parent_is_trusted = rs_ctx->parent_is_trusted; rs_ctx->parent_is_trusted = -1; } #endif - while( 1 ) { + while (1) { search_list = *parent_is_trusted ? trust_ca : child->next; - ret = x509_crt_find_parent_in( child, search_list, - parent, signature_is_good, - *parent_is_trusted, - path_cnt, self_cnt, rs_ctx ); + ret = x509_crt_find_parent_in(child, search_list, + parent, signature_is_good, + *parent_is_trusted, + path_cnt, self_cnt, rs_ctx); #if defined(MBEDTLS_ECDSA_C) && defined(MBEDTLS_ECP_RESTARTABLE) - if( rs_ctx != NULL && ret == MBEDTLS_ERR_ECP_IN_PROGRESS ) - { + if (rs_ctx != NULL && ret == MBEDTLS_ERR_ECP_IN_PROGRESS) { /* save state */ rs_ctx->parent_is_trusted = *parent_is_trusted; - return( ret ); + return ret; } #else (void) ret; #endif /* stop here if found or already in second iteration */ - if( *parent != NULL || *parent_is_trusted == 0 ) + if (*parent != NULL || *parent_is_trusted == 0) { break; + } /* prepare second iteration */ *parent_is_trusted = 0; } /* extra precaution against mistakes in the caller */ - if( *parent == NULL ) - { + if (*parent == NULL) { *parent_is_trusted = 0; *signature_is_good = 0; } - return( 0 ); + return 0; } /* @@ -2745,27 +2296,26 @@ static int x509_crt_find_parent( * check for self-issued as self-signatures are not checked) */ static int x509_crt_check_ee_locally_trusted( - mbedtls_x509_crt *crt, - mbedtls_x509_crt *trust_ca ) + mbedtls_x509_crt *crt, + mbedtls_x509_crt *trust_ca) { mbedtls_x509_crt *cur; /* must be self-issued */ - if( x509_name_cmp( &crt->issuer, &crt->subject ) != 0 ) - return( -1 ); + if (x509_name_cmp(&crt->issuer, &crt->subject) != 0) { + return -1; + } /* look for an exact match with trusted cert */ - for( cur = trust_ca; cur != NULL; cur = cur->next ) - { - if( crt->raw.len == cur->raw.len && - memcmp( crt->raw.p, cur->raw.p, crt->raw.len ) == 0 ) - { - return( 0 ); + for (cur = trust_ca; cur != NULL; cur = cur->next) { + if (crt->raw.len == cur->raw.len && + memcmp(crt->raw.p, cur->raw.p, crt->raw.len) == 0) { + return 0; } } /* too bad */ - return( -1 ); + return -1; } /* @@ -2809,14 +2359,14 @@ static int x509_crt_check_ee_locally_trusted( * even if it was found to be invalid */ static int x509_crt_verify_chain( - mbedtls_x509_crt *crt, - mbedtls_x509_crt *trust_ca, - mbedtls_x509_crl *ca_crl, - mbedtls_x509_crt_ca_cb_t f_ca_cb, - void *p_ca_cb, - const mbedtls_x509_crt_profile *profile, - mbedtls_x509_crt_verify_chain *ver_chain, - mbedtls_x509_crt_restart_ctx *rs_ctx ) + mbedtls_x509_crt *crt, + mbedtls_x509_crt *trust_ca, + mbedtls_x509_crl *ca_crl, + mbedtls_x509_crt_ca_cb_t f_ca_cb, + void *p_ca_cb, + const mbedtls_x509_crt_profile *profile, + mbedtls_x509_crt_verify_chain *ver_chain, + mbedtls_x509_crt_restart_ctx *rs_ctx) { /* Don't initialize any of those variables here, so that the compiler can * catch potential issues with jumping ahead when restarting */ @@ -2833,8 +2383,7 @@ static int x509_crt_verify_chain( #if defined(MBEDTLS_ECDSA_C) && defined(MBEDTLS_ECP_RESTARTABLE) /* resume if we had an operation in progress */ - if( rs_ctx != NULL && rs_ctx->in_progress == x509_crt_rs_find_parent ) - { + if (rs_ctx != NULL && rs_ctx->in_progress == x509_crt_rs_find_parent) { /* restore saved state */ *ver_chain = rs_ctx->ver_chain; /* struct copy */ self_cnt = rs_ctx->self_cnt; @@ -2853,7 +2402,7 @@ static int x509_crt_verify_chain( parent_is_trusted = 0; child_is_trusted = 0; - while( 1 ) { + while (1) { /* Add certificate to the verification chain */ cur = &ver_chain->items[ver_chain->len]; cur->crt = child; @@ -2862,28 +2411,32 @@ static int x509_crt_verify_chain( flags = &cur->flags; /* Check time-validity (all certificates) */ - if( mbedtls_x509_time_is_past( &child->valid_to ) ) + if (mbedtls_x509_time_is_past(&child->valid_to)) { *flags |= MBEDTLS_X509_BADCERT_EXPIRED; + } - if( mbedtls_x509_time_is_future( &child->valid_from ) ) + if (mbedtls_x509_time_is_future(&child->valid_from)) { *flags |= MBEDTLS_X509_BADCERT_FUTURE; + } /* Stop here for trusted roots (but not for trusted EE certs) */ - if( child_is_trusted ) - return( 0 ); + if (child_is_trusted) { + return 0; + } /* Check signature algorithm: MD & PK algs */ - if( x509_profile_check_md_alg( profile, child->sig_md ) != 0 ) + if (x509_profile_check_md_alg(profile, child->sig_md) != 0) { *flags |= MBEDTLS_X509_BADCERT_BAD_MD; + } - if( x509_profile_check_pk_alg( profile, child->sig_pk ) != 0 ) + if (x509_profile_check_pk_alg(profile, child->sig_pk) != 0) { *flags |= MBEDTLS_X509_BADCERT_BAD_PK; + } /* Special case: EE certs that are locally trusted */ - if( ver_chain->len == 1 && - x509_crt_check_ee_locally_trusted( child, trust_ca ) == 0 ) - { - return( 0 ); + if (ver_chain->len == 1 && + x509_crt_check_ee_locally_trusted(child, trust_ca) == 0) { + return 0; } #if defined(MBEDTLS_ECDSA_C) && defined(MBEDTLS_ECP_RESTARTABLE) @@ -2893,19 +2446,18 @@ static int x509_crt_verify_chain( /* Obtain list of potential trusted signers from CA callback, * or use statically provided list. */ #if defined(MBEDTLS_X509_TRUSTED_CERTIFICATE_CALLBACK) - if( f_ca_cb != NULL ) - { - mbedtls_x509_crt_free( ver_chain->trust_ca_cb_result ); - mbedtls_free( ver_chain->trust_ca_cb_result ); + if (f_ca_cb != NULL) { + mbedtls_x509_crt_free(ver_chain->trust_ca_cb_result); + mbedtls_free(ver_chain->trust_ca_cb_result); ver_chain->trust_ca_cb_result = NULL; - ret = f_ca_cb( p_ca_cb, child, &ver_chain->trust_ca_cb_result ); - if( ret != 0 ) - return( MBEDTLS_ERR_X509_FATAL_ERROR ); + ret = f_ca_cb(p_ca_cb, child, &ver_chain->trust_ca_cb_result); + if (ret != 0) { + return MBEDTLS_ERR_X509_FATAL_ERROR; + } cur_trust_ca = ver_chain->trust_ca_cb_result; - } - else + } else #endif /* MBEDTLS_X509_TRUSTED_CERTIFICATE_CALLBACK */ { ((void) f_ca_cb); @@ -2914,60 +2466,58 @@ static int x509_crt_verify_chain( } /* Look for a parent in trusted CAs or up the chain */ - ret = x509_crt_find_parent( child, cur_trust_ca, &parent, - &parent_is_trusted, &signature_is_good, - ver_chain->len - 1, self_cnt, rs_ctx ); + ret = x509_crt_find_parent(child, cur_trust_ca, &parent, + &parent_is_trusted, &signature_is_good, + ver_chain->len - 1, self_cnt, rs_ctx); #if defined(MBEDTLS_ECDSA_C) && defined(MBEDTLS_ECP_RESTARTABLE) - if( rs_ctx != NULL && ret == MBEDTLS_ERR_ECP_IN_PROGRESS ) - { + if (rs_ctx != NULL && ret == MBEDTLS_ERR_ECP_IN_PROGRESS) { /* save state */ rs_ctx->in_progress = x509_crt_rs_find_parent; rs_ctx->self_cnt = self_cnt; rs_ctx->ver_chain = *ver_chain; /* struct copy */ - return( ret ); + return ret; } #else (void) ret; #endif /* No parent? We're done here */ - if( parent == NULL ) - { + if (parent == NULL) { *flags |= MBEDTLS_X509_BADCERT_NOT_TRUSTED; - return( 0 ); + return 0; } /* Count intermediate self-issued (not necessarily self-signed) certs. * These can occur with some strategies for key rollover, see [SIRO], * and should be excluded from max_pathlen checks. */ - if( ver_chain->len != 1 && - x509_name_cmp( &child->issuer, &child->subject ) == 0 ) - { + if (ver_chain->len != 1 && + x509_name_cmp(&child->issuer, &child->subject) == 0) { self_cnt++; } /* path_cnt is 0 for the first intermediate CA, * and if parent is trusted it's not an intermediate CA */ - if( ! parent_is_trusted && - ver_chain->len > MBEDTLS_X509_MAX_INTERMEDIATE_CA ) - { + if (!parent_is_trusted && + ver_chain->len > MBEDTLS_X509_MAX_INTERMEDIATE_CA) { /* return immediately to avoid overflow the chain array */ - return( MBEDTLS_ERR_X509_FATAL_ERROR ); + return MBEDTLS_ERR_X509_FATAL_ERROR; } /* signature was checked while searching parent */ - if( ! signature_is_good ) + if (!signature_is_good) { *flags |= MBEDTLS_X509_BADCERT_NOT_TRUSTED; + } /* check size of signing key */ - if( x509_profile_check_key( profile, &parent->pk ) != 0 ) + if (x509_profile_check_key(profile, &parent->pk) != 0) { *flags |= MBEDTLS_X509_BADCERT_BAD_KEY; + } #if defined(MBEDTLS_X509_CRL_PARSE_C) /* Check trusted CA's CRL for the given crt */ - *flags |= x509_crt_verifycrl( child, parent, ca_crl, profile ); + *flags |= x509_crt_verifycrl(child, parent, ca_crl, profile); #else (void) ca_crl; #endif @@ -2983,79 +2533,75 @@ static int x509_crt_verify_chain( /* * Check for CN match */ -static int x509_crt_check_cn( const mbedtls_x509_buf *name, - const char *cn, size_t cn_len ) +static int x509_crt_check_cn(const mbedtls_x509_buf *name, + const char *cn, size_t cn_len) { /* try exact match */ - if( name->len == cn_len && - x509_memcasecmp( cn, name->p, cn_len ) == 0 ) - { - return( 0 ); + if (name->len == cn_len && + x509_memcasecmp(cn, name->p, cn_len) == 0) { + return 0; } /* try wildcard match */ - if( x509_check_wildcard( cn, name ) == 0 ) - { - return( 0 ); + if (x509_check_wildcard(cn, name) == 0) { + return 0; } - return( -1 ); + return -1; } /* * Check for SAN match, see RFC 5280 Section 4.2.1.6 */ -static int x509_crt_check_san( const mbedtls_x509_buf *name, - const char *cn, size_t cn_len ) +static int x509_crt_check_san(const mbedtls_x509_buf *name, + const char *cn, size_t cn_len) { const unsigned char san_type = (unsigned char) name->tag & MBEDTLS_ASN1_TAG_VALUE_MASK; /* dNSName */ - if( san_type == MBEDTLS_X509_SAN_DNS_NAME ) - return( x509_crt_check_cn( name, cn, cn_len ) ); + if (san_type == MBEDTLS_X509_SAN_DNS_NAME) { + return x509_crt_check_cn(name, cn, cn_len); + } /* (We may handle other types here later.) */ /* Unrecognized type */ - return( -1 ); + return -1; } /* * Verify the requested CN - only call this if cn is not NULL! */ -static void x509_crt_verify_name( const mbedtls_x509_crt *crt, - const char *cn, - uint32_t *flags ) +static void x509_crt_verify_name(const mbedtls_x509_crt *crt, + const char *cn, + uint32_t *flags) { const mbedtls_x509_name *name; const mbedtls_x509_sequence *cur; - size_t cn_len = strlen( cn ); + size_t cn_len = strlen(cn); - if( crt->ext_types & MBEDTLS_X509_EXT_SUBJECT_ALT_NAME ) - { - for( cur = &crt->subject_alt_names; cur != NULL; cur = cur->next ) - { - if( x509_crt_check_san( &cur->buf, cn, cn_len ) == 0 ) + if (crt->ext_types & MBEDTLS_X509_EXT_SUBJECT_ALT_NAME) { + for (cur = &crt->subject_alt_names; cur != NULL; cur = cur->next) { + if (x509_crt_check_san(&cur->buf, cn, cn_len) == 0) { break; + } } - if( cur == NULL ) + if (cur == NULL) { *flags |= MBEDTLS_X509_BADCERT_CN_MISMATCH; - } - else - { - for( name = &crt->subject; name != NULL; name = name->next ) - { - if( MBEDTLS_OID_CMP( MBEDTLS_OID_AT_CN, &name->oid ) == 0 && - x509_crt_check_cn( &name->val, cn, cn_len ) == 0 ) - { + } + } else { + for (name = &crt->subject; name != NULL; name = name->next) { + if (MBEDTLS_OID_CMP(MBEDTLS_OID_AT_CN, &name->oid) == 0 && + x509_crt_check_cn(&name->val, cn, cn_len) == 0) { break; } } - if( name == NULL ) + if (name == NULL) { *flags |= MBEDTLS_X509_BADCERT_CN_MISMATCH; + } } } @@ -3063,29 +2609,30 @@ static void x509_crt_verify_name( const mbedtls_x509_crt *crt, * Merge the flags for all certs in the chain, after calling callback */ static int x509_crt_merge_flags_with_cb( - uint32_t *flags, - const mbedtls_x509_crt_verify_chain *ver_chain, - int (*f_vrfy)(void *, mbedtls_x509_crt *, int, uint32_t *), - void *p_vrfy ) + uint32_t *flags, + const mbedtls_x509_crt_verify_chain *ver_chain, + int (*f_vrfy)(void *, mbedtls_x509_crt *, int, uint32_t *), + void *p_vrfy) { int ret = MBEDTLS_ERR_ERROR_CORRUPTION_DETECTED; unsigned i; uint32_t cur_flags; const mbedtls_x509_crt_verify_chain_item *cur; - for( i = ver_chain->len; i != 0; --i ) - { + for (i = ver_chain->len; i != 0; --i) { cur = &ver_chain->items[i-1]; cur_flags = cur->flags; - if( NULL != f_vrfy ) - if( ( ret = f_vrfy( p_vrfy, cur->crt, (int) i-1, &cur_flags ) ) != 0 ) - return( ret ); + if (NULL != f_vrfy) { + if ((ret = f_vrfy(p_vrfy, cur->crt, (int) i-1, &cur_flags)) != 0) { + return ret; + } + } *flags |= cur_flags; } - return( 0 ); + return 0; } /* @@ -3105,16 +2652,19 @@ static int x509_crt_merge_flags_with_cb( * of trusted signers, and `ca_crl` will be use as the static list * of CRLs. */ -static int x509_crt_verify_restartable_ca_cb( mbedtls_x509_crt *crt, - mbedtls_x509_crt *trust_ca, - mbedtls_x509_crl *ca_crl, - mbedtls_x509_crt_ca_cb_t f_ca_cb, - void *p_ca_cb, - const mbedtls_x509_crt_profile *profile, - const char *cn, uint32_t *flags, - int (*f_vrfy)(void *, mbedtls_x509_crt *, int, uint32_t *), - void *p_vrfy, - mbedtls_x509_crt_restart_ctx *rs_ctx ) +static int x509_crt_verify_restartable_ca_cb(mbedtls_x509_crt *crt, + mbedtls_x509_crt *trust_ca, + mbedtls_x509_crl *ca_crl, + mbedtls_x509_crt_ca_cb_t f_ca_cb, + void *p_ca_cb, + const mbedtls_x509_crt_profile *profile, + const char *cn, uint32_t *flags, + int (*f_vrfy)(void *, + mbedtls_x509_crt *, + int, + uint32_t *), + void *p_vrfy, + mbedtls_x509_crt_restart_ctx *rs_ctx) { int ret = MBEDTLS_ERR_ERROR_CORRUPTION_DETECTED; mbedtls_pk_type_t pk_type; @@ -3123,105 +2673,110 @@ static int x509_crt_verify_restartable_ca_cb( mbedtls_x509_crt *crt, *flags = 0; ee_flags = 0; - x509_crt_verify_chain_reset( &ver_chain ); + x509_crt_verify_chain_reset(&ver_chain); - if( profile == NULL ) - { + if (profile == NULL) { ret = MBEDTLS_ERR_X509_BAD_INPUT_DATA; goto exit; } /* check name if requested */ - if( cn != NULL ) - x509_crt_verify_name( crt, cn, &ee_flags ); + if (cn != NULL) { + x509_crt_verify_name(crt, cn, &ee_flags); + } /* Check the type and size of the key */ - pk_type = mbedtls_pk_get_type( &crt->pk ); + pk_type = mbedtls_pk_get_type(&crt->pk); - if( x509_profile_check_pk_alg( profile, pk_type ) != 0 ) + if (x509_profile_check_pk_alg(profile, pk_type) != 0) { ee_flags |= MBEDTLS_X509_BADCERT_BAD_PK; + } - if( x509_profile_check_key( profile, &crt->pk ) != 0 ) + if (x509_profile_check_key(profile, &crt->pk) != 0) { ee_flags |= MBEDTLS_X509_BADCERT_BAD_KEY; + } /* Check the chain */ - ret = x509_crt_verify_chain( crt, trust_ca, ca_crl, - f_ca_cb, p_ca_cb, profile, - &ver_chain, rs_ctx ); + ret = x509_crt_verify_chain(crt, trust_ca, ca_crl, + f_ca_cb, p_ca_cb, profile, + &ver_chain, rs_ctx); - if( ret != 0 ) + if (ret != 0) { goto exit; + } /* Merge end-entity flags */ ver_chain.items[0].flags |= ee_flags; /* Build final flags, calling callback on the way if any */ - ret = x509_crt_merge_flags_with_cb( flags, &ver_chain, f_vrfy, p_vrfy ); + ret = x509_crt_merge_flags_with_cb(flags, &ver_chain, f_vrfy, p_vrfy); exit: #if defined(MBEDTLS_X509_TRUSTED_CERTIFICATE_CALLBACK) - mbedtls_x509_crt_free( ver_chain.trust_ca_cb_result ); - mbedtls_free( ver_chain.trust_ca_cb_result ); + mbedtls_x509_crt_free(ver_chain.trust_ca_cb_result); + mbedtls_free(ver_chain.trust_ca_cb_result); ver_chain.trust_ca_cb_result = NULL; #endif /* MBEDTLS_X509_TRUSTED_CERTIFICATE_CALLBACK */ #if defined(MBEDTLS_ECDSA_C) && defined(MBEDTLS_ECP_RESTARTABLE) - if( rs_ctx != NULL && ret != MBEDTLS_ERR_ECP_IN_PROGRESS ) - mbedtls_x509_crt_restart_free( rs_ctx ); + if (rs_ctx != NULL && ret != MBEDTLS_ERR_ECP_IN_PROGRESS) { + mbedtls_x509_crt_restart_free(rs_ctx); + } #endif /* prevent misuse of the vrfy callback - VERIFY_FAILED would be ignored by * the SSL module for authmode optional, but non-zero return from the * callback means a fatal error so it shouldn't be ignored */ - if( ret == MBEDTLS_ERR_X509_CERT_VERIFY_FAILED ) + if (ret == MBEDTLS_ERR_X509_CERT_VERIFY_FAILED) { ret = MBEDTLS_ERR_X509_FATAL_ERROR; + } - if( ret != 0 ) - { + if (ret != 0) { *flags = (uint32_t) -1; - return( ret ); + return ret; } - if( *flags != 0 ) - return( MBEDTLS_ERR_X509_CERT_VERIFY_FAILED ); + if (*flags != 0) { + return MBEDTLS_ERR_X509_CERT_VERIFY_FAILED; + } - return( 0 ); + return 0; } /* * Verify the certificate validity (default profile, not restartable) */ -int mbedtls_x509_crt_verify( mbedtls_x509_crt *crt, - mbedtls_x509_crt *trust_ca, - mbedtls_x509_crl *ca_crl, - const char *cn, uint32_t *flags, - int (*f_vrfy)(void *, mbedtls_x509_crt *, int, uint32_t *), - void *p_vrfy ) +int mbedtls_x509_crt_verify(mbedtls_x509_crt *crt, + mbedtls_x509_crt *trust_ca, + mbedtls_x509_crl *ca_crl, + const char *cn, uint32_t *flags, + int (*f_vrfy)(void *, mbedtls_x509_crt *, int, uint32_t *), + void *p_vrfy) { - return( x509_crt_verify_restartable_ca_cb( crt, trust_ca, ca_crl, - NULL, NULL, - &mbedtls_x509_crt_profile_default, - cn, flags, - f_vrfy, p_vrfy, NULL ) ); + return x509_crt_verify_restartable_ca_cb(crt, trust_ca, ca_crl, + NULL, NULL, + &mbedtls_x509_crt_profile_default, + cn, flags, + f_vrfy, p_vrfy, NULL); } /* * Verify the certificate validity (user-chosen profile, not restartable) */ -int mbedtls_x509_crt_verify_with_profile( mbedtls_x509_crt *crt, - mbedtls_x509_crt *trust_ca, - mbedtls_x509_crl *ca_crl, - const mbedtls_x509_crt_profile *profile, - const char *cn, uint32_t *flags, - int (*f_vrfy)(void *, mbedtls_x509_crt *, int, uint32_t *), - void *p_vrfy ) +int mbedtls_x509_crt_verify_with_profile(mbedtls_x509_crt *crt, + mbedtls_x509_crt *trust_ca, + mbedtls_x509_crl *ca_crl, + const mbedtls_x509_crt_profile *profile, + const char *cn, uint32_t *flags, + int (*f_vrfy)(void *, mbedtls_x509_crt *, int, uint32_t *), + void *p_vrfy) { - return( x509_crt_verify_restartable_ca_cb( crt, trust_ca, ca_crl, - NULL, NULL, - profile, cn, flags, - f_vrfy, p_vrfy, NULL ) ); + return x509_crt_verify_restartable_ca_cb(crt, trust_ca, ca_crl, + NULL, NULL, + profile, cn, flags, + f_vrfy, p_vrfy, NULL); } #if defined(MBEDTLS_X509_TRUSTED_CERTIFICATE_CALLBACK) @@ -3229,146 +2784,88 @@ int mbedtls_x509_crt_verify_with_profile( mbedtls_x509_crt *crt, * Verify the certificate validity (user-chosen profile, CA callback, * not restartable). */ -int mbedtls_x509_crt_verify_with_ca_cb( mbedtls_x509_crt *crt, - mbedtls_x509_crt_ca_cb_t f_ca_cb, - void *p_ca_cb, - const mbedtls_x509_crt_profile *profile, - const char *cn, uint32_t *flags, - int (*f_vrfy)(void *, mbedtls_x509_crt *, int, uint32_t *), - void *p_vrfy ) +int mbedtls_x509_crt_verify_with_ca_cb(mbedtls_x509_crt *crt, + mbedtls_x509_crt_ca_cb_t f_ca_cb, + void *p_ca_cb, + const mbedtls_x509_crt_profile *profile, + const char *cn, uint32_t *flags, + int (*f_vrfy)(void *, mbedtls_x509_crt *, int, uint32_t *), + void *p_vrfy) { - return( x509_crt_verify_restartable_ca_cb( crt, NULL, NULL, - f_ca_cb, p_ca_cb, - profile, cn, flags, - f_vrfy, p_vrfy, NULL ) ); + return x509_crt_verify_restartable_ca_cb(crt, NULL, NULL, + f_ca_cb, p_ca_cb, + profile, cn, flags, + f_vrfy, p_vrfy, NULL); } #endif /* MBEDTLS_X509_TRUSTED_CERTIFICATE_CALLBACK */ -int mbedtls_x509_crt_verify_restartable( mbedtls_x509_crt *crt, - mbedtls_x509_crt *trust_ca, - mbedtls_x509_crl *ca_crl, - const mbedtls_x509_crt_profile *profile, - const char *cn, uint32_t *flags, - int (*f_vrfy)(void *, mbedtls_x509_crt *, int, uint32_t *), - void *p_vrfy, - mbedtls_x509_crt_restart_ctx *rs_ctx ) +int mbedtls_x509_crt_verify_restartable(mbedtls_x509_crt *crt, + mbedtls_x509_crt *trust_ca, + mbedtls_x509_crl *ca_crl, + const mbedtls_x509_crt_profile *profile, + const char *cn, uint32_t *flags, + int (*f_vrfy)(void *, mbedtls_x509_crt *, int, uint32_t *), + void *p_vrfy, + mbedtls_x509_crt_restart_ctx *rs_ctx) { - return( x509_crt_verify_restartable_ca_cb( crt, trust_ca, ca_crl, - NULL, NULL, - profile, cn, flags, - f_vrfy, p_vrfy, rs_ctx ) ); + return x509_crt_verify_restartable_ca_cb(crt, trust_ca, ca_crl, + NULL, NULL, + profile, cn, flags, + f_vrfy, p_vrfy, rs_ctx); } /* * Initialize a certificate chain */ -void mbedtls_x509_crt_init( mbedtls_x509_crt *crt ) +void mbedtls_x509_crt_init(mbedtls_x509_crt *crt) { - memset( crt, 0, sizeof(mbedtls_x509_crt) ); + memset(crt, 0, sizeof(mbedtls_x509_crt)); } /* * Unallocate all certificate data */ -void mbedtls_x509_crt_free( mbedtls_x509_crt *crt ) +void mbedtls_x509_crt_free(mbedtls_x509_crt *crt) { mbedtls_x509_crt *cert_cur = crt; mbedtls_x509_crt *cert_prv; - mbedtls_x509_name *name_cur; - mbedtls_x509_name *name_prv; - mbedtls_x509_sequence *seq_cur; - mbedtls_x509_sequence *seq_prv; - if( crt == NULL ) - return; - - do - { - mbedtls_pk_free( &cert_cur->pk ); + while (cert_cur != NULL) { + mbedtls_pk_free(&cert_cur->pk); #if defined(MBEDTLS_X509_RSASSA_PSS_SUPPORT) - mbedtls_free( cert_cur->sig_opts ); + mbedtls_free(cert_cur->sig_opts); #endif - name_cur = cert_cur->issuer.next; - while( name_cur != NULL ) - { - name_prv = name_cur; - name_cur = name_cur->next; - mbedtls_platform_zeroize( name_prv, sizeof( mbedtls_x509_name ) ); - mbedtls_free( name_prv ); - } + mbedtls_asn1_free_named_data_list_shallow(cert_cur->issuer.next); + mbedtls_asn1_free_named_data_list_shallow(cert_cur->subject.next); + mbedtls_asn1_sequence_free(cert_cur->ext_key_usage.next); + mbedtls_asn1_sequence_free(cert_cur->subject_alt_names.next); + mbedtls_asn1_sequence_free(cert_cur->certificate_policies.next); - name_cur = cert_cur->subject.next; - while( name_cur != NULL ) - { - name_prv = name_cur; - name_cur = name_cur->next; - mbedtls_platform_zeroize( name_prv, sizeof( mbedtls_x509_name ) ); - mbedtls_free( name_prv ); - } - - seq_cur = cert_cur->ext_key_usage.next; - while( seq_cur != NULL ) - { - seq_prv = seq_cur; - seq_cur = seq_cur->next; - mbedtls_platform_zeroize( seq_prv, - sizeof( mbedtls_x509_sequence ) ); - mbedtls_free( seq_prv ); + if (cert_cur->raw.p != NULL && cert_cur->own_buffer) { + mbedtls_platform_zeroize(cert_cur->raw.p, cert_cur->raw.len); + mbedtls_free(cert_cur->raw.p); } - seq_cur = cert_cur->subject_alt_names.next; - while( seq_cur != NULL ) - { - seq_prv = seq_cur; - seq_cur = seq_cur->next; - mbedtls_platform_zeroize( seq_prv, - sizeof( mbedtls_x509_sequence ) ); - mbedtls_free( seq_prv ); - } - - seq_cur = cert_cur->certificate_policies.next; - while( seq_cur != NULL ) - { - seq_prv = seq_cur; - seq_cur = seq_cur->next; - mbedtls_platform_zeroize( seq_prv, - sizeof( mbedtls_x509_sequence ) ); - mbedtls_free( seq_prv ); - } - - if( cert_cur->raw.p != NULL && cert_cur->own_buffer ) - { - mbedtls_platform_zeroize( cert_cur->raw.p, cert_cur->raw.len ); - mbedtls_free( cert_cur->raw.p ); - } - - cert_cur = cert_cur->next; - } - while( cert_cur != NULL ); - - cert_cur = crt; - do - { cert_prv = cert_cur; cert_cur = cert_cur->next; - mbedtls_platform_zeroize( cert_prv, sizeof( mbedtls_x509_crt ) ); - if( cert_prv != crt ) - mbedtls_free( cert_prv ); + mbedtls_platform_zeroize(cert_prv, sizeof(mbedtls_x509_crt)); + if (cert_prv != crt) { + mbedtls_free(cert_prv); + } } - while( cert_cur != NULL ); } #if defined(MBEDTLS_ECDSA_C) && defined(MBEDTLS_ECP_RESTARTABLE) /* * Initialize a restart context */ -void mbedtls_x509_crt_restart_init( mbedtls_x509_crt_restart_ctx *ctx ) +void mbedtls_x509_crt_restart_init(mbedtls_x509_crt_restart_ctx *ctx) { - mbedtls_pk_restart_init( &ctx->pk ); + mbedtls_pk_restart_init(&ctx->pk); ctx->parent = NULL; ctx->fallback_parent = NULL; @@ -3378,19 +2875,20 @@ void mbedtls_x509_crt_restart_init( mbedtls_x509_crt_restart_ctx *ctx ) ctx->in_progress = x509_crt_rs_none; ctx->self_cnt = 0; - x509_crt_verify_chain_reset( &ctx->ver_chain ); + x509_crt_verify_chain_reset(&ctx->ver_chain); } /* * Free the components of a restart context */ -void mbedtls_x509_crt_restart_free( mbedtls_x509_crt_restart_ctx *ctx ) +void mbedtls_x509_crt_restart_free(mbedtls_x509_crt_restart_ctx *ctx) { - if( ctx == NULL ) + if (ctx == NULL) { return; + } - mbedtls_pk_restart_free( &ctx->pk ); - mbedtls_x509_crt_restart_init( ctx ); + mbedtls_pk_restart_free(&ctx->pk); + mbedtls_x509_crt_restart_init(ctx); } #endif /* MBEDTLS_ECDSA_C && MBEDTLS_ECP_RESTARTABLE */ diff --git a/ra/fsp/src/rm_mqtt_onchip_da16xxx/rm_mqtt_onchip_da16xxx.c b/ra/fsp/src/rm_mqtt_onchip_da16xxx/rm_mqtt_onchip_da16xxx.c new file mode 100644 index 000000000..0b374a197 --- /dev/null +++ b/ra/fsp/src/rm_mqtt_onchip_da16xxx/rm_mqtt_onchip_da16xxx.c @@ -0,0 +1,867 @@ +/*********************************************************************************************************************** + * Copyright [2020-2023] Renesas Electronics Corporation and/or its affiliates. All Rights Reserved. + * + * This software and documentation are supplied by Renesas Electronics America Inc. and may only be used with products + * of Renesas Electronics Corp. and its affiliates ("Renesas"). No other uses are authorized. Renesas products are + * sold pursuant to Renesas terms and conditions of sale. Purchasers are solely responsible for the selection and use + * of Renesas products and Renesas assumes no liability. No license, express or implied, to any intellectual property + * right is granted by Renesas. This software is protected under all applicable laws, including copyright laws. Renesas + * reserves the right to change or discontinue this software and/or this documentation. THE SOFTWARE AND DOCUMENTATION + * IS DELIVERED TO YOU "AS IS," AND RENESAS MAKES NO REPRESENTATIONS OR WARRANTIES, AND TO THE FULLEST EXTENT + * PERMISSIBLE UNDER APPLICABLE LAW, DISCLAIMS ALL WARRANTIES, WHETHER EXPLICITLY OR IMPLICITLY, INCLUDING WARRANTIES + * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, AND NONINFRINGEMENT, WITH RESPECT TO THE SOFTWARE OR + * DOCUMENTATION. RENESAS SHALL HAVE NO LIABILITY ARISING OUT OF ANY SECURITY VULNERABILITY OR BREACH. TO THE MAXIMUM + * EXTENT PERMITTED BY LAW, IN NO EVENT WILL RENESAS BE LIABLE TO YOU IN CONNECTION WITH THE SOFTWARE OR DOCUMENTATION + * (OR ANY PERSON OR ENTITY CLAIMING RIGHTS DERIVED FROM YOU) FOR ANY LOSS, DAMAGES, OR CLAIMS WHATSOEVER, INCLUDING, + * WITHOUT LIMITATION, ANY DIRECT, CONSEQUENTIAL, SPECIAL, INDIRECT, PUNITIVE, OR INCIDENTAL DAMAGES; ANY LOST PROFITS, + * OTHER ECONOMIC DAMAGE, PROPERTY DAMAGE, OR PERSONAL INJURY; AND EVEN IF RENESAS HAS BEEN ADVISED OF THE POSSIBILITY + * OF SUCH LOSS, DAMAGES, CLAIMS OR COSTS. + **********************************************************************************************************************/ + +/*********************************************************************************************************************** + * Includes + **********************************************************************************************************************/ +#include "rm_wifi_onchip_da16xxx.h" +#include "rm_mqtt_onchip_da16xxx.h" + +/*********************************************************************************************************************** + * Defines + **********************************************************************************************************************/ +#define MQTT_ONCHIP_DA16XXX_CERT_START "\x1B" +#define MQTT_ONCHIP_DA16XXX_CERT_END "\x03" + +/* Predefined timeout values */ +#define MQTT_ONCHIP_DA16XXX_TIMEOUT_100MS (100) +#define MQTT_ONCHIP_DA16XXX_TIMEOUT_400MS (400) +#define MQTT_ONCHIP_DA16XXX_TIMEOUT_500MS (500) +#define MQTT_ONCHIP_DA16XXX_TIMEOUT_1SEC (1000) +#define MQTT_ONCHIP_DA16XXX_TIMEOUT_5SEC (5000) + +/* DA16XXX AT command retry delay in milliseconds */ +#define MQTT_ONCHIP_DA16XXX_DELAY_100MS (100) +#define MQTT_ONCHIP_DA16XXX_DELAY_200MS (200) +#define MQTT_ONCHIP_DA16XXX_DELAY_500MS (500) +#define MQTT_ONCHIP_DA16XXX_DELAY_1000MS (1000) + +#define MQTT_ONCHIP_DA16XXX_RETURN_TEXT_OK "OK" +#define MQTT_OPEN (0x4d515454ULL) +#define MQTT_CLOSED (0) + +/*********************************************************************************************************************** + * Extern variables + **********************************************************************************************************************/ + +/*********************************************************************************************************************** + * Static Globals + **********************************************************************************************************************/ + +/*********************************************************************************************************************** + * Local function prototypes + **********************************************************************************************************************/ +static fsp_err_t rm_mqtt_da16xxx_optional_init(mqtt_onchip_da16xxx_instance_ctrl_t * p_ctrl, + mqtt_onchip_da16xxx_cfg_t const * const p_cfg); + +/*********************************************************************************************************************** + * Public Functions Implementation + **********************************************************************************************************************/ + +/*******************************************************************************************************************//** + * @addtogroup MQTT_ONCHIP_DA16XXX MQTT_ONCHIP_DA16XXX + * @{ + **********************************************************************************************************************/ + +/*******************************************************************************************************************//** + * Initialize the DA16XXX on-chip MQTT Client service. + * + * @param[in] p_ctrl Pointer to MQTT Client instance control structure. + * @param[in] p_cfg Pointer to MQTT Client configuration structure. + * + * @retval FSP_SUCCESS Function completed successfully. + * @retval FSP_ERR_WIFI_FAILED Error occurred with command to Wifi module. + * @retval FSP_ERR_ASSERTION The p_cfg instance is NULL. + * @retval FSP_ERR_INVALID_ARGUMENT Data size is too large or NULL. + * @retval FSP_ERR_ALREADY_OPEN The instance has already been opened. + * @retval FSP_ERR_OUT_OF_MEMORY Certificates are too large for buffer. + **********************************************************************************************************************/ +fsp_err_t RM_MQTT_DA16XXX_Open (mqtt_onchip_da16xxx_instance_ctrl_t * p_ctrl, + mqtt_onchip_da16xxx_cfg_t const * const p_cfg) +{ + /* Do parameter checking */ +#if (1 == MQTT_ONCHIP_DA16XXX_CFG_PARAM_CHECKING_ENABLED) + FSP_ASSERT(NULL != p_cfg); + FSP_ASSERT(NULL != p_ctrl); + FSP_ASSERT(NULL != p_cfg->p_callback); + FSP_ERROR_RETURN(MQTT_OPEN != p_ctrl->open, FSP_ERR_ALREADY_OPEN); +#endif + + p_ctrl->p_cfg = p_cfg; + + /* Clear the stored ALPNs and SNI configurations */ + snprintf((char *) p_ctrl->cmd_tx_buff, sizeof(p_ctrl->cmd_tx_buff), "AT+NWHTCSNIDEL\r"); + + FSP_ERROR_RETURN(FSP_SUCCESS == + rm_wifi_onchip_da16xxx_at_command_send((char *) p_ctrl->cmd_tx_buff, p_ctrl->cmd_rx_buff, + sizeof(p_ctrl->cmd_rx_buff), + MQTT_ONCHIP_DA16XXX_TIMEOUT_400MS, + MQTT_ONCHIP_DA16XXX_DELAY_200MS, + MQTT_ONCHIP_DA16XXX_RETURN_TEXT_OK), + FSP_ERR_WIFI_FAILED); + + snprintf((char *) p_ctrl->cmd_tx_buff, sizeof(p_ctrl->cmd_tx_buff), "AT+NWHTCALPNDEL\r"); + + FSP_ERROR_RETURN(FSP_SUCCESS == + rm_wifi_onchip_da16xxx_at_command_send((char *) p_ctrl->cmd_tx_buff, p_ctrl->cmd_rx_buff, + sizeof(p_ctrl->cmd_rx_buff), + MQTT_ONCHIP_DA16XXX_TIMEOUT_400MS, + MQTT_ONCHIP_DA16XXX_DELAY_200MS, + MQTT_ONCHIP_DA16XXX_RETURN_TEXT_OK), + FSP_ERR_WIFI_FAILED); + + /* Set MQTT 3.1.1 settings */ + snprintf((char *) p_ctrl->cmd_tx_buff, sizeof(p_ctrl->cmd_tx_buff), "AT+NWMQV311=%d\r", + p_ctrl->p_cfg->use_mqtt_v311); + + FSP_ERROR_RETURN(FSP_SUCCESS == + rm_wifi_onchip_da16xxx_at_command_send((char *) p_ctrl->cmd_tx_buff, p_ctrl->cmd_rx_buff, + sizeof(p_ctrl->cmd_rx_buff), + MQTT_ONCHIP_DA16XXX_TIMEOUT_400MS, + MQTT_ONCHIP_DA16XXX_DELAY_200MS, + MQTT_ONCHIP_DA16XXX_RETURN_TEXT_OK), + FSP_ERR_WIFI_FAILED); + + /* Check for host name and port */ + FSP_ERROR_RETURN(NULL != p_cfg->p_host_name, FSP_ERR_INVALID_ARGUMENT); + FSP_ERROR_RETURN(0 != p_cfg->mqtt_port, FSP_ERR_INVALID_ARGUMENT); + + /* Set the host name of the MQTT broker with AT+NWMQBR */ + snprintf((char *) p_ctrl->cmd_tx_buff, + sizeof(p_ctrl->cmd_tx_buff), + "AT+NWMQBR=%s,%d\r", + p_cfg->p_host_name, + p_cfg->mqtt_port); + + FSP_ERROR_RETURN(FSP_SUCCESS == + rm_wifi_onchip_da16xxx_at_command_send((char *) p_ctrl->cmd_tx_buff, p_ctrl->cmd_rx_buff, + sizeof(p_ctrl->cmd_rx_buff), + MQTT_ONCHIP_DA16XXX_TIMEOUT_400MS, + MQTT_ONCHIP_DA16XXX_DELAY_200MS, + MQTT_ONCHIP_DA16XXX_RETURN_TEXT_OK), + FSP_ERR_WIFI_FAILED); + + /* Store the MQTT Username and Password */ + if ((NULL != p_cfg->p_mqtt_user_name) && (NULL != p_cfg->p_mqtt_password)) + { + snprintf((char *) p_ctrl->cmd_tx_buff, + sizeof(p_ctrl->cmd_tx_buff), + "AT+NWMQLI=%s,%s\r", + p_cfg->p_mqtt_user_name, + p_cfg->p_mqtt_password); + + FSP_ERROR_RETURN(FSP_SUCCESS == + rm_wifi_onchip_da16xxx_at_command_send((char *) p_ctrl->cmd_tx_buff, p_ctrl->cmd_rx_buff, + sizeof(p_ctrl->cmd_rx_buff), + MQTT_ONCHIP_DA16XXX_TIMEOUT_400MS, + MQTT_ONCHIP_DA16XXX_DELAY_200MS, + MQTT_ONCHIP_DA16XXX_RETURN_TEXT_OK), + FSP_ERR_WIFI_FAILED); + + /* Disable TLS with AT+NWMQTLS */ + snprintf((char *) p_ctrl->cmd_tx_buff, sizeof(p_ctrl->cmd_tx_buff), "AT+NWMQTLS=0\r"); + + FSP_ERROR_RETURN(FSP_SUCCESS == + rm_wifi_onchip_da16xxx_at_command_send((char *) p_ctrl->cmd_tx_buff, p_ctrl->cmd_rx_buff, + sizeof(p_ctrl->cmd_rx_buff), + MQTT_ONCHIP_DA16XXX_TIMEOUT_400MS, + MQTT_ONCHIP_DA16XXX_DELAY_200MS, + MQTT_ONCHIP_DA16XXX_RETURN_TEXT_OK), + FSP_ERR_WIFI_FAILED); + } + else + { + /* Store the TLS certificate/private key */ + if ((NULL != p_cfg->p_root_ca) && (NULL != p_cfg->p_client_cert) && + (NULL != p_cfg->p_client_private_key)) + { + /* Check the certificates/keys provided to ensure the TX buffer is large enough (-3 for command string e.g. "C1,") */ + FSP_ERROR_RETURN((p_cfg->root_ca_size <= (MQTT_ONCHIP_DA16XXX_CFG_CMD_TX_BUF_SIZE - 3)) || + (p_cfg->client_cert_size <= (MQTT_ONCHIP_DA16XXX_CFG_CMD_TX_BUF_SIZE - 3)) || + (p_cfg->private_key_size <= (MQTT_ONCHIP_DA16XXX_CFG_CMD_TX_BUF_SIZE - 3)), + FSP_ERR_OUT_OF_MEMORY); + + /* Enable TLS with AT+NWMQTLS */ + snprintf((char *) p_ctrl->cmd_tx_buff, sizeof(p_ctrl->cmd_tx_buff), "AT+NWMQTLS=1\r"); + + FSP_ERROR_RETURN(FSP_SUCCESS == + rm_wifi_onchip_da16xxx_at_command_send((char *) p_ctrl->cmd_tx_buff, p_ctrl->cmd_rx_buff, + sizeof(p_ctrl->cmd_rx_buff), + MQTT_ONCHIP_DA16XXX_TIMEOUT_400MS, + MQTT_ONCHIP_DA16XXX_DELAY_200MS, + MQTT_ONCHIP_DA16XXX_RETURN_TEXT_OK), + FSP_ERR_WIFI_FAILED); + + /* Program the root CA Certificate */ + + /* Put the DA16XXX module into certificate/key input mode */ + snprintf((char *) p_ctrl->cmd_tx_buff, sizeof(p_ctrl->cmd_tx_buff), "%s", MQTT_ONCHIP_DA16XXX_CERT_START); + + FSP_ERROR_RETURN(FSP_SUCCESS == + rm_wifi_onchip_da16xxx_at_command_send((char *) p_ctrl->cmd_tx_buff, p_ctrl->cmd_rx_buff, + sizeof(p_ctrl->cmd_rx_buff), + MQTT_ONCHIP_DA16XXX_TIMEOUT_400MS, + MQTT_ONCHIP_DA16XXX_DELAY_500MS, NULL), + FSP_ERR_WIFI_FAILED); + + /* Send certificate/key ascii text */ + snprintf((char *) p_ctrl->cmd_tx_buff, sizeof(p_ctrl->cmd_tx_buff), "C0,%s", (char *) p_cfg->p_root_ca); + + FSP_ERROR_RETURN(FSP_SUCCESS == + rm_wifi_onchip_da16xxx_at_command_send((char *) p_ctrl->cmd_tx_buff, p_ctrl->cmd_rx_buff, + sizeof(p_ctrl->cmd_rx_buff), + MQTT_ONCHIP_DA16XXX_TIMEOUT_400MS, + MQTT_ONCHIP_DA16XXX_DELAY_500MS, NULL), + FSP_ERR_WIFI_FAILED); + + /* Send Indication of the end of content */ + snprintf((char *) p_ctrl->cmd_tx_buff, sizeof(p_ctrl->cmd_tx_buff), "%s", MQTT_ONCHIP_DA16XXX_CERT_END); + + FSP_ERROR_RETURN(FSP_SUCCESS == + rm_wifi_onchip_da16xxx_at_command_send((char *) p_ctrl->cmd_tx_buff, p_ctrl->cmd_rx_buff, + sizeof(p_ctrl->cmd_rx_buff), + MQTT_ONCHIP_DA16XXX_TIMEOUT_400MS, + MQTT_ONCHIP_DA16XXX_DELAY_500MS, + MQTT_ONCHIP_DA16XXX_RETURN_TEXT_OK), + FSP_ERR_WIFI_FAILED); + + /* Put the DA16XXX module into certificate/key input mode */ + snprintf((char *) p_ctrl->cmd_tx_buff, sizeof(p_ctrl->cmd_tx_buff), "%s", MQTT_ONCHIP_DA16XXX_CERT_START); + + FSP_ERROR_RETURN(FSP_SUCCESS == + rm_wifi_onchip_da16xxx_at_command_send((char *) p_ctrl->cmd_tx_buff, p_ctrl->cmd_rx_buff, + sizeof(p_ctrl->cmd_rx_buff), + MQTT_ONCHIP_DA16XXX_TIMEOUT_400MS, + MQTT_ONCHIP_DA16XXX_DELAY_500MS, NULL), + FSP_ERR_WIFI_FAILED); + + /* Send certificate/key ascii text */ + snprintf((char *) p_ctrl->cmd_tx_buff, sizeof(p_ctrl->cmd_tx_buff), "C1,%s", (char *) p_cfg->p_client_cert); + + FSP_ERROR_RETURN(FSP_SUCCESS == + rm_wifi_onchip_da16xxx_at_command_send((char *) p_ctrl->cmd_tx_buff, p_ctrl->cmd_rx_buff, + sizeof(p_ctrl->cmd_rx_buff), + MQTT_ONCHIP_DA16XXX_TIMEOUT_400MS, + MQTT_ONCHIP_DA16XXX_DELAY_500MS, NULL), + FSP_ERR_WIFI_FAILED); + + /* Send Indication of the end of content */ + snprintf((char *) p_ctrl->cmd_tx_buff, sizeof(p_ctrl->cmd_tx_buff), "%s", MQTT_ONCHIP_DA16XXX_CERT_END); + + FSP_ERROR_RETURN(FSP_SUCCESS == + rm_wifi_onchip_da16xxx_at_command_send((char *) p_ctrl->cmd_tx_buff, p_ctrl->cmd_rx_buff, + sizeof(p_ctrl->cmd_rx_buff), + MQTT_ONCHIP_DA16XXX_TIMEOUT_400MS, + MQTT_ONCHIP_DA16XXX_DELAY_500MS, + MQTT_ONCHIP_DA16XXX_RETURN_TEXT_OK), + FSP_ERR_WIFI_FAILED); + + /* Program the private key */ + + /* Put the DA16XXX module into certificate/key input mode */ + snprintf((char *) p_ctrl->cmd_tx_buff, sizeof(p_ctrl->cmd_tx_buff), "%s", MQTT_ONCHIP_DA16XXX_CERT_START); + + FSP_ERROR_RETURN(FSP_SUCCESS == + rm_wifi_onchip_da16xxx_at_command_send((char *) p_ctrl->cmd_tx_buff, p_ctrl->cmd_rx_buff, + sizeof(p_ctrl->cmd_rx_buff), + MQTT_ONCHIP_DA16XXX_TIMEOUT_400MS, + MQTT_ONCHIP_DA16XXX_DELAY_500MS, NULL), + FSP_ERR_WIFI_FAILED); + + /* Send certificate/key ascii text */ + snprintf((char *) p_ctrl->cmd_tx_buff, + sizeof(p_ctrl->cmd_tx_buff), + "C2,%s", + (char *) p_cfg->p_client_private_key); + + FSP_ERROR_RETURN(FSP_SUCCESS == + rm_wifi_onchip_da16xxx_at_command_send((char *) p_ctrl->cmd_tx_buff, p_ctrl->cmd_rx_buff, + sizeof(p_ctrl->cmd_rx_buff), + MQTT_ONCHIP_DA16XXX_TIMEOUT_400MS, + MQTT_ONCHIP_DA16XXX_DELAY_500MS, NULL), + FSP_ERR_WIFI_FAILED); + + /* Send Indication of the end of content */ + snprintf((char *) p_ctrl->cmd_tx_buff, sizeof(p_ctrl->cmd_tx_buff), "%s", MQTT_ONCHIP_DA16XXX_CERT_END); + + FSP_ERROR_RETURN(FSP_SUCCESS == + rm_wifi_onchip_da16xxx_at_command_send((char *) p_ctrl->cmd_tx_buff, p_ctrl->cmd_rx_buff, + sizeof(p_ctrl->cmd_rx_buff), + MQTT_ONCHIP_DA16XXX_TIMEOUT_400MS, + MQTT_ONCHIP_DA16XXX_DELAY_500MS, + MQTT_ONCHIP_DA16XXX_RETURN_TEXT_OK), + FSP_ERR_WIFI_FAILED); + } + } + + FSP_ERROR_RETURN(0 != p_cfg->keep_alive_seconds, FSP_ERR_INVALID_ARGUMENT); + + /* Set the MQTT ping period */ + snprintf((char *) p_ctrl->cmd_tx_buff, sizeof(p_ctrl->cmd_tx_buff), "AT+NWMQPING=%d\r", p_cfg->keep_alive_seconds); + + FSP_ERROR_RETURN(FSP_SUCCESS == + rm_wifi_onchip_da16xxx_at_command_send((char *) p_ctrl->cmd_tx_buff, p_ctrl->cmd_rx_buff, + sizeof(p_ctrl->cmd_rx_buff), + MQTT_ONCHIP_DA16XXX_TIMEOUT_400MS, + MQTT_ONCHIP_DA16XXX_DELAY_200MS, + MQTT_ONCHIP_DA16XXX_RETURN_TEXT_OK), + FSP_ERR_WIFI_FAILED); + + /* Perform MQTT optional settings */ + FSP_ERROR_RETURN(FSP_SUCCESS == rm_mqtt_da16xxx_optional_init(p_ctrl, p_cfg), FSP_ERR_WIFI_FAILED); + + p_ctrl->open = MQTT_OPEN; + + return FSP_SUCCESS; +} + +/*******************************************************************************************************************//** + * Disconnect from DA16XXX MQTT Client service. + * + * @param[in] p_ctrl Pointer to MQTT Client instance control structure. + * + * @retval FSP_SUCCESS Function completed successfully. + * @retval FSP_ERR_WIFI_FAILED Error occurred with command to Wifi module. + * @retval FSP_ERR_ASSERTION The p_ctrl instance is NULL. + * @retval FSP_ERR_NOT_OPEN The instance has not been opened or the client is not connected. + **********************************************************************************************************************/ +fsp_err_t RM_MQTT_DA16XXX_Disconnect (mqtt_onchip_da16xxx_instance_ctrl_t * p_ctrl) +{ + /* Do parameter checking */ +#if (1 == MQTT_ONCHIP_DA16XXX_CFG_PARAM_CHECKING_ENABLED) + FSP_ASSERT(NULL != p_ctrl); + FSP_ERROR_RETURN(MQTT_OPEN == p_ctrl->open, FSP_ERR_NOT_OPEN); + FSP_ERROR_RETURN(true == p_ctrl->is_mqtt_connected, FSP_ERR_NOT_OPEN); +#endif + + /* Disable the MQTT Client */ + snprintf((char *) p_ctrl->cmd_tx_buff, sizeof(p_ctrl->cmd_tx_buff), "AT+NWMQCL=0\r"); + + FSP_ERROR_RETURN(FSP_SUCCESS == + rm_wifi_onchip_da16xxx_at_command_send((char *) p_ctrl->cmd_tx_buff, p_ctrl->cmd_rx_buff, + sizeof(p_ctrl->cmd_rx_buff), + MQTT_ONCHIP_DA16XXX_TIMEOUT_400MS, + MQTT_ONCHIP_DA16XXX_DELAY_200MS, + MQTT_ONCHIP_DA16XXX_RETURN_TEXT_OK), + FSP_ERR_WIFI_FAILED); + + p_ctrl->is_mqtt_connected = false; + + return FSP_SUCCESS; +} + +/*******************************************************************************************************************//** + * Configure and connect the DA16XXX MQTT Client service. + * + * @param[in] p_ctrl Pointer to MQTT Client instance control structure. + * @param[in] timeout_ms Timeout in milliseconds. + * + * @retval FSP_SUCCESS Function completed successfully. + * @retval FSP_ERR_WIFI_FAILED Error occurred with command to Wifi module. + * @retval FSP_ERR_ASSERTION The p_ctrl is NULL. + * @retval FSP_ERR_NOT_OPEN The instance has not been opened. + * @retval FSP_ERR_IN_USE The MQTT client is already connected. + * @retval FSP_ERR_INVALID_DATA Response does not contain Connect status. + **********************************************************************************************************************/ +fsp_err_t RM_MQTT_DA16XXX_Connect (mqtt_onchip_da16xxx_instance_ctrl_t * p_ctrl, uint32_t timeout_ms) +{ + // wifi_onchip_da16xxx_instance_ctrl_t * p_wifi_instance_ctrl = &g_rm_wifi_onchip_da16xxx_instance; + char * ptr = (char *) (p_ctrl->cmd_rx_buff); + + /* Do parameter checking */ +#if (1 == MQTT_ONCHIP_DA16XXX_CFG_PARAM_CHECKING_ENABLED) + FSP_ASSERT(NULL != p_ctrl); + FSP_ERROR_RETURN(MQTT_OPEN == p_ctrl->open, FSP_ERR_NOT_OPEN); + FSP_ERROR_RETURN(false == p_ctrl->is_mqtt_connected, FSP_ERR_IN_USE); +#endif + + /* Enable the MQTT Client */ + snprintf((char *) p_ctrl->cmd_tx_buff, sizeof(p_ctrl->cmd_tx_buff), "AT+NWMQCL=1\r"); + + FSP_ERROR_RETURN(FSP_SUCCESS == + rm_wifi_onchip_da16xxx_at_command_send((char *) p_ctrl->cmd_tx_buff, p_ctrl->cmd_rx_buff, + sizeof(p_ctrl->cmd_rx_buff), timeout_ms, + MQTT_ONCHIP_DA16XXX_DELAY_200MS, + MQTT_ONCHIP_DA16XXX_RETURN_TEXT_OK), + FSP_ERR_WIFI_FAILED); + + R_BSP_SoftwareDelay(MQTT_ONCHIP_DA16XXX_TIMEOUT_5SEC, BSP_DELAY_UNITS_MILLISECONDS); + + /* Query results of connection */ + snprintf((char *) p_ctrl->cmd_tx_buff, sizeof(p_ctrl->cmd_tx_buff), "AT+NWMQCL=?\r"); + + FSP_ERROR_RETURN(FSP_SUCCESS == + rm_wifi_onchip_da16xxx_at_command_send((char *) p_ctrl->cmd_tx_buff, p_ctrl->cmd_rx_buff, + sizeof(p_ctrl->cmd_rx_buff), + MQTT_ONCHIP_DA16XXX_TIMEOUT_400MS, + MQTT_ONCHIP_DA16XXX_DELAY_200MS, + MQTT_ONCHIP_DA16XXX_RETURN_TEXT_OK), + FSP_ERR_WIFI_FAILED); + + /* Parse the response */ + ptr = strstr(ptr, "+NWMQCL:"); + + FSP_ERROR_RETURN(NULL != ptr, FSP_ERR_INVALID_DATA); + + ptr = ptr + strlen("+NWMQCL:"); + + FSP_ERROR_RETURN('1' == *ptr, FSP_ERR_WIFI_FAILED); + + p_ctrl->is_mqtt_connected = 1; + + return FSP_SUCCESS; +} + +/*******************************************************************************************************************//** + * Publish a message for a given MQTT topic. + * + * @param[in] p_ctrl Pointer to MQTT Client instance control structure. + * @param[in] p_pub_info MQTT Publish packet parameters. + * + * + * @retval FSP_SUCCESS Function completed successfully. + * @retval FSP_ERR_WIFI_FAILED Error occurred with command to Wifi module. + * @retval FSP_ERR_ASSERTION The p_ctrl, p_pub_info is NULL. + * @retval FSP_ERR_NOT_OPEN The instance has not been opened or the client is not connected. + * @retval FSP_ERR_INVALID_DATA Data size is too large. + **********************************************************************************************************************/ +fsp_err_t RM_MQTT_DA16XXX_Publish (mqtt_onchip_da16xxx_instance_ctrl_t * p_ctrl, + mqtt_onchip_da16xxx_pub_info_t * const p_pub_info) +{ + /* Do parameter checking */ +#if (1 == MQTT_ONCHIP_DA16XXX_CFG_PARAM_CHECKING_ENABLED) + FSP_ASSERT(NULL != p_ctrl); + FSP_ASSERT(NULL != p_pub_info); + FSP_ERROR_RETURN(p_pub_info->payload_length <= MQTT_ONCHIP_DA16XXX_MAX_PUBMSG_LEN, FSP_ERR_INVALID_DATA); + FSP_ERROR_RETURN(p_pub_info->topic_name_Length <= MQTT_ONCHIP_DA16XXX_MAX_TOPIC_LEN, FSP_ERR_INVALID_DATA); + FSP_ERROR_RETURN(true == p_ctrl->is_mqtt_connected, FSP_ERR_NOT_OPEN); +#endif + + /* Publish an MQTT message with topic and payload */ + if ((p_pub_info->topic_name_Length + p_pub_info->payload_length) < MQTT_ONCHIP_DA16XXX_MAX_PUBTOPICMSG_LEN) + { + /* Set MQTT QoS level settings */ + snprintf((char *) p_ctrl->cmd_tx_buff, sizeof(p_ctrl->cmd_tx_buff), "AT+NWMQQOS=%d\r", p_pub_info->qos); + + FSP_ERROR_RETURN(FSP_SUCCESS == + rm_wifi_onchip_da16xxx_at_command_send((char *) p_ctrl->cmd_tx_buff, p_ctrl->cmd_rx_buff, + sizeof(p_ctrl->cmd_rx_buff), + MQTT_ONCHIP_DA16XXX_TIMEOUT_400MS, + MQTT_ONCHIP_DA16XXX_DELAY_200MS, + MQTT_ONCHIP_DA16XXX_RETURN_TEXT_OK), + FSP_ERR_WIFI_FAILED); + + FSP_ERROR_RETURN((strlen((char *) p_ctrl->cmd_tx_buff) + strlen(p_pub_info->p_payload) + + strlen(p_pub_info->p_topic_name)) < MQTT_ONCHIP_DA16XXX_CFG_CMD_TX_BUF_SIZE, + FSP_ERR_INVALID_DATA); + + snprintf((char *) p_ctrl->cmd_tx_buff, + sizeof(p_ctrl->cmd_tx_buff), + "AT+NWMQMSG=%s,%s\r", + p_pub_info->p_payload, + p_pub_info->p_topic_name); + + FSP_ERROR_RETURN(FSP_SUCCESS == + rm_wifi_onchip_da16xxx_at_command_send((char *) p_ctrl->cmd_tx_buff, p_ctrl->cmd_rx_buff, + sizeof(p_ctrl->cmd_rx_buff), + MQTT_ONCHIP_DA16XXX_TIMEOUT_400MS, + MQTT_ONCHIP_DA16XXX_DELAY_200MS, NULL), + FSP_ERR_WIFI_FAILED); + } + else + { + return FSP_ERR_WIFI_FAILED; + } + + return FSP_SUCCESS; +} + +/*******************************************************************************************************************//** + * Subscribe to DA16XXX MQTT topics. + * + * @param[in] p_ctrl Pointer to MQTT Client instance control structure. + * @param[in] p_sub_info List of MQTT subscription info. + * @param[in] subscription_count Number of topics to subscribe to. + * + * @retval FSP_SUCCESS Function completed successfully. + * @retval FSP_ERR_WIFI_FAILED Error occurred with command to Wifi module. + * @retval FSP_ERR_ASSERTION The p_ctrl, p_sub_info is NULL or subscription_count is 0. + * @retval FSP_ERR_NOT_OPEN The instance has not been opened. + * @retval FSP_ERR_INVALID_DATA Data size is too large. + **********************************************************************************************************************/ +fsp_err_t RM_MQTT_DA16XXX_Subscribe (mqtt_onchip_da16xxx_instance_ctrl_t * p_ctrl, + mqtt_onchip_da16xxx_sub_info_t * const p_sub_info, + size_t subscription_count) +{ + /* Do parameter checking */ +#if (1 == MQTT_ONCHIP_DA16XXX_CFG_PARAM_CHECKING_ENABLED) + FSP_ASSERT(NULL != p_ctrl); + FSP_ASSERT(NULL != p_sub_info); + FSP_ASSERT(0 != subscription_count); + FSP_ERROR_RETURN(MQTT_OPEN == p_ctrl->open, FSP_ERR_NOT_OPEN); +#endif + + /* Set the MQTT subscriber topic with AT+NWMQTS */ + if (subscription_count < MQTT_ONCHIP_DA16XXX_SUBTOPIC_MAX_CNT) + { + /* Set MQTT QoS level settings */ + snprintf((char *) p_ctrl->cmd_tx_buff, sizeof(p_ctrl->cmd_tx_buff), "AT+NWMQQOS=%d\r", p_sub_info[0].qos); + + FSP_ERROR_RETURN(FSP_SUCCESS == + rm_wifi_onchip_da16xxx_at_command_send((char *) p_ctrl->cmd_tx_buff, p_ctrl->cmd_rx_buff, + sizeof(p_ctrl->cmd_rx_buff), + MQTT_ONCHIP_DA16XXX_TIMEOUT_400MS, + MQTT_ONCHIP_DA16XXX_DELAY_200MS, + MQTT_ONCHIP_DA16XXX_RETURN_TEXT_OK), + FSP_ERR_WIFI_FAILED); + + /* Create subscription command by concatenating topics */ + snprintf((char *) p_ctrl->cmd_tx_buff, sizeof(p_ctrl->cmd_tx_buff), "AT+NWMQTS=%d", subscription_count); + + for (int i = 0; i < (int) subscription_count; i++) + { + FSP_ERROR_RETURN((strlen((char *) p_ctrl->cmd_tx_buff) + strlen( + p_sub_info[i].p_topic_filter + 3)) < MQTT_ONCHIP_DA16XXX_CFG_CMD_TX_BUF_SIZE, + FSP_ERR_INVALID_DATA); + + snprintf((char *) p_ctrl->cmd_tx_buff + strlen((char *) p_ctrl->cmd_tx_buff), + sizeof(p_ctrl->cmd_tx_buff), + ",%s", + p_sub_info[i].p_topic_filter); + } + + snprintf((char *) p_ctrl->cmd_tx_buff + strlen((char *) p_ctrl->cmd_tx_buff), sizeof(p_ctrl->cmd_tx_buff), + "\r"); + + FSP_ERROR_RETURN(FSP_SUCCESS == + rm_wifi_onchip_da16xxx_at_command_send((char *) p_ctrl->cmd_tx_buff, p_ctrl->cmd_rx_buff, + sizeof(p_ctrl->cmd_rx_buff), + MQTT_ONCHIP_DA16XXX_TIMEOUT_400MS, + MQTT_ONCHIP_DA16XXX_DELAY_200MS, + MQTT_ONCHIP_DA16XXX_RETURN_TEXT_OK), + FSP_ERR_WIFI_FAILED); + } + else + { + return FSP_ERR_WIFI_FAILED; + } + + return FSP_SUCCESS; +} + +/*******************************************************************************************************************//** + * Unsubscribe from DA16XXX MQTT topics. + * + * @param[in] p_ctrl Pointer to MQTT Client instance control structure. + * @param[in] p_sub_info List of MQTT subscription info. + * + * @retval FSP_SUCCESS Function completed successfully. + * @retval FSP_ERR_WIFI_FAILED Error occurred with command to Wifi module. + * @retval FSP_ERR_ASSERTION The p_ctrl, p_sub_info is NULL. + * @retval FSP_ERR_NOT_OPEN The instance has not been opened or the client is not connected. + * @retval FSP_ERR_INVALID_DATA Data size is too large. + **********************************************************************************************************************/ +fsp_err_t RM_MQTT_DA16XXX_UnSubscribe (mqtt_onchip_da16xxx_instance_ctrl_t * p_ctrl, + mqtt_onchip_da16xxx_sub_info_t * const p_sub_info) +{ + /* Do parameter checking */ +#if (1 == MQTT_ONCHIP_DA16XXX_CFG_PARAM_CHECKING_ENABLED) + FSP_ASSERT(NULL != p_ctrl); + FSP_ASSERT(NULL != p_sub_info); + FSP_ERROR_RETURN(true == p_ctrl->is_mqtt_connected, FSP_ERR_NOT_OPEN); +#endif + + FSP_ERROR_RETURN((strlen((char *) p_ctrl->cmd_tx_buff) + strlen( + p_sub_info->p_topic_filter)) < MQTT_ONCHIP_DA16XXX_CFG_CMD_TX_BUF_SIZE, + FSP_ERR_INVALID_DATA); + + snprintf((char *) p_ctrl->cmd_tx_buff, sizeof(p_ctrl->cmd_tx_buff), "AT+NWMQUTS=%s\r", p_sub_info->p_topic_filter); + + FSP_ERROR_RETURN(FSP_SUCCESS == + rm_wifi_onchip_da16xxx_at_command_send((char *) p_ctrl->cmd_tx_buff, p_ctrl->cmd_rx_buff, + sizeof(p_ctrl->cmd_rx_buff), + MQTT_ONCHIP_DA16XXX_TIMEOUT_400MS, + MQTT_ONCHIP_DA16XXX_DELAY_200MS, + MQTT_ONCHIP_DA16XXX_RETURN_TEXT_OK), + FSP_ERR_WIFI_FAILED); + + return FSP_SUCCESS; +} + +/*******************************************************************************************************************//** + * Receive data subscribed to on DA16XXX MQTT Client service. + * + * @param[in] p_ctrl Pointer to MQTT Client instance control structure. + * @param[in] p_cfg Pointer to MQTT Client configuration structure. + * + * @retval FSP_SUCCESS Function completed successfully. + * @retval FSP_ERR_ASSERTION The p_ctrl, p_textstring, p_ip_addr is NULL. + * @retval FSP_ERR_NOT_OPEN The instance has not been opened or the client is not connected. + * @retval FSP_ERR_INVALID_DATA Receive function did not receive valid publish data. + **********************************************************************************************************************/ +fsp_err_t RM_MQTT_DA16XXX_Receive (mqtt_onchip_da16xxx_instance_ctrl_t * p_ctrl, + mqtt_onchip_da16xxx_cfg_t const * const p_cfg) +{ + mqtt_onchip_da16xxx_callback_args_t mqtt_data; + char * ptr = (char *) p_ctrl->cmd_rx_buff; + + /* Do parameter checking */ +#if (1 == MQTT_ONCHIP_DA16XXX_CFG_PARAM_CHECKING_ENABLED) + FSP_ASSERT(NULL != p_ctrl); + FSP_ERROR_RETURN(true == p_ctrl->is_mqtt_connected, FSP_ERR_NOT_OPEN); +#endif + + if (true == p_ctrl->is_mqtt_connected) + { + size_t xReceivedBytes = + rm_wifi_onchip_da16xxx_buffer_recv((char *) p_ctrl->cmd_rx_buff, + sizeof(p_ctrl->cmd_rx_buff) - 1, + p_ctrl->p_cfg->rx_timeout, + sizeof(p_ctrl->cmd_rx_buff)); + if (xReceivedBytes > 0) + { + char * p_end_of_message = (char *) &p_ctrl->cmd_rx_buff[xReceivedBytes]; + char * p_header = "\r\n+NWMQMSG:"; + uint32_t header_length = strlen(p_header); + uint8_t * p_data; + char * p_topic; + + /* Ensure that the end of MQTT buffer is NULL-terminated for string safety */ + *p_end_of_message = 0; + + /* Check for data remaining from stream buffer */ + while (ptr < p_end_of_message) + { + /* Check for published message string in the buffer e.g."\r\n+NWMQMSG:1,AHRenesas/feeds/led,4\0" */ + if (0 == (strncmp(ptr, p_header, header_length))) + { + /* Advance pointer past the header */ + ptr = ptr + header_length; + + /* Assign the data */ + p_data = (uint8_t *) ptr; + + /* Advance pointer to the topic */ + ptr = strchr(ptr, ','); + + /* Check that topic exists */ + FSP_ERROR_RETURN(NULL != ptr, FSP_ERR_INVALID_DATA); + + /* Replace comma with null termination */ + *ptr = 0; + + /* Increment past null terminator and assign topic */ + FSP_ERROR_RETURN(ptr < p_end_of_message, FSP_ERR_INVALID_DATA); + ptr++; + + /* Assign the topic */ + p_topic = ptr; + + /* Advance pointer to the length */ + ptr = strchr(ptr, ','); + + /* Check that length exists */ + FSP_ERROR_RETURN(NULL != ptr, FSP_ERR_INVALID_DATA); + + /* Replace comma with null termination */ + *ptr = 0; + + /* Increment past null terminator and parse length */ + FSP_ERROR_RETURN(ptr < p_end_of_message, FSP_ERR_INVALID_DATA); + ptr++; + + long int length = strtol(ptr, NULL, 10); + + FSP_ERROR_RETURN(0 != length, FSP_ERR_INVALID_DATA); + + /* If all checks were successful, assign temporary data to callback args */ + mqtt_data.p_data = p_data; + mqtt_data.p_topic = p_topic; + mqtt_data.data_length = (uint32_t) length; + + /* Call the user callback with successful data */ + p_cfg->p_callback(&mqtt_data); + } + else + { + ptr++; + } + } + } + } + + return FSP_SUCCESS; +} + +/*******************************************************************************************************************//** + * Close the DA16XXX MQTT Client service. + * + * @param[in] p_ctrl Pointer to MQTT Client instance control structure. + * + * @retval FSP_ERR_NOT_OPEN The instance has not been opened. + * @retval FSP_SUCCESS Function completed successfully. + * @retval FSP_ERR_ASSERTION The p_ctrl, p_textstring, p_ip_addr is NULL. + **********************************************************************************************************************/ +fsp_err_t RM_MQTT_DA16XXX_Close (mqtt_onchip_da16xxx_instance_ctrl_t * p_ctrl) +{ + /* Do parameter checking */ +#if (1 == MQTT_ONCHIP_DA16XXX_CFG_PARAM_CHECKING_ENABLED) + FSP_ASSERT(NULL != p_ctrl); + FSP_ERROR_RETURN(MQTT_OPEN == p_ctrl->open, FSP_ERR_NOT_OPEN); +#endif + + snprintf((char *) p_ctrl->cmd_tx_buff, sizeof(p_ctrl->cmd_tx_buff), "AT+NWMQDEL\r"); + + rm_wifi_onchip_da16xxx_at_command_send((char *) p_ctrl->cmd_tx_buff, + p_ctrl->cmd_rx_buff, + sizeof(p_ctrl->cmd_rx_buff), + MQTT_ONCHIP_DA16XXX_TIMEOUT_400MS, + MQTT_ONCHIP_DA16XXX_DELAY_200MS, + MQTT_ONCHIP_DA16XXX_RETURN_TEXT_OK); + + p_ctrl->open = MQTT_CLOSED; + + return FSP_SUCCESS; +} + +/*******************************************************************************************************************//** + * @} (end addtogroup MQTT_ONCHIP_DA16XXX) + **********************************************************************************************************************/ + +/*******************************************************************************************************************//** + * Optional configurations for DA16XXX MQTT Client service. + * + * @param[in] p_ctrl Pointer to MQTT Client instance control structure. + * @param[in] p_cfg Pointer to MQTT Client configuration structure. + * + * @retval FSP_SUCCESS Function completed successfully. + * @retval FSP_ERR_WIFI_FAILED Error occurred with command to Wifi module. + **********************************************************************************************************************/ +static fsp_err_t rm_mqtt_da16xxx_optional_init (mqtt_onchip_da16xxx_instance_ctrl_t * p_ctrl, + mqtt_onchip_da16xxx_cfg_t const * const p_cfg) +{ + /* Set MQTT ALPN settings */ + if (p_cfg->alpn_count != 0) + { + /* Set up ALPN protocol and count packet */ + snprintf((char *) p_ctrl->cmd_tx_buff, sizeof(p_ctrl->cmd_tx_buff), "AT+NWMQALPN=%d", p_cfg->alpn_count); + + for (int i = 0; i < p_cfg->alpn_count; i++) + { + snprintf((char *) p_ctrl->cmd_tx_buff + strlen((char *) p_ctrl->cmd_tx_buff), + sizeof(p_ctrl->cmd_tx_buff), + ",%s", + p_cfg->p_alpns[i]); + } + + snprintf((char *) p_ctrl->cmd_tx_buff + strlen((char *) p_ctrl->cmd_tx_buff), sizeof(p_ctrl->cmd_tx_buff), + "\r"); + + FSP_ERROR_RETURN(FSP_SUCCESS == + rm_wifi_onchip_da16xxx_at_command_send((char *) p_ctrl->cmd_tx_buff, p_ctrl->cmd_rx_buff, + sizeof(p_ctrl->cmd_rx_buff), + MQTT_ONCHIP_DA16XXX_TIMEOUT_400MS, + MQTT_ONCHIP_DA16XXX_DELAY_200MS, + MQTT_ONCHIP_DA16XXX_RETURN_TEXT_OK), + FSP_ERR_WIFI_FAILED); + } + + /* Set MQTT TLS Cipher Suite settings */ + if (p_cfg->tls_cipher_count > 0) + { + strncpy((char *) p_ctrl->cmd_tx_buff, "AT+NWMQCSUIT=", sizeof(p_ctrl->cmd_tx_buff)); + + for (int i = 0; i < p_cfg->tls_cipher_count; i++) + { + snprintf((char *) p_ctrl->cmd_tx_buff + strlen((char *) p_ctrl->cmd_tx_buff), + sizeof(p_ctrl->cmd_tx_buff), + "%x,", + p_cfg->p_tls_cipher_suites[i]); + } + + snprintf((char *) p_ctrl->cmd_tx_buff + strlen((char *) p_ctrl->cmd_tx_buff) - 1, + sizeof(p_ctrl->cmd_tx_buff), + "\r"); + + FSP_ERROR_RETURN(FSP_SUCCESS == + rm_wifi_onchip_da16xxx_at_command_send((char *) p_ctrl->cmd_tx_buff, p_ctrl->cmd_rx_buff, + sizeof(p_ctrl->cmd_rx_buff), + MQTT_ONCHIP_DA16XXX_TIMEOUT_400MS, + MQTT_ONCHIP_DA16XXX_DELAY_200MS, + MQTT_ONCHIP_DA16XXX_RETURN_TEXT_OK), + FSP_ERR_WIFI_FAILED); + } + + /* Set MQTT SNI settings */ + if ((NULL != p_cfg->p_sni_name) && (sizeof(p_cfg->p_sni_name) < MQTT_ONCHIP_DA16XXX_MAX_SNI_LEN)) + { + snprintf((char *) p_ctrl->cmd_tx_buff, sizeof(p_ctrl->cmd_tx_buff), "AT+NWMQSNI=%s\r", p_cfg->p_sni_name); + + FSP_ERROR_RETURN(FSP_SUCCESS == + rm_wifi_onchip_da16xxx_at_command_send((char *) p_ctrl->cmd_tx_buff, p_ctrl->cmd_rx_buff, + sizeof(p_ctrl->cmd_rx_buff), + MQTT_ONCHIP_DA16XXX_TIMEOUT_400MS, + MQTT_ONCHIP_DA16XXX_DELAY_200MS, + MQTT_ONCHIP_DA16XXX_RETURN_TEXT_OK), + FSP_ERR_WIFI_FAILED); + } + + /* Set MQTT Clean Session settings */ + if (0 == p_cfg->clean_session) + { + snprintf((char *) p_ctrl->cmd_tx_buff, sizeof(p_ctrl->cmd_tx_buff), "AT+NWMQCS=0\r"); + + FSP_ERROR_RETURN(FSP_SUCCESS == + rm_wifi_onchip_da16xxx_at_command_send((char *) p_ctrl->cmd_tx_buff, p_ctrl->cmd_rx_buff, + sizeof(p_ctrl->cmd_rx_buff), + MQTT_ONCHIP_DA16XXX_TIMEOUT_400MS, + MQTT_ONCHIP_DA16XXX_DELAY_200MS, + MQTT_ONCHIP_DA16XXX_RETURN_TEXT_OK), + FSP_ERR_WIFI_FAILED); + } + + /* Set MQTT Client Identifier settings */ + if (0 != p_cfg->client_identifier_length) + { + snprintf((char *) p_ctrl->cmd_tx_buff, + sizeof(p_ctrl->cmd_tx_buff), + "AT+NWMQCID=%s\r", + p_cfg->p_client_identifier); + + FSP_ERROR_RETURN(FSP_SUCCESS == + rm_wifi_onchip_da16xxx_at_command_send((char *) p_ctrl->cmd_tx_buff, p_ctrl->cmd_rx_buff, + sizeof(p_ctrl->cmd_rx_buff), + MQTT_ONCHIP_DA16XXX_TIMEOUT_400MS, + MQTT_ONCHIP_DA16XXX_DELAY_200MS, + MQTT_ONCHIP_DA16XXX_RETURN_TEXT_OK), + FSP_ERR_WIFI_FAILED); + } + + /* Set MQTT Last Will settings */ + if (NULL != p_cfg->p_will_topic) + { + snprintf((char *) p_ctrl->cmd_tx_buff, + sizeof(p_ctrl->cmd_tx_buff), + "AT+NWMQWILL=%s,%s,%d\r", + p_cfg->p_will_topic, + p_cfg->p_will_msg, + p_cfg->will_qos_level); + + FSP_ERROR_RETURN(FSP_SUCCESS == + rm_wifi_onchip_da16xxx_at_command_send((char *) p_ctrl->cmd_tx_buff, p_ctrl->cmd_rx_buff, + sizeof(p_ctrl->cmd_rx_buff), + MQTT_ONCHIP_DA16XXX_TIMEOUT_400MS, + MQTT_ONCHIP_DA16XXX_DELAY_200MS, + MQTT_ONCHIP_DA16XXX_RETURN_TEXT_OK), + FSP_ERR_WIFI_FAILED); + } + + return FSP_SUCCESS; +} diff --git a/ra/fsp/src/rm_netx_secure_crypto/inc/rm_netx_secure_crypto.h b/ra/fsp/src/rm_netx_secure_crypto/inc/rm_netx_secure_crypto.h index 8a6aa079e..b6ba2e597 100644 --- a/ra/fsp/src/rm_netx_secure_crypto/inc/rm_netx_secure_crypto.h +++ b/ra/fsp/src/rm_netx_secure_crypto/inc/rm_netx_secure_crypto.h @@ -149,6 +149,23 @@ UINT sce_nx_crypto_gcm_decrypt_update(NX_CRYPTO_AES * aes_ctx, UCHAR * input, UC UINT sce_nx_crypto_gcm_encrypt_calculate(NX_CRYPTO_AES * aes_ctx, UCHAR * bit_size, UINT icv_len, UCHAR * tag); UINT sce_nx_crypto_gcm_decrypt_calculate(NX_CRYPTO_AES * aes_ctx, UCHAR * bit_size, UINT icv_len, UCHAR * tag); +UINT sce_nx_crypto_ccm_encrypt_init (NX_CRYPTO_AES * aes_ctx, + VOID * additional_data, + UINT additional_len, + UINT length, + UCHAR * iv, + USHORT icv_len, + USHORT block_size); +UINT sce_nx_crypto_ccm_encrypt_update (NX_CRYPTO_AES * aes_ctx, UCHAR * input, UCHAR * output, UINT length); +UINT sce_nx_crypto_ccm_encrypt_final (NX_CRYPTO_AES * aes_ctx, UCHAR * output); +UINT sce_nx_crypto_ccm_decrypt_init (NX_CRYPTO_AES * crypto_metadata, NX_CRYPTO_CCM * ccm_metadata, + VOID * additional_data, UINT additional_len, + UINT length, UCHAR * iv, USHORT icv_len, USHORT block_size); +UINT sce_nx_crypto_ccm_decrypt_update (NX_CRYPTO_AES * crypto_metadata, UCHAR * input, UCHAR * output, + UINT length, UINT block_size); +UINT sce_nx_crypto_ccm_decrypt_final (NX_CRYPTO_AES * crypto_metadata, NX_CRYPTO_CCM * ccm_metadata, + UCHAR * icv, UINT block_size); + /* TRNG */ int rand(void); void srand(unsigned int seed); diff --git a/ra/fsp/src/rm_netx_secure_crypto/nx_crypto_aes_alt.c b/ra/fsp/src/rm_netx_secure_crypto/nx_crypto_aes_alt.c index efa50c7b7..ca20ad8a0 100644 --- a/ra/fsp/src/rm_netx_secure_crypto/nx_crypto_aes_alt.c +++ b/ra/fsp/src/rm_netx_secure_crypto/nx_crypto_aes_alt.c @@ -2307,7 +2307,36 @@ UINT status; status = NX_CRYPTO_INVALID_BUFFER_SIZE; break; } +#if (1U == NETX_SECURE_CRYPTO_NX_CRYPTO_METHODS_AES_ALT) && ((1U == BSP_FEATURE_CRYPTO_HAS_SCE9) || \ + (1U == BSP_FEATURE_CRYPTO_HAS_SCE5) || (1U == BSP_FEATURE_CRYPTO_HAS_SCE5B) || \ + (1U == BSP_FEATURE_CRYPTO_HAS_SCE7)) + status = sce_nx_crypto_ccm_decrypt_init(ctx, &(ctx -> nx_crypto_aes_mode_context.ccm), + ctx -> nx_crypto_aes_mode_context.ccm.nx_crypto_ccm_additional_data, + ctx -> nx_crypto_aes_mode_context.ccm.nx_crypto_ccm_additional_data_len, + input_length_in_byte - (method -> nx_crypto_ICV_size_in_bits >> 3), iv_ptr, + (UCHAR)(method -> nx_crypto_ICV_size_in_bits >> 3), + NX_CRYPTO_AES_BLOCK_SIZE); + if (status) + { + break; + } + + status = sce_nx_crypto_ccm_decrypt_update(ctx, input, output, + input_length_in_byte - (method -> nx_crypto_ICV_size_in_bits >> 3), + NX_CRYPTO_AES_BLOCK_SIZE); + if (status) + { + break; + } + status = sce_nx_crypto_ccm_decrypt_final(ctx, &(ctx -> nx_crypto_aes_mode_context.ccm), + input + input_length_in_byte - (method -> nx_crypto_ICV_size_in_bits >> 3), + NX_CRYPTO_AES_BLOCK_SIZE); + if (status) + { + break; + } +#else status = _nx_crypto_ccm_decrypt_init(ctx, &(ctx -> nx_crypto_aes_mode_context.ccm), (UINT (*)(VOID *, UCHAR *, UCHAR *, UINT))_nx_crypto_aes_encrypt, ctx -> nx_crypto_aes_mode_context.ccm.nx_crypto_ccm_additional_data, @@ -2335,10 +2364,12 @@ UINT status; (UINT (*)(VOID *, UCHAR *, UCHAR *, UINT))_nx_crypto_aes_encrypt, input + input_length_in_byte - (method -> nx_crypto_ICV_size_in_bits >> 3), NX_CRYPTO_AES_BLOCK_SIZE); + if (status) { break; } +#endif } break; case NX_CRYPTO_ENCRYPT: @@ -2409,7 +2440,17 @@ UINT status; status = NX_CRYPTO_PTR_ERROR; break; } - +#if (1U == NETX_SECURE_CRYPTO_NX_CRYPTO_METHODS_AES_ALT) && ((1U == BSP_FEATURE_CRYPTO_HAS_SCE9) || \ + (1U == BSP_FEATURE_CRYPTO_HAS_SCE5) || (1U == BSP_FEATURE_CRYPTO_HAS_SCE5B) || \ + (1U == BSP_FEATURE_CRYPTO_HAS_SCE7)) + status = sce_nx_crypto_ccm_decrypt_init(ctx, &(ctx -> nx_crypto_aes_mode_context.ccm), + input, /* pointers to AAD */ + input_length_in_byte, /* length of AAD */ + output_length_in_byte, /* total length of message */ + iv_ptr, + (UCHAR)(method -> nx_crypto_ICV_size_in_bits >> 3), + NX_CRYPTO_AES_BLOCK_SIZE); +#else status = _nx_crypto_ccm_decrypt_init(ctx, &(ctx -> nx_crypto_aes_mode_context.ccm), (UINT (*)(VOID *, UCHAR *, UCHAR *, UINT))_nx_crypto_aes_encrypt, input, /* pointers to AAD */ @@ -2418,23 +2459,37 @@ UINT status; iv_ptr, (UCHAR)(method -> nx_crypto_ICV_size_in_bits >> 3), NX_CRYPTO_AES_BLOCK_SIZE); +#endif } break; case NX_CRYPTO_DECRYPT_UPDATE: { +#if (1U == NETX_SECURE_CRYPTO_NX_CRYPTO_METHODS_AES_ALT) && ((1U == BSP_FEATURE_CRYPTO_HAS_SCE9) || \ + (1U == BSP_FEATURE_CRYPTO_HAS_SCE5) || (1U == BSP_FEATURE_CRYPTO_HAS_SCE5B) || \ + (1U == BSP_FEATURE_CRYPTO_HAS_SCE7)) + status = sce_nx_crypto_ccm_decrypt_update(ctx, input, output, input_length_in_byte, + NX_CRYPTO_AES_BLOCK_SIZE); +#else status = _nx_crypto_ccm_decrypt_update(NX_CRYPTO_DECRYPT_UPDATE, ctx, &(ctx -> nx_crypto_aes_mode_context.ccm), (UINT (*)(VOID *, UCHAR *, UCHAR *, UINT))_nx_crypto_aes_encrypt, input, output, input_length_in_byte, NX_CRYPTO_AES_BLOCK_SIZE); - +#endif } break; case NX_CRYPTO_DECRYPT_CALCULATE: { +#if (1U == NETX_SECURE_CRYPTO_NX_CRYPTO_METHODS_AES_ALT) && ((1U == BSP_FEATURE_CRYPTO_HAS_SCE9) || \ + (1U == BSP_FEATURE_CRYPTO_HAS_SCE5) || (1U == BSP_FEATURE_CRYPTO_HAS_SCE5B) || \ + (1U == BSP_FEATURE_CRYPTO_HAS_SCE7)) + status = sce_nx_crypto_ccm_decrypt_final(ctx, &(ctx -> nx_crypto_aes_mode_context.ccm), + input, NX_CRYPTO_AES_BLOCK_SIZE); +#else status = _nx_crypto_ccm_decrypt_calculate(ctx, &(ctx -> nx_crypto_aes_mode_context.ccm), (UINT (*)(VOID *, UCHAR *, UCHAR *, UINT))_nx_crypto_aes_encrypt, input, NX_CRYPTO_AES_BLOCK_SIZE); +#endif } break; case NX_CRYPTO_ENCRYPT_INITIALIZE: diff --git a/ra/fsp/src/rm_netx_secure_crypto/nx_crypto_ccm_alt.c b/ra/fsp/src/rm_netx_secure_crypto/nx_crypto_ccm_alt.c new file mode 100644 index 000000000..02b1ed510 --- /dev/null +++ b/ra/fsp/src/rm_netx_secure_crypto/nx_crypto_ccm_alt.c @@ -0,0 +1,670 @@ +/**************************************************************************/ +/* */ +/* Copyright (c) Microsoft Corporation. All rights reserved. */ +/* */ +/* This software is licensed under the Microsoft Software License */ +/* Terms for Microsoft Azure RTOS. Full text of the license can be */ +/* found in the LICENSE file at https://aka.ms/AzureRTOS_EULA */ +/* and in the root directory of this software. */ +/* */ +/**************************************************************************/ + + +/**************************************************************************/ +/**************************************************************************/ +/** */ +/** NetX Crypto Component */ +/** */ +/** CCM Mode */ +/** */ +/**************************************************************************/ +/**************************************************************************/ +#include "rm_netx_secure_crypto_cfg.h" +#include "rm_netx_secure_crypto.h" +#include "nx_crypto_ccm.h" + +#if (0U == NETX_SECURE_CRYPTO_NX_CRYPTO_METHODS_AES_ALT) && ((0U == BSP_FEATURE_CRYPTO_HAS_SCE9) || \ + (0U == BSP_FEATURE_CRYPTO_HAS_SCE5) || (0U == BSP_FEATURE_CRYPTO_HAS_SCE5B) || \ + (0U == BSP_FEATURE_CRYPTO_HAS_SCE7)) +/**************************************************************************/ +/* */ +/* FUNCTION RELEASE */ +/* */ +/* _nx_crypto_ccm_xor PORTABLE C */ +/* 6.1 */ +/* AUTHOR */ +/* */ +/* Timothy Stapko, Microsoft Corporation */ +/* */ +/* DESCRIPTION */ +/* */ +/* This function performs XOR operation on the output buffer. */ +/* */ +/* INPUT */ +/* */ +/* plaintext Pointer to input plantext */ +/* key Value to be xor'ed */ +/* ciphertext Output buffer of 16 bytes */ +/* */ +/* OUTPUT */ +/* */ +/* None */ +/* */ +/* CALLS */ +/* */ +/* None */ +/* */ +/* CALLED BY */ +/* */ +/* _nx_crypto_ccm_cbc_pad Compute CBC-MAC value with */ +/* padding for CCM mode */ +/* */ +/* RELEASE HISTORY */ +/* */ +/* DATE NAME DESCRIPTION */ +/* */ +/* 05-19-2020 Timothy Stapko Initial Version 6.0 */ +/* 09-30-2020 Timothy Stapko Modified comment(s), disabled */ +/* unaligned access by default,*/ +/* resulting in version 6.1 */ +/* */ +/**************************************************************************/ +NX_CRYPTO_KEEP static VOID _nx_crypto_ccm_xor(UCHAR *plaintext, UCHAR *key, UCHAR *ciphertext) +{ +#ifdef NX_CRYPTO_ENABLE_UNALIGNED_ACCESS +UINT *p = (UINT *)plaintext; +UINT *c = (UINT *)ciphertext; +UINT *k = (UINT *)key; + + c[0] = p[0] ^ k[0]; + c[1] = p[1] ^ k[1]; + c[2] = p[2] ^ k[2]; + c[3] = p[3] ^ k[3]; +#else + ciphertext[0] = plaintext[0] ^ key[0]; + ciphertext[1] = plaintext[1] ^ key[1]; + ciphertext[2] = plaintext[2] ^ key[2]; + ciphertext[3] = plaintext[3] ^ key[3]; + ciphertext[4] = plaintext[4] ^ key[4]; + ciphertext[5] = plaintext[5] ^ key[5]; + ciphertext[6] = plaintext[6] ^ key[6]; + ciphertext[7] = plaintext[7] ^ key[7]; + ciphertext[8] = plaintext[8] ^ key[8]; + ciphertext[9] = plaintext[9] ^ key[9]; + ciphertext[10] = plaintext[10] ^ key[10]; + ciphertext[11] = plaintext[11] ^ key[11]; + ciphertext[12] = plaintext[12] ^ key[12]; + ciphertext[13] = plaintext[13] ^ key[13]; + ciphertext[14] = plaintext[14] ^ key[14]; + ciphertext[15] = plaintext[15] ^ key[15]; +#endif +} + +/**************************************************************************/ +/* */ +/* FUNCTION RELEASE */ +/* */ +/* _nx_crypto_ccm_cbc_pad PORTABLE C */ +/* 6.1 */ +/* AUTHOR */ +/* */ +/* Timothy Stapko, Microsoft Corporation */ +/* */ +/* DESCRIPTION */ +/* */ +/* This function compute CBC-MAC value with padding for CCM mode. */ +/* */ +/* INPUT */ +/* */ +/* crypto_metadata Pointer to crypto metadata */ +/* crypto_function Pointer to crypto function */ +/* input Pointer to clear text input */ +/* output Pointer to encrypted output */ +/* The output is the last */ +/* 16 bytes cipher. */ +/* length Length of the input message. */ +/* iv Initial Vector */ +/* block_size Block size */ +/* */ +/* OUTPUT */ +/* */ +/* status Completion status */ +/* */ +/* CALLS */ +/* */ +/* _nx_crypto_ccm_xor Perform CCM XOR operation */ +/* */ +/* CALLED BY */ +/* */ +/* _nx_crypto_ccm_authentication Perform CCM authentication */ +/* */ +/* RELEASE HISTORY */ +/* */ +/* DATE NAME DESCRIPTION */ +/* */ +/* 05-19-2020 Timothy Stapko Initial Version 6.0 */ +/* 09-30-2020 Timothy Stapko Modified comment(s), */ +/* verified memcpy use cases, */ +/* resulting in version 6.1 */ +/* */ +/**************************************************************************/ +NX_CRYPTO_KEEP static VOID _nx_crypto_ccm_cbc_pad(VOID *crypto_metadata, + UINT (*crypto_function)(VOID *, UCHAR *, UCHAR *, UINT), + UCHAR *input, UCHAR *output, UINT length, UCHAR *iv, UINT block_size) +{ +UINT i = 0; +UCHAR last_cipher[NX_CRYPTO_CCM_BLOCK_SIZE]; + + NX_CRYPTO_MEMCPY(last_cipher, iv, block_size); /* Use case of memcpy is verified. */ + for (i = 0; i < length; i += block_size) + { + + /* XOR */ + if ((length - i) < block_size) + { + + /* If the length of this block is less than block size, pad it with zero. */ + NX_CRYPTO_MEMCPY(output, input + i, length - i); /* Use case of memcpy is verified. */ + NX_CRYPTO_MEMSET(output + length - i, 0, block_size - (length - i)); + _nx_crypto_ccm_xor(output, last_cipher, output); + } + else + { + _nx_crypto_ccm_xor(input + i, last_cipher, output); + } + + /* Encrypt the block. */ + crypto_function(crypto_metadata, output, last_cipher, block_size); + } + + /* Return last block of the cipher. */ + NX_CRYPTO_MEMCPY(output, last_cipher, block_size); /* Use case of memcpy is verified. */ + +#ifdef NX_SECURE_KEY_CLEAR + NX_CRYPTO_MEMSET(last_cipher, 0, sizeof(last_cipher)); +#endif /* NX_SECURE_KEY_CLEAR */ +} + +NX_CRYPTO_KEEP static VOID _nx_crypto_ccm_authentication_init(VOID *crypto_metadata, + UINT (*crypto_function)(VOID *, UCHAR *, UCHAR *, UINT), + UCHAR *a_data, UINT a_len, UINT m_len, + UCHAR *X, UCHAR *Nonce, UCHAR L, + USHORT M, UINT block_size) +{ +UCHAR Flags = 0; +UCHAR B[NX_CRYPTO_CCM_BLOCK_SIZE]; +UCHAR temp_len = 0; + + NX_CRYPTO_MEMSET(B, 0, NX_CRYPTO_CCM_BLOCK_SIZE); + NX_CRYPTO_MEMSET(X, 0, NX_CRYPTO_CCM_BLOCK_SIZE); + + /* AddAuthData: Right-concatenate the l(a) with the string a, + and pad it with zero so that the AddAuthData has length divisible by 16. */ + /* PlaintextData: Pad string m with zero so that the PlaintextData has length divisible by 16. */ + /* AuthData = AddAuthData||PlaintextData. */ + /* Parse the AuthData as B(1)||B(2)||...||B(t), where the block B(i) is a 16-bytes string. */ + + /* CBC-MAC value X(i + 1) = E(Key, X(i) ^ B(i)), for i = 0, 1,..., t. */ + + /* Create Flag for B(0). */ + if (a_len > 0) + { + Flags = 1 << 6; + } + else + { + Flags = 0; + } + Flags |= (UCHAR)(((M - 2) >> 1) << 3); + Flags |= (UCHAR)(L - 1); + + /* B(0) = Flags||Nonce||l(m) */ + B[0] = Flags; + NX_CRYPTO_MEMCPY(B + 1, Nonce, (UINT)15 - L); /* Use case of memcpy is verified. */ + B[14] = (UCHAR)(m_len >> 8); + B[15] = (UCHAR)(m_len); + + /* Get the CBC-MAC value X(1). */ + _nx_crypto_ccm_cbc_pad(crypto_metadata, crypto_function, B, X, block_size, X, block_size); + + /* B(1) = 2 bytes l(a) + leftmost 14 bytes of string a. */ + B[0] = (UCHAR)(a_len >> 8); + B[1] = (UCHAR)(a_len); + + /* If the length of string a is less than 14, pad B(1) with 0. */ + temp_len = (UCHAR)((a_len > (block_size - 2)) ? (block_size - 2) : a_len); + NX_CRYPTO_MEMCPY(B + 2, a_data, (UINT)temp_len); /* Use case of memcpy is verified. */ + + /* Get the CBC-MAC value X(2). */ + _nx_crypto_ccm_cbc_pad(crypto_metadata, crypto_function, B, X, (UINT)(temp_len + 2), X, block_size); + + /* Get the CBC-MAC value X(i), for i = 3,...,t + 1. */ + if (a_len > (block_size - 2)) + { + _nx_crypto_ccm_cbc_pad(crypto_metadata, crypto_function, a_data + block_size - 2, X, a_len - (block_size - 2), X, block_size); + } + +#ifdef NX_SECURE_KEY_CLEAR + NX_CRYPTO_MEMSET(B, 0, sizeof(B)); +#endif /* NX_SECURE_KEY_CLEAR */ +} +#endif +/**************************************************************************/ +/* */ +/* FUNCTION RELEASE */ +/* */ +/* _nx_crypto_ccm_encrypt_init PORTABLE C */ +/* 6.1 */ +/* AUTHOR */ +/* */ +/* Timothy Stapko, Microsoft Corporation */ +/* */ +/* DESCRIPTION */ +/* */ +/* This function initialize the CCM mode for encryption. */ +/* */ +/* Note, the first byte of iv represents the length of IV excluding its*/ +/* first byte. For example, 0x0401020304 indicates the length of IV is */ +/* 4 bytes and the content of IV is 0x01020304. */ +/* */ +/* INPUT */ +/* */ +/* crypto_metadata Pointer to crypto metadata */ +/* ccm_metadata Pointer to CCM metadata */ +/* crypto_function Pointer to crypto function */ +/* additional_data Pointer to additional data */ +/* additional_len Length of additional data */ +/* length Total length of plain/cipher */ +/* iv Pointer to Initial Vector */ +/* icv_len Length of TAG */ +/* block_size Block size of crypto algorithm*/ +/* */ +/* OUTPUT */ +/* */ +/* status */ +/* */ +/* CALLS */ +/* */ +/* _nx_crypto_ccm_authentication_init Initialize authentication */ +/* */ +/* CALLED BY */ +/* */ +/* _nx_crypto_method_aes_ccm_operation Handle AES encrypt or decrypt */ +/* */ +/* RELEASE HISTORY */ +/* */ +/* DATE NAME DESCRIPTION */ +/* */ +/* 05-19-2020 Timothy Stapko Initial Version 6.0 */ +/* 09-30-2020 Timothy Stapko Modified comment(s), */ +/* verified memcpy use cases, */ +/* resulting in version 6.1 */ +/* */ +/**************************************************************************/ +NX_CRYPTO_KEEP UINT _nx_crypto_ccm_encrypt_init(VOID *crypto_metadata, NX_CRYPTO_CCM *ccm_metadata, + UINT (*crypto_function)(VOID *, UCHAR *, UCHAR *, UINT), + VOID *additional_data, UINT additional_len, + UINT length, UCHAR *iv, USHORT icv_len, USHORT block_size) +{ +#if (1U == NETX_SECURE_CRYPTO_NX_CRYPTO_METHODS_AES_ALT) && ((1U == BSP_FEATURE_CRYPTO_HAS_SCE9) || \ + (1U == BSP_FEATURE_CRYPTO_HAS_SCE5) || (1U == BSP_FEATURE_CRYPTO_HAS_SCE5B) || \ + (1U == BSP_FEATURE_CRYPTO_HAS_SCE7)) + NX_CRYPTO_PARAMETER_NOT_USED(ccm_metadata); + NX_CRYPTO_PARAMETER_NOT_USED(crypto_function); + + UINT ret = sce_nx_crypto_ccm_encrypt_init((NX_CRYPTO_AES *) crypto_metadata, + additional_data, /* pointers to AAD */ + additional_len, /* length of AAD */ + length, /* total length of message */ + iv, + icv_len, + block_size); + if (NX_CRYPTO_SUCCESS != ret) + { + return ret; + } +#else +UCHAR L = (UCHAR)(15 - iv[0]); +UCHAR *Nonce = iv + 1; + +UCHAR Flags = 0; +UCHAR *A = ccm_metadata -> nx_crypto_ccm_A; + + /* Check the block size. */ + /* Accroding to RFC 3610, valid values of L range between 2 octets and 8 octets, iv[0] range between 7 octets and 13 octets. */ + if (block_size != NX_CRYPTO_CCM_BLOCK_SIZE || iv[0] > 13 || iv[0] < 7) + { + return(NX_CRYPTO_PTR_ERROR); + } + + ccm_metadata -> nx_crypto_ccm_icv_length = icv_len; + + /* Data authentication. */ + if (icv_len > 0) + { + + /* Compute authentication tag T. */ + _nx_crypto_ccm_authentication_init(crypto_metadata, crypto_function, + (UCHAR *)additional_data, additional_len, length, + ccm_metadata -> nx_crypto_ccm_X, + Nonce, L, icv_len, block_size); + } + + NX_CRYPTO_MEMSET(A, 0, sizeof(ccm_metadata -> nx_crypto_ccm_A)); + + /* Create A(i) = Flags||Nonce||Counter i, for i = 0, 1, 2,.... */ + Flags = (UCHAR)(L - 1); + A[0] = Flags; + NX_CRYPTO_MEMCPY(A + 1, Nonce, (UINT)(15 - L)); /* Use case of memcpy is verified. */ +#endif + return(NX_CRYPTO_SUCCESS); +} + +/**************************************************************************/ +/* */ +/* FUNCTION RELEASE */ +/* */ +/* _nx_crypto_ccm_encrypt_update PORTABLE C */ +/* 6.1 */ +/* AUTHOR */ +/* */ +/* Timothy Stapko, Microsoft Corporation */ +/* */ +/* DESCRIPTION */ +/* */ +/* This function updates data for GCM encryption or decryption. */ +/* */ +/* INPUT */ +/* */ +/* crypto_metadata Pointer to crypto metadata */ +/* ccm_metadata Pointer to CCM metadata */ +/* crypto_function Pointer to crypto function */ +/* input Pointer to bytes of input */ +/* output Pointer to output buffer */ +/* length Length of bytes of input */ +/* block_size Block size of crypto algorithm*/ +/* */ +/* OUTPUT */ +/* */ +/* status */ +/* */ +/* CALLS */ +/* */ +/* _nx_crypto_ccm_cbc_pad Update data for CCM mode */ +/* */ +/* CALLED BY */ +/* */ +/* _nx_crypto_method_aes_ccm_operation Handle AES encrypt or decrypt */ +/* */ +/* RELEASE HISTORY */ +/* */ +/* DATE NAME DESCRIPTION */ +/* */ +/* 05-19-2020 Timothy Stapko Initial Version 6.0 */ +/* 09-30-2020 Timothy Stapko Modified comment(s), */ +/* resulting in version 6.1 */ +/* */ +/**************************************************************************/ +NX_CRYPTO_KEEP UINT _nx_crypto_ccm_encrypt_update(UINT op, VOID *crypto_metadata, NX_CRYPTO_CCM *ccm_metadata, + UINT (*crypto_function)(VOID *, UCHAR *, UCHAR *, UINT), + UCHAR *input, UCHAR *output, UINT length, UINT block_size) +{ +#if (1U == NETX_SECURE_CRYPTO_NX_CRYPTO_METHODS_AES_ALT) && ((1U == BSP_FEATURE_CRYPTO_HAS_SCE9) || \ + (1U == BSP_FEATURE_CRYPTO_HAS_SCE5) || (1U == BSP_FEATURE_CRYPTO_HAS_SCE5B) || \ + (1U == BSP_FEATURE_CRYPTO_HAS_SCE7)) + NX_CRYPTO_PARAMETER_NOT_USED(op); + NX_CRYPTO_PARAMETER_NOT_USED(ccm_metadata); + NX_CRYPTO_PARAMETER_NOT_USED(crypto_function); + + /* Check the block size. */ + if (block_size != NX_CRYPTO_CCM_BLOCK_SIZE) + { + return(NX_CRYPTO_PTR_ERROR); + } + + UINT ret = sce_nx_crypto_ccm_encrypt_update ((NX_CRYPTO_AES *)crypto_metadata, input, output, length); + + return ret; +#else +UCHAR *A = ccm_metadata -> nx_crypto_ccm_A; +UCHAR X[NX_CRYPTO_CCM_BLOCK_SIZE]; +UINT i = 0, k = 0; + + /* Check the block size. */ + if (block_size != NX_CRYPTO_CCM_BLOCK_SIZE) + { + return(NX_CRYPTO_PTR_ERROR); + } + + if (op == NX_CRYPTO_ENCRYPT_UPDATE) + { + + /* Data authentication. */ + if (ccm_metadata -> nx_crypto_ccm_icv_length > 0) + { + + /* Compute authentication tag T. */ + _nx_crypto_ccm_cbc_pad(crypto_metadata, crypto_function, input, + ccm_metadata -> nx_crypto_ccm_X, length, + ccm_metadata -> nx_crypto_ccm_X, block_size); + } + } + + /* Data encryption. */ + if (length > 0) + { + + /* Parse the plain text as M(1)||M(2)||..., where the block M(i) is a 16-byte string. */ + /* Cipher text block: C(i) = E(Key, A(i)) ^ M(i) */ + for (i = 0; i < length; i += block_size) + { + A[15] = (UCHAR)(A[15] + 1); + crypto_function(crypto_metadata, A, X, block_size); + + for (k = 0; (k < block_size) && ((i + k) < length); k++) + { + output[i + k] = X[k] ^ input[i + k]; + } + } + } + + if (op == NX_CRYPTO_DECRYPT_UPDATE) + { + + /* Data authentication. */ + if (ccm_metadata -> nx_crypto_ccm_icv_length > 0) + { + + /* Compute authentication tag T. */ + _nx_crypto_ccm_cbc_pad(crypto_metadata, crypto_function, output, + ccm_metadata -> nx_crypto_ccm_X, length, + ccm_metadata -> nx_crypto_ccm_X, block_size); + } + } + +#ifdef NX_SECURE_KEY_CLEAR + NX_CRYPTO_MEMSET(X, 0, sizeof(X)); +#endif + + return(NX_CRYPTO_SUCCESS); +#endif +} + +/**************************************************************************/ +/* */ +/* FUNCTION RELEASE */ +/* */ +/* _nx_crypto_ccm_encrypt_calculate PORTABLE C */ +/* 6.1 */ +/* AUTHOR */ +/* */ +/* Timothy Stapko, Microsoft Corporation */ +/* */ +/* DESCRIPTION */ +/* */ +/* This function calculates TAG for CCM mode. */ +/* */ +/* INPUT */ +/* */ +/* crypto_metadata Pointer to crypto metadata */ +/* gcm_metadata Pointer to GCM metadata */ +/* crypto_function Pointer to crypto function */ +/* icv Pointer to TAG buffer */ +/* block_size Block size of crypto algorithm*/ +/* */ +/* OUTPUT */ +/* */ +/* status */ +/* */ +/* CALLS */ +/* */ +/* None */ +/* */ +/* CALLED BY */ +/* */ +/* _nx_crypto_method_aes_ccm_operation Handle AES encrypt or decrypt */ +/* */ +/* RELEASE HISTORY */ +/* */ +/* DATE NAME DESCRIPTION */ +/* */ +/* 05-19-2020 Timothy Stapko Initial Version 6.0 */ +/* 09-30-2020 Timothy Stapko Modified comment(s), */ +/* verified memcpy use cases, */ +/* resulting in version 6.1 */ +/* */ +/**************************************************************************/ +NX_CRYPTO_KEEP UINT _nx_crypto_ccm_encrypt_calculate(VOID *crypto_metadata, NX_CRYPTO_CCM *ccm_metadata, + UINT (*crypto_function)(VOID *, UCHAR *, UCHAR *, UINT), + UCHAR *icv, UINT block_size) +{ +UCHAR *A = ccm_metadata -> nx_crypto_ccm_A; +UINT i; + +#if (1U == NETX_SECURE_CRYPTO_NX_CRYPTO_METHODS_AES_ALT) && ((1U == BSP_FEATURE_CRYPTO_HAS_SCE9) || \ + (1U == BSP_FEATURE_CRYPTO_HAS_SCE5) || (1U == BSP_FEATURE_CRYPTO_HAS_SCE5B) || \ + (1U == BSP_FEATURE_CRYPTO_HAS_SCE7)) + NX_CRYPTO_PARAMETER_NOT_USED(A); + NX_CRYPTO_PARAMETER_NOT_USED(i); + NX_CRYPTO_PARAMETER_NOT_USED(crypto_function); + /* Check the block size. */ + if (block_size != NX_CRYPTO_CCM_BLOCK_SIZE) + { + return(NX_CRYPTO_PTR_ERROR); + } + + UINT ret = sce_nx_crypto_ccm_encrypt_final ((NX_CRYPTO_AES *) crypto_metadata, icv); + return ret; +#else + /* Data authentication. */ + if (ccm_metadata -> nx_crypto_ccm_icv_length > 0) + { + + /* The authentication tag T is the leftmost M bytes of the CBC-MAC value X(t + 1). */ + NX_CRYPTO_MEMCPY(icv, ccm_metadata -> nx_crypto_ccm_X, ccm_metadata -> nx_crypto_ccm_icv_length); /* Use case of memcpy is verified. */ + + /* Get encryption block X. */ + A[15] = 0; + crypto_function(crypto_metadata, A, A, block_size); + + /* Encrypt authentication tag. */ + for (i = 0; i < ccm_metadata -> nx_crypto_ccm_icv_length; i++) + { + icv[i] = A[i] ^ icv[i]; + } + } + +#ifdef NX_SECURE_KEY_CLEAR + NX_CRYPTO_MEMSET(ccm_metadata, 0, sizeof(NX_CRYPTO_CCM)); +#endif + + return(NX_CRYPTO_SUCCESS); +#endif +} + +/**************************************************************************/ +/* */ +/* FUNCTION RELEASE */ +/* */ +/* _nx_crypto_ccm_decrypt_calculate PORTABLE C */ +/* 6.1 */ +/* AUTHOR */ +/* */ +/* Timothy Stapko, Microsoft Corporation */ +/* */ +/* DESCRIPTION */ +/* */ +/* This function verifies the TAG for CCM mode. */ +/* */ +/* INPUT */ +/* */ +/* crypto_metadata Pointer to crypto metadata */ +/* gcm_metadata Pointer to GCM metadata */ +/* crypto_function Pointer to crypto function */ +/* icv Pointer to TAG buffer */ +/* block_size Block size of crypto algorithm*/ +/* */ +/* OUTPUT */ +/* */ +/* status */ +/* */ +/* CALLS */ +/* */ +/* None */ +/* */ +/* CALLED BY */ +/* */ +/* _nx_crypto_method_aes_ccm_operation Handle AES encrypt or decrypt */ +/* */ +/* RELEASE HISTORY */ +/* */ +/* DATE NAME DESCRIPTION */ +/* */ +/* 05-19-2020 Timothy Stapko Initial Version 6.0 */ +/* 09-30-2020 Timothy Stapko Modified comment(s), */ +/* verified memcpy use cases, */ +/* resulting in version 6.1 */ +/* */ +/**************************************************************************/ +NX_CRYPTO_KEEP UINT _nx_crypto_ccm_decrypt_calculate(VOID *crypto_metadata, NX_CRYPTO_CCM *ccm_metadata, + UINT (*crypto_function)(VOID *, UCHAR *, UCHAR *, UINT), + UCHAR *icv, UINT block_size) +{ +UCHAR temp[NX_CRYPTO_CCM_BLOCK_SIZE]; +UINT i; + + /* Check the block size. */ + if (block_size != NX_CRYPTO_CCM_BLOCK_SIZE) + { + return(NX_CRYPTO_PTR_ERROR); + } + + /* Data authentication. */ + if (ccm_metadata -> nx_crypto_ccm_icv_length > 0) + { + + NX_CRYPTO_MEMCPY(temp, ccm_metadata -> nx_crypto_ccm_A, block_size); /* Use case of memcpy is verified. */ + temp[15] = 0; + crypto_function(crypto_metadata, temp, temp, block_size); + + /* Encrypt authentication tag. */ + for (i = 0; i < ccm_metadata -> nx_crypto_ccm_icv_length; i++) + { + temp[i] = temp[i] ^ icv[i]; + } + + /* The authentication tag T is the leftmost M bytes of the CBC-MAC value X(t + 1). */ + if (NX_CRYPTO_MEMCMP(temp, ccm_metadata -> nx_crypto_ccm_X, ccm_metadata -> nx_crypto_ccm_icv_length)) + { + + /* Authentication failed. */ + return(NX_CRYPTO_AUTHENTICATION_FAILED); + } + } + +#ifdef NX_SECURE_KEY_CLEAR + NX_CRYPTO_MEMSET(ccm_metadata, 0, sizeof(NX_CRYPTO_CCM)); +#endif + + return(NX_CRYPTO_SUCCESS); +} diff --git a/ra/fsp/src/rm_netx_secure_crypto/nx_crypto_ccm_alt_process.c b/ra/fsp/src/rm_netx_secure_crypto/nx_crypto_ccm_alt_process.c new file mode 100644 index 000000000..58433b8be --- /dev/null +++ b/ra/fsp/src/rm_netx_secure_crypto/nx_crypto_ccm_alt_process.c @@ -0,0 +1,448 @@ +/*********************************************************************************************************************** + * Copyright [2020-2023] Renesas Electronics Corporation and/or its affiliates. All Rights Reserved. + * + * This software and documentation are supplied by Renesas Electronics America Inc. and may only be used with products + * of Renesas Electronics Corp. and its affiliates ("Renesas"). No other uses are authorized. Renesas products are + * sold pursuant to Renesas terms and conditions of sale. Purchasers are solely responsible for the selection and use + * of Renesas products and Renesas assumes no liability. No license, express or implied, to any intellectual property + * right is granted by Renesas. This software is protected under all applicable laws, including copyright laws. Renesas + * reserves the right to change or discontinue this software and/or this documentation. THE SOFTWARE AND DOCUMENTATION + * IS DELIVERED TO YOU "AS IS," AND RENESAS MAKES NO REPRESENTATIONS OR WARRANTIES, AND TO THE FULLEST EXTENT + * PERMISSIBLE UNDER APPLICABLE LAW, DISCLAIMS ALL WARRANTIES, WHETHER EXPLICITLY OR IMPLICITLY, INCLUDING WARRANTIES + * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, AND NONINFRINGEMENT, WITH RESPECT TO THE SOFTWARE OR + * DOCUMENTATION. RENESAS SHALL HAVE NO LIABILITY ARISING OUT OF ANY SECURITY VULNERABILITY OR BREACH. TO THE MAXIMUM + * EXTENT PERMITTED BY LAW, IN NO EVENT WILL RENESAS BE LIABLE TO YOU IN CONNECTION WITH THE SOFTWARE OR DOCUMENTATION + * (OR ANY PERSON OR ENTITY CLAIMING RIGHTS DERIVED FROM YOU) FOR ANY LOSS, DAMAGES, OR CLAIMS WHATSOEVER, INCLUDING, + * WITHOUT LIMITATION, ANY DIRECT, CONSEQUENTIAL, SPECIAL, INDIRECT, PUNITIVE, OR INCIDENTAL DAMAGES; ANY LOST PROFITS, + * OTHER ECONOMIC DAMAGE, PROPERTY DAMAGE, OR PERSONAL INJURY; AND EVEN IF RENESAS HAS BEEN ADVISED OF THE POSSIBILITY + * OF SUCH LOSS, DAMAGES, CLAIMS OR COSTS. + **********************************************************************************************************************/ + +/*********************************************************************************************************************** + * File Name : nx_crypto_ccm_alt_process.c + * Description : Functions interfacing with SCE + **********************************************************************************************************************/ + +/*********************************************************************************************************************** + * Includes + **********************************************************************************************************************/ + +#include "rm_netx_secure_crypto_cfg.h" +#include "rm_netx_secure_crypto.h" +#if (1U == NETX_SECURE_CRYPTO_NX_CRYPTO_METHODS_AES_ALT) && (((BSP_FEATURE_CRYPTO_HAS_SCE9 || BSP_FEATURE_CRYPTO_HAS_SCE7) == 1) || \ + ((BSP_FEATURE_CRYPTO_HAS_SCE5 || BSP_FEATURE_CRYPTO_HAS_SCE5B) == 1)) + #include "nx_crypto_aes.h" + #include "hw_sce_private.h" + #include "hw_sce_ra_private.h" + #include "hw_sce_aes_private.h" + + #define SCE9_AES_CCM_KEY_TYPE_GENERAL (0) + #define ROUNDOFF_TO_BLOCK_SIZE(BLOCK_SIZE, DATA_SIZE) (BLOCK_SIZE * ((DATA_SIZE + (BLOCK_SIZE - 1)) / BLOCK_SIZE)) + + +static UINT ccm_block_format (NX_CRYPTO_CCM * ccm_metadata, UCHAR * a_data, UINT a_len, UINT m_len, UCHAR * iv, + UINT block_size, UCHAR * b_format_buffer, UINT * format_buffer_length) +{ + UINT header_size = 0; + UINT header_data_expected = 0; + UCHAR Flags = 0; + UCHAR L = (UCHAR)(15 - iv[0]); + USHORT M = ccm_metadata -> nx_crypto_ccm_icv_length; + + /* Check the block size. */ + /* Accroding to RFC 3610, valid values of L range between 2 octets and 8 octets, iv[0] range between 7 octets and 13 octets. */ + if (block_size != NX_CRYPTO_CCM_BLOCK_SIZE || iv[0] > 13 || iv[0] < 7) + { + return(NX_CRYPTO_PTR_ERROR); + } + + NX_CRYPTO_MEMSET(b_format_buffer, 0, HW_SCE_AES_CCM_B_FORMAT_BYTE_SIZE); + NX_CRYPTO_MEMSET(&ccm_metadata -> nx_crypto_ccm_A[0], 0, sizeof(ccm_metadata -> nx_crypto_ccm_A)); + ccm_metadata -> nx_crypto_ccm_A[0] = (UCHAR)(L - 1); + NX_CRYPTO_MEMCPY(&ccm_metadata -> nx_crypto_ccm_A[1], &iv[1], (UINT)(15 - L)); + + header_data_expected += HW_SCE_AES_BLOCK_BYTE_SIZE; + header_data_expected += ROUNDOFF_TO_BLOCK_SIZE(HW_SCE_AES_BLOCK_BYTE_SIZE, (2U + a_len)); + + if (header_data_expected > HW_SCE_AES_CCM_B_FORMAT_BYTE_SIZE) + { + return NX_CRYPTO_SIZE_ERROR; + } + + /* Create Flag for B(0). */ + if (a_len > 0) + { + Flags = 1 << 6; + } + else + { + Flags = 0; + } + Flags |= (UCHAR)(((M - 2) >> 1) << 3); + Flags |= (UCHAR)(L - 1); + + *b_format_buffer = Flags; + NX_CRYPTO_MEMCPY((b_format_buffer + 1), &iv[1], (UINT)15 - L); + b_format_buffer[14] = (UCHAR)(m_len >> 8); + b_format_buffer[15] = (UCHAR)(m_len); + + header_size += HW_SCE_AES_BLOCK_BYTE_SIZE; + b_format_buffer[header_size] = (UCHAR)(a_len >> 8); + header_size ++; + b_format_buffer[header_size] = (UCHAR)(a_len); + header_size ++; + NX_CRYPTO_MEMCPY(&b_format_buffer[header_size], a_data, a_len); + + header_size += a_len; + header_size = ROUNDOFF_TO_BLOCK_SIZE(HW_SCE_AES_BLOCK_BYTE_SIZE, header_size); + + /* Header size to be specified in words. */ + *format_buffer_length = header_size >> 2; + + return 0; +} + +UINT sce_nx_crypto_ccm_encrypt_init (NX_CRYPTO_AES * aes_ctx, + VOID * additional_data, + UINT additional_len, + UINT length, + UCHAR * iv, + USHORT icv_len, + USHORT block_size) +{ + fsp_err_t err = FSP_SUCCESS; + UINT ret = NX_CRYPTO_NOT_SUCCESSFUL; + UINT header_length = 0; + uint32_t key_type[1] = {SCE9_AES_CCM_KEY_TYPE_GENERAL}; + uint32_t indata_cmd[1] = {0}; + uint32_t indata_type[1] = {0}; + uint32_t indata_seqnum[1] = {0}; + uint32_t indata_textlen[1] = {0}; + uint8_t work_buffer[HW_SCE_AES_CCM_B_FORMAT_BYTE_SIZE] = {0}; + NX_CRYPTO_CCM * p_ccm_metadata = &aes_ctx->nx_crypto_aes_mode_context.ccm; + + indata_textlen[0] = change_endian_long(length); + + /* The memory allocated by the NetX Secure stack to store the metadata is not fully + required for the crypto processing when sce engines are used. Thus the same space has + been used to accomodate the context info of sce engines. The allocated space for + processing buffer 'nx_crypto_ccm_X' is utilized for storing the input data length + in big endian form */ + NX_CRYPTO_MEMSET(p_ccm_metadata->nx_crypto_ccm_X, 0, sizeof(p_ccm_metadata->nx_crypto_ccm_X)); + NX_CRYPTO_MEMCPY(p_ccm_metadata->nx_crypto_ccm_X, indata_textlen, sizeof(indata_textlen)); + + p_ccm_metadata->nx_crypto_ccm_icv_length = icv_len; + + NX_CRYPTO_MEMSET(work_buffer, 0, sizeof(work_buffer)); + + if ((ret = ccm_block_format(p_ccm_metadata, (UCHAR *)additional_data, additional_len, length, iv, + (UINT)block_size, work_buffer, &header_length)) != 0U) + { + return ret; + } + + if (SCE_NX_CRYPTO_AES_KEY_SIZE_128_WRAPPED_WORDS == aes_ctx->nx_crypto_aes_key_size) + { + err = HW_SCE_Aes128CcmEncryptInitSubGeneral(key_type, indata_type, indata_cmd, indata_textlen, + (uint32_t *) (aes_ctx->nx_crypto_aes_key_schedule), + (uint32_t *) p_ccm_metadata -> nx_crypto_ccm_A, + (uint32_t *) work_buffer, indata_seqnum, + header_length); + } + #if ((BSP_FEATURE_CRYPTO_HAS_SCE9 || BSP_FEATURE_CRYPTO_HAS_SCE7) == 1) + else if (SCE_NX_CRYPTO_AES_KEY_SIZE_192_WRAPPED_WORDS == aes_ctx->nx_crypto_aes_key_size) + { + err = HW_SCE_Aes192CcmEncryptInitSubGeneral(key_type, indata_type, indata_cmd, indata_textlen, + (uint32_t *) (aes_ctx->nx_crypto_aes_key_schedule), + (uint32_t *) p_ccm_metadata -> nx_crypto_ccm_A, + (uint32_t *) work_buffer, indata_seqnum, + header_length); + } + #endif + else if (SCE_NX_CRYPTO_AES_KEY_SIZE_256_WRAPPED_WORDS == aes_ctx->nx_crypto_aes_key_size) + { + err = HW_SCE_Aes256CcmEncryptInitSubGeneral(key_type, indata_type, indata_cmd, indata_textlen, + (uint32_t *) (aes_ctx->nx_crypto_aes_key_schedule), + (uint32_t *) p_ccm_metadata -> nx_crypto_ccm_A, + (uint32_t *) work_buffer, indata_seqnum, + header_length); + } + else + { + return NX_CRYPTO_UNSUPPORTED_KEY_SIZE; + } + + if (FSP_SUCCESS != err) + { + return (NX_CRYPTO_NOT_SUCCESSFUL); + } + + return(NX_CRYPTO_SUCCESS); +} + +UINT sce_nx_crypto_ccm_encrypt_update (NX_CRYPTO_AES * aes_ctx, UCHAR * input, UCHAR * output, UINT length) +{ + fsp_err_t err = FSP_SUCCESS; + uint32_t input_length = length; + uint32_t length_remaining = length % NX_CRYPTO_CCM_BLOCK_SIZE; + uint8_t work_buffer[NX_CRYPTO_CCM_BLOCK_SIZE] = {0}; + uint32_t indata_textlen[1] = {0}; + NX_CRYPTO_CCM * p_ccm_metadata = &aes_ctx->nx_crypto_aes_mode_context.ccm; + + NX_CRYPTO_MEMCPY(indata_textlen, p_ccm_metadata->nx_crypto_ccm_X, sizeof(indata_textlen)); + + input_length -= length_remaining; + + /* Handle full/complete block(s) */ + if (0 != input_length) + { + if (SCE_NX_CRYPTO_AES_KEY_SIZE_128_WRAPPED_WORDS == aes_ctx->nx_crypto_aes_key_size) + { + HW_SCE_Aes128CcmEncryptUpdateSub((uint32_t *) input, + (uint32_t *) output, + RM_NETX_SECURE_CRYPTO_BYTES_TO_WORDS(input_length)); + } + #if ((BSP_FEATURE_CRYPTO_HAS_SCE9 || BSP_FEATURE_CRYPTO_HAS_SCE7) == 1) + else if (SCE_NX_CRYPTO_AES_KEY_SIZE_192_WRAPPED_WORDS == aes_ctx->nx_crypto_aes_key_size) + { + HW_SCE_Aes192CcmEncryptUpdateSub((uint32_t *) input, + (uint32_t *) output, + RM_NETX_SECURE_CRYPTO_BYTES_TO_WORDS(input_length)); + } + #endif + else if (SCE_NX_CRYPTO_AES_KEY_SIZE_256_WRAPPED_WORDS == aes_ctx->nx_crypto_aes_key_size) + { + HW_SCE_Aes256CcmEncryptUpdateSub((uint32_t *) input, + (uint32_t *) output, + RM_NETX_SECURE_CRYPTO_BYTES_TO_WORDS(input_length)); + } + else + { + return NX_CRYPTO_UNSUPPORTED_KEY_SIZE; + } + } + + NX_CRYPTO_MEMSET(work_buffer, 0, sizeof(work_buffer)); + NX_CRYPTO_MEMSET(p_ccm_metadata->nx_crypto_ccm_X, 0, sizeof(p_ccm_metadata->nx_crypto_ccm_X)); + if(0 != length_remaining) + { + NX_CRYPTO_MEMCPY(work_buffer, &input[input_length], length_remaining); + } + + if (SCE_NX_CRYPTO_AES_KEY_SIZE_128_WRAPPED_WORDS == aes_ctx->nx_crypto_aes_key_size) + { + err = HW_SCE_Aes128CcmEncryptFinalSubGeneral(indata_textlen, (uint32_t *) work_buffer, + (uint32_t *) &output[input_length], (uint32_t *) p_ccm_metadata->nx_crypto_ccm_X); + } +#if ((BSP_FEATURE_CRYPTO_HAS_SCE9 || BSP_FEATURE_CRYPTO_HAS_SCE7) == 1) + else if (SCE_NX_CRYPTO_AES_KEY_SIZE_192_WRAPPED_WORDS == aes_ctx->nx_crypto_aes_key_size) + { + err = HW_SCE_Aes192CcmEncryptFinalSub(indata_textlen, (uint32_t *) work_buffer, + (uint32_t *) &output[input_length], (uint32_t *) p_ccm_metadata->nx_crypto_ccm_X); + } +#endif + else if (SCE_NX_CRYPTO_AES_KEY_SIZE_256_WRAPPED_WORDS == aes_ctx->nx_crypto_aes_key_size) + { + err = HW_SCE_Aes256CcmEncryptFinalSub(indata_textlen, (uint32_t *) work_buffer, + (uint32_t *) &output[input_length], (uint32_t *) p_ccm_metadata->nx_crypto_ccm_X); + } + else + { + return NX_CRYPTO_UNSUPPORTED_KEY_SIZE; + } + + if (FSP_SUCCESS != err) + { + return (NX_CRYPTO_NOT_SUCCESSFUL); + } + + return (NX_CRYPTO_SUCCESS); +} + +UINT sce_nx_crypto_ccm_encrypt_final (NX_CRYPTO_AES * aes_ctx, UCHAR * output) +{ + NX_CRYPTO_CCM * p_ccm_metadata = &aes_ctx->nx_crypto_aes_mode_context.ccm; + + NX_CRYPTO_MEMCPY(output, p_ccm_metadata->nx_crypto_ccm_X, p_ccm_metadata->nx_crypto_ccm_icv_length); + return(NX_CRYPTO_SUCCESS); +} + +UINT sce_nx_crypto_ccm_decrypt_init (NX_CRYPTO_AES * crypto_metadata, NX_CRYPTO_CCM * ccm_metadata, + VOID * additional_data, UINT additional_len, + UINT length, UCHAR * iv, USHORT icv_len, USHORT block_size) +{ + fsp_err_t err = FSP_SUCCESS; + UINT ret = NX_CRYPTO_NOT_SUCCESSFUL; + UINT header_length = 0; + uint8_t work_buffer[HW_SCE_AES_CCM_B_FORMAT_BYTE_SIZE] = {0}; + uint32_t key_type[1] = {SCE9_AES_CCM_KEY_TYPE_GENERAL}; + uint32_t indata_cmd[1] = {0}; + uint32_t indata_type[1] = {0}; + uint32_t indata_seqnum[1] = {0}; + uint32_t indata_textlen[1] = {0}; + uint32_t indata_maclength[1] = {0}; + + indata_textlen[0] = change_endian_long(length); + NX_CRYPTO_MEMSET(ccm_metadata->nx_crypto_ccm_X, 0, sizeof(ccm_metadata->nx_crypto_ccm_X)); + NX_CRYPTO_MEMCPY(ccm_metadata->nx_crypto_ccm_X, indata_textlen, sizeof(indata_textlen)); + + indata_maclength[0] = change_endian_long((uint32_t)icv_len); + ccm_metadata->nx_crypto_ccm_icv_length = icv_len; + + NX_CRYPTO_MEMSET(work_buffer, 0, sizeof(work_buffer)); + + if ((ret = ccm_block_format(ccm_metadata, additional_data, additional_len, length, iv, block_size, + work_buffer, &header_length)) != 0U) + { + return ret; + } + + if (SCE_NX_CRYPTO_AES_KEY_SIZE_128_WRAPPED_WORDS == crypto_metadata->nx_crypto_aes_key_size) + { + err = HW_SCE_Aes128CcmDecryptInitSubGeneral(key_type, indata_type, indata_cmd, indata_textlen, + (uint32_t *) indata_maclength, + (uint32_t *) (crypto_metadata->nx_crypto_aes_key_schedule), + (uint32_t *) ccm_metadata -> nx_crypto_ccm_A, + (uint32_t *) work_buffer, indata_seqnum, + header_length); + } + #if ((BSP_FEATURE_CRYPTO_HAS_SCE9 || BSP_FEATURE_CRYPTO_HAS_SCE7) == 1) + else if (SCE_NX_CRYPTO_AES_KEY_SIZE_192_WRAPPED_WORDS == crypto_metadata->nx_crypto_aes_key_size) + { + err = HW_SCE_Aes192CcmDecryptInitSubGeneral(key_type, indata_type, indata_cmd, indata_textlen, + (uint32_t *) indata_maclength, + (uint32_t *) (crypto_metadata->nx_crypto_aes_key_schedule), + (uint32_t *) ccm_metadata -> nx_crypto_ccm_A, + (uint32_t *) work_buffer, indata_seqnum, + header_length); + } + #endif + else if (SCE_NX_CRYPTO_AES_KEY_SIZE_256_WRAPPED_WORDS == crypto_metadata->nx_crypto_aes_key_size) + { + err = HW_SCE_Aes256CcmDecryptInitSubGeneral(key_type, indata_type, indata_cmd, indata_textlen, + (uint32_t *) indata_maclength, + (uint32_t *) (crypto_metadata->nx_crypto_aes_key_schedule), + (uint32_t *) ccm_metadata -> nx_crypto_ccm_A, + (uint32_t *) work_buffer, indata_seqnum, + header_length); + } + else + { + return NX_CRYPTO_UNSUPPORTED_KEY_SIZE; + } + + if (FSP_SUCCESS != err) + { + return (NX_CRYPTO_NOT_SUCCESSFUL); + } + + return(NX_CRYPTO_SUCCESS); +} + +UINT sce_nx_crypto_ccm_decrypt_update (NX_CRYPTO_AES * crypto_metadata, UCHAR * input, UCHAR * output, + UINT length, UINT block_size) +{ + uint32_t input_length = length; + uint32_t length_remaining = length % NX_CRYPTO_CCM_BLOCK_SIZE; + + /* Check the block size. */ + if (block_size != NX_CRYPTO_CCM_BLOCK_SIZE) + { + return(NX_CRYPTO_PTR_ERROR); + } + + if(length_remaining) + { + return NX_CRYPTO_SIZE_ERROR; + } + + /* Handle full/complete block(s) */ + if (0 != input_length) + { + if (SCE_NX_CRYPTO_AES_KEY_SIZE_128_WRAPPED_WORDS == crypto_metadata->nx_crypto_aes_key_size) + { + HW_SCE_Aes128CcmDecryptUpdateSub((uint32_t *) input, + (uint32_t *) output, + RM_NETX_SECURE_CRYPTO_BYTES_TO_WORDS(input_length)); + } + #if ((BSP_FEATURE_CRYPTO_HAS_SCE9 || BSP_FEATURE_CRYPTO_HAS_SCE7) == 1) + else if (SCE_NX_CRYPTO_AES_KEY_SIZE_192_WRAPPED_WORDS == crypto_metadata->nx_crypto_aes_key_size) + { + HW_SCE_Aes192CcmDecryptUpdateSub((uint32_t *) input, + (uint32_t *) output, + RM_NETX_SECURE_CRYPTO_BYTES_TO_WORDS(input_length)); + } + #endif + else if (SCE_NX_CRYPTO_AES_KEY_SIZE_256_WRAPPED_WORDS == crypto_metadata->nx_crypto_aes_key_size) + { + HW_SCE_Aes256CcmDecryptUpdateSub((uint32_t *) input, + (uint32_t *) output, + RM_NETX_SECURE_CRYPTO_BYTES_TO_WORDS(input_length)); + } + else + { + return NX_CRYPTO_UNSUPPORTED_KEY_SIZE; + } + } + + return (NX_CRYPTO_SUCCESS); +} + +UINT sce_nx_crypto_ccm_decrypt_final (NX_CRYPTO_AES * crypto_metadata, NX_CRYPTO_CCM * ccm_metadata, + UCHAR * icv, UINT block_size) +{ + fsp_err_t err = FSP_SUCCESS; + uint8_t work_buffer[NX_CRYPTO_CCM_BLOCK_SIZE] = {0}; + uint32_t indata_maclength[1] = {0}; + uint32_t indata_textlen[1] = {0}; + + /* Check the block size. */ + if (block_size != NX_CRYPTO_CCM_BLOCK_SIZE) + { + return(NX_CRYPTO_PTR_ERROR); + } + + NX_CRYPTO_MEMCPY(indata_textlen, ccm_metadata->nx_crypto_ccm_X, sizeof(indata_textlen)); + indata_maclength[0] = change_endian_long(ccm_metadata->nx_crypto_ccm_icv_length); + NX_CRYPTO_MEMSET(ccm_metadata->nx_crypto_ccm_X, 0, sizeof(ccm_metadata->nx_crypto_ccm_X)); + + NX_CRYPTO_MEMSET(work_buffer, 0, sizeof(work_buffer)); + + if (SCE_NX_CRYPTO_AES_KEY_SIZE_128_WRAPPED_WORDS == crypto_metadata->nx_crypto_aes_key_size) + { + err = HW_SCE_Aes128CcmDecryptFinalSubGeneral((uint32_t *) work_buffer, indata_textlen, + (uint32_t *) icv, + indata_maclength, + (uint32_t *) work_buffer); + } +#if ((BSP_FEATURE_CRYPTO_HAS_SCE9 || BSP_FEATURE_CRYPTO_HAS_SCE7) == 1) + else if (SCE_NX_CRYPTO_AES_KEY_SIZE_192_WRAPPED_WORDS == crypto_metadata->nx_crypto_aes_key_size) + { + err = HW_SCE_Aes192CcmDecryptFinalSub((uint32_t *) work_buffer, indata_textlen, + (uint32_t *) icv, + indata_maclength, + (uint32_t *) work_buffer); + } +#endif + else if (SCE_NX_CRYPTO_AES_KEY_SIZE_256_WRAPPED_WORDS == crypto_metadata->nx_crypto_aes_key_size) + { + err = HW_SCE_Aes256CcmDecryptFinalSub((uint32_t *) work_buffer, indata_textlen, + (uint32_t *) icv, + indata_maclength, + (uint32_t *) work_buffer); + } + else + { + return NX_CRYPTO_UNSUPPORTED_KEY_SIZE; + } + + if(FSP_SUCCESS != err) + { + /* Authentication failed. */ + return(NX_CRYPTO_AUTHENTICATION_FAILED); + } + + return(NX_CRYPTO_SUCCESS); +} + +#endif diff --git a/ra/fsp/src/rm_netx_secure_crypto/nx_crypto_gcm_alt_process.c b/ra/fsp/src/rm_netx_secure_crypto/nx_crypto_gcm_alt_process.c index 6a3041f3d..1f7c854fc 100644 --- a/ra/fsp/src/rm_netx_secure_crypto/nx_crypto_gcm_alt_process.c +++ b/ra/fsp/src/rm_netx_secure_crypto/nx_crypto_gcm_alt_process.c @@ -120,6 +120,8 @@ UINT sce_nx_crypto_gcm_encrypt_init (NX_CRYPTO_AES * aes_ctx, length_remaining = additional_len % NX_CRYPTO_GCM_BLOCK_SIZE; input_length -= length_remaining; + NX_CRYPTO_MEMSET(&(aes_ctx->nx_crypto_aes_mode_context.gcm.nx_crypto_gcm_counter), 0U, NX_CRYPTO_GCM_BLOCK_SIZE_INT); + if (SCE_NX_CRYPTO_AES_KEY_SIZE_128_WRAPPED_WORDS == aes_ctx->nx_crypto_aes_key_size) { err = HW_SCE_Aes128GcmEncryptInitSub(key_type, diff --git a/ra/fsp/src/rm_psa_crypto/aes_alt.c b/ra/fsp/src/rm_psa_crypto/aes_alt.c index 42ccc7b63..4bfbbc55c 100644 --- a/ra/fsp/src/rm_psa_crypto/aes_alt.c +++ b/ra/fsp/src/rm_psa_crypto/aes_alt.c @@ -43,24 +43,14 @@ #if defined(MBEDTLS_AESNI_C) #include "mbedtls/aesni.h" #endif +#if defined(MBEDTLS_AESCE_C) +#include "aesce.h" +#endif - #if defined(MBEDTLS_SELF_TEST) - #if defined(MBEDTLS_PLATFORM_C) - #include "mbedtls/platform.h" - #else - #include <stdio.h> -#define mbedtls_printf printf -#endif /* MBEDTLS_PLATFORM_C */ -#endif /* MBEDTLS_SELF_TEST */ +#include "mbedtls/platform.h" #if defined(MBEDTLS_AES_ALT) -/* Parameter validation macros based on platform_util.h */ -#define AES_VALIDATE_RET( cond ) \ - MBEDTLS_INTERNAL_VALIDATE_RET( cond, MBEDTLS_ERR_AES_BAD_INPUT_DATA ) -#define AES_VALIDATE( cond ) \ - MBEDTLS_INTERNAL_VALIDATE( cond ) - /* * 32-bit integer manipulation macros (little endian) */ @@ -84,10 +74,9 @@ } #endif #ifdef FSP_NOT_DEFINED -#if defined(MBEDTLS_PADLOCK_C) && \ - ( defined(MBEDTLS_HAVE_X86) || defined(MBEDTLS_PADLOCK_ALIGN16) ) +#if defined(MBEDTLS_PADLOCK_C) && defined(MBEDTLS_HAVE_X86) static int aes_padlock_ace = -1; - #endif +#endif #if defined(MBEDTLS_AES_ROM_TABLES) /* @@ -134,86 +123,86 @@ static const unsigned char FSb[256] = */ #define FT \ \ - V(A5,63,63,C6), V(84,7C,7C,F8), V(99,77,77,EE), V(8D,7B,7B,F6), \ - V(0D,F2,F2,FF), V(BD,6B,6B,D6), V(B1,6F,6F,DE), V(54,C5,C5,91), \ - V(50,30,30,60), V(03,01,01,02), V(A9,67,67,CE), V(7D,2B,2B,56), \ - V(19,FE,FE,E7), V(62,D7,D7,B5), V(E6,AB,AB,4D), V(9A,76,76,EC), \ - V(45,CA,CA,8F), V(9D,82,82,1F), V(40,C9,C9,89), V(87,7D,7D,FA), \ - V(15,FA,FA,EF), V(EB,59,59,B2), V(C9,47,47,8E), V(0B,F0,F0,FB), \ - V(EC,AD,AD,41), V(67,D4,D4,B3), V(FD,A2,A2,5F), V(EA,AF,AF,45), \ - V(BF,9C,9C,23), V(F7,A4,A4,53), V(96,72,72,E4), V(5B,C0,C0,9B), \ - V(C2,B7,B7,75), V(1C,FD,FD,E1), V(AE,93,93,3D), V(6A,26,26,4C), \ - V(5A,36,36,6C), V(41,3F,3F,7E), V(02,F7,F7,F5), V(4F,CC,CC,83), \ - V(5C,34,34,68), V(F4,A5,A5,51), V(34,E5,E5,D1), V(08,F1,F1,F9), \ - V(93,71,71,E2), V(73,D8,D8,AB), V(53,31,31,62), V(3F,15,15,2A), \ - V(0C,04,04,08), V(52,C7,C7,95), V(65,23,23,46), V(5E,C3,C3,9D), \ - V(28,18,18,30), V(A1,96,96,37), V(0F,05,05,0A), V(B5,9A,9A,2F), \ - V(09,07,07,0E), V(36,12,12,24), V(9B,80,80,1B), V(3D,E2,E2,DF), \ - V(26,EB,EB,CD), V(69,27,27,4E), V(CD,B2,B2,7F), V(9F,75,75,EA), \ - V(1B,09,09,12), V(9E,83,83,1D), V(74,2C,2C,58), V(2E,1A,1A,34), \ - V(2D,1B,1B,36), V(B2,6E,6E,DC), V(EE,5A,5A,B4), V(FB,A0,A0,5B), \ - V(F6,52,52,A4), V(4D,3B,3B,76), V(61,D6,D6,B7), V(CE,B3,B3,7D), \ - V(7B,29,29,52), V(3E,E3,E3,DD), V(71,2F,2F,5E), V(97,84,84,13), \ - V(F5,53,53,A6), V(68,D1,D1,B9), V(00,00,00,00), V(2C,ED,ED,C1), \ - V(60,20,20,40), V(1F,FC,FC,E3), V(C8,B1,B1,79), V(ED,5B,5B,B6), \ - V(BE,6A,6A,D4), V(46,CB,CB,8D), V(D9,BE,BE,67), V(4B,39,39,72), \ - V(DE,4A,4A,94), V(D4,4C,4C,98), V(E8,58,58,B0), V(4A,CF,CF,85), \ - V(6B,D0,D0,BB), V(2A,EF,EF,C5), V(E5,AA,AA,4F), V(16,FB,FB,ED), \ - V(C5,43,43,86), V(D7,4D,4D,9A), V(55,33,33,66), V(94,85,85,11), \ - V(CF,45,45,8A), V(10,F9,F9,E9), V(06,02,02,04), V(81,7F,7F,FE), \ - V(F0,50,50,A0), V(44,3C,3C,78), V(BA,9F,9F,25), V(E3,A8,A8,4B), \ - V(F3,51,51,A2), V(FE,A3,A3,5D), V(C0,40,40,80), V(8A,8F,8F,05), \ - V(AD,92,92,3F), V(BC,9D,9D,21), V(48,38,38,70), V(04,F5,F5,F1), \ - V(DF,BC,BC,63), V(C1,B6,B6,77), V(75,DA,DA,AF), V(63,21,21,42), \ - V(30,10,10,20), V(1A,FF,FF,E5), V(0E,F3,F3,FD), V(6D,D2,D2,BF), \ - V(4C,CD,CD,81), V(14,0C,0C,18), V(35,13,13,26), V(2F,EC,EC,C3), \ - V(E1,5F,5F,BE), V(A2,97,97,35), V(CC,44,44,88), V(39,17,17,2E), \ - V(57,C4,C4,93), V(F2,A7,A7,55), V(82,7E,7E,FC), V(47,3D,3D,7A), \ - V(AC,64,64,C8), V(E7,5D,5D,BA), V(2B,19,19,32), V(95,73,73,E6), \ - V(A0,60,60,C0), V(98,81,81,19), V(D1,4F,4F,9E), V(7F,DC,DC,A3), \ - V(66,22,22,44), V(7E,2A,2A,54), V(AB,90,90,3B), V(83,88,88,0B), \ - V(CA,46,46,8C), V(29,EE,EE,C7), V(D3,B8,B8,6B), V(3C,14,14,28), \ - V(79,DE,DE,A7), V(E2,5E,5E,BC), V(1D,0B,0B,16), V(76,DB,DB,AD), \ - V(3B,E0,E0,DB), V(56,32,32,64), V(4E,3A,3A,74), V(1E,0A,0A,14), \ - V(DB,49,49,92), V(0A,06,06,0C), V(6C,24,24,48), V(E4,5C,5C,B8), \ - V(5D,C2,C2,9F), V(6E,D3,D3,BD), V(EF,AC,AC,43), V(A6,62,62,C4), \ - V(A8,91,91,39), V(A4,95,95,31), V(37,E4,E4,D3), V(8B,79,79,F2), \ - V(32,E7,E7,D5), V(43,C8,C8,8B), V(59,37,37,6E), V(B7,6D,6D,DA), \ - V(8C,8D,8D,01), V(64,D5,D5,B1), V(D2,4E,4E,9C), V(E0,A9,A9,49), \ - V(B4,6C,6C,D8), V(FA,56,56,AC), V(07,F4,F4,F3), V(25,EA,EA,CF), \ - V(AF,65,65,CA), V(8E,7A,7A,F4), V(E9,AE,AE,47), V(18,08,08,10), \ - V(D5,BA,BA,6F), V(88,78,78,F0), V(6F,25,25,4A), V(72,2E,2E,5C), \ - V(24,1C,1C,38), V(F1,A6,A6,57), V(C7,B4,B4,73), V(51,C6,C6,97), \ - V(23,E8,E8,CB), V(7C,DD,DD,A1), V(9C,74,74,E8), V(21,1F,1F,3E), \ - V(DD,4B,4B,96), V(DC,BD,BD,61), V(86,8B,8B,0D), V(85,8A,8A,0F), \ - V(90,70,70,E0), V(42,3E,3E,7C), V(C4,B5,B5,71), V(AA,66,66,CC), \ - V(D8,48,48,90), V(05,03,03,06), V(01,F6,F6,F7), V(12,0E,0E,1C), \ - V(A3,61,61,C2), V(5F,35,35,6A), V(F9,57,57,AE), V(D0,B9,B9,69), \ - V(91,86,86,17), V(58,C1,C1,99), V(27,1D,1D,3A), V(B9,9E,9E,27), \ - V(38,E1,E1,D9), V(13,F8,F8,EB), V(B3,98,98,2B), V(33,11,11,22), \ - V(BB,69,69,D2), V(70,D9,D9,A9), V(89,8E,8E,07), V(A7,94,94,33), \ - V(B6,9B,9B,2D), V(22,1E,1E,3C), V(92,87,87,15), V(20,E9,E9,C9), \ - V(49,CE,CE,87), V(FF,55,55,AA), V(78,28,28,50), V(7A,DF,DF,A5), \ - V(8F,8C,8C,03), V(F8,A1,A1,59), V(80,89,89,09), V(17,0D,0D,1A), \ - V(DA,BF,BF,65), V(31,E6,E6,D7), V(C6,42,42,84), V(B8,68,68,D0), \ - V(C3,41,41,82), V(B0,99,99,29), V(77,2D,2D,5A), V(11,0F,0F,1E), \ - V(CB,B0,B0,7B), V(FC,54,54,A8), V(D6,BB,BB,6D), V(3A,16,16,2C) - -#define V(a,b,c,d) 0x##a##b##c##d + V(A5, 63, 63, C6), V(84, 7C, 7C, F8), V(99, 77, 77, EE), V(8D, 7B, 7B, F6), \ + V(0D, F2, F2, FF), V(BD, 6B, 6B, D6), V(B1, 6F, 6F, DE), V(54, C5, C5, 91), \ + V(50, 30, 30, 60), V(03, 01, 01, 02), V(A9, 67, 67, CE), V(7D, 2B, 2B, 56), \ + V(19, FE, FE, E7), V(62, D7, D7, B5), V(E6, AB, AB, 4D), V(9A, 76, 76, EC), \ + V(45, CA, CA, 8F), V(9D, 82, 82, 1F), V(40, C9, C9, 89), V(87, 7D, 7D, FA), \ + V(15, FA, FA, EF), V(EB, 59, 59, B2), V(C9, 47, 47, 8E), V(0B, F0, F0, FB), \ + V(EC, AD, AD, 41), V(67, D4, D4, B3), V(FD, A2, A2, 5F), V(EA, AF, AF, 45), \ + V(BF, 9C, 9C, 23), V(F7, A4, A4, 53), V(96, 72, 72, E4), V(5B, C0, C0, 9B), \ + V(C2, B7, B7, 75), V(1C, FD, FD, E1), V(AE, 93, 93, 3D), V(6A, 26, 26, 4C), \ + V(5A, 36, 36, 6C), V(41, 3F, 3F, 7E), V(02, F7, F7, F5), V(4F, CC, CC, 83), \ + V(5C, 34, 34, 68), V(F4, A5, A5, 51), V(34, E5, E5, D1), V(08, F1, F1, F9), \ + V(93, 71, 71, E2), V(73, D8, D8, AB), V(53, 31, 31, 62), V(3F, 15, 15, 2A), \ + V(0C, 04, 04, 08), V(52, C7, C7, 95), V(65, 23, 23, 46), V(5E, C3, C3, 9D), \ + V(28, 18, 18, 30), V(A1, 96, 96, 37), V(0F, 05, 05, 0A), V(B5, 9A, 9A, 2F), \ + V(09, 07, 07, 0E), V(36, 12, 12, 24), V(9B, 80, 80, 1B), V(3D, E2, E2, DF), \ + V(26, EB, EB, CD), V(69, 27, 27, 4E), V(CD, B2, B2, 7F), V(9F, 75, 75, EA), \ + V(1B, 09, 09, 12), V(9E, 83, 83, 1D), V(74, 2C, 2C, 58), V(2E, 1A, 1A, 34), \ + V(2D, 1B, 1B, 36), V(B2, 6E, 6E, DC), V(EE, 5A, 5A, B4), V(FB, A0, A0, 5B), \ + V(F6, 52, 52, A4), V(4D, 3B, 3B, 76), V(61, D6, D6, B7), V(CE, B3, B3, 7D), \ + V(7B, 29, 29, 52), V(3E, E3, E3, DD), V(71, 2F, 2F, 5E), V(97, 84, 84, 13), \ + V(F5, 53, 53, A6), V(68, D1, D1, B9), V(00, 00, 00, 00), V(2C, ED, ED, C1), \ + V(60, 20, 20, 40), V(1F, FC, FC, E3), V(C8, B1, B1, 79), V(ED, 5B, 5B, B6), \ + V(BE, 6A, 6A, D4), V(46, CB, CB, 8D), V(D9, BE, BE, 67), V(4B, 39, 39, 72), \ + V(DE, 4A, 4A, 94), V(D4, 4C, 4C, 98), V(E8, 58, 58, B0), V(4A, CF, CF, 85), \ + V(6B, D0, D0, BB), V(2A, EF, EF, C5), V(E5, AA, AA, 4F), V(16, FB, FB, ED), \ + V(C5, 43, 43, 86), V(D7, 4D, 4D, 9A), V(55, 33, 33, 66), V(94, 85, 85, 11), \ + V(CF, 45, 45, 8A), V(10, F9, F9, E9), V(06, 02, 02, 04), V(81, 7F, 7F, FE), \ + V(F0, 50, 50, A0), V(44, 3C, 3C, 78), V(BA, 9F, 9F, 25), V(E3, A8, A8, 4B), \ + V(F3, 51, 51, A2), V(FE, A3, A3, 5D), V(C0, 40, 40, 80), V(8A, 8F, 8F, 05), \ + V(AD, 92, 92, 3F), V(BC, 9D, 9D, 21), V(48, 38, 38, 70), V(04, F5, F5, F1), \ + V(DF, BC, BC, 63), V(C1, B6, B6, 77), V(75, DA, DA, AF), V(63, 21, 21, 42), \ + V(30, 10, 10, 20), V(1A, FF, FF, E5), V(0E, F3, F3, FD), V(6D, D2, D2, BF), \ + V(4C, CD, CD, 81), V(14, 0C, 0C, 18), V(35, 13, 13, 26), V(2F, EC, EC, C3), \ + V(E1, 5F, 5F, BE), V(A2, 97, 97, 35), V(CC, 44, 44, 88), V(39, 17, 17, 2E), \ + V(57, C4, C4, 93), V(F2, A7, A7, 55), V(82, 7E, 7E, FC), V(47, 3D, 3D, 7A), \ + V(AC, 64, 64, C8), V(E7, 5D, 5D, BA), V(2B, 19, 19, 32), V(95, 73, 73, E6), \ + V(A0, 60, 60, C0), V(98, 81, 81, 19), V(D1, 4F, 4F, 9E), V(7F, DC, DC, A3), \ + V(66, 22, 22, 44), V(7E, 2A, 2A, 54), V(AB, 90, 90, 3B), V(83, 88, 88, 0B), \ + V(CA, 46, 46, 8C), V(29, EE, EE, C7), V(D3, B8, B8, 6B), V(3C, 14, 14, 28), \ + V(79, DE, DE, A7), V(E2, 5E, 5E, BC), V(1D, 0B, 0B, 16), V(76, DB, DB, AD), \ + V(3B, E0, E0, DB), V(56, 32, 32, 64), V(4E, 3A, 3A, 74), V(1E, 0A, 0A, 14), \ + V(DB, 49, 49, 92), V(0A, 06, 06, 0C), V(6C, 24, 24, 48), V(E4, 5C, 5C, B8), \ + V(5D, C2, C2, 9F), V(6E, D3, D3, BD), V(EF, AC, AC, 43), V(A6, 62, 62, C4), \ + V(A8, 91, 91, 39), V(A4, 95, 95, 31), V(37, E4, E4, D3), V(8B, 79, 79, F2), \ + V(32, E7, E7, D5), V(43, C8, C8, 8B), V(59, 37, 37, 6E), V(B7, 6D, 6D, DA), \ + V(8C, 8D, 8D, 01), V(64, D5, D5, B1), V(D2, 4E, 4E, 9C), V(E0, A9, A9, 49), \ + V(B4, 6C, 6C, D8), V(FA, 56, 56, AC), V(07, F4, F4, F3), V(25, EA, EA, CF), \ + V(AF, 65, 65, CA), V(8E, 7A, 7A, F4), V(E9, AE, AE, 47), V(18, 08, 08, 10), \ + V(D5, BA, BA, 6F), V(88, 78, 78, F0), V(6F, 25, 25, 4A), V(72, 2E, 2E, 5C), \ + V(24, 1C, 1C, 38), V(F1, A6, A6, 57), V(C7, B4, B4, 73), V(51, C6, C6, 97), \ + V(23, E8, E8, CB), V(7C, DD, DD, A1), V(9C, 74, 74, E8), V(21, 1F, 1F, 3E), \ + V(DD, 4B, 4B, 96), V(DC, BD, BD, 61), V(86, 8B, 8B, 0D), V(85, 8A, 8A, 0F), \ + V(90, 70, 70, E0), V(42, 3E, 3E, 7C), V(C4, B5, B5, 71), V(AA, 66, 66, CC), \ + V(D8, 48, 48, 90), V(05, 03, 03, 06), V(01, F6, F6, F7), V(12, 0E, 0E, 1C), \ + V(A3, 61, 61, C2), V(5F, 35, 35, 6A), V(F9, 57, 57, AE), V(D0, B9, B9, 69), \ + V(91, 86, 86, 17), V(58, C1, C1, 99), V(27, 1D, 1D, 3A), V(B9, 9E, 9E, 27), \ + V(38, E1, E1, D9), V(13, F8, F8, EB), V(B3, 98, 98, 2B), V(33, 11, 11, 22), \ + V(BB, 69, 69, D2), V(70, D9, D9, A9), V(89, 8E, 8E, 07), V(A7, 94, 94, 33), \ + V(B6, 9B, 9B, 2D), V(22, 1E, 1E, 3C), V(92, 87, 87, 15), V(20, E9, E9, C9), \ + V(49, CE, CE, 87), V(FF, 55, 55, AA), V(78, 28, 28, 50), V(7A, DF, DF, A5), \ + V(8F, 8C, 8C, 03), V(F8, A1, A1, 59), V(80, 89, 89, 09), V(17, 0D, 0D, 1A), \ + V(DA, BF, BF, 65), V(31, E6, E6, D7), V(C6, 42, 42, 84), V(B8, 68, 68, D0), \ + V(C3, 41, 41, 82), V(B0, 99, 99, 29), V(77, 2D, 2D, 5A), V(11, 0F, 0F, 1E), \ + V(CB, B0, B0, 7B), V(FC, 54, 54, A8), V(D6, BB, BB, 6D), V(3A, 16, 16, 2C) + +#define V(a, b, c, d) 0x##a##b##c##d static const uint32_t FT0[256] = { FT }; #undef V #if !defined(MBEDTLS_AES_FEWER_TABLES) -#define V(a,b,c,d) 0x##b##c##d##a +#define V(a, b, c, d) 0x##b##c##d##a static const uint32_t FT1[256] = { FT }; #undef V -#define V(a,b,c,d) 0x##c##d##a##b +#define V(a, b, c, d) 0x##c##d##a##b static const uint32_t FT2[256] = { FT }; #undef V -#define V(a,b,c,d) 0x##d##a##b##c +#define V(a, b, c, d) 0x##d##a##b##c static const uint32_t FT3[256] = { FT }; #undef V @@ -265,86 +254,86 @@ static const unsigned char RSb[256] = */ #define RT \ \ - V(50,A7,F4,51), V(53,65,41,7E), V(C3,A4,17,1A), V(96,5E,27,3A), \ - V(CB,6B,AB,3B), V(F1,45,9D,1F), V(AB,58,FA,AC), V(93,03,E3,4B), \ - V(55,FA,30,20), V(F6,6D,76,AD), V(91,76,CC,88), V(25,4C,02,F5), \ - V(FC,D7,E5,4F), V(D7,CB,2A,C5), V(80,44,35,26), V(8F,A3,62,B5), \ - V(49,5A,B1,DE), V(67,1B,BA,25), V(98,0E,EA,45), V(E1,C0,FE,5D), \ - V(02,75,2F,C3), V(12,F0,4C,81), V(A3,97,46,8D), V(C6,F9,D3,6B), \ - V(E7,5F,8F,03), V(95,9C,92,15), V(EB,7A,6D,BF), V(DA,59,52,95), \ - V(2D,83,BE,D4), V(D3,21,74,58), V(29,69,E0,49), V(44,C8,C9,8E), \ - V(6A,89,C2,75), V(78,79,8E,F4), V(6B,3E,58,99), V(DD,71,B9,27), \ - V(B6,4F,E1,BE), V(17,AD,88,F0), V(66,AC,20,C9), V(B4,3A,CE,7D), \ - V(18,4A,DF,63), V(82,31,1A,E5), V(60,33,51,97), V(45,7F,53,62), \ - V(E0,77,64,B1), V(84,AE,6B,BB), V(1C,A0,81,FE), V(94,2B,08,F9), \ - V(58,68,48,70), V(19,FD,45,8F), V(87,6C,DE,94), V(B7,F8,7B,52), \ - V(23,D3,73,AB), V(E2,02,4B,72), V(57,8F,1F,E3), V(2A,AB,55,66), \ - V(07,28,EB,B2), V(03,C2,B5,2F), V(9A,7B,C5,86), V(A5,08,37,D3), \ - V(F2,87,28,30), V(B2,A5,BF,23), V(BA,6A,03,02), V(5C,82,16,ED), \ - V(2B,1C,CF,8A), V(92,B4,79,A7), V(F0,F2,07,F3), V(A1,E2,69,4E), \ - V(CD,F4,DA,65), V(D5,BE,05,06), V(1F,62,34,D1), V(8A,FE,A6,C4), \ - V(9D,53,2E,34), V(A0,55,F3,A2), V(32,E1,8A,05), V(75,EB,F6,A4), \ - V(39,EC,83,0B), V(AA,EF,60,40), V(06,9F,71,5E), V(51,10,6E,BD), \ - V(F9,8A,21,3E), V(3D,06,DD,96), V(AE,05,3E,DD), V(46,BD,E6,4D), \ - V(B5,8D,54,91), V(05,5D,C4,71), V(6F,D4,06,04), V(FF,15,50,60), \ - V(24,FB,98,19), V(97,E9,BD,D6), V(CC,43,40,89), V(77,9E,D9,67), \ - V(BD,42,E8,B0), V(88,8B,89,07), V(38,5B,19,E7), V(DB,EE,C8,79), \ - V(47,0A,7C,A1), V(E9,0F,42,7C), V(C9,1E,84,F8), V(00,00,00,00), \ - V(83,86,80,09), V(48,ED,2B,32), V(AC,70,11,1E), V(4E,72,5A,6C), \ - V(FB,FF,0E,FD), V(56,38,85,0F), V(1E,D5,AE,3D), V(27,39,2D,36), \ - V(64,D9,0F,0A), V(21,A6,5C,68), V(D1,54,5B,9B), V(3A,2E,36,24), \ - V(B1,67,0A,0C), V(0F,E7,57,93), V(D2,96,EE,B4), V(9E,91,9B,1B), \ - V(4F,C5,C0,80), V(A2,20,DC,61), V(69,4B,77,5A), V(16,1A,12,1C), \ - V(0A,BA,93,E2), V(E5,2A,A0,C0), V(43,E0,22,3C), V(1D,17,1B,12), \ - V(0B,0D,09,0E), V(AD,C7,8B,F2), V(B9,A8,B6,2D), V(C8,A9,1E,14), \ - V(85,19,F1,57), V(4C,07,75,AF), V(BB,DD,99,EE), V(FD,60,7F,A3), \ - V(9F,26,01,F7), V(BC,F5,72,5C), V(C5,3B,66,44), V(34,7E,FB,5B), \ - V(76,29,43,8B), V(DC,C6,23,CB), V(68,FC,ED,B6), V(63,F1,E4,B8), \ - V(CA,DC,31,D7), V(10,85,63,42), V(40,22,97,13), V(20,11,C6,84), \ - V(7D,24,4A,85), V(F8,3D,BB,D2), V(11,32,F9,AE), V(6D,A1,29,C7), \ - V(4B,2F,9E,1D), V(F3,30,B2,DC), V(EC,52,86,0D), V(D0,E3,C1,77), \ - V(6C,16,B3,2B), V(99,B9,70,A9), V(FA,48,94,11), V(22,64,E9,47), \ - V(C4,8C,FC,A8), V(1A,3F,F0,A0), V(D8,2C,7D,56), V(EF,90,33,22), \ - V(C7,4E,49,87), V(C1,D1,38,D9), V(FE,A2,CA,8C), V(36,0B,D4,98), \ - V(CF,81,F5,A6), V(28,DE,7A,A5), V(26,8E,B7,DA), V(A4,BF,AD,3F), \ - V(E4,9D,3A,2C), V(0D,92,78,50), V(9B,CC,5F,6A), V(62,46,7E,54), \ - V(C2,13,8D,F6), V(E8,B8,D8,90), V(5E,F7,39,2E), V(F5,AF,C3,82), \ - V(BE,80,5D,9F), V(7C,93,D0,69), V(A9,2D,D5,6F), V(B3,12,25,CF), \ - V(3B,99,AC,C8), V(A7,7D,18,10), V(6E,63,9C,E8), V(7B,BB,3B,DB), \ - V(09,78,26,CD), V(F4,18,59,6E), V(01,B7,9A,EC), V(A8,9A,4F,83), \ - V(65,6E,95,E6), V(7E,E6,FF,AA), V(08,CF,BC,21), V(E6,E8,15,EF), \ - V(D9,9B,E7,BA), V(CE,36,6F,4A), V(D4,09,9F,EA), V(D6,7C,B0,29), \ - V(AF,B2,A4,31), V(31,23,3F,2A), V(30,94,A5,C6), V(C0,66,A2,35), \ - V(37,BC,4E,74), V(A6,CA,82,FC), V(B0,D0,90,E0), V(15,D8,A7,33), \ - V(4A,98,04,F1), V(F7,DA,EC,41), V(0E,50,CD,7F), V(2F,F6,91,17), \ - V(8D,D6,4D,76), V(4D,B0,EF,43), V(54,4D,AA,CC), V(DF,04,96,E4), \ - V(E3,B5,D1,9E), V(1B,88,6A,4C), V(B8,1F,2C,C1), V(7F,51,65,46), \ - V(04,EA,5E,9D), V(5D,35,8C,01), V(73,74,87,FA), V(2E,41,0B,FB), \ - V(5A,1D,67,B3), V(52,D2,DB,92), V(33,56,10,E9), V(13,47,D6,6D), \ - V(8C,61,D7,9A), V(7A,0C,A1,37), V(8E,14,F8,59), V(89,3C,13,EB), \ - V(EE,27,A9,CE), V(35,C9,61,B7), V(ED,E5,1C,E1), V(3C,B1,47,7A), \ - V(59,DF,D2,9C), V(3F,73,F2,55), V(79,CE,14,18), V(BF,37,C7,73), \ - V(EA,CD,F7,53), V(5B,AA,FD,5F), V(14,6F,3D,DF), V(86,DB,44,78), \ - V(81,F3,AF,CA), V(3E,C4,68,B9), V(2C,34,24,38), V(5F,40,A3,C2), \ - V(72,C3,1D,16), V(0C,25,E2,BC), V(8B,49,3C,28), V(41,95,0D,FF), \ - V(71,01,A8,39), V(DE,B3,0C,08), V(9C,E4,B4,D8), V(90,C1,56,64), \ - V(61,84,CB,7B), V(70,B6,32,D5), V(74,5C,6C,48), V(42,57,B8,D0) - -#define V(a,b,c,d) 0x##a##b##c##d + V(50, A7, F4, 51), V(53, 65, 41, 7E), V(C3, A4, 17, 1A), V(96, 5E, 27, 3A), \ + V(CB, 6B, AB, 3B), V(F1, 45, 9D, 1F), V(AB, 58, FA, AC), V(93, 03, E3, 4B), \ + V(55, FA, 30, 20), V(F6, 6D, 76, AD), V(91, 76, CC, 88), V(25, 4C, 02, F5), \ + V(FC, D7, E5, 4F), V(D7, CB, 2A, C5), V(80, 44, 35, 26), V(8F, A3, 62, B5), \ + V(49, 5A, B1, DE), V(67, 1B, BA, 25), V(98, 0E, EA, 45), V(E1, C0, FE, 5D), \ + V(02, 75, 2F, C3), V(12, F0, 4C, 81), V(A3, 97, 46, 8D), V(C6, F9, D3, 6B), \ + V(E7, 5F, 8F, 03), V(95, 9C, 92, 15), V(EB, 7A, 6D, BF), V(DA, 59, 52, 95), \ + V(2D, 83, BE, D4), V(D3, 21, 74, 58), V(29, 69, E0, 49), V(44, C8, C9, 8E), \ + V(6A, 89, C2, 75), V(78, 79, 8E, F4), V(6B, 3E, 58, 99), V(DD, 71, B9, 27), \ + V(B6, 4F, E1, BE), V(17, AD, 88, F0), V(66, AC, 20, C9), V(B4, 3A, CE, 7D), \ + V(18, 4A, DF, 63), V(82, 31, 1A, E5), V(60, 33, 51, 97), V(45, 7F, 53, 62), \ + V(E0, 77, 64, B1), V(84, AE, 6B, BB), V(1C, A0, 81, FE), V(94, 2B, 08, F9), \ + V(58, 68, 48, 70), V(19, FD, 45, 8F), V(87, 6C, DE, 94), V(B7, F8, 7B, 52), \ + V(23, D3, 73, AB), V(E2, 02, 4B, 72), V(57, 8F, 1F, E3), V(2A, AB, 55, 66), \ + V(07, 28, EB, B2), V(03, C2, B5, 2F), V(9A, 7B, C5, 86), V(A5, 08, 37, D3), \ + V(F2, 87, 28, 30), V(B2, A5, BF, 23), V(BA, 6A, 03, 02), V(5C, 82, 16, ED), \ + V(2B, 1C, CF, 8A), V(92, B4, 79, A7), V(F0, F2, 07, F3), V(A1, E2, 69, 4E), \ + V(CD, F4, DA, 65), V(D5, BE, 05, 06), V(1F, 62, 34, D1), V(8A, FE, A6, C4), \ + V(9D, 53, 2E, 34), V(A0, 55, F3, A2), V(32, E1, 8A, 05), V(75, EB, F6, A4), \ + V(39, EC, 83, 0B), V(AA, EF, 60, 40), V(06, 9F, 71, 5E), V(51, 10, 6E, BD), \ + V(F9, 8A, 21, 3E), V(3D, 06, DD, 96), V(AE, 05, 3E, DD), V(46, BD, E6, 4D), \ + V(B5, 8D, 54, 91), V(05, 5D, C4, 71), V(6F, D4, 06, 04), V(FF, 15, 50, 60), \ + V(24, FB, 98, 19), V(97, E9, BD, D6), V(CC, 43, 40, 89), V(77, 9E, D9, 67), \ + V(BD, 42, E8, B0), V(88, 8B, 89, 07), V(38, 5B, 19, E7), V(DB, EE, C8, 79), \ + V(47, 0A, 7C, A1), V(E9, 0F, 42, 7C), V(C9, 1E, 84, F8), V(00, 00, 00, 00), \ + V(83, 86, 80, 09), V(48, ED, 2B, 32), V(AC, 70, 11, 1E), V(4E, 72, 5A, 6C), \ + V(FB, FF, 0E, FD), V(56, 38, 85, 0F), V(1E, D5, AE, 3D), V(27, 39, 2D, 36), \ + V(64, D9, 0F, 0A), V(21, A6, 5C, 68), V(D1, 54, 5B, 9B), V(3A, 2E, 36, 24), \ + V(B1, 67, 0A, 0C), V(0F, E7, 57, 93), V(D2, 96, EE, B4), V(9E, 91, 9B, 1B), \ + V(4F, C5, C0, 80), V(A2, 20, DC, 61), V(69, 4B, 77, 5A), V(16, 1A, 12, 1C), \ + V(0A, BA, 93, E2), V(E5, 2A, A0, C0), V(43, E0, 22, 3C), V(1D, 17, 1B, 12), \ + V(0B, 0D, 09, 0E), V(AD, C7, 8B, F2), V(B9, A8, B6, 2D), V(C8, A9, 1E, 14), \ + V(85, 19, F1, 57), V(4C, 07, 75, AF), V(BB, DD, 99, EE), V(FD, 60, 7F, A3), \ + V(9F, 26, 01, F7), V(BC, F5, 72, 5C), V(C5, 3B, 66, 44), V(34, 7E, FB, 5B), \ + V(76, 29, 43, 8B), V(DC, C6, 23, CB), V(68, FC, ED, B6), V(63, F1, E4, B8), \ + V(CA, DC, 31, D7), V(10, 85, 63, 42), V(40, 22, 97, 13), V(20, 11, C6, 84), \ + V(7D, 24, 4A, 85), V(F8, 3D, BB, D2), V(11, 32, F9, AE), V(6D, A1, 29, C7), \ + V(4B, 2F, 9E, 1D), V(F3, 30, B2, DC), V(EC, 52, 86, 0D), V(D0, E3, C1, 77), \ + V(6C, 16, B3, 2B), V(99, B9, 70, A9), V(FA, 48, 94, 11), V(22, 64, E9, 47), \ + V(C4, 8C, FC, A8), V(1A, 3F, F0, A0), V(D8, 2C, 7D, 56), V(EF, 90, 33, 22), \ + V(C7, 4E, 49, 87), V(C1, D1, 38, D9), V(FE, A2, CA, 8C), V(36, 0B, D4, 98), \ + V(CF, 81, F5, A6), V(28, DE, 7A, A5), V(26, 8E, B7, DA), V(A4, BF, AD, 3F), \ + V(E4, 9D, 3A, 2C), V(0D, 92, 78, 50), V(9B, CC, 5F, 6A), V(62, 46, 7E, 54), \ + V(C2, 13, 8D, F6), V(E8, B8, D8, 90), V(5E, F7, 39, 2E), V(F5, AF, C3, 82), \ + V(BE, 80, 5D, 9F), V(7C, 93, D0, 69), V(A9, 2D, D5, 6F), V(B3, 12, 25, CF), \ + V(3B, 99, AC, C8), V(A7, 7D, 18, 10), V(6E, 63, 9C, E8), V(7B, BB, 3B, DB), \ + V(09, 78, 26, CD), V(F4, 18, 59, 6E), V(01, B7, 9A, EC), V(A8, 9A, 4F, 83), \ + V(65, 6E, 95, E6), V(7E, E6, FF, AA), V(08, CF, BC, 21), V(E6, E8, 15, EF), \ + V(D9, 9B, E7, BA), V(CE, 36, 6F, 4A), V(D4, 09, 9F, EA), V(D6, 7C, B0, 29), \ + V(AF, B2, A4, 31), V(31, 23, 3F, 2A), V(30, 94, A5, C6), V(C0, 66, A2, 35), \ + V(37, BC, 4E, 74), V(A6, CA, 82, FC), V(B0, D0, 90, E0), V(15, D8, A7, 33), \ + V(4A, 98, 04, F1), V(F7, DA, EC, 41), V(0E, 50, CD, 7F), V(2F, F6, 91, 17), \ + V(8D, D6, 4D, 76), V(4D, B0, EF, 43), V(54, 4D, AA, CC), V(DF, 04, 96, E4), \ + V(E3, B5, D1, 9E), V(1B, 88, 6A, 4C), V(B8, 1F, 2C, C1), V(7F, 51, 65, 46), \ + V(04, EA, 5E, 9D), V(5D, 35, 8C, 01), V(73, 74, 87, FA), V(2E, 41, 0B, FB), \ + V(5A, 1D, 67, B3), V(52, D2, DB, 92), V(33, 56, 10, E9), V(13, 47, D6, 6D), \ + V(8C, 61, D7, 9A), V(7A, 0C, A1, 37), V(8E, 14, F8, 59), V(89, 3C, 13, EB), \ + V(EE, 27, A9, CE), V(35, C9, 61, B7), V(ED, E5, 1C, E1), V(3C, B1, 47, 7A), \ + V(59, DF, D2, 9C), V(3F, 73, F2, 55), V(79, CE, 14, 18), V(BF, 37, C7, 73), \ + V(EA, CD, F7, 53), V(5B, AA, FD, 5F), V(14, 6F, 3D, DF), V(86, DB, 44, 78), \ + V(81, F3, AF, CA), V(3E, C4, 68, B9), V(2C, 34, 24, 38), V(5F, 40, A3, C2), \ + V(72, C3, 1D, 16), V(0C, 25, E2, BC), V(8B, 49, 3C, 28), V(41, 95, 0D, FF), \ + V(71, 01, A8, 39), V(DE, B3, 0C, 08), V(9C, E4, B4, D8), V(90, C1, 56, 64), \ + V(61, 84, CB, 7B), V(70, B6, 32, D5), V(74, 5C, 6C, 48), V(42, 57, B8, D0) + +#define V(a, b, c, d) 0x##a##b##c##d static const uint32_t RT0[256] = { RT }; #undef V #if !defined(MBEDTLS_AES_FEWER_TABLES) -#define V(a,b,c,d) 0x##b##c##d##a +#define V(a, b, c, d) 0x##b##c##d##a static const uint32_t RT1[256] = { RT }; #undef V -#define V(a,b,c,d) 0x##c##d##a##b +#define V(a, b, c, d) 0x##c##d##a##b static const uint32_t RT2[256] = { RT }; #undef V -#define V(a,b,c,d) 0x##d##a##b##c +#define V(a, b, c, d) 0x##d##a##b##c static const uint32_t RT3[256] = { RT }; #undef V @@ -394,13 +383,13 @@ static uint32_t RCON[10]; /* * Tables generation code */ -#define ROTL8(x) ( ( (x) << 8 ) & 0xFFFFFFFF ) | ( (x) >> 24 ) -#define XTIME(x) ( ( (x) << 1 ) ^ ( ( (x) & 0x80 ) ? 0x1B : 0x00 ) ) -#define MUL(x,y) ( ( (x) && (y) ) ? pow[(log[(x)]+log[(y)]) % 255] : 0 ) +#define ROTL8(x) (((x) << 8) & 0xFFFFFFFF) | ((x) >> 24) +#define XTIME(x) (((x) << 1) ^ (((x) & 0x80) ? 0x1B : 0x00)) +#define MUL(x, y) (((x) && (y)) ? pow[(log[(x)]+log[(y)]) % 255] : 0) static int aes_init_done = 0; -static void aes_gen_tables( void ) +static void aes_gen_tables(void) { int i, x, y, z; int pow[256]; @@ -409,20 +398,18 @@ static void aes_gen_tables( void ) /* * compute pow and log tables over GF(2^8) */ - for( i = 0, x = 1; i < 256; i++ ) - { + for (i = 0, x = 1; i < 256; i++) { pow[i] = x; log[x] = i; - x = MBEDTLS_BYTE_0( x ^ XTIME( x ) ); + x = MBEDTLS_BYTE_0(x ^ XTIME(x)); } /* * calculate the round constants */ - for( i = 0, x = 1; i < 10; i++ ) - { + for (i = 0, x = 1; i < 10; i++) { RCON[i] = (uint32_t) x; - x = MBEDTLS_BYTE_0( XTIME( x ) ); + x = MBEDTLS_BYTE_0(XTIME(x)); } /* @@ -431,14 +418,13 @@ static void aes_gen_tables( void ) FSb[0x00] = 0x63; RSb[0x63] = 0x00; - for( i = 1; i < 256; i++ ) - { + for (i = 1; i < 256; i++) { x = pow[255 - log[i]]; - y = x; y = MBEDTLS_BYTE_0( ( y << 1 ) | ( y >> 7 ) ); - x ^= y; y = MBEDTLS_BYTE_0( ( y << 1 ) | ( y >> 7 ) ); - x ^= y; y = MBEDTLS_BYTE_0( ( y << 1 ) | ( y >> 7 ) ); - x ^= y; y = MBEDTLS_BYTE_0( ( y << 1 ) | ( y >> 7 ) ); + y = x; y = MBEDTLS_BYTE_0((y << 1) | (y >> 7)); + x ^= y; y = MBEDTLS_BYTE_0((y << 1) | (y >> 7)); + x ^= y; y = MBEDTLS_BYTE_0((y << 1) | (y >> 7)); + x ^= y; y = MBEDTLS_BYTE_0((y << 1) | (y >> 7)); x ^= y ^ 0x63; FSb[i] = (unsigned char) x; @@ -448,34 +434,33 @@ static void aes_gen_tables( void ) /* * generate the forward and reverse tables */ - for( i = 0; i < 256; i++ ) - { + for (i = 0; i < 256; i++) { x = FSb[i]; - y = MBEDTLS_BYTE_0( XTIME( x ) ); - z = MBEDTLS_BYTE_0( y ^ x ); + y = MBEDTLS_BYTE_0(XTIME(x)); + z = MBEDTLS_BYTE_0(y ^ x); - FT0[i] = ( (uint32_t) y ) ^ - ( (uint32_t) x << 8 ) ^ - ( (uint32_t) x << 16 ) ^ - ( (uint32_t) z << 24 ); + FT0[i] = ((uint32_t) y) ^ + ((uint32_t) x << 8) ^ + ((uint32_t) x << 16) ^ + ((uint32_t) z << 24); #if !defined(MBEDTLS_AES_FEWER_TABLES) - FT1[i] = ROTL8( FT0[i] ); - FT2[i] = ROTL8( FT1[i] ); - FT3[i] = ROTL8( FT2[i] ); + FT1[i] = ROTL8(FT0[i]); + FT2[i] = ROTL8(FT1[i]); + FT3[i] = ROTL8(FT2[i]); #endif /* !MBEDTLS_AES_FEWER_TABLES */ x = RSb[i]; - RT0[i] = ( (uint32_t) MUL( 0x0E, x ) ) ^ - ( (uint32_t) MUL( 0x09, x ) << 8 ) ^ - ( (uint32_t) MUL( 0x0D, x ) << 16 ) ^ - ( (uint32_t) MUL( 0x0B, x ) << 24 ); + RT0[i] = ((uint32_t) MUL(0x0E, x)) ^ + ((uint32_t) MUL(0x09, x) << 8) ^ + ((uint32_t) MUL(0x0D, x) << 16) ^ + ((uint32_t) MUL(0x0B, x) << 24); #if !defined(MBEDTLS_AES_FEWER_TABLES) - RT1[i] = ROTL8( RT0[i] ); - RT2[i] = ROTL8( RT1[i] ); - RT3[i] = ROTL8( RT2[i] ); + RT1[i] = ROTL8(RT0[i]); + RT2[i] = ROTL8(RT1[i]); + RT3[i] = ROTL8(RT2[i]); #endif /* !MBEDTLS_AES_FEWER_TABLES */ } } @@ -484,21 +469,21 @@ static void aes_gen_tables( void ) #endif /* MBEDTLS_AES_ROM_TABLES */ - #if defined(MBEDTLS_AES_FEWER_TABLES) +#if defined(MBEDTLS_AES_FEWER_TABLES) -#define ROTL8(x) ( (uint32_t)( ( x ) << 8 ) + (uint32_t)( ( x ) >> 24 ) ) -#define ROTL16(x) ( (uint32_t)( ( x ) << 16 ) + (uint32_t)( ( x ) >> 16 ) ) -#define ROTL24(x) ( (uint32_t)( ( x ) << 24 ) + (uint32_t)( ( x ) >> 8 ) ) +#define ROTL8(x) ((uint32_t) ((x) << 8) + (uint32_t) ((x) >> 24)) +#define ROTL16(x) ((uint32_t) ((x) << 16) + (uint32_t) ((x) >> 16)) +#define ROTL24(x) ((uint32_t) ((x) << 24) + (uint32_t) ((x) >> 8)) #define AES_RT0(idx) RT0[idx] -#define AES_RT1(idx) ROTL8( RT0[idx] ) -#define AES_RT2(idx) ROTL16( RT0[idx] ) -#define AES_RT3(idx) ROTL24( RT0[idx] ) +#define AES_RT1(idx) ROTL8(RT0[idx]) +#define AES_RT2(idx) ROTL16(RT0[idx]) +#define AES_RT3(idx) ROTL24(RT0[idx]) #define AES_FT0(idx) FT0[idx] -#define AES_FT1(idx) ROTL8( FT0[idx] ) -#define AES_FT2(idx) ROTL16( FT0[idx] ) -#define AES_FT3(idx) ROTL24( FT0[idx] ) +#define AES_FT1(idx) ROTL8(FT0[idx]) +#define AES_FT2(idx) ROTL16(FT0[idx]) +#define AES_FT3(idx) ROTL24(FT0[idx]) #else /* MBEDTLS_AES_FEWER_TABLES */ @@ -516,101 +501,138 @@ static void aes_gen_tables( void ) #endif // FSP_NOT_DEFINED -void mbedtls_aes_init( mbedtls_aes_context *ctx ) +void mbedtls_aes_init(mbedtls_aes_context *ctx) { - AES_VALIDATE( ctx != NULL ); - - memset( ctx, 0, sizeof( mbedtls_aes_context ) ); + memset(ctx, 0, sizeof(mbedtls_aes_context)); } -void mbedtls_aes_free( mbedtls_aes_context *ctx ) +void mbedtls_aes_free(mbedtls_aes_context *ctx) { - if( ctx == NULL ) + if (ctx == NULL) { return; + } - mbedtls_platform_zeroize( ctx, sizeof( mbedtls_aes_context ) ); + mbedtls_platform_zeroize(ctx, sizeof(mbedtls_aes_context)); } #if defined(MBEDTLS_CIPHER_MODE_XTS) -void mbedtls_aes_xts_init( mbedtls_aes_xts_context *ctx ) +void mbedtls_aes_xts_init(mbedtls_aes_xts_context *ctx) { - AES_VALIDATE( ctx != NULL ); - - mbedtls_aes_init( &ctx->crypt ); - mbedtls_aes_init( &ctx->tweak ); + mbedtls_aes_init(&ctx->crypt); + mbedtls_aes_init(&ctx->tweak); } -void mbedtls_aes_xts_free( mbedtls_aes_xts_context *ctx ) +void mbedtls_aes_xts_free(mbedtls_aes_xts_context *ctx) { - if( ctx == NULL ) + if (ctx == NULL) { return; + } - mbedtls_aes_free( &ctx->crypt ); - mbedtls_aes_free( &ctx->tweak ); + mbedtls_aes_free(&ctx->crypt); + mbedtls_aes_free(&ctx->tweak); } #endif /* MBEDTLS_CIPHER_MODE_XTS */ +/* Some implementations need the round keys to be aligned. + * Return an offset to be added to buf, such that (buf + offset) is + * correctly aligned. + * Note that the offset is in units of elements of buf, i.e. 32-bit words, + * i.e. an offset of 1 means 4 bytes and so on. + */ +#if (defined(MBEDTLS_PADLOCK_C) && defined(MBEDTLS_HAVE_X86)) || \ + (defined(MBEDTLS_AESNI_C) && MBEDTLS_AESNI_HAVE_CODE == 2) +#define MAY_NEED_TO_ALIGN +#endif +static unsigned mbedtls_aes_rk_offset(uint32_t *buf) +{ +#if defined(MAY_NEED_TO_ALIGN) + int align_16_bytes = 0; + +#if defined(MBEDTLS_PADLOCK_C) && defined(MBEDTLS_HAVE_X86) + if (aes_padlock_ace == -1) { + aes_padlock_ace = mbedtls_padlock_has_support(MBEDTLS_PADLOCK_ACE); + } + if (aes_padlock_ace) { + align_16_bytes = 1; + } +#endif + +#if defined(MBEDTLS_AESNI_C) && MBEDTLS_AESNI_HAVE_CODE == 2 + if (mbedtls_aesni_has_support(MBEDTLS_AESNI_AES)) { + align_16_bytes = 1; + } +#endif + + if (align_16_bytes) { + /* These implementations needs 16-byte alignment + * for the round key array. */ + unsigned delta = ((uintptr_t) buf & 0x0000000fU) / 4; + if (delta == 0) { + return 0; + } else { + return 4 - delta; // 16 bytes = 4 uint32_t + } + } +#else /* MAY_NEED_TO_ALIGN */ + (void) buf; +#endif /* MAY_NEED_TO_ALIGN */ + + return 0; +} + #ifdef FSP_NOT_DEFINED /* * AES key schedule (encryption) */ #if !defined(MBEDTLS_AES_SETKEY_ENC_ALT) -int mbedtls_aes_setkey_enc( mbedtls_aes_context *ctx, const unsigned char *key, - unsigned int keybits ) +int mbedtls_aes_setkey_enc(mbedtls_aes_context *ctx, const unsigned char *key, + unsigned int keybits) { unsigned int i; uint32_t *RK; - AES_VALIDATE_RET( ctx != NULL ); - AES_VALIDATE_RET( key != NULL ); - - switch( keybits ) - { + switch (keybits) { case 128: ctx->nr = 10; break; case 192: ctx->nr = 12; break; case 256: ctx->nr = 14; break; - default : return( MBEDTLS_ERR_AES_INVALID_KEY_LENGTH ); + default: return MBEDTLS_ERR_AES_INVALID_KEY_LENGTH; } #if !defined(MBEDTLS_AES_ROM_TABLES) - if( aes_init_done == 0 ) - { + if (aes_init_done == 0) { aes_gen_tables(); aes_init_done = 1; } #endif -#if defined(MBEDTLS_PADLOCK_C) && defined(MBEDTLS_PADLOCK_ALIGN16) - if( aes_padlock_ace == -1 ) - aes_padlock_ace = mbedtls_padlock_has_support( MBEDTLS_PADLOCK_ACE ); + ctx->rk_offset = mbedtls_aes_rk_offset(ctx->buf); + RK = ctx->buf + ctx->rk_offset; - if( aes_padlock_ace ) - ctx->rk = RK = MBEDTLS_PADLOCK_ALIGN16( ctx->buf ); - else +#if defined(MBEDTLS_AESNI_HAVE_CODE) + if (mbedtls_aesni_has_support(MBEDTLS_AESNI_AES)) { + return mbedtls_aesni_setkey_enc((unsigned char *) RK, key, keybits); + } #endif - ctx->rk = RK = ctx->buf; -#if defined(MBEDTLS_AESNI_C) && defined(MBEDTLS_HAVE_X86_64) - if( mbedtls_aesni_has_support( MBEDTLS_AESNI_AES ) ) - return( mbedtls_aesni_setkey_enc( (unsigned char *) ctx->rk, key, keybits ) ); +#if defined(MBEDTLS_AESCE_C) && defined(MBEDTLS_HAVE_ARM64) + if (mbedtls_aesce_has_support()) { + return mbedtls_aesce_setkey_enc((unsigned char *) RK, key, keybits); + } #endif - for( i = 0; i < ( keybits >> 5 ); i++ ) - { - RK[i] = MBEDTLS_GET_UINT32_LE( key, i << 2 ); + for (i = 0; i < (keybits >> 5); i++) { + RK[i] = MBEDTLS_GET_UINT32_LE(key, i << 2); } - switch( ctx->nr ) - { + switch (ctx->nr) { case 10: - for( i = 0; i < 10; i++, RK += 4 ) - { + for (i = 0; i < 10; i++, RK += 4) { RK[4] = RK[0] ^ RCON[i] ^ - ( (uint32_t) FSb[ MBEDTLS_BYTE_1( RK[3] ) ] ) ^ - ( (uint32_t) FSb[ MBEDTLS_BYTE_2( RK[3] ) ] << 8 ) ^ - ( (uint32_t) FSb[ MBEDTLS_BYTE_3( RK[3] ) ] << 16 ) ^ - ( (uint32_t) FSb[ MBEDTLS_BYTE_0( RK[3] ) ] << 24 ); + ((uint32_t) FSb[MBEDTLS_BYTE_1(RK[3])]) ^ + ((uint32_t) FSb[MBEDTLS_BYTE_2(RK[3])] << 8) ^ + ((uint32_t) FSb[MBEDTLS_BYTE_3(RK[3])] << 16) ^ + ((uint32_t) FSb[MBEDTLS_BYTE_0(RK[3])] << 24); RK[5] = RK[1] ^ RK[4]; RK[6] = RK[2] ^ RK[5]; @@ -620,13 +642,12 @@ int mbedtls_aes_setkey_enc( mbedtls_aes_context *ctx, const unsigned char *key, case 12: - for( i = 0; i < 8; i++, RK += 6 ) - { + for (i = 0; i < 8; i++, RK += 6) { RK[6] = RK[0] ^ RCON[i] ^ - ( (uint32_t) FSb[ MBEDTLS_BYTE_1( RK[5] ) ] ) ^ - ( (uint32_t) FSb[ MBEDTLS_BYTE_2( RK[5] ) ] << 8 ) ^ - ( (uint32_t) FSb[ MBEDTLS_BYTE_3( RK[5] ) ] << 16 ) ^ - ( (uint32_t) FSb[ MBEDTLS_BYTE_0( RK[5] ) ] << 24 ); + ((uint32_t) FSb[MBEDTLS_BYTE_1(RK[5])]) ^ + ((uint32_t) FSb[MBEDTLS_BYTE_2(RK[5])] << 8) ^ + ((uint32_t) FSb[MBEDTLS_BYTE_3(RK[5])] << 16) ^ + ((uint32_t) FSb[MBEDTLS_BYTE_0(RK[5])] << 24); RK[7] = RK[1] ^ RK[6]; RK[8] = RK[2] ^ RK[7]; @@ -638,23 +659,22 @@ int mbedtls_aes_setkey_enc( mbedtls_aes_context *ctx, const unsigned char *key, case 14: - for( i = 0; i < 7; i++, RK += 8 ) - { + for (i = 0; i < 7; i++, RK += 8) { RK[8] = RK[0] ^ RCON[i] ^ - ( (uint32_t) FSb[ MBEDTLS_BYTE_1( RK[7] ) ] ) ^ - ( (uint32_t) FSb[ MBEDTLS_BYTE_2( RK[7] ) ] << 8 ) ^ - ( (uint32_t) FSb[ MBEDTLS_BYTE_3( RK[7] ) ] << 16 ) ^ - ( (uint32_t) FSb[ MBEDTLS_BYTE_0( RK[7] ) ] << 24 ); + ((uint32_t) FSb[MBEDTLS_BYTE_1(RK[7])]) ^ + ((uint32_t) FSb[MBEDTLS_BYTE_2(RK[7])] << 8) ^ + ((uint32_t) FSb[MBEDTLS_BYTE_3(RK[7])] << 16) ^ + ((uint32_t) FSb[MBEDTLS_BYTE_0(RK[7])] << 24); RK[9] = RK[1] ^ RK[8]; RK[10] = RK[2] ^ RK[9]; RK[11] = RK[3] ^ RK[10]; RK[12] = RK[4] ^ - ( (uint32_t) FSb[ MBEDTLS_BYTE_0( RK[11] ) ] ) ^ - ( (uint32_t) FSb[ MBEDTLS_BYTE_1( RK[11] ) ] << 8 ) ^ - ( (uint32_t) FSb[ MBEDTLS_BYTE_2( RK[11] ) ] << 16 ) ^ - ( (uint32_t) FSb[ MBEDTLS_BYTE_3( RK[11] ) ] << 24 ); + ((uint32_t) FSb[MBEDTLS_BYTE_0(RK[11])]) ^ + ((uint32_t) FSb[MBEDTLS_BYTE_1(RK[11])] << 8) ^ + ((uint32_t) FSb[MBEDTLS_BYTE_2(RK[11])] << 16) ^ + ((uint32_t) FSb[MBEDTLS_BYTE_3(RK[11])] << 24); RK[13] = RK[5] ^ RK[12]; RK[14] = RK[6] ^ RK[13]; @@ -663,7 +683,7 @@ int mbedtls_aes_setkey_enc( mbedtls_aes_context *ctx, const unsigned char *key, break; } - return( 0 ); + return 0; } #endif /* !MBEDTLS_AES_SETKEY_ENC_ALT */ @@ -671,59 +691,57 @@ int mbedtls_aes_setkey_enc( mbedtls_aes_context *ctx, const unsigned char *key, * AES key schedule (decryption) */ #if !defined(MBEDTLS_AES_SETKEY_DEC_ALT) -int mbedtls_aes_setkey_dec( mbedtls_aes_context *ctx, const unsigned char *key, - unsigned int keybits ) +int mbedtls_aes_setkey_dec(mbedtls_aes_context *ctx, const unsigned char *key, + unsigned int keybits) { int i, j, ret; mbedtls_aes_context cty; uint32_t *RK; uint32_t *SK; - AES_VALIDATE_RET( ctx != NULL ); - AES_VALIDATE_RET( key != NULL ); + mbedtls_aes_init(&cty); - mbedtls_aes_init( &cty ); - -#if defined(MBEDTLS_PADLOCK_C) && defined(MBEDTLS_PADLOCK_ALIGN16) - if( aes_padlock_ace == -1 ) - aes_padlock_ace = mbedtls_padlock_has_support( MBEDTLS_PADLOCK_ACE ); - - if( aes_padlock_ace ) - ctx->rk = RK = MBEDTLS_PADLOCK_ALIGN16( ctx->buf ); - else -#endif - ctx->rk = RK = ctx->buf; + ctx->rk_offset = mbedtls_aes_rk_offset(ctx->buf); + RK = ctx->buf + ctx->rk_offset; /* Also checks keybits */ - if( ( ret = mbedtls_aes_setkey_enc( &cty, key, keybits ) ) != 0 ) + if ((ret = mbedtls_aes_setkey_enc(&cty, key, keybits)) != 0) { goto exit; + } ctx->nr = cty.nr; -#if defined(MBEDTLS_AESNI_C) && defined(MBEDTLS_HAVE_X86_64) - if( mbedtls_aesni_has_support( MBEDTLS_AESNI_AES ) ) - { - mbedtls_aesni_inverse_key( (unsigned char *) ctx->rk, - (const unsigned char *) cty.rk, ctx->nr ); +#if defined(MBEDTLS_AESNI_HAVE_CODE) + if (mbedtls_aesni_has_support(MBEDTLS_AESNI_AES)) { + mbedtls_aesni_inverse_key((unsigned char *) RK, + (const unsigned char *) (cty.buf + cty.rk_offset), ctx->nr); + goto exit; + } +#endif + +#if defined(MBEDTLS_AESCE_C) && defined(MBEDTLS_HAVE_ARM64) + if (mbedtls_aesce_has_support()) { + mbedtls_aesce_inverse_key( + (unsigned char *) RK, + (const unsigned char *) (cty.buf + cty.rk_offset), + ctx->nr); goto exit; } #endif - SK = cty.rk + cty.nr * 4; + SK = cty.buf + cty.rk_offset + cty.nr * 4; *RK++ = *SK++; *RK++ = *SK++; *RK++ = *SK++; *RK++ = *SK++; - for( i = ctx->nr - 1, SK -= 8; i > 0; i--, SK -= 8 ) - { - for( j = 0; j < 4; j++, SK++ ) - { - *RK++ = AES_RT0( FSb[ MBEDTLS_BYTE_0( *SK ) ] ) ^ - AES_RT1( FSb[ MBEDTLS_BYTE_1( *SK ) ] ) ^ - AES_RT2( FSb[ MBEDTLS_BYTE_2( *SK ) ] ) ^ - AES_RT3( FSb[ MBEDTLS_BYTE_3( *SK ) ] ); + for (i = ctx->nr - 1, SK -= 8; i > 0; i--, SK -= 8) { + for (j = 0; j < 4; j++, SK++) { + *RK++ = AES_RT0(FSb[MBEDTLS_BYTE_0(*SK)]) ^ + AES_RT1(FSb[MBEDTLS_BYTE_1(*SK)]) ^ + AES_RT2(FSb[MBEDTLS_BYTE_2(*SK)]) ^ + AES_RT3(FSb[MBEDTLS_BYTE_3(*SK)]); } } @@ -733,27 +751,26 @@ int mbedtls_aes_setkey_dec( mbedtls_aes_context *ctx, const unsigned char *key, *RK++ = *SK++; exit: - mbedtls_aes_free( &cty ); + mbedtls_aes_free(&cty); - return( ret ); + return ret; } #if defined(MBEDTLS_CIPHER_MODE_XTS) -static int mbedtls_aes_xts_decode_keys( const unsigned char *key, - unsigned int keybits, - const unsigned char **key1, - unsigned int *key1bits, - const unsigned char **key2, - unsigned int *key2bits ) +static int mbedtls_aes_xts_decode_keys(const unsigned char *key, + unsigned int keybits, + const unsigned char **key1, + unsigned int *key1bits, + const unsigned char **key2, + unsigned int *key2bits) { const unsigned int half_keybits = keybits / 2; const unsigned int half_keybytes = half_keybits / 8; - switch( keybits ) - { + switch (keybits) { case 256: break; case 512: break; - default : return( MBEDTLS_ERR_AES_INVALID_KEY_LENGTH ); + default: return MBEDTLS_ERR_AES_INVALID_KEY_LENGTH; } *key1bits = half_keybits; @@ -764,168 +781,164 @@ static int mbedtls_aes_xts_decode_keys( const unsigned char *key, return 0; } -int mbedtls_aes_xts_setkey_enc( mbedtls_aes_xts_context *ctx, - const unsigned char *key, - unsigned int keybits) +int mbedtls_aes_xts_setkey_enc(mbedtls_aes_xts_context *ctx, + const unsigned char *key, + unsigned int keybits) { int ret = MBEDTLS_ERR_ERROR_CORRUPTION_DETECTED; const unsigned char *key1, *key2; unsigned int key1bits, key2bits; - AES_VALIDATE_RET( ctx != NULL ); - AES_VALIDATE_RET( key != NULL ); - - ret = mbedtls_aes_xts_decode_keys( key, keybits, &key1, &key1bits, - &key2, &key2bits ); - if( ret != 0 ) - return( ret ); + ret = mbedtls_aes_xts_decode_keys(key, keybits, &key1, &key1bits, + &key2, &key2bits); + if (ret != 0) { + return ret; + } /* Set the tweak key. Always set tweak key for the encryption mode. */ - ret = mbedtls_aes_setkey_enc( &ctx->tweak, key2, key2bits ); - if( ret != 0 ) - return( ret ); + ret = mbedtls_aes_setkey_enc(&ctx->tweak, key2, key2bits); + if (ret != 0) { + return ret; + } /* Set crypt key for encryption. */ - return mbedtls_aes_setkey_enc( &ctx->crypt, key1, key1bits ); + return mbedtls_aes_setkey_enc(&ctx->crypt, key1, key1bits); } -int mbedtls_aes_xts_setkey_dec( mbedtls_aes_xts_context *ctx, - const unsigned char *key, - unsigned int keybits) +int mbedtls_aes_xts_setkey_dec(mbedtls_aes_xts_context *ctx, + const unsigned char *key, + unsigned int keybits) { int ret = MBEDTLS_ERR_ERROR_CORRUPTION_DETECTED; const unsigned char *key1, *key2; unsigned int key1bits, key2bits; - AES_VALIDATE_RET( ctx != NULL ); - AES_VALIDATE_RET( key != NULL ); - - ret = mbedtls_aes_xts_decode_keys( key, keybits, &key1, &key1bits, - &key2, &key2bits ); - if( ret != 0 ) - return( ret ); + ret = mbedtls_aes_xts_decode_keys(key, keybits, &key1, &key1bits, + &key2, &key2bits); + if (ret != 0) { + return ret; + } /* Set the tweak key. Always set tweak key for encryption. */ - ret = mbedtls_aes_setkey_enc( &ctx->tweak, key2, key2bits ); - if( ret != 0 ) - return( ret ); + ret = mbedtls_aes_setkey_enc(&ctx->tweak, key2, key2bits); + if (ret != 0) { + return ret; + } /* Set crypt key for decryption. */ - return mbedtls_aes_setkey_dec( &ctx->crypt, key1, key1bits ); + return mbedtls_aes_setkey_dec(&ctx->crypt, key1, key1bits); } #endif /* MBEDTLS_CIPHER_MODE_XTS */ #endif /* !MBEDTLS_AES_SETKEY_DEC_ALT */ -#define AES_FROUND(X0,X1,X2,X3,Y0,Y1,Y2,Y3) \ +#define AES_FROUND(X0, X1, X2, X3, Y0, Y1, Y2, Y3) \ do \ { \ - (X0) = *RK++ ^ AES_FT0( MBEDTLS_BYTE_0( Y0 ) ) ^ \ - AES_FT1( MBEDTLS_BYTE_1( Y1 ) ) ^ \ - AES_FT2( MBEDTLS_BYTE_2( Y2 ) ) ^ \ - AES_FT3( MBEDTLS_BYTE_3( Y3 ) ); \ + (X0) = *RK++ ^ AES_FT0(MBEDTLS_BYTE_0(Y0)) ^ \ + AES_FT1(MBEDTLS_BYTE_1(Y1)) ^ \ + AES_FT2(MBEDTLS_BYTE_2(Y2)) ^ \ + AES_FT3(MBEDTLS_BYTE_3(Y3)); \ \ - (X1) = *RK++ ^ AES_FT0( MBEDTLS_BYTE_0( Y1 ) ) ^ \ - AES_FT1( MBEDTLS_BYTE_1( Y2 ) ) ^ \ - AES_FT2( MBEDTLS_BYTE_2( Y3 ) ) ^ \ - AES_FT3( MBEDTLS_BYTE_3( Y0 ) ); \ + (X1) = *RK++ ^ AES_FT0(MBEDTLS_BYTE_0(Y1)) ^ \ + AES_FT1(MBEDTLS_BYTE_1(Y2)) ^ \ + AES_FT2(MBEDTLS_BYTE_2(Y3)) ^ \ + AES_FT3(MBEDTLS_BYTE_3(Y0)); \ \ - (X2) = *RK++ ^ AES_FT0( MBEDTLS_BYTE_0( Y2 ) ) ^ \ - AES_FT1( MBEDTLS_BYTE_1( Y3 ) ) ^ \ - AES_FT2( MBEDTLS_BYTE_2( Y0 ) ) ^ \ - AES_FT3( MBEDTLS_BYTE_3( Y1 ) ); \ + (X2) = *RK++ ^ AES_FT0(MBEDTLS_BYTE_0(Y2)) ^ \ + AES_FT1(MBEDTLS_BYTE_1(Y3)) ^ \ + AES_FT2(MBEDTLS_BYTE_2(Y0)) ^ \ + AES_FT3(MBEDTLS_BYTE_3(Y1)); \ \ - (X3) = *RK++ ^ AES_FT0( MBEDTLS_BYTE_0( Y3 ) ) ^ \ - AES_FT1( MBEDTLS_BYTE_1( Y0 ) ) ^ \ - AES_FT2( MBEDTLS_BYTE_2( Y1 ) ) ^ \ - AES_FT3( MBEDTLS_BYTE_3( Y2 ) ); \ - } while( 0 ) + (X3) = *RK++ ^ AES_FT0(MBEDTLS_BYTE_0(Y3)) ^ \ + AES_FT1(MBEDTLS_BYTE_1(Y0)) ^ \ + AES_FT2(MBEDTLS_BYTE_2(Y1)) ^ \ + AES_FT3(MBEDTLS_BYTE_3(Y2)); \ + } while (0) -#define AES_RROUND(X0,X1,X2,X3,Y0,Y1,Y2,Y3) \ +#define AES_RROUND(X0, X1, X2, X3, Y0, Y1, Y2, Y3) \ do \ { \ - (X0) = *RK++ ^ AES_RT0( MBEDTLS_BYTE_0( Y0 ) ) ^ \ - AES_RT1( MBEDTLS_BYTE_1( Y3 ) ) ^ \ - AES_RT2( MBEDTLS_BYTE_2( Y2 ) ) ^ \ - AES_RT3( MBEDTLS_BYTE_3( Y1 ) ); \ + (X0) = *RK++ ^ AES_RT0(MBEDTLS_BYTE_0(Y0)) ^ \ + AES_RT1(MBEDTLS_BYTE_1(Y3)) ^ \ + AES_RT2(MBEDTLS_BYTE_2(Y2)) ^ \ + AES_RT3(MBEDTLS_BYTE_3(Y1)); \ \ - (X1) = *RK++ ^ AES_RT0( MBEDTLS_BYTE_0( Y1 ) ) ^ \ - AES_RT1( MBEDTLS_BYTE_1( Y0 ) ) ^ \ - AES_RT2( MBEDTLS_BYTE_2( Y3 ) ) ^ \ - AES_RT3( MBEDTLS_BYTE_3( Y2 ) ); \ + (X1) = *RK++ ^ AES_RT0(MBEDTLS_BYTE_0(Y1)) ^ \ + AES_RT1(MBEDTLS_BYTE_1(Y0)) ^ \ + AES_RT2(MBEDTLS_BYTE_2(Y3)) ^ \ + AES_RT3(MBEDTLS_BYTE_3(Y2)); \ \ - (X2) = *RK++ ^ AES_RT0( MBEDTLS_BYTE_0( Y2 ) ) ^ \ - AES_RT1( MBEDTLS_BYTE_1( Y1 ) ) ^ \ - AES_RT2( MBEDTLS_BYTE_2( Y0 ) ) ^ \ - AES_RT3( MBEDTLS_BYTE_3( Y3 ) ); \ + (X2) = *RK++ ^ AES_RT0(MBEDTLS_BYTE_0(Y2)) ^ \ + AES_RT1(MBEDTLS_BYTE_1(Y1)) ^ \ + AES_RT2(MBEDTLS_BYTE_2(Y0)) ^ \ + AES_RT3(MBEDTLS_BYTE_3(Y3)); \ \ - (X3) = *RK++ ^ AES_RT0( MBEDTLS_BYTE_0( Y3 ) ) ^ \ - AES_RT1( MBEDTLS_BYTE_1( Y2 ) ) ^ \ - AES_RT2( MBEDTLS_BYTE_2( Y1 ) ) ^ \ - AES_RT3( MBEDTLS_BYTE_3( Y0 ) ); \ - } while( 0 ) + (X3) = *RK++ ^ AES_RT0(MBEDTLS_BYTE_0(Y3)) ^ \ + AES_RT1(MBEDTLS_BYTE_1(Y2)) ^ \ + AES_RT2(MBEDTLS_BYTE_2(Y1)) ^ \ + AES_RT3(MBEDTLS_BYTE_3(Y0)); \ + } while (0) /* * AES-ECB block encryption */ #if !defined(MBEDTLS_AES_ENCRYPT_ALT) -int mbedtls_internal_aes_encrypt( mbedtls_aes_context *ctx, - const unsigned char input[16], - unsigned char output[16] ) +int mbedtls_internal_aes_encrypt(mbedtls_aes_context *ctx, + const unsigned char input[16], + unsigned char output[16]) { int i; - uint32_t *RK = ctx->rk; - struct - { + uint32_t *RK = ctx->buf + ctx->rk_offset; + struct { uint32_t X[4]; uint32_t Y[4]; } t; - t.X[0] = MBEDTLS_GET_UINT32_LE( input, 0 ); t.X[0] ^= *RK++; - t.X[1] = MBEDTLS_GET_UINT32_LE( input, 4 ); t.X[1] ^= *RK++; - t.X[2] = MBEDTLS_GET_UINT32_LE( input, 8 ); t.X[2] ^= *RK++; - t.X[3] = MBEDTLS_GET_UINT32_LE( input, 12 ); t.X[3] ^= *RK++; + t.X[0] = MBEDTLS_GET_UINT32_LE(input, 0); t.X[0] ^= *RK++; + t.X[1] = MBEDTLS_GET_UINT32_LE(input, 4); t.X[1] ^= *RK++; + t.X[2] = MBEDTLS_GET_UINT32_LE(input, 8); t.X[2] ^= *RK++; + t.X[3] = MBEDTLS_GET_UINT32_LE(input, 12); t.X[3] ^= *RK++; - for( i = ( ctx->nr >> 1 ) - 1; i > 0; i-- ) - { - AES_FROUND( t.Y[0], t.Y[1], t.Y[2], t.Y[3], t.X[0], t.X[1], t.X[2], t.X[3] ); - AES_FROUND( t.X[0], t.X[1], t.X[2], t.X[3], t.Y[0], t.Y[1], t.Y[2], t.Y[3] ); + for (i = (ctx->nr >> 1) - 1; i > 0; i--) { + AES_FROUND(t.Y[0], t.Y[1], t.Y[2], t.Y[3], t.X[0], t.X[1], t.X[2], t.X[3]); + AES_FROUND(t.X[0], t.X[1], t.X[2], t.X[3], t.Y[0], t.Y[1], t.Y[2], t.Y[3]); } - AES_FROUND( t.Y[0], t.Y[1], t.Y[2], t.Y[3], t.X[0], t.X[1], t.X[2], t.X[3] ); + AES_FROUND(t.Y[0], t.Y[1], t.Y[2], t.Y[3], t.X[0], t.X[1], t.X[2], t.X[3]); - t.X[0] = *RK++ ^ \ - ( (uint32_t) FSb[ MBEDTLS_BYTE_0( t.Y[0] ) ] ) ^ - ( (uint32_t) FSb[ MBEDTLS_BYTE_1( t.Y[1] ) ] << 8 ) ^ - ( (uint32_t) FSb[ MBEDTLS_BYTE_2( t.Y[2] ) ] << 16 ) ^ - ( (uint32_t) FSb[ MBEDTLS_BYTE_3( t.Y[3] ) ] << 24 ); + t.X[0] = *RK++ ^ \ + ((uint32_t) FSb[MBEDTLS_BYTE_0(t.Y[0])]) ^ + ((uint32_t) FSb[MBEDTLS_BYTE_1(t.Y[1])] << 8) ^ + ((uint32_t) FSb[MBEDTLS_BYTE_2(t.Y[2])] << 16) ^ + ((uint32_t) FSb[MBEDTLS_BYTE_3(t.Y[3])] << 24); t.X[1] = *RK++ ^ \ - ( (uint32_t) FSb[ MBEDTLS_BYTE_0( t.Y[1] ) ] ) ^ - ( (uint32_t) FSb[ MBEDTLS_BYTE_1( t.Y[2] ) ] << 8 ) ^ - ( (uint32_t) FSb[ MBEDTLS_BYTE_2( t.Y[3] ) ] << 16 ) ^ - ( (uint32_t) FSb[ MBEDTLS_BYTE_3( t.Y[0] ) ] << 24 ); + ((uint32_t) FSb[MBEDTLS_BYTE_0(t.Y[1])]) ^ + ((uint32_t) FSb[MBEDTLS_BYTE_1(t.Y[2])] << 8) ^ + ((uint32_t) FSb[MBEDTLS_BYTE_2(t.Y[3])] << 16) ^ + ((uint32_t) FSb[MBEDTLS_BYTE_3(t.Y[0])] << 24); t.X[2] = *RK++ ^ \ - ( (uint32_t) FSb[ MBEDTLS_BYTE_0( t.Y[2] ) ] ) ^ - ( (uint32_t) FSb[ MBEDTLS_BYTE_1( t.Y[3] ) ] << 8 ) ^ - ( (uint32_t) FSb[ MBEDTLS_BYTE_2( t.Y[0] ) ] << 16 ) ^ - ( (uint32_t) FSb[ MBEDTLS_BYTE_3( t.Y[1] ) ] << 24 ); + ((uint32_t) FSb[MBEDTLS_BYTE_0(t.Y[2])]) ^ + ((uint32_t) FSb[MBEDTLS_BYTE_1(t.Y[3])] << 8) ^ + ((uint32_t) FSb[MBEDTLS_BYTE_2(t.Y[0])] << 16) ^ + ((uint32_t) FSb[MBEDTLS_BYTE_3(t.Y[1])] << 24); t.X[3] = *RK++ ^ \ - ( (uint32_t) FSb[ MBEDTLS_BYTE_0( t.Y[3] ) ] ) ^ - ( (uint32_t) FSb[ MBEDTLS_BYTE_1( t.Y[0] ) ] << 8 ) ^ - ( (uint32_t) FSb[ MBEDTLS_BYTE_2( t.Y[1] ) ] << 16 ) ^ - ( (uint32_t) FSb[ MBEDTLS_BYTE_3( t.Y[2] ) ] << 24 ); - - MBEDTLS_PUT_UINT32_LE( t.X[0], output, 0 ); - MBEDTLS_PUT_UINT32_LE( t.X[1], output, 4 ); - MBEDTLS_PUT_UINT32_LE( t.X[2], output, 8 ); - MBEDTLS_PUT_UINT32_LE( t.X[3], output, 12 ); - - mbedtls_platform_zeroize( &t, sizeof( t ) ); - - mbedtls_platform_zeroize( &t, sizeof( t ) ); - return( 0 ); + ((uint32_t) FSb[MBEDTLS_BYTE_0(t.Y[3])]) ^ + ((uint32_t) FSb[MBEDTLS_BYTE_1(t.Y[0])] << 8) ^ + ((uint32_t) FSb[MBEDTLS_BYTE_2(t.Y[1])] << 16) ^ + ((uint32_t) FSb[MBEDTLS_BYTE_3(t.Y[2])] << 24); + + MBEDTLS_PUT_UINT32_LE(t.X[0], output, 0); + MBEDTLS_PUT_UINT32_LE(t.X[1], output, 4); + MBEDTLS_PUT_UINT32_LE(t.X[2], output, 8); + MBEDTLS_PUT_UINT32_LE(t.X[3], output, 12); + + mbedtls_platform_zeroize(&t, sizeof(t)); + + mbedtls_platform_zeroize(&t, sizeof(t)); + return 0; } #endif /* !MBEDTLS_AES_ENCRYPT_ALT */ @@ -933,131 +946,151 @@ int mbedtls_internal_aes_encrypt( mbedtls_aes_context *ctx, * AES-ECB block decryption */ #if !defined(MBEDTLS_AES_DECRYPT_ALT) -int mbedtls_internal_aes_decrypt( mbedtls_aes_context *ctx, - const unsigned char input[16], - unsigned char output[16] ) +int mbedtls_internal_aes_decrypt(mbedtls_aes_context *ctx, + const unsigned char input[16], + unsigned char output[16]) { int i; - uint32_t *RK = ctx->rk; - struct - { + uint32_t *RK = ctx->buf + ctx->rk_offset; + struct { uint32_t X[4]; uint32_t Y[4]; } t; - t.X[0] = MBEDTLS_GET_UINT32_LE( input, 0 ); t.X[0] ^= *RK++; - t.X[1] = MBEDTLS_GET_UINT32_LE( input, 4 ); t.X[1] ^= *RK++; - t.X[2] = MBEDTLS_GET_UINT32_LE( input, 8 ); t.X[2] ^= *RK++; - t.X[3] = MBEDTLS_GET_UINT32_LE( input, 12 ); t.X[3] ^= *RK++; + t.X[0] = MBEDTLS_GET_UINT32_LE(input, 0); t.X[0] ^= *RK++; + t.X[1] = MBEDTLS_GET_UINT32_LE(input, 4); t.X[1] ^= *RK++; + t.X[2] = MBEDTLS_GET_UINT32_LE(input, 8); t.X[2] ^= *RK++; + t.X[3] = MBEDTLS_GET_UINT32_LE(input, 12); t.X[3] ^= *RK++; - for( i = ( ctx->nr >> 1 ) - 1; i > 0; i-- ) - { - AES_RROUND( t.Y[0], t.Y[1], t.Y[2], t.Y[3], t.X[0], t.X[1], t.X[2], t.X[3] ); - AES_RROUND( t.X[0], t.X[1], t.X[2], t.X[3], t.Y[0], t.Y[1], t.Y[2], t.Y[3] ); + for (i = (ctx->nr >> 1) - 1; i > 0; i--) { + AES_RROUND(t.Y[0], t.Y[1], t.Y[2], t.Y[3], t.X[0], t.X[1], t.X[2], t.X[3]); + AES_RROUND(t.X[0], t.X[1], t.X[2], t.X[3], t.Y[0], t.Y[1], t.Y[2], t.Y[3]); } - AES_RROUND( t.Y[0], t.Y[1], t.Y[2], t.Y[3], t.X[0], t.X[1], t.X[2], t.X[3] ); + AES_RROUND(t.Y[0], t.Y[1], t.Y[2], t.Y[3], t.X[0], t.X[1], t.X[2], t.X[3]); t.X[0] = *RK++ ^ \ - ( (uint32_t) RSb[ MBEDTLS_BYTE_0( t.Y[0] ) ] ) ^ - ( (uint32_t) RSb[ MBEDTLS_BYTE_1( t.Y[3] ) ] << 8 ) ^ - ( (uint32_t) RSb[ MBEDTLS_BYTE_2( t.Y[2] ) ] << 16 ) ^ - ( (uint32_t) RSb[ MBEDTLS_BYTE_3( t.Y[1] ) ] << 24 ); + ((uint32_t) RSb[MBEDTLS_BYTE_0(t.Y[0])]) ^ + ((uint32_t) RSb[MBEDTLS_BYTE_1(t.Y[3])] << 8) ^ + ((uint32_t) RSb[MBEDTLS_BYTE_2(t.Y[2])] << 16) ^ + ((uint32_t) RSb[MBEDTLS_BYTE_3(t.Y[1])] << 24); t.X[1] = *RK++ ^ \ - ( (uint32_t) RSb[ MBEDTLS_BYTE_0( t.Y[1] ) ] ) ^ - ( (uint32_t) RSb[ MBEDTLS_BYTE_1( t.Y[0] ) ] << 8 ) ^ - ( (uint32_t) RSb[ MBEDTLS_BYTE_2( t.Y[3] ) ] << 16 ) ^ - ( (uint32_t) RSb[ MBEDTLS_BYTE_3( t.Y[2] ) ] << 24 ); + ((uint32_t) RSb[MBEDTLS_BYTE_0(t.Y[1])]) ^ + ((uint32_t) RSb[MBEDTLS_BYTE_1(t.Y[0])] << 8) ^ + ((uint32_t) RSb[MBEDTLS_BYTE_2(t.Y[3])] << 16) ^ + ((uint32_t) RSb[MBEDTLS_BYTE_3(t.Y[2])] << 24); t.X[2] = *RK++ ^ \ - ( (uint32_t) RSb[ MBEDTLS_BYTE_0( t.Y[2] ) ] ) ^ - ( (uint32_t) RSb[ MBEDTLS_BYTE_1( t.Y[1] ) ] << 8 ) ^ - ( (uint32_t) RSb[ MBEDTLS_BYTE_2( t.Y[0] ) ] << 16 ) ^ - ( (uint32_t) RSb[ MBEDTLS_BYTE_3( t.Y[3] ) ] << 24 ); + ((uint32_t) RSb[MBEDTLS_BYTE_0(t.Y[2])]) ^ + ((uint32_t) RSb[MBEDTLS_BYTE_1(t.Y[1])] << 8) ^ + ((uint32_t) RSb[MBEDTLS_BYTE_2(t.Y[0])] << 16) ^ + ((uint32_t) RSb[MBEDTLS_BYTE_3(t.Y[3])] << 24); t.X[3] = *RK++ ^ \ - ( (uint32_t) RSb[ MBEDTLS_BYTE_0( t.Y[3] ) ] ) ^ - ( (uint32_t) RSb[ MBEDTLS_BYTE_1( t.Y[2] ) ] << 8 ) ^ - ( (uint32_t) RSb[ MBEDTLS_BYTE_2( t.Y[1] ) ] << 16 ) ^ - ( (uint32_t) RSb[ MBEDTLS_BYTE_3( t.Y[0] ) ] << 24 ); + ((uint32_t) RSb[MBEDTLS_BYTE_0(t.Y[3])]) ^ + ((uint32_t) RSb[MBEDTLS_BYTE_1(t.Y[2])] << 8) ^ + ((uint32_t) RSb[MBEDTLS_BYTE_2(t.Y[1])] << 16) ^ + ((uint32_t) RSb[MBEDTLS_BYTE_3(t.Y[0])] << 24); - MBEDTLS_PUT_UINT32_LE( t.X[0], output, 0 ); - MBEDTLS_PUT_UINT32_LE( t.X[1], output, 4 ); - MBEDTLS_PUT_UINT32_LE( t.X[2], output, 8 ); - MBEDTLS_PUT_UINT32_LE( t.X[3], output, 12 ); + MBEDTLS_PUT_UINT32_LE(t.X[0], output, 0); + MBEDTLS_PUT_UINT32_LE(t.X[1], output, 4); + MBEDTLS_PUT_UINT32_LE(t.X[2], output, 8); + MBEDTLS_PUT_UINT32_LE(t.X[3], output, 12); - mbedtls_platform_zeroize( &t, sizeof( t ) ); + mbedtls_platform_zeroize(&t, sizeof(t)); - return( 0 ); + return 0; } #endif /* !MBEDTLS_AES_DECRYPT_ALT */ + +#if defined(MAY_NEED_TO_ALIGN) +/* VIA Padlock and our intrinsics-based implementation of AESNI require + * the round keys to be aligned on a 16-byte boundary. We take care of this + * before creating them, but the AES context may have moved (this can happen + * if the library is called from a language with managed memory), and in later + * calls it might have a different alignment with respect to 16-byte memory. + * So we may need to realign. + */ +static void aes_maybe_realign(mbedtls_aes_context *ctx) +{ + unsigned new_offset = mbedtls_aes_rk_offset(ctx->buf); + if (new_offset != ctx->rk_offset) { + memmove(ctx->buf + new_offset, // new address + ctx->buf + ctx->rk_offset, // current address + (ctx->nr + 1) * 16); // number of round keys * bytes per rk + ctx->rk_offset = new_offset; + } +} +#endif #endif // FSP_NOT_DEFINED /* * AES-ECB block encryption/decryption */ -int mbedtls_aes_crypt_ecb( mbedtls_aes_context *ctx, - int mode, - const unsigned char input[16], - unsigned char output[16] ) +int mbedtls_aes_crypt_ecb(mbedtls_aes_context *ctx, + int mode, + const unsigned char input[16], + unsigned char output[16]) { - AES_VALIDATE_RET( ctx != NULL ); - AES_VALIDATE_RET( ctx->rk != NULL ); - AES_VALIDATE_RET( input != NULL ); - AES_VALIDATE_RET( output != NULL ); - AES_VALIDATE_RET( mode == MBEDTLS_AES_ENCRYPT || - mode == MBEDTLS_AES_DECRYPT ); - -#if defined(MBEDTLS_AESNI_C) && defined(MBEDTLS_HAVE_X86_64) - if( mbedtls_aesni_has_support( MBEDTLS_AESNI_AES ) ) - return( mbedtls_aesni_crypt_ecb( ctx, mode, input, output ) ); + if (mode != MBEDTLS_AES_ENCRYPT && mode != MBEDTLS_AES_DECRYPT) { + return MBEDTLS_ERR_AES_BAD_INPUT_DATA; + } + +#if defined(MAY_NEED_TO_ALIGN) + aes_maybe_realign(ctx); #endif -#if defined(MBEDTLS_PADLOCK_C) && defined(MBEDTLS_HAVE_X86) - if( aes_padlock_ace > 0) - { - if( mbedtls_padlock_xcryptecb( ctx, mode, input, output ) == 0 ) - return( 0 ); +#if defined(MBEDTLS_AESNI_HAVE_CODE) + if (mbedtls_aesni_has_support(MBEDTLS_AESNI_AES)) { + return mbedtls_aesni_crypt_ecb(ctx, mode, input, output); + } +#endif - // If padlock data misaligned, we just fall back to - // unaccelerated mode - // +#if defined(MBEDTLS_AESCE_C) && defined(MBEDTLS_HAVE_ARM64) + if (mbedtls_aesce_has_support()) { + return mbedtls_aesce_crypt_ecb(ctx, mode, input, output); } #endif - if( mode == MBEDTLS_AES_ENCRYPT ) - return( mbedtls_internal_aes_encrypt( ctx, input, output ) ); - else - return( mbedtls_internal_aes_decrypt( ctx, input, output ) ); +#if defined(MBEDTLS_PADLOCK_C) && defined(MBEDTLS_HAVE_X86) + if (aes_padlock_ace > 0) { + return mbedtls_padlock_xcryptecb(ctx, mode, input, output); + } +#endif + + if (mode == MBEDTLS_AES_ENCRYPT) { + return mbedtls_internal_aes_encrypt(ctx, input, output); + } else { + return mbedtls_internal_aes_decrypt(ctx, input, output); + } } #if defined(MBEDTLS_CIPHER_MODE_CBC) /* * AES-CBC buffer encryption/decryption */ -int mbedtls_aes_crypt_cbc( mbedtls_aes_context *ctx, - int mode, - size_t length, - unsigned char iv[16], - const unsigned char *input, - unsigned char *output ) +int mbedtls_aes_crypt_cbc(mbedtls_aes_context *ctx, + int mode, + size_t length, + unsigned char iv[16], + const unsigned char *input, + unsigned char *output) { - AES_VALIDATE_RET( ctx != NULL ); - AES_VALIDATE_RET( mode == MBEDTLS_AES_ENCRYPT || - mode == MBEDTLS_AES_DECRYPT ); - AES_VALIDATE_RET( iv != NULL ); - AES_VALIDATE_RET( input != NULL ); - AES_VALIDATE_RET( output != NULL ); - if( length % 16 ) - return( MBEDTLS_ERR_AES_INVALID_INPUT_LENGTH ); + if (mode != MBEDTLS_AES_ENCRYPT && mode != MBEDTLS_AES_DECRYPT) { + return MBEDTLS_ERR_AES_BAD_INPUT_DATA; + } + + if (length % 16) { + return MBEDTLS_ERR_AES_INVALID_INPUT_LENGTH; + } #if defined(MBEDTLS_PADLOCK_C) && defined(MBEDTLS_HAVE_X86) - if( aes_padlock_ace > 0 ) - { - if( mbedtls_padlock_xcryptcbc( ctx, mode, length, iv, input, output ) == 0 ) - return( 0 ); + if (aes_padlock_ace > 0) { + if (mbedtls_padlock_xcryptcbc(ctx, mode, length, iv, input, output) == 0) { + return 0; + } // If padlock data misaligned, we just fall back to // unaccelerated mode @@ -1084,30 +1117,30 @@ typedef unsigned char mbedtls_be128[16]; * for machine endianness and hence works correctly on both big and little * endian machines. */ -static void mbedtls_gf128mul_x_ble( unsigned char r[16], - const unsigned char x[16] ) +static void mbedtls_gf128mul_x_ble(unsigned char r[16], + const unsigned char x[16]) { uint64_t a, b, ra, rb; - a = MBEDTLS_GET_UINT64_LE( x, 0 ); - b = MBEDTLS_GET_UINT64_LE( x, 8 ); + a = MBEDTLS_GET_UINT64_LE(x, 0); + b = MBEDTLS_GET_UINT64_LE(x, 8); - ra = ( a << 1 ) ^ 0x0087 >> ( 8 - ( ( b >> 63 ) << 3 ) ); - rb = ( a >> 63 ) | ( b << 1 ); + ra = (a << 1) ^ 0x0087 >> (8 - ((b >> 63) << 3)); + rb = (a >> 63) | (b << 1); - MBEDTLS_PUT_UINT64_LE( ra, r, 0 ); - MBEDTLS_PUT_UINT64_LE( rb, r, 8 ); + MBEDTLS_PUT_UINT64_LE(ra, r, 0); + MBEDTLS_PUT_UINT64_LE(rb, r, 8); } /* * AES-XTS buffer encryption/decryption */ -int mbedtls_aes_crypt_xts( mbedtls_aes_xts_context *ctx, - int mode, - size_t length, - const unsigned char data_unit[16], - const unsigned char *input, - unsigned char *output ) +int mbedtls_aes_crypt_xts(mbedtls_aes_xts_context *ctx, + int mode, + size_t length, + const unsigned char data_unit[16], + const unsigned char *input, + unsigned char *output) { int ret = MBEDTLS_ERR_ERROR_CORRUPTION_DETECTED; size_t blocks = length / 16; @@ -1116,20 +1149,19 @@ int mbedtls_aes_crypt_xts( mbedtls_aes_xts_context *ctx, unsigned char prev_tweak[16]; unsigned char tmp[16]; - AES_VALIDATE_RET( ctx != NULL ); - AES_VALIDATE_RET( mode == MBEDTLS_AES_ENCRYPT || - mode == MBEDTLS_AES_DECRYPT ); - AES_VALIDATE_RET( data_unit != NULL ); - AES_VALIDATE_RET( input != NULL ); - AES_VALIDATE_RET( output != NULL ); + if (mode != MBEDTLS_AES_ENCRYPT && mode != MBEDTLS_AES_DECRYPT) { + return MBEDTLS_ERR_AES_BAD_INPUT_DATA; + } /* Data units must be at least 16 bytes long. */ - if( length < 16 ) + if (length < 16) { return MBEDTLS_ERR_AES_INVALID_INPUT_LENGTH; + } /* NIST SP 800-38E disallows data units larger than 2**20 blocks. */ - if( length > ( 1 << 20 ) * 16 ) + if (length > (1 << 20) * 16) { return MBEDTLS_ERR_AES_INVALID_INPUT_LENGTH; + } #if !(BSP_FEATURE_BSP_HAS_SCE_ON_RA2) if( mode == MBEDTLS_AES_ENCRYPT ) @@ -1139,45 +1171,40 @@ int mbedtls_aes_crypt_xts( mbedtls_aes_xts_context *ctx, #endif /* Compute the tweak. */ - ret = mbedtls_aes_crypt_ecb( &ctx->tweak, MBEDTLS_AES_ENCRYPT, - data_unit, tweak ); - if( ret != 0 ) - return( ret ); - - while( blocks-- ) - { - size_t i; + ret = mbedtls_aes_crypt_ecb(&ctx->tweak, MBEDTLS_AES_ENCRYPT, + data_unit, tweak); + if (ret != 0) { + return ret; + } - if( leftover && ( mode == MBEDTLS_AES_DECRYPT ) && blocks == 0 ) - { + while (blocks--) { + if (leftover && (mode == MBEDTLS_AES_DECRYPT) && blocks == 0) { /* We are on the last block in a decrypt operation that has * leftover bytes, so we need to use the next tweak for this block, - * and this tweak for the lefover bytes. Save the current tweak for + * and this tweak for the leftover bytes. Save the current tweak for * the leftovers and then update the current tweak for use on this, * the last full block. */ - memcpy( prev_tweak, tweak, sizeof( tweak ) ); - mbedtls_gf128mul_x_ble( tweak, tweak ); + memcpy(prev_tweak, tweak, sizeof(tweak)); + mbedtls_gf128mul_x_ble(tweak, tweak); } - for( i = 0; i < 16; i++ ) - tmp[i] = input[i] ^ tweak[i]; + mbedtls_xor(tmp, input, tweak, 16); - ret = mbedtls_aes_crypt_ecb( &ctx->crypt, mode, tmp, tmp ); - if( ret != 0 ) - return( ret ); + ret = mbedtls_aes_crypt_ecb(&ctx->crypt, mode, tmp, tmp); + if (ret != 0) { + return ret; + } - for( i = 0; i < 16; i++ ) - output[i] = tmp[i] ^ tweak[i]; + mbedtls_xor(output, tmp, tweak, 16); /* Update the tweak for the next block. */ - mbedtls_gf128mul_x_ble( tweak, tweak ); + mbedtls_gf128mul_x_ble(tweak, tweak); output += 16; input += 16; } - if( leftover ) - { + if (leftover) { /* If we are on the leftover bytes in a decrypt operation, we need to * use the previous tweak for these bytes (as saved in prev_tweak). */ unsigned char *t = mode == MBEDTLS_AES_DECRYPT ? prev_tweak : tweak; @@ -1188,31 +1215,29 @@ int mbedtls_aes_crypt_xts( mbedtls_aes_xts_context *ctx, unsigned char *prev_output = output - 16; /* Copy ciphertext bytes from the previous block to our output for each - * byte of ciphertext we won't steal. At the same time, copy the - * remainder of the input for this final round (since the loop bounds - * are the same). */ - for( i = 0; i < leftover; i++ ) - { + * byte of ciphertext we won't steal. */ + for (i = 0; i < leftover; i++) { output[i] = prev_output[i]; - tmp[i] = input[i] ^ t[i]; } + /* Copy the remainder of the input for this final round. */ + mbedtls_xor(tmp, input, t, leftover); + /* Copy ciphertext bytes from the previous block for input in this * round. */ - for( ; i < 16; i++ ) - tmp[i] = prev_output[i] ^ t[i]; + mbedtls_xor(tmp + i, prev_output + i, t + i, 16 - i); - ret = mbedtls_aes_crypt_ecb( &ctx->crypt, mode, tmp, tmp ); - if( ret != 0 ) + ret = mbedtls_aes_crypt_ecb(&ctx->crypt, mode, tmp, tmp); + if (ret != 0) { return ret; + } /* Write the result back to the previous block, overriding the previous * output we copied. */ - for( i = 0; i < 16; i++ ) - prev_output[i] = tmp[i] ^ t[i]; + mbedtls_xor(prev_output, tmp, t, 16); } - return( 0 ); + return 0; } #endif /* MBEDTLS_CIPHER_MODE_XTS */ @@ -1220,63 +1245,55 @@ int mbedtls_aes_crypt_xts( mbedtls_aes_xts_context *ctx, /* * AES-CFB128 buffer encryption/decryption */ -int mbedtls_aes_crypt_cfb128( mbedtls_aes_context *ctx, - int mode, - size_t length, - size_t *iv_off, - unsigned char iv[16], - const unsigned char *input, - unsigned char *output ) +int mbedtls_aes_crypt_cfb128(mbedtls_aes_context *ctx, + int mode, + size_t length, + size_t *iv_off, + unsigned char iv[16], + const unsigned char *input, + unsigned char *output) { int c; int ret = MBEDTLS_ERR_ERROR_CORRUPTION_DETECTED; size_t n; - AES_VALIDATE_RET( ctx != NULL ); - AES_VALIDATE_RET( mode == MBEDTLS_AES_ENCRYPT || - mode == MBEDTLS_AES_DECRYPT ); - AES_VALIDATE_RET( iv_off != NULL ); - AES_VALIDATE_RET( iv != NULL ); - AES_VALIDATE_RET( input != NULL ); - AES_VALIDATE_RET( output != NULL ); + if (mode != MBEDTLS_AES_ENCRYPT && mode != MBEDTLS_AES_DECRYPT) { + return MBEDTLS_ERR_AES_BAD_INPUT_DATA; + } n = *iv_off; - if( n > 15 ) - return( MBEDTLS_ERR_AES_BAD_INPUT_DATA ); + if (n > 15) { + return MBEDTLS_ERR_AES_BAD_INPUT_DATA; + } - if( mode == MBEDTLS_AES_DECRYPT ) - { - while( length-- ) - { - if( n == 0 ) - { - ret = mbedtls_aes_crypt_ecb( ctx, MBEDTLS_AES_ENCRYPT, iv, iv ); - if( ret != 0 ) + if (mode == MBEDTLS_AES_DECRYPT) { + while (length--) { + if (n == 0) { + ret = mbedtls_aes_crypt_ecb(ctx, MBEDTLS_AES_ENCRYPT, iv, iv); + if (ret != 0) { goto exit; + } } c = *input++; - *output++ = (unsigned char)( c ^ iv[n] ); + *output++ = (unsigned char) (c ^ iv[n]); iv[n] = (unsigned char) c; - n = ( n + 1 ) & 0x0F; + n = (n + 1) & 0x0F; } - } - else - { - while( length-- ) - { - if( n == 0 ) - { - ret = mbedtls_aes_crypt_ecb( ctx, MBEDTLS_AES_ENCRYPT, iv, iv ); - if( ret != 0 ) + } else { + while (length--) { + if (n == 0) { + ret = mbedtls_aes_crypt_ecb(ctx, MBEDTLS_AES_ENCRYPT, iv, iv); + if (ret != 0) { goto exit; + } } - iv[n] = *output++ = (unsigned char)( iv[n] ^ *input++ ); + iv[n] = *output++ = (unsigned char) (iv[n] ^ *input++); - n = ( n + 1 ) & 0x0F; + n = (n + 1) & 0x0F; } } @@ -1284,50 +1301,49 @@ int mbedtls_aes_crypt_cfb128( mbedtls_aes_context *ctx, ret = 0; exit: - return( ret ); + return ret; } /* * AES-CFB8 buffer encryption/decryption */ -int mbedtls_aes_crypt_cfb8( mbedtls_aes_context *ctx, - int mode, - size_t length, - unsigned char iv[16], - const unsigned char *input, - unsigned char *output ) +int mbedtls_aes_crypt_cfb8(mbedtls_aes_context *ctx, + int mode, + size_t length, + unsigned char iv[16], + const unsigned char *input, + unsigned char *output) { int ret = MBEDTLS_ERR_ERROR_CORRUPTION_DETECTED; unsigned char c; unsigned char ov[17]; - AES_VALIDATE_RET( ctx != NULL ); - AES_VALIDATE_RET( mode == MBEDTLS_AES_ENCRYPT || - mode == MBEDTLS_AES_DECRYPT ); - AES_VALIDATE_RET( iv != NULL ); - AES_VALIDATE_RET( input != NULL ); - AES_VALIDATE_RET( output != NULL ); - while( length-- ) - { - memcpy( ov, iv, 16 ); - ret = mbedtls_aes_crypt_ecb( ctx, MBEDTLS_AES_ENCRYPT, iv, iv ); - if( ret != 0 ) + if (mode != MBEDTLS_AES_ENCRYPT && mode != MBEDTLS_AES_DECRYPT) { + return MBEDTLS_ERR_AES_BAD_INPUT_DATA; + } + while (length--) { + memcpy(ov, iv, 16); + ret = mbedtls_aes_crypt_ecb(ctx, MBEDTLS_AES_ENCRYPT, iv, iv); + if (ret != 0) { goto exit; + } - if( mode == MBEDTLS_AES_DECRYPT ) + if (mode == MBEDTLS_AES_DECRYPT) { ov[16] = *input; + } - c = *output++ = (unsigned char)( iv[0] ^ *input++ ); + c = *output++ = (unsigned char) (iv[0] ^ *input++); - if( mode == MBEDTLS_AES_ENCRYPT ) + if (mode == MBEDTLS_AES_ENCRYPT) { ov[16] = c; + } - memcpy( iv, ov + 1, 16 ); + memcpy(iv, ov + 1, 16); } - ret = 0; + ret = 0; exit: - return( ret ); + return ret; } #endif /* MBEDTLS_CIPHER_MODE_CFB */ @@ -1335,44 +1351,38 @@ int mbedtls_aes_crypt_cfb8( mbedtls_aes_context *ctx, /* * AES-OFB (Output Feedback Mode) buffer encryption/decryption */ -int mbedtls_aes_crypt_ofb( mbedtls_aes_context *ctx, - size_t length, - size_t *iv_off, - unsigned char iv[16], - const unsigned char *input, - unsigned char *output ) +int mbedtls_aes_crypt_ofb(mbedtls_aes_context *ctx, + size_t length, + size_t *iv_off, + unsigned char iv[16], + const unsigned char *input, + unsigned char *output) { int ret = 0; size_t n; - AES_VALIDATE_RET( ctx != NULL ); - AES_VALIDATE_RET( iv_off != NULL ); - AES_VALIDATE_RET( iv != NULL ); - AES_VALIDATE_RET( input != NULL ); - AES_VALIDATE_RET( output != NULL ); - n = *iv_off; - if( n > 15 ) - return( MBEDTLS_ERR_AES_BAD_INPUT_DATA ); + if (n > 15) { + return MBEDTLS_ERR_AES_BAD_INPUT_DATA; + } - while( length-- ) - { - if( n == 0 ) - { - ret = mbedtls_aes_crypt_ecb( ctx, MBEDTLS_AES_ENCRYPT, iv, iv ); - if( ret != 0 ) + while (length--) { + if (n == 0) { + ret = mbedtls_aes_crypt_ecb(ctx, MBEDTLS_AES_ENCRYPT, iv, iv); + if (ret != 0) { goto exit; + } } *output++ = *input++ ^ iv[n]; - n = ( n + 1 ) & 0x0F; + n = (n + 1) & 0x0F; } *iv_off = n; exit: - return( ret ); + return ret; } #endif /* MBEDTLS_CIPHER_MODE_OFB */ @@ -1380,18 +1390,14 @@ int mbedtls_aes_crypt_ofb( mbedtls_aes_context *ctx, /* * AES-CTR buffer encryption/decryption */ -int mbedtls_aes_crypt_ctr( mbedtls_aes_context *ctx, - size_t length, - size_t *nc_off, - unsigned char nonce_counter[16], - unsigned char stream_block[16], - const unsigned char *input, - unsigned char *output ) +int mbedtls_aes_crypt_ctr(mbedtls_aes_context *ctx, + size_t length, + size_t *nc_off, + unsigned char nonce_counter[16], + unsigned char stream_block[16], + const unsigned char *input, + unsigned char *output) { - AES_VALIDATE_RET( ctx != NULL ); - AES_VALIDATE_RET( nonce_counter != NULL ); - AES_VALIDATE_RET( input != NULL ); - AES_VALIDATE_RET( output != NULL ); FSP_PARAMETER_NOT_USED(nc_off); FSP_PARAMETER_NOT_USED(stream_block); bool src_unaligned = !MBEDTLS_32BIT_ALIGNED((uint32_t) &input[0]); @@ -1776,14 +1782,15 @@ static const unsigned char aes_test_xts_data_unit[][16] = /* * Checkup routine */ -int mbedtls_aes_self_test( int verbose ) +int mbedtls_aes_self_test(int verbose) { int ret = 0, i, j, u, mode; unsigned int keybits; unsigned char key[32]; unsigned char buf[64]; const unsigned char *aes_tests; -#if defined(MBEDTLS_CIPHER_MODE_CBC) || defined(MBEDTLS_CIPHER_MODE_CFB) +#if defined(MBEDTLS_CIPHER_MODE_CBC) || defined(MBEDTLS_CIPHER_MODE_CFB) || \ + defined(MBEDTLS_CIPHER_MODE_OFB) unsigned char iv[16]; #endif #if defined(MBEDTLS_CIPHER_MODE_CBC) @@ -1802,32 +1809,52 @@ int mbedtls_aes_self_test( int verbose ) #endif mbedtls_aes_context ctx; - memset( key, 0, 32 ); - mbedtls_aes_init( &ctx ); + memset(key, 0, 32); + mbedtls_aes_init(&ctx); + + if (verbose != 0) { +#if defined(MBEDTLS_AES_ALT) + mbedtls_printf(" AES note: alternative implementation.\n"); +#else /* MBEDTLS_AES_ALT */ +#if defined(MBEDTLS_PADLOCK_C) && defined(MBEDTLS_HAVE_X86) + if (mbedtls_padlock_has_support(MBEDTLS_PADLOCK_ACE)) { + mbedtls_printf(" AES note: using VIA Padlock.\n"); + } else +#endif +#if defined(MBEDTLS_AESNI_HAVE_CODE) + if (mbedtls_aesni_has_support(MBEDTLS_AESNI_AES)) { + mbedtls_printf(" AES note: using AESNI.\n"); + } else +#endif +#if defined(MBEDTLS_AESCE_C) && defined(MBEDTLS_HAVE_ARM64) + if (mbedtls_aesce_has_support()) { + mbedtls_printf(" AES note: using AESCE.\n"); + } else +#endif + mbedtls_printf(" AES note: built-in implementation.\n"); +#endif /* MBEDTLS_AES_ALT */ + } /* * ECB mode */ - for( i = 0; i < 6; i++ ) - { + for (i = 0; i < 6; i++) { u = i >> 1; keybits = 128 + u * 64; mode = i & 1; - if( verbose != 0 ) - mbedtls_printf( " AES-ECB-%3u (%s): ", keybits, - ( mode == MBEDTLS_AES_DECRYPT ) ? "dec" : "enc" ); + if (verbose != 0) { + mbedtls_printf(" AES-ECB-%3u (%s): ", keybits, + (mode == MBEDTLS_AES_DECRYPT) ? "dec" : "enc"); + } - memset( buf, 0, 16 ); + memset(buf, 0, 16); - if( mode == MBEDTLS_AES_DECRYPT ) - { - ret = mbedtls_aes_setkey_dec( &ctx, key, keybits ); + if (mode == MBEDTLS_AES_DECRYPT) { + ret = mbedtls_aes_setkey_dec(&ctx, key, keybits); aes_tests = aes_test_ecb_dec[u]; - } - else - { - ret = mbedtls_aes_setkey_enc( &ctx, key, keybits ); + } else { + ret = mbedtls_aes_setkey_enc(&ctx, key, keybits); aes_tests = aes_test_ecb_enc[u]; } @@ -1836,62 +1863,57 @@ int mbedtls_aes_self_test( int verbose ) * there is an alternative underlying implementation i.e. when * MBEDTLS_AES_ALT is defined. */ - if( ret == MBEDTLS_ERR_PLATFORM_FEATURE_UNSUPPORTED && keybits == 192 ) - { - mbedtls_printf( "skipped\n" ); + if (ret == MBEDTLS_ERR_PLATFORM_FEATURE_UNSUPPORTED && keybits == 192) { + mbedtls_printf("skipped\n"); continue; - } - else if( ret != 0 ) - { + } else if (ret != 0) { goto exit; } - for( j = 0; j < 10000; j++ ) - { - ret = mbedtls_aes_crypt_ecb( &ctx, mode, buf, buf ); - if( ret != 0 ) + for (j = 0; j < 10000; j++) { + ret = mbedtls_aes_crypt_ecb(&ctx, mode, buf, buf); + if (ret != 0) { goto exit; + } } - if( memcmp( buf, aes_tests, 16 ) != 0 ) - { + if (memcmp(buf, aes_tests, 16) != 0) { ret = 1; goto exit; } - if( verbose != 0 ) - mbedtls_printf( "passed\n" ); + if (verbose != 0) { + mbedtls_printf("passed\n"); + } } - if( verbose != 0 ) - mbedtls_printf( "\n" ); + if (verbose != 0) { + mbedtls_printf("\n"); + } #if defined(MBEDTLS_CIPHER_MODE_CBC) /* * CBC mode */ - for( i = 0; i < 6; i++ ) - { + for (i = 0; i < 6; i++) { u = i >> 1; keybits = 128 + u * 64; mode = i & 1; - if( verbose != 0 ) - mbedtls_printf( " AES-CBC-%3u (%s): ", keybits, - ( mode == MBEDTLS_AES_DECRYPT ) ? "dec" : "enc" ); + if (verbose != 0) { + mbedtls_printf(" AES-CBC-%3u (%s): ", keybits, + (mode == MBEDTLS_AES_DECRYPT) ? "dec" : "enc"); + } - memset( iv , 0, 16 ); - memset( prv, 0, 16 ); - memset( buf, 0, 16 ); + memset(iv, 0, 16); + memset(prv, 0, 16); + memset(buf, 0, 16); - if( mode == MBEDTLS_AES_DECRYPT ) - { - ret = mbedtls_aes_setkey_dec( &ctx, key, keybits ); + if (mode == MBEDTLS_AES_DECRYPT) { + ret = mbedtls_aes_setkey_dec(&ctx, key, keybits); aes_tests = aes_test_cbc_dec[u]; - } - else - { - ret = mbedtls_aes_setkey_enc( &ctx, key, keybits ); + } else { + ret = mbedtls_aes_setkey_enc(&ctx, key, keybits); aes_tests = aes_test_cbc_enc[u]; } @@ -1900,223 +1922,212 @@ int mbedtls_aes_self_test( int verbose ) * there is an alternative underlying implementation i.e. when * MBEDTLS_AES_ALT is defined. */ - if( ret == MBEDTLS_ERR_PLATFORM_FEATURE_UNSUPPORTED && keybits == 192 ) - { - mbedtls_printf( "skipped\n" ); + if (ret == MBEDTLS_ERR_PLATFORM_FEATURE_UNSUPPORTED && keybits == 192) { + mbedtls_printf("skipped\n"); continue; - } - else if( ret != 0 ) - { + } else if (ret != 0) { goto exit; } - for( j = 0; j < 10000; j++ ) - { - if( mode == MBEDTLS_AES_ENCRYPT ) - { + for (j = 0; j < 10000; j++) { + if (mode == MBEDTLS_AES_ENCRYPT) { unsigned char tmp[16]; - memcpy( tmp, prv, 16 ); - memcpy( prv, buf, 16 ); - memcpy( buf, tmp, 16 ); + memcpy(tmp, prv, 16); + memcpy(prv, buf, 16); + memcpy(buf, tmp, 16); } - ret = mbedtls_aes_crypt_cbc( &ctx, mode, 16, iv, buf, buf ); - if( ret != 0 ) + ret = mbedtls_aes_crypt_cbc(&ctx, mode, 16, iv, buf, buf); + if (ret != 0) { goto exit; + } } - if( memcmp( buf, aes_tests, 16 ) != 0 ) - { + if (memcmp(buf, aes_tests, 16) != 0) { ret = 1; goto exit; } - if( verbose != 0 ) - mbedtls_printf( "passed\n" ); + if (verbose != 0) { + mbedtls_printf("passed\n"); + } } - if( verbose != 0 ) - mbedtls_printf( "\n" ); + if (verbose != 0) { + mbedtls_printf("\n"); + } #endif /* MBEDTLS_CIPHER_MODE_CBC */ #if defined(MBEDTLS_CIPHER_MODE_CFB) /* * CFB128 mode */ - for( i = 0; i < 6; i++ ) - { + for (i = 0; i < 6; i++) { u = i >> 1; keybits = 128 + u * 64; mode = i & 1; - if( verbose != 0 ) - mbedtls_printf( " AES-CFB128-%3u (%s): ", keybits, - ( mode == MBEDTLS_AES_DECRYPT ) ? "dec" : "enc" ); + if (verbose != 0) { + mbedtls_printf(" AES-CFB128-%3u (%s): ", keybits, + (mode == MBEDTLS_AES_DECRYPT) ? "dec" : "enc"); + } - memcpy( iv, aes_test_cfb128_iv, 16 ); - memcpy( key, aes_test_cfb128_key[u], keybits / 8 ); + memcpy(iv, aes_test_cfb128_iv, 16); + memcpy(key, aes_test_cfb128_key[u], keybits / 8); offset = 0; - ret = mbedtls_aes_setkey_enc( &ctx, key, keybits ); + ret = mbedtls_aes_setkey_enc(&ctx, key, keybits); /* * AES-192 is an optional feature that may be unavailable when * there is an alternative underlying implementation i.e. when * MBEDTLS_AES_ALT is defined. */ - if( ret == MBEDTLS_ERR_PLATFORM_FEATURE_UNSUPPORTED && keybits == 192 ) - { - mbedtls_printf( "skipped\n" ); + if (ret == MBEDTLS_ERR_PLATFORM_FEATURE_UNSUPPORTED && keybits == 192) { + mbedtls_printf("skipped\n"); continue; - } - else if( ret != 0 ) - { + } else if (ret != 0) { goto exit; } - if( mode == MBEDTLS_AES_DECRYPT ) - { - memcpy( buf, aes_test_cfb128_ct[u], 64 ); + if (mode == MBEDTLS_AES_DECRYPT) { + memcpy(buf, aes_test_cfb128_ct[u], 64); aes_tests = aes_test_cfb128_pt; - } - else - { - memcpy( buf, aes_test_cfb128_pt, 64 ); + } else { + memcpy(buf, aes_test_cfb128_pt, 64); aes_tests = aes_test_cfb128_ct[u]; } - ret = mbedtls_aes_crypt_cfb128( &ctx, mode, 64, &offset, iv, buf, buf ); - if( ret != 0 ) + ret = mbedtls_aes_crypt_cfb128(&ctx, mode, 64, &offset, iv, buf, buf); + if (ret != 0) { goto exit; + } - if( memcmp( buf, aes_tests, 64 ) != 0 ) - { + if (memcmp(buf, aes_tests, 64) != 0) { ret = 1; goto exit; } - if( verbose != 0 ) - mbedtls_printf( "passed\n" ); + if (verbose != 0) { + mbedtls_printf("passed\n"); + } } - if( verbose != 0 ) - mbedtls_printf( "\n" ); + if (verbose != 0) { + mbedtls_printf("\n"); + } #endif /* MBEDTLS_CIPHER_MODE_CFB */ #if defined(MBEDTLS_CIPHER_MODE_OFB) /* * OFB mode */ - for( i = 0; i < 6; i++ ) - { + for (i = 0; i < 6; i++) { u = i >> 1; keybits = 128 + u * 64; mode = i & 1; - if( verbose != 0 ) - mbedtls_printf( " AES-OFB-%3u (%s): ", keybits, - ( mode == MBEDTLS_AES_DECRYPT ) ? "dec" : "enc" ); + if (verbose != 0) { + mbedtls_printf(" AES-OFB-%3u (%s): ", keybits, + (mode == MBEDTLS_AES_DECRYPT) ? "dec" : "enc"); + } - memcpy( iv, aes_test_ofb_iv, 16 ); - memcpy( key, aes_test_ofb_key[u], keybits / 8 ); + memcpy(iv, aes_test_ofb_iv, 16); + memcpy(key, aes_test_ofb_key[u], keybits / 8); offset = 0; - ret = mbedtls_aes_setkey_enc( &ctx, key, keybits ); + ret = mbedtls_aes_setkey_enc(&ctx, key, keybits); /* * AES-192 is an optional feature that may be unavailable when * there is an alternative underlying implementation i.e. when * MBEDTLS_AES_ALT is defined. */ - if( ret == MBEDTLS_ERR_PLATFORM_FEATURE_UNSUPPORTED && keybits == 192 ) - { - mbedtls_printf( "skipped\n" ); + if (ret == MBEDTLS_ERR_PLATFORM_FEATURE_UNSUPPORTED && keybits == 192) { + mbedtls_printf("skipped\n"); continue; - } - else if( ret != 0 ) - { + } else if (ret != 0) { goto exit; } - if( mode == MBEDTLS_AES_DECRYPT ) - { - memcpy( buf, aes_test_ofb_ct[u], 64 ); + if (mode == MBEDTLS_AES_DECRYPT) { + memcpy(buf, aes_test_ofb_ct[u], 64); aes_tests = aes_test_ofb_pt; - } - else - { - memcpy( buf, aes_test_ofb_pt, 64 ); + } else { + memcpy(buf, aes_test_ofb_pt, 64); aes_tests = aes_test_ofb_ct[u]; } - ret = mbedtls_aes_crypt_ofb( &ctx, 64, &offset, iv, buf, buf ); - if( ret != 0 ) + ret = mbedtls_aes_crypt_ofb(&ctx, 64, &offset, iv, buf, buf); + if (ret != 0) { goto exit; + } - if( memcmp( buf, aes_tests, 64 ) != 0 ) - { + if (memcmp(buf, aes_tests, 64) != 0) { ret = 1; goto exit; } - if( verbose != 0 ) - mbedtls_printf( "passed\n" ); + if (verbose != 0) { + mbedtls_printf("passed\n"); + } } - if( verbose != 0 ) - mbedtls_printf( "\n" ); + if (verbose != 0) { + mbedtls_printf("\n"); + } #endif /* MBEDTLS_CIPHER_MODE_OFB */ #if defined(MBEDTLS_CIPHER_MODE_CTR) /* * CTR mode */ - for( i = 0; i < 6; i++ ) - { + for (i = 0; i < 6; i++) { u = i >> 1; mode = i & 1; - if( verbose != 0 ) - mbedtls_printf( " AES-CTR-128 (%s): ", - ( mode == MBEDTLS_AES_DECRYPT ) ? "dec" : "enc" ); + if (verbose != 0) { + mbedtls_printf(" AES-CTR-128 (%s): ", + (mode == MBEDTLS_AES_DECRYPT) ? "dec" : "enc"); + } - memcpy( nonce_counter, aes_test_ctr_nonce_counter[u], 16 ); - memcpy( key, aes_test_ctr_key[u], 16 ); + memcpy(nonce_counter, aes_test_ctr_nonce_counter[u], 16); + memcpy(key, aes_test_ctr_key[u], 16); offset = 0; - if( ( ret = mbedtls_aes_setkey_enc( &ctx, key, 128 ) ) != 0 ) + if ((ret = mbedtls_aes_setkey_enc(&ctx, key, 128)) != 0) { goto exit; + } len = aes_test_ctr_len[u]; - if( mode == MBEDTLS_AES_DECRYPT ) - { - memcpy( buf, aes_test_ctr_ct[u], len ); + if (mode == MBEDTLS_AES_DECRYPT) { + memcpy(buf, aes_test_ctr_ct[u], len); aes_tests = aes_test_ctr_pt[u]; - } - else - { - memcpy( buf, aes_test_ctr_pt[u], len ); + } else { + memcpy(buf, aes_test_ctr_pt[u], len); aes_tests = aes_test_ctr_ct[u]; } - ret = mbedtls_aes_crypt_ctr( &ctx, len, &offset, nonce_counter, - stream_block, buf, buf ); - if( ret != 0 ) + ret = mbedtls_aes_crypt_ctr(&ctx, len, &offset, nonce_counter, + stream_block, buf, buf); + if (ret != 0) { goto exit; + } - if( memcmp( buf, aes_tests, len ) != 0 ) - { + if (memcmp(buf, aes_tests, len) != 0) { ret = 1; goto exit; } - if( verbose != 0 ) - mbedtls_printf( "passed\n" ); + if (verbose != 0) { + mbedtls_printf("passed\n"); + } } - if( verbose != 0 ) - mbedtls_printf( "\n" ); + if (verbose != 0) { + mbedtls_printf("\n"); + } #endif /* MBEDTLS_CIPHER_MODE_CTR */ #if defined(MBEDTLS_CIPHER_MODE_XTS) @@ -2128,73 +2139,75 @@ int mbedtls_aes_self_test( int verbose ) /* * XTS mode */ - mbedtls_aes_xts_init( &ctx_xts ); + mbedtls_aes_xts_init(&ctx_xts); - for( i = 0; i < num_tests << 1; i++ ) - { - const unsigned char *data_unit; - u = i >> 1; - mode = i & 1; + for (i = 0; i < num_tests << 1; i++) { + const unsigned char *data_unit; + u = i >> 1; + mode = i & 1; - if( verbose != 0 ) - mbedtls_printf( " AES-XTS-128 (%s): ", - ( mode == MBEDTLS_AES_DECRYPT ) ? "dec" : "enc" ); + if (verbose != 0) { + mbedtls_printf(" AES-XTS-128 (%s): ", + (mode == MBEDTLS_AES_DECRYPT) ? "dec" : "enc"); + } - memset( key, 0, sizeof( key ) ); - memcpy( key, aes_test_xts_key[u], 32 ); - data_unit = aes_test_xts_data_unit[u]; + memset(key, 0, sizeof(key)); + memcpy(key, aes_test_xts_key[u], 32); + data_unit = aes_test_xts_data_unit[u]; - len = sizeof( *aes_test_xts_ct32 ); + len = sizeof(*aes_test_xts_ct32); - if( mode == MBEDTLS_AES_DECRYPT ) - { - ret = mbedtls_aes_xts_setkey_dec( &ctx_xts, key, 256 ); - if( ret != 0) - goto exit; - memcpy( buf, aes_test_xts_ct32[u], len ); - aes_tests = aes_test_xts_pt32[u]; - } - else - { - ret = mbedtls_aes_xts_setkey_enc( &ctx_xts, key, 256 ); - if( ret != 0) - goto exit; - memcpy( buf, aes_test_xts_pt32[u], len ); + if (mode == MBEDTLS_AES_DECRYPT) { + ret = mbedtls_aes_xts_setkey_dec(&ctx_xts, key, 256); + if (ret != 0) { + goto exit; + } + memcpy(buf, aes_test_xts_ct32[u], len); + aes_tests = aes_test_xts_pt32[u]; + } else { + ret = mbedtls_aes_xts_setkey_enc(&ctx_xts, key, 256); + if (ret != 0) { + goto exit; + } + memcpy(buf, aes_test_xts_pt32[u], len); aes_tests = aes_test_xts_ct32[u]; } - ret = mbedtls_aes_crypt_xts( &ctx_xts, mode, len, data_unit, - buf, buf ); - if( ret != 0 ) - goto exit; + ret = mbedtls_aes_crypt_xts(&ctx_xts, mode, len, data_unit, + buf, buf); + if (ret != 0) { + goto exit; + } - if( memcmp( buf, aes_tests, len ) != 0 ) - { - ret = 1; - goto exit; - } + if (memcmp(buf, aes_tests, len) != 0) { + ret = 1; + goto exit; + } - if( verbose != 0 ) - mbedtls_printf( "passed\n" ); - } + if (verbose != 0) { + mbedtls_printf("passed\n"); + } + } - if( verbose != 0 ) - mbedtls_printf( "\n" ); + if (verbose != 0) { + mbedtls_printf("\n"); + } - mbedtls_aes_xts_free( &ctx_xts ); + mbedtls_aes_xts_free(&ctx_xts); } #endif /* MBEDTLS_CIPHER_MODE_XTS */ ret = 0; exit: - if( ret != 0 && verbose != 0 ) - mbedtls_printf( "failed\n" ); + if (ret != 0 && verbose != 0) { + mbedtls_printf("failed\n"); + } - mbedtls_aes_free( &ctx ); + mbedtls_aes_free(&ctx); - return( ret ); + return ret; } #endif /* MBEDTLS_SELF_TEST */ diff --git a/ra/fsp/src/rm_psa_crypto/ccm_alt.c b/ra/fsp/src/rm_psa_crypto/ccm_alt.c new file mode 100644 index 000000000..895274724 --- /dev/null +++ b/ra/fsp/src/rm_psa_crypto/ccm_alt.c @@ -0,0 +1,710 @@ +/* + * NIST SP800-38C compliant CCM implementation + * + * Copyright The Mbed TLS Contributors + * SPDX-License-Identifier: Apache-2.0 + * + * Licensed under the Apache License, Version 2.0 (the "License"); you may + * not use this file except in compliance with the License. + * You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT + * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. + */ + +/* + * Definition of CCM: + * http://csrc.nist.gov/publications/nistpubs/800-38C/SP800-38C_updated-July20_2007.pdf + * RFC 3610 "Counter with CBC-MAC (CCM)" + * + * Related: + * RFC 5116 "An Interface and Algorithms for Authenticated Encryption" + */ + +#include "common.h" + +#if defined(MBEDTLS_CCM_C) + +#include "mbedtls/ccm.h" +#include "mbedtls/platform_util.h" +#include "mbedtls/error.h" + +#include <string.h> + +#if defined(MBEDTLS_PLATFORM_C) +#include "mbedtls/platform.h" +#else +#if defined(MBEDTLS_SELF_TEST) && defined(MBEDTLS_AES_C) +#include <stdio.h> +#define mbedtls_printf printf +#endif /* MBEDTLS_SELF_TEST && MBEDTLS_AES_C */ +#endif /* MBEDTLS_PLATFORM_C */ + +#if defined(MBEDTLS_CCM_ALT) +#include "ccm_alt.h" + +/* + * Initialize context + */ +void mbedtls_ccm_init(mbedtls_ccm_context *ctx) +{ + memset(ctx, 0, sizeof(mbedtls_ccm_context)); +} + +int mbedtls_ccm_setkey(mbedtls_ccm_context *ctx, + mbedtls_cipher_id_t cipher, + const unsigned char *key, + unsigned int keybits) +{ + int ret = MBEDTLS_ERR_ERROR_CORRUPTION_DETECTED; + const mbedtls_cipher_info_t *cipher_info; + + cipher_info = mbedtls_cipher_info_from_values(cipher, keybits, + MBEDTLS_MODE_ECB); + if (cipher_info == NULL) { + return MBEDTLS_ERR_CCM_BAD_INPUT; + } + + if (cipher_info->block_size != 16) { + return MBEDTLS_ERR_CCM_BAD_INPUT; + } + + mbedtls_cipher_free(&ctx->cipher_ctx); + + if ((ret = mbedtls_cipher_setup(&ctx->cipher_ctx, cipher_info)) != 0) { + return ret; + } + + if ((ret = mbedtls_cipher_setkey(&ctx->cipher_ctx, key, keybits, + MBEDTLS_ENCRYPT)) != 0) { + return ret; + } + + return 0; +} + +/* + * Free context + */ +void mbedtls_ccm_free(mbedtls_ccm_context *ctx) +{ + if (ctx == NULL) { + return; + } + mbedtls_cipher_free(&ctx->cipher_ctx); + mbedtls_platform_zeroize(ctx, sizeof(mbedtls_ccm_context)); +} + +#define CCM_STATE__CLEAR 0 +#define CCM_STATE__STARTED (1 << 0) +#define CCM_STATE__LENGTHS_SET (1 << 1) +#define CCM_STATE__AUTH_DATA_STARTED (1 << 2) +#define CCM_STATE__AUTH_DATA_FINISHED (1 << 3) +#define CCM_STATE__ERROR (1 << 4) + +/* + * Encrypt or decrypt a partial block with CTR + */ +static int mbedtls_ccm_crypt(mbedtls_ccm_context *ctx, + size_t offset, size_t use_len, + const unsigned char *input, + unsigned char *output) +{ + size_t i; + size_t olen = 0; + int ret = MBEDTLS_ERR_ERROR_CORRUPTION_DETECTED; + unsigned char tmp_buf[16] = { 0 }; + + if ((ret = mbedtls_cipher_update(&ctx->cipher_ctx, ctx->ctr, 16, tmp_buf, + &olen)) != 0) { + ctx->state |= CCM_STATE__ERROR; + mbedtls_platform_zeroize(tmp_buf, sizeof(tmp_buf)); + return ret; + } + + for( i = 0; i < use_len; i++ ) + output[i] = input[i] ^ tmp_buf[offset + i]; + + mbedtls_platform_zeroize(tmp_buf, sizeof(tmp_buf)); + return ret; +} + +static void mbedtls_ccm_clear_state(mbedtls_ccm_context *ctx) +{ + ctx->state = CCM_STATE__CLEAR; + memset(ctx->y, 0, 16); + memset(ctx->ctr, 0, 16); +} + +static int ccm_calculate_first_block_if_ready(mbedtls_ccm_context *ctx) +{ + int ret = MBEDTLS_ERR_ERROR_CORRUPTION_DETECTED; + unsigned char i; + size_t len_left, olen; + + /* length calculation can be done only after both + * mbedtls_ccm_starts() and mbedtls_ccm_set_lengths() have been executed + */ + if (!(ctx->state & CCM_STATE__STARTED) || !(ctx->state & CCM_STATE__LENGTHS_SET)) { + return 0; + } + + /* CCM expects non-empty tag. + * CCM* allows empty tag. For CCM* without tag, ignore plaintext length. + */ + if (ctx->tag_len == 0) { + if (ctx->mode == MBEDTLS_CCM_STAR_ENCRYPT || ctx->mode == MBEDTLS_CCM_STAR_DECRYPT) { + ctx->plaintext_len = 0; + } else { + return MBEDTLS_ERR_CCM_BAD_INPUT; + } + } + + /* + * First block: + * 0 .. 0 flags + * 1 .. iv_len nonce (aka iv) - set by: mbedtls_ccm_starts() + * iv_len+1 .. 15 length + * + * With flags as (bits): + * 7 0 + * 6 add present? + * 5 .. 3 (t - 2) / 2 + * 2 .. 0 q - 1 + */ + ctx->y[0] |= (ctx->add_len > 0) << 6; + ctx->y[0] |= ((ctx->tag_len - 2) / 2) << 3; + ctx->y[0] |= ctx->q - 1; + + for (i = 0, len_left = ctx->plaintext_len; i < ctx->q; i++, len_left >>= 8) { + ctx->y[15-i] = MBEDTLS_BYTE_0(len_left); + } + + if (len_left > 0) { + ctx->state |= CCM_STATE__ERROR; + return MBEDTLS_ERR_CCM_BAD_INPUT; + } + + /* Start CBC-MAC with first block*/ + if ((ret = mbedtls_cipher_update(&ctx->cipher_ctx, ctx->y, 16, ctx->y, &olen)) != 0) { + ctx->state |= CCM_STATE__ERROR; + return ret; + } + + return 0; +} + +int mbedtls_ccm_starts(mbedtls_ccm_context *ctx, + int mode, + const unsigned char *iv, + size_t iv_len) +{ + /* Also implies q is within bounds */ + if (iv_len < 7 || iv_len > 13) { + return MBEDTLS_ERR_CCM_BAD_INPUT; + } + + ctx->mode = mode; + ctx->q = 16 - 1 - (unsigned char) iv_len; + + /* + * Prepare counter block for encryption: + * 0 .. 0 flags + * 1 .. iv_len nonce (aka iv) + * iv_len+1 .. 15 counter (initially 1) + * + * With flags as (bits): + * 7 .. 3 0 + * 2 .. 0 q - 1 + */ + memset(ctx->ctr, 0, 16); + ctx->ctr[0] = ctx->q - 1; + memcpy(ctx->ctr + 1, iv, iv_len); + memset(ctx->ctr + 1 + iv_len, 0, ctx->q); + ctx->ctr[15] = 1; + + /* + * See ccm_calculate_first_block_if_ready() for block layout description + */ + memcpy(ctx->y + 1, iv, iv_len); + + ctx->state |= CCM_STATE__STARTED; + return ccm_calculate_first_block_if_ready(ctx); +} + +int mbedtls_ccm_set_lengths(mbedtls_ccm_context *ctx, + size_t total_ad_len, + size_t plaintext_len, + size_t tag_len) +{ + /* + * Check length requirements: SP800-38C A.1 + * Additional requirement: a < 2^16 - 2^8 to simplify the code. + * 'length' checked later (when writing it to the first block) + * + * Also, loosen the requirements to enable support for CCM* (IEEE 802.15.4). + */ + if (tag_len == 2 || tag_len > 16 || tag_len % 2 != 0) { + return MBEDTLS_ERR_CCM_BAD_INPUT; + } + + if (total_ad_len >= 0xFF00) { + return MBEDTLS_ERR_CCM_BAD_INPUT; + } + + ctx->plaintext_len = plaintext_len; + ctx->add_len = total_ad_len; + ctx->tag_len = tag_len; + ctx->processed = 0; + + ctx->state |= CCM_STATE__LENGTHS_SET; + return ccm_calculate_first_block_if_ready(ctx); +} + +int mbedtls_ccm_update_ad(mbedtls_ccm_context *ctx, + const unsigned char *add, + size_t add_len) +{ + int ret = MBEDTLS_ERR_ERROR_CORRUPTION_DETECTED; + unsigned char i; + size_t olen, use_len, offset; + + if (ctx->state & CCM_STATE__ERROR) { + return MBEDTLS_ERR_CCM_BAD_INPUT; + } + + if (add_len > 0) { + if (ctx->state & CCM_STATE__AUTH_DATA_FINISHED) { + return MBEDTLS_ERR_CCM_BAD_INPUT; + } + + if (!(ctx->state & CCM_STATE__AUTH_DATA_STARTED)) { + if (add_len > ctx->add_len) { + return MBEDTLS_ERR_CCM_BAD_INPUT; + } + + ctx->y[0] ^= (unsigned char) ((ctx->add_len >> 8) & 0xFF); + ctx->y[1] ^= (unsigned char) ((ctx->add_len) & 0xFF); + + ctx->state |= CCM_STATE__AUTH_DATA_STARTED; + } else if (ctx->processed + add_len > ctx->add_len) { + return MBEDTLS_ERR_CCM_BAD_INPUT; + } + + while (add_len > 0) { + offset = (ctx->processed + 2) % 16; /* account for y[0] and y[1] + * holding total auth data length */ + use_len = 16 - offset; + + if (use_len > add_len) { + use_len = add_len; + } + + for( i = 0; i < use_len; i++ ) + ctx->y[i + offset] ^= add[i]; + + ctx->processed += use_len; + add_len -= use_len; + add += use_len; + + if (use_len + offset == 16 || ctx->processed == ctx->add_len) { + if ((ret = + mbedtls_cipher_update(&ctx->cipher_ctx, ctx->y, 16, ctx->y, &olen)) != 0) { + ctx->state |= CCM_STATE__ERROR; + return ret; + } + } + } + + if (ctx->processed == ctx->add_len) { + ctx->state |= CCM_STATE__AUTH_DATA_FINISHED; + ctx->processed = 0; // prepare for mbedtls_ccm_update() + } + } + + return 0; +} + +int mbedtls_ccm_update(mbedtls_ccm_context *ctx, + const unsigned char *input, size_t input_len, + unsigned char *output, size_t output_size, + size_t *output_len) +{ + int ret = MBEDTLS_ERR_ERROR_CORRUPTION_DETECTED; + unsigned char i; + size_t use_len, offset, olen; + + unsigned char local_output[16]; + + if (ctx->state & CCM_STATE__ERROR) { + return MBEDTLS_ERR_CCM_BAD_INPUT; + } + + /* Check against plaintext length only if performing operation with + * authentication + */ + if (ctx->tag_len != 0 && ctx->processed + input_len > ctx->plaintext_len) { + return MBEDTLS_ERR_CCM_BAD_INPUT; + } + + if (output_size < input_len) { + return MBEDTLS_ERR_CCM_BAD_INPUT; + } + *output_len = input_len; + + ret = 0; + + while (input_len > 0) { + offset = ctx->processed % 16; + + use_len = 16 - offset; + + if (use_len > input_len) { + use_len = input_len; + } + + ctx->processed += use_len; + + if (ctx->mode == MBEDTLS_CCM_ENCRYPT || \ + ctx->mode == MBEDTLS_CCM_STAR_ENCRYPT) { + for( i = 0; i < use_len; i++ ) + ctx->y[i + offset] ^= input[i]; + + if (use_len + offset == 16 || ctx->processed == ctx->plaintext_len) { + if ((ret = + mbedtls_cipher_update(&ctx->cipher_ctx, ctx->y, 16, ctx->y, &olen)) != 0) { + ctx->state |= CCM_STATE__ERROR; + goto exit; + } + } + + ret = mbedtls_ccm_crypt(ctx, offset, use_len, input, output); + if (ret != 0) { + goto exit; + } + } + + if (ctx->mode == MBEDTLS_CCM_DECRYPT || \ + ctx->mode == MBEDTLS_CCM_STAR_DECRYPT) { + /* Since output may be in shared memory, we cannot be sure that + * it will contain what we wrote to it. Therefore, we should avoid using + * it as input to any operations. + * Write decrypted data to local_output to avoid using output variable as + * input in the XOR operation for Y. + */ + ret = mbedtls_ccm_crypt(ctx, offset, use_len, input, local_output); + if (ret != 0) { + goto exit; + } + + for( i = 0; i < use_len; i++ ) + ctx->y[i + offset] ^= local_output[i]; + + memcpy(output, local_output, use_len); + mbedtls_platform_zeroize(local_output, 16); + + if (use_len + offset == 16 || ctx->processed == ctx->plaintext_len) { + if ((ret = + mbedtls_cipher_update(&ctx->cipher_ctx, ctx->y, 16, ctx->y, &olen)) != 0) { + ctx->state |= CCM_STATE__ERROR; + goto exit; + } + } + } + + if (use_len + offset == 16 || ctx->processed == ctx->plaintext_len) { + for (i = 0; i < ctx->q; i++) { + if (++(ctx->ctr)[15-i] != 0) { + break; + } + } + } + + input_len -= use_len; + input += use_len; + output += use_len; + } + +exit: + mbedtls_platform_zeroize(local_output, 16); + + return ret; +} + +int mbedtls_ccm_finish(mbedtls_ccm_context *ctx, + unsigned char *tag, size_t tag_len) +{ + int ret = MBEDTLS_ERR_ERROR_CORRUPTION_DETECTED; + unsigned char i; + + if (ctx->state & CCM_STATE__ERROR) { + return MBEDTLS_ERR_ERROR_CORRUPTION_DETECTED; + } + + if (ctx->add_len > 0 && !(ctx->state & CCM_STATE__AUTH_DATA_FINISHED)) { + return MBEDTLS_ERR_CCM_BAD_INPUT; + } + + if (ctx->plaintext_len > 0 && ctx->processed != ctx->plaintext_len) { + return MBEDTLS_ERR_CCM_BAD_INPUT; + } + + /* + * Authentication: reset counter and crypt/mask internal tag + */ + for (i = 0; i < ctx->q; i++) { + ctx->ctr[15-i] = 0; + } + + ret = mbedtls_ccm_crypt(ctx, 0, 16, ctx->y, ctx->y); + if (ret != 0) { + return ret; + } + if (tag != NULL) { + memcpy(tag, ctx->y, tag_len); + } + mbedtls_ccm_clear_state(ctx); + + return 0; +} + +/* + * Authenticated encryption or decryption + */ +static int ccm_auth_crypt(mbedtls_ccm_context *ctx, int mode, size_t length, + const unsigned char *iv, size_t iv_len, + const unsigned char *add, size_t add_len, + const unsigned char *input, unsigned char *output, + unsigned char *tag, size_t tag_len) +{ + return (sce_ccm_crypt_and_tag(ctx, mode, length, iv, iv_len, add, + add_len, input, output, tag_len, tag)); +} + +/* + * Authenticated encryption + */ +int mbedtls_ccm_star_encrypt_and_tag(mbedtls_ccm_context *ctx, size_t length, + const unsigned char *iv, size_t iv_len, + const unsigned char *add, size_t add_len, + const unsigned char *input, unsigned char *output, + unsigned char *tag, size_t tag_len) +{ + return ccm_auth_crypt(ctx, MBEDTLS_CCM_STAR_ENCRYPT, length, iv, iv_len, + add, add_len, input, output, tag, tag_len); +} + +int mbedtls_ccm_encrypt_and_tag(mbedtls_ccm_context *ctx, size_t length, + const unsigned char *iv, size_t iv_len, + const unsigned char *add, size_t add_len, + const unsigned char *input, unsigned char *output, + unsigned char *tag, size_t tag_len) +{ + return ccm_auth_crypt(ctx, MBEDTLS_CCM_ENCRYPT, length, iv, iv_len, + add, add_len, input, output, tag, tag_len); +} + +/* + * Authenticated decryption + */ +static int mbedtls_ccm_compare_tags(const unsigned char *tag1, + const unsigned char *tag2, + size_t tag_len) +{ + unsigned char i; + int diff; + + /* Check tag in "constant-time" */ + for (diff = 0, i = 0; i < tag_len; i++) { + diff |= tag1[i] ^ tag2[i]; + } + + if (diff != 0) { + return MBEDTLS_ERR_CCM_AUTH_FAILED; + } + + return 0; +} + +static int ccm_auth_decrypt(mbedtls_ccm_context *ctx, int mode, size_t length, + const unsigned char *iv, size_t iv_len, + const unsigned char *add, size_t add_len, + const unsigned char *input, unsigned char *output, + const unsigned char *tag, size_t tag_len) +{ + int ret = MBEDTLS_ERR_ERROR_CORRUPTION_DETECTED; + + if( ( ret = ccm_auth_crypt( ctx, mode, length, + iv, iv_len, add, add_len, + input, output, (unsigned char *)tag, tag_len ) ) != 0 ) + { + mbedtls_platform_zeroize( output, length ); + return ret; + } + + + return 0; +} + +int mbedtls_ccm_star_auth_decrypt(mbedtls_ccm_context *ctx, size_t length, + const unsigned char *iv, size_t iv_len, + const unsigned char *add, size_t add_len, + const unsigned char *input, unsigned char *output, + const unsigned char *tag, size_t tag_len) +{ + return ccm_auth_decrypt(ctx, MBEDTLS_CCM_STAR_DECRYPT, length, + iv, iv_len, add, add_len, + input, output, tag, tag_len); +} + +int mbedtls_ccm_auth_decrypt(mbedtls_ccm_context *ctx, size_t length, + const unsigned char *iv, size_t iv_len, + const unsigned char *add, size_t add_len, + const unsigned char *input, unsigned char *output, + const unsigned char *tag, size_t tag_len) +{ + return ccm_auth_decrypt(ctx, MBEDTLS_CCM_DECRYPT, length, + iv, iv_len, add, add_len, + input, output, tag, tag_len); +} + +#if defined(MBEDTLS_SELF_TEST) && defined(MBEDTLS_AES_C) +/* + * Examples 1 to 3 from SP800-38C Appendix C + */ + +#define NB_TESTS 3 +#define CCM_SELFTEST_PT_MAX_LEN 24 +#define CCM_SELFTEST_CT_MAX_LEN 32 +/* + * The data is the same for all tests, only the used length changes + */ +static const unsigned char key_test_data[] = { + 0x40, 0x41, 0x42, 0x43, 0x44, 0x45, 0x46, 0x47, + 0x48, 0x49, 0x4a, 0x4b, 0x4c, 0x4d, 0x4e, 0x4f +}; + +static const unsigned char iv_test_data[] = { + 0x10, 0x11, 0x12, 0x13, 0x14, 0x15, 0x16, 0x17, + 0x18, 0x19, 0x1a, 0x1b +}; + +static const unsigned char ad_test_data[] = { + 0x00, 0x01, 0x02, 0x03, 0x04, 0x05, 0x06, 0x07, + 0x08, 0x09, 0x0a, 0x0b, 0x0c, 0x0d, 0x0e, 0x0f, + 0x10, 0x11, 0x12, 0x13 +}; + +static const unsigned char msg_test_data[CCM_SELFTEST_PT_MAX_LEN] = { + 0x20, 0x21, 0x22, 0x23, 0x24, 0x25, 0x26, 0x27, + 0x28, 0x29, 0x2a, 0x2b, 0x2c, 0x2d, 0x2e, 0x2f, + 0x30, 0x31, 0x32, 0x33, 0x34, 0x35, 0x36, 0x37, +}; + +static const size_t iv_len_test_data[NB_TESTS] = { 7, 8, 12 }; +static const size_t add_len_test_data[NB_TESTS] = { 8, 16, 20 }; +static const size_t msg_len_test_data[NB_TESTS] = { 4, 16, 24 }; +static const size_t tag_len_test_data[NB_TESTS] = { 4, 6, 8 }; + +static const unsigned char res_test_data[NB_TESTS][CCM_SELFTEST_CT_MAX_LEN] = { + { 0x71, 0x62, 0x01, 0x5b, 0x4d, 0xac, 0x25, 0x5d }, + { 0xd2, 0xa1, 0xf0, 0xe0, 0x51, 0xea, 0x5f, 0x62, + 0x08, 0x1a, 0x77, 0x92, 0x07, 0x3d, 0x59, 0x3d, + 0x1f, 0xc6, 0x4f, 0xbf, 0xac, 0xcd }, + { 0xe3, 0xb2, 0x01, 0xa9, 0xf5, 0xb7, 0x1a, 0x7a, + 0x9b, 0x1c, 0xea, 0xec, 0xcd, 0x97, 0xe7, 0x0b, + 0x61, 0x76, 0xaa, 0xd9, 0xa4, 0x42, 0x8a, 0xa5, + 0x48, 0x43, 0x92, 0xfb, 0xc1, 0xb0, 0x99, 0x51 } +}; + +int mbedtls_ccm_self_test(int verbose) +{ + mbedtls_ccm_context ctx; + /* + * Some hardware accelerators require the input and output buffers + * would be in RAM, because the flash is not accessible. + * Use buffers on the stack to hold the test vectors data. + */ + unsigned char plaintext[CCM_SELFTEST_PT_MAX_LEN]; + unsigned char ciphertext[CCM_SELFTEST_CT_MAX_LEN]; + size_t i; + int ret = MBEDTLS_ERR_ERROR_CORRUPTION_DETECTED; + + mbedtls_ccm_init(&ctx); + + if (mbedtls_ccm_setkey(&ctx, MBEDTLS_CIPHER_ID_AES, key_test_data, + 8 * sizeof(key_test_data)) != 0) { + if (verbose != 0) { + mbedtls_printf(" CCM: setup failed"); + } + + return 1; + } + + for (i = 0; i < NB_TESTS; i++) { + if (verbose != 0) { + mbedtls_printf(" CCM-AES #%u: ", (unsigned int) i + 1); + } + + memset(plaintext, 0, CCM_SELFTEST_PT_MAX_LEN); + memset(ciphertext, 0, CCM_SELFTEST_CT_MAX_LEN); + memcpy(plaintext, msg_test_data, msg_len_test_data[i]); + + ret = mbedtls_ccm_encrypt_and_tag(&ctx, msg_len_test_data[i], + iv_test_data, iv_len_test_data[i], + ad_test_data, add_len_test_data[i], + plaintext, ciphertext, + ciphertext + msg_len_test_data[i], + tag_len_test_data[i]); + + if (ret != 0 || + memcmp(ciphertext, res_test_data[i], + msg_len_test_data[i] + tag_len_test_data[i]) != 0) { + if (verbose != 0) { + mbedtls_printf("failed\n"); + } + + return 1; + } + memset(plaintext, 0, CCM_SELFTEST_PT_MAX_LEN); + + ret = mbedtls_ccm_auth_decrypt(&ctx, msg_len_test_data[i], + iv_test_data, iv_len_test_data[i], + ad_test_data, add_len_test_data[i], + ciphertext, plaintext, + ciphertext + msg_len_test_data[i], + tag_len_test_data[i]); + + if (ret != 0 || + memcmp(plaintext, msg_test_data, msg_len_test_data[i]) != 0) { + if (verbose != 0) { + mbedtls_printf("failed\n"); + } + + return 1; + } + + if (verbose != 0) { + mbedtls_printf("passed\n"); + } + } + + mbedtls_ccm_free(&ctx); + + if (verbose != 0) { + mbedtls_printf("\n"); + } + + return 0; +} + +#endif /* MBEDTLS_SELF_TEST && MBEDTLS_AES_C */ + +#endif /* !MBEDTLS_CCM_ALT */ + +#endif /* MBEDTLS_CCM_C */ diff --git a/ra/fsp/src/rm_psa_crypto/ccm_alt_process.c b/ra/fsp/src/rm_psa_crypto/ccm_alt_process.c new file mode 100644 index 000000000..cb112861f --- /dev/null +++ b/ra/fsp/src/rm_psa_crypto/ccm_alt_process.c @@ -0,0 +1,341 @@ +/*********************************************************************************************************************** + * Copyright [2020-2023] Renesas Electronics Corporation and/or its affiliates. All Rights Reserved. + * + * This software and documentation are supplied by Renesas Electronics America Inc. and may only be used with products + * of Renesas Electronics Corp. and its affiliates ("Renesas"). No other uses are authorized. Renesas products are + * sold pursuant to Renesas terms and conditions of sale. Purchasers are solely responsible for the selection and use + * of Renesas products and Renesas assumes no liability. No license, express or implied, to any intellectual property + * right is granted by Renesas. This software is protected under all applicable laws, including copyright laws. Renesas + * reserves the right to change or discontinue this software and/or this documentation. THE SOFTWARE AND DOCUMENTATION + * IS DELIVERED TO YOU "AS IS," AND RENESAS MAKES NO REPRESENTATIONS OR WARRANTIES, AND TO THE FULLEST EXTENT + * PERMISSIBLE UNDER APPLICABLE LAW, DISCLAIMS ALL WARRANTIES, WHETHER EXPLICITLY OR IMPLICITLY, INCLUDING WARRANTIES + * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, AND NONINFRINGEMENT, WITH RESPECT TO THE SOFTWARE OR + * DOCUMENTATION. RENESAS SHALL HAVE NO LIABILITY ARISING OUT OF ANY SECURITY VULNERABILITY OR BREACH. TO THE MAXIMUM + * EXTENT PERMITTED BY LAW, IN NO EVENT WILL RENESAS BE LIABLE TO YOU IN CONNECTION WITH THE SOFTWARE OR DOCUMENTATION + * (OR ANY PERSON OR ENTITY CLAIMING RIGHTS DERIVED FROM YOU) FOR ANY LOSS, DAMAGES, OR CLAIMS WHATSOEVER, INCLUDING, + * WITHOUT LIMITATION, ANY DIRECT, CONSEQUENTIAL, SPECIAL, INDIRECT, PUNITIVE, OR INCIDENTAL DAMAGES; ANY LOST PROFITS, + * OTHER ECONOMIC DAMAGE, PROPERTY DAMAGE, OR PERSONAL INJURY; AND EVEN IF RENESAS HAS BEEN ADVISED OF THE POSSIBILITY + * OF SUCH LOSS, DAMAGES, CLAIMS OR COSTS. + **********************************************************************************************************************/ + +#include "common.h" + +#if defined(MBEDTLS_CCM_C) + + #include "mbedtls/ccm.h" + #include "mbedtls/platform_util.h" + #include "mbedtls/error.h" + + #include <string.h> + + #if defined(MBEDTLS_AESNI_C) + #include "mbedtls/aesni.h" + #endif + + #if defined(MBEDTLS_SELF_TEST) && defined(MBEDTLS_AES_C) + #include "mbedtls/aes.h" + #include "mbedtls/platform.h" + #if !defined(MBEDTLS_PLATFORM_C) + #include <stdio.h> + #define mbedtls_printf printf + #endif /* MBEDTLS_PLATFORM_C */ + #endif /* MBEDTLS_SELF_TEST && MBEDTLS_AES_C */ + + #if defined(MBEDTLS_CCM_ALT) + #include "hw_sce_private.h" + #include "hw_sce_aes_private.h" + #include "hw_sce_ra_private.h" + #include "aes_alt.h" + #include "platform_alt.h" + +/* Parameter validation macros */ + #define CCM_VALIDATE_RET(cond) \ + MBEDTLS_INTERNAL_VALIDATE_RET(cond, MBEDTLS_ERR_CCM_BAD_INPUT) + #define CCM_VALIDATE(cond) \ + MBEDTLS_INTERNAL_VALIDATE(cond) + + #define SCE9_AES_CCM_KEY_TYPE_GENERAL (0) + #define ROUNDOFF_TO_BLOCK_SIZE(BLOCK_SIZE, DATA_SIZE) (BLOCK_SIZE * ((DATA_SIZE + (BLOCK_SIZE - 1)) / BLOCK_SIZE)) + +/* AES-CCM Encryption Init HW call table based on key size */ +static const hw_sce_aes_ccm_encrypt_init_t g_sce_aes_ccm_encrypt_init[] = +{ + [RM_PSA_CRYPTO_AES_LOOKUP_INDEX(SIZE_AES_128BIT_KEYLEN_BITS)] = + HW_SCE_Aes128CcmEncryptInitSubGeneral, + [RM_PSA_CRYPTO_AES_LOOKUP_INDEX(SIZE_AES_192BIT_KEYLEN_BITS)] = + HW_SCE_Aes192CcmEncryptInitSubGeneral, + [RM_PSA_CRYPTO_AES_LOOKUP_INDEX(SIZE_AES_256BIT_KEYLEN_BITS)] = + HW_SCE_Aes256CcmEncryptInitSubGeneral, +}; + +/* AES-CCM Decryption Init HW call table based on key size */ +static const hw_sce_aes_ccm_decrypt_init_t g_sce_aes_ccm_decrypt_init[] = +{ + [RM_PSA_CRYPTO_AES_LOOKUP_INDEX(SIZE_AES_128BIT_KEYLEN_BITS)] = + HW_SCE_Aes128CcmDecryptInitSubGeneral, + [RM_PSA_CRYPTO_AES_LOOKUP_INDEX(SIZE_AES_192BIT_KEYLEN_BITS)] = + HW_SCE_Aes192CcmDecryptInitSubGeneral, + [RM_PSA_CRYPTO_AES_LOOKUP_INDEX(SIZE_AES_256BIT_KEYLEN_BITS)] = + HW_SCE_Aes256CcmDecryptInitSubGeneral, +}; + +/* AES-CCM Encryption/Decryption Update HW call table based on key size */ +static const hw_sce_aes_ccm_crypt_update_t g_sce_aes_ccm_crypt_update[][2U] = +{ + [RM_PSA_CRYPTO_AES_LOOKUP_INDEX(SIZE_AES_128BIT_KEYLEN_BITS)][MBEDTLS_CCM_ENCRYPT] = + HW_SCE_Aes128CcmEncryptUpdateSub, + [RM_PSA_CRYPTO_AES_LOOKUP_INDEX(SIZE_AES_128BIT_KEYLEN_BITS)][MBEDTLS_CCM_DECRYPT] = + HW_SCE_Aes128CcmDecryptUpdateSub, + [RM_PSA_CRYPTO_AES_LOOKUP_INDEX(SIZE_AES_192BIT_KEYLEN_BITS)][MBEDTLS_CCM_ENCRYPT] = + HW_SCE_Aes192CcmEncryptUpdateSub, + [RM_PSA_CRYPTO_AES_LOOKUP_INDEX(SIZE_AES_192BIT_KEYLEN_BITS)][MBEDTLS_CCM_DECRYPT] = + HW_SCE_Aes192CcmDecryptUpdateSub, + [RM_PSA_CRYPTO_AES_LOOKUP_INDEX(SIZE_AES_256BIT_KEYLEN_BITS)][MBEDTLS_CCM_ENCRYPT] = + HW_SCE_Aes256CcmEncryptUpdateSub, + [RM_PSA_CRYPTO_AES_LOOKUP_INDEX(SIZE_AES_256BIT_KEYLEN_BITS)][MBEDTLS_CCM_DECRYPT] = + HW_SCE_Aes256CcmDecryptUpdateSub, +}; + +/* AES-CCM Encryption Final HW call table based on key size */ +static const hw_sce_aes_ccm_encrypt_final_t g_sce_aes_ccm_encrypt_final[] = +{ + [RM_PSA_CRYPTO_AES_LOOKUP_INDEX(SIZE_AES_128BIT_KEYLEN_BITS)] = + HW_SCE_Aes128CcmEncryptFinalSubGeneral, + [RM_PSA_CRYPTO_AES_LOOKUP_INDEX(SIZE_AES_192BIT_KEYLEN_BITS)] = + HW_SCE_Aes192CcmEncryptFinalSub, + [RM_PSA_CRYPTO_AES_LOOKUP_INDEX(SIZE_AES_256BIT_KEYLEN_BITS)] = + HW_SCE_Aes256CcmEncryptFinalSub, +}; + +/* AES-CCM Decryption Final HW call table based on key size */ +static const hw_sce_aes_ccm_decrypt_final_t g_sce_aes_ccm_decrypt_final[] = +{ + [RM_PSA_CRYPTO_AES_LOOKUP_INDEX(SIZE_AES_128BIT_KEYLEN_BITS)] = + HW_SCE_Aes128CcmDecryptFinalSubGeneral, + [RM_PSA_CRYPTO_AES_LOOKUP_INDEX(SIZE_AES_192BIT_KEYLEN_BITS)] = + HW_SCE_Aes192CcmDecryptFinalSub, + [RM_PSA_CRYPTO_AES_LOOKUP_INDEX(SIZE_AES_256BIT_KEYLEN_BITS)] = + HW_SCE_Aes256CcmDecryptFinalSub, +}; + +static int ccm_counter_block_format (mbedtls_ccm_context * ctx, + const unsigned char * iv, + size_t iv_len, + uint8_t * b_format_buffer) +{ + /* Ensure iv length is within bounds */ + if ((iv_len < 7) || (iv_len > 13)) + { + return MBEDTLS_ERR_CCM_BAD_INPUT; + } + + /* Counter block formatting. */ + + /* + * Prepare counter block for encryption: + * 0 .. 0 flags + * 1 .. iv_len nonce (aka iv) + * iv_len+1 .. 15 counter + * + * With flags as (bits): + * 7 .. 3 0 + * 2 .. 0 q - 1 + */ + ctx->q = 16 - 1 - (unsigned char) iv_len; + + memset(ctx->ctr, 0, 16); + ctx->ctr[0] = ctx->q - 1; + memcpy(ctx->ctr + 1, iv, iv_len); + memset(ctx->ctr + 1 + iv_len, 0, ctx->q); + + memcpy(&b_format_buffer[1], iv, iv_len); + + return 0; +} + +static int ccm_authetication_block_format (mbedtls_ccm_context * ctx, + const unsigned char * aad, + size_t aad_len, + size_t plaintext_len, + size_t tag_len, + uint8_t * b_format_buffer, + uint32_t * format_buffer_length) +{ + size_t len_left = 0; + unsigned char i; + volatile size_t header_size = 0; + size_t header_data_expected = 0; + + /* + * Check length requirements: SP800-38C A.1 + * Additional requirement: a < 2^16 - 2^8 to simplify the code. + * 'length' checked later (when writing it to the first block) + * + * Also, loosen the requirements to enable support for CCM* (IEEE 802.15.4). + */ + if ((tag_len == 2) || (tag_len > 16) || (tag_len % 2 != 0)) + { + return MBEDTLS_ERR_CCM_BAD_INPUT; + } + + /* MbedTLS supports aad length which is less than 0xFF00, but is further limited by the size + * of the hardware buffer that is used to hold the header data. + * As per the SP800-38C document, the encoded size of aad and the aad data is placed from the + * 2nd block (i.e, B1, B2, etc). + * + * B0 Initial block with FLAG, Nonce and Payload length. + * B1 (2 bytes for encoded aad length + aad data) + * aad data is added to further blocks and rounded + * off to block size with zero padding, if required. + */ + header_data_expected += HW_SCE_AES_BLOCK_BYTE_SIZE; + header_data_expected += ROUNDOFF_TO_BLOCK_SIZE(HW_SCE_AES_BLOCK_BYTE_SIZE, (2U + aad_len)); + + if (header_data_expected > HW_SCE_AES_CCM_B_FORMAT_BYTE_SIZE) + { + return MBEDTLS_ERR_CCM_BAD_INPUT; + } + + ctx->plaintext_len = plaintext_len; + ctx->add_len = aad_len; + ctx->tag_len = tag_len; + + *b_format_buffer |= (ctx->add_len > 0) << 6; + *b_format_buffer |= ((ctx->tag_len - 2) / 2) << 3; + *b_format_buffer |= ctx->q - 1; + + for (i = 0, len_left = ctx->plaintext_len; i < ctx->q; i++, len_left >>= 8) + { + b_format_buffer[15 - i] = MBEDTLS_BYTE_0(len_left); + } + + if (len_left > 0) + { + return MBEDTLS_ERR_CCM_BAD_INPUT; + } + + header_size += HW_SCE_AES_BLOCK_BYTE_SIZE; + b_format_buffer[header_size] = (unsigned char) ((ctx->add_len >> 8) & 0xFF); + header_size++; + b_format_buffer[header_size] = (unsigned char) ((ctx->add_len) & 0xFF); + + header_size++; + memcpy(&b_format_buffer[header_size], aad, aad_len); + header_size += aad_len; + header_size = ROUNDOFF_TO_BLOCK_SIZE(HW_SCE_AES_BLOCK_BYTE_SIZE, header_size); + + /* Header size to be specified in words. */ + *format_buffer_length = header_size >> 2; + + return 0; +} + +/* AES-CCM operation using SCE9 HW procedures */ +int sce_ccm_crypt_and_tag (mbedtls_ccm_context * ctx, + int mode, + size_t length, + const unsigned char * iv, + size_t iv_len, + const unsigned char * aad, + size_t aad_len, + const unsigned char * input, + unsigned char * output, + size_t tag_len, + unsigned char * tag) +{ + int ret = MBEDTLS_ERR_ERROR_CORRUPTION_DETECTED; + + CCM_VALIDATE_RET(ctx != NULL); + CCM_VALIDATE_RET(iv != NULL); + CCM_VALIDATE_RET(aad_len == 0 || aad != NULL); + CCM_VALIDATE_RET(length == 0 || input != NULL); + CCM_VALIDATE_RET(length == 0 || output != NULL); + CCM_VALIDATE_RET(tag != NULL); + + uint32_t key_len_idx = RM_PSA_CRYPTO_AES_LOOKUP_INDEX(ctx->cipher_ctx.key_bitlen); + mbedtls_aes_context * aes_ctx = (mbedtls_aes_context *) ctx->cipher_ctx.cipher_ctx; + fsp_err_t err = FSP_SUCCESS; + uint32_t key_type[1] = {SCE9_AES_CCM_KEY_TYPE_GENERAL}; + uint32_t indata_cmd[1] = {0}; + uint32_t indata_type[1] = {0}; + uint32_t indata_textlen[1] = {0}; + uint32_t indata_maclength[1] = {0}; + uint32_t indata_seqnum[1] = {0}; + uint32_t header_length = 0; + uint32_t input_length = 0; + uint32_t offset_length = 0; + uint8_t work_buffer[HW_SCE_AES_CCM_B_FORMAT_BYTE_SIZE] = {0}; + uint8_t mac_buff[HW_SCE_MAC_SIZE] = {0}; + + indata_textlen[0] = change_endian_long(length); + indata_maclength[0] = change_endian_long(tag_len); + + memset(work_buffer, 0, HW_SCE_AES_CCM_B_FORMAT_BYTE_SIZE); + + if ((ret = ccm_counter_block_format(ctx, iv, iv_len, work_buffer)) != 0) + { + return ret; + } + + if ((ret = ccm_authetication_block_format(ctx, aad, aad_len, length, tag_len, work_buffer, &header_length)) != 0U) + { + return ret; + } + + if (MBEDTLS_CCM_ENCRYPT == mode) + { + err = g_sce_aes_ccm_encrypt_init[key_len_idx](key_type, indata_type, indata_cmd, indata_textlen, + (uint32_t *) (aes_ctx->buf), (uint32_t *) &ctx->ctr[0], + (uint32_t *) work_buffer, indata_seqnum, + header_length); + } + else + { + err = g_sce_aes_ccm_decrypt_init[key_len_idx](key_type, indata_type, indata_cmd, indata_textlen, + (uint32_t *) indata_maclength, (uint32_t *) (aes_ctx->buf), + (uint32_t *) &ctx->ctr[0], (uint32_t *) work_buffer, + indata_seqnum, header_length); + } + + offset_length = length % MBEDTLS_MAX_BLOCK_LENGTH; + input_length = length - offset_length; + + if (input_length) + { + g_sce_aes_ccm_crypt_update[key_len_idx][mode]((uint32_t *) input, + (uint32_t *) output, + BYTES_TO_WORDS(input_length)); + } + + memset(work_buffer, 0, HW_SCE_AES_CCM_B_FORMAT_BYTE_SIZE); + if (0 != offset_length) + { + memcpy(work_buffer, &input[input_length], offset_length); + } + + if (MBEDTLS_CCM_ENCRYPT == mode) + { + err = g_sce_aes_ccm_encrypt_final[key_len_idx](indata_textlen, (uint32_t *) work_buffer, + (uint32_t *) &output[input_length], (uint32_t *) tag); + } + else + { + memset(mac_buff, 0, HW_SCE_MAC_SIZE); + memcpy(mac_buff, tag, tag_len); + err = g_sce_aes_ccm_decrypt_final[key_len_idx]((uint32_t *) work_buffer, indata_textlen, + (uint32_t *) mac_buff, (uint32_t *) indata_maclength, + (uint32_t *) &output[input_length]); + memcpy(tag, mac_buff, tag_len); + } + + if (FSP_SUCCESS != err) + { + return MBEDTLS_ERR_PLATFORM_HW_ACCEL_FAILED; + } + + return ret; +} + + #endif /* !MBEDTLS_CCM_ALT */ + +#endif /* MBEDTLS_CCM_C */ diff --git a/ra/fsp/src/rm_psa_crypto/cipher_alt.c b/ra/fsp/src/rm_psa_crypto/cipher_alt.c index d3bf01a68..a95fd7d5c 100644 --- a/ra/fsp/src/rm_psa_crypto/cipher_alt.c +++ b/ra/fsp/src/rm_psa_crypto/cipher_alt.c @@ -65,20 +65,10 @@ #include "mbedtls/nist_kw.h" #endif -#if defined(MBEDTLS_PLATFORM_C) #include "mbedtls/platform.h" -#else -#define mbedtls_calloc calloc -#define mbedtls_free free -#endif #include "hw_sce_ra_private.h" -#define CIPHER_VALIDATE_RET( cond ) \ - MBEDTLS_INTERNAL_VALIDATE_RET( cond, MBEDTLS_ERR_CIPHER_BAD_INPUT_DATA ) -#define CIPHER_VALIDATE( cond ) \ - MBEDTLS_INTERNAL_VALIDATE( cond ) - #if (BSP_FEATURE_CRYPTO_HAS_SCE9 || BSP_FEATURE_CRYPTO_HAS_SCE5B || BSP_FEATURE_CRYPTO_HAS_SCE5 || BSP_FEATURE_CRYPTO_HAS_SCE7) && defined(MBEDTLS_AES_C) && defined(MBEDTLS_AES_ALT) static int sce_aes_cipher_final( mbedtls_cipher_context_t *ctx ) { @@ -116,130 +106,135 @@ static int sce_aes_cipher_final( mbedtls_cipher_context_t *ctx ) static int supported_init = 0; -const int *mbedtls_cipher_list( void ) +const int *mbedtls_cipher_list(void) { const mbedtls_cipher_definition_t *def; int *type; - if( ! supported_init ) - { + if (!supported_init) { def = mbedtls_cipher_definitions; type = mbedtls_cipher_supported; - while( def->type != 0 ) + while (def->type != 0) { *type++ = (*def++).type; + } *type = 0; supported_init = 1; } - return( mbedtls_cipher_supported ); + return mbedtls_cipher_supported; } const mbedtls_cipher_info_t *mbedtls_cipher_info_from_type( - const mbedtls_cipher_type_t cipher_type ) + const mbedtls_cipher_type_t cipher_type) { const mbedtls_cipher_definition_t *def; - for( def = mbedtls_cipher_definitions; def->info != NULL; def++ ) - if( def->type == cipher_type ) - return( def->info ); + for (def = mbedtls_cipher_definitions; def->info != NULL; def++) { + if (def->type == cipher_type) { + return def->info; + } + } - return( NULL ); + return NULL; } const mbedtls_cipher_info_t *mbedtls_cipher_info_from_string( - const char *cipher_name ) + const char *cipher_name) { const mbedtls_cipher_definition_t *def; - if( NULL == cipher_name ) - return( NULL ); + if (NULL == cipher_name) { + return NULL; + } - for( def = mbedtls_cipher_definitions; def->info != NULL; def++ ) - if( ! strcmp( def->info->name, cipher_name ) ) - return( def->info ); + for (def = mbedtls_cipher_definitions; def->info != NULL; def++) { + if (!strcmp(def->info->name, cipher_name)) { + return def->info; + } + } - return( NULL ); + return NULL; } const mbedtls_cipher_info_t *mbedtls_cipher_info_from_values( const mbedtls_cipher_id_t cipher_id, int key_bitlen, - const mbedtls_cipher_mode_t mode ) + const mbedtls_cipher_mode_t mode) { const mbedtls_cipher_definition_t *def; - for( def = mbedtls_cipher_definitions; def->info != NULL; def++ ) - if( def->info->base->cipher == cipher_id && + for (def = mbedtls_cipher_definitions; def->info != NULL; def++) { + if (def->info->base->cipher == cipher_id && def->info->key_bitlen == (unsigned) key_bitlen && - def->info->mode == mode ) - return( def->info ); + def->info->mode == mode) { + return def->info; + } + } - return( NULL ); + return NULL; } -void mbedtls_cipher_init( mbedtls_cipher_context_t *ctx ) +void mbedtls_cipher_init(mbedtls_cipher_context_t *ctx) { - CIPHER_VALIDATE( ctx != NULL ); - memset( ctx, 0, sizeof( mbedtls_cipher_context_t ) ); + memset(ctx, 0, sizeof(mbedtls_cipher_context_t)); } -void mbedtls_cipher_free( mbedtls_cipher_context_t *ctx ) +void mbedtls_cipher_free(mbedtls_cipher_context_t *ctx) { - if( ctx == NULL ) + if (ctx == NULL) { return; + } #if defined(MBEDTLS_USE_PSA_CRYPTO) - if( ctx->psa_enabled == 1 ) - { - if( ctx->cipher_ctx != NULL ) - { + if (ctx->psa_enabled == 1) { + if (ctx->cipher_ctx != NULL) { mbedtls_cipher_context_psa * const cipher_psa = (mbedtls_cipher_context_psa *) ctx->cipher_ctx; - if( cipher_psa->slot_state == MBEDTLS_CIPHER_PSA_KEY_OWNED ) - { + if (cipher_psa->slot_state == MBEDTLS_CIPHER_PSA_KEY_OWNED) { /* xxx_free() doesn't allow to return failures. */ - (void) psa_destroy_key( cipher_psa->slot ); + (void) psa_destroy_key(cipher_psa->slot); } - mbedtls_platform_zeroize( cipher_psa, sizeof( *cipher_psa ) ); - mbedtls_free( cipher_psa ); + mbedtls_platform_zeroize(cipher_psa, sizeof(*cipher_psa)); + mbedtls_free(cipher_psa); } - mbedtls_platform_zeroize( ctx, sizeof(mbedtls_cipher_context_t) ); + mbedtls_platform_zeroize(ctx, sizeof(mbedtls_cipher_context_t)); return; } #endif /* MBEDTLS_USE_PSA_CRYPTO */ #if defined(MBEDTLS_CMAC_C) - if( ctx->cmac_ctx ) - { - mbedtls_platform_zeroize( ctx->cmac_ctx, - sizeof( mbedtls_cmac_context_t ) ); - mbedtls_free( ctx->cmac_ctx ); + if (ctx->cmac_ctx) { + mbedtls_platform_zeroize(ctx->cmac_ctx, + sizeof(mbedtls_cmac_context_t)); + mbedtls_free(ctx->cmac_ctx); } #endif - if( ctx->cipher_ctx ) - ctx->cipher_info->base->ctx_free_func( ctx->cipher_ctx ); + if (ctx->cipher_ctx) { + ctx->cipher_info->base->ctx_free_func(ctx->cipher_ctx); + } - mbedtls_platform_zeroize( ctx, sizeof(mbedtls_cipher_context_t) ); + mbedtls_platform_zeroize(ctx, sizeof(mbedtls_cipher_context_t)); } -int mbedtls_cipher_setup( mbedtls_cipher_context_t *ctx, - const mbedtls_cipher_info_t *cipher_info ) +int mbedtls_cipher_setup(mbedtls_cipher_context_t *ctx, + const mbedtls_cipher_info_t *cipher_info) { - CIPHER_VALIDATE_RET( ctx != NULL ); - if( cipher_info == NULL ) - return( MBEDTLS_ERR_CIPHER_BAD_INPUT_DATA ); + if (cipher_info == NULL) { + return MBEDTLS_ERR_CIPHER_BAD_INPUT_DATA; + } - memset( ctx, 0, sizeof( mbedtls_cipher_context_t ) ); + memset(ctx, 0, sizeof(mbedtls_cipher_context_t)); - if( NULL == ( ctx->cipher_ctx = cipher_info->base->ctx_alloc_func() ) ) - return( MBEDTLS_ERR_CIPHER_ALLOC_FAILED ); + if (NULL == (ctx->cipher_ctx = cipher_info->base->ctx_alloc_func())) { + return MBEDTLS_ERR_CIPHER_ALLOC_FAILED; + } ctx->cipher_info = cipher_info; @@ -248,108 +243,113 @@ int mbedtls_cipher_setup( mbedtls_cipher_context_t *ctx, * Ignore possible errors caused by a cipher mode that doesn't use padding */ #if defined(MBEDTLS_CIPHER_PADDING_PKCS7) - (void) mbedtls_cipher_set_padding_mode( ctx, MBEDTLS_PADDING_PKCS7 ); + (void) mbedtls_cipher_set_padding_mode(ctx, MBEDTLS_PADDING_PKCS7); #else - (void) mbedtls_cipher_set_padding_mode( ctx, MBEDTLS_PADDING_NONE ); + (void) mbedtls_cipher_set_padding_mode(ctx, MBEDTLS_PADDING_NONE); #endif #endif /* MBEDTLS_CIPHER_MODE_WITH_PADDING */ - return( 0 ); + return 0; } #if defined(MBEDTLS_USE_PSA_CRYPTO) #if !defined(MBEDTLS_DEPRECATED_REMOVED) -int mbedtls_cipher_setup_psa( mbedtls_cipher_context_t *ctx, - const mbedtls_cipher_info_t *cipher_info, - size_t taglen ) +int mbedtls_cipher_setup_psa(mbedtls_cipher_context_t *ctx, + const mbedtls_cipher_info_t *cipher_info, + size_t taglen) { psa_algorithm_t alg; mbedtls_cipher_context_psa *cipher_psa; - if( NULL == cipher_info || NULL == ctx ) - return( MBEDTLS_ERR_CIPHER_BAD_INPUT_DATA ); + if (NULL == cipher_info || NULL == ctx) { + return MBEDTLS_ERR_CIPHER_BAD_INPUT_DATA; + } /* Check that the underlying cipher mode and cipher type are * supported by the underlying PSA Crypto implementation. */ - alg = mbedtls_psa_translate_cipher_mode( cipher_info->mode, taglen ); - if( alg == 0 ) - return( MBEDTLS_ERR_CIPHER_FEATURE_UNAVAILABLE ); - if( mbedtls_psa_translate_cipher_type( cipher_info->type ) == 0 ) - return( MBEDTLS_ERR_CIPHER_FEATURE_UNAVAILABLE ); + alg = mbedtls_psa_translate_cipher_mode(cipher_info->mode, taglen); + if (alg == 0) { + return MBEDTLS_ERR_CIPHER_FEATURE_UNAVAILABLE; + } + if (mbedtls_psa_translate_cipher_type(cipher_info->type) == 0) { + return MBEDTLS_ERR_CIPHER_FEATURE_UNAVAILABLE; + } - memset( ctx, 0, sizeof( mbedtls_cipher_context_t ) ); + memset(ctx, 0, sizeof(mbedtls_cipher_context_t)); - cipher_psa = mbedtls_calloc( 1, sizeof(mbedtls_cipher_context_psa ) ); - if( cipher_psa == NULL ) - return( MBEDTLS_ERR_CIPHER_ALLOC_FAILED ); + cipher_psa = mbedtls_calloc(1, sizeof(mbedtls_cipher_context_psa)); + if (cipher_psa == NULL) { + return MBEDTLS_ERR_CIPHER_ALLOC_FAILED; + } cipher_psa->alg = alg; ctx->cipher_ctx = cipher_psa; ctx->cipher_info = cipher_info; ctx->psa_enabled = 1; - return( 0 ); + return 0; } #endif /* MBEDTLS_DEPRECATED_REMOVED */ #endif /* MBEDTLS_USE_PSA_CRYPTO */ -int mbedtls_cipher_setkey( mbedtls_cipher_context_t *ctx, - const unsigned char *key, - int key_bitlen, - const mbedtls_operation_t operation ) +int mbedtls_cipher_setkey(mbedtls_cipher_context_t *ctx, + const unsigned char *key, + int key_bitlen, + const mbedtls_operation_t operation) { - CIPHER_VALIDATE_RET( ctx != NULL ); - CIPHER_VALIDATE_RET( key != NULL ); - CIPHER_VALIDATE_RET( operation == MBEDTLS_ENCRYPT || - operation == MBEDTLS_DECRYPT ); - if( ctx->cipher_info == NULL ) - return( MBEDTLS_ERR_CIPHER_BAD_INPUT_DATA ); + if (operation != MBEDTLS_ENCRYPT && operation != MBEDTLS_DECRYPT) { + return MBEDTLS_ERR_CIPHER_BAD_INPUT_DATA; + } + if (ctx->cipher_info == NULL) { + return MBEDTLS_ERR_CIPHER_BAD_INPUT_DATA; + } #if defined(MBEDTLS_USE_PSA_CRYPTO) - if( ctx->psa_enabled == 1 ) - { + if (ctx->psa_enabled == 1) { mbedtls_cipher_context_psa * const cipher_psa = (mbedtls_cipher_context_psa *) ctx->cipher_ctx; - size_t const key_bytelen = ( (size_t) key_bitlen + 7 ) / 8; + size_t const key_bytelen = ((size_t) key_bitlen + 7) / 8; psa_status_t status; psa_key_type_t key_type; psa_key_attributes_t attributes = PSA_KEY_ATTRIBUTES_INIT; /* PSA Crypto API only accepts byte-aligned keys. */ - if( key_bitlen % 8 != 0 ) - return( MBEDTLS_ERR_CIPHER_BAD_INPUT_DATA ); + if (key_bitlen % 8 != 0) { + return MBEDTLS_ERR_CIPHER_BAD_INPUT_DATA; + } /* Don't allow keys to be set multiple times. */ - if( cipher_psa->slot_state != MBEDTLS_CIPHER_PSA_KEY_UNSET ) - return( MBEDTLS_ERR_CIPHER_BAD_INPUT_DATA ); + if (cipher_psa->slot_state != MBEDTLS_CIPHER_PSA_KEY_UNSET) { + return MBEDTLS_ERR_CIPHER_BAD_INPUT_DATA; + } key_type = mbedtls_psa_translate_cipher_type( - ctx->cipher_info->type ); - if( key_type == 0 ) - return( MBEDTLS_ERR_CIPHER_FEATURE_UNAVAILABLE ); - psa_set_key_type( &attributes, key_type ); + ctx->cipher_info->type); + if (key_type == 0) { + return MBEDTLS_ERR_CIPHER_FEATURE_UNAVAILABLE; + } + psa_set_key_type(&attributes, key_type); /* Mbed TLS' cipher layer doesn't enforce the mode of operation * (encrypt vs. decrypt): it is possible to setup a key for encryption * and use it for AEAD decryption. Until tests relying on this * are changed, allow any usage in PSA. */ - psa_set_key_usage_flags( &attributes, - /* mbedtls_psa_translate_cipher_operation( operation ); */ - PSA_KEY_USAGE_ENCRYPT | PSA_KEY_USAGE_DECRYPT ); - psa_set_key_algorithm( &attributes, cipher_psa->alg ); - - status = psa_import_key( &attributes, key, key_bytelen, - &cipher_psa->slot ); - switch( status ) - { + psa_set_key_usage_flags(&attributes, + /* mbedtls_psa_translate_cipher_operation( operation ); */ + PSA_KEY_USAGE_ENCRYPT | PSA_KEY_USAGE_DECRYPT); + psa_set_key_algorithm(&attributes, cipher_psa->alg); + + status = psa_import_key(&attributes, key, key_bytelen, + &cipher_psa->slot); + switch (status) { case PSA_SUCCESS: break; case PSA_ERROR_INSUFFICIENT_MEMORY: - return( MBEDTLS_ERR_CIPHER_ALLOC_FAILED ); + return MBEDTLS_ERR_CIPHER_ALLOC_FAILED; case PSA_ERROR_NOT_SUPPORTED: - return( MBEDTLS_ERR_CIPHER_FEATURE_UNAVAILABLE ); + return MBEDTLS_ERR_CIPHER_FEATURE_UNAVAILABLE; default: - return( MBEDTLS_ERR_PLATFORM_HW_ACCEL_FAILED ); + return MBEDTLS_ERR_PLATFORM_HW_ACCEL_FAILED; } /* Indicate that we own the key slot and need to * destroy it in mbedtls_cipher_free(). */ @@ -357,14 +357,13 @@ int mbedtls_cipher_setkey( mbedtls_cipher_context_t *ctx, ctx->key_bitlen = key_bitlen; ctx->operation = operation; - return( 0 ); + return 0; } #endif /* MBEDTLS_USE_PSA_CRYPTO */ - if( ( ctx->cipher_info->flags & MBEDTLS_CIPHER_VARIABLE_KEY_LEN ) == 0 && - (int) ctx->cipher_info->key_bitlen != key_bitlen ) - { - return( MBEDTLS_ERR_CIPHER_BAD_INPUT_DATA ); + if ((ctx->cipher_info->flags & MBEDTLS_CIPHER_VARIABLE_KEY_LEN) == 0 && + (int) ctx->cipher_info->key_bitlen != key_bitlen) { + return MBEDTLS_ERR_CIPHER_BAD_INPUT_DATA; } ctx->key_bitlen = key_bitlen; @@ -373,311 +372,291 @@ int mbedtls_cipher_setkey( mbedtls_cipher_context_t *ctx, /* * For OFB, CFB and CTR mode always use the encryption key schedule */ - if( MBEDTLS_ENCRYPT == operation || + if (MBEDTLS_ENCRYPT == operation || MBEDTLS_MODE_CFB == ctx->cipher_info->mode || MBEDTLS_MODE_OFB == ctx->cipher_info->mode || - MBEDTLS_MODE_CTR == ctx->cipher_info->mode ) - { - return( ctx->cipher_info->base->setkey_enc_func( ctx->cipher_ctx, key, - ctx->key_bitlen ) ); + MBEDTLS_MODE_CTR == ctx->cipher_info->mode) { + return ctx->cipher_info->base->setkey_enc_func(ctx->cipher_ctx, key, + ctx->key_bitlen); } - if( MBEDTLS_DECRYPT == operation ) - return( ctx->cipher_info->base->setkey_dec_func( ctx->cipher_ctx, key, - ctx->key_bitlen ) ); + if (MBEDTLS_DECRYPT == operation) { + return ctx->cipher_info->base->setkey_dec_func(ctx->cipher_ctx, key, + ctx->key_bitlen); + } - return( MBEDTLS_ERR_CIPHER_BAD_INPUT_DATA ); + return MBEDTLS_ERR_CIPHER_BAD_INPUT_DATA; } -int mbedtls_cipher_set_iv( mbedtls_cipher_context_t *ctx, - const unsigned char *iv, - size_t iv_len ) +int mbedtls_cipher_set_iv(mbedtls_cipher_context_t *ctx, + const unsigned char *iv, + size_t iv_len) { size_t actual_iv_size; - CIPHER_VALIDATE_RET( ctx != NULL ); - CIPHER_VALIDATE_RET( iv_len == 0 || iv != NULL ); - if( ctx->cipher_info == NULL ) - return( MBEDTLS_ERR_CIPHER_BAD_INPUT_DATA ); + if (ctx->cipher_info == NULL) { + return MBEDTLS_ERR_CIPHER_BAD_INPUT_DATA; + } #if defined(MBEDTLS_USE_PSA_CRYPTO) - if( ctx->psa_enabled == 1 ) - { + if (ctx->psa_enabled == 1) { /* While PSA Crypto has an API for multipart * operations, we currently don't make it * accessible through the cipher layer. */ - return( MBEDTLS_ERR_CIPHER_FEATURE_UNAVAILABLE ); + return MBEDTLS_ERR_CIPHER_FEATURE_UNAVAILABLE; } #endif /* MBEDTLS_USE_PSA_CRYPTO */ /* avoid buffer overflow in ctx->iv */ - if( iv_len > MBEDTLS_MAX_IV_LENGTH ) - return( MBEDTLS_ERR_CIPHER_FEATURE_UNAVAILABLE ); + if (iv_len > MBEDTLS_MAX_IV_LENGTH) { + return MBEDTLS_ERR_CIPHER_FEATURE_UNAVAILABLE; + } - if( ( ctx->cipher_info->flags & MBEDTLS_CIPHER_VARIABLE_IV_LEN ) != 0 ) + if ((ctx->cipher_info->flags & MBEDTLS_CIPHER_VARIABLE_IV_LEN) != 0) { actual_iv_size = iv_len; - else - { + } else { actual_iv_size = ctx->cipher_info->iv_size; /* avoid reading past the end of input buffer */ - if( actual_iv_size > iv_len ) - return( MBEDTLS_ERR_CIPHER_BAD_INPUT_DATA ); + if (actual_iv_size > iv_len) { + return MBEDTLS_ERR_CIPHER_BAD_INPUT_DATA; + } } #if defined(MBEDTLS_CHACHA20_C) - if ( ctx->cipher_info->type == MBEDTLS_CIPHER_CHACHA20 ) - { + if (ctx->cipher_info->type == MBEDTLS_CIPHER_CHACHA20) { /* Even though the actual_iv_size is overwritten with a correct value * of 12 from the cipher info, return an error to indicate that * the input iv_len is wrong. */ - if( iv_len != 12 ) - return( MBEDTLS_ERR_CIPHER_BAD_INPUT_DATA ); + if (iv_len != 12) { + return MBEDTLS_ERR_CIPHER_BAD_INPUT_DATA; + } - if ( 0 != mbedtls_chacha20_starts( (mbedtls_chacha20_context*)ctx->cipher_ctx, - iv, - 0U ) ) /* Initial counter value */ - { - return( MBEDTLS_ERR_CIPHER_BAD_INPUT_DATA ); + if (0 != mbedtls_chacha20_starts((mbedtls_chacha20_context *) ctx->cipher_ctx, + iv, + 0U)) { /* Initial counter value */ + return MBEDTLS_ERR_CIPHER_BAD_INPUT_DATA; } } #if defined(MBEDTLS_CHACHAPOLY_C) - if ( ctx->cipher_info->type == MBEDTLS_CIPHER_CHACHA20_POLY1305 && - iv_len != 12 ) - return( MBEDTLS_ERR_CIPHER_BAD_INPUT_DATA ); + if (ctx->cipher_info->type == MBEDTLS_CIPHER_CHACHA20_POLY1305 && + iv_len != 12) { + return MBEDTLS_ERR_CIPHER_BAD_INPUT_DATA; + } #endif #endif #if defined(MBEDTLS_GCM_C) - if( MBEDTLS_MODE_GCM == ctx->cipher_info->mode ) - { - return( mbedtls_gcm_starts( (mbedtls_gcm_context *) ctx->cipher_ctx, - ctx->operation, - iv, iv_len ) ); + if (MBEDTLS_MODE_GCM == ctx->cipher_info->mode) { + return mbedtls_gcm_starts((mbedtls_gcm_context *) ctx->cipher_ctx, + ctx->operation, + iv, iv_len); } #endif #if defined(MBEDTLS_CCM_C) - if( MBEDTLS_MODE_CCM_STAR_NO_TAG == ctx->cipher_info->mode ) - { + if (MBEDTLS_MODE_CCM_STAR_NO_TAG == ctx->cipher_info->mode) { int set_lengths_result; int ccm_star_mode; set_lengths_result = mbedtls_ccm_set_lengths( - (mbedtls_ccm_context *) ctx->cipher_ctx, - 0, 0, 0 ); - if( set_lengths_result != 0 ) + (mbedtls_ccm_context *) ctx->cipher_ctx, + 0, 0, 0); + if (set_lengths_result != 0) { return set_lengths_result; + } - if( ctx->operation == MBEDTLS_DECRYPT ) + if (ctx->operation == MBEDTLS_DECRYPT) { ccm_star_mode = MBEDTLS_CCM_STAR_DECRYPT; - else if( ctx->operation == MBEDTLS_ENCRYPT ) + } else if (ctx->operation == MBEDTLS_ENCRYPT) { ccm_star_mode = MBEDTLS_CCM_STAR_ENCRYPT; - else + } else { return MBEDTLS_ERR_CIPHER_BAD_INPUT_DATA; + } - return( mbedtls_ccm_starts( (mbedtls_ccm_context *) ctx->cipher_ctx, - ccm_star_mode, - iv, iv_len ) ); + return mbedtls_ccm_starts((mbedtls_ccm_context *) ctx->cipher_ctx, + ccm_star_mode, + iv, iv_len); } #endif - if ( actual_iv_size != 0 ) - { - memcpy( ctx->iv, iv, actual_iv_size ); + if (actual_iv_size != 0) { + memcpy(ctx->iv, iv, actual_iv_size); ctx->iv_size = actual_iv_size; } - return( 0 ); + return 0; } -int mbedtls_cipher_reset( mbedtls_cipher_context_t *ctx ) +int mbedtls_cipher_reset(mbedtls_cipher_context_t *ctx) { - CIPHER_VALIDATE_RET( ctx != NULL ); - if( ctx->cipher_info == NULL ) - return( MBEDTLS_ERR_CIPHER_BAD_INPUT_DATA ); + if (ctx->cipher_info == NULL) { + return MBEDTLS_ERR_CIPHER_BAD_INPUT_DATA; + } #if defined(MBEDTLS_USE_PSA_CRYPTO) - if( ctx->psa_enabled == 1 ) - { + if (ctx->psa_enabled == 1) { /* We don't support resetting PSA-based * cipher contexts, yet. */ - return( MBEDTLS_ERR_CIPHER_FEATURE_UNAVAILABLE ); + return MBEDTLS_ERR_CIPHER_FEATURE_UNAVAILABLE; } #endif /* MBEDTLS_USE_PSA_CRYPTO */ ctx->unprocessed_len = 0; - return( 0 ); + return 0; } #if defined(MBEDTLS_GCM_C) || defined(MBEDTLS_CHACHAPOLY_C) -int mbedtls_cipher_update_ad( mbedtls_cipher_context_t *ctx, - const unsigned char *ad, size_t ad_len ) +int mbedtls_cipher_update_ad(mbedtls_cipher_context_t *ctx, + const unsigned char *ad, size_t ad_len) { - CIPHER_VALIDATE_RET( ctx != NULL ); - CIPHER_VALIDATE_RET( ad_len == 0 || ad != NULL ); - if( ctx->cipher_info == NULL ) - return( MBEDTLS_ERR_CIPHER_BAD_INPUT_DATA ); + if (ctx->cipher_info == NULL) { + return MBEDTLS_ERR_CIPHER_BAD_INPUT_DATA; + } #if defined(MBEDTLS_USE_PSA_CRYPTO) - if( ctx->psa_enabled == 1 ) - { + if (ctx->psa_enabled == 1) { /* While PSA Crypto has an API for multipart * operations, we currently don't make it * accessible through the cipher layer. */ - return( MBEDTLS_ERR_CIPHER_FEATURE_UNAVAILABLE ); + return MBEDTLS_ERR_CIPHER_FEATURE_UNAVAILABLE; } #endif /* MBEDTLS_USE_PSA_CRYPTO */ #if defined(MBEDTLS_GCM_C) - if( MBEDTLS_MODE_GCM == ctx->cipher_info->mode ) - { - return( mbedtls_gcm_update_ad( (mbedtls_gcm_context *) ctx->cipher_ctx, - ad, ad_len ) ); + if (MBEDTLS_MODE_GCM == ctx->cipher_info->mode) { + return mbedtls_gcm_update_ad((mbedtls_gcm_context *) ctx->cipher_ctx, + ad, ad_len); } #endif #if defined(MBEDTLS_CHACHAPOLY_C) - if (MBEDTLS_CIPHER_CHACHA20_POLY1305 == ctx->cipher_info->type ) - { + if (MBEDTLS_CIPHER_CHACHA20_POLY1305 == ctx->cipher_info->type) { int result; mbedtls_chachapoly_mode_t mode; - mode = ( ctx->operation == MBEDTLS_ENCRYPT ) + mode = (ctx->operation == MBEDTLS_ENCRYPT) ? MBEDTLS_CHACHAPOLY_ENCRYPT : MBEDTLS_CHACHAPOLY_DECRYPT; - result = mbedtls_chachapoly_starts( (mbedtls_chachapoly_context*) ctx->cipher_ctx, - ctx->iv, - mode ); - if ( result != 0 ) - return( result ); + result = mbedtls_chachapoly_starts((mbedtls_chachapoly_context *) ctx->cipher_ctx, + ctx->iv, + mode); + if (result != 0) { + return result; + } - return( mbedtls_chachapoly_update_aad( (mbedtls_chachapoly_context*) ctx->cipher_ctx, - ad, ad_len ) ); + return mbedtls_chachapoly_update_aad((mbedtls_chachapoly_context *) ctx->cipher_ctx, + ad, ad_len); } #endif - return( 0 ); + return MBEDTLS_ERR_CIPHER_FEATURE_UNAVAILABLE; } #endif /* MBEDTLS_GCM_C || MBEDTLS_CHACHAPOLY_C */ -int mbedtls_cipher_update( mbedtls_cipher_context_t *ctx, const unsigned char *input, - size_t ilen, unsigned char *output, size_t *olen ) +int mbedtls_cipher_update(mbedtls_cipher_context_t *ctx, const unsigned char *input, + size_t ilen, unsigned char *output, size_t *olen) { int ret = MBEDTLS_ERR_ERROR_CORRUPTION_DETECTED; size_t block_size; - CIPHER_VALIDATE_RET( ctx != NULL ); - CIPHER_VALIDATE_RET( ilen == 0 || input != NULL ); - CIPHER_VALIDATE_RET( output != NULL ); - CIPHER_VALIDATE_RET( olen != NULL ); - if( ctx->cipher_info == NULL ) - return( MBEDTLS_ERR_CIPHER_BAD_INPUT_DATA ); + if (ctx->cipher_info == NULL) { + return MBEDTLS_ERR_CIPHER_BAD_INPUT_DATA; + } #if defined(MBEDTLS_USE_PSA_CRYPTO) - if( ctx->psa_enabled == 1 ) - { + if (ctx->psa_enabled == 1) { /* While PSA Crypto has an API for multipart * operations, we currently don't make it * accessible through the cipher layer. */ - return( MBEDTLS_ERR_CIPHER_FEATURE_UNAVAILABLE ); + return MBEDTLS_ERR_CIPHER_FEATURE_UNAVAILABLE; } #endif /* MBEDTLS_USE_PSA_CRYPTO */ *olen = 0; - block_size = mbedtls_cipher_get_block_size( ctx ); - if ( 0 == block_size ) - { - return( MBEDTLS_ERR_CIPHER_INVALID_CONTEXT ); + block_size = mbedtls_cipher_get_block_size(ctx); + if (0 == block_size) { + return MBEDTLS_ERR_CIPHER_INVALID_CONTEXT; } - if( ctx->cipher_info->mode == MBEDTLS_MODE_ECB ) - { - if( ilen != block_size ) - return( MBEDTLS_ERR_CIPHER_FULL_BLOCK_EXPECTED ); + if (ctx->cipher_info->mode == MBEDTLS_MODE_ECB) { + if (ilen != block_size) { + return MBEDTLS_ERR_CIPHER_FULL_BLOCK_EXPECTED; + } *olen = ilen; - if( 0 != ( ret = ctx->cipher_info->base->ecb_func( ctx->cipher_ctx, - ctx->operation, input, output ) ) ) - { - return( ret ); + if (0 != (ret = ctx->cipher_info->base->ecb_func(ctx->cipher_ctx, + ctx->operation, input, output))) { + return ret; } - return( 0 ); + return 0; } #if defined(MBEDTLS_GCM_C) - if( ctx->cipher_info->mode == MBEDTLS_MODE_GCM ) - { - return( mbedtls_gcm_update( (mbedtls_gcm_context *) ctx->cipher_ctx, - input, ilen, - output, ilen, olen ) ); + if (ctx->cipher_info->mode == MBEDTLS_MODE_GCM) { + return mbedtls_gcm_update((mbedtls_gcm_context *) ctx->cipher_ctx, + input, ilen, + output, ilen, olen); } #endif #if defined(MBEDTLS_CCM_C) - if( ctx->cipher_info->mode == MBEDTLS_MODE_CCM_STAR_NO_TAG ) - { - return( mbedtls_ccm_update( (mbedtls_ccm_context *) ctx->cipher_ctx, - input, ilen, - output, ilen, olen ) ); + if (ctx->cipher_info->mode == MBEDTLS_MODE_CCM_STAR_NO_TAG) { + return mbedtls_ccm_update((mbedtls_ccm_context *) ctx->cipher_ctx, + input, ilen, + output, ilen, olen); } #endif #if defined(MBEDTLS_CHACHAPOLY_C) - if ( ctx->cipher_info->type == MBEDTLS_CIPHER_CHACHA20_POLY1305 ) - { + if (ctx->cipher_info->type == MBEDTLS_CIPHER_CHACHA20_POLY1305) { *olen = ilen; - return( mbedtls_chachapoly_update( (mbedtls_chachapoly_context*) ctx->cipher_ctx, - ilen, input, output ) ); + return mbedtls_chachapoly_update((mbedtls_chachapoly_context *) ctx->cipher_ctx, + ilen, input, output); } #endif - if( input == output && - ( ctx->unprocessed_len != 0 || ilen % block_size ) ) - { - return( MBEDTLS_ERR_CIPHER_BAD_INPUT_DATA ); + if (input == output && + (ctx->unprocessed_len != 0 || ilen % block_size)) { + return MBEDTLS_ERR_CIPHER_BAD_INPUT_DATA; } #if defined(MBEDTLS_CIPHER_MODE_CBC) - if( ctx->cipher_info->mode == MBEDTLS_MODE_CBC ) - { + if (ctx->cipher_info->mode == MBEDTLS_MODE_CBC) { size_t copy_len = 0; /* * If there is not enough data for a full block, cache it. */ - if( ( ctx->operation == MBEDTLS_DECRYPT && NULL != ctx->add_padding && - ilen <= block_size - ctx->unprocessed_len ) || - ( ctx->operation == MBEDTLS_DECRYPT && NULL == ctx->add_padding && - ilen < block_size - ctx->unprocessed_len ) || - ( ctx->operation == MBEDTLS_ENCRYPT && - ilen < block_size - ctx->unprocessed_len ) ) - { - memcpy( &( ctx->unprocessed_data[ctx->unprocessed_len] ), input, - ilen ); + if ((ctx->operation == MBEDTLS_DECRYPT && NULL != ctx->add_padding && + ilen <= block_size - ctx->unprocessed_len) || + (ctx->operation == MBEDTLS_DECRYPT && NULL == ctx->add_padding && + ilen < block_size - ctx->unprocessed_len) || + (ctx->operation == MBEDTLS_ENCRYPT && + ilen < block_size - ctx->unprocessed_len)) { + memcpy(&(ctx->unprocessed_data[ctx->unprocessed_len]), input, + ilen); ctx->unprocessed_len += ilen; - return( 0 ); + return 0; } /* * Process cached data first */ - if( 0 != ctx->unprocessed_len ) - { + if (0 != ctx->unprocessed_len) { copy_len = block_size - ctx->unprocessed_len; - memcpy( &( ctx->unprocessed_data[ctx->unprocessed_len] ), input, - copy_len ); + memcpy(&(ctx->unprocessed_data[ctx->unprocessed_len]), input, + copy_len); - if( 0 != ( ret = ctx->cipher_info->base->cbc_func( ctx->cipher_ctx, - ctx->operation, block_size, ctx->iv, - ctx->unprocessed_data, output ) ) ) - { - return( ret ); + if (0 != (ret = ctx->cipher_info->base->cbc_func(ctx->cipher_ctx, + ctx->operation, block_size, ctx->iv, + ctx->unprocessed_data, output))) { + return ret; } *olen += block_size; @@ -691,22 +670,20 @@ int mbedtls_cipher_update( mbedtls_cipher_context_t *ctx, const unsigned char *i /* * Cache final, incomplete block */ - if( 0 != ilen ) - { + if (0 != ilen) { /* Encryption: only cache partial blocks * Decryption w/ padding: always keep at least one whole block * Decryption w/o padding: only cache partial blocks */ copy_len = ilen % block_size; - if( copy_len == 0 && + if (copy_len == 0 && ctx->operation == MBEDTLS_DECRYPT && - NULL != ctx->add_padding) - { + NULL != ctx->add_padding) { copy_len = block_size; } - memcpy( ctx->unprocessed_data, &( input[ilen - copy_len] ), - copy_len ); + memcpy(ctx->unprocessed_data, &(input[ilen - copy_len]), + copy_len); ctx->unprocessed_len += copy_len; ilen -= copy_len; @@ -715,55 +692,51 @@ int mbedtls_cipher_update( mbedtls_cipher_context_t *ctx, const unsigned char *i /* * Process remaining full blocks */ - if( ilen ) - { - if( 0 != ( ret = ctx->cipher_info->base->cbc_func( ctx->cipher_ctx, - ctx->operation, ilen, ctx->iv, input, output ) ) ) - { - return( ret ); + if (ilen) { + if (0 != (ret = ctx->cipher_info->base->cbc_func(ctx->cipher_ctx, + ctx->operation, ilen, ctx->iv, input, + output))) { + return ret; } *olen += ilen; } - return( 0 ); + return 0; } #endif /* MBEDTLS_CIPHER_MODE_CBC */ #if defined(MBEDTLS_CIPHER_MODE_CFB) - if( ctx->cipher_info->mode == MBEDTLS_MODE_CFB ) - { - if( 0 != ( ret = ctx->cipher_info->base->cfb_func( ctx->cipher_ctx, - ctx->operation, ilen, &ctx->unprocessed_len, ctx->iv, - input, output ) ) ) - { - return( ret ); + if (ctx->cipher_info->mode == MBEDTLS_MODE_CFB) { + if (0 != (ret = ctx->cipher_info->base->cfb_func(ctx->cipher_ctx, + ctx->operation, ilen, + &ctx->unprocessed_len, ctx->iv, + input, output))) { + return ret; } *olen = ilen; - return( 0 ); + return 0; } #endif /* MBEDTLS_CIPHER_MODE_CFB */ #if defined(MBEDTLS_CIPHER_MODE_OFB) - if( ctx->cipher_info->mode == MBEDTLS_MODE_OFB ) - { - if( 0 != ( ret = ctx->cipher_info->base->ofb_func( ctx->cipher_ctx, - ilen, &ctx->unprocessed_len, ctx->iv, input, output ) ) ) - { - return( ret ); + if (ctx->cipher_info->mode == MBEDTLS_MODE_OFB) { + if (0 != (ret = ctx->cipher_info->base->ofb_func(ctx->cipher_ctx, + ilen, &ctx->unprocessed_len, ctx->iv, + input, output))) { + return ret; } *olen = ilen; - return( 0 ); + return 0; } #endif /* MBEDTLS_CIPHER_MODE_OFB */ #if defined(MBEDTLS_CIPHER_MODE_CTR) - if( ctx->cipher_info->mode == MBEDTLS_MODE_CTR ) - { + if (ctx->cipher_info->mode == MBEDTLS_MODE_CTR) { size_t copy_len = 0; /* @@ -788,12 +761,11 @@ int mbedtls_cipher_update( mbedtls_cipher_context_t *ctx, const unsigned char *i memcpy( &( ctx->unprocessed_data[ctx->unprocessed_len] ), input, copy_len ); - if( 0 != ( ret = ctx->cipher_info->base->ctr_func( ctx->cipher_ctx, - block_size, NULL, ctx->iv, - NULL, ctx->unprocessed_data, output ) ) ) - { - return( ret ); - } + if (0 != (ret = ctx->cipher_info->base->ctr_func(ctx->cipher_ctx, + block_size, NULL, ctx->iv, + NULL, ctx->unprocessed_data, output))) { + return ret; + } *olen += block_size; output += block_size; @@ -830,47 +802,43 @@ int mbedtls_cipher_update( mbedtls_cipher_context_t *ctx, const unsigned char *i *olen += ilen; } - return( 0 ); + return 0; } #endif /* MBEDTLS_CIPHER_MODE_CTR */ #if defined(MBEDTLS_CIPHER_MODE_XTS) - if( ctx->cipher_info->mode == MBEDTLS_MODE_XTS ) - { - if( ctx->unprocessed_len > 0 ) { + if (ctx->cipher_info->mode == MBEDTLS_MODE_XTS) { + if (ctx->unprocessed_len > 0) { /* We can only process an entire data unit at a time. */ - return( MBEDTLS_ERR_CIPHER_FEATURE_UNAVAILABLE ); + return MBEDTLS_ERR_CIPHER_FEATURE_UNAVAILABLE; } - ret = ctx->cipher_info->base->xts_func( ctx->cipher_ctx, - ctx->operation, ilen, ctx->iv, input, output ); - if( ret != 0 ) - { - return( ret ); + ret = ctx->cipher_info->base->xts_func(ctx->cipher_ctx, + ctx->operation, ilen, ctx->iv, input, output); + if (ret != 0) { + return ret; } *olen = ilen; - return( 0 ); + return 0; } #endif /* MBEDTLS_CIPHER_MODE_XTS */ #if defined(MBEDTLS_CIPHER_MODE_STREAM) - if( ctx->cipher_info->mode == MBEDTLS_MODE_STREAM ) - { - if( 0 != ( ret = ctx->cipher_info->base->stream_func( ctx->cipher_ctx, - ilen, input, output ) ) ) - { - return( ret ); + if (ctx->cipher_info->mode == MBEDTLS_MODE_STREAM) { + if (0 != (ret = ctx->cipher_info->base->stream_func(ctx->cipher_ctx, + ilen, input, output))) { + return ret; } *olen = ilen; - return( 0 ); + return 0; } #endif /* MBEDTLS_CIPHER_MODE_STREAM */ - return( MBEDTLS_ERR_CIPHER_FEATURE_UNAVAILABLE ); + return MBEDTLS_ERR_CIPHER_FEATURE_UNAVAILABLE; } #if defined(MBEDTLS_CIPHER_MODE_WITH_PADDING) @@ -878,24 +846,26 @@ int mbedtls_cipher_update( mbedtls_cipher_context_t *ctx, const unsigned char *i /* * PKCS7 (and PKCS5) padding: fill with ll bytes, with ll = padding_len */ -static void add_pkcs_padding( unsigned char *output, size_t output_len, - size_t data_len ) +static void add_pkcs_padding(unsigned char *output, size_t output_len, + size_t data_len) { size_t padding_len = output_len - data_len; unsigned char i; - for( i = 0; i < padding_len; i++ ) + for (i = 0; i < padding_len; i++) { output[data_len + i] = (unsigned char) padding_len; + } } -static int get_pkcs_padding( unsigned char *input, size_t input_len, - size_t *data_len ) +static int get_pkcs_padding(unsigned char *input, size_t input_len, + size_t *data_len) { size_t i, pad_idx; unsigned char padding_len, bad = 0; - if( NULL == input || NULL == data_len ) - return( MBEDTLS_ERR_CIPHER_BAD_INPUT_DATA ); + if (NULL == input || NULL == data_len) { + return MBEDTLS_ERR_CIPHER_BAD_INPUT_DATA; + } padding_len = input[input_len - 1]; *data_len = input_len - padding_len; @@ -907,10 +877,11 @@ static int get_pkcs_padding( unsigned char *input, size_t input_len, /* The number of bytes checked must be independent of padding_len, * so pick input_len, which is usually 8 or 16 (one block) */ pad_idx = input_len - padding_len; - for( i = 0; i < input_len; i++ ) - bad |= ( input[i] ^ padding_len ) * ( i >= pad_idx ); + for (i = 0; i < input_len; i++) { + bad |= (input[i] ^ padding_len) * (i >= pad_idx); + } - return( MBEDTLS_ERR_CIPHER_INVALID_PADDING * ( bad != 0 ) ); + return MBEDTLS_ERR_CIPHER_INVALID_PADDING * (bad != 0); } #endif /* MBEDTLS_CIPHER_PADDING_PKCS7 */ @@ -918,37 +889,38 @@ static int get_pkcs_padding( unsigned char *input, size_t input_len, /* * One and zeros padding: fill with 80 00 ... 00 */ -static void add_one_and_zeros_padding( unsigned char *output, - size_t output_len, size_t data_len ) +static void add_one_and_zeros_padding(unsigned char *output, + size_t output_len, size_t data_len) { size_t padding_len = output_len - data_len; unsigned char i = 0; output[data_len] = 0x80; - for( i = 1; i < padding_len; i++ ) + for (i = 1; i < padding_len; i++) { output[data_len + i] = 0x00; + } } -static int get_one_and_zeros_padding( unsigned char *input, size_t input_len, - size_t *data_len ) +static int get_one_and_zeros_padding(unsigned char *input, size_t input_len, + size_t *data_len) { size_t i; unsigned char done = 0, prev_done, bad; - if( NULL == input || NULL == data_len ) - return( MBEDTLS_ERR_CIPHER_BAD_INPUT_DATA ); + if (NULL == input || NULL == data_len) { + return MBEDTLS_ERR_CIPHER_BAD_INPUT_DATA; + } bad = 0x80; *data_len = 0; - for( i = input_len; i > 0; i-- ) - { + for (i = input_len; i > 0; i--) { prev_done = done; - done |= ( input[i - 1] != 0 ); - *data_len |= ( i - 1 ) * ( done != prev_done ); - bad ^= input[i - 1] * ( done != prev_done ); + done |= (input[i - 1] != 0); + *data_len |= (i - 1) * (done != prev_done); + bad ^= input[i - 1] * (done != prev_done); } - return( MBEDTLS_ERR_CIPHER_INVALID_PADDING * ( bad != 0 ) ); + return MBEDTLS_ERR_CIPHER_INVALID_PADDING * (bad != 0); } #endif /* MBEDTLS_CIPHER_PADDING_ONE_AND_ZEROS */ @@ -957,25 +929,27 @@ static int get_one_and_zeros_padding( unsigned char *input, size_t input_len, /* * Zeros and len padding: fill with 00 ... 00 ll, where ll is padding length */ -static void add_zeros_and_len_padding( unsigned char *output, - size_t output_len, size_t data_len ) +static void add_zeros_and_len_padding(unsigned char *output, + size_t output_len, size_t data_len) { size_t padding_len = output_len - data_len; unsigned char i = 0; - for( i = 1; i < padding_len; i++ ) + for (i = 1; i < padding_len; i++) { output[data_len + i - 1] = 0x00; + } output[output_len - 1] = (unsigned char) padding_len; } -static int get_zeros_and_len_padding( unsigned char *input, size_t input_len, - size_t *data_len ) +static int get_zeros_and_len_padding(unsigned char *input, size_t input_len, + size_t *data_len) { size_t i, pad_idx; unsigned char padding_len, bad = 0; - if( NULL == input || NULL == data_len ) - return( MBEDTLS_ERR_CIPHER_BAD_INPUT_DATA ); + if (NULL == input || NULL == data_len) { + return MBEDTLS_ERR_CIPHER_BAD_INPUT_DATA; + } padding_len = input[input_len - 1]; *data_len = input_len - padding_len; @@ -986,10 +960,11 @@ static int get_zeros_and_len_padding( unsigned char *input, size_t input_len, /* The number of bytes checked must be independent of padding_len */ pad_idx = input_len - padding_len; - for( i = 0; i < input_len - 1; i++ ) - bad |= input[i] * ( i >= pad_idx ); + for (i = 0; i < input_len - 1; i++) { + bad |= input[i] * (i >= pad_idx); + } - return( MBEDTLS_ERR_CIPHER_INVALID_PADDING * ( bad != 0 ) ); + return MBEDTLS_ERR_CIPHER_INVALID_PADDING * (bad != 0); } #endif /* MBEDTLS_CIPHER_PADDING_ZEROS_AND_LEN */ @@ -997,33 +972,34 @@ static int get_zeros_and_len_padding( unsigned char *input, size_t input_len, /* * Zero padding: fill with 00 ... 00 */ -static void add_zeros_padding( unsigned char *output, - size_t output_len, size_t data_len ) +static void add_zeros_padding(unsigned char *output, + size_t output_len, size_t data_len) { size_t i; - for( i = data_len; i < output_len; i++ ) + for (i = data_len; i < output_len; i++) { output[i] = 0x00; + } } -static int get_zeros_padding( unsigned char *input, size_t input_len, - size_t *data_len ) +static int get_zeros_padding(unsigned char *input, size_t input_len, + size_t *data_len) { size_t i; unsigned char done = 0, prev_done; - if( NULL == input || NULL == data_len ) - return( MBEDTLS_ERR_CIPHER_BAD_INPUT_DATA ); + if (NULL == input || NULL == data_len) { + return MBEDTLS_ERR_CIPHER_BAD_INPUT_DATA; + } *data_len = 0; - for( i = input_len; i > 0; i-- ) - { + for (i = input_len; i > 0; i--) { prev_done = done; - done |= ( input[i-1] != 0 ); - *data_len |= i * ( done != prev_done ); + done |= (input[i-1] != 0); + *data_len |= i * (done != prev_done); } - return( 0 ); + return 0; } #endif /* MBEDTLS_CIPHER_PADDING_ZEROS */ @@ -1033,134 +1009,123 @@ static int get_zeros_padding( unsigned char *input, size_t input_len, * There is no add_padding function (check for NULL in mbedtls_cipher_finish) * but a trivial get_padding function */ -static int get_no_padding( unsigned char *input, size_t input_len, - size_t *data_len ) +static int get_no_padding(unsigned char *input, size_t input_len, + size_t *data_len) { - if( NULL == input || NULL == data_len ) - return( MBEDTLS_ERR_CIPHER_BAD_INPUT_DATA ); + if (NULL == input || NULL == data_len) { + return MBEDTLS_ERR_CIPHER_BAD_INPUT_DATA; + } *data_len = input_len; - return( 0 ); + return 0; } #endif /* MBEDTLS_CIPHER_MODE_WITH_PADDING */ -int mbedtls_cipher_finish( mbedtls_cipher_context_t *ctx, - unsigned char *output, size_t *olen ) +int mbedtls_cipher_finish(mbedtls_cipher_context_t *ctx, + unsigned char *output, size_t *olen) { - CIPHER_VALIDATE_RET( ctx != NULL ); - CIPHER_VALIDATE_RET( output != NULL ); - CIPHER_VALIDATE_RET( olen != NULL ); - if( ctx->cipher_info == NULL ) - return( MBEDTLS_ERR_CIPHER_BAD_INPUT_DATA ); + if (ctx->cipher_info == NULL) { + return MBEDTLS_ERR_CIPHER_BAD_INPUT_DATA; + } #if defined(MBEDTLS_USE_PSA_CRYPTO) - if( ctx->psa_enabled == 1 ) - { + if (ctx->psa_enabled == 1) { /* While PSA Crypto has an API for multipart * operations, we currently don't make it * accessible through the cipher layer. */ - return( MBEDTLS_ERR_CIPHER_FEATURE_UNAVAILABLE ); + return MBEDTLS_ERR_CIPHER_FEATURE_UNAVAILABLE; } #endif /* MBEDTLS_USE_PSA_CRYPTO */ *olen = 0; - if( MBEDTLS_MODE_CFB == ctx->cipher_info->mode || + if (MBEDTLS_MODE_CFB == ctx->cipher_info->mode || MBEDTLS_MODE_OFB == ctx->cipher_info->mode || MBEDTLS_MODE_GCM == ctx->cipher_info->mode || MBEDTLS_MODE_CCM_STAR_NO_TAG == ctx->cipher_info->mode || MBEDTLS_MODE_XTS == ctx->cipher_info->mode || - MBEDTLS_MODE_STREAM == ctx->cipher_info->mode ) - { - return( 0 ); + MBEDTLS_MODE_STREAM == ctx->cipher_info->mode) { + return 0; } - if ( ( MBEDTLS_CIPHER_CHACHA20 == ctx->cipher_info->type ) || - ( MBEDTLS_CIPHER_CHACHA20_POLY1305 == ctx->cipher_info->type ) ) - { - return( 0 ); + if ((MBEDTLS_CIPHER_CHACHA20 == ctx->cipher_info->type) || + (MBEDTLS_CIPHER_CHACHA20_POLY1305 == ctx->cipher_info->type)) { + return 0; } - if( MBEDTLS_MODE_ECB == ctx->cipher_info->mode ) - { - if( ctx->unprocessed_len != 0 ) - return( MBEDTLS_ERR_CIPHER_FULL_BLOCK_EXPECTED ); + if (MBEDTLS_MODE_ECB == ctx->cipher_info->mode) { + if (ctx->unprocessed_len != 0) { + return MBEDTLS_ERR_CIPHER_FULL_BLOCK_EXPECTED; + } - return( 0 ); + return 0; } #if defined(MBEDTLS_CIPHER_MODE_CBC) - if( MBEDTLS_MODE_CBC == ctx->cipher_info->mode ) - { + if (MBEDTLS_MODE_CBC == ctx->cipher_info->mode) { int ret = 0; - if( MBEDTLS_ENCRYPT == ctx->operation ) - { + if (MBEDTLS_ENCRYPT == ctx->operation) { /* check for 'no padding' mode */ - if( NULL == ctx->add_padding ) - { - if( 0 != ctx->unprocessed_len ) - return( MBEDTLS_ERR_CIPHER_FULL_BLOCK_EXPECTED ); - + if (NULL == ctx->add_padding) { + if (0 != ctx->unprocessed_len) { + return MBEDTLS_ERR_CIPHER_FULL_BLOCK_EXPECTED; + } #if BSP_FEATURE_CRYPTO_HAS_SCE9 || BSP_FEATURE_CRYPTO_HAS_SCE5B || BSP_FEATURE_CRYPTO_HAS_SCE5 || BSP_FEATURE_CRYPTO_HAS_SCE7 return sce_aes_cipher_final( ctx ); #else - return( 0 ); + return 0; #endif - } - ctx->add_padding( ctx->unprocessed_data, mbedtls_cipher_get_iv_size( ctx ), - ctx->unprocessed_len ); - } - else if( mbedtls_cipher_get_block_size( ctx ) != ctx->unprocessed_len ) - { + ctx->add_padding(ctx->unprocessed_data, mbedtls_cipher_get_iv_size(ctx), + ctx->unprocessed_len); + } else if (mbedtls_cipher_get_block_size(ctx) != ctx->unprocessed_len) { /* * For decrypt operations, expect a full block, * or an empty block if no padding */ - if( NULL == ctx->add_padding && 0 == ctx->unprocessed_len ) - { + if (NULL == ctx->add_padding && 0 == ctx->unprocessed_len) { #if BSP_FEATURE_CRYPTO_HAS_SCE9 || BSP_FEATURE_CRYPTO_HAS_SCE5B || BSP_FEATURE_CRYPTO_HAS_SCE5 || BSP_FEATURE_CRYPTO_HAS_SCE7 return sce_aes_cipher_final( ctx ); #else - return( 0 ); + return 0; #endif } - return( MBEDTLS_ERR_CIPHER_FULL_BLOCK_EXPECTED ); + return MBEDTLS_ERR_CIPHER_FULL_BLOCK_EXPECTED; } /* cipher block */ - if( 0 != ( ret = ctx->cipher_info->base->cbc_func( ctx->cipher_ctx, - ctx->operation, mbedtls_cipher_get_block_size( ctx ), ctx->iv, - ctx->unprocessed_data, output ) ) ) - { - return( ret ); + if (0 != (ret = ctx->cipher_info->base->cbc_func(ctx->cipher_ctx, + ctx->operation, + mbedtls_cipher_get_block_size(ctx), + ctx->iv, + ctx->unprocessed_data, output))) { + return ret; } /* Set output size for decryption */ - if( MBEDTLS_DECRYPT == ctx->operation ) - { + if (MBEDTLS_DECRYPT == ctx->operation) { #if BSP_FEATURE_CRYPTO_HAS_SCE9 || BSP_FEATURE_CRYPTO_HAS_SCE5B || BSP_FEATURE_CRYPTO_HAS_SCE5 || BSP_FEATURE_CRYPTO_HAS_SCE7 if( 0 != ( ret = sce_aes_cipher_final( ctx ))) { return( ret ); } #endif - return( ctx->get_padding( output, mbedtls_cipher_get_block_size( ctx ), - olen ) ); + return ctx->get_padding(output, mbedtls_cipher_get_block_size(ctx), + olen); } /* Set output size for encryption */ - *olen = mbedtls_cipher_get_block_size( ctx ); + *olen = mbedtls_cipher_get_block_size(ctx); #if BSP_FEATURE_CRYPTO_HAS_SCE9 || BSP_FEATURE_CRYPTO_HAS_SCE5B || BSP_FEATURE_CRYPTO_HAS_SCE5 || BSP_FEATURE_CRYPTO_HAS_SCE7 return sce_aes_cipher_final( ctx ); #else - return( 0 ); + return 0; #endif } @@ -1193,42 +1158,38 @@ int mbedtls_cipher_finish( mbedtls_cipher_context_t *ctx, #if BSP_FEATURE_CRYPTO_HAS_SCE9 || BSP_FEATURE_CRYPTO_HAS_SCE5B || BSP_FEATURE_CRYPTO_HAS_SCE5 || BSP_FEATURE_CRYPTO_HAS_SCE7 return sce_aes_cipher_final( ctx ); #else - return( 0 ); + return 0; #endif } #else ((void) output); #endif /* MBEDTLS_CIPHER_MODE_CTR */ - return( MBEDTLS_ERR_CIPHER_FEATURE_UNAVAILABLE ); + return MBEDTLS_ERR_CIPHER_FEATURE_UNAVAILABLE; } #if defined(MBEDTLS_CIPHER_MODE_WITH_PADDING) -int mbedtls_cipher_set_padding_mode( mbedtls_cipher_context_t *ctx, - mbedtls_cipher_padding_t mode ) +int mbedtls_cipher_set_padding_mode(mbedtls_cipher_context_t *ctx, + mbedtls_cipher_padding_t mode) { - CIPHER_VALIDATE_RET( ctx != NULL ); - - if( NULL == ctx->cipher_info || MBEDTLS_MODE_CBC != ctx->cipher_info->mode ) - { - return( MBEDTLS_ERR_CIPHER_BAD_INPUT_DATA ); + if (NULL == ctx->cipher_info || MBEDTLS_MODE_CBC != ctx->cipher_info->mode) { + return MBEDTLS_ERR_CIPHER_BAD_INPUT_DATA; } #if defined(MBEDTLS_USE_PSA_CRYPTO) - if( ctx->psa_enabled == 1 ) - { + if (ctx->psa_enabled == 1) { /* While PSA Crypto knows about CBC padding * schemes, we currently don't make them * accessible through the cipher layer. */ - if( mode != MBEDTLS_PADDING_NONE ) - return( MBEDTLS_ERR_CIPHER_FEATURE_UNAVAILABLE ); + if (mode != MBEDTLS_PADDING_NONE) { + return MBEDTLS_ERR_CIPHER_FEATURE_UNAVAILABLE; + } - return( 0 ); + return 0; } #endif /* MBEDTLS_USE_PSA_CRYPTO */ - switch( mode ) - { + switch (mode) { #if defined(MBEDTLS_CIPHER_PADDING_PKCS7) case MBEDTLS_PADDING_PKCS7: ctx->add_padding = add_pkcs_padding; @@ -1259,115 +1220,105 @@ int mbedtls_cipher_set_padding_mode( mbedtls_cipher_context_t *ctx, break; default: - return( MBEDTLS_ERR_CIPHER_FEATURE_UNAVAILABLE ); + return MBEDTLS_ERR_CIPHER_FEATURE_UNAVAILABLE; } - return( 0 ); + return 0; } #endif /* MBEDTLS_CIPHER_MODE_WITH_PADDING */ #if defined(MBEDTLS_GCM_C) || defined(MBEDTLS_CHACHAPOLY_C) -int mbedtls_cipher_write_tag( mbedtls_cipher_context_t *ctx, - unsigned char *tag, size_t tag_len ) +int mbedtls_cipher_write_tag(mbedtls_cipher_context_t *ctx, + unsigned char *tag, size_t tag_len) { - CIPHER_VALIDATE_RET( ctx != NULL ); - CIPHER_VALIDATE_RET( tag_len == 0 || tag != NULL ); - if( ctx->cipher_info == NULL ) - return( MBEDTLS_ERR_CIPHER_BAD_INPUT_DATA ); + if (ctx->cipher_info == NULL) { + return MBEDTLS_ERR_CIPHER_BAD_INPUT_DATA; + } - if( MBEDTLS_ENCRYPT != ctx->operation ) - return( MBEDTLS_ERR_CIPHER_BAD_INPUT_DATA ); + if (MBEDTLS_ENCRYPT != ctx->operation) { + return MBEDTLS_ERR_CIPHER_BAD_INPUT_DATA; + } #if defined(MBEDTLS_USE_PSA_CRYPTO) - if( ctx->psa_enabled == 1 ) - { + if (ctx->psa_enabled == 1) { /* While PSA Crypto has an API for multipart * operations, we currently don't make it * accessible through the cipher layer. */ - return( MBEDTLS_ERR_CIPHER_FEATURE_UNAVAILABLE ); + return MBEDTLS_ERR_CIPHER_FEATURE_UNAVAILABLE; } #endif /* MBEDTLS_USE_PSA_CRYPTO */ #if defined(MBEDTLS_GCM_C) - if( MBEDTLS_MODE_GCM == ctx->cipher_info->mode ) - { + if (MBEDTLS_MODE_GCM == ctx->cipher_info->mode) { size_t output_length; /* The code here doesn't yet support alternative implementations * that can delay up to a block of output. */ - return( mbedtls_gcm_finish( (mbedtls_gcm_context *) ctx->cipher_ctx, - NULL, 0, &output_length, - tag, tag_len ) ); + return mbedtls_gcm_finish((mbedtls_gcm_context *) ctx->cipher_ctx, + NULL, 0, &output_length, + tag, tag_len); } #endif #if defined(MBEDTLS_CHACHAPOLY_C) - if ( MBEDTLS_CIPHER_CHACHA20_POLY1305 == ctx->cipher_info->type ) - { + if (MBEDTLS_CIPHER_CHACHA20_POLY1305 == ctx->cipher_info->type) { /* Don't allow truncated MAC for Poly1305 */ - if ( tag_len != 16U ) - return( MBEDTLS_ERR_CIPHER_BAD_INPUT_DATA ); + if (tag_len != 16U) { + return MBEDTLS_ERR_CIPHER_BAD_INPUT_DATA; + } - return( mbedtls_chachapoly_finish( - (mbedtls_chachapoly_context*) ctx->cipher_ctx, tag ) ); + return mbedtls_chachapoly_finish( + (mbedtls_chachapoly_context *) ctx->cipher_ctx, tag); } #endif - return( 0 ); + return MBEDTLS_ERR_CIPHER_FEATURE_UNAVAILABLE; } -int mbedtls_cipher_check_tag( mbedtls_cipher_context_t *ctx, - const unsigned char *tag, size_t tag_len ) +int mbedtls_cipher_check_tag(mbedtls_cipher_context_t *ctx, + const unsigned char *tag, size_t tag_len) { unsigned char check_tag[16]; int ret = MBEDTLS_ERR_ERROR_CORRUPTION_DETECTED; - CIPHER_VALIDATE_RET( ctx != NULL ); - CIPHER_VALIDATE_RET( tag_len == 0 || tag != NULL ); - if( ctx->cipher_info == NULL ) - return( MBEDTLS_ERR_CIPHER_BAD_INPUT_DATA ); + if (ctx->cipher_info == NULL) { + return MBEDTLS_ERR_CIPHER_BAD_INPUT_DATA; + } - if( MBEDTLS_DECRYPT != ctx->operation ) - { - return( MBEDTLS_ERR_CIPHER_BAD_INPUT_DATA ); + if (MBEDTLS_DECRYPT != ctx->operation) { + return MBEDTLS_ERR_CIPHER_BAD_INPUT_DATA; } #if defined(MBEDTLS_USE_PSA_CRYPTO) - if( ctx->psa_enabled == 1 ) - { + if (ctx->psa_enabled == 1) { /* While PSA Crypto has an API for multipart * operations, we currently don't make it * accessible through the cipher layer. */ - return( MBEDTLS_ERR_CIPHER_FEATURE_UNAVAILABLE ); + return MBEDTLS_ERR_CIPHER_FEATURE_UNAVAILABLE; } #endif /* MBEDTLS_USE_PSA_CRYPTO */ - /* Status to return on a non-authenticated algorithm. It would make sense - * to return MBEDTLS_ERR_CIPHER_INVALID_CONTEXT or perhaps - * MBEDTLS_ERR_CIPHER_BAD_INPUT_DATA, but at the time I write this our - * unit tests assume 0. */ - ret = 0; + /* Status to return on a non-authenticated algorithm. */ + ret = MBEDTLS_ERR_CIPHER_FEATURE_UNAVAILABLE; #if defined(MBEDTLS_GCM_C) - if( MBEDTLS_MODE_GCM == ctx->cipher_info->mode ) - { + if (MBEDTLS_MODE_GCM == ctx->cipher_info->mode) { size_t output_length; /* The code here doesn't yet support alternative implementations * that can delay up to a block of output. */ - if( tag_len > sizeof( check_tag ) ) - return( MBEDTLS_ERR_CIPHER_BAD_INPUT_DATA ); + if (tag_len > sizeof(check_tag)) { + return MBEDTLS_ERR_CIPHER_BAD_INPUT_DATA; + } - if( 0 != ( ret = mbedtls_gcm_finish( - (mbedtls_gcm_context *) ctx->cipher_ctx, - NULL, 0, &output_length, - check_tag, tag_len ) ) ) - { - return( ret ); + if (0 != (ret = mbedtls_gcm_finish( + (mbedtls_gcm_context *) ctx->cipher_ctx, + NULL, 0, &output_length, + check_tag, tag_len))) { + return ret; } /* Check the tag in "constant-time" */ - if( mbedtls_ct_memcmp( tag, check_tag, tag_len ) != 0 ) - { + if (mbedtls_ct_memcmp(tag, check_tag, tag_len) != 0) { ret = MBEDTLS_ERR_CIPHER_AUTH_FAILED; goto exit; } @@ -1375,22 +1326,20 @@ int mbedtls_cipher_check_tag( mbedtls_cipher_context_t *ctx, #endif /* MBEDTLS_GCM_C */ #if defined(MBEDTLS_CHACHAPOLY_C) - if ( MBEDTLS_CIPHER_CHACHA20_POLY1305 == ctx->cipher_info->type ) - { + if (MBEDTLS_CIPHER_CHACHA20_POLY1305 == ctx->cipher_info->type) { /* Don't allow truncated MAC for Poly1305 */ - if ( tag_len != sizeof( check_tag ) ) - return( MBEDTLS_ERR_CIPHER_BAD_INPUT_DATA ); + if (tag_len != sizeof(check_tag)) { + return MBEDTLS_ERR_CIPHER_BAD_INPUT_DATA; + } ret = mbedtls_chachapoly_finish( - (mbedtls_chachapoly_context*) ctx->cipher_ctx, check_tag ); - if ( ret != 0 ) - { - return( ret ); + (mbedtls_chachapoly_context *) ctx->cipher_ctx, check_tag); + if (ret != 0) { + return ret; } /* Check the tag in "constant-time" */ - if( mbedtls_ct_memcmp( tag, check_tag, tag_len ) != 0 ) - { + if (mbedtls_ct_memcmp(tag, check_tag, tag_len) != 0) { ret = MBEDTLS_ERR_CIPHER_AUTH_FAILED; goto exit; } @@ -1398,31 +1347,24 @@ int mbedtls_cipher_check_tag( mbedtls_cipher_context_t *ctx, #endif /* MBEDTLS_CHACHAPOLY_C */ exit: - mbedtls_platform_zeroize( check_tag, tag_len ); - return( ret ); + mbedtls_platform_zeroize(check_tag, tag_len); + return ret; } #endif /* MBEDTLS_GCM_C || MBEDTLS_CHACHAPOLY_C */ /* * Packet-oriented wrapper for non-AEAD modes */ -int mbedtls_cipher_crypt( mbedtls_cipher_context_t *ctx, - const unsigned char *iv, size_t iv_len, - const unsigned char *input, size_t ilen, - unsigned char *output, size_t *olen ) +int mbedtls_cipher_crypt(mbedtls_cipher_context_t *ctx, + const unsigned char *iv, size_t iv_len, + const unsigned char *input, size_t ilen, + unsigned char *output, size_t *olen) { int ret = MBEDTLS_ERR_ERROR_CORRUPTION_DETECTED; size_t finish_olen; - CIPHER_VALIDATE_RET( ctx != NULL ); - CIPHER_VALIDATE_RET( iv_len == 0 || iv != NULL ); - CIPHER_VALIDATE_RET( ilen == 0 || input != NULL ); - CIPHER_VALIDATE_RET( output != NULL ); - CIPHER_VALIDATE_RET( olen != NULL ); - #if defined(MBEDTLS_USE_PSA_CRYPTO) - if( ctx->psa_enabled == 1 ) - { + if (ctx->psa_enabled == 1) { /* As in the non-PSA case, we don't check that * a key has been set. If not, the key slot will * still be in its default state of 0, which is @@ -1435,69 +1377,73 @@ int mbedtls_cipher_crypt( mbedtls_cipher_context_t *ctx, psa_cipher_operation_t cipher_op = PSA_CIPHER_OPERATION_INIT; size_t part_len; - if( ctx->operation == MBEDTLS_DECRYPT ) - { - status = psa_cipher_decrypt_setup( &cipher_op, - cipher_psa->slot, - cipher_psa->alg ); - } - else if( ctx->operation == MBEDTLS_ENCRYPT ) - { - status = psa_cipher_encrypt_setup( &cipher_op, - cipher_psa->slot, - cipher_psa->alg ); + if (ctx->operation == MBEDTLS_DECRYPT) { + status = psa_cipher_decrypt_setup(&cipher_op, + cipher_psa->slot, + cipher_psa->alg); + } else if (ctx->operation == MBEDTLS_ENCRYPT) { + status = psa_cipher_encrypt_setup(&cipher_op, + cipher_psa->slot, + cipher_psa->alg); + } else { + return MBEDTLS_ERR_CIPHER_BAD_INPUT_DATA; } - else - return( MBEDTLS_ERR_CIPHER_BAD_INPUT_DATA ); /* In the following, we can immediately return on an error, * because the PSA Crypto API guarantees that cipher operations * are terminated by unsuccessful calls to psa_cipher_update(), * and by any call to psa_cipher_finish(). */ - if( status != PSA_SUCCESS ) - return( MBEDTLS_ERR_PLATFORM_HW_ACCEL_FAILED ); + if (status != PSA_SUCCESS) { + return MBEDTLS_ERR_PLATFORM_HW_ACCEL_FAILED; + } - if( ctx->cipher_info->mode != MBEDTLS_MODE_ECB ) - { - status = psa_cipher_set_iv( &cipher_op, iv, iv_len ); - if( status != PSA_SUCCESS ) - return( MBEDTLS_ERR_PLATFORM_HW_ACCEL_FAILED ); + if (ctx->cipher_info->mode != MBEDTLS_MODE_ECB) { + status = psa_cipher_set_iv(&cipher_op, iv, iv_len); + if (status != PSA_SUCCESS) { + return MBEDTLS_ERR_PLATFORM_HW_ACCEL_FAILED; + } } - status = psa_cipher_update( &cipher_op, - input, ilen, - output, ilen, olen ); - if( status != PSA_SUCCESS ) - return( MBEDTLS_ERR_PLATFORM_HW_ACCEL_FAILED ); + status = psa_cipher_update(&cipher_op, + input, ilen, + output, ilen, olen); + if (status != PSA_SUCCESS) { + return MBEDTLS_ERR_PLATFORM_HW_ACCEL_FAILED; + } - status = psa_cipher_finish( &cipher_op, - output + *olen, ilen - *olen, - &part_len ); - if( status != PSA_SUCCESS ) - return( MBEDTLS_ERR_PLATFORM_HW_ACCEL_FAILED ); + status = psa_cipher_finish(&cipher_op, + output + *olen, ilen - *olen, + &part_len); + if (status != PSA_SUCCESS) { + return MBEDTLS_ERR_PLATFORM_HW_ACCEL_FAILED; + } *olen += part_len; - return( 0 ); + return 0; } #endif /* MBEDTLS_USE_PSA_CRYPTO */ - if( ( ret = mbedtls_cipher_set_iv( ctx, iv, iv_len ) ) != 0 ) - return( ret ); + if ((ret = mbedtls_cipher_set_iv(ctx, iv, iv_len)) != 0) { + return ret; + } - if( ( ret = mbedtls_cipher_reset( ctx ) ) != 0 ) - return( ret ); + if ((ret = mbedtls_cipher_reset(ctx)) != 0) { + return ret; + } - if( ( ret = mbedtls_cipher_update( ctx, input, ilen, - output, olen ) ) != 0 ) - return( ret ); + if ((ret = mbedtls_cipher_update(ctx, input, ilen, + output, olen)) != 0) { + return ret; + } - if( ( ret = mbedtls_cipher_finish( ctx, output + *olen, - &finish_olen ) ) != 0 ) - return( ret ); + if ((ret = mbedtls_cipher_finish(ctx, output + *olen, + &finish_olen)) != 0) { + return ret; + } *olen += finish_olen; - return( 0 ); + return 0; } #if defined(MBEDTLS_CIPHER_MODE_AEAD) @@ -1505,16 +1451,15 @@ int mbedtls_cipher_crypt( mbedtls_cipher_context_t *ctx, * Packet-oriented encryption for AEAD modes: internal function used by * mbedtls_cipher_auth_encrypt_ext(). */ -static int mbedtls_cipher_aead_encrypt( mbedtls_cipher_context_t *ctx, - const unsigned char *iv, size_t iv_len, - const unsigned char *ad, size_t ad_len, - const unsigned char *input, size_t ilen, - unsigned char *output, size_t *olen, - unsigned char *tag, size_t tag_len ) +static int mbedtls_cipher_aead_encrypt(mbedtls_cipher_context_t *ctx, + const unsigned char *iv, size_t iv_len, + const unsigned char *ad, size_t ad_len, + const unsigned char *input, size_t ilen, + unsigned char *output, size_t *olen, + unsigned char *tag, size_t tag_len) { #if defined(MBEDTLS_USE_PSA_CRYPTO) - if( ctx->psa_enabled == 1 ) - { + if (ctx->psa_enabled == 1) { /* As in the non-PSA case, we don't check that * a key has been set. If not, the key slot will * still be in its default state of 0, which is @@ -1527,74 +1472,71 @@ static int mbedtls_cipher_aead_encrypt( mbedtls_cipher_context_t *ctx, /* PSA Crypto API always writes the authentication tag * at the end of the encrypted message. */ - if( output == NULL || tag != output + ilen ) - return( MBEDTLS_ERR_CIPHER_FEATURE_UNAVAILABLE ); + if (output == NULL || tag != output + ilen) { + return MBEDTLS_ERR_CIPHER_FEATURE_UNAVAILABLE; + } - status = psa_aead_encrypt( cipher_psa->slot, - cipher_psa->alg, - iv, iv_len, - ad, ad_len, - input, ilen, - output, ilen + tag_len, olen ); - if( status != PSA_SUCCESS ) - return( MBEDTLS_ERR_PLATFORM_HW_ACCEL_FAILED ); + status = psa_aead_encrypt(cipher_psa->slot, + cipher_psa->alg, + iv, iv_len, + ad, ad_len, + input, ilen, + output, ilen + tag_len, olen); + if (status != PSA_SUCCESS) { + return MBEDTLS_ERR_PLATFORM_HW_ACCEL_FAILED; + } *olen -= tag_len; - return( 0 ); + return 0; } #endif /* MBEDTLS_USE_PSA_CRYPTO */ #if defined(MBEDTLS_GCM_C) - if( MBEDTLS_MODE_GCM == ctx->cipher_info->mode ) - { + if (MBEDTLS_MODE_GCM == ctx->cipher_info->mode) { *olen = ilen; - return( mbedtls_gcm_crypt_and_tag( ctx->cipher_ctx, MBEDTLS_GCM_ENCRYPT, - ilen, iv, iv_len, ad, ad_len, - input, output, tag_len, tag ) ); + return mbedtls_gcm_crypt_and_tag(ctx->cipher_ctx, MBEDTLS_GCM_ENCRYPT, + ilen, iv, iv_len, ad, ad_len, + input, output, tag_len, tag); } #endif /* MBEDTLS_GCM_C */ #if defined(MBEDTLS_CCM_C) - if( MBEDTLS_MODE_CCM == ctx->cipher_info->mode ) - { + if (MBEDTLS_MODE_CCM == ctx->cipher_info->mode) { *olen = ilen; - return( mbedtls_ccm_encrypt_and_tag( ctx->cipher_ctx, ilen, - iv, iv_len, ad, ad_len, input, output, - tag, tag_len ) ); + return mbedtls_ccm_encrypt_and_tag(ctx->cipher_ctx, ilen, + iv, iv_len, ad, ad_len, input, output, + tag, tag_len); } #endif /* MBEDTLS_CCM_C */ #if defined(MBEDTLS_CHACHAPOLY_C) - if ( MBEDTLS_CIPHER_CHACHA20_POLY1305 == ctx->cipher_info->type ) - { + if (MBEDTLS_CIPHER_CHACHA20_POLY1305 == ctx->cipher_info->type) { /* ChachaPoly has fixed length nonce and MAC (tag) */ - if ( ( iv_len != ctx->cipher_info->iv_size ) || - ( tag_len != 16U ) ) - { - return( MBEDTLS_ERR_CIPHER_BAD_INPUT_DATA ); + if ((iv_len != ctx->cipher_info->iv_size) || + (tag_len != 16U)) { + return MBEDTLS_ERR_CIPHER_BAD_INPUT_DATA; } *olen = ilen; - return( mbedtls_chachapoly_encrypt_and_tag( ctx->cipher_ctx, - ilen, iv, ad, ad_len, input, output, tag ) ); + return mbedtls_chachapoly_encrypt_and_tag(ctx->cipher_ctx, + ilen, iv, ad, ad_len, input, output, tag); } #endif /* MBEDTLS_CHACHAPOLY_C */ - return( MBEDTLS_ERR_CIPHER_FEATURE_UNAVAILABLE ); + return MBEDTLS_ERR_CIPHER_FEATURE_UNAVAILABLE; } /* * Packet-oriented encryption for AEAD modes: internal function used by * mbedtls_cipher_auth_encrypt_ext(). */ -static int mbedtls_cipher_aead_decrypt( mbedtls_cipher_context_t *ctx, - const unsigned char *iv, size_t iv_len, - const unsigned char *ad, size_t ad_len, - const unsigned char *input, size_t ilen, - unsigned char *output, size_t *olen, - const unsigned char *tag, size_t tag_len ) +static int mbedtls_cipher_aead_decrypt(mbedtls_cipher_context_t *ctx, + const unsigned char *iv, size_t iv_len, + const unsigned char *ad, size_t ad_len, + const unsigned char *input, size_t ilen, + unsigned char *output, size_t *olen, + const unsigned char *tag, size_t tag_len) { #if defined(MBEDTLS_USE_PSA_CRYPTO) - if( ctx->psa_enabled == 1 ) - { + if (ctx->psa_enabled == 1) { /* As in the non-PSA case, we don't check that * a key has been set. If not, the key slot will * still be in its default state of 0, which is @@ -1607,80 +1549,81 @@ static int mbedtls_cipher_aead_decrypt( mbedtls_cipher_context_t *ctx, /* PSA Crypto API always writes the authentication tag * at the end of the encrypted message. */ - if( input == NULL || tag != input + ilen ) - return( MBEDTLS_ERR_CIPHER_FEATURE_UNAVAILABLE ); - - status = psa_aead_decrypt( cipher_psa->slot, - cipher_psa->alg, - iv, iv_len, - ad, ad_len, - input, ilen + tag_len, - output, ilen, olen ); - if( status == PSA_ERROR_INVALID_SIGNATURE ) - return( MBEDTLS_ERR_CIPHER_AUTH_FAILED ); - else if( status != PSA_SUCCESS ) - return( MBEDTLS_ERR_PLATFORM_HW_ACCEL_FAILED ); - - return( 0 ); + if (input == NULL || tag != input + ilen) { + return MBEDTLS_ERR_CIPHER_FEATURE_UNAVAILABLE; + } + + status = psa_aead_decrypt(cipher_psa->slot, + cipher_psa->alg, + iv, iv_len, + ad, ad_len, + input, ilen + tag_len, + output, ilen, olen); + if (status == PSA_ERROR_INVALID_SIGNATURE) { + return MBEDTLS_ERR_CIPHER_AUTH_FAILED; + } else if (status != PSA_SUCCESS) { + return MBEDTLS_ERR_PLATFORM_HW_ACCEL_FAILED; + } + + return 0; } #endif /* MBEDTLS_USE_PSA_CRYPTO */ #if defined(MBEDTLS_GCM_C) - if( MBEDTLS_MODE_GCM == ctx->cipher_info->mode ) - { + if (MBEDTLS_MODE_GCM == ctx->cipher_info->mode) { int ret = MBEDTLS_ERR_ERROR_CORRUPTION_DETECTED; *olen = ilen; - ret = mbedtls_gcm_auth_decrypt( ctx->cipher_ctx, ilen, - iv, iv_len, ad, ad_len, - tag, tag_len, input, output ); + ret = mbedtls_gcm_auth_decrypt(ctx->cipher_ctx, ilen, + iv, iv_len, ad, ad_len, + tag, tag_len, input, output); - if( ret == MBEDTLS_ERR_GCM_AUTH_FAILED ) + if (ret == MBEDTLS_ERR_GCM_AUTH_FAILED) { ret = MBEDTLS_ERR_CIPHER_AUTH_FAILED; + } - return( ret ); + return ret; } #endif /* MBEDTLS_GCM_C */ #if defined(MBEDTLS_CCM_C) - if( MBEDTLS_MODE_CCM == ctx->cipher_info->mode ) - { + if (MBEDTLS_MODE_CCM == ctx->cipher_info->mode) { int ret = MBEDTLS_ERR_ERROR_CORRUPTION_DETECTED; *olen = ilen; - ret = mbedtls_ccm_auth_decrypt( ctx->cipher_ctx, ilen, - iv, iv_len, ad, ad_len, - input, output, tag, tag_len ); + ret = mbedtls_ccm_auth_decrypt(ctx->cipher_ctx, ilen, + iv, iv_len, ad, ad_len, + input, output, tag, tag_len); - if( ret == MBEDTLS_ERR_CCM_AUTH_FAILED ) + if (ret == MBEDTLS_ERR_CCM_AUTH_FAILED) { ret = MBEDTLS_ERR_CIPHER_AUTH_FAILED; + } - return( ret ); + return ret; } #endif /* MBEDTLS_CCM_C */ #if defined(MBEDTLS_CHACHAPOLY_C) - if ( MBEDTLS_CIPHER_CHACHA20_POLY1305 == ctx->cipher_info->type ) - { + if (MBEDTLS_CIPHER_CHACHA20_POLY1305 == ctx->cipher_info->type) { int ret = MBEDTLS_ERR_ERROR_CORRUPTION_DETECTED; /* ChachaPoly has fixed length nonce and MAC (tag) */ - if ( ( iv_len != ctx->cipher_info->iv_size ) || - ( tag_len != 16U ) ) - { - return( MBEDTLS_ERR_CIPHER_BAD_INPUT_DATA ); + if ((iv_len != ctx->cipher_info->iv_size) || + (tag_len != 16U)) { + return MBEDTLS_ERR_CIPHER_BAD_INPUT_DATA; } *olen = ilen; - ret = mbedtls_chachapoly_auth_decrypt( ctx->cipher_ctx, ilen, - iv, ad, ad_len, tag, input, output ); + ret = mbedtls_chachapoly_auth_decrypt(ctx->cipher_ctx, ilen, + iv, ad, ad_len, tag, input, output); - if( ret == MBEDTLS_ERR_CHACHAPOLY_AUTH_FAILED ) + if (ret == MBEDTLS_ERR_CHACHAPOLY_AUTH_FAILED) { ret = MBEDTLS_ERR_CIPHER_AUTH_FAILED; + } - return( ret ); + return ret; } #endif /* MBEDTLS_CHACHAPOLY_C */ - return( MBEDTLS_ERR_CIPHER_FEATURE_UNAVAILABLE ); + return MBEDTLS_ERR_CIPHER_FEATURE_UNAVAILABLE; } #endif /* MBEDTLS_CIPHER_MODE_AEAD */ @@ -1688,110 +1631,98 @@ static int mbedtls_cipher_aead_decrypt( mbedtls_cipher_context_t *ctx, /* * Packet-oriented encryption for AEAD/NIST_KW: public function. */ -int mbedtls_cipher_auth_encrypt_ext( mbedtls_cipher_context_t *ctx, - const unsigned char *iv, size_t iv_len, - const unsigned char *ad, size_t ad_len, - const unsigned char *input, size_t ilen, - unsigned char *output, size_t output_len, - size_t *olen, size_t tag_len ) +int mbedtls_cipher_auth_encrypt_ext(mbedtls_cipher_context_t *ctx, + const unsigned char *iv, size_t iv_len, + const unsigned char *ad, size_t ad_len, + const unsigned char *input, size_t ilen, + unsigned char *output, size_t output_len, + size_t *olen, size_t tag_len) { - CIPHER_VALIDATE_RET( ctx != NULL ); - CIPHER_VALIDATE_RET( iv_len == 0 || iv != NULL ); - CIPHER_VALIDATE_RET( ad_len == 0 || ad != NULL ); - CIPHER_VALIDATE_RET( ilen == 0 || input != NULL ); - CIPHER_VALIDATE_RET( output != NULL ); - CIPHER_VALIDATE_RET( olen != NULL ); - #if defined(MBEDTLS_NIST_KW_C) - if( + if ( #if defined(MBEDTLS_USE_PSA_CRYPTO) ctx->psa_enabled == 0 && #endif - ( MBEDTLS_MODE_KW == ctx->cipher_info->mode || - MBEDTLS_MODE_KWP == ctx->cipher_info->mode ) ) - { - mbedtls_nist_kw_mode_t mode = ( MBEDTLS_MODE_KW == ctx->cipher_info->mode ) ? - MBEDTLS_KW_MODE_KW : MBEDTLS_KW_MODE_KWP; + (MBEDTLS_MODE_KW == ctx->cipher_info->mode || + MBEDTLS_MODE_KWP == ctx->cipher_info->mode)) { + mbedtls_nist_kw_mode_t mode = (MBEDTLS_MODE_KW == ctx->cipher_info->mode) ? + MBEDTLS_KW_MODE_KW : MBEDTLS_KW_MODE_KWP; /* There is no iv, tag or ad associated with KW and KWP, * so these length should be 0 as documented. */ - if( iv_len != 0 || tag_len != 0 || ad_len != 0 ) - return( MBEDTLS_ERR_CIPHER_BAD_INPUT_DATA ); + if (iv_len != 0 || tag_len != 0 || ad_len != 0) { + return MBEDTLS_ERR_CIPHER_BAD_INPUT_DATA; + } (void) iv; (void) ad; - return( mbedtls_nist_kw_wrap( ctx->cipher_ctx, mode, input, ilen, - output, olen, output_len ) ); + return mbedtls_nist_kw_wrap(ctx->cipher_ctx, mode, input, ilen, + output, olen, output_len); } #endif /* MBEDTLS_NIST_KW_C */ #if defined(MBEDTLS_CIPHER_MODE_AEAD) /* AEAD case: check length before passing on to shared function */ - if( output_len < ilen + tag_len ) - return( MBEDTLS_ERR_CIPHER_BAD_INPUT_DATA ); + if (output_len < ilen + tag_len) { + return MBEDTLS_ERR_CIPHER_BAD_INPUT_DATA; + } - int ret = mbedtls_cipher_aead_encrypt( ctx, iv, iv_len, ad, ad_len, - input, ilen, output, olen, - output + ilen, tag_len ); + int ret = mbedtls_cipher_aead_encrypt(ctx, iv, iv_len, ad, ad_len, + input, ilen, output, olen, + output + ilen, tag_len); *olen += tag_len; - return( ret ); + return ret; #else - return( MBEDTLS_ERR_CIPHER_FEATURE_UNAVAILABLE ); + return MBEDTLS_ERR_CIPHER_FEATURE_UNAVAILABLE; #endif /* MBEDTLS_CIPHER_MODE_AEAD */ } /* * Packet-oriented decryption for AEAD/NIST_KW: public function. */ -int mbedtls_cipher_auth_decrypt_ext( mbedtls_cipher_context_t *ctx, - const unsigned char *iv, size_t iv_len, - const unsigned char *ad, size_t ad_len, - const unsigned char *input, size_t ilen, - unsigned char *output, size_t output_len, - size_t *olen, size_t tag_len ) +int mbedtls_cipher_auth_decrypt_ext(mbedtls_cipher_context_t *ctx, + const unsigned char *iv, size_t iv_len, + const unsigned char *ad, size_t ad_len, + const unsigned char *input, size_t ilen, + unsigned char *output, size_t output_len, + size_t *olen, size_t tag_len) { - CIPHER_VALIDATE_RET( ctx != NULL ); - CIPHER_VALIDATE_RET( iv_len == 0 || iv != NULL ); - CIPHER_VALIDATE_RET( ad_len == 0 || ad != NULL ); - CIPHER_VALIDATE_RET( ilen == 0 || input != NULL ); - CIPHER_VALIDATE_RET( output_len == 0 || output != NULL ); - CIPHER_VALIDATE_RET( olen != NULL ); - #if defined(MBEDTLS_NIST_KW_C) - if( + if ( #if defined(MBEDTLS_USE_PSA_CRYPTO) ctx->psa_enabled == 0 && #endif - ( MBEDTLS_MODE_KW == ctx->cipher_info->mode || - MBEDTLS_MODE_KWP == ctx->cipher_info->mode ) ) - { - mbedtls_nist_kw_mode_t mode = ( MBEDTLS_MODE_KW == ctx->cipher_info->mode ) ? - MBEDTLS_KW_MODE_KW : MBEDTLS_KW_MODE_KWP; + (MBEDTLS_MODE_KW == ctx->cipher_info->mode || + MBEDTLS_MODE_KWP == ctx->cipher_info->mode)) { + mbedtls_nist_kw_mode_t mode = (MBEDTLS_MODE_KW == ctx->cipher_info->mode) ? + MBEDTLS_KW_MODE_KW : MBEDTLS_KW_MODE_KWP; /* There is no iv, tag or ad associated with KW and KWP, * so these length should be 0 as documented. */ - if( iv_len != 0 || tag_len != 0 || ad_len != 0 ) - return( MBEDTLS_ERR_CIPHER_BAD_INPUT_DATA ); + if (iv_len != 0 || tag_len != 0 || ad_len != 0) { + return MBEDTLS_ERR_CIPHER_BAD_INPUT_DATA; + } (void) iv; (void) ad; - return( mbedtls_nist_kw_unwrap( ctx->cipher_ctx, mode, input, ilen, - output, olen, output_len ) ); + return mbedtls_nist_kw_unwrap(ctx->cipher_ctx, mode, input, ilen, + output, olen, output_len); } #endif /* MBEDTLS_NIST_KW_C */ #if defined(MBEDTLS_CIPHER_MODE_AEAD) /* AEAD case: check length before passing on to shared function */ - if( ilen < tag_len || output_len < ilen - tag_len ) - return( MBEDTLS_ERR_CIPHER_BAD_INPUT_DATA ); + if (ilen < tag_len || output_len < ilen - tag_len) { + return MBEDTLS_ERR_CIPHER_BAD_INPUT_DATA; + } - return( mbedtls_cipher_aead_decrypt( ctx, iv, iv_len, ad, ad_len, - input, ilen - tag_len, output, olen, - input + ilen - tag_len, tag_len ) ); + return mbedtls_cipher_aead_decrypt(ctx, iv, iv_len, ad, ad_len, + input, ilen - tag_len, output, olen, + input + ilen - tag_len, tag_len); #else - return( MBEDTLS_ERR_CIPHER_FEATURE_UNAVAILABLE ); + return MBEDTLS_ERR_CIPHER_FEATURE_UNAVAILABLE; #endif /* MBEDTLS_CIPHER_MODE_AEAD */ } #endif /* MBEDTLS_CIPHER_MODE_AEAD || MBEDTLS_NIST_KW_C */ diff --git a/ra/fsp/src/rm_psa_crypto/cmac_alt.c b/ra/fsp/src/rm_psa_crypto/cmac_alt.c index 41d9a3048..51da582a3 100644 --- a/ra/fsp/src/rm_psa_crypto/cmac_alt.c +++ b/ra/fsp/src/rm_psa_crypto/cmac_alt.c @@ -64,9 +64,9 @@ * Input and output MUST NOT point to the same buffer * Block size must be 8 bytes or 16 bytes - the block sizes for DES and AES. */ -static int cmac_multiply_by_u( unsigned char *output, - const unsigned char *input, - size_t blocksize ) +static int cmac_multiply_by_u(unsigned char *output, + const unsigned char *input, + size_t blocksize) { const unsigned char R_128 = 0x87; const unsigned char R_64 = 0x1B; @@ -74,21 +74,15 @@ static int cmac_multiply_by_u( unsigned char *output, unsigned char overflow = 0x00; int i; - if( blocksize == MBEDTLS_AES_BLOCK_SIZE ) - { + if (blocksize == MBEDTLS_AES_BLOCK_SIZE) { R_n = R_128; - } - else if( blocksize == MBEDTLS_DES3_BLOCK_SIZE ) - { + } else if (blocksize == MBEDTLS_DES3_BLOCK_SIZE) { R_n = R_64; - } - else - { - return( MBEDTLS_ERR_CIPHER_BAD_INPUT_DATA ); + } else { + return MBEDTLS_ERR_CIPHER_BAD_INPUT_DATA; } - for( i = (int)blocksize - 1; i >= 0; i-- ) - { + for (i = (int) blocksize - 1; i >= 0; i--) { output[i] = input[i] << 1 | overflow; overflow = input[i] >> 7; } @@ -102,14 +96,14 @@ static int cmac_multiply_by_u( unsigned char *output, #pragma warning( push ) #pragma warning( disable : 4146 ) #endif - mask = - ( input[0] >> 7 ); + mask = -(input[0] >> 7); #if defined(_MSC_VER) #pragma warning( pop ) #endif - output[ blocksize - 1 ] ^= R_n & mask; + output[blocksize - 1] ^= R_n & mask; - return( 0 ); + return 0; } /* @@ -117,47 +111,41 @@ static int cmac_multiply_by_u( unsigned char *output, * * - as specified by RFC 4493, section 2.3 Subkey Generation Algorithm */ -static int cmac_generate_subkeys( mbedtls_cipher_context_t *ctx, - unsigned char* K1, unsigned char* K2 ) +static int cmac_generate_subkeys(mbedtls_cipher_context_t *ctx, + unsigned char *K1, unsigned char *K2) { int ret = MBEDTLS_ERR_ERROR_CORRUPTION_DETECTED; unsigned char L[MBEDTLS_CIPHER_BLKSIZE_MAX]; size_t olen, block_size; - mbedtls_platform_zeroize( L, sizeof( L ) ); + mbedtls_platform_zeroize(L, sizeof(L)); block_size = ctx->cipher_info->block_size; /* Calculate Ek(0) */ - if( ( ret = mbedtls_cipher_update( ctx, L, block_size, L, &olen ) ) != 0 ) + if ((ret = mbedtls_cipher_update(ctx, L, block_size, L, &olen)) != 0) { goto exit; + } /* * Generate K1 and K2 */ - if( ( ret = cmac_multiply_by_u( K1, L , block_size ) ) != 0 ) + if ((ret = cmac_multiply_by_u(K1, L, block_size)) != 0) { goto exit; + } - if( ( ret = cmac_multiply_by_u( K2, K1 , block_size ) ) != 0 ) + if ((ret = cmac_multiply_by_u(K2, K1, block_size)) != 0) { goto exit; + } exit: - mbedtls_platform_zeroize( L, sizeof( L ) ); + mbedtls_platform_zeroize(L, sizeof(L)); - return( ret ); + return ret; } #endif /* !defined(MBEDTLS_CMAC_ALT) || defined(MBEDTLS_SELF_TEST) */ #if !defined(MBEDTLS_CMAC_ALT) -static void cmac_xor_block( unsigned char *output, const unsigned char *input1, - const unsigned char *input2, - const size_t block_size ) -{ - size_t idx; - - for( idx = 0; idx < block_size; idx++ ) - output[ idx ] = input1[ idx ] ^ input2[ idx ]; -} /* * Create padded last block from (partial) last block. @@ -165,21 +153,21 @@ static void cmac_xor_block( unsigned char *output, const unsigned char *input1, * We can't use the padding option from the cipher layer, as it only works for * CBC and we use ECB mode, and anyway we need to XOR K1 or K2 in addition. */ -static void cmac_pad( unsigned char padded_block[MBEDTLS_CIPHER_BLKSIZE_MAX], - size_t padded_block_len, - const unsigned char *last_block, - size_t last_block_len ) +static void cmac_pad(unsigned char padded_block[MBEDTLS_CIPHER_BLKSIZE_MAX], + size_t padded_block_len, + const unsigned char *last_block, + size_t last_block_len) { size_t j; - for( j = 0; j < padded_block_len; j++ ) - { - if( j < last_block_len ) + for (j = 0; j < padded_block_len; j++) { + if (j < last_block_len) { padded_block[j] = last_block[j]; - else if( j == last_block_len ) + } else if (j == last_block_len) { padded_block[j] = 0x80; - else + } else { padded_block[j] = 0x00; + } } } #endif /* !MBEDTLS_CMAC_ALT */ @@ -225,31 +213,32 @@ static const hw_sce_cmac_final_t g_sce_cmac_final[] = HW_SCE_Aes256CmacFinal, }; -int mbedtls_cipher_cmac_starts( mbedtls_cipher_context_t *ctx, - const unsigned char *key, size_t keybits ) -{ +int mbedtls_cipher_cmac_starts(mbedtls_cipher_context_t *ctx, + const unsigned char *key, size_t keybits) +{ mbedtls_cipher_type_t type; mbedtls_cmac_context_t *cmac_ctx; int retval; uint32_t InData_KeyType = 0U; - if( ctx == NULL || ctx->cipher_info == NULL || key == NULL ) - return( MBEDTLS_ERR_CIPHER_BAD_INPUT_DATA ); + if (ctx == NULL || ctx->cipher_info == NULL || key == NULL) { + return MBEDTLS_ERR_CIPHER_BAD_INPUT_DATA; + } - if( ( retval = mbedtls_cipher_setkey( ctx, key, (int)keybits, - MBEDTLS_ENCRYPT ) ) != 0 ) - return( retval ); + if ((retval = mbedtls_cipher_setkey(ctx, key, (int) keybits, + MBEDTLS_ENCRYPT)) != 0) { + return retval; + } type = ctx->cipher_info->type; - switch( type ) - { + switch (type) { case MBEDTLS_CIPHER_AES_128_ECB: case MBEDTLS_CIPHER_AES_192_ECB: case MBEDTLS_CIPHER_AES_256_ECB: break; default: - return( MBEDTLS_ERR_CIPHER_BAD_INPUT_DATA ); + return MBEDTLS_ERR_CIPHER_BAD_INPUT_DATA; } retval = g_sce_cmac_init[RM_PSA_CRYPTO_CMAC_LOOKUP_INDEX(type)](&InData_KeyType, (uint32_t *)((mbedtls_aes_context *)(ctx->cipher_ctx))->buf); @@ -258,31 +247,33 @@ int mbedtls_cipher_cmac_starts( mbedtls_cipher_context_t *ctx, /* Allocated and initialise in the cipher context memory for the CMAC * context */ - cmac_ctx = mbedtls_calloc( 1, sizeof( mbedtls_cmac_context_t ) ); - if( cmac_ctx == NULL ) - return( MBEDTLS_ERR_CIPHER_ALLOC_FAILED ); + cmac_ctx = mbedtls_calloc(1, sizeof(mbedtls_cmac_context_t)); + if (cmac_ctx == NULL) { + return MBEDTLS_ERR_CIPHER_ALLOC_FAILED; + } ctx->cmac_ctx = cmac_ctx; - mbedtls_platform_zeroize( cmac_ctx->state, sizeof( cmac_ctx->state ) ); + mbedtls_platform_zeroize(cmac_ctx->state, sizeof(cmac_ctx->state)); cmac_ctx->vendor_state = SCE_MBEDTLS_CMAC_OPERATION_STATE_UPDATE; return 0; } -int mbedtls_cipher_cmac_update( mbedtls_cipher_context_t *ctx, - const unsigned char *input, size_t ilen ) +int mbedtls_cipher_cmac_update(mbedtls_cipher_context_t *ctx, + const unsigned char *input, size_t ilen) { - mbedtls_cmac_context_t* cmac_ctx; + mbedtls_cmac_context_t *cmac_ctx; int ret = 0; size_t block_size; uint32_t length_rest = 0; mbedtls_cipher_type_t type = ctx->cipher_info->type; - if( ctx == NULL || ctx->cipher_info == NULL || input == NULL || - ctx->cmac_ctx == NULL ) - return( MBEDTLS_ERR_CIPHER_BAD_INPUT_DATA ); + if (ctx == NULL || ctx->cipher_info == NULL || input == NULL || + ctx->cmac_ctx == NULL) { + return MBEDTLS_ERR_CIPHER_BAD_INPUT_DATA; + } cmac_ctx = ctx->cmac_ctx; block_size = ctx->cipher_info->block_size; @@ -321,18 +312,18 @@ int mbedtls_cipher_cmac_update( mbedtls_cipher_context_t *ctx, return( ret ); } -int mbedtls_cipher_cmac_finish( mbedtls_cipher_context_t *ctx, - unsigned char *output ) +int mbedtls_cipher_cmac_finish(mbedtls_cipher_context_t *ctx, + unsigned char *output) { - mbedtls_cmac_context_t* cmac_ctx; + mbedtls_cmac_context_t *cmac_ctx; int ret = MBEDTLS_ERR_ERROR_CORRUPTION_DETECTED; size_t block_size; mbedtls_cipher_type_t type = ctx->cipher_info->type; - - if( ctx == NULL || ctx->cipher_info == NULL || ctx->cmac_ctx == NULL || - output == NULL ) - return( MBEDTLS_ERR_CIPHER_BAD_INPUT_DATA ); + if (ctx == NULL || ctx->cipher_info == NULL || ctx->cmac_ctx == NULL || + output == NULL) { + return MBEDTLS_ERR_CIPHER_BAD_INPUT_DATA; + } cmac_ctx = ctx->cmac_ctx; block_size = ctx->cipher_info->block_size; @@ -382,62 +373,67 @@ int mbedtls_cipher_cmac_finish( mbedtls_cipher_context_t *ctx, * side channel leakage */ cmac_ctx->unprocessed_len = 0; - mbedtls_platform_zeroize( cmac_ctx->unprocessed_block, - sizeof( cmac_ctx->unprocessed_block ) ); + mbedtls_platform_zeroize(cmac_ctx->unprocessed_block, + sizeof(cmac_ctx->unprocessed_block)); - return( ret ); + return ret; } -int mbedtls_cipher_cmac_reset( mbedtls_cipher_context_t *ctx ) +int mbedtls_cipher_cmac_reset(mbedtls_cipher_context_t *ctx) { - mbedtls_cmac_context_t* cmac_ctx; + mbedtls_cmac_context_t *cmac_ctx; - if( ctx == NULL || ctx->cipher_info == NULL || ctx->cmac_ctx == NULL ) - return( MBEDTLS_ERR_CIPHER_BAD_INPUT_DATA ); + if (ctx == NULL || ctx->cipher_info == NULL || ctx->cmac_ctx == NULL) { + return MBEDTLS_ERR_CIPHER_BAD_INPUT_DATA; + } cmac_ctx = ctx->cmac_ctx; /* Reset the internal state */ cmac_ctx->unprocessed_len = 0; - mbedtls_platform_zeroize( cmac_ctx->unprocessed_block, - sizeof( cmac_ctx->unprocessed_block ) ); - mbedtls_platform_zeroize( cmac_ctx->state, - sizeof( cmac_ctx->state ) ); + mbedtls_platform_zeroize(cmac_ctx->unprocessed_block, + sizeof(cmac_ctx->unprocessed_block)); + mbedtls_platform_zeroize(cmac_ctx->state, + sizeof(cmac_ctx->state)); cmac_ctx->vendor_state = SCE_MBEDTLS_CMAC_OPERATION_STATE_UPDATE; - return( 0 ); + return 0; } -int mbedtls_cipher_cmac( const mbedtls_cipher_info_t *cipher_info, - const unsigned char *key, size_t keylen, - const unsigned char *input, size_t ilen, - unsigned char *output ) +int mbedtls_cipher_cmac(const mbedtls_cipher_info_t *cipher_info, + const unsigned char *key, size_t keylen, + const unsigned char *input, size_t ilen, + unsigned char *output) { mbedtls_cipher_context_t ctx; int ret = MBEDTLS_ERR_ERROR_CORRUPTION_DETECTED; - if( cipher_info == NULL || key == NULL || input == NULL || output == NULL ) - return( MBEDTLS_ERR_CIPHER_BAD_INPUT_DATA ); + if (cipher_info == NULL || key == NULL || input == NULL || output == NULL) { + return MBEDTLS_ERR_CIPHER_BAD_INPUT_DATA; + } - mbedtls_cipher_init( &ctx ); + mbedtls_cipher_init(&ctx); - if( ( ret = mbedtls_cipher_setup( &ctx, cipher_info ) ) != 0 ) + if ((ret = mbedtls_cipher_setup(&ctx, cipher_info)) != 0) { goto exit; + } - ret = mbedtls_cipher_cmac_starts( &ctx, key, keylen ); - if( ret != 0 ) + ret = mbedtls_cipher_cmac_starts(&ctx, key, keylen); + if (ret != 0) { goto exit; + } - ret = mbedtls_cipher_cmac_update( &ctx, input, ilen ); - if( ret != 0 ) + ret = mbedtls_cipher_cmac_update(&ctx, input, ilen); + if (ret != 0) { goto exit; + } - ret = mbedtls_cipher_cmac_finish( &ctx, output ); + ret = mbedtls_cipher_cmac_finish(&ctx, output); exit: - mbedtls_cipher_free( &ctx ); + mbedtls_cipher_free(&ctx); - return( ret ); + return ret; } @@ -448,50 +444,49 @@ int mbedtls_cipher_cmac( const mbedtls_cipher_info_t *cipher_info, /* * Implementation of AES-CMAC-PRF-128 defined in RFC 4615 */ -int mbedtls_aes_cmac_prf_128( const unsigned char *key, size_t key_length, - const unsigned char *input, size_t in_len, - unsigned char output[16] ) +int mbedtls_aes_cmac_prf_128(const unsigned char *key, size_t key_length, + const unsigned char *input, size_t in_len, + unsigned char output[16]) { int ret = MBEDTLS_ERR_ERROR_CORRUPTION_DETECTED; const mbedtls_cipher_info_t *cipher_info; unsigned char zero_key[MBEDTLS_AES_BLOCK_SIZE]; unsigned char int_key[MBEDTLS_AES_BLOCK_SIZE]; - if( key == NULL || input == NULL || output == NULL ) - return( MBEDTLS_ERR_CIPHER_BAD_INPUT_DATA ); + if (key == NULL || input == NULL || output == NULL) { + return MBEDTLS_ERR_CIPHER_BAD_INPUT_DATA; + } - cipher_info = mbedtls_cipher_info_from_type( MBEDTLS_CIPHER_AES_128_ECB ); - if( cipher_info == NULL ) - { + cipher_info = mbedtls_cipher_info_from_type(MBEDTLS_CIPHER_AES_128_ECB); + if (cipher_info == NULL) { /* Failing at this point must be due to a build issue */ ret = MBEDTLS_ERR_CIPHER_FEATURE_UNAVAILABLE; goto exit; } - if( key_length == MBEDTLS_AES_BLOCK_SIZE ) - { + if (key_length == MBEDTLS_AES_BLOCK_SIZE) { /* Use key as is */ - memcpy( int_key, key, MBEDTLS_AES_BLOCK_SIZE ); - } - else - { - memset( zero_key, 0, MBEDTLS_AES_BLOCK_SIZE ); + memcpy(int_key, key, MBEDTLS_AES_BLOCK_SIZE); + } else { + memset(zero_key, 0, MBEDTLS_AES_BLOCK_SIZE); - ret = mbedtls_cipher_cmac( cipher_info, zero_key, 128, key, - key_length, int_key ); - if( ret != 0 ) + ret = mbedtls_cipher_cmac(cipher_info, zero_key, 128, key, + key_length, int_key); + if (ret != 0) { goto exit; + } } - ret = mbedtls_cipher_cmac( cipher_info, int_key, 128, input, in_len, - output ); + ret = mbedtls_cipher_cmac(cipher_info, int_key, 128, input, in_len, + output); exit: - mbedtls_platform_zeroize( int_key, sizeof( int_key ) ); + mbedtls_platform_zeroize(int_key, sizeof(int_key)); - return( ret ); + return ret; } #endif /* MBEDTLS_AES_C */ + #endif /* !MBEDTLS_CMAC_ALT */ #endif // FSP_NOT_DEFINED @@ -550,7 +545,8 @@ static const unsigned char aes_128_subkeys[2][MBEDTLS_AES_BLOCK_SIZE] = { 0xf9, 0x0b, 0xc1, 0x1e, 0xe4, 0x6d, 0x51, 0x3b } }; -static const unsigned char aes_128_expected_result[NB_CMAC_TESTS_PER_KEY][MBEDTLS_AES_BLOCK_SIZE] = { +static const unsigned char aes_128_expected_result[NB_CMAC_TESTS_PER_KEY][MBEDTLS_AES_BLOCK_SIZE] = +{ { /* Example #1 */ 0xbb, 0x1d, 0x69, 0x29, 0xe9, 0x59, 0x37, 0x28, @@ -591,7 +587,8 @@ static const unsigned char aes_192_subkeys[2][MBEDTLS_AES_BLOCK_SIZE] = { 0x7d, 0xcc, 0x87, 0x3b, 0xa9, 0xb5, 0x45, 0x2c } }; -static const unsigned char aes_192_expected_result[NB_CMAC_TESTS_PER_KEY][MBEDTLS_AES_BLOCK_SIZE] = { +static const unsigned char aes_192_expected_result[NB_CMAC_TESTS_PER_KEY][MBEDTLS_AES_BLOCK_SIZE] = +{ { /* Example #1 */ 0xd1, 0x7d, 0xdf, 0x46, 0xad, 0xaa, 0xcd, 0xe5, @@ -633,7 +630,8 @@ static const unsigned char aes_256_subkeys[2][MBEDTLS_AES_BLOCK_SIZE] = { 0x5d, 0x35, 0x33, 0x01, 0x0c, 0x42, 0xa0, 0xd9 } }; -static const unsigned char aes_256_expected_result[NB_CMAC_TESTS_PER_KEY][MBEDTLS_AES_BLOCK_SIZE] = { +static const unsigned char aes_256_expected_result[NB_CMAC_TESTS_PER_KEY][MBEDTLS_AES_BLOCK_SIZE] = +{ { /* Example #1 */ 0x02, 0x89, 0x62, 0xf6, 0x1b, 0x7b, 0xf8, 0x9e, @@ -685,7 +683,8 @@ static const unsigned char des3_2key_subkeys[2][8] = { 0x1b, 0xa5, 0x96, 0xf4, 0x7b, 0x11, 0x11, 0xb2 } }; -static const unsigned char des3_2key_expected_result[NB_CMAC_TESTS_PER_KEY][MBEDTLS_DES3_BLOCK_SIZE] = { +static const unsigned char des3_2key_expected_result[NB_CMAC_TESTS_PER_KEY][MBEDTLS_DES3_BLOCK_SIZE] + = { { /* Sample #1 */ 0x79, 0xce, 0x52, 0xa7, 0xf7, 0x86, 0xa9, 0x60 @@ -723,7 +722,8 @@ static const unsigned char des3_3key_subkeys[2][8] = { 0x3a, 0xe9, 0xce, 0x72, 0x66, 0x2f, 0x2d, 0x9b } }; -static const unsigned char des3_3key_expected_result[NB_CMAC_TESTS_PER_KEY][MBEDTLS_DES3_BLOCK_SIZE] = { +static const unsigned char des3_3key_expected_result[NB_CMAC_TESTS_PER_KEY][MBEDTLS_DES3_BLOCK_SIZE] + = { { /* Sample #1 */ 0x7d, 0xb0, 0xd3, 0x7d, 0xf9, 0x36, 0xc5, 0x50 @@ -783,14 +783,14 @@ static const unsigned char PRFT[NB_PRF_TESTS][16] = { }; #endif /* MBEDTLS_AES_C */ -static int cmac_test_subkeys( int verbose, - const char* testname, - const unsigned char* key, - int keybits, - const unsigned char* subkeys, - mbedtls_cipher_type_t cipher_type, - int block_size, - int num_tests ) +static int cmac_test_subkeys(int verbose, + const char *testname, + const unsigned char *key, + int keybits, + const unsigned char *subkeys, + mbedtls_cipher_type_t cipher_type, + int block_size, + int num_tests) { int i, ret = 0; mbedtls_cipher_context_t ctx; @@ -798,330 +798,321 @@ static int cmac_test_subkeys( int verbose, unsigned char K1[MBEDTLS_CIPHER_BLKSIZE_MAX]; unsigned char K2[MBEDTLS_CIPHER_BLKSIZE_MAX]; - cipher_info = mbedtls_cipher_info_from_type( cipher_type ); - if( cipher_info == NULL ) - { + cipher_info = mbedtls_cipher_info_from_type(cipher_type); + if (cipher_info == NULL) { /* Failing at this point must be due to a build issue */ - return( MBEDTLS_ERR_CIPHER_FEATURE_UNAVAILABLE ); + return MBEDTLS_ERR_CIPHER_FEATURE_UNAVAILABLE; } - for( i = 0; i < num_tests; i++ ) - { - if( verbose != 0 ) - mbedtls_printf( " %s CMAC subkey #%d: ", testname, i + 1 ); + for (i = 0; i < num_tests; i++) { + if (verbose != 0) { + mbedtls_printf(" %s CMAC subkey #%d: ", testname, i + 1); + } - mbedtls_cipher_init( &ctx ); + mbedtls_cipher_init(&ctx); - if( ( ret = mbedtls_cipher_setup( &ctx, cipher_info ) ) != 0 ) - { - if( verbose != 0 ) - mbedtls_printf( "test execution failed\n" ); + if ((ret = mbedtls_cipher_setup(&ctx, cipher_info)) != 0) { + if (verbose != 0) { + mbedtls_printf("test execution failed\n"); + } goto cleanup; } - if( ( ret = mbedtls_cipher_setkey( &ctx, key, keybits, - MBEDTLS_ENCRYPT ) ) != 0 ) - { + if ((ret = mbedtls_cipher_setkey(&ctx, key, keybits, + MBEDTLS_ENCRYPT)) != 0) { /* When CMAC is implemented by an alternative implementation, or * the underlying primitive itself is implemented alternatively, * AES-192 may be unavailable. This should not cause the selftest * function to fail. */ - if( ( ret == MBEDTLS_ERR_PLATFORM_FEATURE_UNSUPPORTED || - ret == MBEDTLS_ERR_CIPHER_FEATURE_UNAVAILABLE ) && - cipher_type == MBEDTLS_CIPHER_AES_192_ECB ) { - if( verbose != 0 ) - mbedtls_printf( "skipped\n" ); + if ((ret == MBEDTLS_ERR_PLATFORM_FEATURE_UNSUPPORTED || + ret == MBEDTLS_ERR_CIPHER_FEATURE_UNAVAILABLE) && + cipher_type == MBEDTLS_CIPHER_AES_192_ECB) { + if (verbose != 0) { + mbedtls_printf("skipped\n"); + } goto next_test; } - if( verbose != 0 ) - mbedtls_printf( "test execution failed\n" ); + if (verbose != 0) { + mbedtls_printf("test execution failed\n"); + } goto cleanup; } - ret = cmac_generate_subkeys( &ctx, K1, K2 ); - if( ret != 0 ) - { - if( verbose != 0 ) - mbedtls_printf( "failed\n" ); + ret = cmac_generate_subkeys(&ctx, K1, K2); + if (ret != 0) { + if (verbose != 0) { + mbedtls_printf("failed\n"); + } goto cleanup; } - if( ( ret = memcmp( K1, subkeys, block_size ) ) != 0 || - ( ret = memcmp( K2, &subkeys[block_size], block_size ) ) != 0 ) - { - if( verbose != 0 ) - mbedtls_printf( "failed\n" ); + if ((ret = memcmp(K1, subkeys, block_size)) != 0 || + (ret = memcmp(K2, &subkeys[block_size], block_size)) != 0) { + if (verbose != 0) { + mbedtls_printf("failed\n"); + } goto cleanup; } - if( verbose != 0 ) - mbedtls_printf( "passed\n" ); + if (verbose != 0) { + mbedtls_printf("passed\n"); + } next_test: - mbedtls_cipher_free( &ctx ); + mbedtls_cipher_free(&ctx); } ret = 0; goto exit; cleanup: - mbedtls_cipher_free( &ctx ); + mbedtls_cipher_free(&ctx); exit: - return( ret ); + return ret; } -static int cmac_test_wth_cipher( int verbose, - const char* testname, - const unsigned char* key, - int keybits, - const unsigned char* messages, - const unsigned int message_lengths[4], - const unsigned char* expected_result, - mbedtls_cipher_type_t cipher_type, - int block_size, - int num_tests ) +static int cmac_test_wth_cipher(int verbose, + const char *testname, + const unsigned char *key, + int keybits, + const unsigned char *messages, + const unsigned int message_lengths[4], + const unsigned char *expected_result, + mbedtls_cipher_type_t cipher_type, + int block_size, + int num_tests) { const mbedtls_cipher_info_t *cipher_info; int i, ret = 0; unsigned char output[MBEDTLS_CIPHER_BLKSIZE_MAX]; - cipher_info = mbedtls_cipher_info_from_type( cipher_type ); - if( cipher_info == NULL ) - { + cipher_info = mbedtls_cipher_info_from_type(cipher_type); + if (cipher_info == NULL) { /* Failing at this point must be due to a build issue */ ret = MBEDTLS_ERR_CIPHER_FEATURE_UNAVAILABLE; goto exit; } - for( i = 0; i < num_tests; i++ ) - { - if( verbose != 0 ) - mbedtls_printf( " %s CMAC #%d: ", testname, i + 1 ); + for (i = 0; i < num_tests; i++) { + if (verbose != 0) { + mbedtls_printf(" %s CMAC #%d: ", testname, i + 1); + } - if( ( ret = mbedtls_cipher_cmac( cipher_info, key, keybits, messages, - message_lengths[i], output ) ) != 0 ) - { + if ((ret = mbedtls_cipher_cmac(cipher_info, key, keybits, messages, + message_lengths[i], output)) != 0) { /* When CMAC is implemented by an alternative implementation, or * the underlying primitive itself is implemented alternatively, * AES-192 and/or 3DES may be unavailable. This should not cause * the selftest function to fail. */ - if( ( ret == MBEDTLS_ERR_PLATFORM_FEATURE_UNSUPPORTED || - ret == MBEDTLS_ERR_CIPHER_FEATURE_UNAVAILABLE ) && - ( cipher_type == MBEDTLS_CIPHER_AES_192_ECB || - cipher_type == MBEDTLS_CIPHER_DES_EDE3_ECB ) ) { - if( verbose != 0 ) - mbedtls_printf( "skipped\n" ); + if ((ret == MBEDTLS_ERR_PLATFORM_FEATURE_UNSUPPORTED || + ret == MBEDTLS_ERR_CIPHER_FEATURE_UNAVAILABLE) && + (cipher_type == MBEDTLS_CIPHER_AES_192_ECB || + cipher_type == MBEDTLS_CIPHER_DES_EDE3_ECB)) { + if (verbose != 0) { + mbedtls_printf("skipped\n"); + } continue; } - if( verbose != 0 ) - mbedtls_printf( "failed\n" ); + if (verbose != 0) { + mbedtls_printf("failed\n"); + } goto exit; } - if( ( ret = memcmp( output, &expected_result[i * block_size], block_size ) ) != 0 ) - { - if( verbose != 0 ) - mbedtls_printf( "failed\n" ); + if ((ret = memcmp(output, &expected_result[i * block_size], block_size)) != 0) { + if (verbose != 0) { + mbedtls_printf("failed\n"); + } goto exit; } - if( verbose != 0 ) - mbedtls_printf( "passed\n" ); + if (verbose != 0) { + mbedtls_printf("passed\n"); + } } ret = 0; exit: - return( ret ); + return ret; } #if defined(MBEDTLS_AES_C) -static int test_aes128_cmac_prf( int verbose ) +static int test_aes128_cmac_prf(int verbose) { int i; int ret = MBEDTLS_ERR_ERROR_CORRUPTION_DETECTED; unsigned char output[MBEDTLS_AES_BLOCK_SIZE]; - for( i = 0; i < NB_PRF_TESTS; i++ ) - { - mbedtls_printf( " AES CMAC 128 PRF #%d: ", i ); - ret = mbedtls_aes_cmac_prf_128( PRFK, PRFKlen[i], PRFM, 20, output ); - if( ret != 0 || - memcmp( output, PRFT[i], MBEDTLS_AES_BLOCK_SIZE ) != 0 ) - { + for (i = 0; i < NB_PRF_TESTS; i++) { + mbedtls_printf(" AES CMAC 128 PRF #%d: ", i); + ret = mbedtls_aes_cmac_prf_128(PRFK, PRFKlen[i], PRFM, 20, output); + if (ret != 0 || + memcmp(output, PRFT[i], MBEDTLS_AES_BLOCK_SIZE) != 0) { - if( verbose != 0 ) - mbedtls_printf( "failed\n" ); + if (verbose != 0) { + mbedtls_printf("failed\n"); + } - return( ret ); - } - else if( verbose != 0 ) - { - mbedtls_printf( "passed\n" ); + return ret; + } else if (verbose != 0) { + mbedtls_printf("passed\n"); } } - return( ret ); + return ret; } #endif /* MBEDTLS_AES_C */ -int mbedtls_cmac_self_test( int verbose ) +int mbedtls_cmac_self_test(int verbose) { int ret = MBEDTLS_ERR_ERROR_CORRUPTION_DETECTED; #if defined(MBEDTLS_AES_C) /* AES-128 */ - if( ( ret = cmac_test_subkeys( verbose, - "AES 128", - aes_128_key, - 128, - (const unsigned char*)aes_128_subkeys, - MBEDTLS_CIPHER_AES_128_ECB, - MBEDTLS_AES_BLOCK_SIZE, - NB_CMAC_TESTS_PER_KEY ) ) != 0 ) - { - return( ret ); + if ((ret = cmac_test_subkeys(verbose, + "AES 128", + aes_128_key, + 128, + (const unsigned char *) aes_128_subkeys, + MBEDTLS_CIPHER_AES_128_ECB, + MBEDTLS_AES_BLOCK_SIZE, + NB_CMAC_TESTS_PER_KEY)) != 0) { + return ret; } - if( ( ret = cmac_test_wth_cipher( verbose, - "AES 128", - aes_128_key, - 128, - test_message, - aes_message_lengths, - (const unsigned char*)aes_128_expected_result, - MBEDTLS_CIPHER_AES_128_ECB, - MBEDTLS_AES_BLOCK_SIZE, - NB_CMAC_TESTS_PER_KEY ) ) != 0 ) - { - return( ret ); + if ((ret = cmac_test_wth_cipher(verbose, + "AES 128", + aes_128_key, + 128, + test_message, + aes_message_lengths, + (const unsigned char *) aes_128_expected_result, + MBEDTLS_CIPHER_AES_128_ECB, + MBEDTLS_AES_BLOCK_SIZE, + NB_CMAC_TESTS_PER_KEY)) != 0) { + return ret; } /* AES-192 */ - if( ( ret = cmac_test_subkeys( verbose, - "AES 192", - aes_192_key, - 192, - (const unsigned char*)aes_192_subkeys, - MBEDTLS_CIPHER_AES_192_ECB, - MBEDTLS_AES_BLOCK_SIZE, - NB_CMAC_TESTS_PER_KEY ) ) != 0 ) - { - return( ret ); + if ((ret = cmac_test_subkeys(verbose, + "AES 192", + aes_192_key, + 192, + (const unsigned char *) aes_192_subkeys, + MBEDTLS_CIPHER_AES_192_ECB, + MBEDTLS_AES_BLOCK_SIZE, + NB_CMAC_TESTS_PER_KEY)) != 0) { + return ret; } - if( ( ret = cmac_test_wth_cipher( verbose, - "AES 192", - aes_192_key, - 192, - test_message, - aes_message_lengths, - (const unsigned char*)aes_192_expected_result, - MBEDTLS_CIPHER_AES_192_ECB, - MBEDTLS_AES_BLOCK_SIZE, - NB_CMAC_TESTS_PER_KEY ) ) != 0 ) - { - return( ret ); + if ((ret = cmac_test_wth_cipher(verbose, + "AES 192", + aes_192_key, + 192, + test_message, + aes_message_lengths, + (const unsigned char *) aes_192_expected_result, + MBEDTLS_CIPHER_AES_192_ECB, + MBEDTLS_AES_BLOCK_SIZE, + NB_CMAC_TESTS_PER_KEY)) != 0) { + return ret; } /* AES-256 */ - if( ( ret = cmac_test_subkeys( verbose, - "AES 256", - aes_256_key, - 256, - (const unsigned char*)aes_256_subkeys, - MBEDTLS_CIPHER_AES_256_ECB, - MBEDTLS_AES_BLOCK_SIZE, - NB_CMAC_TESTS_PER_KEY ) ) != 0 ) - { - return( ret ); + if ((ret = cmac_test_subkeys(verbose, + "AES 256", + aes_256_key, + 256, + (const unsigned char *) aes_256_subkeys, + MBEDTLS_CIPHER_AES_256_ECB, + MBEDTLS_AES_BLOCK_SIZE, + NB_CMAC_TESTS_PER_KEY)) != 0) { + return ret; } - if( ( ret = cmac_test_wth_cipher ( verbose, - "AES 256", - aes_256_key, - 256, - test_message, - aes_message_lengths, - (const unsigned char*)aes_256_expected_result, - MBEDTLS_CIPHER_AES_256_ECB, - MBEDTLS_AES_BLOCK_SIZE, - NB_CMAC_TESTS_PER_KEY ) ) != 0 ) - { - return( ret ); + if ((ret = cmac_test_wth_cipher(verbose, + "AES 256", + aes_256_key, + 256, + test_message, + aes_message_lengths, + (const unsigned char *) aes_256_expected_result, + MBEDTLS_CIPHER_AES_256_ECB, + MBEDTLS_AES_BLOCK_SIZE, + NB_CMAC_TESTS_PER_KEY)) != 0) { + return ret; } #endif /* MBEDTLS_AES_C */ #if defined(MBEDTLS_DES_C) /* 3DES 2 key */ - if( ( ret = cmac_test_subkeys( verbose, - "3DES 2 key", - des3_2key_key, - 192, - (const unsigned char*)des3_2key_subkeys, - MBEDTLS_CIPHER_DES_EDE3_ECB, - MBEDTLS_DES3_BLOCK_SIZE, - NB_CMAC_TESTS_PER_KEY ) ) != 0 ) - { - return( ret ); + if ((ret = cmac_test_subkeys(verbose, + "3DES 2 key", + des3_2key_key, + 192, + (const unsigned char *) des3_2key_subkeys, + MBEDTLS_CIPHER_DES_EDE3_ECB, + MBEDTLS_DES3_BLOCK_SIZE, + NB_CMAC_TESTS_PER_KEY)) != 0) { + return ret; } - if( ( ret = cmac_test_wth_cipher( verbose, - "3DES 2 key", - des3_2key_key, - 192, - test_message, - des3_message_lengths, - (const unsigned char*)des3_2key_expected_result, - MBEDTLS_CIPHER_DES_EDE3_ECB, - MBEDTLS_DES3_BLOCK_SIZE, - NB_CMAC_TESTS_PER_KEY ) ) != 0 ) - { - return( ret ); + if ((ret = cmac_test_wth_cipher(verbose, + "3DES 2 key", + des3_2key_key, + 192, + test_message, + des3_message_lengths, + (const unsigned char *) des3_2key_expected_result, + MBEDTLS_CIPHER_DES_EDE3_ECB, + MBEDTLS_DES3_BLOCK_SIZE, + NB_CMAC_TESTS_PER_KEY)) != 0) { + return ret; } /* 3DES 3 key */ - if( ( ret = cmac_test_subkeys( verbose, - "3DES 3 key", - des3_3key_key, - 192, - (const unsigned char*)des3_3key_subkeys, - MBEDTLS_CIPHER_DES_EDE3_ECB, - MBEDTLS_DES3_BLOCK_SIZE, - NB_CMAC_TESTS_PER_KEY ) ) != 0 ) - { - return( ret ); + if ((ret = cmac_test_subkeys(verbose, + "3DES 3 key", + des3_3key_key, + 192, + (const unsigned char *) des3_3key_subkeys, + MBEDTLS_CIPHER_DES_EDE3_ECB, + MBEDTLS_DES3_BLOCK_SIZE, + NB_CMAC_TESTS_PER_KEY)) != 0) { + return ret; } - if( ( ret = cmac_test_wth_cipher( verbose, - "3DES 3 key", - des3_3key_key, - 192, - test_message, - des3_message_lengths, - (const unsigned char*)des3_3key_expected_result, - MBEDTLS_CIPHER_DES_EDE3_ECB, - MBEDTLS_DES3_BLOCK_SIZE, - NB_CMAC_TESTS_PER_KEY ) ) != 0 ) - { - return( ret ); + if ((ret = cmac_test_wth_cipher(verbose, + "3DES 3 key", + des3_3key_key, + 192, + test_message, + des3_message_lengths, + (const unsigned char *) des3_3key_expected_result, + MBEDTLS_CIPHER_DES_EDE3_ECB, + MBEDTLS_DES3_BLOCK_SIZE, + NB_CMAC_TESTS_PER_KEY)) != 0) { + return ret; } #endif /* MBEDTLS_DES_C */ #if defined(MBEDTLS_AES_C) - if( ( ret = test_aes128_cmac_prf( verbose ) ) != 0 ) - return( ret ); + if ((ret = test_aes128_cmac_prf(verbose)) != 0) { + return ret; + } #endif /* MBEDTLS_AES_C */ - if( verbose != 0 ) - mbedtls_printf( "\n" ); + if (verbose != 0) { + mbedtls_printf("\n"); + } - return( 0 ); + return 0; } #endif /* MBEDTLS_SELF_TEST */ diff --git a/ra/fsp/src/rm_psa_crypto/ctr_drbg_alt.c b/ra/fsp/src/rm_psa_crypto/ctr_drbg_alt.c index 4aa76c14f..d739e7de9 100644 --- a/ra/fsp/src/rm_psa_crypto/ctr_drbg_alt.c +++ b/ra/fsp/src/rm_psa_crypto/ctr_drbg_alt.c @@ -38,14 +38,7 @@ #include <stdio.h> #endif -#if defined(MBEDTLS_PLATFORM_C) #include "mbedtls/platform.h" -#endif - -#if defined(MBEDTLS_SELF_TEST) && !defined(MBEDTLS_PLATFORM_C) -#include <stdio.h> -#define mbedtls_printf printf -#endif /* MBEDTLS_SELF_TEST */ /* Macros from mbedtls/aes.h */ #define MBEDTLS_AES_ENCRYPT 1 /**< AES encryption. */ @@ -72,9 +65,10 @@ int ferror (FILE * f) /* * CTR_DRBG context initialization */ -void mbedtls_ctr_drbg_init( mbedtls_ctr_drbg_context *ctx ) +void mbedtls_ctr_drbg_init(mbedtls_ctr_drbg_context *ctx) { - memset( ctx, 0, sizeof( mbedtls_ctr_drbg_context ) ); + memset(ctx, 0, sizeof(mbedtls_ctr_drbg_context)); + mbedtls_aes_init(&ctx->aes_ctx); /* Indicate that the entropy nonce length is not set explicitly. * See mbedtls_ctr_drbg_set_nonce_len(). */ ctx->reseed_counter = -1; @@ -84,64 +78,67 @@ void mbedtls_ctr_drbg_init( mbedtls_ctr_drbg_context *ctx ) #endif } -void mbedtls_ctr_drbg_free( mbedtls_ctr_drbg_context *ctx ) +void mbedtls_ctr_drbg_free(mbedtls_ctr_drbg_context *ctx) { - if( ctx == NULL ) + if (ctx == NULL) { return; + } #if defined(MBEDTLS_THREADING_C) - mbedtls_mutex_free( &ctx->mutex ); + mbedtls_mutex_free(&ctx->mutex); #endif - mbedtls_aes_free( &ctx->aes_ctx ); - mbedtls_platform_zeroize( ctx, sizeof( mbedtls_ctr_drbg_context ) ); + mbedtls_aes_free(&ctx->aes_ctx); + mbedtls_platform_zeroize(ctx, sizeof(mbedtls_ctr_drbg_context)); } -void mbedtls_ctr_drbg_set_prediction_resistance( mbedtls_ctr_drbg_context *ctx, - int resistance ) +void mbedtls_ctr_drbg_set_prediction_resistance(mbedtls_ctr_drbg_context *ctx, + int resistance) { ctx->prediction_resistance = resistance; } -void mbedtls_ctr_drbg_set_entropy_len( mbedtls_ctr_drbg_context *ctx, - size_t len ) +void mbedtls_ctr_drbg_set_entropy_len(mbedtls_ctr_drbg_context *ctx, + size_t len) { ctx->entropy_len = len; } -int mbedtls_ctr_drbg_set_nonce_len( mbedtls_ctr_drbg_context *ctx, - size_t len ) +int mbedtls_ctr_drbg_set_nonce_len(mbedtls_ctr_drbg_context *ctx, + size_t len) { /* If mbedtls_ctr_drbg_seed() has already been called, it's * too late. Return the error code that's closest to making sense. */ - if( ctx->f_entropy != NULL ) - return( MBEDTLS_ERR_CTR_DRBG_ENTROPY_SOURCE_FAILED ); + if (ctx->f_entropy != NULL) { + return MBEDTLS_ERR_CTR_DRBG_ENTROPY_SOURCE_FAILED; + } + + if (len > MBEDTLS_CTR_DRBG_MAX_SEED_INPUT) { + return MBEDTLS_ERR_CTR_DRBG_INPUT_TOO_BIG; + } - if( len > MBEDTLS_CTR_DRBG_MAX_SEED_INPUT ) - return( MBEDTLS_ERR_CTR_DRBG_INPUT_TOO_BIG ); -#if SIZE_MAX > INT_MAX /* This shouldn't be an issue because * MBEDTLS_CTR_DRBG_MAX_SEED_INPUT < INT_MAX in any sensible * configuration, but make sure anyway. */ - if( len > INT_MAX ) - return( MBEDTLS_ERR_CTR_DRBG_INPUT_TOO_BIG ); -#endif + if (len > INT_MAX) { + return MBEDTLS_ERR_CTR_DRBG_INPUT_TOO_BIG; + } /* For backward compatibility with Mbed TLS <= 2.19, store the * entropy nonce length in a field that already exists, but isn't * used until after the initial seeding. */ /* Due to the capping of len above, the value fits in an int. */ ctx->reseed_counter = (int) len; - return( 0 ); + return 0; } -void mbedtls_ctr_drbg_set_reseed_interval( mbedtls_ctr_drbg_context *ctx, - int interval ) +void mbedtls_ctr_drbg_set_reseed_interval(mbedtls_ctr_drbg_context *ctx, + int interval) { ctx->reseed_interval = interval; } -static int block_cipher_df( unsigned char *output, - const unsigned char *data, size_t data_len ) +static int block_cipher_df(unsigned char *output, + const unsigned char *data, size_t data_len) { unsigned char buf[MBEDTLS_CTR_DRBG_MAX_SEED_INPUT + MBEDTLS_CTR_DRBG_BLOCKSIZE + 16]; @@ -155,12 +152,13 @@ static int block_cipher_df( unsigned char *output, int i, j; size_t buf_len, use_len; - if( data_len > MBEDTLS_CTR_DRBG_MAX_SEED_INPUT ) - return( MBEDTLS_ERR_CTR_DRBG_INPUT_TOO_BIG ); + if (data_len > MBEDTLS_CTR_DRBG_MAX_SEED_INPUT) { + return MBEDTLS_ERR_CTR_DRBG_INPUT_TOO_BIG; + } - memset( buf, 0, MBEDTLS_CTR_DRBG_MAX_SEED_INPUT + - MBEDTLS_CTR_DRBG_BLOCKSIZE + 16 ); - mbedtls_aes_init( &aes_ctx ); + memset(buf, 0, MBEDTLS_CTR_DRBG_MAX_SEED_INPUT + + MBEDTLS_CTR_DRBG_BLOCKSIZE + 16); + mbedtls_aes_init(&aes_ctx); /* * Construct IV (16 bytes) and S in buffer @@ -181,40 +179,36 @@ static int block_cipher_df( unsigned char *output, buf_len = MBEDTLS_CTR_DRBG_BLOCKSIZE + 8 + data_len + 1; - for( i = 0; i < MBEDTLS_CTR_DRBG_KEYSIZE; i++ ) + for (i = 0; i < MBEDTLS_CTR_DRBG_KEYSIZE; i++) { key[i] = (uint8_t) i; + } - if( ( ret = mbedtls_aes_setkey_enc( &aes_ctx, key, - MBEDTLS_CTR_DRBG_KEYBITS ) ) != 0 ) - { + if ((ret = mbedtls_aes_setkey_enc(&aes_ctx, key, + MBEDTLS_CTR_DRBG_KEYBITS)) != 0) { goto exit; } /* * Reduce data to MBEDTLS_CTR_DRBG_SEEDLEN bytes of data */ - for( j = 0; j < MBEDTLS_CTR_DRBG_SEEDLEN; j += MBEDTLS_CTR_DRBG_BLOCKSIZE ) - { + for (j = 0; j < MBEDTLS_CTR_DRBG_SEEDLEN; j += MBEDTLS_CTR_DRBG_BLOCKSIZE) { p = buf; - memset( chain, 0, MBEDTLS_CTR_DRBG_BLOCKSIZE ); + memset(chain, 0, MBEDTLS_CTR_DRBG_BLOCKSIZE); use_len = buf_len; - while( use_len > 0 ) - { - for( i = 0; i < MBEDTLS_CTR_DRBG_BLOCKSIZE; i++ ) - chain[i] ^= p[i]; + while (use_len > 0) { + mbedtls_xor(chain, chain, p, MBEDTLS_CTR_DRBG_BLOCKSIZE); p += MBEDTLS_CTR_DRBG_BLOCKSIZE; - use_len -= ( use_len >= MBEDTLS_CTR_DRBG_BLOCKSIZE ) ? + use_len -= (use_len >= MBEDTLS_CTR_DRBG_BLOCKSIZE) ? MBEDTLS_CTR_DRBG_BLOCKSIZE : use_len; - if( ( ret = mbedtls_aes_crypt_ecb( &aes_ctx, MBEDTLS_AES_ENCRYPT, - chain, chain ) ) != 0 ) - { + if ((ret = mbedtls_aes_crypt_ecb(&aes_ctx, MBEDTLS_AES_ENCRYPT, + chain, chain)) != 0) { goto exit; } } - memcpy( tmp + j, chain, MBEDTLS_CTR_DRBG_BLOCKSIZE ); + memcpy(tmp + j, chain, MBEDTLS_CTR_DRBG_BLOCKSIZE); /* * Update IV @@ -225,42 +219,38 @@ static int block_cipher_df( unsigned char *output, /* * Do final encryption with reduced data */ - if( ( ret = mbedtls_aes_setkey_enc( &aes_ctx, tmp, - MBEDTLS_CTR_DRBG_KEYBITS ) ) != 0 ) - { + if ((ret = mbedtls_aes_setkey_enc(&aes_ctx, tmp, + MBEDTLS_CTR_DRBG_KEYBITS)) != 0) { goto exit; } iv = tmp + MBEDTLS_CTR_DRBG_KEYSIZE; p = output; - for( j = 0; j < MBEDTLS_CTR_DRBG_SEEDLEN; j += MBEDTLS_CTR_DRBG_BLOCKSIZE ) - { - if( ( ret = mbedtls_aes_crypt_ecb( &aes_ctx, MBEDTLS_AES_ENCRYPT, - iv, iv ) ) != 0 ) - { + for (j = 0; j < MBEDTLS_CTR_DRBG_SEEDLEN; j += MBEDTLS_CTR_DRBG_BLOCKSIZE) { + if ((ret = mbedtls_aes_crypt_ecb(&aes_ctx, MBEDTLS_AES_ENCRYPT, + iv, iv)) != 0) { goto exit; } - memcpy( p, iv, MBEDTLS_CTR_DRBG_BLOCKSIZE ); + memcpy(p, iv, MBEDTLS_CTR_DRBG_BLOCKSIZE); p += MBEDTLS_CTR_DRBG_BLOCKSIZE; } exit: - mbedtls_aes_free( &aes_ctx ); + mbedtls_aes_free(&aes_ctx); /* - * tidy up the stack - */ - mbedtls_platform_zeroize( buf, sizeof( buf ) ); - mbedtls_platform_zeroize( tmp, sizeof( tmp ) ); - mbedtls_platform_zeroize( key, sizeof( key ) ); - mbedtls_platform_zeroize( chain, sizeof( chain ) ); - if( 0 != ret ) - { + * tidy up the stack + */ + mbedtls_platform_zeroize(buf, sizeof(buf)); + mbedtls_platform_zeroize(tmp, sizeof(tmp)); + mbedtls_platform_zeroize(key, sizeof(key)); + mbedtls_platform_zeroize(chain, sizeof(chain)); + if (0 != ret) { /* - * wipe partial seed from memory - */ - mbedtls_platform_zeroize( output, MBEDTLS_CTR_DRBG_SEEDLEN ); + * wipe partial seed from memory + */ + mbedtls_platform_zeroize(output, MBEDTLS_CTR_DRBG_SEEDLEN); } - return( ret ); + return ret; } /* CTR_DRBG_Update (SP 800-90A §10.2.1.2) @@ -271,54 +261,54 @@ static int block_cipher_df( unsigned char *output, * ctx->aes_ctx = Key * ctx->counter = V */ -static int ctr_drbg_update_internal( mbedtls_ctr_drbg_context *ctx, - const unsigned char data[MBEDTLS_CTR_DRBG_SEEDLEN] ) +static int ctr_drbg_update_internal(mbedtls_ctr_drbg_context *ctx, + const unsigned char data[MBEDTLS_CTR_DRBG_SEEDLEN]) { unsigned char tmp[MBEDTLS_CTR_DRBG_SEEDLEN]; unsigned char *p = tmp; int i, j; int ret = 0; - memset( tmp, 0, MBEDTLS_CTR_DRBG_SEEDLEN ); + memset(tmp, 0, MBEDTLS_CTR_DRBG_SEEDLEN); - for( j = 0; j < MBEDTLS_CTR_DRBG_SEEDLEN; j += MBEDTLS_CTR_DRBG_BLOCKSIZE ) - { + for (j = 0; j < MBEDTLS_CTR_DRBG_SEEDLEN; j += MBEDTLS_CTR_DRBG_BLOCKSIZE) { /* * Increase counter */ - for( i = MBEDTLS_CTR_DRBG_BLOCKSIZE; i > 0; i-- ) - if( ++ctx->counter[i - 1] != 0 ) + for (i = MBEDTLS_CTR_DRBG_BLOCKSIZE; i > 0; i--) { + if (++ctx->counter[i - 1] != 0) { break; + } + } /* * Crypt counter block */ - if( ( ret = mbedtls_aes_crypt_ecb( &ctx->aes_ctx, MBEDTLS_AES_ENCRYPT, - ctx->counter, p ) ) != 0 ) - { + if ((ret = mbedtls_aes_crypt_ecb(&ctx->aes_ctx, MBEDTLS_AES_ENCRYPT, + ctx->counter, p)) != 0) { goto exit; } p += MBEDTLS_CTR_DRBG_BLOCKSIZE; } - for( i = 0; i < MBEDTLS_CTR_DRBG_SEEDLEN; i++ ) + for (i = 0; i < MBEDTLS_CTR_DRBG_SEEDLEN; i++) { tmp[i] ^= data[i]; + } /* * Update key and counter */ - if( ( ret = mbedtls_aes_setkey_enc( &ctx->aes_ctx, tmp, - MBEDTLS_CTR_DRBG_KEYBITS ) ) != 0 ) - { + if ((ret = mbedtls_aes_setkey_enc(&ctx->aes_ctx, tmp, + MBEDTLS_CTR_DRBG_KEYBITS)) != 0) { goto exit; } - memcpy( ctx->counter, tmp + MBEDTLS_CTR_DRBG_KEYSIZE, - MBEDTLS_CTR_DRBG_BLOCKSIZE ); + memcpy(ctx->counter, tmp + MBEDTLS_CTR_DRBG_KEYSIZE, + MBEDTLS_CTR_DRBG_BLOCKSIZE); exit: - mbedtls_platform_zeroize( tmp, sizeof( tmp ) ); - return( ret ); + mbedtls_platform_zeroize(tmp, sizeof(tmp)); + return ret; } /* CTR_DRBG_Instantiate with derivation function (SP 800-90A §10.2.1.3.2) @@ -333,24 +323,27 @@ static int ctr_drbg_update_internal( mbedtls_ctr_drbg_context *ctx, * and with outputs * ctx = initial_working_state */ -int mbedtls_ctr_drbg_update_ret( mbedtls_ctr_drbg_context *ctx, - const unsigned char *additional, - size_t add_len ) +int mbedtls_ctr_drbg_update_ret(mbedtls_ctr_drbg_context *ctx, + const unsigned char *additional, + size_t add_len) { unsigned char add_input[MBEDTLS_CTR_DRBG_SEEDLEN]; int ret = MBEDTLS_ERR_ERROR_CORRUPTION_DETECTED; - if( add_len == 0 ) - return( 0 ); + if (add_len == 0) { + return 0; + } - if( ( ret = block_cipher_df( add_input, additional, add_len ) ) != 0 ) + if ((ret = block_cipher_df(add_input, additional, add_len)) != 0) { goto exit; - if( ( ret = ctr_drbg_update_internal( ctx, add_input ) ) != 0 ) + } + if ((ret = ctr_drbg_update_internal(ctx, add_input)) != 0) { goto exit; + } exit: - mbedtls_platform_zeroize( add_input, sizeof( add_input ) ); - return( ret ); + mbedtls_platform_zeroize(add_input, sizeof(add_input)); + return ret; } #if !defined(MBEDTLS_DEPRECATED_REMOVED) @@ -379,66 +372,67 @@ void mbedtls_ctr_drbg_update( mbedtls_ctr_drbg_context *ctx, * and with output * ctx contains new_working_state */ -static int mbedtls_ctr_drbg_reseed_internal( mbedtls_ctr_drbg_context *ctx, - const unsigned char *additional, - size_t len, - size_t nonce_len ) +static int mbedtls_ctr_drbg_reseed_internal(mbedtls_ctr_drbg_context *ctx, + const unsigned char *additional, + size_t len, + size_t nonce_len) { unsigned char seed[MBEDTLS_CTR_DRBG_MAX_SEED_INPUT]; size_t seedlen = 0; int ret = MBEDTLS_ERR_ERROR_CORRUPTION_DETECTED; - if( ctx->entropy_len > MBEDTLS_CTR_DRBG_MAX_SEED_INPUT ) - return( MBEDTLS_ERR_CTR_DRBG_INPUT_TOO_BIG ); - if( nonce_len > MBEDTLS_CTR_DRBG_MAX_SEED_INPUT - ctx->entropy_len ) - return( MBEDTLS_ERR_CTR_DRBG_INPUT_TOO_BIG ); - if( len > MBEDTLS_CTR_DRBG_MAX_SEED_INPUT - ctx->entropy_len - nonce_len ) - return( MBEDTLS_ERR_CTR_DRBG_INPUT_TOO_BIG ); + if (ctx->entropy_len > MBEDTLS_CTR_DRBG_MAX_SEED_INPUT) { + return MBEDTLS_ERR_CTR_DRBG_INPUT_TOO_BIG; + } + if (nonce_len > MBEDTLS_CTR_DRBG_MAX_SEED_INPUT - ctx->entropy_len) { + return MBEDTLS_ERR_CTR_DRBG_INPUT_TOO_BIG; + } + if (len > MBEDTLS_CTR_DRBG_MAX_SEED_INPUT - ctx->entropy_len - nonce_len) { + return MBEDTLS_ERR_CTR_DRBG_INPUT_TOO_BIG; + } - memset( seed, 0, MBEDTLS_CTR_DRBG_MAX_SEED_INPUT ); + memset(seed, 0, MBEDTLS_CTR_DRBG_MAX_SEED_INPUT); /* Gather entropy_len bytes of entropy to seed state. */ - if( 0 != ctx->f_entropy( ctx->p_entropy, seed, ctx->entropy_len ) ) - { - return( MBEDTLS_ERR_CTR_DRBG_ENTROPY_SOURCE_FAILED ); + if (0 != ctx->f_entropy(ctx->p_entropy, seed, ctx->entropy_len)) { + return MBEDTLS_ERR_CTR_DRBG_ENTROPY_SOURCE_FAILED; } seedlen += ctx->entropy_len; /* Gather entropy for a nonce if requested. */ - if( nonce_len != 0 ) - { - if( 0 != ctx->f_entropy( ctx->p_entropy, seed, nonce_len ) ) - { - return( MBEDTLS_ERR_CTR_DRBG_ENTROPY_SOURCE_FAILED ); + if (nonce_len != 0) { + if (0 != ctx->f_entropy(ctx->p_entropy, seed, nonce_len)) { + return MBEDTLS_ERR_CTR_DRBG_ENTROPY_SOURCE_FAILED; } seedlen += nonce_len; } /* Add additional data if provided. */ - if( additional != NULL && len != 0 ) - { - memcpy( seed + seedlen, additional, len ); + if (additional != NULL && len != 0) { + memcpy(seed + seedlen, additional, len); seedlen += len; } /* Reduce to 384 bits. */ - if( ( ret = block_cipher_df( seed, seed, seedlen ) ) != 0 ) + if ((ret = block_cipher_df(seed, seed, seedlen)) != 0) { goto exit; + } /* Update state. */ - if( ( ret = ctr_drbg_update_internal( ctx, seed ) ) != 0 ) + if ((ret = ctr_drbg_update_internal(ctx, seed)) != 0) { goto exit; + } ctx->reseed_counter = 1; exit: - mbedtls_platform_zeroize( seed, sizeof( seed ) ); - return( ret ); + mbedtls_platform_zeroize(seed, sizeof(seed)); + return ret; } -int mbedtls_ctr_drbg_reseed( mbedtls_ctr_drbg_context *ctx, - const unsigned char *additional, size_t len ) +int mbedtls_ctr_drbg_reseed(mbedtls_ctr_drbg_context *ctx, + const unsigned char *additional, size_t len) { - return( mbedtls_ctr_drbg_reseed_internal( ctx, additional, len, 0 ) ); + return mbedtls_ctr_drbg_reseed_internal(ctx, additional, len, 0); } /* Return a "good" nonce length for CTR_DRBG. The chosen nonce length @@ -446,12 +440,13 @@ int mbedtls_ctr_drbg_reseed( mbedtls_ctr_drbg_context *ctx, * size and entropy length. If there is enough entropy in the initial * call to the entropy function to serve as both the entropy input and * the nonce, don't make a second call to get a nonce. */ -static size_t good_nonce_len( size_t entropy_len ) +static size_t good_nonce_len(size_t entropy_len) { - if( entropy_len >= MBEDTLS_CTR_DRBG_KEYSIZE * 3 / 2 ) - return( 0 ); - else - return( ( entropy_len + 1 ) / 2 ); + if (entropy_len >= MBEDTLS_CTR_DRBG_KEYSIZE * 3 / 2) { + return 0; + } else { + return (entropy_len + 1) / 2; + } } /* CTR_DRBG_Instantiate with derivation function (SP 800-90A §10.2.1.3.2) @@ -465,49 +460,46 @@ static size_t good_nonce_len( size_t entropy_len ) * and with outputs * ctx = initial_working_state */ -int mbedtls_ctr_drbg_seed( mbedtls_ctr_drbg_context *ctx, - int (*f_entropy)(void *, unsigned char *, size_t), - void *p_entropy, - const unsigned char *custom, - size_t len ) +int mbedtls_ctr_drbg_seed(mbedtls_ctr_drbg_context *ctx, + int (*f_entropy)(void *, unsigned char *, size_t), + void *p_entropy, + const unsigned char *custom, + size_t len) { int ret = MBEDTLS_ERR_ERROR_CORRUPTION_DETECTED; unsigned char key[MBEDTLS_CTR_DRBG_KEYSIZE]; size_t nonce_len; - memset( key, 0, MBEDTLS_CTR_DRBG_KEYSIZE ); - - mbedtls_aes_init( &ctx->aes_ctx ); + memset(key, 0, MBEDTLS_CTR_DRBG_KEYSIZE); ctx->f_entropy = f_entropy; ctx->p_entropy = p_entropy; - if( ctx->entropy_len == 0 ) + if (ctx->entropy_len == 0) { ctx->entropy_len = MBEDTLS_CTR_DRBG_ENTROPY_LEN; + } /* ctx->reseed_counter contains the desired amount of entropy to * grab for a nonce (see mbedtls_ctr_drbg_set_nonce_len()). * If it's -1, indicating that the entropy nonce length was not set * explicitly, use a sufficiently large nonce for security. */ - nonce_len = ( ctx->reseed_counter >= 0 ? - (size_t) ctx->reseed_counter : - good_nonce_len( ctx->entropy_len ) ); + nonce_len = (ctx->reseed_counter >= 0 ? + (size_t) ctx->reseed_counter : + good_nonce_len(ctx->entropy_len)); ctx->reseed_interval = MBEDTLS_CTR_DRBG_RESEED_INTERVAL; /* Initialize with an empty key. */ - if( ( ret = mbedtls_aes_setkey_enc( &ctx->aes_ctx, key, - MBEDTLS_CTR_DRBG_KEYBITS ) ) != 0 ) - { - return( ret ); + if ((ret = mbedtls_aes_setkey_enc(&ctx->aes_ctx, key, + MBEDTLS_CTR_DRBG_KEYBITS)) != 0) { + return ret; } /* Do the initial seeding. */ - if( ( ret = mbedtls_ctr_drbg_reseed_internal( ctx, custom, len, - nonce_len ) ) != 0 ) - { - return( ret ); + if ((ret = mbedtls_ctr_drbg_reseed_internal(ctx, custom, len, + nonce_len)) != 0) { + return ret; } - return( 0 ); + return 0; } /* CTR_DRBG_Generate with derivation function (SP 800-90A §10.2.1.5.2) @@ -529,9 +521,9 @@ int mbedtls_ctr_drbg_seed( mbedtls_ctr_drbg_context *ctx, * returned_bits = output[:output_len] * ctx contains new_working_state */ -int mbedtls_ctr_drbg_random_with_add( void *p_rng, - unsigned char *output, size_t output_len, - const unsigned char *additional, size_t add_len ) +int mbedtls_ctr_drbg_random_with_add(void *p_rng, + unsigned char *output, size_t output_len, + const unsigned char *additional, size_t add_len) { int ret = 0; mbedtls_ctr_drbg_context *ctx = (mbedtls_ctr_drbg_context *) p_rng; @@ -541,165 +533,169 @@ int mbedtls_ctr_drbg_random_with_add( void *p_rng, int i; size_t use_len; - if( output_len > MBEDTLS_CTR_DRBG_MAX_REQUEST ) - return( MBEDTLS_ERR_CTR_DRBG_REQUEST_TOO_BIG ); + if (output_len > MBEDTLS_CTR_DRBG_MAX_REQUEST) { + return MBEDTLS_ERR_CTR_DRBG_REQUEST_TOO_BIG; + } - if( add_len > MBEDTLS_CTR_DRBG_MAX_INPUT ) - return( MBEDTLS_ERR_CTR_DRBG_INPUT_TOO_BIG ); + if (add_len > MBEDTLS_CTR_DRBG_MAX_INPUT) { + return MBEDTLS_ERR_CTR_DRBG_INPUT_TOO_BIG; + } - memset( add_input, 0, MBEDTLS_CTR_DRBG_SEEDLEN ); + memset(add_input, 0, MBEDTLS_CTR_DRBG_SEEDLEN); - if( ctx->reseed_counter > ctx->reseed_interval || - ctx->prediction_resistance ) - { - if( ( ret = mbedtls_ctr_drbg_reseed( ctx, additional, add_len ) ) != 0 ) - { - return( ret ); + if (ctx->reseed_counter > ctx->reseed_interval || + ctx->prediction_resistance) { + if ((ret = mbedtls_ctr_drbg_reseed(ctx, additional, add_len)) != 0) { + return ret; } add_len = 0; } - if( add_len > 0 ) - { - if( ( ret = block_cipher_df( add_input, additional, add_len ) ) != 0 ) + if (add_len > 0) { + if ((ret = block_cipher_df(add_input, additional, add_len)) != 0) { goto exit; - if( ( ret = ctr_drbg_update_internal( ctx, add_input ) ) != 0 ) + } + if ((ret = ctr_drbg_update_internal(ctx, add_input)) != 0) { goto exit; + } } - while( output_len > 0 ) - { + while (output_len > 0) { /* * Increase counter */ - for( i = MBEDTLS_CTR_DRBG_BLOCKSIZE; i > 0; i-- ) - if( ++ctx->counter[i - 1] != 0 ) + for (i = MBEDTLS_CTR_DRBG_BLOCKSIZE; i > 0; i--) { + if (++ctx->counter[i - 1] != 0) { break; + } + } /* * Crypt counter block */ - if( ( ret = mbedtls_aes_crypt_ecb( &ctx->aes_ctx, MBEDTLS_AES_ENCRYPT, - ctx->counter, tmp ) ) != 0 ) - { + if ((ret = mbedtls_aes_crypt_ecb(&ctx->aes_ctx, MBEDTLS_AES_ENCRYPT, + ctx->counter, tmp)) != 0) { goto exit; } - use_len = ( output_len > MBEDTLS_CTR_DRBG_BLOCKSIZE ) + use_len = (output_len > MBEDTLS_CTR_DRBG_BLOCKSIZE) ? MBEDTLS_CTR_DRBG_BLOCKSIZE : output_len; /* * Copy random block to destination */ - memcpy( p, tmp, use_len ); + memcpy(p, tmp, use_len); p += use_len; output_len -= use_len; } - if( ( ret = ctr_drbg_update_internal( ctx, add_input ) ) != 0 ) + if ((ret = ctr_drbg_update_internal(ctx, add_input)) != 0) { goto exit; + } ctx->reseed_counter++; exit: - mbedtls_platform_zeroize( add_input, sizeof( add_input ) ); - mbedtls_platform_zeroize( tmp, sizeof( tmp ) ); - return( ret ); + mbedtls_platform_zeroize(add_input, sizeof(add_input)); + mbedtls_platform_zeroize(tmp, sizeof(tmp)); + return ret; } -int mbedtls_ctr_drbg_random( void *p_rng, unsigned char *output, - size_t output_len ) +int mbedtls_ctr_drbg_random(void *p_rng, unsigned char *output, + size_t output_len) { int ret = MBEDTLS_ERR_ERROR_CORRUPTION_DETECTED; mbedtls_ctr_drbg_context *ctx = (mbedtls_ctr_drbg_context *) p_rng; #if defined(MBEDTLS_THREADING_C) - if( ( ret = mbedtls_mutex_lock( &ctx->mutex ) ) != 0 ) - return( ret ); + if ((ret = mbedtls_mutex_lock(&ctx->mutex)) != 0) { + return ret; + } #endif - ret = mbedtls_ctr_drbg_random_with_add( ctx, output, output_len, NULL, 0 ); + ret = mbedtls_ctr_drbg_random_with_add(ctx, output, output_len, NULL, 0); #if defined(MBEDTLS_THREADING_C) - if( mbedtls_mutex_unlock( &ctx->mutex ) != 0 ) - return( MBEDTLS_ERR_THREADING_MUTEX_ERROR ); + if (mbedtls_mutex_unlock(&ctx->mutex) != 0) { + return MBEDTLS_ERR_THREADING_MUTEX_ERROR; + } #endif - return( ret ); + return ret; } #if defined(MBEDTLS_FS_IO) -int mbedtls_ctr_drbg_write_seed_file( mbedtls_ctr_drbg_context *ctx, - const char *path ) +int mbedtls_ctr_drbg_write_seed_file(mbedtls_ctr_drbg_context *ctx, + const char *path) { int ret = MBEDTLS_ERR_CTR_DRBG_FILE_IO_ERROR; FILE *f; - unsigned char buf[ MBEDTLS_CTR_DRBG_MAX_INPUT ]; + unsigned char buf[MBEDTLS_CTR_DRBG_MAX_INPUT]; - if( ( f = fopen( path, "wb" ) ) == NULL ) - return( MBEDTLS_ERR_CTR_DRBG_FILE_IO_ERROR ); + if ((f = fopen(path, "wb")) == NULL) { + return MBEDTLS_ERR_CTR_DRBG_FILE_IO_ERROR; + } /* Ensure no stdio buffering of secrets, as such buffers cannot be wiped. */ - mbedtls_setbuf( f, NULL ); + mbedtls_setbuf(f, NULL); - if( ( ret = mbedtls_ctr_drbg_random( ctx, buf, - MBEDTLS_CTR_DRBG_MAX_INPUT ) ) != 0 ) + if ((ret = mbedtls_ctr_drbg_random(ctx, buf, + MBEDTLS_CTR_DRBG_MAX_INPUT)) != 0) { goto exit; + } - if( fwrite( buf, 1, MBEDTLS_CTR_DRBG_MAX_INPUT, f ) != - MBEDTLS_CTR_DRBG_MAX_INPUT ) - { + if (fwrite(buf, 1, MBEDTLS_CTR_DRBG_MAX_INPUT, f) != + MBEDTLS_CTR_DRBG_MAX_INPUT) { ret = MBEDTLS_ERR_CTR_DRBG_FILE_IO_ERROR; - } - else - { + } else { ret = 0; } exit: - mbedtls_platform_zeroize( buf, sizeof( buf ) ); + mbedtls_platform_zeroize(buf, sizeof(buf)); - fclose( f ); - return( ret ); + fclose(f); + return ret; } -int mbedtls_ctr_drbg_update_seed_file( mbedtls_ctr_drbg_context *ctx, - const char *path ) +int mbedtls_ctr_drbg_update_seed_file(mbedtls_ctr_drbg_context *ctx, + const char *path) { int ret = 0; FILE *f = NULL; size_t n; - unsigned char buf[ MBEDTLS_CTR_DRBG_MAX_INPUT ]; + unsigned char buf[MBEDTLS_CTR_DRBG_MAX_INPUT]; unsigned char c; - if( ( f = fopen( path, "rb" ) ) == NULL ) - return( MBEDTLS_ERR_CTR_DRBG_FILE_IO_ERROR ); + if ((f = fopen(path, "rb")) == NULL) { + return MBEDTLS_ERR_CTR_DRBG_FILE_IO_ERROR; + } /* Ensure no stdio buffering of secrets, as such buffers cannot be wiped. */ - mbedtls_setbuf( f, NULL ); + mbedtls_setbuf(f, NULL); - n = fread( buf, 1, sizeof( buf ), f ); - if( fread( &c, 1, 1, f ) != 0 ) - { + n = fread(buf, 1, sizeof(buf), f); + if (fread(&c, 1, 1, f) != 0) { ret = MBEDTLS_ERR_CTR_DRBG_INPUT_TOO_BIG; goto exit; } - if( n == 0 || ferror( f ) ) - { + if (n == 0 || ferror(f)) { ret = MBEDTLS_ERR_CTR_DRBG_FILE_IO_ERROR; goto exit; } - fclose( f ); + fclose(f); f = NULL; - ret = mbedtls_ctr_drbg_update_ret( ctx, buf, n ); + ret = mbedtls_ctr_drbg_update_ret(ctx, buf, n); exit: - mbedtls_platform_zeroize( buf, sizeof( buf ) ); - if( f != NULL ) - fclose( f ); - if( ret != 0 ) - return( ret ); - return( mbedtls_ctr_drbg_write_seed_file( ctx, path ) ); + mbedtls_platform_zeroize(buf, sizeof(buf)); + if (f != NULL) { + fclose(f); + } + if (ret != 0) { + return ret; + } + return mbedtls_ctr_drbg_write_seed_file(ctx, path); } #endif /* MBEDTLS_FS_IO */ @@ -756,37 +752,39 @@ static const unsigned char result_nopr[16] = #endif /* MBEDTLS_CTR_DRBG_USE_128_BIT_KEY */ static size_t test_offset; -static int ctr_drbg_self_test_entropy( void *data, unsigned char *buf, - size_t len ) +static int ctr_drbg_self_test_entropy(void *data, unsigned char *buf, + size_t len) { const unsigned char *p = data; - memcpy( buf, p + test_offset, len ); + memcpy(buf, p + test_offset, len); test_offset += len; - return( 0 ); + return 0; } -#define CHK( c ) if( (c) != 0 ) \ - { \ - if( verbose != 0 ) \ - mbedtls_printf( "failed\n" ); \ - return( 1 ); \ - } +#define CHK(c) if ((c) != 0) \ + { \ + if (verbose != 0) \ + mbedtls_printf("failed\n"); \ + return 1; \ + } + /* * Checkup routine */ -int mbedtls_ctr_drbg_self_test( int verbose ) +int mbedtls_ctr_drbg_self_test(int verbose) { mbedtls_ctr_drbg_context ctx; unsigned char buf[16]; - mbedtls_ctr_drbg_init( &ctx ); + mbedtls_ctr_drbg_init(&ctx); /* * Based on a NIST CTR_DRBG test vector (PR = True) */ - if( verbose != 0 ) - mbedtls_printf( " CTR_DRBG (PR = TRUE) : " ); + if (verbose != 0) { + mbedtls_printf(" CTR_DRBG (PR = TRUE) : "); + } test_offset = 0; mbedtls_ctr_drbg_set_entropy_len( &ctx, 32 ); @@ -800,18 +798,20 @@ int mbedtls_ctr_drbg_self_test( int verbose ) CHK( mbedtls_ctr_drbg_random( &ctx, buf, MBEDTLS_CTR_DRBG_BLOCKSIZE ) ); CHK( memcmp( buf, result_pr, MBEDTLS_CTR_DRBG_BLOCKSIZE ) ); - mbedtls_ctr_drbg_free( &ctx ); + mbedtls_ctr_drbg_free(&ctx); - if( verbose != 0 ) - mbedtls_printf( "passed\n" ); + if (verbose != 0) { + mbedtls_printf("passed\n"); + } /* * Based on a NIST CTR_DRBG test vector (PR = FALSE) */ - if( verbose != 0 ) - mbedtls_printf( " CTR_DRBG (PR = FALSE): " ); + if (verbose != 0) { + mbedtls_printf(" CTR_DRBG (PR = FALSE): "); + } - mbedtls_ctr_drbg_init( &ctx ); + mbedtls_ctr_drbg_init(&ctx); test_offset = 0; mbedtls_ctr_drbg_set_entropy_len( &ctx, 32 ); @@ -825,15 +825,17 @@ int mbedtls_ctr_drbg_self_test( int verbose ) CHK( mbedtls_ctr_drbg_random( &ctx, buf, 16 ) ); CHK( memcmp( buf, result_nopr, 16 ) ); - mbedtls_ctr_drbg_free( &ctx ); + mbedtls_ctr_drbg_free(&ctx); - if( verbose != 0 ) - mbedtls_printf( "passed\n" ); + if (verbose != 0) { + mbedtls_printf("passed\n"); + } - if( verbose != 0 ) - mbedtls_printf( "\n" ); + if (verbose != 0) { + mbedtls_printf("\n"); + } - return( 0 ); + return 0; } #endif /* MBEDTLS_SELF_TEST */ diff --git a/ra/fsp/src/rm_psa_crypto/ecdh_alt.c b/ra/fsp/src/rm_psa_crypto/ecdh_alt.c index b932b3cff..9f552a28b 100644 --- a/ra/fsp/src/rm_psa_crypto/ecdh_alt.c +++ b/ra/fsp/src/rm_psa_crypto/ecdh_alt.c @@ -49,20 +49,20 @@ typedef mbedtls_ecdh_context mbedtls_ecdh_context_mbed; #endif static mbedtls_ecp_group_id mbedtls_ecdh_grp_id( - const mbedtls_ecdh_context *ctx ) + const mbedtls_ecdh_context *ctx) { #if defined(MBEDTLS_ECDH_LEGACY_CONTEXT) - return( ctx->grp.id ); + return ctx->grp.id; #else - return( ctx->grp_id ); + return ctx->grp_id; #endif } -int mbedtls_ecdh_can_do( mbedtls_ecp_group_id gid ) +int mbedtls_ecdh_can_do(mbedtls_ecp_group_id gid) { /* At this time, all groups support ECDH. */ (void) gid; - return( 1 ); + return 1; } #if !defined(MBEDTLS_ECDH_GEN_PUBLIC_ALT) @@ -73,39 +73,38 @@ int mbedtls_ecdh_can_do( mbedtls_ecp_group_id gid ) * the output parameter 'd' across continuation calls. This would not be * acceptable for a public function but is OK here as we control call sites. */ -static int ecdh_gen_public_restartable( mbedtls_ecp_group *grp, - mbedtls_mpi *d, mbedtls_ecp_point *Q, - int (*f_rng)(void *, unsigned char *, size_t), - void *p_rng, - mbedtls_ecp_restart_ctx *rs_ctx ) +static int ecdh_gen_public_restartable(mbedtls_ecp_group *grp, + mbedtls_mpi *d, mbedtls_ecp_point *Q, + int (*f_rng)(void *, unsigned char *, size_t), + void *p_rng, + mbedtls_ecp_restart_ctx *rs_ctx) { int ret = MBEDTLS_ERR_ERROR_CORRUPTION_DETECTED; - /* If multiplication is in progress, we already generated a privkey */ + int restarting = 0; #if defined(MBEDTLS_ECP_RESTARTABLE) - if( rs_ctx == NULL || rs_ctx->rsm == NULL ) + restarting = (rs_ctx != NULL && rs_ctx->rsm != NULL); #endif - MBEDTLS_MPI_CHK( mbedtls_ecp_gen_privkey( grp, d, f_rng, p_rng ) ); + /* If multiplication is in progress, we already generated a privkey */ + if (!restarting) { + MBEDTLS_MPI_CHK(mbedtls_ecp_gen_privkey(grp, d, f_rng, p_rng)); + } - MBEDTLS_MPI_CHK( mbedtls_ecp_mul_restartable( grp, Q, d, &grp->G, - f_rng, p_rng, rs_ctx ) ); + MBEDTLS_MPI_CHK(mbedtls_ecp_mul_restartable(grp, Q, d, &grp->G, + f_rng, p_rng, rs_ctx)); cleanup: - return( ret ); + return ret; } /* * Generate public key */ -int mbedtls_ecdh_gen_public( mbedtls_ecp_group *grp, mbedtls_mpi *d, mbedtls_ecp_point *Q, - int (*f_rng)(void *, unsigned char *, size_t), - void *p_rng ) +int mbedtls_ecdh_gen_public(mbedtls_ecp_group *grp, mbedtls_mpi *d, mbedtls_ecp_point *Q, + int (*f_rng)(void *, unsigned char *, size_t), + void *p_rng) { - ECDH_VALIDATE_RET( grp != NULL ); - ECDH_VALIDATE_RET( d != NULL ); - ECDH_VALIDATE_RET( Q != NULL ); - ECDH_VALIDATE_RET( f_rng != NULL ); - return( ecdh_gen_public_restartable( grp, d, Q, f_rng, p_rng, NULL ) ); + return ecdh_gen_public_restartable(grp, d, Q, f_rng, p_rng, NULL); } #endif /* !MBEDTLS_ECDH_GEN_PUBLIC_ALT */ @@ -113,79 +112,72 @@ int mbedtls_ecdh_gen_public( mbedtls_ecp_group *grp, mbedtls_mpi *d, mbedtls_ecp /* * Compute shared secret (SEC1 3.3.1) */ -static int ecdh_compute_shared_restartable( mbedtls_ecp_group *grp, - mbedtls_mpi *z, - const mbedtls_ecp_point *Q, const mbedtls_mpi *d, - int (*f_rng)(void *, unsigned char *, size_t), - void *p_rng, - mbedtls_ecp_restart_ctx *rs_ctx ) +static int ecdh_compute_shared_restartable(mbedtls_ecp_group *grp, + mbedtls_mpi *z, + const mbedtls_ecp_point *Q, const mbedtls_mpi *d, + int (*f_rng)(void *, unsigned char *, size_t), + void *p_rng, + mbedtls_ecp_restart_ctx *rs_ctx) { int ret = MBEDTLS_ERR_ERROR_CORRUPTION_DETECTED; mbedtls_ecp_point P; - mbedtls_ecp_point_init( &P ); + mbedtls_ecp_point_init(&P); - MBEDTLS_MPI_CHK( mbedtls_ecp_mul_restartable( grp, &P, d, Q, - f_rng, p_rng, rs_ctx ) ); + MBEDTLS_MPI_CHK(mbedtls_ecp_mul_restartable(grp, &P, d, Q, + f_rng, p_rng, rs_ctx)); - if( mbedtls_ecp_is_zero( &P ) ) - { + if (mbedtls_ecp_is_zero(&P)) { ret = MBEDTLS_ERR_ECP_BAD_INPUT_DATA; goto cleanup; } - MBEDTLS_MPI_CHK( mbedtls_mpi_copy( z, &P.X ) ); + MBEDTLS_MPI_CHK(mbedtls_mpi_copy(z, &P.X)); cleanup: - mbedtls_ecp_point_free( &P ); + mbedtls_ecp_point_free(&P); - return( ret ); + return ret; } /* * Compute shared secret (SEC1 3.3.1) */ -int mbedtls_ecdh_compute_shared( mbedtls_ecp_group *grp, mbedtls_mpi *z, - const mbedtls_ecp_point *Q, const mbedtls_mpi *d, - int (*f_rng)(void *, unsigned char *, size_t), - void *p_rng ) +int mbedtls_ecdh_compute_shared(mbedtls_ecp_group *grp, mbedtls_mpi *z, + const mbedtls_ecp_point *Q, const mbedtls_mpi *d, + int (*f_rng)(void *, unsigned char *, size_t), + void *p_rng) { - ECDH_VALIDATE_RET( grp != NULL ); - ECDH_VALIDATE_RET( Q != NULL ); - ECDH_VALIDATE_RET( d != NULL ); - ECDH_VALIDATE_RET( z != NULL ); - return( ecdh_compute_shared_restartable( grp, z, Q, d, - f_rng, p_rng, NULL ) ); + return ecdh_compute_shared_restartable(grp, z, Q, d, + f_rng, p_rng, NULL); } #endif /* !MBEDTLS_ECDH_COMPUTE_SHARED_ALT */ -static void ecdh_init_internal( mbedtls_ecdh_context_mbed *ctx ) +static void ecdh_init_internal(mbedtls_ecdh_context_mbed *ctx) { - mbedtls_ecp_group_init( &ctx->grp ); - mbedtls_mpi_init( &ctx->d ); - mbedtls_ecp_point_init( &ctx->Q ); - mbedtls_ecp_point_init( &ctx->Qp ); - mbedtls_mpi_init( &ctx->z ); + mbedtls_ecp_group_init(&ctx->grp); + mbedtls_mpi_init(&ctx->d); + mbedtls_ecp_point_init(&ctx->Q); + mbedtls_ecp_point_init(&ctx->Qp); + mbedtls_mpi_init(&ctx->z); #if defined(MBEDTLS_ECP_RESTARTABLE) - mbedtls_ecp_restart_init( &ctx->rs ); + mbedtls_ecp_restart_init(&ctx->rs); #endif } /* * Initialize context */ -void mbedtls_ecdh_init( mbedtls_ecdh_context *ctx ) +void mbedtls_ecdh_init(mbedtls_ecdh_context *ctx) { - ECDH_VALIDATE( ctx != NULL ); - #if defined(MBEDTLS_ECDH_LEGACY_CONTEXT) - ecdh_init_internal( ctx ); - mbedtls_ecp_point_init( &ctx->Vi ); - mbedtls_ecp_point_init( &ctx->Vf ); - mbedtls_mpi_init( &ctx->_d ); + ecdh_init_internal(ctx); + mbedtls_ecp_point_init(&ctx->Vi); + mbedtls_ecp_point_init(&ctx->Vf); + mbedtls_mpi_init(&ctx->_d); #else - memset( ctx, 0, sizeof( mbedtls_ecdh_context ) ); + memset(ctx, 0, sizeof(mbedtls_ecdh_context)); ctx->var = MBEDTLS_ECDH_VARIANT_NONE; #endif @@ -195,59 +187,55 @@ void mbedtls_ecdh_init( mbedtls_ecdh_context *ctx ) #endif } -static int ecdh_setup_internal( mbedtls_ecdh_context_mbed *ctx, - mbedtls_ecp_group_id grp_id ) +static int ecdh_setup_internal(mbedtls_ecdh_context_mbed *ctx, + mbedtls_ecp_group_id grp_id) { int ret = MBEDTLS_ERR_ERROR_CORRUPTION_DETECTED; - ret = mbedtls_ecp_group_load( &ctx->grp, grp_id ); - if( ret != 0 ) - { - return( MBEDTLS_ERR_ECP_FEATURE_UNAVAILABLE ); + ret = mbedtls_ecp_group_load(&ctx->grp, grp_id); + if (ret != 0) { + return MBEDTLS_ERR_ECP_FEATURE_UNAVAILABLE; } - return( 0 ); + return 0; } /* * Setup context */ -int mbedtls_ecdh_setup( mbedtls_ecdh_context *ctx, mbedtls_ecp_group_id grp_id ) +int mbedtls_ecdh_setup(mbedtls_ecdh_context *ctx, mbedtls_ecp_group_id grp_id) { - ECDH_VALIDATE_RET( ctx != NULL ); - #if defined(MBEDTLS_ECDH_LEGACY_CONTEXT) - return( ecdh_setup_internal( ctx, grp_id ) ); + return ecdh_setup_internal(ctx, grp_id); #else - switch( grp_id ) - { + switch (grp_id) { #if defined(MBEDTLS_ECDH_VARIANT_EVEREST_ENABLED) case MBEDTLS_ECP_DP_CURVE25519: ctx->point_format = MBEDTLS_ECP_PF_COMPRESSED; ctx->var = MBEDTLS_ECDH_VARIANT_EVEREST; ctx->grp_id = grp_id; - return( mbedtls_everest_setup( &ctx->ctx.everest_ecdh, grp_id ) ); + return mbedtls_everest_setup(&ctx->ctx.everest_ecdh, grp_id); #endif default: ctx->point_format = MBEDTLS_ECP_PF_UNCOMPRESSED; ctx->var = MBEDTLS_ECDH_VARIANT_MBEDTLS_2_0; ctx->grp_id = grp_id; - ecdh_init_internal( &ctx->ctx.mbed_ecdh ); - return( ecdh_setup_internal( &ctx->ctx.mbed_ecdh, grp_id ) ); + ecdh_init_internal(&ctx->ctx.mbed_ecdh); + return ecdh_setup_internal(&ctx->ctx.mbed_ecdh, grp_id); } #endif } -static void ecdh_free_internal( mbedtls_ecdh_context_mbed *ctx ) +static void ecdh_free_internal(mbedtls_ecdh_context_mbed *ctx) { - mbedtls_ecp_group_free( &ctx->grp ); - mbedtls_mpi_free( &ctx->d ); - mbedtls_ecp_point_free( &ctx->Q ); - mbedtls_ecp_point_free( &ctx->Qp ); - mbedtls_mpi_free( &ctx->z ); + mbedtls_ecp_group_free(&ctx->grp); + mbedtls_mpi_free(&ctx->d); + mbedtls_ecp_point_free(&ctx->Q); + mbedtls_ecp_point_free(&ctx->Qp); + mbedtls_mpi_free(&ctx->z); #if defined(MBEDTLS_ECP_RESTARTABLE) - mbedtls_ecp_restart_free( &ctx->rs ); + mbedtls_ecp_restart_free(&ctx->rs); #endif } @@ -255,10 +243,8 @@ static void ecdh_free_internal( mbedtls_ecdh_context_mbed *ctx ) /* * Enable restartable operations for context */ -void mbedtls_ecdh_enable_restart( mbedtls_ecdh_context *ctx ) +void mbedtls_ecdh_enable_restart(mbedtls_ecdh_context *ctx) { - ECDH_VALIDATE( ctx != NULL ); - ctx->restart_enabled = 1; } #endif @@ -266,26 +252,26 @@ void mbedtls_ecdh_enable_restart( mbedtls_ecdh_context *ctx ) /* * Free context */ -void mbedtls_ecdh_free( mbedtls_ecdh_context *ctx ) +void mbedtls_ecdh_free(mbedtls_ecdh_context *ctx) { - if( ctx == NULL ) + if (ctx == NULL) { return; + } #if defined(MBEDTLS_ECDH_LEGACY_CONTEXT) - mbedtls_ecp_point_free( &ctx->Vi ); - mbedtls_ecp_point_free( &ctx->Vf ); - mbedtls_mpi_free( &ctx->_d ); - ecdh_free_internal( ctx ); + mbedtls_ecp_point_free(&ctx->Vi); + mbedtls_ecp_point_free(&ctx->Vf); + mbedtls_mpi_free(&ctx->_d); + ecdh_free_internal(ctx); #else - switch( ctx->var ) - { + switch (ctx->var) { #if defined(MBEDTLS_ECDH_VARIANT_EVEREST_ENABLED) case MBEDTLS_ECDH_VARIANT_EVEREST: - mbedtls_everest_free( &ctx->ctx.everest_ecdh ); + mbedtls_everest_free(&ctx->ctx.everest_ecdh); break; #endif case MBEDTLS_ECDH_VARIANT_MBEDTLS_2_0: - ecdh_free_internal( &ctx->ctx.mbed_ecdh ); + ecdh_free_internal(&ctx->ctx.mbed_ecdh); break; default: break; @@ -297,14 +283,14 @@ void mbedtls_ecdh_free( mbedtls_ecdh_context *ctx ) #endif } -static int ecdh_make_params_internal( mbedtls_ecdh_context_mbed *ctx, - size_t *olen, int point_format, - unsigned char *buf, size_t blen, - int (*f_rng)(void *, - unsigned char *, - size_t), - void *p_rng, - int restart_enabled ) +static int ecdh_make_params_internal(mbedtls_ecdh_context_mbed *ctx, + size_t *olen, int point_format, + unsigned char *buf, size_t blen, + int (*f_rng)(void *, + unsigned char *, + size_t), + void *p_rng, + int restart_enabled) { int ret = MBEDTLS_ERR_ERROR_CORRUPTION_DETECTED; size_t grp_len, pt_len; @@ -312,40 +298,46 @@ static int ecdh_make_params_internal( mbedtls_ecdh_context_mbed *ctx, mbedtls_ecp_restart_ctx *rs_ctx = NULL; #endif - if( ctx->grp.pbits == 0 ) - return( MBEDTLS_ERR_ECP_BAD_INPUT_DATA ); + if (ctx->grp.pbits == 0) { + return MBEDTLS_ERR_ECP_BAD_INPUT_DATA; + } #if defined(MBEDTLS_ECP_RESTARTABLE) - if( restart_enabled ) + if (restart_enabled) { rs_ctx = &ctx->rs; + } #else (void) restart_enabled; #endif #if defined(MBEDTLS_ECP_RESTARTABLE) - if( ( ret = ecdh_gen_public_restartable( &ctx->grp, &ctx->d, &ctx->Q, - f_rng, p_rng, rs_ctx ) ) != 0 ) - return( ret ); + if ((ret = ecdh_gen_public_restartable(&ctx->grp, &ctx->d, &ctx->Q, + f_rng, p_rng, rs_ctx)) != 0) { + return ret; + } #else - if( ( ret = mbedtls_ecdh_gen_public( &ctx->grp, &ctx->d, &ctx->Q, - f_rng, p_rng ) ) != 0 ) - return( ret ); + if ((ret = mbedtls_ecdh_gen_public(&ctx->grp, &ctx->d, &ctx->Q, + f_rng, p_rng)) != 0) { + return ret; + } #endif /* MBEDTLS_ECP_RESTARTABLE */ - if( ( ret = mbedtls_ecp_tls_write_group( &ctx->grp, &grp_len, buf, - blen ) ) != 0 ) - return( ret ); + if ((ret = mbedtls_ecp_tls_write_group(&ctx->grp, &grp_len, buf, + blen)) != 0) { + return ret; + } buf += grp_len; blen -= grp_len; - if( ( ret = mbedtls_ecp_tls_write_point( &ctx->grp, &ctx->Q, point_format, - &pt_len, buf, blen ) ) != 0 ) - return( ret ); + if ((ret = mbedtls_ecp_tls_write_point(&ctx->grp, &ctx->Q, point_format, + &pt_len, buf, blen)) != 0) { + return ret; + } *olen = grp_len + pt_len; - return( 0 ); + return 0; } /* @@ -355,17 +347,12 @@ static int ecdh_make_params_internal( mbedtls_ecdh_context_mbed *ctx, * ECPoint public; * } ServerECDHParams; */ -int mbedtls_ecdh_make_params( mbedtls_ecdh_context *ctx, size_t *olen, - unsigned char *buf, size_t blen, - int (*f_rng)(void *, unsigned char *, size_t), - void *p_rng ) +int mbedtls_ecdh_make_params(mbedtls_ecdh_context *ctx, size_t *olen, + unsigned char *buf, size_t blen, + int (*f_rng)(void *, unsigned char *, size_t), + void *p_rng) { int restart_enabled = 0; - ECDH_VALIDATE_RET( ctx != NULL ); - ECDH_VALIDATE_RET( olen != NULL ); - ECDH_VALIDATE_RET( buf != NULL ); - ECDH_VALIDATE_RET( f_rng != NULL ); - #if defined(MBEDTLS_ECP_RESTARTABLE) restart_enabled = ctx->restart_enabled; #else @@ -373,33 +360,32 @@ int mbedtls_ecdh_make_params( mbedtls_ecdh_context *ctx, size_t *olen, #endif #if defined(MBEDTLS_ECDH_LEGACY_CONTEXT) - return( ecdh_make_params_internal( ctx, olen, ctx->point_format, buf, blen, - f_rng, p_rng, restart_enabled ) ); + return ecdh_make_params_internal(ctx, olen, ctx->point_format, buf, blen, + f_rng, p_rng, restart_enabled); #else - switch( ctx->var ) - { + switch (ctx->var) { #if defined(MBEDTLS_ECDH_VARIANT_EVEREST_ENABLED) case MBEDTLS_ECDH_VARIANT_EVEREST: - return( mbedtls_everest_make_params( &ctx->ctx.everest_ecdh, olen, - buf, blen, f_rng, p_rng ) ); + return mbedtls_everest_make_params(&ctx->ctx.everest_ecdh, olen, + buf, blen, f_rng, p_rng); #endif case MBEDTLS_ECDH_VARIANT_MBEDTLS_2_0: - return( ecdh_make_params_internal( &ctx->ctx.mbed_ecdh, olen, - ctx->point_format, buf, blen, - f_rng, p_rng, - restart_enabled ) ); + return ecdh_make_params_internal(&ctx->ctx.mbed_ecdh, olen, + ctx->point_format, buf, blen, + f_rng, p_rng, + restart_enabled); default: return MBEDTLS_ERR_ECP_BAD_INPUT_DATA; } #endif } -static int ecdh_read_params_internal( mbedtls_ecdh_context_mbed *ctx, - const unsigned char **buf, - const unsigned char *end ) +static int ecdh_read_params_internal(mbedtls_ecdh_context_mbed *ctx, + const unsigned char **buf, + const unsigned char *end) { - return( mbedtls_ecp_tls_read_point( &ctx->grp, &ctx->Qp, buf, - end - *buf ) ); + return mbedtls_ecp_tls_read_point(&ctx->grp, &ctx->Qp, buf, + end - *buf); } /* @@ -409,328 +395,317 @@ static int ecdh_read_params_internal( mbedtls_ecdh_context_mbed *ctx, * ECPoint public; * } ServerECDHParams; */ -int mbedtls_ecdh_read_params( mbedtls_ecdh_context *ctx, - const unsigned char **buf, - const unsigned char *end ) +int mbedtls_ecdh_read_params(mbedtls_ecdh_context *ctx, + const unsigned char **buf, + const unsigned char *end) { int ret = MBEDTLS_ERR_ERROR_CORRUPTION_DETECTED; mbedtls_ecp_group_id grp_id; - ECDH_VALIDATE_RET( ctx != NULL ); - ECDH_VALIDATE_RET( buf != NULL ); - ECDH_VALIDATE_RET( *buf != NULL ); - ECDH_VALIDATE_RET( end != NULL ); - - if( ( ret = mbedtls_ecp_tls_read_group_id( &grp_id, buf, end - *buf ) ) - != 0 ) - return( ret ); + if ((ret = mbedtls_ecp_tls_read_group_id(&grp_id, buf, end - *buf)) + != 0) { + return ret; + } - if( ( ret = mbedtls_ecdh_setup( ctx, grp_id ) ) != 0 ) - return( ret ); + if ((ret = mbedtls_ecdh_setup(ctx, grp_id)) != 0) { + return ret; + } #if defined(MBEDTLS_ECDH_LEGACY_CONTEXT) - return( ecdh_read_params_internal( ctx, buf, end ) ); + return ecdh_read_params_internal(ctx, buf, end); #else - switch( ctx->var ) - { + switch (ctx->var) { #if defined(MBEDTLS_ECDH_VARIANT_EVEREST_ENABLED) case MBEDTLS_ECDH_VARIANT_EVEREST: - return( mbedtls_everest_read_params( &ctx->ctx.everest_ecdh, - buf, end) ); + return mbedtls_everest_read_params(&ctx->ctx.everest_ecdh, + buf, end); #endif case MBEDTLS_ECDH_VARIANT_MBEDTLS_2_0: - return( ecdh_read_params_internal( &ctx->ctx.mbed_ecdh, - buf, end ) ); + return ecdh_read_params_internal(&ctx->ctx.mbed_ecdh, + buf, end); default: return MBEDTLS_ERR_ECP_BAD_INPUT_DATA; } #endif } -static int ecdh_get_params_internal( mbedtls_ecdh_context_mbed *ctx, - const mbedtls_ecp_keypair *key, - mbedtls_ecdh_side side ) +static int ecdh_get_params_internal(mbedtls_ecdh_context_mbed *ctx, + const mbedtls_ecp_keypair *key, + mbedtls_ecdh_side side) { int ret = MBEDTLS_ERR_ERROR_CORRUPTION_DETECTED; /* If it's not our key, just import the public part as Qp */ - if( side == MBEDTLS_ECDH_THEIRS ) - return( mbedtls_ecp_copy( &ctx->Qp, &key->Q ) ); + if (side == MBEDTLS_ECDH_THEIRS) { + return mbedtls_ecp_copy(&ctx->Qp, &key->Q); + } /* Our key: import public (as Q) and private parts */ - if( side != MBEDTLS_ECDH_OURS ) - return( MBEDTLS_ERR_ECP_BAD_INPUT_DATA ); + if (side != MBEDTLS_ECDH_OURS) { + return MBEDTLS_ERR_ECP_BAD_INPUT_DATA; + } ctx->grp.vendor_ctx = key->grp.vendor_ctx; - if( ( ret = mbedtls_ecp_copy( &ctx->Q, &key->Q ) ) != 0 || - ( ret = mbedtls_mpi_copy( &ctx->d, &key->d ) ) != 0 ) - return( ret ); + if ((ret = mbedtls_ecp_copy(&ctx->Q, &key->Q)) != 0 || + (ret = mbedtls_mpi_copy(&ctx->d, &key->d)) != 0) { + return ret; + } - return( 0 ); + return 0; } /* * Get parameters from a keypair */ -int mbedtls_ecdh_get_params( mbedtls_ecdh_context *ctx, - const mbedtls_ecp_keypair *key, - mbedtls_ecdh_side side ) +int mbedtls_ecdh_get_params(mbedtls_ecdh_context *ctx, + const mbedtls_ecp_keypair *key, + mbedtls_ecdh_side side) { int ret = MBEDTLS_ERR_ERROR_CORRUPTION_DETECTED; - ECDH_VALIDATE_RET( ctx != NULL ); - ECDH_VALIDATE_RET( key != NULL ); - ECDH_VALIDATE_RET( side == MBEDTLS_ECDH_OURS || - side == MBEDTLS_ECDH_THEIRS ); + if (side != MBEDTLS_ECDH_OURS && side != MBEDTLS_ECDH_THEIRS) { + return MBEDTLS_ERR_ECP_BAD_INPUT_DATA; + } - if( mbedtls_ecdh_grp_id( ctx ) == MBEDTLS_ECP_DP_NONE ) - { + if (mbedtls_ecdh_grp_id(ctx) == MBEDTLS_ECP_DP_NONE) { /* This is the first call to get_params(). Set up the context * for use with the group. */ - if( ( ret = mbedtls_ecdh_setup( ctx, key->grp.id ) ) != 0 ) - return( ret ); - } - else - { + if ((ret = mbedtls_ecdh_setup(ctx, key->grp.id)) != 0) { + return ret; + } + } else { /* This is not the first call to get_params(). Check that the * current key's group is the same as the context's, which was set * from the first key's group. */ - if( mbedtls_ecdh_grp_id( ctx ) != key->grp.id ) - return( MBEDTLS_ERR_ECP_BAD_INPUT_DATA ); + if (mbedtls_ecdh_grp_id(ctx) != key->grp.id) { + return MBEDTLS_ERR_ECP_BAD_INPUT_DATA; + } } #if defined(MBEDTLS_ECDH_LEGACY_CONTEXT) - return( ecdh_get_params_internal( ctx, key, side ) ); + return ecdh_get_params_internal(ctx, key, side); #else - switch( ctx->var ) - { + switch (ctx->var) { #if defined(MBEDTLS_ECDH_VARIANT_EVEREST_ENABLED) case MBEDTLS_ECDH_VARIANT_EVEREST: { mbedtls_everest_ecdh_side s = side == MBEDTLS_ECDH_OURS ? - MBEDTLS_EVEREST_ECDH_OURS : - MBEDTLS_EVEREST_ECDH_THEIRS; - return( mbedtls_everest_get_params( &ctx->ctx.everest_ecdh, - key, s) ); + MBEDTLS_EVEREST_ECDH_OURS : + MBEDTLS_EVEREST_ECDH_THEIRS; + return mbedtls_everest_get_params(&ctx->ctx.everest_ecdh, + key, s); } #endif case MBEDTLS_ECDH_VARIANT_MBEDTLS_2_0: - return( ecdh_get_params_internal( &ctx->ctx.mbed_ecdh, - key, side ) ); + return ecdh_get_params_internal(&ctx->ctx.mbed_ecdh, + key, side); default: return MBEDTLS_ERR_ECP_BAD_INPUT_DATA; } #endif } -static int ecdh_make_public_internal( mbedtls_ecdh_context_mbed *ctx, - size_t *olen, int point_format, - unsigned char *buf, size_t blen, - int (*f_rng)(void *, - unsigned char *, - size_t), - void *p_rng, - int restart_enabled ) +static int ecdh_make_public_internal(mbedtls_ecdh_context_mbed *ctx, + size_t *olen, int point_format, + unsigned char *buf, size_t blen, + int (*f_rng)(void *, + unsigned char *, + size_t), + void *p_rng, + int restart_enabled) { int ret = MBEDTLS_ERR_ERROR_CORRUPTION_DETECTED; #if defined(MBEDTLS_ECP_RESTARTABLE) mbedtls_ecp_restart_ctx *rs_ctx = NULL; #endif - if( ctx->grp.pbits == 0 ) - return( MBEDTLS_ERR_ECP_BAD_INPUT_DATA ); + if (ctx->grp.pbits == 0) { + return MBEDTLS_ERR_ECP_BAD_INPUT_DATA; + } #if defined(MBEDTLS_ECP_RESTARTABLE) - if( restart_enabled ) + if (restart_enabled) { rs_ctx = &ctx->rs; + } #else (void) restart_enabled; #endif #if defined(MBEDTLS_ECP_RESTARTABLE) - if( ( ret = ecdh_gen_public_restartable( &ctx->grp, &ctx->d, &ctx->Q, - f_rng, p_rng, rs_ctx ) ) != 0 ) - return( ret ); + if ((ret = ecdh_gen_public_restartable(&ctx->grp, &ctx->d, &ctx->Q, + f_rng, p_rng, rs_ctx)) != 0) { + return ret; + } #else #if BSP_FEATURE_CRYPTO_HAS_SCE9 ctx->grp.vendor_ctx = (void *) true; #endif - if( ( ret = mbedtls_ecdh_gen_public( &ctx->grp, &ctx->d, &ctx->Q, - f_rng, p_rng ) ) != 0 ) - return( ret ); + if ((ret = mbedtls_ecdh_gen_public(&ctx->grp, &ctx->d, &ctx->Q, + f_rng, p_rng)) != 0) { + return ret; + } #endif /* MBEDTLS_ECP_RESTARTABLE */ - return mbedtls_ecp_tls_write_point( &ctx->grp, &ctx->Q, point_format, olen, - buf, blen ); + return mbedtls_ecp_tls_write_point(&ctx->grp, &ctx->Q, point_format, olen, + buf, blen); } /* * Setup and export the client public value */ -int mbedtls_ecdh_make_public( mbedtls_ecdh_context *ctx, size_t *olen, - unsigned char *buf, size_t blen, - int (*f_rng)(void *, unsigned char *, size_t), - void *p_rng ) +int mbedtls_ecdh_make_public(mbedtls_ecdh_context *ctx, size_t *olen, + unsigned char *buf, size_t blen, + int (*f_rng)(void *, unsigned char *, size_t), + void *p_rng) { int restart_enabled = 0; - ECDH_VALIDATE_RET( ctx != NULL ); - ECDH_VALIDATE_RET( olen != NULL ); - ECDH_VALIDATE_RET( buf != NULL ); - ECDH_VALIDATE_RET( f_rng != NULL ); - #if defined(MBEDTLS_ECP_RESTARTABLE) restart_enabled = ctx->restart_enabled; #endif #if defined(MBEDTLS_ECDH_LEGACY_CONTEXT) - return( ecdh_make_public_internal( ctx, olen, ctx->point_format, buf, blen, - f_rng, p_rng, restart_enabled ) ); + return ecdh_make_public_internal(ctx, olen, ctx->point_format, buf, blen, + f_rng, p_rng, restart_enabled); #else - switch( ctx->var ) - { + switch (ctx->var) { #if defined(MBEDTLS_ECDH_VARIANT_EVEREST_ENABLED) case MBEDTLS_ECDH_VARIANT_EVEREST: - return( mbedtls_everest_make_public( &ctx->ctx.everest_ecdh, olen, - buf, blen, f_rng, p_rng ) ); + return mbedtls_everest_make_public(&ctx->ctx.everest_ecdh, olen, + buf, blen, f_rng, p_rng); #endif case MBEDTLS_ECDH_VARIANT_MBEDTLS_2_0: - return( ecdh_make_public_internal( &ctx->ctx.mbed_ecdh, olen, - ctx->point_format, buf, blen, - f_rng, p_rng, - restart_enabled ) ); + return ecdh_make_public_internal(&ctx->ctx.mbed_ecdh, olen, + ctx->point_format, buf, blen, + f_rng, p_rng, + restart_enabled); default: return MBEDTLS_ERR_ECP_BAD_INPUT_DATA; } #endif } -static int ecdh_read_public_internal( mbedtls_ecdh_context_mbed *ctx, - const unsigned char *buf, size_t blen ) +static int ecdh_read_public_internal(mbedtls_ecdh_context_mbed *ctx, + const unsigned char *buf, size_t blen) { int ret = MBEDTLS_ERR_ERROR_CORRUPTION_DETECTED; const unsigned char *p = buf; - if( ( ret = mbedtls_ecp_tls_read_point( &ctx->grp, &ctx->Qp, &p, - blen ) ) != 0 ) - return( ret ); + if ((ret = mbedtls_ecp_tls_read_point(&ctx->grp, &ctx->Qp, &p, + blen)) != 0) { + return ret; + } - if( (size_t)( p - buf ) != blen ) - return( MBEDTLS_ERR_ECP_BAD_INPUT_DATA ); + if ((size_t) (p - buf) != blen) { + return MBEDTLS_ERR_ECP_BAD_INPUT_DATA; + } - return( 0 ); + return 0; } /* * Parse and import the client's public value */ -int mbedtls_ecdh_read_public( mbedtls_ecdh_context *ctx, - const unsigned char *buf, size_t blen ) +int mbedtls_ecdh_read_public(mbedtls_ecdh_context *ctx, + const unsigned char *buf, size_t blen) { - ECDH_VALIDATE_RET( ctx != NULL ); - ECDH_VALIDATE_RET( buf != NULL ); - #if defined(MBEDTLS_ECDH_LEGACY_CONTEXT) - return( ecdh_read_public_internal( ctx, buf, blen ) ); + return ecdh_read_public_internal(ctx, buf, blen); #else - switch( ctx->var ) - { + switch (ctx->var) { #if defined(MBEDTLS_ECDH_VARIANT_EVEREST_ENABLED) case MBEDTLS_ECDH_VARIANT_EVEREST: - return( mbedtls_everest_read_public( &ctx->ctx.everest_ecdh, - buf, blen ) ); + return mbedtls_everest_read_public(&ctx->ctx.everest_ecdh, + buf, blen); #endif case MBEDTLS_ECDH_VARIANT_MBEDTLS_2_0: - return( ecdh_read_public_internal( &ctx->ctx.mbed_ecdh, - buf, blen ) ); + return ecdh_read_public_internal(&ctx->ctx.mbed_ecdh, + buf, blen); default: return MBEDTLS_ERR_ECP_BAD_INPUT_DATA; } #endif } -static int ecdh_calc_secret_internal( mbedtls_ecdh_context_mbed *ctx, - size_t *olen, unsigned char *buf, - size_t blen, - int (*f_rng)(void *, - unsigned char *, - size_t), - void *p_rng, - int restart_enabled ) +static int ecdh_calc_secret_internal(mbedtls_ecdh_context_mbed *ctx, + size_t *olen, unsigned char *buf, + size_t blen, + int (*f_rng)(void *, + unsigned char *, + size_t), + void *p_rng, + int restart_enabled) { int ret = MBEDTLS_ERR_ERROR_CORRUPTION_DETECTED; #if defined(MBEDTLS_ECP_RESTARTABLE) mbedtls_ecp_restart_ctx *rs_ctx = NULL; #endif - if( ctx == NULL || ctx->grp.pbits == 0 ) - return( MBEDTLS_ERR_ECP_BAD_INPUT_DATA ); + if (ctx == NULL || ctx->grp.pbits == 0) { + return MBEDTLS_ERR_ECP_BAD_INPUT_DATA; + } #if defined(MBEDTLS_ECP_RESTARTABLE) - if( restart_enabled ) + if (restart_enabled) { rs_ctx = &ctx->rs; + } #else (void) restart_enabled; #endif #if defined(MBEDTLS_ECP_RESTARTABLE) - if( ( ret = ecdh_compute_shared_restartable( &ctx->grp, &ctx->z, &ctx->Qp, - &ctx->d, f_rng, p_rng, - rs_ctx ) ) != 0 ) - { - return( ret ); + if ((ret = ecdh_compute_shared_restartable(&ctx->grp, &ctx->z, &ctx->Qp, + &ctx->d, f_rng, p_rng, + rs_ctx)) != 0) { + return ret; } #else - if( ( ret = mbedtls_ecdh_compute_shared( &ctx->grp, &ctx->z, &ctx->Qp, - &ctx->d, f_rng, p_rng ) ) != 0 ) - { - return( ret ); + if ((ret = mbedtls_ecdh_compute_shared(&ctx->grp, &ctx->z, &ctx->Qp, + &ctx->d, f_rng, p_rng)) != 0) { + return ret; } #endif /* MBEDTLS_ECP_RESTARTABLE */ - if( mbedtls_mpi_size( &ctx->z ) > blen ) - return( MBEDTLS_ERR_ECP_BAD_INPUT_DATA ); + if (mbedtls_mpi_size(&ctx->z) > blen) { + return MBEDTLS_ERR_ECP_BAD_INPUT_DATA; + } - *olen = ctx->grp.pbits / 8 + ( ( ctx->grp.pbits % 8 ) != 0 ); + *olen = ctx->grp.pbits / 8 + ((ctx->grp.pbits % 8) != 0); - if( mbedtls_ecp_get_type( &ctx->grp ) == MBEDTLS_ECP_TYPE_MONTGOMERY ) - return mbedtls_mpi_write_binary_le( &ctx->z, buf, *olen ); + if (mbedtls_ecp_get_type(&ctx->grp) == MBEDTLS_ECP_TYPE_MONTGOMERY) { + return mbedtls_mpi_write_binary_le(&ctx->z, buf, *olen); + } - return mbedtls_mpi_write_binary( &ctx->z, buf, *olen ); + return mbedtls_mpi_write_binary(&ctx->z, buf, *olen); } /* * Derive and export the shared secret */ -int mbedtls_ecdh_calc_secret( mbedtls_ecdh_context *ctx, size_t *olen, - unsigned char *buf, size_t blen, - int (*f_rng)(void *, unsigned char *, size_t), - void *p_rng ) +int mbedtls_ecdh_calc_secret(mbedtls_ecdh_context *ctx, size_t *olen, + unsigned char *buf, size_t blen, + int (*f_rng)(void *, unsigned char *, size_t), + void *p_rng) { int restart_enabled = 0; - ECDH_VALIDATE_RET( ctx != NULL ); - ECDH_VALIDATE_RET( olen != NULL ); - ECDH_VALIDATE_RET( buf != NULL ); - #if defined(MBEDTLS_ECP_RESTARTABLE) restart_enabled = ctx->restart_enabled; #endif #if defined(MBEDTLS_ECDH_LEGACY_CONTEXT) - return( ecdh_calc_secret_internal( ctx, olen, buf, blen, f_rng, p_rng, - restart_enabled ) ); + return ecdh_calc_secret_internal(ctx, olen, buf, blen, f_rng, p_rng, + restart_enabled); #else - switch( ctx->var ) - { + switch (ctx->var) { #if defined(MBEDTLS_ECDH_VARIANT_EVEREST_ENABLED) case MBEDTLS_ECDH_VARIANT_EVEREST: - return( mbedtls_everest_calc_secret( &ctx->ctx.everest_ecdh, olen, - buf, blen, f_rng, p_rng ) ); + return mbedtls_everest_calc_secret(&ctx->ctx.everest_ecdh, olen, + buf, blen, f_rng, p_rng); #endif case MBEDTLS_ECDH_VARIANT_MBEDTLS_2_0: - return( ecdh_calc_secret_internal( &ctx->ctx.mbed_ecdh, olen, buf, - blen, f_rng, p_rng, - restart_enabled ) ); + return ecdh_calc_secret_internal(&ctx->ctx.mbed_ecdh, olen, buf, + blen, f_rng, p_rng, + restart_enabled); default: - return( MBEDTLS_ERR_ECP_BAD_INPUT_DATA ); + return MBEDTLS_ERR_ECP_BAD_INPUT_DATA; } #endif } diff --git a/ra/fsp/src/rm_psa_crypto/ecdsa_alt.c b/ra/fsp/src/rm_psa_crypto/ecdsa_alt.c index 7b8b2cbe9..7d560983b 100644 --- a/ra/fsp/src/rm_psa_crypto/ecdsa_alt.c +++ b/ra/fsp/src/rm_psa_crypto/ecdsa_alt.c @@ -36,25 +36,13 @@ #include "mbedtls/hmac_drbg.h" #endif - #if defined(MBEDTLS_PLATFORM_C) - #include "mbedtls/platform.h" - #else - #include <stdlib.h> - #define mbedtls_calloc calloc - #define mbedtls_free free - #endif +#include "mbedtls/platform.h" #include "mbedtls/platform_util.h" #include "mbedtls/error.h" #include "psa/crypto.h" #include "hw_sce_private.h" -/* Parameter validation macros based on platform_util.h */ -#define ECDSA_VALIDATE_RET( cond ) \ - MBEDTLS_INTERNAL_VALIDATE_RET( cond, MBEDTLS_ERR_ECP_BAD_INPUT_DATA ) -#define ECDSA_VALIDATE( cond ) \ - MBEDTLS_INTERNAL_VALIDATE( cond ) - uint32_t ecp_load_key_size(bool wrapped_mode_ctx, mbedtls_ecp_group * grp); #if (defined(MBEDTLS_ECDSA_SIGN_ALT) || defined(MBEDTLS_ECDSA_VERIFY_ALT) || defined(MBEDTLS_ECP_ALT)) @@ -389,31 +377,17 @@ int ecp_load_curve_attributes_sce (const mbedtls_ecp_group * grp, uint32_t * p_c #endif // (defined(MBEDTLS_ECDSA_SIGN_ALT) || defined(MBEDTLS_ECDSA_VERIFY_ALT) || defined(MBEDTLS_ECP_ALT)) #if defined(MBEDTLS_ECDSA_SIGN_ALT) - /* * Compute ECDSA signature of a hashed message */ - -int mbedtls_ecdsa_sign (mbedtls_ecp_group * grp, - mbedtls_mpi * r, - mbedtls_mpi * s, - const mbedtls_mpi * d, - const unsigned char * buf, - size_t blen, - int (* f_rng)(void *, unsigned char *, size_t), - void * p_rng) +int mbedtls_ecdsa_sign(mbedtls_ecp_group *grp, mbedtls_mpi *r, mbedtls_mpi *s, + const mbedtls_mpi *d, const unsigned char *buf, size_t blen, + int (*f_rng)(void *, unsigned char *, size_t), void *p_rng) { (void) blen; (void) f_rng; (void) p_rng; - ECDSA_VALIDATE_RET(grp != NULL); - ECDSA_VALIDATE_RET(r != NULL); - ECDSA_VALIDATE_RET(s != NULL); - ECDSA_VALIDATE_RET(d != NULL); - ECDSA_VALIDATE_RET(f_rng != NULL); - ECDSA_VALIDATE_RET(buf != NULL || blen == 0); - int ret = 0; hw_sce_ecc_generatesign_t p_hw_sce_ecc_generatesign = NULL; @@ -514,21 +488,14 @@ int mbedtls_ecdsa_sign (mbedtls_ecp_group * grp, /* * Verify ECDSA signature of hashed message */ -int mbedtls_ecdsa_verify (mbedtls_ecp_group * grp, - const unsigned char * buf, - size_t blen, - const mbedtls_ecp_point * Q, - const mbedtls_mpi * r, - const mbedtls_mpi * s) +int mbedtls_ecdsa_verify(mbedtls_ecp_group *grp, + const unsigned char *buf, size_t blen, + const mbedtls_ecp_point *Q, + const mbedtls_mpi *r, + const mbedtls_mpi *s) { (void) blen; - ECDSA_VALIDATE_RET(grp != NULL); - ECDSA_VALIDATE_RET(Q != NULL); - ECDSA_VALIDATE_RET(r != NULL); - ECDSA_VALIDATE_RET(s != NULL); - ECDSA_VALIDATE_RET(buf != NULL || blen == 0); - int ret; uint32_t * p_public_key_buff_32; uint32_t * p_signature_buff_32; diff --git a/ra/fsp/src/rm_psa_crypto/ecp_alt.c b/ra/fsp/src/rm_psa_crypto/ecp_alt.c index 8e6872b9c..a3666ed5b 100644 --- a/ra/fsp/src/rm_psa_crypto/ecp_alt.c +++ b/ra/fsp/src/rm_psa_crypto/ecp_alt.c @@ -84,29 +84,10 @@ #if defined(MBEDTLS_ECP_ALT) -/* Parameter validation macros based on platform_util.h */ -#define ECP_VALIDATE_RET( cond ) \ - MBEDTLS_INTERNAL_VALIDATE_RET( cond, MBEDTLS_ERR_ECP_BAD_INPUT_DATA ) -#define ECP_VALIDATE( cond ) \ - MBEDTLS_INTERNAL_VALIDATE( cond ) - -#if defined(MBEDTLS_PLATFORM_C) #include "mbedtls/platform.h" -#else -#include <stdlib.h> -#include <stdio.h> -#define mbedtls_printf printf -#define mbedtls_calloc calloc -#define mbedtls_free free -#endif #include "ecp_internal_alt.h" -#if ( defined(__ARMCC_VERSION) || defined(_MSC_VER) ) && \ - !defined(inline) && !defined(__cplusplus) -#define inline __inline -#endif - #if defined(MBEDTLS_SELF_TEST) /* * Counts of point addition and doubling, and field multiplications. @@ -131,7 +112,7 @@ static unsigned ecp_max_ops = 0; /* * Set ecp_max_ops */ -void mbedtls_ecp_set_max_ops( unsigned max_ops ) +void mbedtls_ecp_set_max_ops(unsigned max_ops) { ecp_max_ops = max_ops; } @@ -139,16 +120,15 @@ void mbedtls_ecp_set_max_ops( unsigned max_ops ) /* * Check if restart is enabled */ -int mbedtls_ecp_restart_is_enabled( void ) +int mbedtls_ecp_restart_is_enabled(void) { - return( ecp_max_ops != 0 ); + return ecp_max_ops != 0; } /* * Restart sub-context for ecp_mul_comb() */ -struct mbedtls_ecp_restart_mul -{ +struct mbedtls_ecp_restart_mul { mbedtls_ecp_point R; /* current intermediate result */ size_t i; /* current index in various loops, 0 outside */ mbedtls_ecp_point *T; /* table for precomputed points */ @@ -167,9 +147,9 @@ struct mbedtls_ecp_restart_mul /* * Init restart_mul sub-context */ -static void ecp_restart_rsm_init( mbedtls_ecp_restart_mul_ctx *ctx ) +static void ecp_restart_rsm_init(mbedtls_ecp_restart_mul_ctx *ctx) { - mbedtls_ecp_point_init( &ctx->R ); + mbedtls_ecp_point_init(&ctx->R); ctx->i = 0; ctx->T = NULL; ctx->T_size = 0; @@ -179,30 +159,30 @@ static void ecp_restart_rsm_init( mbedtls_ecp_restart_mul_ctx *ctx ) /* * Free the components of a restart_mul sub-context */ -static void ecp_restart_rsm_free( mbedtls_ecp_restart_mul_ctx *ctx ) +static void ecp_restart_rsm_free(mbedtls_ecp_restart_mul_ctx *ctx) { unsigned char i; - if( ctx == NULL ) + if (ctx == NULL) { return; + } - mbedtls_ecp_point_free( &ctx->R ); + mbedtls_ecp_point_free(&ctx->R); - if( ctx->T != NULL ) - { - for( i = 0; i < ctx->T_size; i++ ) - mbedtls_ecp_point_free( ctx->T + i ); - mbedtls_free( ctx->T ); + if (ctx->T != NULL) { + for (i = 0; i < ctx->T_size; i++) { + mbedtls_ecp_point_free(ctx->T + i); + } + mbedtls_free(ctx->T); } - ecp_restart_rsm_init( ctx ); + ecp_restart_rsm_init(ctx); } /* * Restart context for ecp_muladd() */ -struct mbedtls_ecp_restart_muladd -{ +struct mbedtls_ecp_restart_muladd { mbedtls_ecp_point mP; /* mP value */ mbedtls_ecp_point R; /* R intermediate result */ enum { /* what should we do next? */ @@ -216,33 +196,33 @@ struct mbedtls_ecp_restart_muladd /* * Init restart_muladd sub-context */ -static void ecp_restart_ma_init( mbedtls_ecp_restart_muladd_ctx *ctx ) +static void ecp_restart_ma_init(mbedtls_ecp_restart_muladd_ctx *ctx) { - mbedtls_ecp_point_init( &ctx->mP ); - mbedtls_ecp_point_init( &ctx->R ); + mbedtls_ecp_point_init(&ctx->mP); + mbedtls_ecp_point_init(&ctx->R); ctx->state = ecp_rsma_mul1; } /* * Free the components of a restart_muladd sub-context */ -static void ecp_restart_ma_free( mbedtls_ecp_restart_muladd_ctx *ctx ) +static void ecp_restart_ma_free(mbedtls_ecp_restart_muladd_ctx *ctx) { - if( ctx == NULL ) + if (ctx == NULL) { return; + } - mbedtls_ecp_point_free( &ctx->mP ); - mbedtls_ecp_point_free( &ctx->R ); + mbedtls_ecp_point_free(&ctx->mP); + mbedtls_ecp_point_free(&ctx->R); - ecp_restart_ma_init( ctx ); + ecp_restart_ma_init(ctx); } /* * Initialize a restart context */ -void mbedtls_ecp_restart_init( mbedtls_ecp_restart_ctx *ctx ) +void mbedtls_ecp_restart_init(mbedtls_ecp_restart_ctx *ctx) { - ECP_VALIDATE( ctx != NULL ); ctx->ops_done = 0; ctx->depth = 0; ctx->rsm = NULL; @@ -252,106 +232,106 @@ void mbedtls_ecp_restart_init( mbedtls_ecp_restart_ctx *ctx ) /* * Free the components of a restart context */ -void mbedtls_ecp_restart_free( mbedtls_ecp_restart_ctx *ctx ) +void mbedtls_ecp_restart_free(mbedtls_ecp_restart_ctx *ctx) { - if( ctx == NULL ) + if (ctx == NULL) { return; + } - ecp_restart_rsm_free( ctx->rsm ); - mbedtls_free( ctx->rsm ); + ecp_restart_rsm_free(ctx->rsm); + mbedtls_free(ctx->rsm); - ecp_restart_ma_free( ctx->ma ); - mbedtls_free( ctx->ma ); + ecp_restart_ma_free(ctx->ma); + mbedtls_free(ctx->ma); - mbedtls_ecp_restart_init( ctx ); + mbedtls_ecp_restart_init(ctx); } /* * Check if we can do the next step */ -int mbedtls_ecp_check_budget( const mbedtls_ecp_group *grp, - mbedtls_ecp_restart_ctx *rs_ctx, - unsigned ops ) +int mbedtls_ecp_check_budget(const mbedtls_ecp_group *grp, + mbedtls_ecp_restart_ctx *rs_ctx, + unsigned ops) { - ECP_VALIDATE_RET( grp != NULL ); - - if( rs_ctx != NULL && ecp_max_ops != 0 ) - { + if (rs_ctx != NULL && ecp_max_ops != 0) { /* scale depending on curve size: the chosen reference is 256-bit, * and multiplication is quadratic. Round to the closest integer. */ - if( grp->pbits >= 512 ) + if (grp->pbits >= 512) { ops *= 4; - else if( grp->pbits >= 384 ) + } else if (grp->pbits >= 384) { ops *= 2; + } /* Avoid infinite loops: always allow first step. * Because of that, however, it's not generally true * that ops_done <= ecp_max_ops, so the check * ops_done > ecp_max_ops below is mandatory. */ - if( ( rs_ctx->ops_done != 0 ) && - ( rs_ctx->ops_done > ecp_max_ops || - ops > ecp_max_ops - rs_ctx->ops_done ) ) - { - return( MBEDTLS_ERR_ECP_IN_PROGRESS ); + if ((rs_ctx->ops_done != 0) && + (rs_ctx->ops_done > ecp_max_ops || + ops > ecp_max_ops - rs_ctx->ops_done)) { + return MBEDTLS_ERR_ECP_IN_PROGRESS; } /* update running count */ rs_ctx->ops_done += ops; } - return( 0 ); + return 0; } /* Call this when entering a function that needs its own sub-context */ -#define ECP_RS_ENTER( SUB ) do { \ - /* reset ops count for this call if top-level */ \ - if( rs_ctx != NULL && rs_ctx->depth++ == 0 ) \ +#define ECP_RS_ENTER(SUB) do { \ + /* reset ops count for this call if top-level */ \ + if (rs_ctx != NULL && rs_ctx->depth++ == 0) \ rs_ctx->ops_done = 0; \ \ - /* set up our own sub-context if needed */ \ - if( mbedtls_ecp_restart_is_enabled() && \ - rs_ctx != NULL && rs_ctx->SUB == NULL ) \ - { \ - rs_ctx->SUB = mbedtls_calloc( 1, sizeof( *rs_ctx->SUB ) ); \ - if( rs_ctx->SUB == NULL ) \ - return( MBEDTLS_ERR_ECP_ALLOC_FAILED ); \ - \ - ecp_restart_## SUB ##_init( rs_ctx->SUB ); \ - } \ -} while( 0 ) + /* set up our own sub-context if needed */ \ + if (mbedtls_ecp_restart_is_enabled() && \ + rs_ctx != NULL && rs_ctx->SUB == NULL) \ + { \ + rs_ctx->SUB = mbedtls_calloc(1, sizeof(*rs_ctx->SUB)); \ + if (rs_ctx->SUB == NULL) \ + return MBEDTLS_ERR_ECP_ALLOC_FAILED; \ + \ + ecp_restart_## SUB ##_init(rs_ctx->SUB); \ + } \ +} while (0) /* Call this when leaving a function that needs its own sub-context */ -#define ECP_RS_LEAVE( SUB ) do { \ - /* clear our sub-context when not in progress (done or error) */ \ - if( rs_ctx != NULL && rs_ctx->SUB != NULL && \ - ret != MBEDTLS_ERR_ECP_IN_PROGRESS ) \ - { \ - ecp_restart_## SUB ##_free( rs_ctx->SUB ); \ - mbedtls_free( rs_ctx->SUB ); \ - rs_ctx->SUB = NULL; \ - } \ +#define ECP_RS_LEAVE(SUB) do { \ + /* clear our sub-context when not in progress (done or error) */ \ + if (rs_ctx != NULL && rs_ctx->SUB != NULL && \ + ret != MBEDTLS_ERR_ECP_IN_PROGRESS) \ + { \ + ecp_restart_## SUB ##_free(rs_ctx->SUB); \ + mbedtls_free(rs_ctx->SUB); \ + rs_ctx->SUB = NULL; \ + } \ \ - if( rs_ctx != NULL ) \ + if (rs_ctx != NULL) \ rs_ctx->depth--; \ -} while( 0 ) +} while (0) #else /* MBEDTLS_ECP_RESTARTABLE */ -#define ECP_RS_ENTER( sub ) (void) rs_ctx; -#define ECP_RS_LEAVE( sub ) (void) rs_ctx; +#define ECP_RS_ENTER(sub) (void) rs_ctx; +#define ECP_RS_LEAVE(sub) (void) rs_ctx; #endif /* MBEDTLS_ECP_RESTARTABLE */ -static void mpi_init_many( mbedtls_mpi *arr, size_t size ) +static void mpi_init_many(mbedtls_mpi *arr, size_t size) { - while( size-- ) - mbedtls_mpi_init( arr++ ); + while (size--) { + mbedtls_mpi_init(arr++); + } } -static void mpi_free_many( mbedtls_mpi *arr, size_t size ) +static void mpi_free_many(mbedtls_mpi *arr, size_t size) { - while( size-- ) - mbedtls_mpi_free( arr++ ); + while (size--) { + mbedtls_mpi_free(arr++); + } } /* @@ -410,35 +390,33 @@ static const mbedtls_ecp_curve_info ecp_supported_curves[] = { MBEDTLS_ECP_DP_NONE, 0, 0, NULL }, }; -#define ECP_NB_CURVES sizeof( ecp_supported_curves ) / \ - sizeof( ecp_supported_curves[0] ) +#define ECP_NB_CURVES sizeof(ecp_supported_curves) / \ + sizeof(ecp_supported_curves[0]) static mbedtls_ecp_group_id ecp_supported_grp_id[ECP_NB_CURVES]; /* * List of supported curves and associated info */ -const mbedtls_ecp_curve_info *mbedtls_ecp_curve_list( void ) +const mbedtls_ecp_curve_info *mbedtls_ecp_curve_list(void) { - return( ecp_supported_curves ); + return ecp_supported_curves; } /* * List of supported curves, group ID only */ -const mbedtls_ecp_group_id *mbedtls_ecp_grp_id_list( void ) +const mbedtls_ecp_group_id *mbedtls_ecp_grp_id_list(void) { static int init_done = 0; - if( ! init_done ) - { + if (!init_done) { size_t i = 0; const mbedtls_ecp_curve_info *curve_info; - for( curve_info = mbedtls_ecp_curve_list(); + for (curve_info = mbedtls_ecp_curve_list(); curve_info->grp_id != MBEDTLS_ECP_DP_NONE; - curve_info++ ) - { + curve_info++) { ecp_supported_grp_id[i++] = curve_info->grp_id; } ecp_supported_grp_id[i] = MBEDTLS_ECP_DP_NONE; @@ -446,105 +424,104 @@ const mbedtls_ecp_group_id *mbedtls_ecp_grp_id_list( void ) init_done = 1; } - return( ecp_supported_grp_id ); + return ecp_supported_grp_id; } /* * Get the curve info for the internal identifier */ -const mbedtls_ecp_curve_info *mbedtls_ecp_curve_info_from_grp_id( mbedtls_ecp_group_id grp_id ) +const mbedtls_ecp_curve_info *mbedtls_ecp_curve_info_from_grp_id(mbedtls_ecp_group_id grp_id) { const mbedtls_ecp_curve_info *curve_info; - for( curve_info = mbedtls_ecp_curve_list(); + for (curve_info = mbedtls_ecp_curve_list(); curve_info->grp_id != MBEDTLS_ECP_DP_NONE; - curve_info++ ) - { - if( curve_info->grp_id == grp_id ) - return( curve_info ); + curve_info++) { + if (curve_info->grp_id == grp_id) { + return curve_info; + } } - return( NULL ); + return NULL; } /* * Get the curve info from the TLS identifier */ -const mbedtls_ecp_curve_info *mbedtls_ecp_curve_info_from_tls_id( uint16_t tls_id ) +const mbedtls_ecp_curve_info *mbedtls_ecp_curve_info_from_tls_id(uint16_t tls_id) { const mbedtls_ecp_curve_info *curve_info; - for( curve_info = mbedtls_ecp_curve_list(); + for (curve_info = mbedtls_ecp_curve_list(); curve_info->grp_id != MBEDTLS_ECP_DP_NONE; - curve_info++ ) - { - if( curve_info->tls_id == tls_id ) - return( curve_info ); + curve_info++) { + if (curve_info->tls_id == tls_id) { + return curve_info; + } } - return( NULL ); + return NULL; } /* * Get the curve info from the name */ -const mbedtls_ecp_curve_info *mbedtls_ecp_curve_info_from_name( const char *name ) +const mbedtls_ecp_curve_info *mbedtls_ecp_curve_info_from_name(const char *name) { const mbedtls_ecp_curve_info *curve_info; - if( name == NULL ) - return( NULL ); + if (name == NULL) { + return NULL; + } - for( curve_info = mbedtls_ecp_curve_list(); + for (curve_info = mbedtls_ecp_curve_list(); curve_info->grp_id != MBEDTLS_ECP_DP_NONE; - curve_info++ ) - { - if( strcmp( curve_info->name, name ) == 0 ) - return( curve_info ); + curve_info++) { + if (strcmp(curve_info->name, name) == 0) { + return curve_info; + } } - return( NULL ); + return NULL; } /* * Get the type of a curve */ -mbedtls_ecp_curve_type mbedtls_ecp_get_type( const mbedtls_ecp_group *grp ) +mbedtls_ecp_curve_type mbedtls_ecp_get_type(const mbedtls_ecp_group *grp) { - if( grp->G.X.p == NULL ) - return( MBEDTLS_ECP_TYPE_NONE ); + if (grp->G.X.p == NULL) { + return MBEDTLS_ECP_TYPE_NONE; + } - if( grp->G.Y.p == NULL ) - return( MBEDTLS_ECP_TYPE_MONTGOMERY ); - else - return( MBEDTLS_ECP_TYPE_SHORT_WEIERSTRASS ); + if (grp->G.Y.p == NULL) { + return MBEDTLS_ECP_TYPE_MONTGOMERY; + } else { + return MBEDTLS_ECP_TYPE_SHORT_WEIERSTRASS; + } } /* * Initialize (the components of) a point */ -void mbedtls_ecp_point_init( mbedtls_ecp_point *pt ) +void mbedtls_ecp_point_init(mbedtls_ecp_point *pt) { - ECP_VALIDATE( pt != NULL ); - - mbedtls_mpi_init( &pt->X ); - mbedtls_mpi_init( &pt->Y ); - mbedtls_mpi_init( &pt->Z ); + mbedtls_mpi_init(&pt->X); + mbedtls_mpi_init(&pt->Y); + mbedtls_mpi_init(&pt->Z); } /* * Initialize (the components of) a group */ -void mbedtls_ecp_group_init( mbedtls_ecp_group *grp ) +void mbedtls_ecp_group_init(mbedtls_ecp_group *grp) { - ECP_VALIDATE( grp != NULL ); - grp->id = MBEDTLS_ECP_DP_NONE; - mbedtls_mpi_init( &grp->P ); - mbedtls_mpi_init( &grp->A ); - mbedtls_mpi_init( &grp->B ); - mbedtls_ecp_point_init( &grp->G ); - mbedtls_mpi_init( &grp->N ); + mbedtls_mpi_init(&grp->P); + mbedtls_mpi_init(&grp->A); + mbedtls_mpi_init(&grp->B); + mbedtls_ecp_point_init(&grp->G); + mbedtls_mpi_init(&grp->N); grp->pbits = 0; grp->nbits = 0; grp->h = 0; @@ -559,32 +536,32 @@ void mbedtls_ecp_group_init( mbedtls_ecp_group *grp ) /* * Initialize (the components of) a key pair */ -void mbedtls_ecp_keypair_init( mbedtls_ecp_keypair *key ) +void mbedtls_ecp_keypair_init(mbedtls_ecp_keypair *key) { - ECP_VALIDATE( key != NULL ); - - mbedtls_ecp_group_init( &key->grp ); - mbedtls_mpi_init( &key->d ); - mbedtls_ecp_point_init( &key->Q ); + mbedtls_ecp_group_init(&key->grp); + mbedtls_mpi_init(&key->d); + mbedtls_ecp_point_init(&key->Q); } /* * Unallocate (the components of) a point */ -void mbedtls_ecp_point_free( mbedtls_ecp_point *pt ) +void mbedtls_ecp_point_free(mbedtls_ecp_point *pt) { - if( pt == NULL ) + if (pt == NULL) { return; + } - mbedtls_mpi_free( &( pt->X ) ); - mbedtls_mpi_free( &( pt->Y ) ); - mbedtls_mpi_free( &( pt->Z ) ); + mbedtls_mpi_free(&(pt->X)); + mbedtls_mpi_free(&(pt->Y)); + mbedtls_mpi_free(&(pt->Z)); } /* * Check that the comb table (grp->T) is static initialized. */ -static int ecp_group_is_static_comb_table( const mbedtls_ecp_group *grp ) { +static int ecp_group_is_static_comb_table(const mbedtls_ecp_group *grp) +{ #if MBEDTLS_ECP_FIXED_POINT_OPTIM == 1 return grp->T != NULL && grp->T_size == 0; #else @@ -596,272 +573,266 @@ static int ecp_group_is_static_comb_table( const mbedtls_ecp_group *grp ) { /* * Unallocate (the components of) a group */ -void mbedtls_ecp_group_free( mbedtls_ecp_group *grp ) +void mbedtls_ecp_group_free(mbedtls_ecp_group *grp) { size_t i; - if( grp == NULL ) + if (grp == NULL) { return; + } - if( grp->h != 1 ) - { - mbedtls_mpi_free( &grp->P ); - mbedtls_mpi_free( &grp->A ); - mbedtls_mpi_free( &grp->B ); - mbedtls_ecp_point_free( &grp->G ); - mbedtls_mpi_free( &grp->N ); + if (grp->h != 1) { + mbedtls_mpi_free(&grp->A); + mbedtls_mpi_free(&grp->B); + mbedtls_ecp_point_free(&grp->G); } - if( !ecp_group_is_static_comb_table(grp) && grp->T != NULL ) - { - for( i = 0; i < grp->T_size; i++ ) - mbedtls_ecp_point_free( &grp->T[i] ); - mbedtls_free( grp->T ); + if (!ecp_group_is_static_comb_table(grp) && grp->T != NULL) { + for (i = 0; i < grp->T_size; i++) { + mbedtls_ecp_point_free(&grp->T[i]); + } + mbedtls_free(grp->T); } - mbedtls_platform_zeroize( grp, sizeof( mbedtls_ecp_group ) ); + mbedtls_platform_zeroize(grp, sizeof(mbedtls_ecp_group)); } /* * Unallocate (the components of) a key pair */ -void mbedtls_ecp_keypair_free( mbedtls_ecp_keypair *key ) +void mbedtls_ecp_keypair_free(mbedtls_ecp_keypair *key) { - if( key == NULL ) + if (key == NULL) { return; + } - mbedtls_ecp_group_free( &key->grp ); - mbedtls_mpi_free( &key->d ); - mbedtls_ecp_point_free( &key->Q ); + mbedtls_ecp_group_free(&key->grp); + mbedtls_mpi_free(&key->d); + mbedtls_ecp_point_free(&key->Q); } /* * Copy the contents of a point */ -int mbedtls_ecp_copy( mbedtls_ecp_point *P, const mbedtls_ecp_point *Q ) +int mbedtls_ecp_copy(mbedtls_ecp_point *P, const mbedtls_ecp_point *Q) { int ret = MBEDTLS_ERR_ERROR_CORRUPTION_DETECTED; - ECP_VALIDATE_RET( P != NULL ); - ECP_VALIDATE_RET( Q != NULL ); - - MBEDTLS_MPI_CHK( mbedtls_mpi_copy( &P->X, &Q->X ) ); - MBEDTLS_MPI_CHK( mbedtls_mpi_copy( &P->Y, &Q->Y ) ); - MBEDTLS_MPI_CHK( mbedtls_mpi_copy( &P->Z, &Q->Z ) ); + MBEDTLS_MPI_CHK(mbedtls_mpi_copy(&P->X, &Q->X)); + MBEDTLS_MPI_CHK(mbedtls_mpi_copy(&P->Y, &Q->Y)); + MBEDTLS_MPI_CHK(mbedtls_mpi_copy(&P->Z, &Q->Z)); cleanup: - return( ret ); + return ret; } /* * Copy the contents of a group object */ -int mbedtls_ecp_group_copy( mbedtls_ecp_group *dst, const mbedtls_ecp_group *src ) +int mbedtls_ecp_group_copy(mbedtls_ecp_group *dst, const mbedtls_ecp_group *src) { - ECP_VALIDATE_RET( dst != NULL ); - ECP_VALIDATE_RET( src != NULL ); - - return( mbedtls_ecp_group_load( dst, src->id ) ); + return mbedtls_ecp_group_load(dst, src->id); } /* * Set point to zero */ -int mbedtls_ecp_set_zero( mbedtls_ecp_point *pt ) +int mbedtls_ecp_set_zero(mbedtls_ecp_point *pt) { int ret = MBEDTLS_ERR_ERROR_CORRUPTION_DETECTED; - ECP_VALIDATE_RET( pt != NULL ); - - MBEDTLS_MPI_CHK( mbedtls_mpi_lset( &pt->X , 1 ) ); - MBEDTLS_MPI_CHK( mbedtls_mpi_lset( &pt->Y , 1 ) ); - MBEDTLS_MPI_CHK( mbedtls_mpi_lset( &pt->Z , 0 ) ); + MBEDTLS_MPI_CHK(mbedtls_mpi_lset(&pt->X, 1)); + MBEDTLS_MPI_CHK(mbedtls_mpi_lset(&pt->Y, 1)); + MBEDTLS_MPI_CHK(mbedtls_mpi_lset(&pt->Z, 0)); cleanup: - return( ret ); + return ret; } /* * Tell if a point is zero */ -int mbedtls_ecp_is_zero( mbedtls_ecp_point *pt ) +int mbedtls_ecp_is_zero(mbedtls_ecp_point *pt) { - ECP_VALIDATE_RET( pt != NULL ); - - return( mbedtls_mpi_cmp_int( &pt->Z, 0 ) == 0 ); + return mbedtls_mpi_cmp_int(&pt->Z, 0) == 0; } /* * Compare two points lazily */ -int mbedtls_ecp_point_cmp( const mbedtls_ecp_point *P, - const mbedtls_ecp_point *Q ) +int mbedtls_ecp_point_cmp(const mbedtls_ecp_point *P, + const mbedtls_ecp_point *Q) { - ECP_VALIDATE_RET( P != NULL ); - ECP_VALIDATE_RET( Q != NULL ); - - if( mbedtls_mpi_cmp_mpi( &P->X, &Q->X ) == 0 && - mbedtls_mpi_cmp_mpi( &P->Y, &Q->Y ) == 0 && - mbedtls_mpi_cmp_mpi( &P->Z, &Q->Z ) == 0 ) - { - return( 0 ); + if (mbedtls_mpi_cmp_mpi(&P->X, &Q->X) == 0 && + mbedtls_mpi_cmp_mpi(&P->Y, &Q->Y) == 0 && + mbedtls_mpi_cmp_mpi(&P->Z, &Q->Z) == 0) { + return 0; } - return( MBEDTLS_ERR_ECP_BAD_INPUT_DATA ); + return MBEDTLS_ERR_ECP_BAD_INPUT_DATA; } /* * Import a non-zero point from ASCII strings */ -int mbedtls_ecp_point_read_string( mbedtls_ecp_point *P, int radix, - const char *x, const char *y ) +int mbedtls_ecp_point_read_string(mbedtls_ecp_point *P, int radix, + const char *x, const char *y) { int ret = MBEDTLS_ERR_ERROR_CORRUPTION_DETECTED; - ECP_VALIDATE_RET( P != NULL ); - ECP_VALIDATE_RET( x != NULL ); - ECP_VALIDATE_RET( y != NULL ); - - MBEDTLS_MPI_CHK( mbedtls_mpi_read_string( &P->X, radix, x ) ); - MBEDTLS_MPI_CHK( mbedtls_mpi_read_string( &P->Y, radix, y ) ); - MBEDTLS_MPI_CHK( mbedtls_mpi_lset( &P->Z, 1 ) ); + MBEDTLS_MPI_CHK(mbedtls_mpi_read_string(&P->X, radix, x)); + MBEDTLS_MPI_CHK(mbedtls_mpi_read_string(&P->Y, radix, y)); + MBEDTLS_MPI_CHK(mbedtls_mpi_lset(&P->Z, 1)); cleanup: - return( ret ); + return ret; } /* * Export a point into unsigned binary data (SEC1 2.3.3 and RFC7748) */ -int mbedtls_ecp_point_write_binary( const mbedtls_ecp_group *grp, - const mbedtls_ecp_point *P, - int format, size_t *olen, - unsigned char *buf, size_t buflen ) +int mbedtls_ecp_point_write_binary(const mbedtls_ecp_group *grp, + const mbedtls_ecp_point *P, + int format, size_t *olen, + unsigned char *buf, size_t buflen) { int ret = MBEDTLS_ERR_ECP_FEATURE_UNAVAILABLE; size_t plen; - ECP_VALIDATE_RET( grp != NULL ); - ECP_VALIDATE_RET( P != NULL ); - ECP_VALIDATE_RET( olen != NULL ); - ECP_VALIDATE_RET( buf != NULL ); - ECP_VALIDATE_RET( format == MBEDTLS_ECP_PF_UNCOMPRESSED || - format == MBEDTLS_ECP_PF_COMPRESSED ); + if (format != MBEDTLS_ECP_PF_UNCOMPRESSED && + format != MBEDTLS_ECP_PF_COMPRESSED) { + return MBEDTLS_ERR_ECP_BAD_INPUT_DATA; + } - plen = mbedtls_mpi_size( &grp->P ); + plen = mbedtls_mpi_size(&grp->P); #if defined(MBEDTLS_ECP_MONTGOMERY_ENABLED) (void) format; /* Montgomery curves always use the same point format */ - if( mbedtls_ecp_get_type( grp ) == MBEDTLS_ECP_TYPE_MONTGOMERY ) - { + if (mbedtls_ecp_get_type(grp) == MBEDTLS_ECP_TYPE_MONTGOMERY) { *olen = plen; - if( buflen < *olen ) - return( MBEDTLS_ERR_ECP_BUFFER_TOO_SMALL ); + if (buflen < *olen) { + return MBEDTLS_ERR_ECP_BUFFER_TOO_SMALL; + } - MBEDTLS_MPI_CHK( mbedtls_mpi_write_binary_le( &P->X, buf, plen ) ); + MBEDTLS_MPI_CHK(mbedtls_mpi_write_binary_le(&P->X, buf, plen)); } #endif #if defined(MBEDTLS_ECP_SHORT_WEIERSTRASS_ENABLED) - if( mbedtls_ecp_get_type( grp ) == MBEDTLS_ECP_TYPE_SHORT_WEIERSTRASS ) - { + if (mbedtls_ecp_get_type(grp) == MBEDTLS_ECP_TYPE_SHORT_WEIERSTRASS) { /* * Common case: P == 0 */ - if( mbedtls_mpi_cmp_int( &P->Z, 0 ) == 0 ) - { - if( buflen < 1 ) - return( MBEDTLS_ERR_ECP_BUFFER_TOO_SMALL ); + if (mbedtls_mpi_cmp_int(&P->Z, 0) == 0) { + if (buflen < 1) { + return MBEDTLS_ERR_ECP_BUFFER_TOO_SMALL; + } buf[0] = 0x00; *olen = 1; - return( 0 ); + return 0; } - if( format == MBEDTLS_ECP_PF_UNCOMPRESSED ) - { + if (format == MBEDTLS_ECP_PF_UNCOMPRESSED) { *olen = 2 * plen + 1; - if( buflen < *olen ) - return( MBEDTLS_ERR_ECP_BUFFER_TOO_SMALL ); + if (buflen < *olen) { + return MBEDTLS_ERR_ECP_BUFFER_TOO_SMALL; + } buf[0] = 0x04; - MBEDTLS_MPI_CHK( mbedtls_mpi_write_binary( &P->X, buf + 1, plen ) ); - MBEDTLS_MPI_CHK( mbedtls_mpi_write_binary( &P->Y, buf + 1 + plen, plen ) ); - } - else if( format == MBEDTLS_ECP_PF_COMPRESSED ) - { + MBEDTLS_MPI_CHK(mbedtls_mpi_write_binary(&P->X, buf + 1, plen)); + MBEDTLS_MPI_CHK(mbedtls_mpi_write_binary(&P->Y, buf + 1 + plen, plen)); + } else if (format == MBEDTLS_ECP_PF_COMPRESSED) { *olen = plen + 1; - if( buflen < *olen ) - return( MBEDTLS_ERR_ECP_BUFFER_TOO_SMALL ); + if (buflen < *olen) { + return MBEDTLS_ERR_ECP_BUFFER_TOO_SMALL; + } - buf[0] = 0x02 + mbedtls_mpi_get_bit( &P->Y, 0 ); - MBEDTLS_MPI_CHK( mbedtls_mpi_write_binary( &P->X, buf + 1, plen ) ); + buf[0] = 0x02 + mbedtls_mpi_get_bit(&P->Y, 0); + MBEDTLS_MPI_CHK(mbedtls_mpi_write_binary(&P->X, buf + 1, plen)); } } #endif cleanup: - return( ret ); + return ret; } +#if defined(MBEDTLS_ECP_SHORT_WEIERSTRASS_ENABLED) +static int mbedtls_ecp_sw_derive_y(const mbedtls_ecp_group *grp, + const mbedtls_mpi *X, + mbedtls_mpi *Y, + int parity_bit); +#endif /* MBEDTLS_ECP_SHORT_WEIERSTRASS_ENABLED */ + /* * Import a point from unsigned binary data (SEC1 2.3.4 and RFC7748) */ -int mbedtls_ecp_point_read_binary( const mbedtls_ecp_group *grp, - mbedtls_ecp_point *pt, - const unsigned char *buf, size_t ilen ) +int mbedtls_ecp_point_read_binary(const mbedtls_ecp_group *grp, + mbedtls_ecp_point *pt, + const unsigned char *buf, size_t ilen) { int ret = MBEDTLS_ERR_ECP_FEATURE_UNAVAILABLE; size_t plen; - ECP_VALIDATE_RET( grp != NULL ); - ECP_VALIDATE_RET( pt != NULL ); - ECP_VALIDATE_RET( buf != NULL ); - - if( ilen < 1 ) - return( MBEDTLS_ERR_ECP_BAD_INPUT_DATA ); + if (ilen < 1) { + return MBEDTLS_ERR_ECP_BAD_INPUT_DATA; + } - plen = mbedtls_mpi_size( &grp->P ); + plen = mbedtls_mpi_size(&grp->P); #if defined(MBEDTLS_ECP_MONTGOMERY_ENABLED) - if( mbedtls_ecp_get_type( grp ) == MBEDTLS_ECP_TYPE_MONTGOMERY ) - { - if( plen != ilen ) - return( MBEDTLS_ERR_ECP_BAD_INPUT_DATA ); + if (mbedtls_ecp_get_type(grp) == MBEDTLS_ECP_TYPE_MONTGOMERY) { + if (plen != ilen) { + return MBEDTLS_ERR_ECP_BAD_INPUT_DATA; + } - MBEDTLS_MPI_CHK( mbedtls_mpi_read_binary_le( &pt->X, buf, plen ) ); - mbedtls_mpi_free( &pt->Y ); + MBEDTLS_MPI_CHK(mbedtls_mpi_read_binary_le(&pt->X, buf, plen)); + mbedtls_mpi_free(&pt->Y); - if( grp->id == MBEDTLS_ECP_DP_CURVE25519 ) + if (grp->id == MBEDTLS_ECP_DP_CURVE25519) { /* Set most significant bit to 0 as prescribed in RFC7748 §5 */ - MBEDTLS_MPI_CHK( mbedtls_mpi_set_bit( &pt->X, plen * 8 - 1, 0 ) ); + MBEDTLS_MPI_CHK(mbedtls_mpi_set_bit(&pt->X, plen * 8 - 1, 0)); + } - MBEDTLS_MPI_CHK( mbedtls_mpi_lset( &pt->Z, 1 ) ); + MBEDTLS_MPI_CHK(mbedtls_mpi_lset(&pt->Z, 1)); } #endif #if defined(MBEDTLS_ECP_SHORT_WEIERSTRASS_ENABLED) - if( mbedtls_ecp_get_type( grp ) == MBEDTLS_ECP_TYPE_SHORT_WEIERSTRASS ) - { - if( buf[0] == 0x00 ) - { - if( ilen == 1 ) - return( mbedtls_ecp_set_zero( pt ) ); - else - return( MBEDTLS_ERR_ECP_BAD_INPUT_DATA ); + if (mbedtls_ecp_get_type(grp) == MBEDTLS_ECP_TYPE_SHORT_WEIERSTRASS) { + if (buf[0] == 0x00) { + if (ilen == 1) { + return mbedtls_ecp_set_zero(pt); + } else { + return MBEDTLS_ERR_ECP_BAD_INPUT_DATA; + } } - if( buf[0] != 0x04 ) - return( MBEDTLS_ERR_ECP_FEATURE_UNAVAILABLE ); - - if( ilen != 2 * plen + 1 ) - return( MBEDTLS_ERR_ECP_BAD_INPUT_DATA ); + if (ilen < 1 + plen) { + return MBEDTLS_ERR_ECP_BAD_INPUT_DATA; + } - MBEDTLS_MPI_CHK( mbedtls_mpi_read_binary( &pt->X, buf + 1, plen ) ); - MBEDTLS_MPI_CHK( mbedtls_mpi_read_binary( &pt->Y, - buf + 1 + plen, plen ) ); - MBEDTLS_MPI_CHK( mbedtls_mpi_lset( &pt->Z, 1 ) ); + MBEDTLS_MPI_CHK(mbedtls_mpi_read_binary(&pt->X, buf + 1, plen)); + MBEDTLS_MPI_CHK(mbedtls_mpi_lset(&pt->Z, 1)); + + if (buf[0] == 0x04) { + /* format == MBEDTLS_ECP_PF_UNCOMPRESSED */ + if (ilen != 1 + plen * 2) { + return MBEDTLS_ERR_ECP_BAD_INPUT_DATA; + } + return mbedtls_mpi_read_binary(&pt->Y, buf + 1 + plen, plen); + } else if (buf[0] == 0x02 || buf[0] == 0x03) { + /* format == MBEDTLS_ECP_PF_COMPRESSED */ + if (ilen != 1 + plen) { + return MBEDTLS_ERR_ECP_BAD_INPUT_DATA; + } + return mbedtls_ecp_sw_derive_y(grp, &pt->X, &pt->Y, + (buf[0] & 1)); + } else { + return MBEDTLS_ERR_ECP_BAD_INPUT_DATA; + } } #endif cleanup: - return( ret ); + return ret; } /* @@ -870,26 +841,23 @@ int mbedtls_ecp_point_read_binary( const mbedtls_ecp_group *grp, * opaque point <1..2^8-1>; * } ECPoint; */ -int mbedtls_ecp_tls_read_point( const mbedtls_ecp_group *grp, - mbedtls_ecp_point *pt, - const unsigned char **buf, size_t buf_len ) +int mbedtls_ecp_tls_read_point(const mbedtls_ecp_group *grp, + mbedtls_ecp_point *pt, + const unsigned char **buf, size_t buf_len) { unsigned char data_len; const unsigned char *buf_start; - ECP_VALIDATE_RET( grp != NULL ); - ECP_VALIDATE_RET( pt != NULL ); - ECP_VALIDATE_RET( buf != NULL ); - ECP_VALIDATE_RET( *buf != NULL ); - /* * We must have at least two bytes (1 for length, at least one for data) */ - if( buf_len < 2 ) - return( MBEDTLS_ERR_ECP_BAD_INPUT_DATA ); + if (buf_len < 2) { + return MBEDTLS_ERR_ECP_BAD_INPUT_DATA; + } data_len = *(*buf)++; - if( data_len < 1 || data_len > buf_len - 1 ) - return( MBEDTLS_ERR_ECP_BAD_INPUT_DATA ); + if (data_len < 1 || data_len > buf_len - 1) { + return MBEDTLS_ERR_ECP_BAD_INPUT_DATA; + } /* * Save buffer start for read_binary and update buf @@ -897,7 +865,7 @@ int mbedtls_ecp_tls_read_point( const mbedtls_ecp_group *grp, buf_start = *buf; *buf += data_len; - return( mbedtls_ecp_point_read_binary( grp, pt, buf_start, data_len ) ); + return mbedtls_ecp_point_read_binary(grp, pt, buf_start, data_len); } /* @@ -906,27 +874,27 @@ int mbedtls_ecp_tls_read_point( const mbedtls_ecp_group *grp, * opaque point <1..2^8-1>; * } ECPoint; */ -int mbedtls_ecp_tls_write_point( const mbedtls_ecp_group *grp, const mbedtls_ecp_point *pt, - int format, size_t *olen, - unsigned char *buf, size_t blen ) +int mbedtls_ecp_tls_write_point(const mbedtls_ecp_group *grp, const mbedtls_ecp_point *pt, + int format, size_t *olen, + unsigned char *buf, size_t blen) { int ret = MBEDTLS_ERR_ERROR_CORRUPTION_DETECTED; - ECP_VALIDATE_RET( grp != NULL ); - ECP_VALIDATE_RET( pt != NULL ); - ECP_VALIDATE_RET( olen != NULL ); - ECP_VALIDATE_RET( buf != NULL ); - ECP_VALIDATE_RET( format == MBEDTLS_ECP_PF_UNCOMPRESSED || - format == MBEDTLS_ECP_PF_COMPRESSED ); + if (format != MBEDTLS_ECP_PF_UNCOMPRESSED && + format != MBEDTLS_ECP_PF_COMPRESSED) { + return MBEDTLS_ERR_ECP_BAD_INPUT_DATA; + } /* * buffer length must be at least one, for our length byte */ - if( blen < 1 ) - return( MBEDTLS_ERR_ECP_BAD_INPUT_DATA ); + if (blen < 1) { + return MBEDTLS_ERR_ECP_BAD_INPUT_DATA; + } - if( ( ret = mbedtls_ecp_point_write_binary( grp, pt, format, - olen, buf + 1, blen - 1) ) != 0 ) - return( ret ); + if ((ret = mbedtls_ecp_point_write_binary(grp, pt, format, + olen, buf + 1, blen - 1)) != 0) { + return ret; + } /* * write length to the first byte and update total length @@ -934,51 +902,46 @@ int mbedtls_ecp_tls_write_point( const mbedtls_ecp_group *grp, const mbedtls_ecp buf[0] = (unsigned char) *olen; ++*olen; - return( 0 ); + return 0; } /* * Set a group from an ECParameters record (RFC 4492) */ -int mbedtls_ecp_tls_read_group( mbedtls_ecp_group *grp, - const unsigned char **buf, size_t len ) +int mbedtls_ecp_tls_read_group(mbedtls_ecp_group *grp, + const unsigned char **buf, size_t len) { int ret = MBEDTLS_ERR_ERROR_CORRUPTION_DETECTED; mbedtls_ecp_group_id grp_id; - ECP_VALIDATE_RET( grp != NULL ); - ECP_VALIDATE_RET( buf != NULL ); - ECP_VALIDATE_RET( *buf != NULL ); - - if( ( ret = mbedtls_ecp_tls_read_group_id( &grp_id, buf, len ) ) != 0 ) - return( ret ); + if ((ret = mbedtls_ecp_tls_read_group_id(&grp_id, buf, len)) != 0) { + return ret; + } - return( mbedtls_ecp_group_load( grp, grp_id ) ); + return mbedtls_ecp_group_load(grp, grp_id); } /* * Read a group id from an ECParameters record (RFC 4492) and convert it to * mbedtls_ecp_group_id. */ -int mbedtls_ecp_tls_read_group_id( mbedtls_ecp_group_id *grp, - const unsigned char **buf, size_t len ) +int mbedtls_ecp_tls_read_group_id(mbedtls_ecp_group_id *grp, + const unsigned char **buf, size_t len) { uint16_t tls_id; const mbedtls_ecp_curve_info *curve_info; - ECP_VALIDATE_RET( grp != NULL ); - ECP_VALIDATE_RET( buf != NULL ); - ECP_VALIDATE_RET( *buf != NULL ); - /* * We expect at least three bytes (see below) */ - if( len < 3 ) - return( MBEDTLS_ERR_ECP_BAD_INPUT_DATA ); + if (len < 3) { + return MBEDTLS_ERR_ECP_BAD_INPUT_DATA; + } /* * First byte is curve_type; only named_curve is handled */ - if( *(*buf)++ != MBEDTLS_ECP_TLS_NAMED_CURVE ) - return( MBEDTLS_ERR_ECP_BAD_INPUT_DATA ); + if (*(*buf)++ != MBEDTLS_ECP_TLS_NAMED_CURVE) { + return MBEDTLS_ERR_ECP_BAD_INPUT_DATA; + } /* * Next two bytes are the namedcurve value @@ -987,34 +950,33 @@ int mbedtls_ecp_tls_read_group_id( mbedtls_ecp_group_id *grp, tls_id <<= 8; tls_id |= *(*buf)++; - if( ( curve_info = mbedtls_ecp_curve_info_from_tls_id( tls_id ) ) == NULL ) - return( MBEDTLS_ERR_ECP_FEATURE_UNAVAILABLE ); + if ((curve_info = mbedtls_ecp_curve_info_from_tls_id(tls_id)) == NULL) { + return MBEDTLS_ERR_ECP_FEATURE_UNAVAILABLE; + } *grp = curve_info->grp_id; - return( 0 ); + return 0; } /* * Write the ECParameters record corresponding to a group (RFC 4492) */ -int mbedtls_ecp_tls_write_group( const mbedtls_ecp_group *grp, size_t *olen, - unsigned char *buf, size_t blen ) +int mbedtls_ecp_tls_write_group(const mbedtls_ecp_group *grp, size_t *olen, + unsigned char *buf, size_t blen) { const mbedtls_ecp_curve_info *curve_info; - ECP_VALIDATE_RET( grp != NULL ); - ECP_VALIDATE_RET( buf != NULL ); - ECP_VALIDATE_RET( olen != NULL ); - - if( ( curve_info = mbedtls_ecp_curve_info_from_grp_id( grp->id ) ) == NULL ) - return( MBEDTLS_ERR_ECP_BAD_INPUT_DATA ); + if ((curve_info = mbedtls_ecp_curve_info_from_grp_id(grp->id)) == NULL) { + return MBEDTLS_ERR_ECP_BAD_INPUT_DATA; + } /* * We are going to write 3 bytes (see below) */ *olen = 3; - if( blen < *olen ) - return( MBEDTLS_ERR_ECP_BUFFER_TOO_SMALL ); + if (blen < *olen) { + return MBEDTLS_ERR_ECP_BUFFER_TOO_SMALL; + } /* * First byte is curve_type, always named_curve @@ -1024,9 +986,9 @@ int mbedtls_ecp_tls_write_group( const mbedtls_ecp_group *grp, size_t *olen, /* * Next two bytes are the namedcurve value */ - MBEDTLS_PUT_UINT16_BE( curve_info->tls_id, buf, 0 ); + MBEDTLS_PUT_UINT16_BE(curve_info->tls_id, buf, 0); - return( 0 ); + return 0; } /* @@ -1035,32 +997,34 @@ int mbedtls_ecp_tls_write_group( const mbedtls_ecp_group *grp, size_t *olen, * * This function is in the critial loop for mbedtls_ecp_mul, so pay attention to perf. */ -static int ecp_modp( mbedtls_mpi *N, const mbedtls_ecp_group *grp ) +static int ecp_modp(mbedtls_mpi *N, const mbedtls_ecp_group *grp) { int ret = MBEDTLS_ERR_ERROR_CORRUPTION_DETECTED; - if( grp->modp == NULL ) - return( mbedtls_mpi_mod_mpi( N, N, &grp->P ) ); + if (grp->modp == NULL) { + return mbedtls_mpi_mod_mpi(N, N, &grp->P); + } /* N->s < 0 is a much faster test, which fails only if N is 0 */ - if( ( N->s < 0 && mbedtls_mpi_cmp_int( N, 0 ) != 0 ) || - mbedtls_mpi_bitlen( N ) > 2 * grp->pbits ) - { - return( MBEDTLS_ERR_ECP_BAD_INPUT_DATA ); + if ((N->s < 0 && mbedtls_mpi_cmp_int(N, 0) != 0) || + mbedtls_mpi_bitlen(N) > 2 * grp->pbits) { + return MBEDTLS_ERR_ECP_BAD_INPUT_DATA; } - MBEDTLS_MPI_CHK( grp->modp( N ) ); + MBEDTLS_MPI_CHK(grp->modp(N)); /* N->s < 0 is a much faster test, which fails only if N is 0 */ - while( N->s < 0 && mbedtls_mpi_cmp_int( N, 0 ) != 0 ) - MBEDTLS_MPI_CHK( mbedtls_mpi_add_mpi( N, N, &grp->P ) ); + while (N->s < 0 && mbedtls_mpi_cmp_int(N, 0) != 0) { + MBEDTLS_MPI_CHK(mbedtls_mpi_add_mpi(N, N, &grp->P)); + } - while( mbedtls_mpi_cmp_mpi( N, &grp->P ) >= 0 ) + while (mbedtls_mpi_cmp_mpi(N, &grp->P) >= 0) { /* we known P, N and the result are positive */ - MBEDTLS_MPI_CHK( mbedtls_mpi_sub_abs( N, N, &grp->P ) ); + MBEDTLS_MPI_CHK(mbedtls_mpi_sub_abs(N, N, &grp->P)); + } cleanup: - return( ret ); + return ret; } /* @@ -1082,52 +1046,52 @@ static int ecp_modp( mbedtls_mpi *N, const mbedtls_ecp_group *grp ) #define INC_MUL_COUNT #endif -#define MOD_MUL( N ) \ +#define MOD_MUL(N) \ do \ { \ - MBEDTLS_MPI_CHK( ecp_modp( &(N), grp ) ); \ + MBEDTLS_MPI_CHK(ecp_modp(&(N), grp)); \ INC_MUL_COUNT \ - } while( 0 ) + } while (0) -static inline int mbedtls_mpi_mul_mod( const mbedtls_ecp_group *grp, - mbedtls_mpi *X, - const mbedtls_mpi *A, - const mbedtls_mpi *B ) +static inline int mbedtls_mpi_mul_mod(const mbedtls_ecp_group *grp, + mbedtls_mpi *X, + const mbedtls_mpi *A, + const mbedtls_mpi *B) { int ret = MBEDTLS_ERR_ERROR_CORRUPTION_DETECTED; - MBEDTLS_MPI_CHK( mbedtls_mpi_mul_mpi( X, A, B ) ); - MOD_MUL( *X ); + MBEDTLS_MPI_CHK(mbedtls_mpi_mul_mpi(X, A, B)); + MOD_MUL(*X); cleanup: - return( ret ); + return ret; } /* * Reduce a mbedtls_mpi mod p in-place, to use after mbedtls_mpi_sub_mpi * N->s < 0 is a very fast test, which fails only if N is 0 */ -#define MOD_SUB( N ) \ +#define MOD_SUB(N) \ do { \ - while( (N)->s < 0 && mbedtls_mpi_cmp_int( (N), 0 ) != 0 ) \ - MBEDTLS_MPI_CHK( mbedtls_mpi_add_mpi( (N), (N), &grp->P ) ); \ - } while( 0 ) - -#if ( defined(MBEDTLS_ECP_SHORT_WEIERSTRASS_ENABLED) && \ - !( defined(MBEDTLS_ECP_NO_FALLBACK) && \ - defined(MBEDTLS_ECP_DOUBLE_JAC_ALT) && \ - defined(MBEDTLS_ECP_ADD_MIXED_ALT) ) ) || \ - ( defined(MBEDTLS_ECP_MONTGOMERY_ENABLED) && \ - !( defined(MBEDTLS_ECP_NO_FALLBACK) && \ - defined(MBEDTLS_ECP_DOUBLE_ADD_MXZ_ALT) ) ) -static inline int mbedtls_mpi_sub_mod( const mbedtls_ecp_group *grp, - mbedtls_mpi *X, - const mbedtls_mpi *A, - const mbedtls_mpi *B ) + while ((N)->s < 0 && mbedtls_mpi_cmp_int((N), 0) != 0) \ + MBEDTLS_MPI_CHK(mbedtls_mpi_add_mpi((N), (N), &grp->P)); \ + } while (0) + +#if (defined(MBEDTLS_ECP_SHORT_WEIERSTRASS_ENABLED) && \ + !(defined(MBEDTLS_ECP_NO_FALLBACK) && \ + defined(MBEDTLS_ECP_DOUBLE_JAC_ALT) && \ + defined(MBEDTLS_ECP_ADD_MIXED_ALT))) || \ + (defined(MBEDTLS_ECP_MONTGOMERY_ENABLED) && \ + !(defined(MBEDTLS_ECP_NO_FALLBACK) && \ + defined(MBEDTLS_ECP_DOUBLE_ADD_MXZ_ALT))) +static inline int mbedtls_mpi_sub_mod(const mbedtls_ecp_group *grp, + mbedtls_mpi *X, + const mbedtls_mpi *A, + const mbedtls_mpi *B) { int ret = MBEDTLS_ERR_ERROR_CORRUPTION_DETECTED; - MBEDTLS_MPI_CHK( mbedtls_mpi_sub_mpi( X, A, B ) ); - MOD_SUB( X ); + MBEDTLS_MPI_CHK(mbedtls_mpi_sub_mpi(X, A, B)); + MOD_SUB(X); cleanup: - return( ret ); + return ret; } #endif /* All functions referencing mbedtls_mpi_sub_mod() are alt-implemented without fallback */ @@ -1136,66 +1100,67 @@ static inline int mbedtls_mpi_sub_mod( const mbedtls_ecp_group *grp, * We known P, N and the result are positive, so sub_abs is correct, and * a bit faster. */ -#define MOD_ADD( N ) \ - while( mbedtls_mpi_cmp_mpi( (N), &grp->P ) >= 0 ) \ - MBEDTLS_MPI_CHK( mbedtls_mpi_sub_abs( (N), (N), &grp->P ) ) +#define MOD_ADD(N) \ + while (mbedtls_mpi_cmp_mpi((N), &grp->P) >= 0) \ + MBEDTLS_MPI_CHK(mbedtls_mpi_sub_abs((N), (N), &grp->P)) -static inline int mbedtls_mpi_add_mod( const mbedtls_ecp_group *grp, - mbedtls_mpi *X, - const mbedtls_mpi *A, - const mbedtls_mpi *B ) +static inline int mbedtls_mpi_add_mod(const mbedtls_ecp_group *grp, + mbedtls_mpi *X, + const mbedtls_mpi *A, + const mbedtls_mpi *B) { int ret = MBEDTLS_ERR_ERROR_CORRUPTION_DETECTED; - MBEDTLS_MPI_CHK( mbedtls_mpi_add_mpi( X, A, B ) ); - MOD_ADD( X ); + MBEDTLS_MPI_CHK(mbedtls_mpi_add_mpi(X, A, B)); + MOD_ADD(X); cleanup: - return( ret ); + return ret; } -static inline int mbedtls_mpi_mul_int_mod( const mbedtls_ecp_group *grp, - mbedtls_mpi *X, - const mbedtls_mpi *A, - mbedtls_mpi_uint c ) +static inline int mbedtls_mpi_mul_int_mod(const mbedtls_ecp_group *grp, + mbedtls_mpi *X, + const mbedtls_mpi *A, + mbedtls_mpi_uint c) { int ret = MBEDTLS_ERR_ERROR_CORRUPTION_DETECTED; - MBEDTLS_MPI_CHK( mbedtls_mpi_mul_int( X, A, c ) ); - MOD_ADD( X ); + MBEDTLS_MPI_CHK(mbedtls_mpi_mul_int(X, A, c)); + MOD_ADD(X); cleanup: - return( ret ); + return ret; } -static inline int mbedtls_mpi_sub_int_mod( const mbedtls_ecp_group *grp, - mbedtls_mpi *X, - const mbedtls_mpi *A, - mbedtls_mpi_uint c ) +static inline int mbedtls_mpi_sub_int_mod(const mbedtls_ecp_group *grp, + mbedtls_mpi *X, + const mbedtls_mpi *A, + mbedtls_mpi_uint c) { int ret = MBEDTLS_ERR_ERROR_CORRUPTION_DETECTED; - MBEDTLS_MPI_CHK( mbedtls_mpi_sub_int( X, A, c ) ); - MOD_SUB( X ); + MBEDTLS_MPI_CHK(mbedtls_mpi_sub_int(X, A, c)); + MOD_SUB(X); cleanup: - return( ret ); + return ret; } -#define MPI_ECP_SUB_INT( X, A, c ) \ - MBEDTLS_MPI_CHK( mbedtls_mpi_sub_int_mod( grp, X, A, c ) ) +#define MPI_ECP_SUB_INT(X, A, c) \ + MBEDTLS_MPI_CHK(mbedtls_mpi_sub_int_mod(grp, X, A, c)) #if defined(MBEDTLS_ECP_SHORT_WEIERSTRASS_ENABLED) && \ - !( defined(MBEDTLS_ECP_NO_FALLBACK) && \ - defined(MBEDTLS_ECP_DOUBLE_JAC_ALT) && \ - defined(MBEDTLS_ECP_ADD_MIXED_ALT) ) -static inline int mbedtls_mpi_shift_l_mod( const mbedtls_ecp_group *grp, - mbedtls_mpi *X, - size_t count ) + !(defined(MBEDTLS_ECP_NO_FALLBACK) && \ + defined(MBEDTLS_ECP_DOUBLE_JAC_ALT) && \ + defined(MBEDTLS_ECP_ADD_MIXED_ALT)) +static inline int mbedtls_mpi_shift_l_mod(const mbedtls_ecp_group *grp, + mbedtls_mpi *X, + size_t count) { int ret = MBEDTLS_ERR_ERROR_CORRUPTION_DETECTED; - MBEDTLS_MPI_CHK( mbedtls_mpi_shift_l( X, count ) ); - MOD_ADD( X ); + MBEDTLS_MPI_CHK(mbedtls_mpi_shift_l(X, count)); + MOD_ADD(X); cleanup: - return( ret ); + return ret; } -#endif /* All functions referencing mbedtls_mpi_shift_l_mod() are alt-implemented without fallback */ +#endif \ + /* All functions referencing mbedtls_mpi_shift_l_mod() are alt-implemented without fallback */ /* * Macro wrappers around ECP modular arithmetic @@ -1203,66 +1168,145 @@ static inline int mbedtls_mpi_shift_l_mod( const mbedtls_ecp_group *grp, * Currently, these wrappers are defined via the bignum module. */ -#define MPI_ECP_ADD( X, A, B ) \ - MBEDTLS_MPI_CHK( mbedtls_mpi_add_mod( grp, X, A, B ) ) +#define MPI_ECP_ADD(X, A, B) \ + MBEDTLS_MPI_CHK(mbedtls_mpi_add_mod(grp, X, A, B)) -#define MPI_ECP_SUB( X, A, B ) \ - MBEDTLS_MPI_CHK( mbedtls_mpi_sub_mod( grp, X, A, B ) ) +#define MPI_ECP_SUB(X, A, B) \ + MBEDTLS_MPI_CHK(mbedtls_mpi_sub_mod(grp, X, A, B)) -#define MPI_ECP_MUL( X, A, B ) \ - MBEDTLS_MPI_CHK( mbedtls_mpi_mul_mod( grp, X, A, B ) ) +#define MPI_ECP_MUL(X, A, B) \ + MBEDTLS_MPI_CHK(mbedtls_mpi_mul_mod(grp, X, A, B)) -#define MPI_ECP_SQR( X, A ) \ - MBEDTLS_MPI_CHK( mbedtls_mpi_mul_mod( grp, X, A, A ) ) +#define MPI_ECP_SQR(X, A) \ + MBEDTLS_MPI_CHK(mbedtls_mpi_mul_mod(grp, X, A, A)) -#define MPI_ECP_MUL_INT( X, A, c ) \ - MBEDTLS_MPI_CHK( mbedtls_mpi_mul_int_mod( grp, X, A, c ) ) +#define MPI_ECP_MUL_INT(X, A, c) \ + MBEDTLS_MPI_CHK(mbedtls_mpi_mul_int_mod(grp, X, A, c)) -#define MPI_ECP_INV( dst, src ) \ - MBEDTLS_MPI_CHK( mbedtls_mpi_inv_mod( (dst), (src), &grp->P ) ) +#define MPI_ECP_INV(dst, src) \ + MBEDTLS_MPI_CHK(mbedtls_mpi_inv_mod((dst), (src), &grp->P)) -#define MPI_ECP_MOV( X, A ) \ - MBEDTLS_MPI_CHK( mbedtls_mpi_copy( X, A ) ) +#define MPI_ECP_MOV(X, A) \ + MBEDTLS_MPI_CHK(mbedtls_mpi_copy(X, A)) -#define MPI_ECP_SHIFT_L( X, count ) \ - MBEDTLS_MPI_CHK( mbedtls_mpi_shift_l_mod( grp, X, count ) ) +#define MPI_ECP_SHIFT_L(X, count) \ + MBEDTLS_MPI_CHK(mbedtls_mpi_shift_l_mod(grp, X, count)) -#define MPI_ECP_LSET( X, c ) \ - MBEDTLS_MPI_CHK( mbedtls_mpi_lset( X, c ) ) +#define MPI_ECP_LSET(X, c) \ + MBEDTLS_MPI_CHK(mbedtls_mpi_lset(X, c)) -#define MPI_ECP_CMP_INT( X, c ) \ - mbedtls_mpi_cmp_int( X, c ) +#define MPI_ECP_CMP_INT(X, c) \ + mbedtls_mpi_cmp_int(X, c) -#define MPI_ECP_CMP( X, Y ) \ - mbedtls_mpi_cmp_mpi( X, Y ) +#define MPI_ECP_CMP(X, Y) \ + mbedtls_mpi_cmp_mpi(X, Y) /* Needs f_rng, p_rng to be defined. */ -#define MPI_ECP_RAND( X ) \ - MBEDTLS_MPI_CHK( mbedtls_mpi_random( (X), 2, &grp->P, f_rng, p_rng ) ) +#define MPI_ECP_RAND(X) \ + MBEDTLS_MPI_CHK(mbedtls_mpi_random((X), 2, &grp->P, f_rng, p_rng)) /* Conditional negation * Needs grp and a temporary MPI tmp to be defined. */ -#define MPI_ECP_COND_NEG( X, cond ) \ +#define MPI_ECP_COND_NEG(X, cond) \ do \ { \ - unsigned char nonzero = mbedtls_mpi_cmp_int( (X), 0 ) != 0; \ - MBEDTLS_MPI_CHK( mbedtls_mpi_sub_mpi( &tmp, &grp->P, (X) ) ); \ - MBEDTLS_MPI_CHK( mbedtls_mpi_safe_cond_assign( (X), &tmp, \ - nonzero & cond ) ); \ - } while( 0 ) + unsigned char nonzero = mbedtls_mpi_cmp_int((X), 0) != 0; \ + MBEDTLS_MPI_CHK(mbedtls_mpi_sub_mpi(&tmp, &grp->P, (X))); \ + MBEDTLS_MPI_CHK(mbedtls_mpi_safe_cond_assign((X), &tmp, \ + nonzero & cond)); \ + } while (0) -#define MPI_ECP_NEG( X ) MPI_ECP_COND_NEG( (X), 1 ) +#define MPI_ECP_NEG(X) MPI_ECP_COND_NEG((X), 1) -#define MPI_ECP_VALID( X ) \ - ( (X)->p != NULL ) +#define MPI_ECP_VALID(X) \ + ((X)->p != NULL) -#define MPI_ECP_COND_ASSIGN( X, Y, cond ) \ - MBEDTLS_MPI_CHK( mbedtls_mpi_safe_cond_assign( (X), (Y), (cond) ) ) +#define MPI_ECP_COND_ASSIGN(X, Y, cond) \ + MBEDTLS_MPI_CHK(mbedtls_mpi_safe_cond_assign((X), (Y), (cond))) -#define MPI_ECP_COND_SWAP( X, Y, cond ) \ - MBEDTLS_MPI_CHK( mbedtls_mpi_safe_cond_swap( (X), (Y), (cond) ) ) +#define MPI_ECP_COND_SWAP(X, Y, cond) \ + MBEDTLS_MPI_CHK(mbedtls_mpi_safe_cond_swap((X), (Y), (cond))) #if defined(MBEDTLS_ECP_SHORT_WEIERSTRASS_ENABLED) + +/* + * Computes the right-hand side of the Short Weierstrass equation + * RHS = X^3 + A X + B + */ +static int ecp_sw_rhs(const mbedtls_ecp_group *grp, + mbedtls_mpi *rhs, + const mbedtls_mpi *X) +{ + int ret; + + /* Compute X^3 + A X + B as X (X^2 + A) + B */ + MPI_ECP_SQR(rhs, X); + + /* Special case for A = -3 */ + if (grp->A.p == NULL) { + MPI_ECP_SUB_INT(rhs, rhs, 3); + } else { + MPI_ECP_ADD(rhs, rhs, &grp->A); + } + + MPI_ECP_MUL(rhs, rhs, X); + MPI_ECP_ADD(rhs, rhs, &grp->B); + +cleanup: + return ret; +} + +/* + * Derive Y from X and a parity bit + */ +static int mbedtls_ecp_sw_derive_y(const mbedtls_ecp_group *grp, + const mbedtls_mpi *X, + mbedtls_mpi *Y, + int parity_bit) +{ + /* w = y^2 = x^3 + ax + b + * y = sqrt(w) = w^((p+1)/4) mod p (for prime p where p = 3 mod 4) + * + * Note: this method for extracting square root does not validate that w + * was indeed a square so this function will return garbage in Y if X + * does not correspond to a point on the curve. + */ + + /* Check prerequisite p = 3 mod 4 */ + if (mbedtls_mpi_get_bit(&grp->P, 0) != 1 || + mbedtls_mpi_get_bit(&grp->P, 1) != 1) { + return MBEDTLS_ERR_ECP_FEATURE_UNAVAILABLE; + } + + int ret; + mbedtls_mpi exp; + mbedtls_mpi_init(&exp); + + /* use Y to store intermediate result, actually w above */ + MBEDTLS_MPI_CHK(ecp_sw_rhs(grp, Y, X)); + + /* w = y^2 */ /* Y contains y^2 intermediate result */ + /* exp = ((p+1)/4) */ + MBEDTLS_MPI_CHK(mbedtls_mpi_add_int(&exp, &grp->P, 1)); + MBEDTLS_MPI_CHK(mbedtls_mpi_shift_r(&exp, 2)); + /* sqrt(w) = w^((p+1)/4) mod p (for prime p where p = 3 mod 4) */ + MBEDTLS_MPI_CHK(mbedtls_mpi_exp_mod(Y, Y /*y^2*/, &exp, &grp->P, NULL)); + + /* check parity bit match or else invert Y */ + /* This quick inversion implementation is valid because Y != 0 for all + * Short Weierstrass curves supported by mbedtls, as each supported curve + * has an order that is a large prime, so each supported curve does not + * have any point of order 2, and a point with Y == 0 would be of order 2 */ + if (mbedtls_mpi_get_bit(Y, 0) != parity_bit) { + MBEDTLS_MPI_CHK(mbedtls_mpi_sub_mpi(Y, &grp->P, Y)); + } + +cleanup: + + mbedtls_mpi_free(&exp); + return ret; +} + /* * For curves in short Weierstrass form, we do all the internal operations in * Jacobian coordinates. @@ -1275,36 +1319,38 @@ static inline int mbedtls_mpi_shift_l_mod( const mbedtls_ecp_group *grp, * Normalize jacobian coordinates so that Z == 0 || Z == 1 (GECC 3.2.1) * Cost: 1N := 1I + 3M + 1S */ -static int ecp_normalize_jac( const mbedtls_ecp_group *grp, mbedtls_ecp_point *pt ) +static int ecp_normalize_jac(const mbedtls_ecp_group *grp, mbedtls_ecp_point *pt) { - if( MPI_ECP_CMP_INT( &pt->Z, 0 ) == 0 ) - return( 0 ); + if (MPI_ECP_CMP_INT(&pt->Z, 0) == 0) { + return 0; + } #if defined(MBEDTLS_ECP_NORMALIZE_JAC_ALT) - if( mbedtls_internal_ecp_grp_capable( grp ) ) - return( mbedtls_internal_ecp_normalize_jac( grp, pt ) ); + if (mbedtls_internal_ecp_grp_capable(grp)) { + return mbedtls_internal_ecp_normalize_jac(grp, pt); + } #endif /* MBEDTLS_ECP_NORMALIZE_JAC_ALT */ #if defined(MBEDTLS_ECP_NO_FALLBACK) && defined(MBEDTLS_ECP_NORMALIZE_JAC_ALT) - return( MBEDTLS_ERR_ECP_FEATURE_UNAVAILABLE ); + return MBEDTLS_ERR_ECP_FEATURE_UNAVAILABLE; #else int ret = MBEDTLS_ERR_ERROR_CORRUPTION_DETECTED; mbedtls_mpi T; - mbedtls_mpi_init( &T ); + mbedtls_mpi_init(&T); - MPI_ECP_INV( &T, &pt->Z ); /* T <- 1 / Z */ - MPI_ECP_MUL( &pt->Y, &pt->Y, &T ); /* Y' <- Y*T = Y / Z */ - MPI_ECP_SQR( &T, &T ); /* T <- T^2 = 1 / Z^2 */ - MPI_ECP_MUL( &pt->X, &pt->X, &T ); /* X <- X * T = X / Z^2 */ - MPI_ECP_MUL( &pt->Y, &pt->Y, &T ); /* Y'' <- Y' * T = Y / Z^3 */ + MPI_ECP_INV(&T, &pt->Z); /* T <- 1 / Z */ + MPI_ECP_MUL(&pt->Y, &pt->Y, &T); /* Y' <- Y*T = Y / Z */ + MPI_ECP_SQR(&T, &T); /* T <- T^2 = 1 / Z^2 */ + MPI_ECP_MUL(&pt->X, &pt->X, &T); /* X <- X * T = X / Z^2 */ + MPI_ECP_MUL(&pt->Y, &pt->Y, &T); /* Y'' <- Y' * T = Y / Z^3 */ - MPI_ECP_LSET( &pt->Z, 1 ); + MPI_ECP_LSET(&pt->Z, 1); cleanup: - mbedtls_mpi_free( &T ); + mbedtls_mpi_free(&T); - return( ret ); + return ret; #endif /* !defined(MBEDTLS_ECP_NO_FALLBACK) || !defined(MBEDTLS_ECP_NORMALIZE_JAC_ALT) */ } @@ -1319,46 +1365,47 @@ static int ecp_normalize_jac( const mbedtls_ecp_group *grp, mbedtls_ecp_point *p * * Cost: 1N(t) := 1I + (6t - 3)M + 1S */ -static int ecp_normalize_jac_many( const mbedtls_ecp_group *grp, - mbedtls_ecp_point *T[], size_t T_size ) +static int ecp_normalize_jac_many(const mbedtls_ecp_group *grp, + mbedtls_ecp_point *T[], size_t T_size) { - if( T_size < 2 ) - return( ecp_normalize_jac( grp, *T ) ); + if (T_size < 2) { + return ecp_normalize_jac(grp, *T); + } #if defined(MBEDTLS_ECP_NORMALIZE_JAC_MANY_ALT) - if( mbedtls_internal_ecp_grp_capable( grp ) ) - return( mbedtls_internal_ecp_normalize_jac_many( grp, T, T_size ) ); + if (mbedtls_internal_ecp_grp_capable(grp)) { + return mbedtls_internal_ecp_normalize_jac_many(grp, T, T_size); + } #endif #if defined(MBEDTLS_ECP_NO_FALLBACK) && defined(MBEDTLS_ECP_NORMALIZE_JAC_MANY_ALT) - return( MBEDTLS_ERR_ECP_FEATURE_UNAVAILABLE ); + return MBEDTLS_ERR_ECP_FEATURE_UNAVAILABLE; #else int ret = MBEDTLS_ERR_ERROR_CORRUPTION_DETECTED; size_t i; mbedtls_mpi *c, t; - if( ( c = mbedtls_calloc( T_size, sizeof( mbedtls_mpi ) ) ) == NULL ) - return( MBEDTLS_ERR_ECP_ALLOC_FAILED ); + if ((c = mbedtls_calloc(T_size, sizeof(mbedtls_mpi))) == NULL) { + return MBEDTLS_ERR_ECP_ALLOC_FAILED; + } - mbedtls_mpi_init( &t ); + mbedtls_mpi_init(&t); - mpi_init_many( c, T_size ); + mpi_init_many(c, T_size); /* * c[i] = Z_0 * ... * Z_i, i = 0,..,n := T_size-1 */ - MPI_ECP_MOV( &c[0], &T[0]->Z ); - for( i = 1; i < T_size; i++ ) - { - MPI_ECP_MUL( &c[i], &c[i-1], &T[i]->Z ); + MPI_ECP_MOV(&c[0], &T[0]->Z); + for (i = 1; i < T_size; i++) { + MPI_ECP_MUL(&c[i], &c[i-1], &T[i]->Z); } /* * c[n] = 1 / (Z_0 * ... * Z_n) mod P */ - MPI_ECP_INV( &c[T_size-1], &c[T_size-1] ); + MPI_ECP_INV(&c[T_size-1], &c[T_size-1]); - for( i = T_size - 1; ; i-- ) - { + for (i = T_size - 1;; i--) { /* At the start of iteration i (note that i decrements), we have * - c[j] = Z_0 * .... * Z_j for j < i, * - c[j] = 1 / (Z_0 * .... * Z_j) for j == i, @@ -1371,22 +1418,19 @@ static int ecp_normalize_jac_many( const mbedtls_ecp_group *grp, * c[0] = 1 / Z_0. */ - if( i > 0 ) - { + if (i > 0) { /* Compute 1/Z_i and establish invariant for the next iteration. */ - MPI_ECP_MUL( &t, &c[i], &c[i-1] ); - MPI_ECP_MUL( &c[i-1], &c[i], &T[i]->Z ); - } - else - { - MPI_ECP_MOV( &t, &c[0] ); + MPI_ECP_MUL(&t, &c[i], &c[i-1]); + MPI_ECP_MUL(&c[i-1], &c[i], &T[i]->Z); + } else { + MPI_ECP_MOV(&t, &c[0]); } /* Now t holds 1 / Z_i; normalize as in ecp_normalize_jac() */ - MPI_ECP_MUL( &T[i]->Y, &T[i]->Y, &t ); - MPI_ECP_SQR( &t, &t ); - MPI_ECP_MUL( &T[i]->X, &T[i]->X, &t ); - MPI_ECP_MUL( &T[i]->Y, &T[i]->Y, &t ); + MPI_ECP_MUL(&T[i]->Y, &T[i]->Y, &t); + MPI_ECP_SQR(&t, &t); + MPI_ECP_MUL(&T[i]->X, &T[i]->X, &t); + MPI_ECP_MUL(&T[i]->Y, &T[i]->Y, &t); /* * Post-precessing: reclaim some memory by shrinking coordinates @@ -1394,42 +1438,43 @@ static int ecp_normalize_jac_many( const mbedtls_ecp_group *grp, * - shrinking other coordinates, but still keeping the same number of * limbs as P, as otherwise it will too likely be regrown too fast. */ - MBEDTLS_MPI_CHK( mbedtls_mpi_shrink( &T[i]->X, grp->P.n ) ); - MBEDTLS_MPI_CHK( mbedtls_mpi_shrink( &T[i]->Y, grp->P.n ) ); + MBEDTLS_MPI_CHK(mbedtls_mpi_shrink(&T[i]->X, grp->P.n)); + MBEDTLS_MPI_CHK(mbedtls_mpi_shrink(&T[i]->Y, grp->P.n)); - MPI_ECP_LSET( &T[i]->Z, 1 ); + MPI_ECP_LSET(&T[i]->Z, 1); - if( i == 0 ) + if (i == 0) { break; + } } cleanup: - mbedtls_mpi_free( &t ); - mpi_free_many( c, T_size ); - mbedtls_free( c ); + mbedtls_mpi_free(&t); + mpi_free_many(c, T_size); + mbedtls_free(c); - return( ret ); - #endif /* !defined(MBEDTLS_ECP_NO_FALLBACK) || !defined(MBEDTLS_ECP_NORMALIZE_JAC_MANY_ALT) */ + return ret; +#endif /* !defined(MBEDTLS_ECP_NO_FALLBACK) || !defined(MBEDTLS_ECP_NORMALIZE_JAC_MANY_ALT) */ } /* * Conditional point inversion: Q -> -Q = (Q.X, -Q.Y, Q.Z) without leak. * "inv" must be 0 (don't invert) or 1 (invert) or the result will be invalid */ -static int ecp_safe_invert_jac( const mbedtls_ecp_group *grp, - mbedtls_ecp_point *Q, - unsigned char inv ) +static int ecp_safe_invert_jac(const mbedtls_ecp_group *grp, + mbedtls_ecp_point *Q, + unsigned char inv) { int ret = MBEDTLS_ERR_ERROR_CORRUPTION_DETECTED; mbedtls_mpi tmp; - mbedtls_mpi_init( &tmp ); + mbedtls_mpi_init(&tmp); - MPI_ECP_COND_NEG( &Q->Y, inv ); + MPI_ECP_COND_NEG(&Q->Y, inv); cleanup: - mbedtls_mpi_free( &tmp ); - return( ret ); + mbedtls_mpi_free(&tmp); + return ret; } /* @@ -1446,83 +1491,80 @@ static int ecp_safe_invert_jac( const mbedtls_ecp_group *grp, * 4M + 4S (A == -3) * 3M + 6S + 1a otherwise */ -static int ecp_double_jac( const mbedtls_ecp_group *grp, mbedtls_ecp_point *R, - const mbedtls_ecp_point *P, - mbedtls_mpi tmp[4] ) +static int ecp_double_jac(const mbedtls_ecp_group *grp, mbedtls_ecp_point *R, + const mbedtls_ecp_point *P, + mbedtls_mpi tmp[4]) { #if defined(MBEDTLS_SELF_TEST) dbl_count++; #endif #if defined(MBEDTLS_ECP_DOUBLE_JAC_ALT) - if( mbedtls_internal_ecp_grp_capable( grp ) ) - return( mbedtls_internal_ecp_double_jac( grp, R, P ) ); + if (mbedtls_internal_ecp_grp_capable(grp)) { + return mbedtls_internal_ecp_double_jac(grp, R, P); + } #endif /* MBEDTLS_ECP_DOUBLE_JAC_ALT */ #if defined(MBEDTLS_ECP_NO_FALLBACK) && defined(MBEDTLS_ECP_DOUBLE_JAC_ALT) - return( MBEDTLS_ERR_ECP_FEATURE_UNAVAILABLE ); + return MBEDTLS_ERR_ECP_FEATURE_UNAVAILABLE; #else int ret = MBEDTLS_ERR_ERROR_CORRUPTION_DETECTED; /* Special case for A = -3 */ - if( grp->A.p == NULL ) - { + if (grp->A.p == NULL) { /* tmp[0] <- M = 3(X + Z^2)(X - Z^2) */ - MPI_ECP_SQR( &tmp[1], &P->Z ); - MPI_ECP_ADD( &tmp[2], &P->X, &tmp[1] ); - MPI_ECP_SUB( &tmp[3], &P->X, &tmp[1] ); - MPI_ECP_MUL( &tmp[1], &tmp[2], &tmp[3] ); - MPI_ECP_MUL_INT( &tmp[0], &tmp[1], 3 ); - } - else - { + MPI_ECP_SQR(&tmp[1], &P->Z); + MPI_ECP_ADD(&tmp[2], &P->X, &tmp[1]); + MPI_ECP_SUB(&tmp[3], &P->X, &tmp[1]); + MPI_ECP_MUL(&tmp[1], &tmp[2], &tmp[3]); + MPI_ECP_MUL_INT(&tmp[0], &tmp[1], 3); + } else { /* tmp[0] <- M = 3.X^2 + A.Z^4 */ - MPI_ECP_SQR( &tmp[1], &P->X ); - MPI_ECP_MUL_INT( &tmp[0], &tmp[1], 3 ); + MPI_ECP_SQR(&tmp[1], &P->X); + MPI_ECP_MUL_INT(&tmp[0], &tmp[1], 3); /* Optimize away for "koblitz" curves with A = 0 */ - if( MPI_ECP_CMP_INT( &grp->A, 0 ) != 0 ) - { + if (MPI_ECP_CMP_INT(&grp->A, 0) != 0) { /* M += A.Z^4 */ - MPI_ECP_SQR( &tmp[1], &P->Z ); - MPI_ECP_SQR( &tmp[2], &tmp[1] ); - MPI_ECP_MUL( &tmp[1], &tmp[2], &grp->A ); - MPI_ECP_ADD( &tmp[0], &tmp[0], &tmp[1] ); + MPI_ECP_SQR(&tmp[1], &P->Z); + MPI_ECP_SQR(&tmp[2], &tmp[1]); + MPI_ECP_MUL(&tmp[1], &tmp[2], &grp->A); + MPI_ECP_ADD(&tmp[0], &tmp[0], &tmp[1]); } } /* tmp[1] <- S = 4.X.Y^2 */ - MPI_ECP_SQR( &tmp[2], &P->Y ); - MPI_ECP_SHIFT_L( &tmp[2], 1 ); - MPI_ECP_MUL( &tmp[1], &P->X, &tmp[2] ); - MPI_ECP_SHIFT_L( &tmp[1], 1 ); + MPI_ECP_SQR(&tmp[2], &P->Y); + MPI_ECP_SHIFT_L(&tmp[2], 1); + MPI_ECP_MUL(&tmp[1], &P->X, &tmp[2]); + MPI_ECP_SHIFT_L(&tmp[1], 1); /* tmp[3] <- U = 8.Y^4 */ - MPI_ECP_SQR( &tmp[3], &tmp[2] ); - MPI_ECP_SHIFT_L( &tmp[3], 1 ); + MPI_ECP_SQR(&tmp[3], &tmp[2]); + MPI_ECP_SHIFT_L(&tmp[3], 1); /* tmp[2] <- T = M^2 - 2.S */ - MPI_ECP_SQR( &tmp[2], &tmp[0] ); - MPI_ECP_SUB( &tmp[2], &tmp[2], &tmp[1] ); - MPI_ECP_SUB( &tmp[2], &tmp[2], &tmp[1] ); + MPI_ECP_SQR(&tmp[2], &tmp[0]); + MPI_ECP_SUB(&tmp[2], &tmp[2], &tmp[1]); + MPI_ECP_SUB(&tmp[2], &tmp[2], &tmp[1]); /* tmp[1] <- S = M(S - T) - U */ - MPI_ECP_SUB( &tmp[1], &tmp[1], &tmp[2] ); - MPI_ECP_MUL( &tmp[1], &tmp[1], &tmp[0] ); - MPI_ECP_SUB( &tmp[1], &tmp[1], &tmp[3] ); + MPI_ECP_SUB(&tmp[1], &tmp[1], &tmp[2]); + MPI_ECP_MUL(&tmp[1], &tmp[1], &tmp[0]); + MPI_ECP_SUB(&tmp[1], &tmp[1], &tmp[3]); /* tmp[3] <- U = 2.Y.Z */ - MPI_ECP_MUL( &tmp[3], &P->Y, &P->Z ); - MPI_ECP_SHIFT_L( &tmp[3], 1 ); + MPI_ECP_MUL(&tmp[3], &P->Y, &P->Z); + MPI_ECP_SHIFT_L(&tmp[3], 1); /* Store results */ - MPI_ECP_MOV( &R->X, &tmp[2] ); - MPI_ECP_MOV( &R->Y, &tmp[1] ); - MPI_ECP_MOV( &R->Z, &tmp[3] ); + MPI_ECP_MOV(&R->X, &tmp[2]); + MPI_ECP_MOV(&R->Y, &tmp[1]); + MPI_ECP_MOV(&R->Z, &tmp[3]); cleanup: - return( ret ); + return ret; #endif /* !defined(MBEDTLS_ECP_NO_FALLBACK) || !defined(MBEDTLS_ECP_DOUBLE_JAC_ALT) */ } @@ -1546,21 +1588,22 @@ static int ecp_double_jac( const mbedtls_ecp_group *grp, mbedtls_ecp_point *R, * * Cost: 1A := 8M + 3S */ -static int ecp_add_mixed( const mbedtls_ecp_group *grp, mbedtls_ecp_point *R, - const mbedtls_ecp_point *P, const mbedtls_ecp_point *Q, - mbedtls_mpi tmp[4] ) +static int ecp_add_mixed(const mbedtls_ecp_group *grp, mbedtls_ecp_point *R, + const mbedtls_ecp_point *P, const mbedtls_ecp_point *Q, + mbedtls_mpi tmp[4]) { #if defined(MBEDTLS_SELF_TEST) add_count++; #endif #if defined(MBEDTLS_ECP_ADD_MIXED_ALT) - if( mbedtls_internal_ecp_grp_capable( grp ) ) - return( mbedtls_internal_ecp_add_mixed( grp, R, P, Q ) ); + if (mbedtls_internal_ecp_grp_capable(grp)) { + return mbedtls_internal_ecp_add_mixed(grp, R, P, Q); + } #endif /* MBEDTLS_ECP_ADD_MIXED_ALT */ #if defined(MBEDTLS_ECP_NO_FALLBACK) && defined(MBEDTLS_ECP_ADD_MIXED_ALT) - return( MBEDTLS_ERR_ECP_FEATURE_UNAVAILABLE ); + return MBEDTLS_ERR_ECP_FEATURE_UNAVAILABLE; #else int ret = MBEDTLS_ERR_ERROR_CORRUPTION_DETECTED; @@ -1571,68 +1614,68 @@ static int ecp_add_mixed( const mbedtls_ecp_group *grp, mbedtls_ecp_point *R, mbedtls_mpi * const Y = &R->Y; mbedtls_mpi * const Z = &R->Z; - if( !MPI_ECP_VALID( &Q->Z ) ) - return( MBEDTLS_ERR_ECP_BAD_INPUT_DATA ); + if (!MPI_ECP_VALID(&Q->Z)) { + return MBEDTLS_ERR_ECP_BAD_INPUT_DATA; + } /* * Trivial cases: P == 0 or Q == 0 (case 1) */ - if( MPI_ECP_CMP_INT( &P->Z, 0 ) == 0 ) - return( mbedtls_ecp_copy( R, Q ) ); + if (MPI_ECP_CMP_INT(&P->Z, 0) == 0) { + return mbedtls_ecp_copy(R, Q); + } - if( MPI_ECP_CMP_INT( &Q->Z, 0 ) == 0 ) - return( mbedtls_ecp_copy( R, P ) ); + if (MPI_ECP_CMP_INT(&Q->Z, 0) == 0) { + return mbedtls_ecp_copy(R, P); + } /* * Make sure Q coordinates are normalized */ - if( MPI_ECP_CMP_INT( &Q->Z, 1 ) != 0 ) - return( MBEDTLS_ERR_ECP_BAD_INPUT_DATA ); + if (MPI_ECP_CMP_INT(&Q->Z, 1) != 0) { + return MBEDTLS_ERR_ECP_BAD_INPUT_DATA; + } - MPI_ECP_SQR( &tmp[0], &P->Z ); - MPI_ECP_MUL( &tmp[1], &tmp[0], &P->Z ); - MPI_ECP_MUL( &tmp[0], &tmp[0], &Q->X ); - MPI_ECP_MUL( &tmp[1], &tmp[1], &Q->Y ); - MPI_ECP_SUB( &tmp[0], &tmp[0], &P->X ); - MPI_ECP_SUB( &tmp[1], &tmp[1], &P->Y ); + MPI_ECP_SQR(&tmp[0], &P->Z); + MPI_ECP_MUL(&tmp[1], &tmp[0], &P->Z); + MPI_ECP_MUL(&tmp[0], &tmp[0], &Q->X); + MPI_ECP_MUL(&tmp[1], &tmp[1], &Q->Y); + MPI_ECP_SUB(&tmp[0], &tmp[0], &P->X); + MPI_ECP_SUB(&tmp[1], &tmp[1], &P->Y); /* Special cases (2) and (3) */ - if( MPI_ECP_CMP_INT( &tmp[0], 0 ) == 0 ) - { - if( MPI_ECP_CMP_INT( &tmp[1], 0 ) == 0 ) - { - ret = ecp_double_jac( grp, R, P, tmp ); + if (MPI_ECP_CMP_INT(&tmp[0], 0) == 0) { + if (MPI_ECP_CMP_INT(&tmp[1], 0) == 0) { + ret = ecp_double_jac(grp, R, P, tmp); goto cleanup; - } - else - { - ret = mbedtls_ecp_set_zero( R ); + } else { + ret = mbedtls_ecp_set_zero(R); goto cleanup; } } /* {P,Q}->Z no longer used, so OK to write to Z even if there's aliasing. */ - MPI_ECP_MUL( Z, &P->Z, &tmp[0] ); - MPI_ECP_SQR( &tmp[2], &tmp[0] ); - MPI_ECP_MUL( &tmp[3], &tmp[2], &tmp[0] ); - MPI_ECP_MUL( &tmp[2], &tmp[2], &P->X ); + MPI_ECP_MUL(Z, &P->Z, &tmp[0]); + MPI_ECP_SQR(&tmp[2], &tmp[0]); + MPI_ECP_MUL(&tmp[3], &tmp[2], &tmp[0]); + MPI_ECP_MUL(&tmp[2], &tmp[2], &P->X); - MPI_ECP_MOV( &tmp[0], &tmp[2] ); - MPI_ECP_SHIFT_L( &tmp[0], 1 ); + MPI_ECP_MOV(&tmp[0], &tmp[2]); + MPI_ECP_SHIFT_L(&tmp[0], 1); /* {P,Q}->X no longer used, so OK to write to X even if there's aliasing. */ - MPI_ECP_SQR( X, &tmp[1] ); - MPI_ECP_SUB( X, X, &tmp[0] ); - MPI_ECP_SUB( X, X, &tmp[3] ); - MPI_ECP_SUB( &tmp[2], &tmp[2], X ); - MPI_ECP_MUL( &tmp[2], &tmp[2], &tmp[1] ); - MPI_ECP_MUL( &tmp[3], &tmp[3], &P->Y ); + MPI_ECP_SQR(X, &tmp[1]); + MPI_ECP_SUB(X, X, &tmp[0]); + MPI_ECP_SUB(X, X, &tmp[3]); + MPI_ECP_SUB(&tmp[2], &tmp[2], X); + MPI_ECP_MUL(&tmp[2], &tmp[2], &tmp[1]); + MPI_ECP_MUL(&tmp[3], &tmp[3], &P->Y); /* {P,Q}->Y no longer used, so OK to write to Y even if there's aliasing. */ - MPI_ECP_SUB( Y, &tmp[2], &tmp[3] ); + MPI_ECP_SUB(Y, &tmp[2], &tmp[3]); cleanup: - return( ret ); + return ret; #endif /* !defined(MBEDTLS_ECP_NO_FALLBACK) || !defined(MBEDTLS_ECP_ADD_MIXED_ALT) */ } @@ -1643,45 +1686,47 @@ static int ecp_add_mixed( const mbedtls_ecp_group *grp, mbedtls_ecp_point *R, * * This countermeasure was first suggested in [2]. */ -static int ecp_randomize_jac( const mbedtls_ecp_group *grp, mbedtls_ecp_point *pt, - int (*f_rng)(void *, unsigned char *, size_t), void *p_rng ) +static int ecp_randomize_jac(const mbedtls_ecp_group *grp, mbedtls_ecp_point *pt, + int (*f_rng)(void *, unsigned char *, size_t), void *p_rng) { #if defined(MBEDTLS_ECP_RANDOMIZE_JAC_ALT) - if( mbedtls_internal_ecp_grp_capable( grp ) ) - return( mbedtls_internal_ecp_randomize_jac( grp, pt, f_rng, p_rng ) ); + if (mbedtls_internal_ecp_grp_capable(grp)) { + return mbedtls_internal_ecp_randomize_jac(grp, pt, f_rng, p_rng); + } #endif /* MBEDTLS_ECP_RANDOMIZE_JAC_ALT */ #if defined(MBEDTLS_ECP_NO_FALLBACK) && defined(MBEDTLS_ECP_RANDOMIZE_JAC_ALT) - return( MBEDTLS_ERR_ECP_FEATURE_UNAVAILABLE ); + return MBEDTLS_ERR_ECP_FEATURE_UNAVAILABLE; #else int ret = MBEDTLS_ERR_ERROR_CORRUPTION_DETECTED; mbedtls_mpi l; - mbedtls_mpi_init( &l ); + mbedtls_mpi_init(&l); /* Generate l such that 1 < l < p */ - MPI_ECP_RAND( &l ); + MPI_ECP_RAND(&l); /* Z' = l * Z */ - MPI_ECP_MUL( &pt->Z, &pt->Z, &l ); + MPI_ECP_MUL(&pt->Z, &pt->Z, &l); /* Y' = l * Y */ - MPI_ECP_MUL( &pt->Y, &pt->Y, &l ); + MPI_ECP_MUL(&pt->Y, &pt->Y, &l); /* X' = l^2 * X */ - MPI_ECP_SQR( &l, &l ); - MPI_ECP_MUL( &pt->X, &pt->X, &l ); + MPI_ECP_SQR(&l, &l); + MPI_ECP_MUL(&pt->X, &pt->X, &l); /* Y'' = l^2 * Y' = l^3 * Y */ - MPI_ECP_MUL( &pt->Y, &pt->Y, &l ); + MPI_ECP_MUL(&pt->Y, &pt->Y, &l); cleanup: - mbedtls_mpi_free( &l ); + mbedtls_mpi_free(&l); - if( ret == MBEDTLS_ERR_MPI_NOT_ACCEPTABLE ) + if (ret == MBEDTLS_ERR_MPI_NOT_ACCEPTABLE) { ret = MBEDTLS_ERR_ECP_RANDOM_FAILED; - return( ret ); - #endif /* !defined(MBEDTLS_ECP_NO_FALLBACK) || !defined(MBEDTLS_ECP_RANDOMIZE_JAC_ALT) */ + } + return ret; +#endif /* !defined(MBEDTLS_ECP_NO_FALLBACK) || !defined(MBEDTLS_ECP_RANDOMIZE_JAC_ALT) */ } /* @@ -1692,10 +1737,10 @@ static int ecp_randomize_jac( const mbedtls_ecp_group *grp, mbedtls_ecp_point *p #endif /* d = ceil( n / w ) */ -#define COMB_MAX_D ( MBEDTLS_ECP_MAX_BITS + 1 ) / 2 +#define COMB_MAX_D (MBEDTLS_ECP_MAX_BITS + 1) / 2 /* number of precomputed points */ -#define COMB_MAX_PRE ( 1 << ( MBEDTLS_ECP_WINDOW_SIZE - 1 ) ) +#define COMB_MAX_PRE (1 << (MBEDTLS_ECP_WINDOW_SIZE - 1)) /* * Compute the representation of m that will be used with our comb method. @@ -1744,32 +1789,33 @@ static int ecp_randomize_jac( const mbedtls_ecp_group *grp, mbedtls_ecp_point *p * - m is the MPI, expected to be odd and such that bitlength(m) <= w * d * (the result will be incorrect if these assumptions are not satisfied) */ -static void ecp_comb_recode_core( unsigned char x[], size_t d, - unsigned char w, const mbedtls_mpi *m ) +static void ecp_comb_recode_core(unsigned char x[], size_t d, + unsigned char w, const mbedtls_mpi *m) { size_t i, j; unsigned char c, cc, adjust; - memset( x, 0, d+1 ); + memset(x, 0, d+1); /* First get the classical comb values (except for x_d = 0) */ - for( i = 0; i < d; i++ ) - for( j = 0; j < w; j++ ) - x[i] |= mbedtls_mpi_get_bit( m, i + d * j ) << j; + for (i = 0; i < d; i++) { + for (j = 0; j < w; j++) { + x[i] |= mbedtls_mpi_get_bit(m, i + d * j) << j; + } + } /* Now make sure x_1 .. x_d are odd */ c = 0; - for( i = 1; i <= d; i++ ) - { + for (i = 1; i <= d; i++) { /* Add carry and update it */ cc = x[i] & c; x[i] = x[i] ^ c; c = cc; /* Adjust if needed, avoiding branches */ - adjust = 1 - ( x[i] & 0x01 ); - c |= x[i] & ( x[i-1] * adjust ); - x[i] = x[i] ^ ( x[i-1] * adjust ); + adjust = 1 - (x[i] & 0x01); + c |= x[i] & (x[i-1] * adjust); + x[i] = x[i] ^ (x[i-1] * adjust); x[i-1] |= adjust << 7; } } @@ -1808,40 +1854,42 @@ static void ecp_comb_recode_core( unsigned char x[], size_t d, * value, it's useful to set MBEDTLS_ECP_WINDOW_SIZE to a lower value in order * to minimize maximum blocking time. */ -static int ecp_precompute_comb( const mbedtls_ecp_group *grp, - mbedtls_ecp_point T[], const mbedtls_ecp_point *P, - unsigned char w, size_t d, - mbedtls_ecp_restart_ctx *rs_ctx ) +static int ecp_precompute_comb(const mbedtls_ecp_group *grp, + mbedtls_ecp_point T[], const mbedtls_ecp_point *P, + unsigned char w, size_t d, + mbedtls_ecp_restart_ctx *rs_ctx) { int ret = MBEDTLS_ERR_ERROR_CORRUPTION_DETECTED; unsigned char i; size_t j = 0; - const unsigned char T_size = 1U << ( w - 1 ); - mbedtls_ecp_point *cur, *TT[COMB_MAX_PRE - 1] = {NULL}; + const unsigned char T_size = 1U << (w - 1); + mbedtls_ecp_point *cur, *TT[COMB_MAX_PRE - 1] = { NULL }; mbedtls_mpi tmp[4]; - mpi_init_many( tmp, sizeof( tmp ) / sizeof( mbedtls_mpi ) ); + mpi_init_many(tmp, sizeof(tmp) / sizeof(mbedtls_mpi)); #if defined(MBEDTLS_ECP_RESTARTABLE) - if( rs_ctx != NULL && rs_ctx->rsm != NULL ) - { - if( rs_ctx->rsm->state == ecp_rsm_pre_dbl ) + if (rs_ctx != NULL && rs_ctx->rsm != NULL) { + if (rs_ctx->rsm->state == ecp_rsm_pre_dbl) { goto dbl; - if( rs_ctx->rsm->state == ecp_rsm_pre_norm_dbl ) + } + if (rs_ctx->rsm->state == ecp_rsm_pre_norm_dbl) { goto norm_dbl; - if( rs_ctx->rsm->state == ecp_rsm_pre_add ) + } + if (rs_ctx->rsm->state == ecp_rsm_pre_add) { goto add; - if( rs_ctx->rsm->state == ecp_rsm_pre_norm_add ) + } + if (rs_ctx->rsm->state == ecp_rsm_pre_norm_add) { goto norm_add; + } } #else (void) rs_ctx; #endif #if defined(MBEDTLS_ECP_RESTARTABLE) - if( rs_ctx != NULL && rs_ctx->rsm != NULL ) - { + if (rs_ctx != NULL && rs_ctx->rsm != NULL) { rs_ctx->rsm->state = ecp_rsm_pre_dbl; /* initial state for the loop */ @@ -1854,31 +1902,32 @@ static int ecp_precompute_comb( const mbedtls_ecp_group *grp, * Set T[0] = P and * T[2^{l-1}] = 2^{dl} P for l = 1 .. w-1 (this is not the final value) */ - MBEDTLS_MPI_CHK( mbedtls_ecp_copy( &T[0], P ) ); + MBEDTLS_MPI_CHK(mbedtls_ecp_copy(&T[0], P)); #if defined(MBEDTLS_ECP_RESTARTABLE) - if( rs_ctx != NULL && rs_ctx->rsm != NULL && rs_ctx->rsm->i != 0 ) + if (rs_ctx != NULL && rs_ctx->rsm != NULL && rs_ctx->rsm->i != 0) { j = rs_ctx->rsm->i; - else + } else #endif - j = 0; + j = 0; - for( ; j < d * ( w - 1 ); j++ ) - { - MBEDTLS_ECP_BUDGET( MBEDTLS_ECP_OPS_DBL ); + for (; j < d * (w - 1); j++) { + MBEDTLS_ECP_BUDGET(MBEDTLS_ECP_OPS_DBL); - i = 1U << ( j / d ); + i = 1U << (j / d); cur = T + i; - if( j % d == 0 ) - MBEDTLS_MPI_CHK( mbedtls_ecp_copy( cur, T + ( i >> 1 ) ) ); + if (j % d == 0) { + MBEDTLS_MPI_CHK(mbedtls_ecp_copy(cur, T + (i >> 1))); + } - MBEDTLS_MPI_CHK( ecp_double_jac( grp, cur, cur, tmp ) ); + MBEDTLS_MPI_CHK(ecp_double_jac(grp, cur, cur, tmp)); } #if defined(MBEDTLS_ECP_RESTARTABLE) - if( rs_ctx != NULL && rs_ctx->rsm != NULL ) + if (rs_ctx != NULL && rs_ctx->rsm != NULL) { rs_ctx->rsm->state = ecp_rsm_pre_norm_dbl; + } norm_dbl: #endif @@ -1890,16 +1939,18 @@ static int ecp_precompute_comb( const mbedtls_ecp_group *grp, * */ j = 0; - for( i = 1; i < T_size; i <<= 1 ) + for (i = 1; i < T_size; i <<= 1) { TT[j++] = T + i; + } - MBEDTLS_ECP_BUDGET( MBEDTLS_ECP_OPS_INV + 6 * j - 2 ); + MBEDTLS_ECP_BUDGET(MBEDTLS_ECP_OPS_INV + 6 * j - 2); - MBEDTLS_MPI_CHK( ecp_normalize_jac_many( grp, TT, j ) ); + MBEDTLS_MPI_CHK(ecp_normalize_jac_many(grp, TT, j)); #if defined(MBEDTLS_ECP_RESTARTABLE) - if( rs_ctx != NULL && rs_ctx->rsm != NULL ) + if (rs_ctx != NULL && rs_ctx->rsm != NULL) { rs_ctx->rsm->state = ecp_rsm_pre_add; + } add: #endif @@ -1907,18 +1958,19 @@ static int ecp_precompute_comb( const mbedtls_ecp_group *grp, * Compute the remaining ones using the minimal number of additions * Be careful to update T[2^l] only after using it! */ - MBEDTLS_ECP_BUDGET( ( T_size - 1 ) * MBEDTLS_ECP_OPS_ADD ); + MBEDTLS_ECP_BUDGET((T_size - 1) * MBEDTLS_ECP_OPS_ADD); - for( i = 1; i < T_size; i <<= 1 ) - { + for (i = 1; i < T_size; i <<= 1) { j = i; - while( j-- ) - MBEDTLS_MPI_CHK( ecp_add_mixed( grp, &T[i + j], &T[j], &T[i], tmp ) ); + while (j--) { + MBEDTLS_MPI_CHK(ecp_add_mixed(grp, &T[i + j], &T[j], &T[i], tmp)); + } } #if defined(MBEDTLS_ECP_RESTARTABLE) - if( rs_ctx != NULL && rs_ctx->rsm != NULL ) + if (rs_ctx != NULL && rs_ctx->rsm != NULL) { rs_ctx->rsm->state = ecp_rsm_pre_norm_add; + } norm_add: #endif @@ -1927,35 +1979,37 @@ static int ecp_precompute_comb( const mbedtls_ecp_group *grp, * still need the auxiliary array for homogeneity with the previous * call. Also, skip T[0] which is already normalised, being a copy of P. */ - for( j = 0; j + 1 < T_size; j++ ) + for (j = 0; j + 1 < T_size; j++) { TT[j] = T + j + 1; + } - MBEDTLS_ECP_BUDGET( MBEDTLS_ECP_OPS_INV + 6 * j - 2 ); + MBEDTLS_ECP_BUDGET(MBEDTLS_ECP_OPS_INV + 6 * j - 2); - MBEDTLS_MPI_CHK( ecp_normalize_jac_many( grp, TT, j ) ); + MBEDTLS_MPI_CHK(ecp_normalize_jac_many(grp, TT, j)); /* Free Z coordinate (=1 after normalization) to save RAM. * This makes T[i] invalid as mbedtls_ecp_points, but this is OK * since from this point onwards, they are only accessed indirectly * via the getter function ecp_select_comb() which does set the * target's Z coordinate to 1. */ - for( i = 0; i < T_size; i++ ) - mbedtls_mpi_free( &T[i].Z ); + for (i = 0; i < T_size; i++) { + mbedtls_mpi_free(&T[i].Z); + } cleanup: - mpi_free_many( tmp, sizeof( tmp ) / sizeof( mbedtls_mpi ) ); + mpi_free_many(tmp, sizeof(tmp) / sizeof(mbedtls_mpi)); #if defined(MBEDTLS_ECP_RESTARTABLE) - if( rs_ctx != NULL && rs_ctx->rsm != NULL && - ret == MBEDTLS_ERR_ECP_IN_PROGRESS ) - { - if( rs_ctx->rsm->state == ecp_rsm_pre_dbl ) + if (rs_ctx != NULL && rs_ctx->rsm != NULL && + ret == MBEDTLS_ERR_ECP_IN_PROGRESS) { + if (rs_ctx->rsm->state == ecp_rsm_pre_dbl) { rs_ctx->rsm->i = j; + } } #endif - return( ret ); + return ret; } /* @@ -1963,30 +2017,29 @@ static int ecp_precompute_comb( const mbedtls_ecp_group *grp, * * See ecp_comb_recode_core() for background */ -static int ecp_select_comb( const mbedtls_ecp_group *grp, mbedtls_ecp_point *R, - const mbedtls_ecp_point T[], unsigned char T_size, - unsigned char i ) +static int ecp_select_comb(const mbedtls_ecp_group *grp, mbedtls_ecp_point *R, + const mbedtls_ecp_point T[], unsigned char T_size, + unsigned char i) { int ret = MBEDTLS_ERR_ERROR_CORRUPTION_DETECTED; unsigned char ii, j; /* Ignore the "sign" bit and scale down */ - ii = ( i & 0x7Fu ) >> 1; + ii = (i & 0x7Fu) >> 1; /* Read the whole table to thwart cache-based timing attacks */ - for( j = 0; j < T_size; j++ ) - { - MPI_ECP_COND_ASSIGN( &R->X, &T[j].X, j == ii ); - MPI_ECP_COND_ASSIGN( &R->Y, &T[j].Y, j == ii ); + for (j = 0; j < T_size; j++) { + MPI_ECP_COND_ASSIGN(&R->X, &T[j].X, j == ii); + MPI_ECP_COND_ASSIGN(&R->Y, &T[j].Y, j == ii); } /* Safely invert result if i is "negative" */ - MBEDTLS_MPI_CHK( ecp_safe_invert_jac( grp, R, i >> 7 ) ); + MBEDTLS_MPI_CHK(ecp_safe_invert_jac(grp, R, i >> 7)); - MPI_ECP_LSET( &R->Z, 1 ); + MPI_ECP_LSET(&R->Z, 1); cleanup: - return( ret ); + return ret; } /* @@ -1995,74 +2048,70 @@ static int ecp_select_comb( const mbedtls_ecp_group *grp, mbedtls_ecp_point *R, * * Cost: d A + d D + 1 R */ -static int ecp_mul_comb_core( const mbedtls_ecp_group *grp, mbedtls_ecp_point *R, - const mbedtls_ecp_point T[], unsigned char T_size, - const unsigned char x[], size_t d, - int (*f_rng)(void *, unsigned char *, size_t), - void *p_rng, - mbedtls_ecp_restart_ctx *rs_ctx ) +static int ecp_mul_comb_core(const mbedtls_ecp_group *grp, mbedtls_ecp_point *R, + const mbedtls_ecp_point T[], unsigned char T_size, + const unsigned char x[], size_t d, + int (*f_rng)(void *, unsigned char *, size_t), + void *p_rng, + mbedtls_ecp_restart_ctx *rs_ctx) { int ret = MBEDTLS_ERR_ERROR_CORRUPTION_DETECTED; mbedtls_ecp_point Txi; mbedtls_mpi tmp[4]; size_t i; - mbedtls_ecp_point_init( &Txi ); - mpi_init_many( tmp, sizeof( tmp ) / sizeof( mbedtls_mpi ) ); + mbedtls_ecp_point_init(&Txi); + mpi_init_many(tmp, sizeof(tmp) / sizeof(mbedtls_mpi)); #if !defined(MBEDTLS_ECP_RESTARTABLE) (void) rs_ctx; #endif #if defined(MBEDTLS_ECP_RESTARTABLE) - if( rs_ctx != NULL && rs_ctx->rsm != NULL && - rs_ctx->rsm->state != ecp_rsm_comb_core ) - { + if (rs_ctx != NULL && rs_ctx->rsm != NULL && + rs_ctx->rsm->state != ecp_rsm_comb_core) { rs_ctx->rsm->i = 0; rs_ctx->rsm->state = ecp_rsm_comb_core; } /* new 'if' instead of nested for the sake of the 'else' branch */ - if( rs_ctx != NULL && rs_ctx->rsm != NULL && rs_ctx->rsm->i != 0 ) - { + if (rs_ctx != NULL && rs_ctx->rsm != NULL && rs_ctx->rsm->i != 0) { /* restore current index (R already pointing to rs_ctx->rsm->R) */ i = rs_ctx->rsm->i; - } - else + } else #endif { /* Start with a non-zero point and randomize its coordinates */ i = d; - MBEDTLS_MPI_CHK( ecp_select_comb( grp, R, T, T_size, x[i] ) ); - if( f_rng != 0 ) - MBEDTLS_MPI_CHK( ecp_randomize_jac( grp, R, f_rng, p_rng ) ); + MBEDTLS_MPI_CHK(ecp_select_comb(grp, R, T, T_size, x[i])); + if (f_rng != 0) { + MBEDTLS_MPI_CHK(ecp_randomize_jac(grp, R, f_rng, p_rng)); + } } - while( i != 0 ) - { - MBEDTLS_ECP_BUDGET( MBEDTLS_ECP_OPS_DBL + MBEDTLS_ECP_OPS_ADD ); + while (i != 0) { + MBEDTLS_ECP_BUDGET(MBEDTLS_ECP_OPS_DBL + MBEDTLS_ECP_OPS_ADD); --i; - MBEDTLS_MPI_CHK( ecp_double_jac( grp, R, R, tmp ) ); - MBEDTLS_MPI_CHK( ecp_select_comb( grp, &Txi, T, T_size, x[i] ) ); - MBEDTLS_MPI_CHK( ecp_add_mixed( grp, R, R, &Txi, tmp ) ); + MBEDTLS_MPI_CHK(ecp_double_jac(grp, R, R, tmp)); + MBEDTLS_MPI_CHK(ecp_select_comb(grp, &Txi, T, T_size, x[i])); + MBEDTLS_MPI_CHK(ecp_add_mixed(grp, R, R, &Txi, tmp)); } cleanup: - mbedtls_ecp_point_free( &Txi ); - mpi_free_many( tmp, sizeof( tmp ) / sizeof( mbedtls_mpi ) ); + mbedtls_ecp_point_free(&Txi); + mpi_free_many(tmp, sizeof(tmp) / sizeof(mbedtls_mpi)); #if defined(MBEDTLS_ECP_RESTARTABLE) - if( rs_ctx != NULL && rs_ctx->rsm != NULL && - ret == MBEDTLS_ERR_ECP_IN_PROGRESS ) - { + if (rs_ctx != NULL && rs_ctx->rsm != NULL && + ret == MBEDTLS_ERR_ECP_IN_PROGRESS) { rs_ctx->rsm->i = i; /* no need to save R, already pointing to rs_ctx->rsm->R */ } #endif - return( ret ); + return ret; } /* @@ -2077,39 +2126,40 @@ static int ecp_mul_comb_core( const mbedtls_ecp_group *grp, mbedtls_ecp_point *R * * See ecp_comb_recode_core() for background. */ -static int ecp_comb_recode_scalar( const mbedtls_ecp_group *grp, - const mbedtls_mpi *m, - unsigned char k[COMB_MAX_D + 1], - size_t d, - unsigned char w, - unsigned char *parity_trick ) +static int ecp_comb_recode_scalar(const mbedtls_ecp_group *grp, + const mbedtls_mpi *m, + unsigned char k[COMB_MAX_D + 1], + size_t d, + unsigned char w, + unsigned char *parity_trick) { int ret = MBEDTLS_ERR_ERROR_CORRUPTION_DETECTED; mbedtls_mpi M, mm; - mbedtls_mpi_init( &M ); - mbedtls_mpi_init( &mm ); + mbedtls_mpi_init(&M); + mbedtls_mpi_init(&mm); /* N is always odd (see above), just make extra sure */ - if( mbedtls_mpi_get_bit( &grp->N, 0 ) != 1 ) - return( MBEDTLS_ERR_ECP_BAD_INPUT_DATA ); + if (mbedtls_mpi_get_bit(&grp->N, 0) != 1) { + return MBEDTLS_ERR_ECP_BAD_INPUT_DATA; + } /* do we need the parity trick? */ - *parity_trick = ( mbedtls_mpi_get_bit( m, 0 ) == 0 ); + *parity_trick = (mbedtls_mpi_get_bit(m, 0) == 0); /* execute parity fix in constant time */ - MBEDTLS_MPI_CHK( mbedtls_mpi_copy( &M, m ) ); - MBEDTLS_MPI_CHK( mbedtls_mpi_sub_mpi( &mm, &grp->N, m ) ); - MBEDTLS_MPI_CHK( mbedtls_mpi_safe_cond_assign( &M, &mm, *parity_trick ) ); + MBEDTLS_MPI_CHK(mbedtls_mpi_copy(&M, m)); + MBEDTLS_MPI_CHK(mbedtls_mpi_sub_mpi(&mm, &grp->N, m)); + MBEDTLS_MPI_CHK(mbedtls_mpi_safe_cond_assign(&M, &mm, *parity_trick)); /* actual scalar recoding */ - ecp_comb_recode_core( k, d, w, &M ); + ecp_comb_recode_core(k, d, w, &M); cleanup: - mbedtls_mpi_free( &mm ); - mbedtls_mpi_free( &M ); + mbedtls_mpi_free(&mm); + mbedtls_mpi_free(&M); - return( ret ); + return ret; } /* @@ -2119,16 +2169,16 @@ static int ecp_comb_recode_scalar( const mbedtls_ecp_group *grp, * Scalar recoding may use a parity trick that makes us compute -m * P, * if that is the case we'll need to recover m * P at the end. */ -static int ecp_mul_comb_after_precomp( const mbedtls_ecp_group *grp, - mbedtls_ecp_point *R, - const mbedtls_mpi *m, - const mbedtls_ecp_point *T, - unsigned char T_size, - unsigned char w, - size_t d, - int (*f_rng)(void *, unsigned char *, size_t), - void *p_rng, - mbedtls_ecp_restart_ctx *rs_ctx ) +static int ecp_mul_comb_after_precomp(const mbedtls_ecp_group *grp, + mbedtls_ecp_point *R, + const mbedtls_mpi *m, + const mbedtls_ecp_point *T, + unsigned char T_size, + unsigned char w, + size_t d, + int (*f_rng)(void *, unsigned char *, size_t), + void *p_rng, + mbedtls_ecp_restart_ctx *rs_ctx) { int ret = MBEDTLS_ERR_ERROR_CORRUPTION_DETECTED; unsigned char parity_trick; @@ -2136,27 +2186,28 @@ static int ecp_mul_comb_after_precomp( const mbedtls_ecp_group *grp, mbedtls_ecp_point *RR = R; #if defined(MBEDTLS_ECP_RESTARTABLE) - if( rs_ctx != NULL && rs_ctx->rsm != NULL ) - { + if (rs_ctx != NULL && rs_ctx->rsm != NULL) { RR = &rs_ctx->rsm->R; - if( rs_ctx->rsm->state == ecp_rsm_final_norm ) + if (rs_ctx->rsm->state == ecp_rsm_final_norm) { goto final_norm; + } } #endif - MBEDTLS_MPI_CHK( ecp_comb_recode_scalar( grp, m, k, d, w, - &parity_trick ) ); - MBEDTLS_MPI_CHK( ecp_mul_comb_core( grp, RR, T, T_size, k, d, - f_rng, p_rng, rs_ctx ) ); - MBEDTLS_MPI_CHK( ecp_safe_invert_jac( grp, RR, parity_trick ) ); + MBEDTLS_MPI_CHK(ecp_comb_recode_scalar(grp, m, k, d, w, + &parity_trick)); + MBEDTLS_MPI_CHK(ecp_mul_comb_core(grp, RR, T, T_size, k, d, + f_rng, p_rng, rs_ctx)); + MBEDTLS_MPI_CHK(ecp_safe_invert_jac(grp, RR, parity_trick)); #if defined(MBEDTLS_ECP_RESTARTABLE) - if( rs_ctx != NULL && rs_ctx->rsm != NULL ) + if (rs_ctx != NULL && rs_ctx->rsm != NULL) { rs_ctx->rsm->state = ecp_rsm_final_norm; + } final_norm: - MBEDTLS_ECP_BUDGET( MBEDTLS_ECP_OPS_INV ); + MBEDTLS_ECP_BUDGET(MBEDTLS_ECP_OPS_INV); #endif /* * Knowledge of the jacobian coordinates may leak the last few bits of the @@ -2169,25 +2220,27 @@ static int ecp_mul_comb_after_precomp( const mbedtls_ecp_group *grp, * * Avoid the leak by randomizing coordinates before we normalize them. */ - if( f_rng != 0 ) - MBEDTLS_MPI_CHK( ecp_randomize_jac( grp, RR, f_rng, p_rng ) ); + if (f_rng != 0) { + MBEDTLS_MPI_CHK(ecp_randomize_jac(grp, RR, f_rng, p_rng)); + } - MBEDTLS_MPI_CHK( ecp_normalize_jac( grp, RR ) ); + MBEDTLS_MPI_CHK(ecp_normalize_jac(grp, RR)); #if defined(MBEDTLS_ECP_RESTARTABLE) - if( rs_ctx != NULL && rs_ctx->rsm != NULL ) - MBEDTLS_MPI_CHK( mbedtls_ecp_copy( R, RR ) ); + if (rs_ctx != NULL && rs_ctx->rsm != NULL) { + MBEDTLS_MPI_CHK(mbedtls_ecp_copy(R, RR)); + } #endif cleanup: - return( ret ); + return ret; } /* * Pick window size based on curve size and whether we optimize for base point */ -static unsigned char ecp_pick_window_size( const mbedtls_ecp_group *grp, - unsigned char p_eq_g ) +static unsigned char ecp_pick_window_size(const mbedtls_ecp_group *grp, + unsigned char p_eq_g) { unsigned char w; @@ -2203,8 +2256,9 @@ static unsigned char ecp_pick_window_size( const mbedtls_ecp_group *grp, * Just adding one avoids upping the cost of the first mul too much, * and the memory cost too. */ - if( p_eq_g ) + if (p_eq_g) { w++; + } /* * If static comb table may not be used (!p_eq_g) or static comb table does @@ -2215,14 +2269,16 @@ static unsigned char ecp_pick_window_size( const mbedtls_ecp_group *grp, * static comb table, because the size of static comb table is fixed when * it is generated. */ -#if( MBEDTLS_ECP_WINDOW_SIZE < 6 ) - if( (!p_eq_g || !ecp_group_is_static_comb_table(grp)) && w > MBEDTLS_ECP_WINDOW_SIZE ) +#if (MBEDTLS_ECP_WINDOW_SIZE < 6) + if ((!p_eq_g || !ecp_group_is_static_comb_table(grp)) && w > MBEDTLS_ECP_WINDOW_SIZE) { w = MBEDTLS_ECP_WINDOW_SIZE; + } #endif - if( w >= grp->nbits ) + if (w >= grp->nbits) { w = 2; + } - return( w ); + return w; } /* @@ -2238,11 +2294,11 @@ static unsigned char ecp_pick_window_size( const mbedtls_ecp_group *grp, * * See comments on ecp_comb_recode_core() regarding the computation strategy. */ -static int ecp_mul_comb( mbedtls_ecp_group *grp, mbedtls_ecp_point *R, - const mbedtls_mpi *m, const mbedtls_ecp_point *P, - int (*f_rng)(void *, unsigned char *, size_t), - void *p_rng, - mbedtls_ecp_restart_ctx *rs_ctx ) +static int ecp_mul_comb(mbedtls_ecp_group *grp, mbedtls_ecp_point *R, + const mbedtls_mpi *m, const mbedtls_ecp_point *P, + int (*f_rng)(void *, unsigned char *, size_t), + void *p_rng, + mbedtls_ecp_restart_ctx *rs_ctx) { int ret = MBEDTLS_ERR_ERROR_CORRUPTION_DETECTED; unsigned char w, p_eq_g, i; @@ -2250,33 +2306,30 @@ static int ecp_mul_comb( mbedtls_ecp_group *grp, mbedtls_ecp_point *R, unsigned char T_size = 0, T_ok = 0; mbedtls_ecp_point *T = NULL; - ECP_RS_ENTER( rsm ); + ECP_RS_ENTER(rsm); /* Is P the base point ? */ #if MBEDTLS_ECP_FIXED_POINT_OPTIM == 1 - p_eq_g = ( MPI_ECP_CMP( &P->Y, &grp->G.Y ) == 0 && - MPI_ECP_CMP( &P->X, &grp->G.X ) == 0 ); + p_eq_g = (MPI_ECP_CMP(&P->Y, &grp->G.Y) == 0 && + MPI_ECP_CMP(&P->X, &grp->G.X) == 0); #else p_eq_g = 0; #endif /* Pick window size and deduce related sizes */ - w = ecp_pick_window_size( grp, p_eq_g ); - T_size = 1U << ( w - 1 ); - d = ( grp->nbits + w - 1 ) / w; + w = ecp_pick_window_size(grp, p_eq_g); + T_size = 1U << (w - 1); + d = (grp->nbits + w - 1) / w; /* Pre-computed table: do we have it already for the base point? */ - if( p_eq_g && grp->T != NULL ) - { + if (p_eq_g && grp->T != NULL) { /* second pointer to the same table, will be deleted on exit */ T = grp->T; T_ok = 1; - } - else + } else #if defined(MBEDTLS_ECP_RESTARTABLE) /* Pre-computed table: do we have one in progress? complete? */ - if( rs_ctx != NULL && rs_ctx->rsm != NULL && rs_ctx->rsm->T != NULL ) - { + if (rs_ctx != NULL && rs_ctx->rsm != NULL && rs_ctx->rsm->T != NULL) { /* transfer ownership of T from rsm to local function */ T = rs_ctx->rsm->T; rs_ctx->rsm->T = NULL; @@ -2284,31 +2337,28 @@ static int ecp_mul_comb( mbedtls_ecp_group *grp, mbedtls_ecp_point *R, /* This effectively jumps to the call to mul_comb_after_precomp() */ T_ok = rs_ctx->rsm->state >= ecp_rsm_comb_core; - } - else + } else #endif /* Allocate table if we didn't have any */ { - T = mbedtls_calloc( T_size, sizeof( mbedtls_ecp_point ) ); - if( T == NULL ) - { + T = mbedtls_calloc(T_size, sizeof(mbedtls_ecp_point)); + if (T == NULL) { ret = MBEDTLS_ERR_ECP_ALLOC_FAILED; goto cleanup; } - for( i = 0; i < T_size; i++ ) - mbedtls_ecp_point_init( &T[i] ); + for (i = 0; i < T_size; i++) { + mbedtls_ecp_point_init(&T[i]); + } T_ok = 0; } /* Compute table (or finish computing it) if not done already */ - if( !T_ok ) - { - MBEDTLS_MPI_CHK( ecp_precompute_comb( grp, T, P, w, d, rs_ctx ) ); + if (!T_ok) { + MBEDTLS_MPI_CHK(ecp_precompute_comb(grp, T, P, w, d, rs_ctx)); - if( p_eq_g ) - { + if (p_eq_g) { /* almost transfer ownership of T to the group, but keep a copy of * the pointer to use for calling the next function more easily */ grp->T = T; @@ -2317,20 +2367,20 @@ static int ecp_mul_comb( mbedtls_ecp_group *grp, mbedtls_ecp_point *R, } /* Actual comb multiplication using precomputed points */ - MBEDTLS_MPI_CHK( ecp_mul_comb_after_precomp( grp, R, m, - T, T_size, w, d, - f_rng, p_rng, rs_ctx ) ); + MBEDTLS_MPI_CHK(ecp_mul_comb_after_precomp(grp, R, m, + T, T_size, w, d, + f_rng, p_rng, rs_ctx)); cleanup: /* does T belong to the group? */ - if( T == grp->T ) + if (T == grp->T) { T = NULL; + } /* does T belong to the restart context? */ #if defined(MBEDTLS_ECP_RESTARTABLE) - if( rs_ctx != NULL && rs_ctx->rsm != NULL && ret == MBEDTLS_ERR_ECP_IN_PROGRESS && T != NULL ) - { + if (rs_ctx != NULL && rs_ctx->rsm != NULL && ret == MBEDTLS_ERR_ECP_IN_PROGRESS && T != NULL) { /* transfer ownership of T from local function to rsm */ rs_ctx->rsm->T_size = T_size; rs_ctx->rsm->T = T; @@ -2339,24 +2389,28 @@ static int ecp_mul_comb( mbedtls_ecp_group *grp, mbedtls_ecp_point *R, #endif /* did T belong to us? then let's destroy it! */ - if( T != NULL ) - { - for( i = 0; i < T_size; i++ ) - mbedtls_ecp_point_free( &T[i] ); - mbedtls_free( T ); + if (T != NULL) { + for (i = 0; i < T_size; i++) { + mbedtls_ecp_point_free(&T[i]); + } + mbedtls_free(T); } - /* don't free R while in progress in case R == P */ + /* prevent caller from using invalid value */ + int should_free_R = (ret != 0); #if defined(MBEDTLS_ECP_RESTARTABLE) - if( ret != MBEDTLS_ERR_ECP_IN_PROGRESS ) + /* don't free R while in progress in case R == P */ + if (ret == MBEDTLS_ERR_ECP_IN_PROGRESS) { + should_free_R = 0; + } #endif - /* prevent caller from using invalid value */ - if( ret != 0 ) - mbedtls_ecp_point_free( R ); + if (should_free_R) { + mbedtls_ecp_point_free(R); + } - ECP_RS_LEAVE( rsm ); + ECP_RS_LEAVE(rsm); - return( ret ); + return ret; } #endif /* MBEDTLS_ECP_SHORT_WEIERSTRASS_ENABLED */ @@ -2374,23 +2428,24 @@ static int ecp_mul_comb( mbedtls_ecp_group *grp, mbedtls_ecp_point *R, * Normalize Montgomery x/z coordinates: X = X/Z, Z = 1 * Cost: 1M + 1I */ -static int ecp_normalize_mxz( const mbedtls_ecp_group *grp, mbedtls_ecp_point *P ) +static int ecp_normalize_mxz(const mbedtls_ecp_group *grp, mbedtls_ecp_point *P) { #if defined(MBEDTLS_ECP_NORMALIZE_MXZ_ALT) - if( mbedtls_internal_ecp_grp_capable( grp ) ) - return( mbedtls_internal_ecp_normalize_mxz( grp, P ) ); + if (mbedtls_internal_ecp_grp_capable(grp)) { + return mbedtls_internal_ecp_normalize_mxz(grp, P); + } #endif /* MBEDTLS_ECP_NORMALIZE_MXZ_ALT */ #if defined(MBEDTLS_ECP_NO_FALLBACK) && defined(MBEDTLS_ECP_NORMALIZE_MXZ_ALT) - return( MBEDTLS_ERR_ECP_FEATURE_UNAVAILABLE ); + return MBEDTLS_ERR_ECP_FEATURE_UNAVAILABLE; #else int ret = MBEDTLS_ERR_ERROR_CORRUPTION_DETECTED; - MPI_ECP_INV( &P->Z, &P->Z ); - MPI_ECP_MUL( &P->X, &P->X, &P->Z ); - MPI_ECP_LSET( &P->Z, 1 ); + MPI_ECP_INV(&P->Z, &P->Z); + MPI_ECP_MUL(&P->X, &P->X, &P->Z); + MPI_ECP_LSET(&P->Z, 1); cleanup: - return( ret ); + return ret; #endif /* !defined(MBEDTLS_ECP_NO_FALLBACK) || !defined(MBEDTLS_ECP_NORMALIZE_MXZ_ALT) */ } @@ -2402,33 +2457,35 @@ static int ecp_normalize_mxz( const mbedtls_ecp_group *grp, mbedtls_ecp_point *P * This countermeasure was first suggested in [2]. * Cost: 2M */ -static int ecp_randomize_mxz( const mbedtls_ecp_group *grp, mbedtls_ecp_point *P, - int (*f_rng)(void *, unsigned char *, size_t), void *p_rng ) +static int ecp_randomize_mxz(const mbedtls_ecp_group *grp, mbedtls_ecp_point *P, + int (*f_rng)(void *, unsigned char *, size_t), void *p_rng) { #if defined(MBEDTLS_ECP_RANDOMIZE_MXZ_ALT) - if( mbedtls_internal_ecp_grp_capable( grp ) ) - return( mbedtls_internal_ecp_randomize_mxz( grp, P, f_rng, p_rng ) ); + if (mbedtls_internal_ecp_grp_capable(grp)) { + return mbedtls_internal_ecp_randomize_mxz(grp, P, f_rng, p_rng); + } #endif /* MBEDTLS_ECP_RANDOMIZE_MXZ_ALT */ - #if defined(MBEDTLS_ECP_NO_FALLBACK) && defined(MBEDTLS_ECP_RANDOMIZE_MXZ_ALT) - return( MBEDTLS_ERR_ECP_FEATURE_UNAVAILABLE ); +#if defined(MBEDTLS_ECP_NO_FALLBACK) && defined(MBEDTLS_ECP_RANDOMIZE_MXZ_ALT) + return MBEDTLS_ERR_ECP_FEATURE_UNAVAILABLE; #else int ret = MBEDTLS_ERR_ERROR_CORRUPTION_DETECTED; mbedtls_mpi l; - mbedtls_mpi_init( &l ); + mbedtls_mpi_init(&l); /* Generate l such that 1 < l < p */ - MPI_ECP_RAND( &l ); + MPI_ECP_RAND(&l); - MPI_ECP_MUL( &P->X, &P->X, &l ); - MPI_ECP_MUL( &P->Z, &P->Z, &l ); + MPI_ECP_MUL(&P->X, &P->X, &l); + MPI_ECP_MUL(&P->Z, &P->Z, &l); cleanup: - mbedtls_mpi_free( &l ); + mbedtls_mpi_free(&l); - if( ret == MBEDTLS_ERR_MPI_NOT_ACCEPTABLE ) + if (ret == MBEDTLS_ERR_MPI_NOT_ACCEPTABLE) { ret = MBEDTLS_ERR_ECP_RANDOM_FAILED; - return( ret ); + } + return ret; #endif /* !defined(MBEDTLS_ECP_NO_FALLBACK) || !defined(MBEDTLS_ECP_RANDOMIZE_MXZ_ALT) */ } @@ -2447,44 +2504,45 @@ static int ecp_randomize_mxz( const mbedtls_ecp_group *grp, mbedtls_ecp_point *P * * Cost: 5M + 4S */ -static int ecp_double_add_mxz( const mbedtls_ecp_group *grp, - mbedtls_ecp_point *R, mbedtls_ecp_point *S, - const mbedtls_ecp_point *P, const mbedtls_ecp_point *Q, - const mbedtls_mpi *d, - mbedtls_mpi T[4] ) +static int ecp_double_add_mxz(const mbedtls_ecp_group *grp, + mbedtls_ecp_point *R, mbedtls_ecp_point *S, + const mbedtls_ecp_point *P, const mbedtls_ecp_point *Q, + const mbedtls_mpi *d, + mbedtls_mpi T[4]) { #if defined(MBEDTLS_ECP_DOUBLE_ADD_MXZ_ALT) - if( mbedtls_internal_ecp_grp_capable( grp ) ) - return( mbedtls_internal_ecp_double_add_mxz( grp, R, S, P, Q, d ) ); + if (mbedtls_internal_ecp_grp_capable(grp)) { + return mbedtls_internal_ecp_double_add_mxz(grp, R, S, P, Q, d); + } #endif /* MBEDTLS_ECP_DOUBLE_ADD_MXZ_ALT */ #if defined(MBEDTLS_ECP_NO_FALLBACK) && defined(MBEDTLS_ECP_DOUBLE_ADD_MXZ_ALT) - return( MBEDTLS_ERR_ECP_FEATURE_UNAVAILABLE ); + return MBEDTLS_ERR_ECP_FEATURE_UNAVAILABLE; #else int ret = MBEDTLS_ERR_ERROR_CORRUPTION_DETECTED; - MPI_ECP_ADD( &T[0], &P->X, &P->Z ); /* Pp := PX + PZ */ - MPI_ECP_SUB( &T[1], &P->X, &P->Z ); /* Pm := PX - PZ */ - MPI_ECP_ADD( &T[2], &Q->X, &Q->Z ); /* Qp := QX + XZ */ - MPI_ECP_SUB( &T[3], &Q->X, &Q->Z ); /* Qm := QX - QZ */ - MPI_ECP_MUL( &T[3], &T[3], &T[0] ); /* Qm * Pp */ - MPI_ECP_MUL( &T[2], &T[2], &T[1] ); /* Qp * Pm */ - MPI_ECP_SQR( &T[0], &T[0] ); /* Pp^2 */ - MPI_ECP_SQR( &T[1], &T[1] ); /* Pm^2 */ - MPI_ECP_MUL( &R->X, &T[0], &T[1] ); /* Pp^2 * Pm^2 */ - MPI_ECP_SUB( &T[0], &T[0], &T[1] ); /* Pp^2 - Pm^2 */ - MPI_ECP_MUL( &R->Z, &grp->A, &T[0] ); /* A * (Pp^2 - Pm^2) */ - MPI_ECP_ADD( &R->Z, &T[1], &R->Z ); /* [ A * (Pp^2-Pm^2) ] + Pm^2 */ - MPI_ECP_ADD( &S->X, &T[3], &T[2] ); /* Qm*Pp + Qp*Pm */ - MPI_ECP_SQR( &S->X, &S->X ); /* (Qm*Pp + Qp*Pm)^2 */ - MPI_ECP_SUB( &S->Z, &T[3], &T[2] ); /* Qm*Pp - Qp*Pm */ - MPI_ECP_SQR( &S->Z, &S->Z ); /* (Qm*Pp - Qp*Pm)^2 */ - MPI_ECP_MUL( &S->Z, d, &S->Z ); /* d * ( Qm*Pp - Qp*Pm )^2 */ - MPI_ECP_MUL( &R->Z, &T[0], &R->Z ); /* [A*(Pp^2-Pm^2)+Pm^2]*(Pp^2-Pm^2) */ + MPI_ECP_ADD(&T[0], &P->X, &P->Z); /* Pp := PX + PZ */ + MPI_ECP_SUB(&T[1], &P->X, &P->Z); /* Pm := PX - PZ */ + MPI_ECP_ADD(&T[2], &Q->X, &Q->Z); /* Qp := QX + XZ */ + MPI_ECP_SUB(&T[3], &Q->X, &Q->Z); /* Qm := QX - QZ */ + MPI_ECP_MUL(&T[3], &T[3], &T[0]); /* Qm * Pp */ + MPI_ECP_MUL(&T[2], &T[2], &T[1]); /* Qp * Pm */ + MPI_ECP_SQR(&T[0], &T[0]); /* Pp^2 */ + MPI_ECP_SQR(&T[1], &T[1]); /* Pm^2 */ + MPI_ECP_MUL(&R->X, &T[0], &T[1]); /* Pp^2 * Pm^2 */ + MPI_ECP_SUB(&T[0], &T[0], &T[1]); /* Pp^2 - Pm^2 */ + MPI_ECP_MUL(&R->Z, &grp->A, &T[0]); /* A * (Pp^2 - Pm^2) */ + MPI_ECP_ADD(&R->Z, &T[1], &R->Z); /* [ A * (Pp^2-Pm^2) ] + Pm^2 */ + MPI_ECP_ADD(&S->X, &T[3], &T[2]); /* Qm*Pp + Qp*Pm */ + MPI_ECP_SQR(&S->X, &S->X); /* (Qm*Pp + Qp*Pm)^2 */ + MPI_ECP_SUB(&S->Z, &T[3], &T[2]); /* Qm*Pp - Qp*Pm */ + MPI_ECP_SQR(&S->Z, &S->Z); /* (Qm*Pp - Qp*Pm)^2 */ + MPI_ECP_MUL(&S->Z, d, &S->Z); /* d * ( Qm*Pp - Qp*Pm )^2 */ + MPI_ECP_MUL(&R->Z, &T[0], &R->Z); /* [A*(Pp^2-Pm^2)+Pm^2]*(Pp^2-Pm^2) */ cleanup: - return( ret ); + return ret; #endif /* !defined(MBEDTLS_ECP_NO_FALLBACK) || !defined(MBEDTLS_ECP_DOUBLE_ADD_MXZ_ALT) */ } @@ -2492,10 +2550,10 @@ static int ecp_double_add_mxz( const mbedtls_ecp_group *grp, * Multiplication with Montgomery ladder in x/z coordinates, * for curves in Montgomery form */ -static int ecp_mul_mxz( mbedtls_ecp_group *grp, mbedtls_ecp_point *R, - const mbedtls_mpi *m, const mbedtls_ecp_point *P, - int (*f_rng)(void *, unsigned char *, size_t), - void *p_rng ) +static int ecp_mul_mxz(mbedtls_ecp_group *grp, mbedtls_ecp_point *R, + const mbedtls_mpi *m, const mbedtls_ecp_point *P, + int (*f_rng)(void *, unsigned char *, size_t), + void *p_rng) { int ret = MBEDTLS_ERR_ERROR_CORRUPTION_DETECTED; size_t i; @@ -2503,33 +2561,33 @@ static int ecp_mul_mxz( mbedtls_ecp_group *grp, mbedtls_ecp_point *R, mbedtls_ecp_point RP; mbedtls_mpi PX; mbedtls_mpi tmp[4]; - mbedtls_ecp_point_init( &RP ); mbedtls_mpi_init( &PX ); + mbedtls_ecp_point_init(&RP); mbedtls_mpi_init(&PX); - mpi_init_many( tmp, sizeof( tmp ) / sizeof( mbedtls_mpi ) ); + mpi_init_many(tmp, sizeof(tmp) / sizeof(mbedtls_mpi)); - if( f_rng == NULL ) - return( MBEDTLS_ERR_ECP_BAD_INPUT_DATA ); + if (f_rng == NULL) { + return MBEDTLS_ERR_ECP_BAD_INPUT_DATA; + } /* Save PX and read from P before writing to R, in case P == R */ - MPI_ECP_MOV( &PX, &P->X ); - MBEDTLS_MPI_CHK( mbedtls_ecp_copy( &RP, P ) ); + MPI_ECP_MOV(&PX, &P->X); + MBEDTLS_MPI_CHK(mbedtls_ecp_copy(&RP, P)); /* Set R to zero in modified x/z coordinates */ - MPI_ECP_LSET( &R->X, 1 ); - MPI_ECP_LSET( &R->Z, 0 ); - mbedtls_mpi_free( &R->Y ); + MPI_ECP_LSET(&R->X, 1); + MPI_ECP_LSET(&R->Z, 0); + mbedtls_mpi_free(&R->Y); /* RP.X might be slightly larger than P, so reduce it */ - MOD_ADD( &RP.X ); + MOD_ADD(&RP.X); /* Randomize coordinates of the starting point */ - MBEDTLS_MPI_CHK( ecp_randomize_mxz( grp, &RP, f_rng, p_rng ) ); + MBEDTLS_MPI_CHK(ecp_randomize_mxz(grp, &RP, f_rng, p_rng)); /* Loop invariant: R = result so far, RP = R + P */ - i = mbedtls_mpi_bitlen( m ); /* one past the (zero-based) most significant bit */ - while( i-- > 0 ) - { - b = mbedtls_mpi_get_bit( m, i ); + i = grp->nbits + 1; /* one past the (zero-based) required msb for private keys */ + while (i-- > 0) { + b = mbedtls_mpi_get_bit(m, i); /* * if (b) R = 2R + P else R = 2R, * which is: @@ -2537,11 +2595,11 @@ static int ecp_mul_mxz( mbedtls_ecp_group *grp, mbedtls_ecp_point *R, * else double_add( R, RP, R, RP ) * but using safe conditional swaps to avoid leaks */ - MPI_ECP_COND_SWAP( &R->X, &RP.X, b ); - MPI_ECP_COND_SWAP( &R->Z, &RP.Z, b ); - MBEDTLS_MPI_CHK( ecp_double_add_mxz( grp, R, &RP, R, &RP, &PX, tmp ) ); - MPI_ECP_COND_SWAP( &R->X, &RP.X, b ); - MPI_ECP_COND_SWAP( &R->Z, &RP.Z, b ); + MPI_ECP_COND_SWAP(&R->X, &RP.X, b); + MPI_ECP_COND_SWAP(&R->Z, &RP.Z, b); + MBEDTLS_MPI_CHK(ecp_double_add_mxz(grp, R, &RP, R, &RP, &PX, tmp)); + MPI_ECP_COND_SWAP(&R->X, &RP.X, b); + MPI_ECP_COND_SWAP(&R->Z, &RP.Z, b); } /* @@ -2555,14 +2613,14 @@ static int ecp_mul_mxz( mbedtls_ecp_group *grp, mbedtls_ecp_point *R, * * Avoid the leak by randomizing coordinates before we normalize them. */ - MBEDTLS_MPI_CHK( ecp_randomize_mxz( grp, R, f_rng, p_rng ) ); - MBEDTLS_MPI_CHK( ecp_normalize_mxz( grp, R ) ); + MBEDTLS_MPI_CHK(ecp_randomize_mxz(grp, R, f_rng, p_rng)); + MBEDTLS_MPI_CHK(ecp_normalize_mxz(grp, R)); cleanup: - mbedtls_ecp_point_free( &RP ); mbedtls_mpi_free( &PX ); - - mpi_free_many( tmp, sizeof( tmp ) / sizeof( mbedtls_mpi ) ); - return( ret ); + mbedtls_ecp_point_free(&RP); mbedtls_mpi_free(&PX); + + mpi_free_many(tmp, sizeof(tmp) / sizeof(mbedtls_mpi)); + return ret; } #endif /* MBEDTLS_ECP_MONTGOMERY_ENABLED */ @@ -2574,10 +2632,10 @@ static int ecp_mul_mxz( mbedtls_ecp_group *grp, mbedtls_ecp_point *R, * This internal function can be called without an RNG in case where we know * the inputs are not sensitive. */ -static int ecp_mul_restartable_internal( mbedtls_ecp_group *grp, mbedtls_ecp_point *R, - const mbedtls_mpi *m, const mbedtls_ecp_point *P, - int (*f_rng)(void *, unsigned char *, size_t), void *p_rng, - mbedtls_ecp_restart_ctx *rs_ctx ) +static int ecp_mul_restartable_internal(mbedtls_ecp_group *grp, mbedtls_ecp_point *R, + const mbedtls_mpi *m, const mbedtls_ecp_point *P, + int (*f_rng)(void *, unsigned char *, size_t), void *p_rng, + mbedtls_ecp_restart_ctx *rs_ctx) { int ret = MBEDTLS_ERR_ECP_BAD_INPUT_DATA; #if defined(MBEDTLS_ECP_INTERNAL_ALT) @@ -2586,87 +2644,86 @@ static int ecp_mul_restartable_internal( mbedtls_ecp_group *grp, mbedtls_ecp_poi #if defined(MBEDTLS_ECP_RESTARTABLE) /* reset ops count for this call if top-level */ - if( rs_ctx != NULL && rs_ctx->depth++ == 0 ) + if (rs_ctx != NULL && rs_ctx->depth++ == 0) { rs_ctx->ops_done = 0; + } #else (void) rs_ctx; #endif #if defined(MBEDTLS_ECP_INTERNAL_ALT) - if( ( is_grp_capable = mbedtls_internal_ecp_grp_capable( grp ) ) ) - MBEDTLS_MPI_CHK( mbedtls_internal_ecp_init( grp ) ); + if ((is_grp_capable = mbedtls_internal_ecp_grp_capable(grp))) { + MBEDTLS_MPI_CHK(mbedtls_internal_ecp_init(grp)); + } #endif /* MBEDTLS_ECP_INTERNAL_ALT */ + int restarting = 0; #if defined(MBEDTLS_ECP_RESTARTABLE) - /* skip argument check when restarting */ - if( rs_ctx == NULL || rs_ctx->rsm == NULL ) + restarting = (rs_ctx != NULL && rs_ctx->rsm != NULL); #endif - { + /* skip argument check when restarting */ + if (!restarting) { /* check_privkey is free */ - MBEDTLS_ECP_BUDGET( MBEDTLS_ECP_OPS_CHK ); + MBEDTLS_ECP_BUDGET(MBEDTLS_ECP_OPS_CHK); /* Common sanity checks */ - MBEDTLS_MPI_CHK( mbedtls_ecp_check_privkey( grp, m ) ); - MBEDTLS_MPI_CHK( mbedtls_ecp_check_pubkey( grp, P ) ); + MBEDTLS_MPI_CHK(mbedtls_ecp_check_privkey(grp, m)); + MBEDTLS_MPI_CHK(mbedtls_ecp_check_pubkey(grp, P)); } ret = MBEDTLS_ERR_ECP_BAD_INPUT_DATA; #if defined(MBEDTLS_ECP_MONTGOMERY_ENABLED) - if( mbedtls_ecp_get_type( grp ) == MBEDTLS_ECP_TYPE_MONTGOMERY ) - MBEDTLS_MPI_CHK( ecp_mul_mxz( grp, R, m, P, f_rng, p_rng ) ); + if (mbedtls_ecp_get_type(grp) == MBEDTLS_ECP_TYPE_MONTGOMERY) { + MBEDTLS_MPI_CHK(ecp_mul_mxz(grp, R, m, P, f_rng, p_rng)); + } #endif #if defined(MBEDTLS_ECP_SHORT_WEIERSTRASS_ENABLED) - if( mbedtls_ecp_get_type( grp ) == MBEDTLS_ECP_TYPE_SHORT_WEIERSTRASS ) - MBEDTLS_MPI_CHK( ecp_mul_comb( grp, R, m, P, f_rng, p_rng, rs_ctx ) ); + if (mbedtls_ecp_get_type(grp) == MBEDTLS_ECP_TYPE_SHORT_WEIERSTRASS) { + MBEDTLS_MPI_CHK(ecp_mul_comb(grp, R, m, P, f_rng, p_rng, rs_ctx)); + } #endif cleanup: #if defined(MBEDTLS_ECP_INTERNAL_ALT) - if( is_grp_capable ) - mbedtls_internal_ecp_free( grp ); + if (is_grp_capable) { + mbedtls_internal_ecp_free(grp); + } #endif /* MBEDTLS_ECP_INTERNAL_ALT */ #if defined(MBEDTLS_ECP_RESTARTABLE) - if( rs_ctx != NULL ) + if (rs_ctx != NULL) { rs_ctx->depth--; + } #endif - return( ret ); + return ret; } /* * Restartable multiplication R = m * P */ -int mbedtls_ecp_mul_restartable( mbedtls_ecp_group *grp, mbedtls_ecp_point *R, - const mbedtls_mpi *m, const mbedtls_ecp_point *P, - int (*f_rng)(void *, unsigned char *, size_t), void *p_rng, - mbedtls_ecp_restart_ctx *rs_ctx ) +int mbedtls_ecp_mul_restartable(mbedtls_ecp_group *grp, mbedtls_ecp_point *R, + const mbedtls_mpi *m, const mbedtls_ecp_point *P, + int (*f_rng)(void *, unsigned char *, size_t), void *p_rng, + mbedtls_ecp_restart_ctx *rs_ctx) { - ECP_VALIDATE_RET( grp != NULL ); - ECP_VALIDATE_RET( R != NULL ); - ECP_VALIDATE_RET( m != NULL ); - ECP_VALIDATE_RET( P != NULL ); - - if( f_rng == NULL ) - return( MBEDTLS_ERR_ECP_BAD_INPUT_DATA ); + if (f_rng == NULL) { + return MBEDTLS_ERR_ECP_BAD_INPUT_DATA; + } - return( ecp_mul_restartable_internal( grp, R, m, P, f_rng, p_rng, rs_ctx ) ); + return ecp_mul_restartable_internal(grp, R, m, P, f_rng, p_rng, rs_ctx); } #endif /* #ifdef FSP_NOT_DEFINED */ /* * Multiplication R = m * P */ -int mbedtls_ecp_mul( mbedtls_ecp_group *grp, mbedtls_ecp_point *R, - const mbedtls_mpi *m, const mbedtls_ecp_point *P, - int (*f_rng)(void *, unsigned char *, size_t), void *p_rng ) +int mbedtls_ecp_mul(mbedtls_ecp_group *grp, mbedtls_ecp_point *R, + const mbedtls_mpi *m, const mbedtls_ecp_point *P, + int (*f_rng)(void *, unsigned char *, size_t), void *p_rng) { - ECP_VALIDATE_RET( grp != NULL ); - ECP_VALIDATE_RET( R != NULL ); - ECP_VALIDATE_RET( m != NULL ); - ECP_VALIDATE_RET( P != NULL ); - return( mbedtls_ecp_mul_restartable( grp, R, m, P, f_rng, p_rng, NULL ) ); + return mbedtls_ecp_mul_restartable(grp, R, m, P, f_rng, p_rng, NULL); } #if defined(MBEDTLS_ECP_SHORT_WEIERSTRASS_ENABLED) @@ -2674,48 +2731,37 @@ int mbedtls_ecp_mul( mbedtls_ecp_group *grp, mbedtls_ecp_point *R, * Check that an affine point is valid as a public key, * short weierstrass curves (SEC1 3.2.3.1) */ -static int ecp_check_pubkey_sw( const mbedtls_ecp_group *grp, const mbedtls_ecp_point *pt ) +static int ecp_check_pubkey_sw(const mbedtls_ecp_group *grp, const mbedtls_ecp_point *pt) { int ret = MBEDTLS_ERR_ERROR_CORRUPTION_DETECTED; mbedtls_mpi YY, RHS; /* pt coordinates must be normalized for our checks */ - if( mbedtls_mpi_cmp_int( &pt->X, 0 ) < 0 || - mbedtls_mpi_cmp_int( &pt->Y, 0 ) < 0 || - mbedtls_mpi_cmp_mpi( &pt->X, &grp->P ) >= 0 || - mbedtls_mpi_cmp_mpi( &pt->Y, &grp->P ) >= 0 ) - return( MBEDTLS_ERR_ECP_INVALID_KEY ); + if (mbedtls_mpi_cmp_int(&pt->X, 0) < 0 || + mbedtls_mpi_cmp_int(&pt->Y, 0) < 0 || + mbedtls_mpi_cmp_mpi(&pt->X, &grp->P) >= 0 || + mbedtls_mpi_cmp_mpi(&pt->Y, &grp->P) >= 0) { + return MBEDTLS_ERR_ECP_INVALID_KEY; + } - mbedtls_mpi_init( &YY ); mbedtls_mpi_init( &RHS ); + mbedtls_mpi_init(&YY); mbedtls_mpi_init(&RHS); /* * YY = Y^2 - * RHS = X (X^2 + A) + B = X^3 + A X + B + * RHS = X^3 + A X + B */ - MPI_ECP_SQR( &YY, &pt->Y ); - MPI_ECP_SQR( &RHS, &pt->X ); + MPI_ECP_SQR(&YY, &pt->Y); + MBEDTLS_MPI_CHK(ecp_sw_rhs(grp, &RHS, &pt->X)); - /* Special case for A = -3 */ - if( grp->A.p == NULL ) - { - MPI_ECP_SUB_INT( &RHS, &RHS, 3 ); - } - else - { - MPI_ECP_ADD( &RHS, &RHS, &grp->A ); - } - - MPI_ECP_MUL( &RHS, &RHS, &pt->X ); - MPI_ECP_ADD( &RHS, &RHS, &grp->B ); - - if( MPI_ECP_CMP( &YY, &RHS ) != 0 ) + if (MPI_ECP_CMP(&YY, &RHS) != 0) { ret = MBEDTLS_ERR_ECP_INVALID_KEY; + } cleanup: - mbedtls_mpi_free( &YY ); mbedtls_mpi_free( &RHS ); + mbedtls_mpi_free(&YY); mbedtls_mpi_free(&RHS); - return( ret ); + return ret; } #endif /* MBEDTLS_ECP_SHORT_WEIERSTRASS_ENABLED */ @@ -2724,39 +2770,35 @@ static int ecp_check_pubkey_sw( const mbedtls_ecp_group *grp, const mbedtls_ecp_ * R = m * P with shortcuts for m == 0, m == 1 and m == -1 * NOT constant-time - ONLY for short Weierstrass! */ -static int mbedtls_ecp_mul_shortcuts( mbedtls_ecp_group *grp, - mbedtls_ecp_point *R, - const mbedtls_mpi *m, - const mbedtls_ecp_point *P, - mbedtls_ecp_restart_ctx *rs_ctx ) +static int mbedtls_ecp_mul_shortcuts(mbedtls_ecp_group *grp, + mbedtls_ecp_point *R, + const mbedtls_mpi *m, + const mbedtls_ecp_point *P, + mbedtls_ecp_restart_ctx *rs_ctx) { int ret = MBEDTLS_ERR_ERROR_CORRUPTION_DETECTED; mbedtls_mpi tmp; - mbedtls_mpi_init( &tmp ); - - if( mbedtls_mpi_cmp_int( m, 0 ) == 0 ) - { - MBEDTLS_MPI_CHK( mbedtls_ecp_set_zero( R ) ); - } - else if( mbedtls_mpi_cmp_int( m, 1 ) == 0 ) - { - MBEDTLS_MPI_CHK( mbedtls_ecp_copy( R, P ) ); - } - else if( mbedtls_mpi_cmp_int( m, -1 ) == 0 ) - { - MBEDTLS_MPI_CHK( mbedtls_ecp_copy( R, P ) ); - MPI_ECP_NEG( &R->Y ); - } - else - { - MBEDTLS_MPI_CHK( mbedtls_ecp_mul_restartable( grp, R, m, P, - NULL, NULL, rs_ctx ) ); + mbedtls_mpi_init(&tmp); + + if (mbedtls_mpi_cmp_int(m, 0) == 0) { + MBEDTLS_MPI_CHK(mbedtls_ecp_check_pubkey(grp, P)); + MBEDTLS_MPI_CHK(mbedtls_ecp_set_zero(R)); + } else if (mbedtls_mpi_cmp_int(m, 1) == 0) { + MBEDTLS_MPI_CHK(mbedtls_ecp_check_pubkey(grp, P)); + MBEDTLS_MPI_CHK(mbedtls_ecp_copy(R, P)); + } else if (mbedtls_mpi_cmp_int(m, -1) == 0) { + MBEDTLS_MPI_CHK(mbedtls_ecp_check_pubkey(grp, P)); + MBEDTLS_MPI_CHK(mbedtls_ecp_copy(R, P)); + MPI_ECP_NEG(&R->Y); + } else { + MBEDTLS_MPI_CHK( mbedtls_ecp_mul_restartable(grp, R, m, P, + NULL, NULL, rs_ctx)); } cleanup: - mbedtls_mpi_free( &tmp ); + mbedtls_mpi_free(&tmp); - return( ret ); + return ret; } /* @@ -2764,10 +2806,10 @@ static int mbedtls_ecp_mul_shortcuts( mbedtls_ecp_group *grp, * NOT constant-time */ int mbedtls_ecp_muladd_restartable( - mbedtls_ecp_group *grp, mbedtls_ecp_point *R, - const mbedtls_mpi *m, const mbedtls_ecp_point *P, - const mbedtls_mpi *n, const mbedtls_ecp_point *Q, - mbedtls_ecp_restart_ctx *rs_ctx ) + mbedtls_ecp_group *grp, mbedtls_ecp_point *R, + const mbedtls_mpi *m, const mbedtls_ecp_point *P, + const mbedtls_mpi *n, const mbedtls_ecp_point *Q, + mbedtls_ecp_restart_ctx *rs_ctx) { int ret = MBEDTLS_ERR_ERROR_CORRUPTION_DETECTED; mbedtls_ecp_point mP; @@ -2777,111 +2819,107 @@ int mbedtls_ecp_muladd_restartable( #if defined(MBEDTLS_ECP_INTERNAL_ALT) char is_grp_capable = 0; #endif - ECP_VALIDATE_RET( grp != NULL ); - ECP_VALIDATE_RET( R != NULL ); - ECP_VALIDATE_RET( m != NULL ); - ECP_VALIDATE_RET( P != NULL ); - ECP_VALIDATE_RET( n != NULL ); - ECP_VALIDATE_RET( Q != NULL ); - - if( mbedtls_ecp_get_type( grp ) != MBEDTLS_ECP_TYPE_SHORT_WEIERSTRASS ) - return( MBEDTLS_ERR_ECP_FEATURE_UNAVAILABLE ); + if (mbedtls_ecp_get_type(grp) != MBEDTLS_ECP_TYPE_SHORT_WEIERSTRASS) { + return MBEDTLS_ERR_ECP_FEATURE_UNAVAILABLE; + } - mbedtls_ecp_point_init( &mP ); - mpi_init_many( tmp, sizeof( tmp ) / sizeof( mbedtls_mpi ) ); + mbedtls_ecp_point_init(&mP); + mpi_init_many(tmp, sizeof(tmp) / sizeof(mbedtls_mpi)); - ECP_RS_ENTER( ma ); + ECP_RS_ENTER(ma); #if defined(MBEDTLS_ECP_RESTARTABLE) - if( rs_ctx != NULL && rs_ctx->ma != NULL ) - { + if (rs_ctx != NULL && rs_ctx->ma != NULL) { /* redirect intermediate results to restart context */ pmP = &rs_ctx->ma->mP; pR = &rs_ctx->ma->R; /* jump to next operation */ - if( rs_ctx->ma->state == ecp_rsma_mul2 ) + if (rs_ctx->ma->state == ecp_rsma_mul2) { goto mul2; - if( rs_ctx->ma->state == ecp_rsma_add ) + } + if (rs_ctx->ma->state == ecp_rsma_add) { goto add; - if( rs_ctx->ma->state == ecp_rsma_norm ) + } + if (rs_ctx->ma->state == ecp_rsma_norm) { goto norm; + } } #endif /* MBEDTLS_ECP_RESTARTABLE */ - MBEDTLS_MPI_CHK( mbedtls_ecp_mul_shortcuts( grp, pmP, m, P, rs_ctx ) ); + MBEDTLS_MPI_CHK(mbedtls_ecp_mul_shortcuts(grp, pmP, m, P, rs_ctx)); #if defined(MBEDTLS_ECP_RESTARTABLE) - if( rs_ctx != NULL && rs_ctx->ma != NULL ) + if (rs_ctx != NULL && rs_ctx->ma != NULL) { rs_ctx->ma->state = ecp_rsma_mul2; + } mul2: #endif - MBEDTLS_MPI_CHK( mbedtls_ecp_mul_shortcuts( grp, pR, n, Q, rs_ctx ) ); + MBEDTLS_MPI_CHK(mbedtls_ecp_mul_shortcuts(grp, pR, n, Q, rs_ctx)); #if defined(MBEDTLS_ECP_INTERNAL_ALT) - if( ( is_grp_capable = mbedtls_internal_ecp_grp_capable( grp ) ) ) - MBEDTLS_MPI_CHK( mbedtls_internal_ecp_init( grp ) ); + if ((is_grp_capable = mbedtls_internal_ecp_grp_capable(grp))) { + MBEDTLS_MPI_CHK(mbedtls_internal_ecp_init(grp)); + } #endif /* MBEDTLS_ECP_INTERNAL_ALT */ #if defined(MBEDTLS_ECP_RESTARTABLE) - if( rs_ctx != NULL && rs_ctx->ma != NULL ) + if (rs_ctx != NULL && rs_ctx->ma != NULL) { rs_ctx->ma->state = ecp_rsma_add; + } add: #endif - MBEDTLS_ECP_BUDGET( MBEDTLS_ECP_OPS_ADD ); - MBEDTLS_MPI_CHK( ecp_add_mixed( grp, pR, pmP, pR, tmp ) ); + MBEDTLS_ECP_BUDGET(MBEDTLS_ECP_OPS_ADD); + MBEDTLS_MPI_CHK(ecp_add_mixed(grp, pR, pmP, pR, tmp)); #if defined(MBEDTLS_ECP_RESTARTABLE) - if( rs_ctx != NULL && rs_ctx->ma != NULL ) + if (rs_ctx != NULL && rs_ctx->ma != NULL) { rs_ctx->ma->state = ecp_rsma_norm; + } norm: #endif - MBEDTLS_ECP_BUDGET( MBEDTLS_ECP_OPS_INV ); - MBEDTLS_MPI_CHK( ecp_normalize_jac( grp, pR ) ); + MBEDTLS_ECP_BUDGET(MBEDTLS_ECP_OPS_INV); + MBEDTLS_MPI_CHK(ecp_normalize_jac(grp, pR)); #if defined(MBEDTLS_ECP_RESTARTABLE) - if( rs_ctx != NULL && rs_ctx->ma != NULL ) - MBEDTLS_MPI_CHK( mbedtls_ecp_copy( R, pR ) ); + if (rs_ctx != NULL && rs_ctx->ma != NULL) { + MBEDTLS_MPI_CHK(mbedtls_ecp_copy(R, pR)); + } #endif cleanup: - mpi_free_many( tmp, sizeof( tmp ) / sizeof( mbedtls_mpi ) ); + mpi_free_many(tmp, sizeof(tmp) / sizeof(mbedtls_mpi)); #if defined(MBEDTLS_ECP_INTERNAL_ALT) - if( is_grp_capable ) - mbedtls_internal_ecp_free( grp ); + if (is_grp_capable) { + mbedtls_internal_ecp_free(grp); + } #endif /* MBEDTLS_ECP_INTERNAL_ALT */ - mbedtls_ecp_point_free( &mP ); + mbedtls_ecp_point_free(&mP); - ECP_RS_LEAVE( ma ); + ECP_RS_LEAVE(ma); - return( ret ); + return ret; } /* * Linear combination * NOT constant-time */ -int mbedtls_ecp_muladd( mbedtls_ecp_group *grp, mbedtls_ecp_point *R, - const mbedtls_mpi *m, const mbedtls_ecp_point *P, - const mbedtls_mpi *n, const mbedtls_ecp_point *Q ) +int mbedtls_ecp_muladd(mbedtls_ecp_group *grp, mbedtls_ecp_point *R, + const mbedtls_mpi *m, const mbedtls_ecp_point *P, + const mbedtls_mpi *n, const mbedtls_ecp_point *Q) { - ECP_VALIDATE_RET( grp != NULL ); - ECP_VALIDATE_RET( R != NULL ); - ECP_VALIDATE_RET( m != NULL ); - ECP_VALIDATE_RET( P != NULL ); - ECP_VALIDATE_RET( n != NULL ); - ECP_VALIDATE_RET( Q != NULL ); - return( mbedtls_ecp_muladd_restartable( grp, R, m, P, n, Q, NULL ) ); + return mbedtls_ecp_muladd_restartable(grp, R, m, P, n, Q, NULL); } #endif /* MBEDTLS_ECP_SHORT_WEIERSTRASS_ENABLED */ #if defined(MBEDTLS_ECP_MONTGOMERY_ENABLED) #if defined(MBEDTLS_ECP_DP_CURVE25519_ENABLED) -#define ECP_MPI_INIT(s, n, p) {s, (n), (mbedtls_mpi_uint *)(p)} +#define ECP_MPI_INIT(s, n, p) { s, (n), (mbedtls_mpi_uint *) (p) } #define ECP_MPI_INIT_ARRAY(x) \ ECP_MPI_INIT(1, sizeof(x) / sizeof(mbedtls_mpi_uint), x) /* @@ -2890,21 +2928,21 @@ int mbedtls_ecp_muladd( mbedtls_ecp_group *grp, mbedtls_ecp_point *R, * See ecp_check_pubkey_x25519(). */ static const mbedtls_mpi_uint x25519_bad_point_1[] = { - MBEDTLS_BYTES_TO_T_UINT_8( 0xe0, 0xeb, 0x7a, 0x7c, 0x3b, 0x41, 0xb8, 0xae ), - MBEDTLS_BYTES_TO_T_UINT_8( 0x16, 0x56, 0xe3, 0xfa, 0xf1, 0x9f, 0xc4, 0x6a ), - MBEDTLS_BYTES_TO_T_UINT_8( 0xda, 0x09, 0x8d, 0xeb, 0x9c, 0x32, 0xb1, 0xfd ), - MBEDTLS_BYTES_TO_T_UINT_8( 0x86, 0x62, 0x05, 0x16, 0x5f, 0x49, 0xb8, 0x00 ), + MBEDTLS_BYTES_TO_T_UINT_8(0xe0, 0xeb, 0x7a, 0x7c, 0x3b, 0x41, 0xb8, 0xae), + MBEDTLS_BYTES_TO_T_UINT_8(0x16, 0x56, 0xe3, 0xfa, 0xf1, 0x9f, 0xc4, 0x6a), + MBEDTLS_BYTES_TO_T_UINT_8(0xda, 0x09, 0x8d, 0xeb, 0x9c, 0x32, 0xb1, 0xfd), + MBEDTLS_BYTES_TO_T_UINT_8(0x86, 0x62, 0x05, 0x16, 0x5f, 0x49, 0xb8, 0x00), }; static const mbedtls_mpi_uint x25519_bad_point_2[] = { - MBEDTLS_BYTES_TO_T_UINT_8( 0x5f, 0x9c, 0x95, 0xbc, 0xa3, 0x50, 0x8c, 0x24 ), - MBEDTLS_BYTES_TO_T_UINT_8( 0xb1, 0xd0, 0xb1, 0x55, 0x9c, 0x83, 0xef, 0x5b ), - MBEDTLS_BYTES_TO_T_UINT_8( 0x04, 0x44, 0x5c, 0xc4, 0x58, 0x1c, 0x8e, 0x86 ), - MBEDTLS_BYTES_TO_T_UINT_8( 0xd8, 0x22, 0x4e, 0xdd, 0xd0, 0x9f, 0x11, 0x57 ), + MBEDTLS_BYTES_TO_T_UINT_8(0x5f, 0x9c, 0x95, 0xbc, 0xa3, 0x50, 0x8c, 0x24), + MBEDTLS_BYTES_TO_T_UINT_8(0xb1, 0xd0, 0xb1, 0x55, 0x9c, 0x83, 0xef, 0x5b), + MBEDTLS_BYTES_TO_T_UINT_8(0x04, 0x44, 0x5c, 0xc4, 0x58, 0x1c, 0x8e, 0x86), + MBEDTLS_BYTES_TO_T_UINT_8(0xd8, 0x22, 0x4e, 0xdd, 0xd0, 0x9f, 0x11, 0x57), }; static const mbedtls_mpi ecp_x25519_bad_point_1 = ECP_MPI_INIT_ARRAY( - x25519_bad_point_1 ); + x25519_bad_point_1); static const mbedtls_mpi ecp_x25519_bad_point_2 = ECP_MPI_INIT_ARRAY( - x25519_bad_point_2 ); + x25519_bad_point_2); #endif /* MBEDTLS_ECP_DP_CURVE25519_ENABLED */ /* @@ -2913,40 +2951,37 @@ static const mbedtls_mpi ecp_x25519_bad_point_2 = ECP_MPI_INIT_ARRAY( * https://eprint.iacr.org/2017/806.pdf * Those points are never sent by an honest peer. */ -static int ecp_check_bad_points_mx( const mbedtls_mpi *X, const mbedtls_mpi *P, - const mbedtls_ecp_group_id grp_id ) +static int ecp_check_bad_points_mx(const mbedtls_mpi *X, const mbedtls_mpi *P, + const mbedtls_ecp_group_id grp_id) { int ret; mbedtls_mpi XmP; - mbedtls_mpi_init( &XmP ); + mbedtls_mpi_init(&XmP); /* Reduce X mod P so that we only need to check values less than P. * We know X < 2^256 so we can proceed by subtraction. */ - MBEDTLS_MPI_CHK( mbedtls_mpi_copy( &XmP, X ) ); - while( mbedtls_mpi_cmp_mpi( &XmP, P ) >= 0 ) - MBEDTLS_MPI_CHK( mbedtls_mpi_sub_mpi( &XmP, &XmP, P ) ); + MBEDTLS_MPI_CHK(mbedtls_mpi_copy(&XmP, X)); + while (mbedtls_mpi_cmp_mpi(&XmP, P) >= 0) { + MBEDTLS_MPI_CHK(mbedtls_mpi_sub_mpi(&XmP, &XmP, P)); + } /* Check against the known bad values that are less than P. For Curve448 * these are 0, 1 and -1. For Curve25519 we check the values less than P * from the following list: https://cr.yp.to/ecdh.html#validate */ - if( mbedtls_mpi_cmp_int( &XmP, 1 ) <= 0 ) /* takes care of 0 and 1 */ - { + if (mbedtls_mpi_cmp_int(&XmP, 1) <= 0) { /* takes care of 0 and 1 */ ret = MBEDTLS_ERR_ECP_INVALID_KEY; goto cleanup; } #if defined(MBEDTLS_ECP_DP_CURVE25519_ENABLED) - if( grp_id == MBEDTLS_ECP_DP_CURVE25519 ) - { - if( mbedtls_mpi_cmp_mpi( &XmP, &ecp_x25519_bad_point_1 ) == 0 ) - { + if (grp_id == MBEDTLS_ECP_DP_CURVE25519) { + if (mbedtls_mpi_cmp_mpi(&XmP, &ecp_x25519_bad_point_1) == 0) { ret = MBEDTLS_ERR_ECP_INVALID_KEY; goto cleanup; } - if( mbedtls_mpi_cmp_mpi( &XmP, &ecp_x25519_bad_point_2 ) == 0 ) - { + if (mbedtls_mpi_cmp_mpi(&XmP, &ecp_x25519_bad_point_2) == 0) { ret = MBEDTLS_ERR_ECP_INVALID_KEY; goto cleanup; } @@ -2956,9 +2991,8 @@ static int ecp_check_bad_points_mx( const mbedtls_mpi *X, const mbedtls_mpi *P, #endif /* Final check: check if XmP + 1 is P (final because it changes XmP!) */ - MBEDTLS_MPI_CHK( mbedtls_mpi_add_int( &XmP, &XmP, 1 ) ); - if( mbedtls_mpi_cmp_mpi( &XmP, P ) == 0 ) - { + MBEDTLS_MPI_CHK(mbedtls_mpi_add_int(&XmP, &XmP, 1)); + if (mbedtls_mpi_cmp_mpi(&XmP, P) == 0) { ret = MBEDTLS_ERR_ECP_INVALID_KEY; goto cleanup; } @@ -2966,94 +3000,94 @@ static int ecp_check_bad_points_mx( const mbedtls_mpi *X, const mbedtls_mpi *P, ret = 0; cleanup: - mbedtls_mpi_free( &XmP ); + mbedtls_mpi_free(&XmP); - return( ret ); + return ret; } /* * Check validity of a public key for Montgomery curves with x-only schemes */ -static int ecp_check_pubkey_mx( const mbedtls_ecp_group *grp, const mbedtls_ecp_point *pt ) +static int ecp_check_pubkey_mx(const mbedtls_ecp_group *grp, const mbedtls_ecp_point *pt) { /* [Curve25519 p. 5] Just check X is the correct number of bytes */ /* Allow any public value, if it's too big then we'll just reduce it mod p * (RFC 7748 sec. 5 para. 3). */ - if( mbedtls_mpi_size( &pt->X ) > ( grp->nbits + 7 ) / 8 ) - return( MBEDTLS_ERR_ECP_INVALID_KEY ); + if (mbedtls_mpi_size(&pt->X) > (grp->nbits + 7) / 8) { + return MBEDTLS_ERR_ECP_INVALID_KEY; + } - /* Implicit in all standards (as they don't consider negative numbers): + /* Implicit in all standards (as they don't consider negative numbers): * X must be non-negative. This is normally ensured by the way it's * encoded for transmission, but let's be extra sure. */ - if( mbedtls_mpi_cmp_int( &pt->X, 0 ) < 0 ) - return( MBEDTLS_ERR_ECP_INVALID_KEY ); + if (mbedtls_mpi_cmp_int(&pt->X, 0) < 0) { + return MBEDTLS_ERR_ECP_INVALID_KEY; + } - return( ecp_check_bad_points_mx( &pt->X, &grp->P, grp->id ) ); + return ecp_check_bad_points_mx(&pt->X, &grp->P, grp->id); } #endif /* MBEDTLS_ECP_MONTGOMERY_ENABLED */ /* * Check that a point is valid as a public key */ -int mbedtls_ecp_check_pubkey( const mbedtls_ecp_group *grp, - const mbedtls_ecp_point *pt ) +int mbedtls_ecp_check_pubkey(const mbedtls_ecp_group *grp, + const mbedtls_ecp_point *pt) { - ECP_VALIDATE_RET( grp != NULL ); - ECP_VALIDATE_RET( pt != NULL ); - /* Must use affine coordinates */ - if( mbedtls_mpi_cmp_int( &pt->Z, 1 ) != 0 ) - return( MBEDTLS_ERR_ECP_INVALID_KEY ); + if (mbedtls_mpi_cmp_int(&pt->Z, 1) != 0) { + return MBEDTLS_ERR_ECP_INVALID_KEY; + } #if defined(MBEDTLS_ECP_MONTGOMERY_ENABLED) - if( mbedtls_ecp_get_type( grp ) == MBEDTLS_ECP_TYPE_MONTGOMERY ) - return( ecp_check_pubkey_mx( grp, pt ) ); + if (mbedtls_ecp_get_type(grp) == MBEDTLS_ECP_TYPE_MONTGOMERY) { + return ecp_check_pubkey_mx(grp, pt); + } #endif #if defined(MBEDTLS_ECP_SHORT_WEIERSTRASS_ENABLED) - if( mbedtls_ecp_get_type( grp ) == MBEDTLS_ECP_TYPE_SHORT_WEIERSTRASS ) - return( ecp_check_pubkey_sw( grp, pt ) ); + if (mbedtls_ecp_get_type(grp) == MBEDTLS_ECP_TYPE_SHORT_WEIERSTRASS) { + return ecp_check_pubkey_sw(grp, pt); + } #endif - return( MBEDTLS_ERR_ECP_BAD_INPUT_DATA ); + return MBEDTLS_ERR_ECP_BAD_INPUT_DATA; } /* * Check that an mbedtls_mpi is valid as a private key */ -int mbedtls_ecp_check_privkey( const mbedtls_ecp_group *grp, - const mbedtls_mpi *d ) +int mbedtls_ecp_check_privkey(const mbedtls_ecp_group *grp, + const mbedtls_mpi *d) { - ECP_VALIDATE_RET( grp != NULL ); - ECP_VALIDATE_RET( d != NULL ); - #if defined(MBEDTLS_ECP_MONTGOMERY_ENABLED) - if( mbedtls_ecp_get_type( grp ) == MBEDTLS_ECP_TYPE_MONTGOMERY ) - { + if (mbedtls_ecp_get_type(grp) == MBEDTLS_ECP_TYPE_MONTGOMERY) { /* see RFC 7748 sec. 5 para. 5 */ - if( mbedtls_mpi_get_bit( d, 0 ) != 0 || - mbedtls_mpi_get_bit( d, 1 ) != 0 || - mbedtls_mpi_bitlen( d ) - 1 != grp->nbits ) /* mbedtls_mpi_bitlen is one-based! */ - return( MBEDTLS_ERR_ECP_INVALID_KEY ); + if (mbedtls_mpi_get_bit(d, 0) != 0 || + mbedtls_mpi_get_bit(d, 1) != 0 || + mbedtls_mpi_bitlen(d) - 1 != grp->nbits) { /* mbedtls_mpi_bitlen is one-based! */ + return MBEDTLS_ERR_ECP_INVALID_KEY; + } /* see [Curve25519] page 5 */ - if( grp->nbits == 254 && mbedtls_mpi_get_bit( d, 2 ) != 0 ) - return( MBEDTLS_ERR_ECP_INVALID_KEY ); + if (grp->nbits == 254 && mbedtls_mpi_get_bit(d, 2) != 0) { + return MBEDTLS_ERR_ECP_INVALID_KEY; + } - return( 0 ); + return 0; } #endif /* MBEDTLS_ECP_MONTGOMERY_ENABLED */ #if defined(MBEDTLS_ECP_SHORT_WEIERSTRASS_ENABLED) - if( mbedtls_ecp_get_type( grp ) == MBEDTLS_ECP_TYPE_SHORT_WEIERSTRASS ) - { + if (mbedtls_ecp_get_type(grp) == MBEDTLS_ECP_TYPE_SHORT_WEIERSTRASS) { /* see SEC1 3.2 */ - if( mbedtls_mpi_cmp_int( d, 1 ) < 0 || - mbedtls_mpi_cmp_mpi( d, &grp->N ) >= 0 ) - return( MBEDTLS_ERR_ECP_INVALID_KEY ); - else - return( 0 ); + if (mbedtls_mpi_cmp_int(d, 1) < 0 || + mbedtls_mpi_cmp_mpi(d, &grp->N) >= 0) { + return MBEDTLS_ERR_ECP_INVALID_KEY; + } else { + return 0; + } } #endif /* MBEDTLS_ECP_SHORT_WEIERSTRASS_ENABLED */ - return( MBEDTLS_ERR_ECP_BAD_INPUT_DATA ); + return MBEDTLS_ERR_ECP_BAD_INPUT_DATA; } #ifdef FSP_NOT_DEFINED // Alternate HW implementation in ecp_alt_process.c @@ -3063,10 +3097,10 @@ int mbedtls_ecp_check_privkey( const mbedtls_ecp_group *grp, #if defined(MBEDTLS_ECP_MONTGOMERY_ENABLED) MBEDTLS_STATIC_TESTABLE -int mbedtls_ecp_gen_privkey_mx( size_t high_bit, - mbedtls_mpi *d, - int (*f_rng)(void *, unsigned char *, size_t), - void *p_rng ) +int mbedtls_ecp_gen_privkey_mx(size_t high_bit, + mbedtls_mpi *d, + int (*f_rng)(void *, unsigned char *, size_t), + void *p_rng) { int ret = MBEDTLS_ERR_ECP_BAD_INPUT_DATA; size_t n_random_bytes = high_bit / 8 + 1; @@ -3075,38 +3109,36 @@ int mbedtls_ecp_gen_privkey_mx( size_t high_bit, /* Generate a (high_bit+1)-bit random number by generating just enough * random bytes, then shifting out extra bits from the top (necessary * when (high_bit+1) is not a multiple of 8). */ - MBEDTLS_MPI_CHK( mbedtls_mpi_fill_random( d, n_random_bytes, - f_rng, p_rng ) ); - MBEDTLS_MPI_CHK( mbedtls_mpi_shift_r( d, 8 * n_random_bytes - high_bit - 1 ) ); + MBEDTLS_MPI_CHK(mbedtls_mpi_fill_random(d, n_random_bytes, + f_rng, p_rng)); + MBEDTLS_MPI_CHK(mbedtls_mpi_shift_r(d, 8 * n_random_bytes - high_bit - 1)); - MBEDTLS_MPI_CHK( mbedtls_mpi_set_bit( d, high_bit, 1 ) ); + MBEDTLS_MPI_CHK(mbedtls_mpi_set_bit(d, high_bit, 1)); /* Make sure the last two bits are unset for Curve448, three bits for Curve25519 */ - MBEDTLS_MPI_CHK( mbedtls_mpi_set_bit( d, 0, 0 ) ); - MBEDTLS_MPI_CHK( mbedtls_mpi_set_bit( d, 1, 0 ) ); - if( high_bit == 254 ) - { - MBEDTLS_MPI_CHK( mbedtls_mpi_set_bit( d, 2, 0 ) ); + MBEDTLS_MPI_CHK(mbedtls_mpi_set_bit(d, 0, 0)); + MBEDTLS_MPI_CHK(mbedtls_mpi_set_bit(d, 1, 0)); + if (high_bit == 254) { + MBEDTLS_MPI_CHK(mbedtls_mpi_set_bit(d, 2, 0)); } cleanup: - return( ret ); + return ret; } #endif /* MBEDTLS_ECP_MONTGOMERY_ENABLED */ #if defined(MBEDTLS_ECP_SHORT_WEIERSTRASS_ENABLED) static int mbedtls_ecp_gen_privkey_sw( const mbedtls_mpi *N, mbedtls_mpi *d, - int (*f_rng)(void *, unsigned char *, size_t), void *p_rng ) + int (*f_rng)(void *, unsigned char *, size_t), void *p_rng) { - int ret = mbedtls_mpi_random( d, 1, N, f_rng, p_rng ); - switch( ret ) - { + int ret = mbedtls_mpi_random(d, 1, N, f_rng, p_rng); + switch (ret) { case MBEDTLS_ERR_MPI_NOT_ACCEPTABLE: - return( MBEDTLS_ERR_ECP_RANDOM_FAILED ); + return MBEDTLS_ERR_ECP_RANDOM_FAILED; default: - return( ret ); + return ret; } } #endif /* MBEDTLS_ECP_SHORT_WEIERSTRASS_ENABLED */ @@ -3114,26 +3146,24 @@ static int mbedtls_ecp_gen_privkey_sw( /* * Generate a private key */ -int mbedtls_ecp_gen_privkey( const mbedtls_ecp_group *grp, - mbedtls_mpi *d, - int (*f_rng)(void *, unsigned char *, size_t), - void *p_rng ) +int mbedtls_ecp_gen_privkey(const mbedtls_ecp_group *grp, + mbedtls_mpi *d, + int (*f_rng)(void *, unsigned char *, size_t), + void *p_rng) { - ECP_VALIDATE_RET( grp != NULL ); - ECP_VALIDATE_RET( d != NULL ); - ECP_VALIDATE_RET( f_rng != NULL ); - #if defined(MBEDTLS_ECP_MONTGOMERY_ENABLED) - if( mbedtls_ecp_get_type( grp ) == MBEDTLS_ECP_TYPE_MONTGOMERY ) - return( mbedtls_ecp_gen_privkey_mx( grp->nbits, d, f_rng, p_rng ) ); + if (mbedtls_ecp_get_type(grp) == MBEDTLS_ECP_TYPE_MONTGOMERY) { + return mbedtls_ecp_gen_privkey_mx(grp->nbits, d, f_rng, p_rng); + } #endif /* MBEDTLS_ECP_MONTGOMERY_ENABLED */ #if defined(MBEDTLS_ECP_SHORT_WEIERSTRASS_ENABLED) - if( mbedtls_ecp_get_type( grp ) == MBEDTLS_ECP_TYPE_SHORT_WEIERSTRASS ) - return( mbedtls_ecp_gen_privkey_sw( &grp->N, d, f_rng, p_rng ) ); + if (mbedtls_ecp_get_type(grp) == MBEDTLS_ECP_TYPE_SHORT_WEIERSTRASS) { + return mbedtls_ecp_gen_privkey_sw(&grp->N, d, f_rng, p_rng); + } #endif /* MBEDTLS_ECP_SHORT_WEIERSTRASS_ENABLED */ - return( MBEDTLS_ERR_ECP_BAD_INPUT_DATA ); + return MBEDTLS_ERR_ECP_BAD_INPUT_DATA; } #endif /* #ifdef FSP_NOT_DEFINED */ @@ -3141,56 +3171,43 @@ int mbedtls_ecp_gen_privkey( const mbedtls_ecp_group *grp, /* * Generate a keypair with configurable base point */ -int mbedtls_ecp_gen_keypair_base( mbedtls_ecp_group *grp, - const mbedtls_ecp_point *G, - mbedtls_mpi *d, mbedtls_ecp_point *Q, - int (*f_rng)(void *, unsigned char *, size_t), - void *p_rng ) +int mbedtls_ecp_gen_keypair_base(mbedtls_ecp_group *grp, + const mbedtls_ecp_point *G, + mbedtls_mpi *d, mbedtls_ecp_point *Q, + int (*f_rng)(void *, unsigned char *, size_t), + void *p_rng) { int ret = MBEDTLS_ERR_ERROR_CORRUPTION_DETECTED; - ECP_VALIDATE_RET( grp != NULL ); - ECP_VALIDATE_RET( d != NULL ); - ECP_VALIDATE_RET( G != NULL ); - ECP_VALIDATE_RET( Q != NULL ); - ECP_VALIDATE_RET( f_rng != NULL ); - - MBEDTLS_MPI_CHK( mbedtls_ecp_gen_privkey( grp, d, f_rng, p_rng ) ); - MBEDTLS_MPI_CHK( mbedtls_ecp_mul( grp, Q, d, G, f_rng, p_rng ) ); + MBEDTLS_MPI_CHK(mbedtls_ecp_gen_privkey(grp, d, f_rng, p_rng)); + MBEDTLS_MPI_CHK(mbedtls_ecp_mul(grp, Q, d, G, f_rng, p_rng)); cleanup: - return( ret ); + return ret; } /* * Generate key pair, wrapper for conventional base point */ -int mbedtls_ecp_gen_keypair( mbedtls_ecp_group *grp, - mbedtls_mpi *d, mbedtls_ecp_point *Q, - int (*f_rng)(void *, unsigned char *, size_t), - void *p_rng ) +int mbedtls_ecp_gen_keypair(mbedtls_ecp_group *grp, + mbedtls_mpi *d, mbedtls_ecp_point *Q, + int (*f_rng)(void *, unsigned char *, size_t), + void *p_rng) { - ECP_VALIDATE_RET( grp != NULL ); - ECP_VALIDATE_RET( d != NULL ); - ECP_VALIDATE_RET( Q != NULL ); - ECP_VALIDATE_RET( f_rng != NULL ); - - return( mbedtls_ecp_gen_keypair_base( grp, &grp->G, d, Q, f_rng, p_rng ) ); + return mbedtls_ecp_gen_keypair_base(grp, &grp->G, d, Q, f_rng, p_rng); } /* * Generate a keypair, prettier wrapper */ -int mbedtls_ecp_gen_key( mbedtls_ecp_group_id grp_id, mbedtls_ecp_keypair *key, - int (*f_rng)(void *, unsigned char *, size_t), void *p_rng ) +int mbedtls_ecp_gen_key(mbedtls_ecp_group_id grp_id, mbedtls_ecp_keypair *key, + int (*f_rng)(void *, unsigned char *, size_t), void *p_rng) { int ret = MBEDTLS_ERR_ERROR_CORRUPTION_DETECTED; - ECP_VALIDATE_RET( key != NULL ); - ECP_VALIDATE_RET( f_rng != NULL ); - - if( ( ret = mbedtls_ecp_group_load( &key->grp, grp_id ) ) != 0 ) - return( ret ); + if ((ret = mbedtls_ecp_group_load(&key->grp, grp_id)) != 0) { + return ret; + } - return( mbedtls_ecp_gen_keypair( &key->grp, &key->d, &key->Q, f_rng, p_rng ) ); + return mbedtls_ecp_gen_keypair(&key->grp, &key->d, &key->Q, f_rng, p_rng); } #define ECP_CURVE25519_KEY_SIZE 32 @@ -3198,75 +3215,70 @@ int mbedtls_ecp_gen_key( mbedtls_ecp_group_id grp_id, mbedtls_ecp_keypair *key, /* * Read a private key. */ -int mbedtls_ecp_read_key( mbedtls_ecp_group_id grp_id, mbedtls_ecp_keypair *key, - const unsigned char *buf, size_t buflen ) +int mbedtls_ecp_read_key(mbedtls_ecp_group_id grp_id, mbedtls_ecp_keypair *key, + const unsigned char *buf, size_t buflen) { int ret = 0; - ECP_VALIDATE_RET( key != NULL ); - ECP_VALIDATE_RET( buf != NULL ); - - if( ( ret = mbedtls_ecp_group_load( &key->grp, grp_id ) ) != 0 ) - return( ret ); + if ((ret = mbedtls_ecp_group_load(&key->grp, grp_id)) != 0) { + return ret; + } ret = MBEDTLS_ERR_ECP_FEATURE_UNAVAILABLE; #if 0 #if defined(MBEDTLS_ECP_MONTGOMERY_ENABLED) - if( mbedtls_ecp_get_type( &key->grp ) == MBEDTLS_ECP_TYPE_MONTGOMERY ) - { + if (mbedtls_ecp_get_type(&key->grp) == MBEDTLS_ECP_TYPE_MONTGOMERY) { /* * Mask the key as mandated by RFC7748 for Curve25519 and Curve448. */ - if( grp_id == MBEDTLS_ECP_DP_CURVE25519 ) - { - if( buflen != ECP_CURVE25519_KEY_SIZE ) - return( MBEDTLS_ERR_ECP_INVALID_KEY ); + if (grp_id == MBEDTLS_ECP_DP_CURVE25519) { + if (buflen != ECP_CURVE25519_KEY_SIZE) { + return MBEDTLS_ERR_ECP_INVALID_KEY; + } - MBEDTLS_MPI_CHK( mbedtls_mpi_read_binary_le( &key->d, buf, buflen ) ); + MBEDTLS_MPI_CHK(mbedtls_mpi_read_binary_le(&key->d, buf, buflen)); /* Set the three least significant bits to 0 */ - MBEDTLS_MPI_CHK( mbedtls_mpi_set_bit( &key->d, 0, 0 ) ); - MBEDTLS_MPI_CHK( mbedtls_mpi_set_bit( &key->d, 1, 0 ) ); - MBEDTLS_MPI_CHK( mbedtls_mpi_set_bit( &key->d, 2, 0 ) ); + MBEDTLS_MPI_CHK(mbedtls_mpi_set_bit(&key->d, 0, 0)); + MBEDTLS_MPI_CHK(mbedtls_mpi_set_bit(&key->d, 1, 0)); + MBEDTLS_MPI_CHK(mbedtls_mpi_set_bit(&key->d, 2, 0)); /* Set the most significant bit to 0 */ MBEDTLS_MPI_CHK( - mbedtls_mpi_set_bit( &key->d, - ECP_CURVE25519_KEY_SIZE * 8 - 1, 0 ) - ); + mbedtls_mpi_set_bit(&key->d, + ECP_CURVE25519_KEY_SIZE * 8 - 1, 0) + ); /* Set the second most significant bit to 1 */ MBEDTLS_MPI_CHK( - mbedtls_mpi_set_bit( &key->d, - ECP_CURVE25519_KEY_SIZE * 8 - 2, 1 ) - ); - } - else if( grp_id == MBEDTLS_ECP_DP_CURVE448 ) - { - if( buflen != ECP_CURVE448_KEY_SIZE ) - return( MBEDTLS_ERR_ECP_INVALID_KEY ); + mbedtls_mpi_set_bit(&key->d, + ECP_CURVE25519_KEY_SIZE * 8 - 2, 1) + ); + } else if (grp_id == MBEDTLS_ECP_DP_CURVE448) { + if (buflen != ECP_CURVE448_KEY_SIZE) { + return MBEDTLS_ERR_ECP_INVALID_KEY; + } - MBEDTLS_MPI_CHK( mbedtls_mpi_read_binary_le( &key->d, buf, buflen ) ); + MBEDTLS_MPI_CHK(mbedtls_mpi_read_binary_le(&key->d, buf, buflen)); /* Set the two least significant bits to 0 */ - MBEDTLS_MPI_CHK( mbedtls_mpi_set_bit( &key->d, 0, 0 ) ); - MBEDTLS_MPI_CHK( mbedtls_mpi_set_bit( &key->d, 1, 0 ) ); + MBEDTLS_MPI_CHK(mbedtls_mpi_set_bit(&key->d, 0, 0)); + MBEDTLS_MPI_CHK(mbedtls_mpi_set_bit(&key->d, 1, 0)); /* Set the most significant bit to 1 */ MBEDTLS_MPI_CHK( - mbedtls_mpi_set_bit( &key->d, - ECP_CURVE448_KEY_SIZE * 8 - 1, 1 ) - ); + mbedtls_mpi_set_bit(&key->d, + ECP_CURVE448_KEY_SIZE * 8 - 1, 1) + ); } } #endif #if defined(MBEDTLS_ECP_SHORT_WEIERSTRASS_ENABLED) - if( mbedtls_ecp_get_type( &key->grp ) == MBEDTLS_ECP_TYPE_SHORT_WEIERSTRASS ) - { - MBEDTLS_MPI_CHK( mbedtls_mpi_read_binary( &key->d, buf, buflen ) ); + if (mbedtls_ecp_get_type(&key->grp) == MBEDTLS_ECP_TYPE_SHORT_WEIERSTRASS) { + MBEDTLS_MPI_CHK(mbedtls_mpi_read_binary(&key->d, buf, buflen)); - MBEDTLS_MPI_CHK( mbedtls_ecp_check_privkey( &key->grp, &key->d ) ); + MBEDTLS_MPI_CHK(mbedtls_ecp_check_privkey(&key->grp, &key->d)); } #endif @@ -3274,50 +3286,45 @@ int mbedtls_ecp_read_key( mbedtls_ecp_group_id grp_id, mbedtls_ecp_keypair *key, MBEDTLS_MPI_CHK( mbedtls_mpi_read_binary( &key->d, buf, buflen ) ); cleanup: - if( ret != 0 ) - mbedtls_mpi_free( &key->d ); + if (ret != 0) { + mbedtls_mpi_free(&key->d); + } - return( ret ); + return ret; } /* * Write a private key. */ -int mbedtls_ecp_write_key( mbedtls_ecp_keypair *key, - unsigned char *buf, size_t buflen ) +int mbedtls_ecp_write_key(mbedtls_ecp_keypair *key, + unsigned char *buf, size_t buflen) { int ret = MBEDTLS_ERR_ECP_FEATURE_UNAVAILABLE; - ECP_VALIDATE_RET( key != NULL ); - ECP_VALIDATE_RET( buf != NULL ); - #if defined(MBEDTLS_ECP_MONTGOMERY_ENABLED) - if( mbedtls_ecp_get_type( &key->grp ) == MBEDTLS_ECP_TYPE_MONTGOMERY ) - { - if( key->grp.id == MBEDTLS_ECP_DP_CURVE25519 ) - { - if( buflen < ECP_CURVE25519_KEY_SIZE ) - return( MBEDTLS_ERR_ECP_BUFFER_TOO_SMALL ); - - } - else if( key->grp.id == MBEDTLS_ECP_DP_CURVE448 ) - { - if( buflen < ECP_CURVE448_KEY_SIZE ) - return( MBEDTLS_ERR_ECP_BUFFER_TOO_SMALL ); + if (mbedtls_ecp_get_type(&key->grp) == MBEDTLS_ECP_TYPE_MONTGOMERY) { + if (key->grp.id == MBEDTLS_ECP_DP_CURVE25519) { + if (buflen < ECP_CURVE25519_KEY_SIZE) { + return MBEDTLS_ERR_ECP_BUFFER_TOO_SMALL; + } + + } else if (key->grp.id == MBEDTLS_ECP_DP_CURVE448) { + if (buflen < ECP_CURVE448_KEY_SIZE) { + return MBEDTLS_ERR_ECP_BUFFER_TOO_SMALL; + } } - MBEDTLS_MPI_CHK( mbedtls_mpi_write_binary_le( &key->d, buf, buflen ) ); + MBEDTLS_MPI_CHK(mbedtls_mpi_write_binary_le(&key->d, buf, buflen)); } #endif #if defined(MBEDTLS_ECP_SHORT_WEIERSTRASS_ENABLED) - if( mbedtls_ecp_get_type( &key->grp ) == MBEDTLS_ECP_TYPE_SHORT_WEIERSTRASS ) - { - MBEDTLS_MPI_CHK( mbedtls_mpi_write_binary( &key->d, buf, buflen ) ); + if (mbedtls_ecp_get_type(&key->grp) == MBEDTLS_ECP_TYPE_SHORT_WEIERSTRASS) { + MBEDTLS_MPI_CHK(mbedtls_mpi_write_binary(&key->d, buf, buflen)); } #endif cleanup: - return( ret ); + return ret; } @@ -3325,46 +3332,41 @@ int mbedtls_ecp_write_key( mbedtls_ecp_keypair *key, * Check a public-private key pair */ int mbedtls_ecp_check_pub_priv( - const mbedtls_ecp_keypair *pub, const mbedtls_ecp_keypair *prv, - int (*f_rng)(void *, unsigned char *, size_t), void *p_rng ) + const mbedtls_ecp_keypair *pub, const mbedtls_ecp_keypair *prv, + int (*f_rng)(void *, unsigned char *, size_t), void *p_rng) { int ret = MBEDTLS_ERR_ERROR_CORRUPTION_DETECTED; mbedtls_ecp_point Q; mbedtls_ecp_group grp; - ECP_VALIDATE_RET( pub != NULL ); - ECP_VALIDATE_RET( prv != NULL ); - - if( pub->grp.id == MBEDTLS_ECP_DP_NONE || + if (pub->grp.id == MBEDTLS_ECP_DP_NONE || pub->grp.id != prv->grp.id || - mbedtls_mpi_cmp_mpi( &pub->Q.X, &prv->Q.X ) || - mbedtls_mpi_cmp_mpi( &pub->Q.Y, &prv->Q.Y ) || - mbedtls_mpi_cmp_mpi( &pub->Q.Z, &prv->Q.Z ) ) - { - return( MBEDTLS_ERR_ECP_BAD_INPUT_DATA ); + mbedtls_mpi_cmp_mpi(&pub->Q.X, &prv->Q.X) || + mbedtls_mpi_cmp_mpi(&pub->Q.Y, &prv->Q.Y) || + mbedtls_mpi_cmp_mpi(&pub->Q.Z, &prv->Q.Z)) { + return MBEDTLS_ERR_ECP_BAD_INPUT_DATA; } - mbedtls_ecp_point_init( &Q ); - mbedtls_ecp_group_init( &grp ); + mbedtls_ecp_point_init(&Q); + mbedtls_ecp_group_init(&grp); /* mbedtls_ecp_mul() needs a non-const group... */ - mbedtls_ecp_group_copy( &grp, &prv->grp ); + mbedtls_ecp_group_copy(&grp, &prv->grp); /* Also checks d is valid */ - MBEDTLS_MPI_CHK( mbedtls_ecp_mul( &grp, &Q, &prv->d, &prv->grp.G, f_rng, p_rng ) ); + MBEDTLS_MPI_CHK(mbedtls_ecp_mul(&grp, &Q, &prv->d, &prv->grp.G, f_rng, p_rng)); - if( mbedtls_mpi_cmp_mpi( &Q.X, &prv->Q.X ) || - mbedtls_mpi_cmp_mpi( &Q.Y, &prv->Q.Y ) || - mbedtls_mpi_cmp_mpi( &Q.Z, &prv->Q.Z ) ) - { + if (mbedtls_mpi_cmp_mpi(&Q.X, &prv->Q.X) || + mbedtls_mpi_cmp_mpi(&Q.Y, &prv->Q.Y) || + mbedtls_mpi_cmp_mpi(&Q.Z, &prv->Q.Z)) { ret = MBEDTLS_ERR_ECP_BAD_INPUT_DATA; goto cleanup; } cleanup: - mbedtls_ecp_point_free( &Q ); - mbedtls_ecp_group_free( &grp ); + mbedtls_ecp_point_free(&Q); + mbedtls_ecp_group_free(&grp); - return( ret ); + return ret; } /* @@ -3375,14 +3377,17 @@ int mbedtls_ecp_export(const mbedtls_ecp_keypair *key, mbedtls_ecp_group *grp, { int ret = MBEDTLS_ERR_ERROR_CORRUPTION_DETECTED; - if( ( ret = mbedtls_ecp_group_copy( grp, &key->grp ) ) != 0 ) + if ((ret = mbedtls_ecp_group_copy(grp, &key->grp)) != 0) { return ret; + } - if( ( ret = mbedtls_mpi_copy( d, &key->d ) ) != 0 ) + if ((ret = mbedtls_mpi_copy(d, &key->d)) != 0) { return ret; + } - if( ( ret = mbedtls_ecp_copy( Q, &key->Q ) ) != 0 ) + if ((ret = mbedtls_ecp_copy(Q, &key->Q)) != 0) { return ret; + } return 0; } @@ -3396,44 +3401,42 @@ int mbedtls_ecp_export(const mbedtls_ecp_keypair *key, mbedtls_ecp_group *grp, * except we only use the low byte as the output. See * https://en.wikipedia.org/wiki/Linear_congruential_generator#Parameters_in_common_use */ -static int self_test_rng( void *ctx, unsigned char *out, size_t len ) +static int self_test_rng(void *ctx, unsigned char *out, size_t len) { static uint32_t state = 42; (void) ctx; - for( size_t i = 0; i < len; i++ ) - { + for (size_t i = 0; i < len; i++) { state = state * 1664525u + 1013904223u; out[i] = (unsigned char) state; } - return( 0 ); + return 0; } /* Adjust the exponent to be a valid private point for the specified curve. * This is sometimes necessary because we use a single set of exponents * for all curves but the validity of values depends on the curve. */ -static int self_test_adjust_exponent( const mbedtls_ecp_group *grp, - mbedtls_mpi *m ) +static int self_test_adjust_exponent(const mbedtls_ecp_group *grp, + mbedtls_mpi *m) { int ret = 0; - switch( grp->id ) - { - /* If Curve25519 is available, then that's what we use for the - * Montgomery test, so we don't need the adjustment code. */ -#if ! defined(MBEDTLS_ECP_DP_CURVE25519_ENABLED) + switch (grp->id) { + /* If Curve25519 is available, then that's what we use for the + * Montgomery test, so we don't need the adjustment code. */ +#if !defined(MBEDTLS_ECP_DP_CURVE25519_ENABLED) #if defined(MBEDTLS_ECP_DP_CURVE448_ENABLED) case MBEDTLS_ECP_DP_CURVE448: /* Move highest bit from 254 to N-1. Setting bit N-1 is * necessary to enforce the highest-bit-set constraint. */ - MBEDTLS_MPI_CHK( mbedtls_mpi_set_bit( m, 254, 0 ) ); - MBEDTLS_MPI_CHK( mbedtls_mpi_set_bit( m, grp->nbits, 1 ) ); + MBEDTLS_MPI_CHK(mbedtls_mpi_set_bit(m, 254, 0)); + MBEDTLS_MPI_CHK(mbedtls_mpi_set_bit(m, grp->nbits, 1)); /* Copy second-highest bit from 253 to N-2. This is not * necessary but improves the test variety a bit. */ MBEDTLS_MPI_CHK( - mbedtls_mpi_set_bit( m, grp->nbits - 1, - mbedtls_mpi_get_bit( m, 253 ) ) ); + mbedtls_mpi_set_bit(m, grp->nbits - 1, + mbedtls_mpi_get_bit(m, 253))); break; #endif #endif /* ! defined(MBEDTLS_ECP_DP_CURVE25519_ENABLED) */ @@ -3444,18 +3447,18 @@ static int self_test_adjust_exponent( const mbedtls_ecp_group *grp, goto cleanup; } cleanup: - return( ret ); + return ret; } /* Calculate R = m.P for each m in exponents. Check that the number of * basic operations doesn't depend on the value of m. */ -static int self_test_point( int verbose, - mbedtls_ecp_group *grp, - mbedtls_ecp_point *R, - mbedtls_mpi *m, - const mbedtls_ecp_point *P, - const char *const *exponents, - size_t n_exponents ) +static int self_test_point(int verbose, + mbedtls_ecp_group *grp, + mbedtls_ecp_point *R, + mbedtls_mpi *m, + const mbedtls_ecp_point *P, + const char *const *exponents, + size_t n_exponents) { int ret = 0; size_t i = 0; @@ -3464,12 +3467,11 @@ static int self_test_point( int verbose, dbl_count = 0; mul_count = 0; - MBEDTLS_MPI_CHK( mbedtls_mpi_read_string( m, 16, exponents[0] ) ); - MBEDTLS_MPI_CHK( self_test_adjust_exponent( grp, m ) ); - MBEDTLS_MPI_CHK( mbedtls_ecp_mul( grp, R, m, P, self_test_rng, NULL ) ); + MBEDTLS_MPI_CHK(mbedtls_mpi_read_string(m, 16, exponents[0])); + MBEDTLS_MPI_CHK(self_test_adjust_exponent(grp, m)); + MBEDTLS_MPI_CHK(mbedtls_ecp_mul(grp, R, m, P, self_test_rng, NULL)); - for( i = 1; i < n_exponents; i++ ) - { + for (i = 1; i < n_exponents; i++) { add_c_prev = add_count; dbl_c_prev = dbl_count; mul_c_prev = mul_count; @@ -3477,34 +3479,33 @@ static int self_test_point( int verbose, dbl_count = 0; mul_count = 0; - MBEDTLS_MPI_CHK( mbedtls_mpi_read_string( m, 16, exponents[i] ) ); - MBEDTLS_MPI_CHK( self_test_adjust_exponent( grp, m ) ); - MBEDTLS_MPI_CHK( mbedtls_ecp_mul( grp, R, m, P, self_test_rng, NULL ) ); + MBEDTLS_MPI_CHK(mbedtls_mpi_read_string(m, 16, exponents[i])); + MBEDTLS_MPI_CHK(self_test_adjust_exponent(grp, m)); + MBEDTLS_MPI_CHK(mbedtls_ecp_mul(grp, R, m, P, self_test_rng, NULL)); - if( add_count != add_c_prev || + if (add_count != add_c_prev || dbl_count != dbl_c_prev || - mul_count != mul_c_prev ) - { + mul_count != mul_c_prev) { ret = 1; break; } } cleanup: - if( verbose != 0 ) - { - if( ret != 0 ) - mbedtls_printf( "failed (%u)\n", (unsigned int) i ); - else - mbedtls_printf( "passed\n" ); + if (verbose != 0) { + if (ret != 0) { + mbedtls_printf("failed (%u)\n", (unsigned int) i); + } else { + mbedtls_printf("passed\n"); + } } - return( ret ); + return ret; } /* * Checkup routine */ -int mbedtls_ecp_self_test( int verbose ) +int mbedtls_ecp_self_test(int verbose) { int ret = MBEDTLS_ERR_ERROR_CORRUPTION_DETECTED; mbedtls_ecp_group grp; @@ -3540,77 +3541,85 @@ int mbedtls_ecp_self_test( int verbose ) }; #endif /* MBEDTLS_ECP_MONTGOMERY_ENABLED */ - mbedtls_ecp_group_init( &grp ); - mbedtls_ecp_point_init( &R ); - mbedtls_ecp_point_init( &P ); - mbedtls_mpi_init( &m ); + mbedtls_ecp_group_init(&grp); + mbedtls_ecp_point_init(&R); + mbedtls_ecp_point_init(&P); + mbedtls_mpi_init(&m); #if defined(MBEDTLS_ECP_SHORT_WEIERSTRASS_ENABLED) /* Use secp192r1 if available, or any available curve */ #if defined(MBEDTLS_ECP_DP_SECP192R1_ENABLED) - MBEDTLS_MPI_CHK( mbedtls_ecp_group_load( &grp, MBEDTLS_ECP_DP_SECP192R1 ) ); + MBEDTLS_MPI_CHK(mbedtls_ecp_group_load(&grp, MBEDTLS_ECP_DP_SECP192R1)); #else - MBEDTLS_MPI_CHK( mbedtls_ecp_group_load( &grp, mbedtls_ecp_curve_list()->grp_id ) ); + MBEDTLS_MPI_CHK(mbedtls_ecp_group_load(&grp, mbedtls_ecp_curve_list()->grp_id)); #endif - if( verbose != 0 ) - mbedtls_printf( " ECP SW test #1 (constant op_count, base point G): " ); + if (verbose != 0) { + mbedtls_printf(" ECP SW test #1 (constant op_count, base point G): "); + } /* Do a dummy multiplication first to trigger precomputation */ - MBEDTLS_MPI_CHK( mbedtls_mpi_lset( &m, 2 ) ); - MBEDTLS_MPI_CHK( mbedtls_ecp_mul( &grp, &P, &m, &grp.G, self_test_rng, NULL ) ); - ret = self_test_point( verbose, - &grp, &R, &m, &grp.G, - sw_exponents, - sizeof( sw_exponents ) / sizeof( sw_exponents[0] )); - if( ret != 0 ) + MBEDTLS_MPI_CHK(mbedtls_mpi_lset(&m, 2)); + MBEDTLS_MPI_CHK(mbedtls_ecp_mul(&grp, &P, &m, &grp.G, self_test_rng, NULL)); + ret = self_test_point(verbose, + &grp, &R, &m, &grp.G, + sw_exponents, + sizeof(sw_exponents) / sizeof(sw_exponents[0])); + if (ret != 0) { goto cleanup; + } - if( verbose != 0 ) - mbedtls_printf( " ECP SW test #2 (constant op_count, other point): " ); + if (verbose != 0) { + mbedtls_printf(" ECP SW test #2 (constant op_count, other point): "); + } /* We computed P = 2G last time, use it */ - ret = self_test_point( verbose, - &grp, &R, &m, &P, - sw_exponents, - sizeof( sw_exponents ) / sizeof( sw_exponents[0] )); - if( ret != 0 ) + ret = self_test_point(verbose, + &grp, &R, &m, &P, + sw_exponents, + sizeof(sw_exponents) / sizeof(sw_exponents[0])); + if (ret != 0) { goto cleanup; + } - mbedtls_ecp_group_free( &grp ); - mbedtls_ecp_point_free( &R ); + mbedtls_ecp_group_free(&grp); + mbedtls_ecp_point_free(&R); #endif /* MBEDTLS_ECP_SHORT_WEIERSTRASS_ENABLED */ #if defined(MBEDTLS_ECP_MONTGOMERY_ENABLED) - if( verbose != 0 ) - mbedtls_printf( " ECP Montgomery test (constant op_count): " ); + if (verbose != 0) { + mbedtls_printf(" ECP Montgomery test (constant op_count): "); + } #if defined(MBEDTLS_ECP_DP_CURVE25519_ENABLED) - MBEDTLS_MPI_CHK( mbedtls_ecp_group_load( &grp, MBEDTLS_ECP_DP_CURVE25519 ) ); + MBEDTLS_MPI_CHK(mbedtls_ecp_group_load(&grp, MBEDTLS_ECP_DP_CURVE25519)); #elif defined(MBEDTLS_ECP_DP_CURVE448_ENABLED) - MBEDTLS_MPI_CHK( mbedtls_ecp_group_load( &grp, MBEDTLS_ECP_DP_CURVE448 ) ); + MBEDTLS_MPI_CHK(mbedtls_ecp_group_load(&grp, MBEDTLS_ECP_DP_CURVE448)); #else #error "MBEDTLS_ECP_MONTGOMERY_ENABLED is defined, but no curve is supported for self-test" #endif - ret = self_test_point( verbose, - &grp, &R, &m, &grp.G, - m_exponents, - sizeof( m_exponents ) / sizeof( m_exponents[0] )); - if( ret != 0 ) + ret = self_test_point(verbose, + &grp, &R, &m, &grp.G, + m_exponents, + sizeof(m_exponents) / sizeof(m_exponents[0])); + if (ret != 0) { goto cleanup; + } #endif /* MBEDTLS_ECP_MONTGOMERY_ENABLED */ cleanup: - if( ret < 0 && verbose != 0 ) - mbedtls_printf( "Unexpected error, return code = %08X\n", (unsigned int) ret ); + if (ret < 0 && verbose != 0) { + mbedtls_printf("Unexpected error, return code = %08X\n", (unsigned int) ret); + } - mbedtls_ecp_group_free( &grp ); - mbedtls_ecp_point_free( &R ); - mbedtls_ecp_point_free( &P ); - mbedtls_mpi_free( &m ); + mbedtls_ecp_group_free(&grp); + mbedtls_ecp_point_free(&R); + mbedtls_ecp_point_free(&P); + mbedtls_mpi_free(&m); - if( verbose != 0 ) - mbedtls_printf( "\n" ); + if (verbose != 0) { + mbedtls_printf("\n"); + } - return( ret ); + return ret; } #endif /* MBEDTLS_SELF_TEST */ diff --git a/ra/fsp/src/rm_psa_crypto/ecp_curves_alt.c b/ra/fsp/src/rm_psa_crypto/ecp_curves_alt.c index 6dc84f86f..42c26e047 100644 --- a/ra/fsp/src/rm_psa_crypto/ecp_curves_alt.c +++ b/ra/fsp/src/rm_psa_crypto/ecp_curves_alt.c @@ -28,20 +28,16 @@ #include "mbedtls/platform_util.h" #include "mbedtls/error.h" +#include "bignum_core.h" #include <string.h> #if defined(MBEDTLS_ECP_ALT) /* Parameter validation macros based on platform_util.h */ -#define ECP_VALIDATE_RET( cond ) \ - MBEDTLS_INTERNAL_VALIDATE_RET( cond, MBEDTLS_ERR_ECP_BAD_INPUT_DATA ) -#define ECP_VALIDATE( cond ) \ - MBEDTLS_INTERNAL_VALIDATE( cond ) - -#if ( defined(__ARMCC_VERSION) || defined(_MSC_VER) ) && \ - !defined(inline) && !defined(__cplusplus) -#define inline __inline -#endif +#define ECP_VALIDATE_RET(cond) \ + MBEDTLS_INTERNAL_VALIDATE_RET(cond, MBEDTLS_ERR_ECP_BAD_INPUT_DATA) +#define ECP_VALIDATE(cond) \ + MBEDTLS_INTERNAL_VALIDATE(cond) /* * Conversion macros for embedded constants: @@ -554,21 +550,23 @@ static const mbedtls_mpi_uint brainpoolP512r1_n[] = { }; #endif /* MBEDTLS_ECP_DP_BP512R1_ENABLED */ + + /* * Create an MPI from embedded constants - * (assumes len is an exact multiple of sizeof mbedtls_mpi_uint) + * (assumes len is an exact multiple of sizeof(mbedtls_mpi_uint)) */ -static inline void ecp_mpi_load( mbedtls_mpi *X, const mbedtls_mpi_uint *p, size_t len ) +static inline void ecp_mpi_load(mbedtls_mpi *X, const mbedtls_mpi_uint *p, size_t len) { X->s = 1; - X->n = len / sizeof( mbedtls_mpi_uint ); + X->n = len / sizeof(mbedtls_mpi_uint); X->p = (mbedtls_mpi_uint *) p; } /* * Set an MPI to static value 1 */ -static inline void ecp_mpi_set1( mbedtls_mpi *X ) +static inline void ecp_mpi_set1(mbedtls_mpi *X) { static mbedtls_mpi_uint one[] = { 1 }; X->s = 1; @@ -587,18 +585,19 @@ static int ecp_group_load( mbedtls_ecp_group *grp, const mbedtls_mpi_uint *gy, size_t gylen, const mbedtls_mpi_uint *n, size_t nlen) { - ecp_mpi_load( &grp->P, p, plen ); - if( a != NULL ) - ecp_mpi_load( &grp->A, a, alen ); - ecp_mpi_load( &grp->B, b, blen ); - ecp_mpi_load( &grp->N, n, nlen ); + ecp_mpi_load(&grp->P, p, plen); + if (a != NULL) { + ecp_mpi_load(&grp->A, a, alen); + } + ecp_mpi_load(&grp->B, b, blen); + ecp_mpi_load(&grp->N, n, nlen); - ecp_mpi_load( &grp->G.X, gx, gxlen ); - ecp_mpi_load( &grp->G.Y, gy, gylen ); - ecp_mpi_set1( &grp->G.Z ); + ecp_mpi_load(&grp->G.X, gx, gxlen); + ecp_mpi_load(&grp->G.Y, gy, gylen); + ecp_mpi_set1(&grp->G.Z); - grp->pbits = mbedtls_mpi_bitlen( &grp->P ); - grp->nbits = mbedtls_mpi_bitlen( &grp->N ); + grp->pbits = mbedtls_mpi_bitlen(&grp->P); + grp->nbits = mbedtls_mpi_bitlen(&grp->N); grp->h = 1; @@ -608,64 +607,72 @@ static int ecp_group_load( mbedtls_ecp_group *grp, #if defined(MBEDTLS_ECP_NIST_OPTIM) /* Forward declarations */ #if defined(MBEDTLS_ECP_DP_SECP192R1_ENABLED) -static int ecp_mod_p192( mbedtls_mpi * ); +static int ecp_mod_p192(mbedtls_mpi *); +MBEDTLS_STATIC_TESTABLE +int mbedtls_ecp_mod_p192_raw(mbedtls_mpi_uint *Np, size_t Nn); #endif #if defined(MBEDTLS_ECP_DP_SECP224R1_ENABLED) -static int ecp_mod_p224( mbedtls_mpi * ); +static int ecp_mod_p224(mbedtls_mpi *); +MBEDTLS_STATIC_TESTABLE +int mbedtls_ecp_mod_p224_raw(mbedtls_mpi_uint *X, size_t X_limbs); #endif #if defined(MBEDTLS_ECP_DP_SECP256R1_ENABLED) -static int ecp_mod_p256( mbedtls_mpi * ); +static int ecp_mod_p256(mbedtls_mpi *); +MBEDTLS_STATIC_TESTABLE +int mbedtls_ecp_mod_p256_raw(mbedtls_mpi_uint *X, size_t X_limbs); #endif #if defined(MBEDTLS_ECP_DP_SECP384R1_ENABLED) -static int ecp_mod_p384( mbedtls_mpi * ); +static int ecp_mod_p384(mbedtls_mpi *); #endif #if defined(MBEDTLS_ECP_DP_SECP521R1_ENABLED) -static int ecp_mod_p521( mbedtls_mpi * ); +static int ecp_mod_p521(mbedtls_mpi *); +MBEDTLS_STATIC_TESTABLE +int mbedtls_ecp_mod_p521_raw(mbedtls_mpi_uint *N_p, size_t N_n); #endif -#define NIST_MODP( P ) grp->modp = ecp_mod_ ## P; +#define NIST_MODP(P) grp->modp = ecp_mod_ ## P; #else -#define NIST_MODP( P ) +#define NIST_MODP(P) #endif /* MBEDTLS_ECP_NIST_OPTIM */ /* Additional forward declarations */ #if defined(MBEDTLS_ECP_DP_CURVE25519_ENABLED) -static int ecp_mod_p255( mbedtls_mpi * ); +static int ecp_mod_p255(mbedtls_mpi *); #endif #if defined(MBEDTLS_ECP_DP_CURVE448_ENABLED) -static int ecp_mod_p448( mbedtls_mpi * ); +static int ecp_mod_p448(mbedtls_mpi *); #endif #if defined(MBEDTLS_ECP_DP_SECP192K1_ENABLED) -static int ecp_mod_p192k1( mbedtls_mpi * ); +static int ecp_mod_p192k1(mbedtls_mpi *); #endif #if defined(MBEDTLS_ECP_DP_SECP224K1_ENABLED) -static int ecp_mod_p224k1( mbedtls_mpi * ); +static int ecp_mod_p224k1(mbedtls_mpi *); #endif #if defined(MBEDTLS_ECP_DP_SECP256K1_ENABLED) -static int ecp_mod_p256k1( mbedtls_mpi * ); +static int ecp_mod_p256k1(mbedtls_mpi *); #endif -#define LOAD_GROUP_A( G ) ecp_group_load( grp, \ - G ## _p, sizeof( G ## _p ), \ - G ## _a, sizeof( G ## _a ), \ - G ## _b, sizeof( G ## _b ), \ - G ## _gx, sizeof( G ## _gx ), \ - G ## _gy, sizeof( G ## _gy ), \ - G ## _n, sizeof( G ## _n ) ) - -#define LOAD_GROUP( G ) ecp_group_load( grp, \ - G ## _p, sizeof( G ## _p ), \ - NULL, 0, \ - G ## _b, sizeof( G ## _b ), \ - G ## _gx, sizeof( G ## _gx ), \ - G ## _gy, sizeof( G ## _gy ), \ - G ## _n, sizeof( G ## _n ) ) +#define LOAD_GROUP_A(G) ecp_group_load(grp, \ + G ## _p, sizeof(G ## _p), \ + G ## _a, sizeof(G ## _a), \ + G ## _b, sizeof(G ## _b), \ + G ## _gx, sizeof(G ## _gx), \ + G ## _gy, sizeof(G ## _gy), \ + G ## _n, sizeof(G ## _n)) + +#define LOAD_GROUP(G) ecp_group_load(grp, \ + G ## _p, sizeof(G ## _p), \ + NULL, 0, \ + G ## _b, sizeof(G ## _b), \ + G ## _gx, sizeof(G ## _gx), \ + G ## _gy, sizeof(G ## _gy), \ + G ## _n, sizeof(G ## _n)) #if defined(MBEDTLS_ECP_DP_CURVE25519_ENABLED) /* * Specialized function for creating the Curve25519 group */ -static int ecp_use_curve25519( mbedtls_ecp_group *grp ) +static int ecp_use_curve25519(mbedtls_ecp_group *grp) { int ret = MBEDTLS_ERR_ERROR_CORRUPTION_DETECTED; @@ -693,10 +700,11 @@ static int ecp_use_curve25519( mbedtls_ecp_group *grp ) grp->nbits = 254; cleanup: - if( ret != 0 ) - mbedtls_ecp_group_free( grp ); + if (ret != 0) { + mbedtls_ecp_group_free(grp); + } - return( ret ); + return ret; } #endif /* MBEDTLS_ECP_DP_CURVE25519_ENABLED */ @@ -704,13 +712,10 @@ static int ecp_use_curve25519( mbedtls_ecp_group *grp ) /* * Specialized function for creating the Curve448 group */ -static int ecp_use_curve448( mbedtls_ecp_group *grp ) +static int ecp_use_curve448(mbedtls_ecp_group *grp) { - mbedtls_mpi Ns; int ret = MBEDTLS_ERR_ERROR_CORRUPTION_DETECTED; - mbedtls_mpi_init( &Ns ); - /* Actually ( A + 2 ) / 4 */ MBEDTLS_MPI_CHK( mbedtls_mpi_read_string( &grp->A, 16, "98AA" ) ); @@ -738,106 +743,105 @@ static int ecp_use_curve448( mbedtls_ecp_group *grp ) grp->nbits = 447; cleanup: - mbedtls_mpi_free( &Ns ); - if( ret != 0 ) - mbedtls_ecp_group_free( grp ); + if (ret != 0) { + mbedtls_ecp_group_free(grp); + } - return( ret ); + return ret; } #endif /* MBEDTLS_ECP_DP_CURVE448_ENABLED */ /* * Set a group using well-known domain parameters */ -int mbedtls_ecp_group_load( mbedtls_ecp_group *grp, mbedtls_ecp_group_id id ) +int mbedtls_ecp_group_load(mbedtls_ecp_group *grp, mbedtls_ecp_group_id id) { - ECP_VALIDATE_RET( grp != NULL ); - mbedtls_ecp_group_free( grp ); + ECP_VALIDATE_RET(grp != NULL); + mbedtls_ecp_group_free(grp); - mbedtls_ecp_group_init( grp ); + mbedtls_ecp_group_init(grp); grp->id = id; - switch( id ) - { + switch (id) { #if defined(MBEDTLS_ECP_DP_SECP192R1_ENABLED) case MBEDTLS_ECP_DP_SECP192R1: - NIST_MODP( p192 ); - return( LOAD_GROUP( secp192r1 ) ); + NIST_MODP(p192); + return LOAD_GROUP(secp192r1); #endif /* MBEDTLS_ECP_DP_SECP192R1_ENABLED */ #if defined(MBEDTLS_ECP_DP_SECP224R1_ENABLED) case MBEDTLS_ECP_DP_SECP224R1: - NIST_MODP( p224 ); - return( LOAD_GROUP( secp224r1 ) ); + NIST_MODP(p224); + return LOAD_GROUP(secp224r1); #endif /* MBEDTLS_ECP_DP_SECP224R1_ENABLED */ #if defined(MBEDTLS_ECP_DP_SECP256R1_ENABLED) case MBEDTLS_ECP_DP_SECP256R1: - NIST_MODP( p256 ); - return( LOAD_GROUP( secp256r1 ) ); + NIST_MODP(p256); + return LOAD_GROUP(secp256r1); #endif /* MBEDTLS_ECP_DP_SECP256R1_ENABLED */ #if defined(MBEDTLS_ECP_DP_SECP384R1_ENABLED) case MBEDTLS_ECP_DP_SECP384R1: - NIST_MODP( p384 ); - return( LOAD_GROUP( secp384r1 ) ); + NIST_MODP(p384); + return LOAD_GROUP(secp384r1); #endif /* MBEDTLS_ECP_DP_SECP384R1_ENABLED */ #if defined(MBEDTLS_ECP_DP_SECP521R1_ENABLED) case MBEDTLS_ECP_DP_SECP521R1: - NIST_MODP( p521 ); - return( LOAD_GROUP( secp521r1 ) ); + NIST_MODP(p521); + return LOAD_GROUP(secp521r1); #endif /* MBEDTLS_ECP_DP_SECP521R1_ENABLED */ #if defined(MBEDTLS_ECP_DP_SECP192K1_ENABLED) case MBEDTLS_ECP_DP_SECP192K1: grp->modp = ecp_mod_p192k1; - return( LOAD_GROUP_A( secp192k1 ) ); + return LOAD_GROUP_A(secp192k1); #endif /* MBEDTLS_ECP_DP_SECP192K1_ENABLED */ #if defined(MBEDTLS_ECP_DP_SECP224K1_ENABLED) case MBEDTLS_ECP_DP_SECP224K1: grp->modp = ecp_mod_p224k1; - return( LOAD_GROUP_A( secp224k1 ) ); + return LOAD_GROUP_A(secp224k1); #endif /* MBEDTLS_ECP_DP_SECP224K1_ENABLED */ #if defined(MBEDTLS_ECP_DP_SECP256K1_ENABLED) case MBEDTLS_ECP_DP_SECP256K1: grp->modp = ecp_mod_p256k1; - return( LOAD_GROUP_A( secp256k1 ) ); + return LOAD_GROUP_A(secp256k1); #endif /* MBEDTLS_ECP_DP_SECP256K1_ENABLED */ #if defined(MBEDTLS_ECP_DP_BP256R1_ENABLED) case MBEDTLS_ECP_DP_BP256R1: - return( LOAD_GROUP_A( brainpoolP256r1 ) ); + return LOAD_GROUP_A(brainpoolP256r1); #endif /* MBEDTLS_ECP_DP_BP256R1_ENABLED */ #if defined(MBEDTLS_ECP_DP_BP384R1_ENABLED) case MBEDTLS_ECP_DP_BP384R1: - return( LOAD_GROUP_A( brainpoolP384r1 ) ); + return LOAD_GROUP_A(brainpoolP384r1); #endif /* MBEDTLS_ECP_DP_BP384R1_ENABLED */ #if defined(MBEDTLS_ECP_DP_BP512R1_ENABLED) case MBEDTLS_ECP_DP_BP512R1: - return( LOAD_GROUP_A( brainpoolP512r1 ) ); + return LOAD_GROUP_A(brainpoolP512r1); #endif /* MBEDTLS_ECP_DP_BP512R1_ENABLED */ #if defined(MBEDTLS_ECP_DP_CURVE25519_ENABLED) case MBEDTLS_ECP_DP_CURVE25519: grp->modp = ecp_mod_p255; - return( ecp_use_curve25519( grp ) ); + return ecp_use_curve25519(grp); #endif /* MBEDTLS_ECP_DP_CURVE25519_ENABLED */ #if defined(MBEDTLS_ECP_DP_CURVE448_ENABLED) case MBEDTLS_ECP_DP_CURVE448: grp->modp = ecp_mod_p448; - return( ecp_use_curve448( grp ) ); + return ecp_use_curve448(grp); #endif /* MBEDTLS_ECP_DP_CURVE448_ENABLED */ default: grp->id = MBEDTLS_ECP_DP_NONE; - return( MBEDTLS_ERR_ECP_FEATURE_UNAVAILABLE ); + return MBEDTLS_ERR_ECP_FEATURE_UNAVAILABLE; } } @@ -866,56 +870,77 @@ int mbedtls_ecp_group_load( mbedtls_ecp_group *grp, mbedtls_ecp_group_id id ) */ /* Add 64-bit chunks (dst += src) and update carry */ -static inline void add64( mbedtls_mpi_uint *dst, mbedtls_mpi_uint *src, mbedtls_mpi_uint *carry ) +static inline void add64(mbedtls_mpi_uint *dst, mbedtls_mpi_uint *src, mbedtls_mpi_uint *carry) { unsigned char i; mbedtls_mpi_uint c = 0; - for( i = 0; i < 8 / sizeof( mbedtls_mpi_uint ); i++, dst++, src++ ) - { - *dst += c; c = ( *dst < c ); - *dst += *src; c += ( *dst < *src ); + for (i = 0; i < 8 / sizeof(mbedtls_mpi_uint); i++, dst++, src++) { + *dst += c; c = (*dst < c); + *dst += *src; c += (*dst < *src); } *carry += c; } /* Add carry to a 64-bit chunk and update carry */ -static inline void carry64( mbedtls_mpi_uint *dst, mbedtls_mpi_uint *carry ) +static inline void carry64(mbedtls_mpi_uint *dst, mbedtls_mpi_uint *carry) { unsigned char i; - for( i = 0; i < 8 / sizeof( mbedtls_mpi_uint ); i++, dst++ ) - { + for (i = 0; i < 8 / sizeof(mbedtls_mpi_uint); i++, dst++) { *dst += *carry; - *carry = ( *dst < *carry ); + *carry = (*dst < *carry); } } -#define WIDTH 8 / sizeof( mbedtls_mpi_uint ) -#define A( i ) N->p + (i) * WIDTH -#define ADD( i ) add64( p, A( i ), &c ) -#define NEXT p += WIDTH; carry64( p, &c ) -#define LAST p += WIDTH; *p = c; while( ++p < end ) *p = 0 +#define WIDTH 8 / sizeof(mbedtls_mpi_uint) +#define A(i) Np + (i) * WIDTH +#define ADD(i) add64(p, A(i), &c) +#define NEXT p += WIDTH; carry64(p, &c) +#define LAST p += WIDTH; *p = c; while (++p < end) *p = 0 +#define RESET last_carry[0] = c; c = 0; p = Np +#define ADD_LAST add64(p, last_carry, &c) /* * Fast quasi-reduction modulo p192 (FIPS 186-3 D.2.1) */ -static int ecp_mod_p192( mbedtls_mpi *N ) +static int ecp_mod_p192(mbedtls_mpi *N) { int ret = MBEDTLS_ERR_ERROR_CORRUPTION_DETECTED; - mbedtls_mpi_uint c = 0; + size_t expected_width = 2 * ((192 + biL - 1) / biL); + MBEDTLS_MPI_CHK(mbedtls_mpi_grow(N, expected_width)); + ret = mbedtls_ecp_mod_p192_raw(N->p, expected_width); + +cleanup: + return ret; +} + +MBEDTLS_STATIC_TESTABLE +int mbedtls_ecp_mod_p192_raw(mbedtls_mpi_uint *Np, size_t Nn) +{ + mbedtls_mpi_uint c = 0, last_carry[WIDTH] = { 0 }; mbedtls_mpi_uint *p, *end; - /* Make sure we have enough blocks so that A(5) is legal */ - MBEDTLS_MPI_CHK( mbedtls_mpi_grow( N, 6 * WIDTH ) ); + if (Nn != 2*((192 + biL - 1)/biL)) { + return MBEDTLS_ERR_ECP_BAD_INPUT_DATA; + } - p = N->p; - end = p + N->n; + p = Np; + end = p + Nn; - ADD( 3 ); ADD( 5 ); NEXT; // A0 += A3 + A5 - ADD( 3 ); ADD( 4 ); ADD( 5 ); NEXT; // A1 += A3 + A4 + A5 - ADD( 4 ); ADD( 5 ); LAST; // A2 += A4 + A5 + ADD(3); ADD(5); NEXT; // A0 += A3 + A5 + ADD(3); ADD(4); ADD(5); NEXT; // A1 += A3 + A4 + A5 + ADD(4); ADD(5); // A2 += A4 + A5 -cleanup: - return( ret ); + RESET; + + /* Use the reduction for the carry as well: + * 2^192 * last_carry = 2^64 * last_carry + last_carry mod P192 + */ + ADD_LAST; NEXT; // A0 += last_carry + ADD_LAST; NEXT; // A1 += last_carry + + LAST; // A2 += carry + + return 0; } #undef WIDTH @@ -923,11 +948,260 @@ static int ecp_mod_p192( mbedtls_mpi *N ) #undef ADD #undef NEXT #undef LAST +#undef RESET +#undef ADD_LAST #endif /* MBEDTLS_ECP_DP_SECP192R1_ENABLED */ #if defined(MBEDTLS_ECP_DP_SECP224R1_ENABLED) || \ defined(MBEDTLS_ECP_DP_SECP256R1_ENABLED) || \ defined(MBEDTLS_ECP_DP_SECP384R1_ENABLED) + +/* + * The reader is advised to first understand ecp_mod_p192() since the same + * general structure is used here, but with additional complications: + * (1) chunks of 32 bits, and (2) subtractions. + */ + +/* + * For these primes, we need to handle data in chunks of 32 bits. + * This makes it more complicated if we use 64 bits limbs in MPI, + * which prevents us from using a uniform access method as for p192. + * + * So, we define a mini abstraction layer to access 32 bit chunks, + * load them in 'cur' for work, and store them back from 'cur' when done. + * + * While at it, also define the size of N in terms of 32-bit chunks. + */ +#define LOAD32 cur = A(i); + +#if defined(MBEDTLS_HAVE_INT32) /* 32 bit */ + +#define MAX32 X_limbs +#define A(j) X[j] +#define STORE32 X[i] = (mbedtls_mpi_uint) cur; +#define STORE0 X[i] = 0; + +#else /* 64 bit */ + +#define MAX32 X_limbs * 2 +#define A(j) \ + (j) % 2 ? \ + (uint32_t) (X[(j) / 2] >> 32) : \ + (uint32_t) (X[(j) / 2]) +#define STORE32 \ + if (i % 2) { \ + X[i/2] &= 0x00000000FFFFFFFF; \ + X[i/2] |= (uint64_t) (cur) << 32; \ + } else { \ + X[i/2] &= 0xFFFFFFFF00000000; \ + X[i/2] |= (uint32_t) cur; \ + } + +#define STORE0 \ + if (i % 2) { \ + X[i/2] &= 0x00000000FFFFFFFF; \ + } else { \ + X[i/2] &= 0xFFFFFFFF00000000; \ + } + +#endif + +static inline int8_t extract_carry(int64_t cur) +{ + return (int8_t) (cur >> 32); +} + +#define ADD(j) cur += A(j) +#define SUB(j) cur -= A(j) + +#define ADD_CARRY(cc) cur += (cc) +#define SUB_CARRY(cc) cur -= (cc) + +#define ADD_LAST ADD_CARRY(last_c) +#define SUB_LAST SUB_CARRY(last_c) + +/* + * Helpers for the main 'loop' + */ +#define INIT(b) \ + int8_t c = 0, last_c; \ + int64_t cur; \ + size_t i = 0; \ + LOAD32; + +#define NEXT \ + c = extract_carry(cur); \ + STORE32; i++; LOAD32; \ + ADD_CARRY(c); + +#define RESET \ + c = extract_carry(cur); \ + last_c = c; \ + STORE32; i = 0; LOAD32; \ + c = 0; \ + +#define LAST \ + c = extract_carry(cur); \ + STORE32; i++; \ + if (c != 0) \ + return MBEDTLS_ERR_ECP_BAD_INPUT_DATA; \ + while (i < MAX32) { STORE0; i++; } + +#if defined(MBEDTLS_ECP_DP_SECP224R1_ENABLED) + +/* + * Fast quasi-reduction modulo p224 (FIPS 186-3 D.2.2) + */ +static int ecp_mod_p224(mbedtls_mpi *N) +{ + int ret = MBEDTLS_ERR_ERROR_CORRUPTION_DETECTED; + size_t expected_width = 2 * 224 / biL; + MBEDTLS_MPI_CHK(mbedtls_mpi_grow(N, expected_width)); + ret = mbedtls_ecp_mod_p224_raw(N->p, expected_width); +cleanup: + return ret; +} + +MBEDTLS_STATIC_TESTABLE +int mbedtls_ecp_mod_p224_raw(mbedtls_mpi_uint *X, size_t X_limbs) +{ + if (X_limbs != 2 * 224 / biL) { + return MBEDTLS_ERR_ECP_BAD_INPUT_DATA; + } + + INIT(224); + + SUB(7); SUB(11); NEXT; // A0 += -A7 - A11 + SUB(8); SUB(12); NEXT; // A1 += -A8 - A12 + SUB(9); SUB(13); NEXT; // A2 += -A9 - A13 + SUB(10); ADD(7); ADD(11); NEXT; // A3 += -A10 + A7 + A11 + SUB(11); ADD(8); ADD(12); NEXT; // A4 += -A11 + A8 + A12 + SUB(12); ADD(9); ADD(13); NEXT; // A5 += -A12 + A9 + A13 + SUB(13); ADD(10); // A6 += -A13 + A10 + + RESET; + + /* Use 2^224 = P + 2^96 - 1 to modulo reduce the final carry */ + SUB_LAST; NEXT; // A0 -= last_c + ; NEXT; // A1 + ; NEXT; // A2 + ADD_LAST; NEXT; // A3 += last_c + ; NEXT; // A4 + ; NEXT; // A5 + // A6 + + /* The carry reduction cannot generate a carry + * (see commit 73e8553 for details)*/ + + LAST; + + return 0; +} + +#endif /* MBEDTLS_ECP_DP_SECP224R1_ENABLED */ + +#if defined(MBEDTLS_ECP_DP_SECP256R1_ENABLED) + +/* + * Fast quasi-reduction modulo p256 (FIPS 186-3 D.2.3) + */ +static int ecp_mod_p256(mbedtls_mpi *N) +{ + int ret = MBEDTLS_ERR_ERROR_CORRUPTION_DETECTED; + size_t expected_width = 2 * 256 / biL; + MBEDTLS_MPI_CHK(mbedtls_mpi_grow(N, expected_width)); + ret = mbedtls_ecp_mod_p256_raw(N->p, expected_width); +cleanup: + return ret; +} + +MBEDTLS_STATIC_TESTABLE +int mbedtls_ecp_mod_p256_raw(mbedtls_mpi_uint *X, size_t X_limbs) +{ + if (X_limbs != 2 * 256 / biL) { + return MBEDTLS_ERR_ECP_BAD_INPUT_DATA; + } + + INIT(256); + + ADD(8); ADD(9); + SUB(11); SUB(12); SUB(13); SUB(14); NEXT; // A0 + + ADD(9); ADD(10); + SUB(12); SUB(13); SUB(14); SUB(15); NEXT; // A1 + + ADD(10); ADD(11); + SUB(13); SUB(14); SUB(15); NEXT; // A2 + + ADD(11); ADD(11); ADD(12); ADD(12); ADD(13); + SUB(15); SUB(8); SUB(9); NEXT; // A3 + + ADD(12); ADD(12); ADD(13); ADD(13); ADD(14); + SUB(9); SUB(10); NEXT; // A4 + + ADD(13); ADD(13); ADD(14); ADD(14); ADD(15); + SUB(10); SUB(11); NEXT; // A5 + + ADD(14); ADD(14); ADD(15); ADD(15); ADD(14); ADD(13); + SUB(8); SUB(9); NEXT; // A6 + + ADD(15); ADD(15); ADD(15); ADD(8); + SUB(10); SUB(11); SUB(12); SUB(13); // A7 + + RESET; + + /* Use 2^224 * (2^32 - 1) + 2^192 + 2^96 - 1 + * to modulo reduce the final carry. */ + ADD_LAST; NEXT; // A0 + ; NEXT; // A1 + ; NEXT; // A2 + SUB_LAST; NEXT; // A3 + ; NEXT; // A4 + ; NEXT; // A5 + SUB_LAST; NEXT; // A6 + ADD_LAST; // A7 + + RESET; + + /* Use 2^224 * (2^32 - 1) + 2^192 + 2^96 - 1 + * to modulo reduce the carry generated by the previous reduction. */ + ADD_LAST; NEXT; // A0 + ; NEXT; // A1 + ; NEXT; // A2 + SUB_LAST; NEXT; // A3 + ; NEXT; // A4 + ; NEXT; // A5 + SUB_LAST; NEXT; // A6 + ADD_LAST; // A7 + + LAST; + + return 0; +} + +#endif /* MBEDTLS_ECP_DP_SECP256R1_ENABLED */ + +#undef LOAD32 +#undef MAX32 +#undef A +#undef STORE32 +#undef STORE0 +#undef ADD +#undef SUB +#undef ADD_CARRY +#undef SUB_CARRY +#undef ADD_LAST +#undef SUB_LAST +#undef INIT +#undef NEXT +#undef RESET +#undef LAST + +#endif /* MBEDTLS_ECP_DP_SECP224R1_ENABLED || + MBEDTLS_ECP_DP_SECP256R1_ENABLED || + MBEDTLS_ECP_DP_SECP384R1_ENABLED */ + +#if defined(MBEDTLS_ECP_DP_SECP384R1_ENABLED) /* * The reader is advised to first understand ecp_mod_p192() since the same * general structure is used here, but with additional complications: @@ -944,21 +1218,21 @@ static int ecp_mod_p192( mbedtls_mpi *N ) * * While at it, also define the size of N in terms of 32-bit chunks. */ -#define LOAD32 cur = A( i ); +#define LOAD32 cur = A(i); #if defined(MBEDTLS_HAVE_INT32) /* 32 bit */ #define MAX32 N->n -#define A( j ) N->p[j] +#define A(j) N->p[j] #define STORE32 N->p[i] = cur; #else /* 64-bit */ #define MAX32 N->n * 2 -#define A( j ) (j) % 2 ? (uint32_t)( N->p[(j)/2] >> 32 ) : \ - (uint32_t)( N->p[(j)/2] ) +#define A(j) (j) % 2 ? (uint32_t) (N->p[(j)/2] >> 32) : \ + (uint32_t) (N->p[(j)/2]) #define STORE32 \ - if( i % 2 ) { \ + if (i % 2) { \ N->p[i/2] &= 0x00000000FFFFFFFF; \ N->p[i/2] |= ((mbedtls_mpi_uint) cur) << 32; \ } else { \ @@ -971,26 +1245,26 @@ static int ecp_mod_p192( mbedtls_mpi *N ) /* * Helpers for addition and subtraction of chunks, with signed carry. */ -static inline void add32( uint32_t *dst, uint32_t src, signed char *carry ) +static inline void add32(uint32_t *dst, uint32_t src, signed char *carry) { *dst += src; - *carry += ( *dst < src ); + *carry += (*dst < src); } -static inline void sub32( uint32_t *dst, uint32_t src, signed char *carry ) +static inline void sub32(uint32_t *dst, uint32_t src, signed char *carry) { - *carry -= ( *dst < src ); + *carry -= (*dst < src); *dst -= src; } -#define ADD( j ) add32( &cur, A( j ), &c ); -#define SUB( j ) sub32( &cur, A( j ), &c ); +#define ADD(j) add32(&cur, A(j), &c); +#define SUB(j) sub32(&cur, A(j), &c); /* * Helpers for the main 'loop' * (see fix_negative for the motivation of C) */ -#define INIT( b ) \ +#define INIT(b) \ int ret = MBEDTLS_ERR_ERROR_CORRUPTION_DETECTED; \ signed char c = 0, cc; \ uint32_t cur; \ @@ -1010,10 +1284,10 @@ static inline void sub32( uint32_t *dst, uint32_t src, signed char *carry ) #define NEXT \ STORE32; i++; LOAD32; \ cc = c; c = 0; \ - if( cc < 0 ) \ - sub32( &cur, -cc, &c ); \ + if (cc < 0) \ + sub32(&cur, -cc, &c); \ else \ - add32( &cur, cc, &c ); \ + add32(&cur, cc, &c); \ #define LAST \ STORE32; i++; \ @@ -1048,110 +1322,52 @@ static inline int fix_negative( mbedtls_mpi *N, signed char c, mbedtls_mpi *C, s return( ret ); } -#if defined(MBEDTLS_ECP_DP_SECP224R1_ENABLED) -/* - * Fast quasi-reduction modulo p224 (FIPS 186-3 D.2.2) - */ -static int ecp_mod_p224( mbedtls_mpi *N ) -{ - INIT( 224 ); - - SUB( 7 ); SUB( 11 ); NEXT; // A0 += -A7 - A11 - SUB( 8 ); SUB( 12 ); NEXT; // A1 += -A8 - A12 - SUB( 9 ); SUB( 13 ); NEXT; // A2 += -A9 - A13 - SUB( 10 ); ADD( 7 ); ADD( 11 ); NEXT; // A3 += -A10 + A7 + A11 - SUB( 11 ); ADD( 8 ); ADD( 12 ); NEXT; // A4 += -A11 + A8 + A12 - SUB( 12 ); ADD( 9 ); ADD( 13 ); NEXT; // A5 += -A12 + A9 + A13 - SUB( 13 ); ADD( 10 ); LAST; // A6 += -A13 + A10 - -cleanup: - return( ret ); -} -#endif /* MBEDTLS_ECP_DP_SECP224R1_ENABLED */ - -#if defined(MBEDTLS_ECP_DP_SECP256R1_ENABLED) -/* - * Fast quasi-reduction modulo p256 (FIPS 186-3 D.2.3) - */ -static int ecp_mod_p256( mbedtls_mpi *N ) -{ - INIT( 256 ); - - ADD( 8 ); ADD( 9 ); - SUB( 11 ); SUB( 12 ); SUB( 13 ); SUB( 14 ); NEXT; // A0 - - ADD( 9 ); ADD( 10 ); - SUB( 12 ); SUB( 13 ); SUB( 14 ); SUB( 15 ); NEXT; // A1 - - ADD( 10 ); ADD( 11 ); - SUB( 13 ); SUB( 14 ); SUB( 15 ); NEXT; // A2 - - ADD( 11 ); ADD( 11 ); ADD( 12 ); ADD( 12 ); ADD( 13 ); - SUB( 15 ); SUB( 8 ); SUB( 9 ); NEXT; // A3 - - ADD( 12 ); ADD( 12 ); ADD( 13 ); ADD( 13 ); ADD( 14 ); - SUB( 9 ); SUB( 10 ); NEXT; // A4 - - ADD( 13 ); ADD( 13 ); ADD( 14 ); ADD( 14 ); ADD( 15 ); - SUB( 10 ); SUB( 11 ); NEXT; // A5 - - ADD( 14 ); ADD( 14 ); ADD( 15 ); ADD( 15 ); ADD( 14 ); ADD( 13 ); - SUB( 8 ); SUB( 9 ); NEXT; // A6 - - ADD( 15 ); ADD( 15 ); ADD( 15 ); ADD( 8 ); - SUB( 10 ); SUB( 11 ); SUB( 12 ); SUB( 13 ); LAST; // A7 - -cleanup: - return( ret ); -} -#endif /* MBEDTLS_ECP_DP_SECP256R1_ENABLED */ - #if defined(MBEDTLS_ECP_DP_SECP384R1_ENABLED) /* * Fast quasi-reduction modulo p384 (FIPS 186-3 D.2.4) */ -static int ecp_mod_p384( mbedtls_mpi *N ) +static int ecp_mod_p384(mbedtls_mpi *N) { - INIT( 384 ); + INIT(384); - ADD( 12 ); ADD( 21 ); ADD( 20 ); - SUB( 23 ); NEXT; // A0 + ADD(12); ADD(21); ADD(20); + SUB(23); NEXT; // A0 - ADD( 13 ); ADD( 22 ); ADD( 23 ); - SUB( 12 ); SUB( 20 ); NEXT; // A2 + ADD(13); ADD(22); ADD(23); + SUB(12); SUB(20); NEXT; // A2 - ADD( 14 ); ADD( 23 ); - SUB( 13 ); SUB( 21 ); NEXT; // A2 + ADD(14); ADD(23); + SUB(13); SUB(21); NEXT; // A2 - ADD( 15 ); ADD( 12 ); ADD( 20 ); ADD( 21 ); - SUB( 14 ); SUB( 22 ); SUB( 23 ); NEXT; // A3 + ADD(15); ADD(12); ADD(20); ADD(21); + SUB(14); SUB(22); SUB(23); NEXT; // A3 - ADD( 21 ); ADD( 21 ); ADD( 16 ); ADD( 13 ); ADD( 12 ); ADD( 20 ); ADD( 22 ); - SUB( 15 ); SUB( 23 ); SUB( 23 ); NEXT; // A4 + ADD(21); ADD(21); ADD(16); ADD(13); ADD(12); ADD(20); ADD(22); + SUB(15); SUB(23); SUB(23); NEXT; // A4 - ADD( 22 ); ADD( 22 ); ADD( 17 ); ADD( 14 ); ADD( 13 ); ADD( 21 ); ADD( 23 ); - SUB( 16 ); NEXT; // A5 + ADD(22); ADD(22); ADD(17); ADD(14); ADD(13); ADD(21); ADD(23); + SUB(16); NEXT; // A5 - ADD( 23 ); ADD( 23 ); ADD( 18 ); ADD( 15 ); ADD( 14 ); ADD( 22 ); - SUB( 17 ); NEXT; // A6 + ADD(23); ADD(23); ADD(18); ADD(15); ADD(14); ADD(22); + SUB(17); NEXT; // A6 - ADD( 19 ); ADD( 16 ); ADD( 15 ); ADD( 23 ); - SUB( 18 ); NEXT; // A7 + ADD(19); ADD(16); ADD(15); ADD(23); + SUB(18); NEXT; // A7 - ADD( 20 ); ADD( 17 ); ADD( 16 ); - SUB( 19 ); NEXT; // A8 + ADD(20); ADD(17); ADD(16); + SUB(19); NEXT; // A8 - ADD( 21 ); ADD( 18 ); ADD( 17 ); - SUB( 20 ); NEXT; // A9 + ADD(21); ADD(18); ADD(17); + SUB(20); NEXT; // A9 - ADD( 22 ); ADD( 19 ); ADD( 18 ); - SUB( 21 ); NEXT; // A10 + ADD(22); ADD(19); ADD(18); + SUB(21); NEXT; // A10 - ADD( 23 ); ADD( 20 ); ADD( 19 ); - SUB( 22 ); LAST; // A11 + ADD(23); ADD(20); ADD(19); + SUB(22); LAST; // A11 cleanup: - return( ret ); + return ret; } #endif /* MBEDTLS_ECP_DP_SECP384R1_ENABLED */ @@ -1163,62 +1379,92 @@ static int ecp_mod_p384( mbedtls_mpi *N ) #undef NEXT #undef LAST -#endif /* MBEDTLS_ECP_DP_SECP224R1_ENABLED || - MBEDTLS_ECP_DP_SECP256R1_ENABLED || +#endif /* MBEDTLS_ECP_DP_SECP256R1_ENABLED || MBEDTLS_ECP_DP_SECP384R1_ENABLED */ #if defined(MBEDTLS_ECP_DP_SECP521R1_ENABLED) -/* - * Here we have an actual Mersenne prime, so things are more straightforward. - * However, chunks are aligned on a 'weird' boundary (521 bits). - */ - /* Size of p521 in terms of mbedtls_mpi_uint */ -#define P521_WIDTH ( 521 / 8 / sizeof( mbedtls_mpi_uint ) + 1 ) +#define P521_WIDTH (521 / 8 / sizeof(mbedtls_mpi_uint) + 1) /* Bits to keep in the most significant mbedtls_mpi_uint */ #define P521_MASK 0x01FF /* - * Fast quasi-reduction modulo p521 (FIPS 186-3 D.2.5) - * Write N as A1 + 2^521 A0, return A0 + A1 + * Fast quasi-reduction modulo p521 = 2^521 - 1 (FIPS 186-3 D.2.5) */ -static int ecp_mod_p521( mbedtls_mpi *N ) +static int ecp_mod_p521(mbedtls_mpi *N) { int ret = MBEDTLS_ERR_ERROR_CORRUPTION_DETECTED; - size_t i; - mbedtls_mpi M; - mbedtls_mpi_uint Mp[P521_WIDTH + 1]; - /* Worst case for the size of M is when mbedtls_mpi_uint is 16 bits: - * we need to hold bits 513 to 1056, which is 34 limbs, that is - * P521_WIDTH + 1. Otherwise P521_WIDTH is enough. */ - - if( N->n < P521_WIDTH ) - return( 0 ); - - /* M = A1 */ - M.s = 1; - M.n = N->n - ( P521_WIDTH - 1 ); - if( M.n > P521_WIDTH + 1 ) - M.n = P521_WIDTH + 1; - M.p = Mp; - memcpy( Mp, N->p + P521_WIDTH - 1, M.n * sizeof( mbedtls_mpi_uint ) ); - MBEDTLS_MPI_CHK( mbedtls_mpi_shift_r( &M, 521 % ( 8 * sizeof( mbedtls_mpi_uint ) ) ) ); + size_t expected_width = 2 * P521_WIDTH; + MBEDTLS_MPI_CHK(mbedtls_mpi_grow(N, expected_width)); + ret = mbedtls_ecp_mod_p521_raw(N->p, expected_width); +cleanup: + return ret; +} - /* N = A0 */ - N->p[P521_WIDTH - 1] &= P521_MASK; - for( i = P521_WIDTH; i < N->n; i++ ) - N->p[i] = 0; +MBEDTLS_STATIC_TESTABLE +int mbedtls_ecp_mod_p521_raw(mbedtls_mpi_uint *X, size_t X_limbs) +{ + mbedtls_mpi_uint carry = 0; - /* N = A0 + A1 */ - MBEDTLS_MPI_CHK( mbedtls_mpi_add_abs( N, N, &M ) ); + if (X_limbs != 2 * P521_WIDTH || X[2 * P521_WIDTH - 1] != 0) { + return MBEDTLS_ERR_ECP_BAD_INPUT_DATA; + } -cleanup: - return( ret ); + /* Step 1: Reduction to P521_WIDTH limbs */ + /* Helper references for bottom part of X */ + mbedtls_mpi_uint *X0 = X; + size_t X0_limbs = P521_WIDTH; + /* Helper references for top part of X */ + mbedtls_mpi_uint *X1 = X + X0_limbs; + size_t X1_limbs = X_limbs - X0_limbs; + /* Split X as X0 + 2^P521_WIDTH X1 and compute X0 + 2^(biL - 9) X1. + * (We are using that 2^P521_WIDTH = 2^(512 + biL) and that + * 2^(512 + biL) X1 = 2^(biL - 9) X1 mod P521.) + * The high order limb of the result will be held in carry and the rest + * in X0 (that is the result will be represented as + * 2^P521_WIDTH carry + X0). + * + * Also, note that the resulting carry is either 0 or 1: + * X0 < 2^P521_WIDTH = 2^(512 + biL) and X1 < 2^(P521_WIDTH-biL) = 2^512 + * therefore + * X0 + 2^(biL - 9) X1 < 2^(512 + biL) + 2^(512 + biL - 9) + * which in turn is less than 2 * 2^(512 + biL). + */ + mbedtls_mpi_uint shift = ((mbedtls_mpi_uint) 1u) << (biL - 9); + carry = mbedtls_mpi_core_mla(X0, X0_limbs, X1, X1_limbs, shift); + /* Set X to X0 (by clearing the top part). */ + memset(X1, 0, X1_limbs * sizeof(mbedtls_mpi_uint)); + + /* Step 2: Reduction modulo P521 + * + * At this point X is reduced to P521_WIDTH limbs. What remains is to add + * the carry (that is 2^P521_WIDTH carry) and to reduce mod P521. */ + + /* 2^P521_WIDTH carry = 2^(512 + biL) carry = 2^(biL - 9) carry mod P521. + * Also, recall that carry is either 0 or 1. */ + mbedtls_mpi_uint addend = carry << (biL - 9); + /* Keep the top 9 bits and reduce the rest, using 2^521 = 1 mod P521. */ + addend += (X[P521_WIDTH - 1] >> 9); + X[P521_WIDTH - 1] &= P521_MASK; + + /* Reuse the top part of X (already zeroed) as a helper array for + * carrying out the addition. */ + mbedtls_mpi_uint *addend_arr = X + P521_WIDTH; + addend_arr[0] = addend; + (void) mbedtls_mpi_core_add(X, X, addend_arr, P521_WIDTH); + /* Both addends were less than P521 therefore X < 2 * P521. (This also means + * that the result fit in P521_WIDTH limbs and there won't be any carry.) */ + + /* Clear the reused part of X. */ + addend_arr[0] = 0; + + return 0; } #undef P521_WIDTH #undef P521_MASK + #endif /* MBEDTLS_ECP_DP_SECP521R1_ENABLED */ #endif /* MBEDTLS_ECP_NIST_OPTIM */ @@ -1226,47 +1472,49 @@ static int ecp_mod_p521( mbedtls_mpi *N ) #if defined(MBEDTLS_ECP_DP_CURVE25519_ENABLED) /* Size of p255 in terms of mbedtls_mpi_uint */ -#define P255_WIDTH ( 255 / 8 / sizeof( mbedtls_mpi_uint ) + 1 ) +#define P255_WIDTH (255 / 8 / sizeof(mbedtls_mpi_uint) + 1) /* * Fast quasi-reduction modulo p255 = 2^255 - 19 * Write N as A0 + 2^256 A1, return A0 + 38 * A1 */ -static int ecp_mod_p255( mbedtls_mpi *N ) +static int ecp_mod_p255(mbedtls_mpi *N) { mbedtls_mpi_uint Mp[P255_WIDTH]; /* Helper references for top part of N */ mbedtls_mpi_uint * const NT_p = N->p + P255_WIDTH; const size_t NT_n = N->n - P255_WIDTH; - if( N->n <= P255_WIDTH ) - return( 0 ); - if( NT_n > P255_WIDTH ) - return( MBEDTLS_ERR_ECP_BAD_INPUT_DATA ); + if (N->n <= P255_WIDTH) { + return 0; + } + if (NT_n > P255_WIDTH) { + return MBEDTLS_ERR_ECP_BAD_INPUT_DATA; + } /* Split N as N + 2^256 M */ - memcpy( Mp, NT_p, sizeof( mbedtls_mpi_uint ) * NT_n ); - memset( NT_p, 0, sizeof( mbedtls_mpi_uint ) * NT_n ); + memcpy(Mp, NT_p, sizeof(mbedtls_mpi_uint) * NT_n); + memset(NT_p, 0, sizeof(mbedtls_mpi_uint) * NT_n); /* N = A0 + 38 * A1 */ - mbedtls_mpi_core_mla( N->p, P255_WIDTH + 1, - Mp, NT_n, - 38 ); + mbedtls_mpi_core_mla(N->p, P255_WIDTH + 1, + Mp, NT_n, + 38); - return( 0 ); + return 0; } #endif /* MBEDTLS_ECP_DP_CURVE25519_ENABLED */ #if defined(MBEDTLS_ECP_DP_CURVE448_ENABLED) /* Size of p448 in terms of mbedtls_mpi_uint */ -#define P448_WIDTH ( 448 / 8 / sizeof( mbedtls_mpi_uint ) ) +#define P448_WIDTH (448 / 8 / sizeof(mbedtls_mpi_uint)) /* Number of limbs fully occupied by 2^224 (max), and limbs used by it (min) */ -#define DIV_ROUND_UP( X, Y ) ( ( ( X ) + ( Y ) - 1 ) / ( Y ) ) -#define P224_WIDTH_MIN ( 28 / sizeof( mbedtls_mpi_uint ) ) -#define P224_WIDTH_MAX DIV_ROUND_UP( 28, sizeof( mbedtls_mpi_uint ) ) -#define P224_UNUSED_BITS ( ( P224_WIDTH_MAX * sizeof( mbedtls_mpi_uint ) * 8 ) - 224 ) +#define DIV_ROUND_UP(X, Y) (((X) + (Y) -1) / (Y)) +#define P224_WIDTH_MIN (28 / sizeof(mbedtls_mpi_uint)) +#define P224_WIDTH_MAX DIV_ROUND_UP(28, sizeof(mbedtls_mpi_uint)) +#define P224_UNUSED_BITS ((P224_WIDTH_MAX * sizeof(mbedtls_mpi_uint) * 8) - 224) /* * Fast quasi-reduction modulo p448 = 2^448 - 2^224 - 1 @@ -1279,52 +1527,57 @@ static int ecp_mod_p255( mbedtls_mpi *N ) * but for 64-bit targets it should use half the number of operations if we do * the reduction with 224-bit limbs, since mpi_add_mpi will then use 64-bit adds. */ -static int ecp_mod_p448( mbedtls_mpi *N ) +static int ecp_mod_p448(mbedtls_mpi *N) { int ret = MBEDTLS_ERR_ERROR_CORRUPTION_DETECTED; size_t i; mbedtls_mpi M, Q; mbedtls_mpi_uint Mp[P448_WIDTH + 1], Qp[P448_WIDTH]; - if( N->n <= P448_WIDTH ) - return( 0 ); + if (N->n <= P448_WIDTH) { + return 0; + } /* M = A1 */ M.s = 1; - M.n = N->n - ( P448_WIDTH ); - if( M.n > P448_WIDTH ) + M.n = N->n - (P448_WIDTH); + if (M.n > P448_WIDTH) { /* Shouldn't be called with N larger than 2^896! */ - return( MBEDTLS_ERR_ECP_BAD_INPUT_DATA ); + return MBEDTLS_ERR_ECP_BAD_INPUT_DATA; + } M.p = Mp; - memset( Mp, 0, sizeof( Mp ) ); - memcpy( Mp, N->p + P448_WIDTH, M.n * sizeof( mbedtls_mpi_uint ) ); + memset(Mp, 0, sizeof(Mp)); + memcpy(Mp, N->p + P448_WIDTH, M.n * sizeof(mbedtls_mpi_uint)); /* N = A0 */ - for( i = P448_WIDTH; i < N->n; i++ ) + for (i = P448_WIDTH; i < N->n; i++) { N->p[i] = 0; + } /* N += A1 */ - MBEDTLS_MPI_CHK( mbedtls_mpi_add_mpi( N, N, &M ) ); + MBEDTLS_MPI_CHK(mbedtls_mpi_add_mpi(N, N, &M)); /* Q = B1, N += B1 */ Q = M; Q.p = Qp; - memcpy( Qp, Mp, sizeof( Qp ) ); - MBEDTLS_MPI_CHK( mbedtls_mpi_shift_r( &Q, 224 ) ); - MBEDTLS_MPI_CHK( mbedtls_mpi_add_mpi( N, N, &Q ) ); + memcpy(Qp, Mp, sizeof(Qp)); + MBEDTLS_MPI_CHK(mbedtls_mpi_shift_r(&Q, 224)); + MBEDTLS_MPI_CHK(mbedtls_mpi_add_mpi(N, N, &Q)); /* M = (B0 + B1) * 2^224, N += M */ - if( sizeof( mbedtls_mpi_uint ) > 4 ) - Mp[P224_WIDTH_MIN] &= ( (mbedtls_mpi_uint)-1 ) >> ( P224_UNUSED_BITS ); - for( i = P224_WIDTH_MAX; i < M.n; ++i ) + if (sizeof(mbedtls_mpi_uint) > 4) { + Mp[P224_WIDTH_MIN] &= ((mbedtls_mpi_uint)-1) >> (P224_UNUSED_BITS); + } + for (i = P224_WIDTH_MAX; i < M.n; ++i) { Mp[i] = 0; - MBEDTLS_MPI_CHK( mbedtls_mpi_add_mpi( &M, &M, &Q ) ); + } + MBEDTLS_MPI_CHK(mbedtls_mpi_add_mpi(&M, &M, &Q)); M.n = P448_WIDTH + 1; /* Make room for shifted carry bit from the addition */ - MBEDTLS_MPI_CHK( mbedtls_mpi_shift_l( &M, 224 ) ); - MBEDTLS_MPI_CHK( mbedtls_mpi_add_mpi( N, N, &M ) ); + MBEDTLS_MPI_CHK(mbedtls_mpi_shift_l(&M, 224)); + MBEDTLS_MPI_CHK(mbedtls_mpi_add_mpi(N, N, &M)); cleanup: - return( ret ); + return ret; } #endif /* MBEDTLS_ECP_DP_CURVE448_ENABLED */ @@ -1338,18 +1591,19 @@ static int ecp_mod_p448( mbedtls_mpi *N ) * Write N as A0 + 2^224 A1, return A0 + R * A1. * Actually do two passes, since R is big. */ -#define P_KOBLITZ_MAX ( 256 / 8 / sizeof( mbedtls_mpi_uint ) ) // Max limbs in P -#define P_KOBLITZ_R ( 8 / sizeof( mbedtls_mpi_uint ) ) // Limbs in R -static inline int ecp_mod_koblitz( mbedtls_mpi *N, mbedtls_mpi_uint *Rp, size_t p_limbs, - size_t adjust, size_t shift, mbedtls_mpi_uint mask ) +#define P_KOBLITZ_MAX (256 / 8 / sizeof(mbedtls_mpi_uint)) // Max limbs in P +#define P_KOBLITZ_R (8 / sizeof(mbedtls_mpi_uint)) // Limbs in R +static inline int ecp_mod_koblitz(mbedtls_mpi *N, mbedtls_mpi_uint *Rp, size_t p_limbs, + size_t adjust, size_t shift, mbedtls_mpi_uint mask) { int ret = MBEDTLS_ERR_ERROR_CORRUPTION_DETECTED; size_t i; mbedtls_mpi M, R; mbedtls_mpi_uint Mp[P_KOBLITZ_MAX + P_KOBLITZ_R + 1]; - if( N->n < p_limbs ) - return( 0 ); + if (N->n < p_limbs) { + return 0; + } /* Init R */ R.s = 1; @@ -1361,49 +1615,57 @@ static inline int ecp_mod_koblitz( mbedtls_mpi *N, mbedtls_mpi_uint *Rp, size_t M.p = Mp; /* M = A1 */ - M.n = N->n - ( p_limbs - adjust ); - if( M.n > p_limbs + adjust ) + M.n = N->n - (p_limbs - adjust); + if (M.n > p_limbs + adjust) { M.n = p_limbs + adjust; - memset( Mp, 0, sizeof Mp ); - memcpy( Mp, N->p + p_limbs - adjust, M.n * sizeof( mbedtls_mpi_uint ) ); - if( shift != 0 ) - MBEDTLS_MPI_CHK( mbedtls_mpi_shift_r( &M, shift ) ); + } + memset(Mp, 0, sizeof(Mp)); + memcpy(Mp, N->p + p_limbs - adjust, M.n * sizeof(mbedtls_mpi_uint)); + if (shift != 0) { + MBEDTLS_MPI_CHK(mbedtls_mpi_shift_r(&M, shift)); + } M.n += R.n; /* Make room for multiplication by R */ /* N = A0 */ - if( mask != 0 ) + if (mask != 0) { N->p[p_limbs - 1] &= mask; - for( i = p_limbs; i < N->n; i++ ) + } + for (i = p_limbs; i < N->n; i++) { N->p[i] = 0; + } /* N = A0 + R * A1 */ - MBEDTLS_MPI_CHK( mbedtls_mpi_mul_mpi( &M, &M, &R ) ); - MBEDTLS_MPI_CHK( mbedtls_mpi_add_abs( N, N, &M ) ); + MBEDTLS_MPI_CHK(mbedtls_mpi_mul_mpi(&M, &M, &R)); + MBEDTLS_MPI_CHK(mbedtls_mpi_add_abs(N, N, &M)); /* Second pass */ /* M = A1 */ - M.n = N->n - ( p_limbs - adjust ); - if( M.n > p_limbs + adjust ) + M.n = N->n - (p_limbs - adjust); + if (M.n > p_limbs + adjust) { M.n = p_limbs + adjust; - memset( Mp, 0, sizeof Mp ); - memcpy( Mp, N->p + p_limbs - adjust, M.n * sizeof( mbedtls_mpi_uint ) ); - if( shift != 0 ) - MBEDTLS_MPI_CHK( mbedtls_mpi_shift_r( &M, shift ) ); + } + memset(Mp, 0, sizeof(Mp)); + memcpy(Mp, N->p + p_limbs - adjust, M.n * sizeof(mbedtls_mpi_uint)); + if (shift != 0) { + MBEDTLS_MPI_CHK(mbedtls_mpi_shift_r(&M, shift)); + } M.n += R.n; /* Make room for multiplication by R */ /* N = A0 */ - if( mask != 0 ) + if (mask != 0) { N->p[p_limbs - 1] &= mask; - for( i = p_limbs; i < N->n; i++ ) + } + for (i = p_limbs; i < N->n; i++) { N->p[i] = 0; + } /* N = A0 + R * A1 */ - MBEDTLS_MPI_CHK( mbedtls_mpi_mul_mpi( &M, &M, &R ) ); - MBEDTLS_MPI_CHK( mbedtls_mpi_add_abs( N, N, &M ) ); + MBEDTLS_MPI_CHK(mbedtls_mpi_mul_mpi(&M, &M, &R)); + MBEDTLS_MPI_CHK(mbedtls_mpi_add_abs(N, N, &M)); cleanup: - return( ret ); + return ret; } #endif /* MBEDTLS_ECP_DP_SECP192K1_ENABLED) || MBEDTLS_ECP_DP_SECP224K1_ENABLED) || @@ -1428,15 +1690,18 @@ static int ecp_mod_p192k1( mbedtls_mpi *N ) * Fast quasi-reduction modulo p224k1 = 2^224 - R, * with R = 2^32 + 2^12 + 2^11 + 2^9 + 2^7 + 2^4 + 2 + 1 = 0x0100001A93 */ -static int ecp_mod_p224k1( mbedtls_mpi *N ) +static int ecp_mod_p224k1(mbedtls_mpi *N) { static mbedtls_mpi_uint Rp[] = { - BYTES_TO_T_UINT_8( 0x93, 0x1A, 0x00, 0x00, 0x01, 0x00, 0x00, 0x00 ) }; + BYTES_TO_T_UINT_8(0x93, 0x1A, 0x00, 0x00, 0x01, 0x00, 0x00, + 0x00) + }; #if defined(MBEDTLS_HAVE_INT64) - return( ecp_mod_koblitz( N, Rp, 4, 1, 32, 0xFFFFFFFF ) ); + return ecp_mod_koblitz(N, Rp, 4, 1, 32, 0xFFFFFFFF); #else - return( ecp_mod_koblitz( N, Rp, 224 / 8 / sizeof( mbedtls_mpi_uint ), 0, 0, 0 ) ); + return ecp_mod_koblitz(N, Rp, 224 / 8 / sizeof(mbedtls_mpi_uint), 0, 0, + 0); #endif } @@ -1447,14 +1712,199 @@ static int ecp_mod_p224k1( mbedtls_mpi *N ) * Fast quasi-reduction modulo p256k1 = 2^256 - R, * with R = 2^32 + 2^9 + 2^8 + 2^7 + 2^6 + 2^4 + 1 = 0x01000003D1 */ -static int ecp_mod_p256k1( mbedtls_mpi *N ) +static int ecp_mod_p256k1(mbedtls_mpi *N) { static mbedtls_mpi_uint Rp[] = { - BYTES_TO_T_UINT_8( 0xD1, 0x03, 0x00, 0x00, 0x01, 0x00, 0x00, 0x00 ) }; - return( ecp_mod_koblitz( N, Rp, 256 / 8 / sizeof( mbedtls_mpi_uint ), 0, 0, 0 ) ); + BYTES_TO_T_UINT_8(0xD1, 0x03, 0x00, 0x00, 0x01, 0x00, 0x00, + 0x00) + }; + return ecp_mod_koblitz(N, Rp, 256 / 8 / sizeof(mbedtls_mpi_uint), 0, 0, + 0); } #endif /* MBEDTLS_ECP_DP_SECP256K1_ENABLED */ -#endif /* !MBEDTLS_ECP_ALT */ +#if defined(MBEDTLS_TEST_HOOKS) +MBEDTLS_STATIC_TESTABLE +int mbedtls_ecp_modulus_setup(mbedtls_mpi_mod_modulus *N, + const mbedtls_ecp_group_id id, + const mbedtls_ecp_curve_type ctype) +{ + mbedtls_mpi_uint *p = NULL; + size_t p_limbs; + if (!(ctype == (mbedtls_ecp_curve_type) MBEDTLS_ECP_MOD_COORDINATE || \ + ctype == (mbedtls_ecp_curve_type) MBEDTLS_ECP_MOD_SCALAR)) { + return MBEDTLS_ERR_ECP_BAD_INPUT_DATA; + } + + switch (id) { +#if defined(MBEDTLS_ECP_DP_SECP192R1_ENABLED) + case MBEDTLS_ECP_DP_SECP192R1: + if (ctype == (mbedtls_ecp_curve_type) MBEDTLS_ECP_MOD_COORDINATE) { + p = (mbedtls_mpi_uint *) secp192r1_p; + p_limbs = CHARS_TO_LIMBS(sizeof(secp192r1_p)); + } else { + p = (mbedtls_mpi_uint *) secp192r1_n; + p_limbs = CHARS_TO_LIMBS(sizeof(secp192r1_n)); + } + break; +#endif + +#if defined(MBEDTLS_ECP_DP_SECP224R1_ENABLED) + case MBEDTLS_ECP_DP_SECP224R1: + if (ctype == (mbedtls_ecp_curve_type) MBEDTLS_ECP_MOD_COORDINATE) { + p = (mbedtls_mpi_uint *) secp224r1_p; + p_limbs = CHARS_TO_LIMBS(sizeof(secp224r1_p)); + } else { + p = (mbedtls_mpi_uint *) secp224r1_n; + p_limbs = CHARS_TO_LIMBS(sizeof(secp224r1_n)); + } + break; +#endif + +#if defined(MBEDTLS_ECP_DP_SECP256R1_ENABLED) + case MBEDTLS_ECP_DP_SECP256R1: + if (ctype == (mbedtls_ecp_curve_type) MBEDTLS_ECP_MOD_COORDINATE) { + p = (mbedtls_mpi_uint *) secp256r1_p; + p_limbs = CHARS_TO_LIMBS(sizeof(secp256r1_p)); + } else { + p = (mbedtls_mpi_uint *) secp256r1_n; + p_limbs = CHARS_TO_LIMBS(sizeof(secp256r1_n)); + } + break; +#endif + +#if defined(MBEDTLS_ECP_DP_SECP384R1_ENABLED) + case MBEDTLS_ECP_DP_SECP384R1: + if (ctype == (mbedtls_ecp_curve_type) MBEDTLS_ECP_MOD_COORDINATE) { + p = (mbedtls_mpi_uint *) secp384r1_p; + p_limbs = CHARS_TO_LIMBS(sizeof(secp384r1_p)); + } else { + p = (mbedtls_mpi_uint *) secp384r1_n; + p_limbs = CHARS_TO_LIMBS(sizeof(secp384r1_n)); + } + break; +#endif + +#if defined(MBEDTLS_ECP_DP_SECP521R1_ENABLED) + case MBEDTLS_ECP_DP_SECP521R1: + if (ctype == (mbedtls_ecp_curve_type) MBEDTLS_ECP_MOD_COORDINATE) { + p = (mbedtls_mpi_uint *) secp521r1_p; + p_limbs = CHARS_TO_LIMBS(sizeof(secp521r1_p)); + } else { + p = (mbedtls_mpi_uint *) secp521r1_n; + p_limbs = CHARS_TO_LIMBS(sizeof(secp521r1_n)); + } + break; +#endif + +#if defined(MBEDTLS_ECP_DP_BP256R1_ENABLED) + case MBEDTLS_ECP_DP_BP256R1: + if (ctype == (mbedtls_ecp_curve_type) MBEDTLS_ECP_MOD_COORDINATE) { + p = (mbedtls_mpi_uint *) brainpoolP256r1_p; + p_limbs = CHARS_TO_LIMBS(sizeof(brainpoolP256r1_p)); + } else { + p = (mbedtls_mpi_uint *) brainpoolP256r1_n; + p_limbs = CHARS_TO_LIMBS(sizeof(brainpoolP256r1_n)); + } + break; +#endif + +#if defined(MBEDTLS_ECP_DP_BP384R1_ENABLED) + case MBEDTLS_ECP_DP_BP384R1: + if (ctype == (mbedtls_ecp_curve_type) MBEDTLS_ECP_MOD_COORDINATE) { + p = (mbedtls_mpi_uint *) brainpoolP384r1_p; + p_limbs = CHARS_TO_LIMBS(sizeof(brainpoolP384r1_p)); + } else { + p = (mbedtls_mpi_uint *) brainpoolP384r1_n; + p_limbs = CHARS_TO_LIMBS(sizeof(brainpoolP384r1_n)); + } + break; +#endif + +#if defined(MBEDTLS_ECP_DP_BP512R1_ENABLED) + case MBEDTLS_ECP_DP_BP512R1: + if (ctype == (mbedtls_ecp_curve_type) MBEDTLS_ECP_MOD_COORDINATE) { + p = (mbedtls_mpi_uint *) brainpoolP512r1_p; + p_limbs = CHARS_TO_LIMBS(sizeof(brainpoolP512r1_p)); + } else { + p = (mbedtls_mpi_uint *) brainpoolP512r1_n; + p_limbs = CHARS_TO_LIMBS(sizeof(brainpoolP512r1_n)); + } + break; +#endif + +#if defined(MBEDTLS_ECP_DP_CURVE25519_ENABLED) + case MBEDTLS_ECP_DP_CURVE25519: + if (ctype == (mbedtls_ecp_curve_type) MBEDTLS_ECP_MOD_COORDINATE) { + p = (mbedtls_mpi_uint *) curve25519_p; + p_limbs = CHARS_TO_LIMBS(sizeof(curve25519_p)); + } else { + p = (mbedtls_mpi_uint *) curve25519_n; + p_limbs = CHARS_TO_LIMBS(sizeof(curve25519_n)); + } + break; +#endif + +#if defined(MBEDTLS_ECP_DP_SECP192K1_ENABLED) + case MBEDTLS_ECP_DP_SECP192K1: + if (ctype == (mbedtls_ecp_curve_type) MBEDTLS_ECP_MOD_COORDINATE) { + p = (mbedtls_mpi_uint *) secp192k1_p; + p_limbs = CHARS_TO_LIMBS(sizeof(secp192k1_p)); + } else { + p = (mbedtls_mpi_uint *) secp192k1_n; + p_limbs = CHARS_TO_LIMBS(sizeof(secp192k1_n)); + } + break; +#endif + +#if defined(MBEDTLS_ECP_DP_SECP224K1_ENABLED) + case MBEDTLS_ECP_DP_SECP224K1: + if (ctype == (mbedtls_ecp_curve_type) MBEDTLS_ECP_MOD_COORDINATE) { + p = (mbedtls_mpi_uint *) secp224k1_p; + p_limbs = CHARS_TO_LIMBS(sizeof(secp224k1_p)); + } else { + p = (mbedtls_mpi_uint *) secp224k1_n; + p_limbs = CHARS_TO_LIMBS(sizeof(secp224k1_n)); + } + break; +#endif + +#if defined(MBEDTLS_ECP_DP_SECP256K1_ENABLED) + case MBEDTLS_ECP_DP_SECP256K1: + if (ctype == (mbedtls_ecp_curve_type) MBEDTLS_ECP_MOD_COORDINATE) { + p = (mbedtls_mpi_uint *) secp256k1_p; + p_limbs = CHARS_TO_LIMBS(sizeof(secp256k1_p)); + } else { + p = (mbedtls_mpi_uint *) secp256k1_n; + p_limbs = CHARS_TO_LIMBS(sizeof(secp256k1_n)); + } + break; +#endif + +#if defined(MBEDTLS_ECP_DP_CURVE448_ENABLED) + case MBEDTLS_ECP_DP_CURVE448: + if (ctype == (mbedtls_ecp_curve_type) MBEDTLS_ECP_MOD_COORDINATE) { + p = (mbedtls_mpi_uint *) curve448_p; + p_limbs = CHARS_TO_LIMBS(sizeof(curve448_p)); + } else { + p = (mbedtls_mpi_uint *) curve448_n; + p_limbs = CHARS_TO_LIMBS(sizeof(curve448_n)); + } + break; +#endif + + default: + case MBEDTLS_ECP_DP_NONE: + return MBEDTLS_ERR_ECP_BAD_INPUT_DATA; + } + + if (mbedtls_mpi_mod_modulus_setup(N, p, p_limbs, + MBEDTLS_MPI_MOD_REP_MONTGOMERY)) { + return MBEDTLS_ERR_ERROR_CORRUPTION_DETECTED; + } + return 0; +} +#endif /* MBEDTLS_TEST_HOOKS */ +#endif /* !MBEDTLS_ECP_ALT */ #endif /* MBEDTLS_ECP_C */ diff --git a/ra/fsp/src/rm_psa_crypto/gcm_alt.c b/ra/fsp/src/rm_psa_crypto/gcm_alt.c index b89f88458..d777e05aa 100644 --- a/ra/fsp/src/rm_psa_crypto/gcm_alt.c +++ b/ra/fsp/src/rm_psa_crypto/gcm_alt.c @@ -32,6 +32,7 @@ #if defined(MBEDTLS_GCM_C) #include "mbedtls/gcm.h" +#include "mbedtls/platform.h" #include "mbedtls/platform_util.h" #include "mbedtls/error.h" @@ -41,31 +42,19 @@ #include "aesni.h" #endif -#if defined(MBEDTLS_SELF_TEST) && defined(MBEDTLS_AES_C) -#include "mbedtls/aes.h" -#include "mbedtls/platform.h" -#if !defined(MBEDTLS_PLATFORM_C) -#include <stdio.h> -#define mbedtls_printf printf -#endif /* MBEDTLS_PLATFORM_C */ -#endif /* MBEDTLS_SELF_TEST && MBEDTLS_AES_C */ +#if defined(MBEDTLS_AESCE_C) +#include "aesce.h" +#endif #if defined(MBEDTLS_GCM_ALT) #include "gcm_alt.h" -/* Parameter validation macros */ -#define GCM_VALIDATE_RET( cond ) \ - MBEDTLS_INTERNAL_VALIDATE_RET( cond, MBEDTLS_ERR_GCM_BAD_INPUT ) -#define GCM_VALIDATE( cond ) \ - MBEDTLS_INTERNAL_VALIDATE( cond ) - /* * Initialize a context */ -void mbedtls_gcm_init( mbedtls_gcm_context *ctx ) +void mbedtls_gcm_init(mbedtls_gcm_context *ctx) { - GCM_VALIDATE( ctx != NULL ); - memset( ctx, 0, sizeof( mbedtls_gcm_context ) ); + memset(ctx, 0, sizeof(mbedtls_gcm_context)); } /* @@ -76,7 +65,7 @@ void mbedtls_gcm_init( mbedtls_gcm_context *ctx ) * is the high-order bit of HH corresponds to P^0 and the low-order bit of HL * corresponds to P^127. */ -static int gcm_gen_table( mbedtls_gcm_context *ctx ) +static int gcm_gen_table(mbedtls_gcm_context *ctx) { int ret, i, j; uint64_t hi, lo; @@ -84,93 +73,101 @@ static int gcm_gen_table( mbedtls_gcm_context *ctx ) unsigned char h[16]; size_t olen = 0; - memset( h, 0, 16 ); - if( ( ret = mbedtls_cipher_update( &ctx->cipher_ctx, h, 16, h, &olen ) ) != 0 ) - return( ret ); + memset(h, 0, 16); + if ((ret = mbedtls_cipher_update(&ctx->cipher_ctx, h, 16, h, &olen)) != 0) { + return ret; + } /* pack h as two 64-bits ints, big-endian */ - hi = MBEDTLS_GET_UINT32_BE( h, 0 ); - lo = MBEDTLS_GET_UINT32_BE( h, 4 ); + hi = MBEDTLS_GET_UINT32_BE(h, 0); + lo = MBEDTLS_GET_UINT32_BE(h, 4); vh = (uint64_t) hi << 32 | lo; - hi = MBEDTLS_GET_UINT32_BE( h, 8 ); - lo = MBEDTLS_GET_UINT32_BE( h, 12 ); + hi = MBEDTLS_GET_UINT32_BE(h, 8); + lo = MBEDTLS_GET_UINT32_BE(h, 12); vl = (uint64_t) hi << 32 | lo; /* 8 = 1000 corresponds to 1 in GF(2^128) */ ctx->HL[8] = vl; ctx->HH[8] = vh; -#if defined(MBEDTLS_AESNI_C) && defined(MBEDTLS_HAVE_X86_64) +#if defined(MBEDTLS_AESNI_HAVE_CODE) /* With CLMUL support, we need only h, not the rest of the table */ - if( mbedtls_aesni_has_support( MBEDTLS_AESNI_CLMUL ) ) - return( 0 ); + if (mbedtls_aesni_has_support(MBEDTLS_AESNI_CLMUL)) { + return 0; + } +#endif + +#if defined(MBEDTLS_AESCE_C) && defined(MBEDTLS_HAVE_ARM64) + if (mbedtls_aesce_has_support()) { + return 0; + } #endif /* 0 corresponds to 0 in GF(2^128) */ ctx->HH[0] = 0; ctx->HL[0] = 0; - for( i = 4; i > 0; i >>= 1 ) - { - uint32_t T = ( vl & 1 ) * 0xe1000000U; - vl = ( vh << 63 ) | ( vl >> 1 ); - vh = ( vh >> 1 ) ^ ( (uint64_t) T << 32); + for (i = 4; i > 0; i >>= 1) { + uint32_t T = (vl & 1) * 0xe1000000U; + vl = (vh << 63) | (vl >> 1); + vh = (vh >> 1) ^ ((uint64_t) T << 32); ctx->HL[i] = vl; ctx->HH[i] = vh; } - for( i = 2; i <= 8; i *= 2 ) - { + for (i = 2; i <= 8; i *= 2) { uint64_t *HiL = ctx->HL + i, *HiH = ctx->HH + i; vh = *HiH; vl = *HiL; - for( j = 1; j < i; j++ ) - { + for (j = 1; j < i; j++) { HiH[j] = vh ^ ctx->HH[j]; HiL[j] = vl ^ ctx->HL[j]; } } - return( 0 ); + return 0; } -int mbedtls_gcm_setkey( mbedtls_gcm_context *ctx, - mbedtls_cipher_id_t cipher, - const unsigned char *key, - unsigned int keybits ) +int mbedtls_gcm_setkey(mbedtls_gcm_context *ctx, + mbedtls_cipher_id_t cipher, + const unsigned char *key, + unsigned int keybits) { int ret = MBEDTLS_ERR_ERROR_CORRUPTION_DETECTED; const mbedtls_cipher_info_t *cipher_info; - GCM_VALIDATE_RET( ctx != NULL ); - GCM_VALIDATE_RET( key != NULL ); - GCM_VALIDATE_RET( keybits == 128 || keybits == 192 || keybits == 256 ); + if (keybits != 128 && keybits != 192 && keybits != 256) { + return MBEDTLS_ERR_GCM_BAD_INPUT; + } - cipher_info = mbedtls_cipher_info_from_values( cipher, keybits, - MBEDTLS_MODE_ECB ); - if( cipher_info == NULL ) - return( MBEDTLS_ERR_GCM_BAD_INPUT ); + cipher_info = mbedtls_cipher_info_from_values(cipher, keybits, + MBEDTLS_MODE_ECB); + if (cipher_info == NULL) { + return MBEDTLS_ERR_GCM_BAD_INPUT; + } - if( cipher_info->block_size != 16 ) - return( MBEDTLS_ERR_GCM_BAD_INPUT ); + if (cipher_info->block_size != 16) { + return MBEDTLS_ERR_GCM_BAD_INPUT; + } - mbedtls_cipher_free( &ctx->cipher_ctx ); + mbedtls_cipher_free(&ctx->cipher_ctx); - if( ( ret = mbedtls_cipher_setup( &ctx->cipher_ctx, cipher_info ) ) != 0 ) - return( ret ); + if ((ret = mbedtls_cipher_setup(&ctx->cipher_ctx, cipher_info)) != 0) { + return ret; + } - if( ( ret = mbedtls_cipher_setkey( &ctx->cipher_ctx, key, keybits, - MBEDTLS_ENCRYPT ) ) != 0 ) - { - return( ret ); + if ((ret = mbedtls_cipher_setkey(&ctx->cipher_ctx, key, keybits, + MBEDTLS_ENCRYPT)) != 0) { + return ret; } - if( ( ret = gcm_gen_table( ctx ) ) != 0 ) - return( ret ); + if ((ret = gcm_gen_table(ctx)) != 0) { + return ret; + } - return( 0 ); + return 0; } /* @@ -190,42 +187,56 @@ static const uint64_t last4[16] = * Sets output to x times H using the precomputed tables. * x and output are seen as elements of GF(2^128) as in [MGV]. */ -static void gcm_mult( mbedtls_gcm_context *ctx, const unsigned char x[16], - unsigned char output[16] ) +static void gcm_mult(mbedtls_gcm_context *ctx, const unsigned char x[16], + unsigned char output[16]) { int i = 0; unsigned char lo, hi, rem; uint64_t zh, zl; -#if defined(MBEDTLS_AESNI_C) && defined(MBEDTLS_HAVE_X86_64) - if( mbedtls_aesni_has_support( MBEDTLS_AESNI_CLMUL ) ) { +#if defined(MBEDTLS_AESNI_HAVE_CODE) + if (mbedtls_aesni_has_support(MBEDTLS_AESNI_CLMUL)) { unsigned char h[16]; - MBEDTLS_PUT_UINT32_BE( ctx->HH[8] >> 32, h, 0 ); - MBEDTLS_PUT_UINT32_BE( ctx->HH[8], h, 4 ); - MBEDTLS_PUT_UINT32_BE( ctx->HL[8] >> 32, h, 8 ); - MBEDTLS_PUT_UINT32_BE( ctx->HL[8], h, 12 ); + /* mbedtls_aesni_gcm_mult needs big-endian input */ + MBEDTLS_PUT_UINT32_BE(ctx->HH[8] >> 32, h, 0); + MBEDTLS_PUT_UINT32_BE(ctx->HH[8], h, 4); + MBEDTLS_PUT_UINT32_BE(ctx->HL[8] >> 32, h, 8); + MBEDTLS_PUT_UINT32_BE(ctx->HL[8], h, 12); - mbedtls_aesni_gcm_mult( output, x, h ); + mbedtls_aesni_gcm_mult(output, x, h); return; } -#endif /* MBEDTLS_AESNI_C && MBEDTLS_HAVE_X86_64 */ +#endif /* MBEDTLS_AESNI_HAVE_CODE */ + +#if defined(MBEDTLS_AESCE_C) && defined(MBEDTLS_HAVE_ARM64) + if (mbedtls_aesce_has_support()) { + unsigned char h[16]; + + /* mbedtls_aesce_gcm_mult needs big-endian input */ + MBEDTLS_PUT_UINT32_BE(ctx->HH[8] >> 32, h, 0); + MBEDTLS_PUT_UINT32_BE(ctx->HH[8], h, 4); + MBEDTLS_PUT_UINT32_BE(ctx->HL[8] >> 32, h, 8); + MBEDTLS_PUT_UINT32_BE(ctx->HL[8], h, 12); + + mbedtls_aesce_gcm_mult(output, x, h); + return; + } +#endif lo = x[15] & 0xf; zh = ctx->HH[lo]; zl = ctx->HL[lo]; - for( i = 15; i >= 0; i-- ) - { + for (i = 15; i >= 0; i--) { lo = x[i] & 0xf; - hi = ( x[i] >> 4 ) & 0xf; + hi = (x[i] >> 4) & 0xf; - if( i != 15 ) - { + if (i != 15) { rem = (unsigned char) zl & 0xf; - zl = ( zh << 60 ) | ( zl >> 4 ); - zh = ( zh >> 4 ); + zl = (zh << 60) | (zl >> 4); + zh = (zh >> 4); zh ^= (uint64_t) last4[rem] << 48; zh ^= ctx->HH[lo]; zl ^= ctx->HL[lo]; @@ -233,83 +244,73 @@ static void gcm_mult( mbedtls_gcm_context *ctx, const unsigned char x[16], } rem = (unsigned char) zl & 0xf; - zl = ( zh << 60 ) | ( zl >> 4 ); - zh = ( zh >> 4 ); + zl = (zh << 60) | (zl >> 4); + zh = (zh >> 4); zh ^= (uint64_t) last4[rem] << 48; zh ^= ctx->HH[hi]; zl ^= ctx->HL[hi]; } - MBEDTLS_PUT_UINT32_BE( zh >> 32, output, 0 ); - MBEDTLS_PUT_UINT32_BE( zh, output, 4 ); - MBEDTLS_PUT_UINT32_BE( zl >> 32, output, 8 ); - MBEDTLS_PUT_UINT32_BE( zl, output, 12 ); + MBEDTLS_PUT_UINT32_BE(zh >> 32, output, 0); + MBEDTLS_PUT_UINT32_BE(zh, output, 4); + MBEDTLS_PUT_UINT32_BE(zl >> 32, output, 8); + MBEDTLS_PUT_UINT32_BE(zl, output, 12); } -int mbedtls_gcm_starts( mbedtls_gcm_context *ctx, - int mode, - const unsigned char *iv, size_t iv_len ) +int mbedtls_gcm_starts(mbedtls_gcm_context *ctx, + int mode, + const unsigned char *iv, size_t iv_len) { int ret = MBEDTLS_ERR_ERROR_CORRUPTION_DETECTED; unsigned char work_buf[16]; - size_t i; const unsigned char *p; size_t use_len, olen = 0; uint64_t iv_bits; - GCM_VALIDATE_RET( ctx != NULL ); - GCM_VALIDATE_RET( iv != NULL ); - /* IV is limited to 2^64 bits, so 2^61 bytes */ /* IV is not allowed to be zero length */ - if( iv_len == 0 || (uint64_t) iv_len >> 61 != 0 ) - return( MBEDTLS_ERR_GCM_BAD_INPUT ); + if (iv_len == 0 || (uint64_t) iv_len >> 61 != 0) { + return MBEDTLS_ERR_GCM_BAD_INPUT; + } - memset( ctx->y, 0x00, sizeof(ctx->y) ); - memset( ctx->buf, 0x00, sizeof(ctx->buf) ); + memset(ctx->y, 0x00, sizeof(ctx->y)); + memset(ctx->buf, 0x00, sizeof(ctx->buf)); ctx->mode = mode; ctx->len = 0; ctx->add_len = 0; - if( iv_len == 12 ) - { - memcpy( ctx->y, iv, iv_len ); + if (iv_len == 12) { + memcpy(ctx->y, iv, iv_len); ctx->y[15] = 1; - } - else - { - memset( work_buf, 0x00, 16 ); - iv_bits = (uint64_t)iv_len * 8; - MBEDTLS_PUT_UINT64_BE( iv_bits, work_buf, 8 ); + } else { + memset(work_buf, 0x00, 16); + iv_bits = (uint64_t) iv_len * 8; + MBEDTLS_PUT_UINT64_BE(iv_bits, work_buf, 8); p = iv; - while( iv_len > 0 ) - { - use_len = ( iv_len < 16 ) ? iv_len : 16; + while (iv_len > 0) { + use_len = (iv_len < 16) ? iv_len : 16; - for( i = 0; i < use_len; i++ ) - ctx->y[i] ^= p[i]; + mbedtls_xor(ctx->y, ctx->y, p, use_len); - gcm_mult( ctx, ctx->y, ctx->y ); + gcm_mult(ctx, ctx->y, ctx->y); iv_len -= use_len; p += use_len; } - for( i = 0; i < 16; i++ ) - ctx->y[i] ^= work_buf[i]; + mbedtls_xor(ctx->y, ctx->y, work_buf, 16); - gcm_mult( ctx, ctx->y, ctx->y ); + gcm_mult(ctx, ctx->y, ctx->y); } - if( ( ret = mbedtls_cipher_update( &ctx->cipher_ctx, ctx->y, 16, - ctx->base_ectr, &olen ) ) != 0 ) - { - return( ret ); + if ((ret = mbedtls_cipher_update(&ctx->cipher_ctx, ctx->y, 16, + ctx->base_ectr, &olen)) != 0) { + return ret; } - return( 0 ); + return 0; } /** @@ -329,32 +330,31 @@ int mbedtls_gcm_starts( mbedtls_gcm_context *ctx, * * len > 0 && len % 16 == 0: the authentication tag is correct if * the data ends now. */ -int mbedtls_gcm_update_ad( mbedtls_gcm_context *ctx, - const unsigned char *add, size_t add_len ) +int mbedtls_gcm_update_ad(mbedtls_gcm_context *ctx, + const unsigned char *add, size_t add_len) { const unsigned char *p; - size_t use_len, i, offset; - - GCM_VALIDATE_RET( add_len == 0 || add != NULL ); + size_t use_len, offset; /* IV is limited to 2^64 bits, so 2^61 bytes */ - if( (uint64_t) add_len >> 61 != 0 ) - return( MBEDTLS_ERR_GCM_BAD_INPUT ); + if ((uint64_t) add_len >> 61 != 0) { + return MBEDTLS_ERR_GCM_BAD_INPUT; + } offset = ctx->add_len % 16; p = add; - if( offset != 0 ) - { + if (offset != 0) { use_len = 16 - offset; - if( use_len > add_len ) + if (use_len > add_len) { use_len = add_len; + } - for( i = 0; i < use_len; i++ ) - ctx->buf[i+offset] ^= p[i]; + mbedtls_xor(ctx->buf + offset, ctx->buf + offset, p, use_len); - if( offset + use_len == 16 ) - gcm_mult( ctx, ctx->buf, ctx->buf ); + if (offset + use_len == 16) { + gcm_mult(ctx, ctx->buf, ctx->buf); + } ctx->add_len += use_len; add_len -= use_len; @@ -363,120 +363,114 @@ int mbedtls_gcm_update_ad( mbedtls_gcm_context *ctx, ctx->add_len += add_len; - while( add_len >= 16 ) - { - for( i = 0; i < 16; i++ ) - ctx->buf[i] ^= p[i]; + while (add_len >= 16) { + mbedtls_xor(ctx->buf, ctx->buf, p, 16); - gcm_mult( ctx, ctx->buf, ctx->buf ); + gcm_mult(ctx, ctx->buf, ctx->buf); add_len -= 16; p += 16; } - if( add_len > 0 ) - { - for( i = 0; i < add_len; i++ ) - ctx->buf[i] ^= p[i]; + if (add_len > 0) { + mbedtls_xor(ctx->buf, ctx->buf, p, add_len); } - return( 0 ); + return 0; } /* Increment the counter. */ -static void gcm_incr( unsigned char y[16] ) +static void gcm_incr(unsigned char y[16]) { size_t i; - for( i = 16; i > 12; i-- ) - if( ++y[i - 1] != 0 ) + for (i = 16; i > 12; i--) { + if (++y[i - 1] != 0) { break; + } + } } /* Calculate and apply the encryption mask. Process use_len bytes of data, * starting at position offset in the mask block. */ -static int gcm_mask( mbedtls_gcm_context *ctx, - unsigned char ectr[16], - size_t offset, size_t use_len, - const unsigned char *input, - unsigned char *output ) +static int gcm_mask(mbedtls_gcm_context *ctx, + unsigned char ectr[16], + size_t offset, size_t use_len, + const unsigned char *input, + unsigned char *output) { - size_t i; size_t olen = 0; int ret = MBEDTLS_ERR_ERROR_CORRUPTION_DETECTED; - if( ( ret = mbedtls_cipher_update( &ctx->cipher_ctx, ctx->y, 16, ectr, - &olen ) ) != 0 ) - { - mbedtls_platform_zeroize( ectr, 16 ); - return( ret ); + if ((ret = mbedtls_cipher_update(&ctx->cipher_ctx, ctx->y, 16, ectr, + &olen)) != 0) { + mbedtls_platform_zeroize(ectr, 16); + return ret; } - for( i = 0; i < use_len; i++ ) - { - if( ctx->mode == MBEDTLS_GCM_DECRYPT ) - ctx->buf[offset + i] ^= input[i]; - output[i] = ectr[offset + i] ^ input[i]; - if( ctx->mode == MBEDTLS_GCM_ENCRYPT ) - ctx->buf[offset + i] ^= output[i]; + if (ctx->mode == MBEDTLS_GCM_DECRYPT) { + mbedtls_xor(ctx->buf + offset, ctx->buf + offset, input, use_len); + } + mbedtls_xor(output, ectr + offset, input, use_len); + if (ctx->mode == MBEDTLS_GCM_ENCRYPT) { + mbedtls_xor(ctx->buf + offset, ctx->buf + offset, output, use_len); } - return( 0 ); + + return 0; } -int mbedtls_gcm_update( mbedtls_gcm_context *ctx, - const unsigned char *input, size_t input_length, - unsigned char *output, size_t output_size, - size_t *output_length ) +int mbedtls_gcm_update(mbedtls_gcm_context *ctx, + const unsigned char *input, size_t input_length, + unsigned char *output, size_t output_size, + size_t *output_length) { int ret = MBEDTLS_ERR_ERROR_CORRUPTION_DETECTED; const unsigned char *p = input; unsigned char *out_p = output; size_t offset; - unsigned char ectr[16] = {0}; + unsigned char ectr[16] = { 0 }; - if( output_size < input_length ) - return( MBEDTLS_ERR_GCM_BUFFER_TOO_SMALL ); - GCM_VALIDATE_RET( output_length != NULL ); + if (output_size < input_length) { + return MBEDTLS_ERR_GCM_BUFFER_TOO_SMALL; + } *output_length = input_length; /* Exit early if input_length==0 so that we don't do any pointer arithmetic * on a potentially null pointer. * Returning early also means that the last partial block of AD remains * untouched for mbedtls_gcm_finish */ - if( input_length == 0 ) - return( 0 ); - - GCM_VALIDATE_RET( ctx != NULL ); - GCM_VALIDATE_RET( input != NULL ); - GCM_VALIDATE_RET( output != NULL ); + if (input_length == 0) { + return 0; + } - if( output > input && (size_t) ( output - input ) < input_length ) - return( MBEDTLS_ERR_GCM_BAD_INPUT ); + if (output > input && (size_t) (output - input) < input_length) { + return MBEDTLS_ERR_GCM_BAD_INPUT; + } /* Total length is restricted to 2^39 - 256 bits, ie 2^36 - 2^5 bytes * Also check for possible overflow */ - if( ctx->len + input_length < ctx->len || - (uint64_t) ctx->len + input_length > 0xFFFFFFFE0ull ) - { - return( MBEDTLS_ERR_GCM_BAD_INPUT ); + if (ctx->len + input_length < ctx->len || + (uint64_t) ctx->len + input_length > 0xFFFFFFFE0ull) { + return MBEDTLS_ERR_GCM_BAD_INPUT; } - if( ctx->len == 0 && ctx->add_len % 16 != 0 ) - { - gcm_mult( ctx, ctx->buf, ctx->buf ); + if (ctx->len == 0 && ctx->add_len % 16 != 0) { + gcm_mult(ctx, ctx->buf, ctx->buf); } offset = ctx->len % 16; - if( offset != 0 ) - { + if (offset != 0) { size_t use_len = 16 - offset; - if( use_len > input_length ) + if (use_len > input_length) { use_len = input_length; + } - if( ( ret = gcm_mask( ctx, ectr, offset, use_len, p, out_p ) ) != 0 ) - return( ret ); + if ((ret = gcm_mask(ctx, ectr, offset, use_len, p, out_p)) != 0) { + return ret; + } - if( offset + use_len == 16 ) - gcm_mult( ctx, ctx->buf, ctx->buf ); + if (offset + use_len == 16) { + gcm_mult(ctx, ctx->buf, ctx->buf); + } ctx->len += use_len; input_length -= use_len; @@ -486,43 +480,39 @@ int mbedtls_gcm_update( mbedtls_gcm_context *ctx, ctx->len += input_length; - while( input_length >= 16 ) - { - gcm_incr( ctx->y ); - if( ( ret = gcm_mask( ctx, ectr, 0, 16, p, out_p ) ) != 0 ) - return( ret ); + while (input_length >= 16) { + gcm_incr(ctx->y); + if ((ret = gcm_mask(ctx, ectr, 0, 16, p, out_p)) != 0) { + return ret; + } - gcm_mult( ctx, ctx->buf, ctx->buf ); + gcm_mult(ctx, ctx->buf, ctx->buf); input_length -= 16; p += 16; out_p += 16; } - if( input_length > 0 ) - { - gcm_incr( ctx->y ); - if( ( ret = gcm_mask( ctx, ectr, 0, input_length, p, out_p ) ) != 0 ) - return( ret ); + if (input_length > 0) { + gcm_incr(ctx->y); + if ((ret = gcm_mask(ctx, ectr, 0, input_length, p, out_p)) != 0) { + return ret; + } } - mbedtls_platform_zeroize( ectr, sizeof( ectr ) ); - return( 0 ); + mbedtls_platform_zeroize(ectr, sizeof(ectr)); + return 0; } -int mbedtls_gcm_finish( mbedtls_gcm_context *ctx, - unsigned char *output, size_t output_size, - size_t *output_length, - unsigned char *tag, size_t tag_len ) +int mbedtls_gcm_finish(mbedtls_gcm_context *ctx, + unsigned char *output, size_t output_size, + size_t *output_length, + unsigned char *tag, size_t tag_len) { unsigned char work_buf[16]; - size_t i; uint64_t orig_len; uint64_t orig_add_len; - GCM_VALIDATE_RET( ctx != NULL ); - GCM_VALIDATE_RET( tag != NULL ); - /* We never pass any output in finish(). The output parameter exists only * for the sake of alternative implementations. */ (void) output; @@ -532,69 +522,60 @@ int mbedtls_gcm_finish( mbedtls_gcm_context *ctx, orig_len = ctx->len * 8; orig_add_len = ctx->add_len * 8; - if( ctx->len == 0 && ctx->add_len % 16 != 0 ) - { - gcm_mult( ctx, ctx->buf, ctx->buf ); + if (ctx->len == 0 && ctx->add_len % 16 != 0) { + gcm_mult(ctx, ctx->buf, ctx->buf); } - if( tag_len > 16 || tag_len < 4 ) - return( MBEDTLS_ERR_GCM_BAD_INPUT ); + if (tag_len > 16 || tag_len < 4) { + return MBEDTLS_ERR_GCM_BAD_INPUT; + } - if( ctx->len % 16 != 0 ) - gcm_mult( ctx, ctx->buf, ctx->buf ); + if (ctx->len % 16 != 0) { + gcm_mult(ctx, ctx->buf, ctx->buf); + } - memcpy( tag, ctx->base_ectr, tag_len ); + memcpy(tag, ctx->base_ectr, tag_len); - if( orig_len || orig_add_len ) - { - memset( work_buf, 0x00, 16 ); + if (orig_len || orig_add_len) { + memset(work_buf, 0x00, 16); - MBEDTLS_PUT_UINT32_BE( ( orig_add_len >> 32 ), work_buf, 0 ); - MBEDTLS_PUT_UINT32_BE( ( orig_add_len ), work_buf, 4 ); - MBEDTLS_PUT_UINT32_BE( ( orig_len >> 32 ), work_buf, 8 ); - MBEDTLS_PUT_UINT32_BE( ( orig_len ), work_buf, 12 ); + MBEDTLS_PUT_UINT32_BE((orig_add_len >> 32), work_buf, 0); + MBEDTLS_PUT_UINT32_BE((orig_add_len), work_buf, 4); + MBEDTLS_PUT_UINT32_BE((orig_len >> 32), work_buf, 8); + MBEDTLS_PUT_UINT32_BE((orig_len), work_buf, 12); - for( i = 0; i < 16; i++ ) - ctx->buf[i] ^= work_buf[i]; + mbedtls_xor(ctx->buf, ctx->buf, work_buf, 16); - gcm_mult( ctx, ctx->buf, ctx->buf ); + gcm_mult(ctx, ctx->buf, ctx->buf); - for( i = 0; i < tag_len; i++ ) - tag[i] ^= ctx->buf[i]; + mbedtls_xor(tag, tag, ctx->buf, tag_len); } - return( 0 ); + return 0; } -int mbedtls_gcm_crypt_and_tag( mbedtls_gcm_context *ctx, - int mode, - size_t length, - const unsigned char *iv, - size_t iv_len, - const unsigned char *add, - size_t add_len, - const unsigned char *input, - unsigned char *output, - size_t tag_len, - unsigned char *tag ) +int mbedtls_gcm_crypt_and_tag(mbedtls_gcm_context *ctx, + int mode, + size_t length, + const unsigned char *iv, + size_t iv_len, + const unsigned char *add, + size_t add_len, + const unsigned char *input, + unsigned char *output, + size_t tag_len, + unsigned char *tag) { int ret = MBEDTLS_ERR_ERROR_CORRUPTION_DETECTED; - GCM_VALIDATE_RET( ctx != NULL ); - GCM_VALIDATE_RET( iv != NULL ); - GCM_VALIDATE_RET( add_len == 0 || add != NULL ); - GCM_VALIDATE_RET( length == 0 || input != NULL ); - GCM_VALIDATE_RET( length == 0 || output != NULL ); - GCM_VALIDATE_RET( tag != NULL ); - ret = sce_gcm_crypt_and_tag(ctx, mode, length, iv, iv_len, add, add_len, input, output, tag_len, tag); - return( ret ); + return ret; } -int mbedtls_gcm_auth_decrypt( mbedtls_gcm_context *ctx, +int mbedtls_gcm_auth_decrypt(mbedtls_gcm_context *ctx, size_t length, const unsigned char *iv, size_t iv_len, @@ -603,29 +584,23 @@ int mbedtls_gcm_auth_decrypt( mbedtls_gcm_context *ctx, const unsigned char *tag, size_t tag_len, const unsigned char *input, - unsigned char *output ) + unsigned char *output) { size_t i; int diff; - GCM_VALIDATE_RET( ctx != NULL ); - GCM_VALIDATE_RET( iv != NULL ); - GCM_VALIDATE_RET( add_len == 0 || add != NULL ); - GCM_VALIDATE_RET( tag != NULL ); - GCM_VALIDATE_RET( length == 0 || input != NULL ); - GCM_VALIDATE_RET( length == 0 || output != NULL ); - - return ( mbedtls_gcm_crypt_and_tag( ctx, MBEDTLS_GCM_DECRYPT, length, + return ( mbedtls_gcm_crypt_and_tag(ctx, MBEDTLS_GCM_DECRYPT, length, iv, iv_len, add, add_len, input, output, tag_len, (unsigned char *)tag ) ); } -void mbedtls_gcm_free( mbedtls_gcm_context *ctx ) +void mbedtls_gcm_free(mbedtls_gcm_context *ctx) { - if( ctx == NULL ) + if (ctx == NULL) { return; - mbedtls_cipher_free( &ctx->cipher_ctx ); - mbedtls_platform_zeroize( ctx, sizeof( mbedtls_gcm_context ) ); + } + mbedtls_cipher_free(&ctx->cipher_ctx); + mbedtls_platform_zeroize(ctx, sizeof(mbedtls_gcm_context)); } @@ -858,7 +833,7 @@ static const unsigned char tag_test_data[MAX_TESTS * 3][16] = 0xc8, 0xb5, 0xd4, 0xcf, 0x5a, 0xe9, 0xf1, 0x9a }, }; -int mbedtls_gcm_self_test( int verbose ) +int mbedtls_gcm_self_test(int verbose) { mbedtls_gcm_context ctx; unsigned char buf[64]; @@ -867,267 +842,296 @@ int mbedtls_gcm_self_test( int verbose ) mbedtls_cipher_id_t cipher = MBEDTLS_CIPHER_ID_AES; size_t olen; - for( j = 0; j < 3; j++ ) - { + if (verbose != 0) { +#if defined(MBEDTLS_GCM_ALT) + mbedtls_printf(" GCM note: alternative implementation.\n"); +#else /* MBEDTLS_GCM_ALT */ +#if defined(MBEDTLS_AESNI_HAVE_CODE) + if (mbedtls_aesni_has_support(MBEDTLS_AESNI_CLMUL)) { + mbedtls_printf(" GCM note: using AESNI.\n"); + } else +#endif + mbedtls_printf(" GCM note: built-in implementation.\n"); +#endif /* MBEDTLS_GCM_ALT */ + } + + for (j = 0; j < 3; j++) { int key_len = 128 + 64 * j; - for( i = 0; i < MAX_TESTS; i++ ) - { - mbedtls_gcm_init( &ctx ); + for (i = 0; i < MAX_TESTS; i++) { + mbedtls_gcm_init(&ctx); - if( verbose != 0 ) - mbedtls_printf( " AES-GCM-%3d #%d (%s): ", - key_len, i, "enc" ); + if (verbose != 0) { + mbedtls_printf(" AES-GCM-%3d #%d (%s): ", + key_len, i, "enc"); + } - ret = mbedtls_gcm_setkey( &ctx, cipher, - key_test_data[key_index_test_data[i]], - key_len ); + ret = mbedtls_gcm_setkey(&ctx, cipher, + key_test_data[key_index_test_data[i]], + key_len); /* * AES-192 is an optional feature that may be unavailable when * there is an alternative underlying implementation i.e. when * MBEDTLS_AES_ALT is defined. */ - if( ret == MBEDTLS_ERR_PLATFORM_FEATURE_UNSUPPORTED && key_len == 192 ) - { - mbedtls_printf( "skipped\n" ); + if (ret == MBEDTLS_ERR_PLATFORM_FEATURE_UNSUPPORTED && key_len == 192) { + mbedtls_printf("skipped\n"); break; - } - else if( ret != 0 ) - { + } else if (ret != 0) { goto exit; } - ret = mbedtls_gcm_crypt_and_tag( &ctx, MBEDTLS_GCM_ENCRYPT, - pt_len_test_data[i], - iv_test_data[iv_index_test_data[i]], - iv_len_test_data[i], - additional_test_data[add_index_test_data[i]], - add_len_test_data[i], - pt_test_data[pt_index_test_data[i]], - buf, 16, tag_buf ); + ret = mbedtls_gcm_crypt_and_tag(&ctx, MBEDTLS_GCM_ENCRYPT, + pt_len_test_data[i], + iv_test_data[iv_index_test_data[i]], + iv_len_test_data[i], + additional_test_data[add_index_test_data[i]], + add_len_test_data[i], + pt_test_data[pt_index_test_data[i]], + buf, 16, tag_buf); #if defined(MBEDTLS_GCM_ALT) /* Allow alternative implementations to only support 12-byte nonces. */ - if( ret == MBEDTLS_ERR_PLATFORM_FEATURE_UNSUPPORTED && - iv_len_test_data[i] != 12 ) - { - mbedtls_printf( "skipped\n" ); + if (ret == MBEDTLS_ERR_PLATFORM_FEATURE_UNSUPPORTED && + iv_len_test_data[i] != 12) { + mbedtls_printf("skipped\n"); break; } #endif /* defined(MBEDTLS_GCM_ALT) */ - if( ret != 0 ) + if (ret != 0) { goto exit; + } - if ( memcmp( buf, ct_test_data[j * 6 + i], - pt_len_test_data[i] ) != 0 || - memcmp( tag_buf, tag_test_data[j * 6 + i], 16 ) != 0 ) - { + if (memcmp(buf, ct_test_data[j * 6 + i], + pt_len_test_data[i]) != 0 || + memcmp(tag_buf, tag_test_data[j * 6 + i], 16) != 0) { ret = 1; goto exit; } - mbedtls_gcm_free( &ctx ); + mbedtls_gcm_free(&ctx); - if( verbose != 0 ) - mbedtls_printf( "passed\n" ); + if (verbose != 0) { + mbedtls_printf("passed\n"); + } - mbedtls_gcm_init( &ctx ); + mbedtls_gcm_init(&ctx); - if( verbose != 0 ) - mbedtls_printf( " AES-GCM-%3d #%d (%s): ", - key_len, i, "dec" ); + if (verbose != 0) { + mbedtls_printf(" AES-GCM-%3d #%d (%s): ", + key_len, i, "dec"); + } - ret = mbedtls_gcm_setkey( &ctx, cipher, - key_test_data[key_index_test_data[i]], - key_len ); - if( ret != 0 ) + ret = mbedtls_gcm_setkey(&ctx, cipher, + key_test_data[key_index_test_data[i]], + key_len); + if (ret != 0) { goto exit; + } - ret = mbedtls_gcm_crypt_and_tag( &ctx, MBEDTLS_GCM_DECRYPT, - pt_len_test_data[i], - iv_test_data[iv_index_test_data[i]], - iv_len_test_data[i], - additional_test_data[add_index_test_data[i]], - add_len_test_data[i], - ct_test_data[j * 6 + i], buf, 16, tag_buf ); + ret = mbedtls_gcm_crypt_and_tag(&ctx, MBEDTLS_GCM_DECRYPT, + pt_len_test_data[i], + iv_test_data[iv_index_test_data[i]], + iv_len_test_data[i], + additional_test_data[add_index_test_data[i]], + add_len_test_data[i], + ct_test_data[j * 6 + i], buf, 16, tag_buf); - if( ret != 0 ) + if (ret != 0) { goto exit; + } - if( memcmp( buf, pt_test_data[pt_index_test_data[i]], - pt_len_test_data[i] ) != 0 || - memcmp( tag_buf, tag_test_data[j * 6 + i], 16 ) != 0 ) - { + if (memcmp(buf, pt_test_data[pt_index_test_data[i]], + pt_len_test_data[i]) != 0 || + memcmp(tag_buf, tag_test_data[j * 6 + i], 16) != 0) { ret = 1; goto exit; } - mbedtls_gcm_free( &ctx ); + mbedtls_gcm_free(&ctx); - if( verbose != 0 ) - mbedtls_printf( "passed\n" ); + if (verbose != 0) { + mbedtls_printf("passed\n"); + } - mbedtls_gcm_init( &ctx ); + mbedtls_gcm_init(&ctx); - if( verbose != 0 ) - mbedtls_printf( " AES-GCM-%3d #%d split (%s): ", - key_len, i, "enc" ); + if (verbose != 0) { + mbedtls_printf(" AES-GCM-%3d #%d split (%s): ", + key_len, i, "enc"); + } - ret = mbedtls_gcm_setkey( &ctx, cipher, - key_test_data[key_index_test_data[i]], - key_len ); - if( ret != 0 ) + ret = mbedtls_gcm_setkey(&ctx, cipher, + key_test_data[key_index_test_data[i]], + key_len); + if (ret != 0) { goto exit; + } - ret = mbedtls_gcm_starts( &ctx, MBEDTLS_GCM_ENCRYPT, - iv_test_data[iv_index_test_data[i]], - iv_len_test_data[i] ); - if( ret != 0 ) + ret = mbedtls_gcm_starts(&ctx, MBEDTLS_GCM_ENCRYPT, + iv_test_data[iv_index_test_data[i]], + iv_len_test_data[i]); + if (ret != 0) { goto exit; + } - ret = mbedtls_gcm_update_ad( &ctx, - additional_test_data[add_index_test_data[i]], - add_len_test_data[i] ); - if( ret != 0 ) + ret = mbedtls_gcm_update_ad(&ctx, + additional_test_data[add_index_test_data[i]], + add_len_test_data[i]); + if (ret != 0) { goto exit; + } - if( pt_len_test_data[i] > 32 ) - { + if (pt_len_test_data[i] > 32) { size_t rest_len = pt_len_test_data[i] - 32; - ret = mbedtls_gcm_update( &ctx, - pt_test_data[pt_index_test_data[i]], - 32, - buf, sizeof( buf ), &olen ); - if( ret != 0 ) + ret = mbedtls_gcm_update(&ctx, + pt_test_data[pt_index_test_data[i]], + 32, + buf, sizeof(buf), &olen); + if (ret != 0) { goto exit; - if( olen != 32 ) + } + if (olen != 32) { goto exit; + } - ret = mbedtls_gcm_update( &ctx, - pt_test_data[pt_index_test_data[i]] + 32, - rest_len, - buf + 32, sizeof( buf ) - 32, &olen ); - if( ret != 0 ) + ret = mbedtls_gcm_update(&ctx, + pt_test_data[pt_index_test_data[i]] + 32, + rest_len, + buf + 32, sizeof(buf) - 32, &olen); + if (ret != 0) { goto exit; - if( olen != rest_len ) + } + if (olen != rest_len) { goto exit; - } - else - { - ret = mbedtls_gcm_update( &ctx, - pt_test_data[pt_index_test_data[i]], - pt_len_test_data[i], - buf, sizeof( buf ), &olen ); - if( ret != 0 ) + } + } else { + ret = mbedtls_gcm_update(&ctx, + pt_test_data[pt_index_test_data[i]], + pt_len_test_data[i], + buf, sizeof(buf), &olen); + if (ret != 0) { goto exit; - if( olen != pt_len_test_data[i] ) + } + if (olen != pt_len_test_data[i]) { goto exit; + } } - ret = mbedtls_gcm_finish( &ctx, NULL, 0, &olen, tag_buf, 16 ); - if( ret != 0 ) + ret = mbedtls_gcm_finish(&ctx, NULL, 0, &olen, tag_buf, 16); + if (ret != 0) { goto exit; + } - if( memcmp( buf, ct_test_data[j * 6 + i], - pt_len_test_data[i] ) != 0 || - memcmp( tag_buf, tag_test_data[j * 6 + i], 16 ) != 0 ) - { + if (memcmp(buf, ct_test_data[j * 6 + i], + pt_len_test_data[i]) != 0 || + memcmp(tag_buf, tag_test_data[j * 6 + i], 16) != 0) { ret = 1; goto exit; } - mbedtls_gcm_free( &ctx ); + mbedtls_gcm_free(&ctx); - if( verbose != 0 ) - mbedtls_printf( "passed\n" ); + if (verbose != 0) { + mbedtls_printf("passed\n"); + } - mbedtls_gcm_init( &ctx ); + mbedtls_gcm_init(&ctx); - if( verbose != 0 ) - mbedtls_printf( " AES-GCM-%3d #%d split (%s): ", - key_len, i, "dec" ); + if (verbose != 0) { + mbedtls_printf(" AES-GCM-%3d #%d split (%s): ", + key_len, i, "dec"); + } - ret = mbedtls_gcm_setkey( &ctx, cipher, - key_test_data[key_index_test_data[i]], - key_len ); - if( ret != 0 ) + ret = mbedtls_gcm_setkey(&ctx, cipher, + key_test_data[key_index_test_data[i]], + key_len); + if (ret != 0) { goto exit; + } - ret = mbedtls_gcm_starts( &ctx, MBEDTLS_GCM_DECRYPT, - iv_test_data[iv_index_test_data[i]], - iv_len_test_data[i] ); - if( ret != 0 ) + ret = mbedtls_gcm_starts(&ctx, MBEDTLS_GCM_DECRYPT, + iv_test_data[iv_index_test_data[i]], + iv_len_test_data[i]); + if (ret != 0) { goto exit; - ret = mbedtls_gcm_update_ad( &ctx, - additional_test_data[add_index_test_data[i]], - add_len_test_data[i] ); - if( ret != 0 ) + } + ret = mbedtls_gcm_update_ad(&ctx, + additional_test_data[add_index_test_data[i]], + add_len_test_data[i]); + if (ret != 0) { goto exit; + } - if( pt_len_test_data[i] > 32 ) - { + if (pt_len_test_data[i] > 32) { size_t rest_len = pt_len_test_data[i] - 32; - ret = mbedtls_gcm_update( &ctx, - ct_test_data[j * 6 + i], 32, - buf, sizeof( buf ), &olen ); - if( ret != 0 ) + ret = mbedtls_gcm_update(&ctx, + ct_test_data[j * 6 + i], 32, + buf, sizeof(buf), &olen); + if (ret != 0) { goto exit; - if( olen != 32 ) + } + if (olen != 32) { goto exit; + } - ret = mbedtls_gcm_update( &ctx, - ct_test_data[j * 6 + i] + 32, - rest_len, - buf + 32, sizeof( buf ) - 32, &olen ); - if( ret != 0 ) + ret = mbedtls_gcm_update(&ctx, + ct_test_data[j * 6 + i] + 32, + rest_len, + buf + 32, sizeof(buf) - 32, &olen); + if (ret != 0) { goto exit; - if( olen != rest_len ) + } + if (olen != rest_len) { goto exit; - } - else - { - ret = mbedtls_gcm_update( &ctx, - ct_test_data[j * 6 + i], - pt_len_test_data[i], - buf, sizeof( buf ), &olen ); - if( ret != 0 ) + } + } else { + ret = mbedtls_gcm_update(&ctx, + ct_test_data[j * 6 + i], + pt_len_test_data[i], + buf, sizeof(buf), &olen); + if (ret != 0) { goto exit; - if( olen != pt_len_test_data[i] ) + } + if (olen != pt_len_test_data[i]) { goto exit; + } } - ret = mbedtls_gcm_finish( &ctx, NULL, 0, &olen, tag_buf, 16 ); - if( ret != 0 ) + ret = mbedtls_gcm_finish(&ctx, NULL, 0, &olen, tag_buf, 16); + if (ret != 0) { goto exit; + } - if( memcmp( buf, pt_test_data[pt_index_test_data[i]], - pt_len_test_data[i] ) != 0 || - memcmp( tag_buf, tag_test_data[j * 6 + i], 16 ) != 0 ) - { + if (memcmp(buf, pt_test_data[pt_index_test_data[i]], + pt_len_test_data[i]) != 0 || + memcmp(tag_buf, tag_test_data[j * 6 + i], 16) != 0) { ret = 1; goto exit; } - mbedtls_gcm_free( &ctx ); + mbedtls_gcm_free(&ctx); - if( verbose != 0 ) - mbedtls_printf( "passed\n" ); + if (verbose != 0) { + mbedtls_printf("passed\n"); + } } } - if( verbose != 0 ) - mbedtls_printf( "\n" ); + if (verbose != 0) { + mbedtls_printf("\n"); + } ret = 0; exit: - if( ret != 0 ) - { - if( verbose != 0 ) - mbedtls_printf( "failed\n" ); - mbedtls_gcm_free( &ctx ); + if (ret != 0) { + if (verbose != 0) { + mbedtls_printf("failed\n"); + } + mbedtls_gcm_free(&ctx); } - return( ret ); + return ret; } #endif /* MBEDTLS_SELF_TEST && MBEDTLS_AES_C */ diff --git a/ra/fsp/src/rm_psa_crypto/inc/ccm_alt.h b/ra/fsp/src/rm_psa_crypto/inc/ccm_alt.h new file mode 100644 index 000000000..828ac3fc1 --- /dev/null +++ b/ra/fsp/src/rm_psa_crypto/inc/ccm_alt.h @@ -0,0 +1,108 @@ +/** + * \file ccm_alt.h + * + * \brief This file provides an API for the CCM ALT authenticated encryption + * mode for block ciphers. + * + * CCM combines Counter mode encryption with CBC-MAC authentication + * for 128-bit block ciphers. + * + * Input to CCM includes the following elements: + * <ul><li>Payload - data that is both authenticated and encrypted.</li> + * <li>Associated data (Adata) - data that is authenticated but not + * encrypted, For example, a header.</li> + * <li>Nonce - A unique value that is assigned to the payload and the + * associated data.</li></ul> + * + * Definition of CCM: + * http://csrc.nist.gov/publications/nistpubs/800-38C/SP800-38C_updated-July20_2007.pdf + * RFC 3610 "Counter with CBC-MAC (CCM)" + * + * Related: + * RFC 5116 "An Interface and Algorithms for Authenticated Encryption" + * + * Definition of CCM*: + * IEEE 802.15.4 - IEEE Standard for Local and metropolitan area networks + * Integer representation is fixed most-significant-octet-first order and + * the representation of octets is most-significant-bit-first order. This is + * consistent with RFC 3610. + */ +/* + * Copyright The Mbed TLS Contributors + * SPDX-License-Identifier: Apache-2.0 + * + * Licensed under the Apache License, Version 2.0 (the "License"); you may + * not use this file except in compliance with the License. + * You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT + * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. + */ + +#ifndef MBEDTLS_CCM_ALT_H +#define MBEDTLS_CCM_ALT_H +#include "mbedtls/private_access.h" + +#include "mbedtls/build_info.h" + +#include "mbedtls/cipher.h" + +#ifdef __cplusplus +extern "C" { +#endif + +/** + * \brief The CCM context-type definition. The CCM context is passed + * to the APIs called. + */ +typedef struct mbedtls_ccm_context +{ + unsigned char MBEDTLS_PRIVATE(y)[16]; /*!< The Y working buffer */ + unsigned char MBEDTLS_PRIVATE(ctr)[16]; /*!< The counter buffer */ + mbedtls_cipher_context_t MBEDTLS_PRIVATE(cipher_ctx); /*!< The cipher context used. */ + size_t MBEDTLS_PRIVATE(plaintext_len); /*!< Total plaintext length */ + size_t MBEDTLS_PRIVATE(add_len); /*!< Total authentication data length */ + size_t MBEDTLS_PRIVATE(tag_len); /*!< Total tag length */ + size_t MBEDTLS_PRIVATE(processed); /*!< Track how many bytes of input data + were processed (chunked input). + Used independently for both auth data + and plaintext/ciphertext. + This variable is set to zero after + auth data input is finished. */ + unsigned char MBEDTLS_PRIVATE(q); /*!< The Q working value */ + unsigned char MBEDTLS_PRIVATE(mode); /*!< The operation to perform: + * MBEDTLS_CCM_ENCRYPT or + * MBEDTLS_CCM_DECRYPT or + * MBEDTLS_CCM_STAR_ENCRYPT or + * MBEDTLS_CCM_STAR_DECRYPT. */ + int MBEDTLS_PRIVATE(state); /*!< Working value holding context's + state. Used for chunked data + input */ +} +mbedtls_ccm_context; + + #define RM_PSA_CRYPTO_AES_LOOKUP_INDEX(bits) (((bits) >> 6) - 2U) + +int sce_ccm_crypt_and_tag(mbedtls_ccm_context * ctx, + int mode, + size_t length, + const unsigned char * iv, + size_t iv_len, + const unsigned char * aad, + size_t aad_len, + const unsigned char * input, + unsigned char * output, + size_t tag_len, + unsigned char * tag); + + +#ifdef __cplusplus +} +#endif + +#endif /* MBEDTLS_CCM_ALT_H */ diff --git a/ra/fsp/src/rm_psa_crypto/rsa_alt.c b/ra/fsp/src/rm_psa_crypto/rsa_alt.c index 85d344522..e5c029e63 100644 --- a/ra/fsp/src/rm_psa_crypto/rsa_alt.c +++ b/ra/fsp/src/rm_psa_crypto/rsa_alt.c @@ -49,87 +49,89 @@ #include "mbedtls/error.h" #include "constant_time_internal.h" #include "mbedtls/constant_time.h" +#include "hash_info.h" - #include <string.h> +#include <string.h> #if defined(MBEDTLS_PKCS1_V15) && !defined(__OpenBSD__) && !defined(__NetBSD__) - #include <stdlib.h> - #endif - - #if defined(MBEDTLS_PLATFORM_C) - #include "mbedtls/platform.h" - #else - #include <stdio.h> -#define mbedtls_printf printf -#define mbedtls_calloc calloc -#define mbedtls_free free - #endif +#include <stdlib.h> +#endif - #if defined(MBEDTLS_RSA_ALT) +/* We use MD first if it's available (for compatibility reasons) + * and "fall back" to PSA otherwise (which needs psa_crypto_init()). */ +#if defined(MBEDTLS_PKCS1_V21) +#if !defined(MBEDTLS_MD_C) +#include "psa/crypto.h" +#include "mbedtls/psa_util.h" +#define PSA_TO_MBEDTLS_ERR(status) PSA_TO_MBEDTLS_ERR_LIST(status, \ + psa_to_md_errors, \ + psa_generic_status_to_mbedtls) +#endif /* !MBEDTLS_MD_C */ +#endif /* MBEDTLS_PKCS1_V21 */ + +#include "mbedtls/platform.h" -/* Parameter validation macros */ -#define RSA_VALIDATE_RET( cond ) \ - MBEDTLS_INTERNAL_VALIDATE_RET( cond, MBEDTLS_ERR_RSA_BAD_INPUT_DATA ) -#define RSA_VALIDATE( cond ) \ - MBEDTLS_INTERNAL_VALIDATE( cond ) + #if defined(MBEDTLS_RSA_ALT) -int mbedtls_rsa_import( mbedtls_rsa_context *ctx, - const mbedtls_mpi *N, - const mbedtls_mpi *P, const mbedtls_mpi *Q, - const mbedtls_mpi *D, const mbedtls_mpi *E ) +int mbedtls_rsa_import(mbedtls_rsa_context *ctx, + const mbedtls_mpi *N, + const mbedtls_mpi *P, const mbedtls_mpi *Q, + const mbedtls_mpi *D, const mbedtls_mpi *E) { int ret = MBEDTLS_ERR_ERROR_CORRUPTION_DETECTED; - RSA_VALIDATE_RET( ctx != NULL ); - if( ( N != NULL && ( ret = mbedtls_mpi_copy( &ctx->N, N ) ) != 0 ) || - ( P != NULL && ( ret = mbedtls_mpi_copy( &ctx->P, P ) ) != 0 ) || - ( Q != NULL && ( ret = mbedtls_mpi_copy( &ctx->Q, Q ) ) != 0 ) || - ( D != NULL && ( ret = mbedtls_mpi_copy( &ctx->D, D ) ) != 0 ) || - ( E != NULL && ( ret = mbedtls_mpi_copy( &ctx->E, E ) ) != 0 ) ) - { - return( MBEDTLS_ERROR_ADD( MBEDTLS_ERR_RSA_BAD_INPUT_DATA, ret ) ); + if ((N != NULL && (ret = mbedtls_mpi_copy(&ctx->N, N)) != 0) || + (P != NULL && (ret = mbedtls_mpi_copy(&ctx->P, P)) != 0) || + (Q != NULL && (ret = mbedtls_mpi_copy(&ctx->Q, Q)) != 0) || + (D != NULL && (ret = mbedtls_mpi_copy(&ctx->D, D)) != 0) || + (E != NULL && (ret = mbedtls_mpi_copy(&ctx->E, E)) != 0)) { + return MBEDTLS_ERROR_ADD(MBEDTLS_ERR_RSA_BAD_INPUT_DATA, ret); } - if( N != NULL ) - ctx->len = mbedtls_mpi_size( &ctx->N ); + if (N != NULL) { + ctx->len = mbedtls_mpi_size(&ctx->N); + } - return( 0 ); + return 0; } -int mbedtls_rsa_import_raw( mbedtls_rsa_context *ctx, - unsigned char const *N, size_t N_len, - unsigned char const *P, size_t P_len, - unsigned char const *Q, size_t Q_len, - unsigned char const *D, size_t D_len, - unsigned char const *E, size_t E_len ) +int mbedtls_rsa_import_raw(mbedtls_rsa_context *ctx, + unsigned char const *N, size_t N_len, + unsigned char const *P, size_t P_len, + unsigned char const *Q, size_t Q_len, + unsigned char const *D, size_t D_len, + unsigned char const *E, size_t E_len) { int ret = 0; - RSA_VALIDATE_RET( ctx != NULL ); - if( N != NULL ) - { - MBEDTLS_MPI_CHK( mbedtls_mpi_read_binary( &ctx->N, N, N_len ) ); - ctx->len = mbedtls_mpi_size( &ctx->N ); + if (N != NULL) { + MBEDTLS_MPI_CHK(mbedtls_mpi_read_binary(&ctx->N, N, N_len)); + ctx->len = mbedtls_mpi_size(&ctx->N); } - if( P != NULL ) - MBEDTLS_MPI_CHK( mbedtls_mpi_read_binary( &ctx->P, P, P_len ) ); + if (P != NULL) { + MBEDTLS_MPI_CHK(mbedtls_mpi_read_binary(&ctx->P, P, P_len)); + } - if( Q != NULL ) - MBEDTLS_MPI_CHK( mbedtls_mpi_read_binary( &ctx->Q, Q, Q_len ) ); + if (Q != NULL) { + MBEDTLS_MPI_CHK(mbedtls_mpi_read_binary(&ctx->Q, Q, Q_len)); + } - if( D != NULL ) - MBEDTLS_MPI_CHK( mbedtls_mpi_read_binary( &ctx->D, D, D_len ) ); + if (D != NULL) { + MBEDTLS_MPI_CHK(mbedtls_mpi_read_binary(&ctx->D, D, D_len)); + } - if( E != NULL ) - MBEDTLS_MPI_CHK( mbedtls_mpi_read_binary( &ctx->E, E, E_len ) ); + if (E != NULL) { + MBEDTLS_MPI_CHK(mbedtls_mpi_read_binary(&ctx->E, E, E_len)); + } cleanup: - if( ret != 0 ) - return( MBEDTLS_ERROR_ADD( MBEDTLS_ERR_RSA_BAD_INPUT_DATA, ret ) ); + if (ret != 0) { + return MBEDTLS_ERROR_ADD(MBEDTLS_ERR_RSA_BAD_INPUT_DATA, ret); + } - return( 0 ); + return 0; } /* @@ -137,8 +139,8 @@ int mbedtls_rsa_import_raw( mbedtls_rsa_context *ctx, * that the RSA primitives will be able to execute without error. * It does *not* make guarantees for consistency of the parameters. */ -static int rsa_check_context( mbedtls_rsa_context const *ctx, int is_priv, - int blinding_needed ) +static int rsa_check_context(mbedtls_rsa_context const *ctx, int is_priv, + int blinding_needed) { #if !defined(MBEDTLS_RSA_NO_CRT) /* blinding_needed is only used for NO_CRT to decide whether @@ -146,10 +148,9 @@ static int rsa_check_context( mbedtls_rsa_context const *ctx, int is_priv, ((void) blinding_needed); #endif - if( ctx->len != mbedtls_mpi_size( &ctx->N ) || - ctx->len > MBEDTLS_MPI_MAX_SIZE ) - { - return( MBEDTLS_ERR_RSA_BAD_INPUT_DATA ); + if (ctx->len != mbedtls_mpi_size(&ctx->N) || + ctx->len > MBEDTLS_MPI_MAX_SIZE) { + return MBEDTLS_ERR_RSA_BAD_INPUT_DATA; } /* @@ -158,23 +159,21 @@ static int rsa_check_context( mbedtls_rsa_context const *ctx, int is_priv, /* Modular exponentiation wrt. N is always used for * RSA public key operations. */ - if( mbedtls_mpi_cmp_int( &ctx->N, 0 ) <= 0 || - mbedtls_mpi_get_bit( &ctx->N, 0 ) == 0 ) - { - return( MBEDTLS_ERR_RSA_BAD_INPUT_DATA ); + if (mbedtls_mpi_cmp_int(&ctx->N, 0) <= 0 || + mbedtls_mpi_get_bit(&ctx->N, 0) == 0) { + return MBEDTLS_ERR_RSA_BAD_INPUT_DATA; } #if !defined(MBEDTLS_RSA_NO_CRT) /* Modular exponentiation for P and Q is only * used for private key operations and if CRT * is used. */ - if( is_priv && - ( mbedtls_mpi_cmp_int( &ctx->P, 0 ) <= 0 || - mbedtls_mpi_get_bit( &ctx->P, 0 ) == 0 || - mbedtls_mpi_cmp_int( &ctx->Q, 0 ) <= 0 || - mbedtls_mpi_get_bit( &ctx->Q, 0 ) == 0 ) ) - { - return( MBEDTLS_ERR_RSA_BAD_INPUT_DATA ); + if (is_priv && + (mbedtls_mpi_cmp_int(&ctx->P, 0) <= 0 || + mbedtls_mpi_get_bit(&ctx->P, 0) == 0 || + mbedtls_mpi_cmp_int(&ctx->Q, 0) <= 0 || + mbedtls_mpi_get_bit(&ctx->Q, 0) == 0)) { + return MBEDTLS_ERR_RSA_BAD_INPUT_DATA; } #endif /* !MBEDTLS_RSA_NO_CRT */ @@ -183,20 +182,21 @@ static int rsa_check_context( mbedtls_rsa_context const *ctx, int is_priv, */ /* Always need E for public key operations */ - if( mbedtls_mpi_cmp_int( &ctx->E, 0 ) <= 0 ) - return( MBEDTLS_ERR_RSA_BAD_INPUT_DATA ); + if (mbedtls_mpi_cmp_int(&ctx->E, 0) <= 0) { + return MBEDTLS_ERR_RSA_BAD_INPUT_DATA; + } #if defined(MBEDTLS_RSA_NO_CRT) /* For private key operations, use D or DP & DQ * as (unblinded) exponents. */ - if( is_priv && mbedtls_mpi_cmp_int( &ctx->D, 0 ) <= 0 ) - return( MBEDTLS_ERR_RSA_BAD_INPUT_DATA ); + if (is_priv && mbedtls_mpi_cmp_int(&ctx->D, 0) <= 0) { + return MBEDTLS_ERR_RSA_BAD_INPUT_DATA; + } #else - if( is_priv && - ( mbedtls_mpi_cmp_int( &ctx->DP, 0 ) <= 0 || - mbedtls_mpi_cmp_int( &ctx->DQ, 0 ) <= 0 ) ) - { - return( MBEDTLS_ERR_RSA_BAD_INPUT_DATA ); + if (is_priv && + (mbedtls_mpi_cmp_int(&ctx->DP, 0) <= 0 || + mbedtls_mpi_cmp_int(&ctx->DQ, 0) <= 0)) { + return MBEDTLS_ERR_RSA_BAD_INPUT_DATA; } #endif /* MBEDTLS_RSA_NO_CRT */ @@ -204,28 +204,26 @@ static int rsa_check_context( mbedtls_rsa_context const *ctx, int is_priv, * so check that P, Q >= 1 if that hasn't yet been * done as part of 1. */ #if defined(MBEDTLS_RSA_NO_CRT) - if( is_priv && blinding_needed && - ( mbedtls_mpi_cmp_int( &ctx->P, 0 ) <= 0 || - mbedtls_mpi_cmp_int( &ctx->Q, 0 ) <= 0 ) ) - { - return( MBEDTLS_ERR_RSA_BAD_INPUT_DATA ); + if (is_priv && blinding_needed && + (mbedtls_mpi_cmp_int(&ctx->P, 0) <= 0 || + mbedtls_mpi_cmp_int(&ctx->Q, 0) <= 0)) { + return MBEDTLS_ERR_RSA_BAD_INPUT_DATA; } #endif /* It wouldn't lead to an error if it wasn't satisfied, * but check for QP >= 1 nonetheless. */ #if !defined(MBEDTLS_RSA_NO_CRT) - if( is_priv && - mbedtls_mpi_cmp_int( &ctx->QP, 0 ) <= 0 ) - { - return( MBEDTLS_ERR_RSA_BAD_INPUT_DATA ); + if (is_priv && + mbedtls_mpi_cmp_int(&ctx->QP, 0) <= 0) { + return MBEDTLS_ERR_RSA_BAD_INPUT_DATA; } #endif - return( 0 ); + return 0; } -int mbedtls_rsa_complete( mbedtls_rsa_context *ctx ) +int mbedtls_rsa_complete(mbedtls_rsa_context *ctx) { int ret = 0; int have_N, have_P, have_Q, have_D, have_E; @@ -234,18 +232,16 @@ int mbedtls_rsa_complete( mbedtls_rsa_context *ctx ) #endif int n_missing, pq_missing, d_missing, is_pub, is_priv; - RSA_VALIDATE_RET( ctx != NULL ); - - have_N = ( mbedtls_mpi_cmp_int( &ctx->N, 0 ) != 0 ); - have_P = ( mbedtls_mpi_cmp_int( &ctx->P, 0 ) != 0 ); - have_Q = ( mbedtls_mpi_cmp_int( &ctx->Q, 0 ) != 0 ); - have_D = ( mbedtls_mpi_cmp_int( &ctx->D, 0 ) != 0 ); - have_E = ( mbedtls_mpi_cmp_int( &ctx->E, 0 ) != 0 ); + have_N = (mbedtls_mpi_cmp_int(&ctx->N, 0) != 0); + have_P = (mbedtls_mpi_cmp_int(&ctx->P, 0) != 0); + have_Q = (mbedtls_mpi_cmp_int(&ctx->Q, 0) != 0); + have_D = (mbedtls_mpi_cmp_int(&ctx->D, 0) != 0); + have_E = (mbedtls_mpi_cmp_int(&ctx->E, 0) != 0); #if !defined(MBEDTLS_RSA_NO_CRT) - have_DP = ( mbedtls_mpi_cmp_int( &ctx->DP, 0 ) != 0 ); - have_DQ = ( mbedtls_mpi_cmp_int( &ctx->DQ, 0 ) != 0 ); - have_QP = ( mbedtls_mpi_cmp_int( &ctx->QP, 0 ) != 0 ); + have_DP = (mbedtls_mpi_cmp_int(&ctx->DP, 0) != 0); + have_DQ = (mbedtls_mpi_cmp_int(&ctx->DQ, 0) != 0); + have_QP = (mbedtls_mpi_cmp_int(&ctx->QP, 0) != 0); #endif /* @@ -266,44 +262,40 @@ int mbedtls_rsa_complete( mbedtls_rsa_context *ctx ) /* These three alternatives are mutually exclusive */ is_priv = n_missing || pq_missing || d_missing; - if( !is_priv && !is_pub ) - return( MBEDTLS_ERR_RSA_BAD_INPUT_DATA ); + if (!is_priv && !is_pub) { + return MBEDTLS_ERR_RSA_BAD_INPUT_DATA; + } /* * Step 1: Deduce N if P, Q are provided. */ - if( !have_N && have_P && have_Q ) - { - if( ( ret = mbedtls_mpi_mul_mpi( &ctx->N, &ctx->P, - &ctx->Q ) ) != 0 ) - { - return( MBEDTLS_ERROR_ADD( MBEDTLS_ERR_RSA_BAD_INPUT_DATA, ret ) ); + if (!have_N && have_P && have_Q) { + if ((ret = mbedtls_mpi_mul_mpi(&ctx->N, &ctx->P, + &ctx->Q)) != 0) { + return MBEDTLS_ERROR_ADD(MBEDTLS_ERR_RSA_BAD_INPUT_DATA, ret); } - ctx->len = mbedtls_mpi_size( &ctx->N ); + ctx->len = mbedtls_mpi_size(&ctx->N); } /* * Step 2: Deduce and verify all remaining core parameters. */ - if( pq_missing ) - { - ret = mbedtls_rsa_deduce_primes( &ctx->N, &ctx->E, &ctx->D, - &ctx->P, &ctx->Q ); - if( ret != 0 ) - return( MBEDTLS_ERROR_ADD( MBEDTLS_ERR_RSA_BAD_INPUT_DATA, ret ) ); + if (pq_missing) { + ret = mbedtls_rsa_deduce_primes(&ctx->N, &ctx->E, &ctx->D, + &ctx->P, &ctx->Q); + if (ret != 0) { + return MBEDTLS_ERROR_ADD(MBEDTLS_ERR_RSA_BAD_INPUT_DATA, ret); + } - } - else if( d_missing ) - { - if( ( ret = mbedtls_rsa_deduce_private_exponent( &ctx->P, - &ctx->Q, - &ctx->E, - &ctx->D ) ) != 0 ) - { - return( MBEDTLS_ERROR_ADD( MBEDTLS_ERR_RSA_BAD_INPUT_DATA, ret ) ); + } else if (d_missing) { + if ((ret = mbedtls_rsa_deduce_private_exponent(&ctx->P, + &ctx->Q, + &ctx->E, + &ctx->D)) != 0) { + return MBEDTLS_ERROR_ADD(MBEDTLS_ERR_RSA_BAD_INPUT_DATA, ret); } } @@ -313,12 +305,12 @@ int mbedtls_rsa_complete( mbedtls_rsa_context *ctx ) */ #if !defined(MBEDTLS_RSA_NO_CRT) - if( is_priv && ! ( have_DP && have_DQ && have_QP ) ) - { - ret = mbedtls_rsa_deduce_crt( &ctx->P, &ctx->Q, &ctx->D, - &ctx->DP, &ctx->DQ, &ctx->QP ); - if( ret != 0 ) - return( MBEDTLS_ERROR_ADD( MBEDTLS_ERR_RSA_BAD_INPUT_DATA, ret ) ); + if (is_priv && !(have_DP && have_DQ && have_QP)) { + ret = mbedtls_rsa_deduce_crt(&ctx->P, &ctx->Q, &ctx->D, + &ctx->DP, &ctx->DQ, &ctx->QP); + if (ret != 0) { + return MBEDTLS_ERROR_ADD(MBEDTLS_ERR_RSA_BAD_INPUT_DATA, ret); + } } #endif /* MBEDTLS_RSA_NO_CRT */ @@ -326,94 +318,96 @@ int mbedtls_rsa_complete( mbedtls_rsa_context *ctx ) * Step 3: Basic sanity checks */ - return( rsa_check_context( ctx, is_priv, 1 ) ); + return rsa_check_context(ctx, is_priv, 1); } -int mbedtls_rsa_export_raw( const mbedtls_rsa_context *ctx, - unsigned char *N, size_t N_len, - unsigned char *P, size_t P_len, - unsigned char *Q, size_t Q_len, - unsigned char *D, size_t D_len, - unsigned char *E, size_t E_len ) +int mbedtls_rsa_export_raw(const mbedtls_rsa_context *ctx, + unsigned char *N, size_t N_len, + unsigned char *P, size_t P_len, + unsigned char *Q, size_t Q_len, + unsigned char *D, size_t D_len, + unsigned char *E, size_t E_len) { int ret = 0; int is_priv; - RSA_VALIDATE_RET( ctx != NULL ); /* Check if key is private or public */ is_priv = - mbedtls_mpi_cmp_int( &ctx->N, 0 ) != 0 && - mbedtls_mpi_cmp_int( &ctx->P, 0 ) != 0 && - mbedtls_mpi_cmp_int( &ctx->Q, 0 ) != 0 && - mbedtls_mpi_cmp_int( &ctx->D, 0 ) != 0 && - mbedtls_mpi_cmp_int( &ctx->E, 0 ) != 0; - - if( !is_priv ) - { + mbedtls_mpi_cmp_int(&ctx->N, 0) != 0 && + mbedtls_mpi_cmp_int(&ctx->P, 0) != 0 && + mbedtls_mpi_cmp_int(&ctx->Q, 0) != 0 && + mbedtls_mpi_cmp_int(&ctx->D, 0) != 0 && + mbedtls_mpi_cmp_int(&ctx->E, 0) != 0; + + if (!is_priv) { /* If we're trying to export private parameters for a public key, * something must be wrong. */ - if( P != NULL || Q != NULL || D != NULL ) - return( MBEDTLS_ERR_RSA_BAD_INPUT_DATA ); + if (P != NULL || Q != NULL || D != NULL) { + return MBEDTLS_ERR_RSA_BAD_INPUT_DATA; + } } - if( N != NULL ) - MBEDTLS_MPI_CHK( mbedtls_mpi_write_binary( &ctx->N, N, N_len ) ); + if (N != NULL) { + MBEDTLS_MPI_CHK(mbedtls_mpi_write_binary(&ctx->N, N, N_len)); + } - if( P != NULL ) - MBEDTLS_MPI_CHK( mbedtls_mpi_write_binary( &ctx->P, P, P_len ) ); + if (P != NULL) { + MBEDTLS_MPI_CHK(mbedtls_mpi_write_binary(&ctx->P, P, P_len)); + } - if( Q != NULL ) - MBEDTLS_MPI_CHK( mbedtls_mpi_write_binary( &ctx->Q, Q, Q_len ) ); + if (Q != NULL) { + MBEDTLS_MPI_CHK(mbedtls_mpi_write_binary(&ctx->Q, Q, Q_len)); + } - if( D != NULL ) - MBEDTLS_MPI_CHK( mbedtls_mpi_write_binary( &ctx->D, D, D_len ) ); + if (D != NULL) { + MBEDTLS_MPI_CHK(mbedtls_mpi_write_binary(&ctx->D, D, D_len)); + } - if( E != NULL ) - MBEDTLS_MPI_CHK( mbedtls_mpi_write_binary( &ctx->E, E, E_len ) ); + if (E != NULL) { + MBEDTLS_MPI_CHK(mbedtls_mpi_write_binary(&ctx->E, E, E_len)); + } cleanup: - return( ret ); + return ret; } -int mbedtls_rsa_export( const mbedtls_rsa_context *ctx, - mbedtls_mpi *N, mbedtls_mpi *P, mbedtls_mpi *Q, - mbedtls_mpi *D, mbedtls_mpi *E ) +int mbedtls_rsa_export(const mbedtls_rsa_context *ctx, + mbedtls_mpi *N, mbedtls_mpi *P, mbedtls_mpi *Q, + mbedtls_mpi *D, mbedtls_mpi *E) { int ret = MBEDTLS_ERR_ERROR_CORRUPTION_DETECTED; int is_priv; - RSA_VALIDATE_RET( ctx != NULL ); /* Check if key is private or public */ is_priv = - mbedtls_mpi_cmp_int( &ctx->N, 0 ) != 0 && - mbedtls_mpi_cmp_int( &ctx->P, 0 ) != 0 && - mbedtls_mpi_cmp_int( &ctx->Q, 0 ) != 0 && - mbedtls_mpi_cmp_int( &ctx->D, 0 ) != 0 && - mbedtls_mpi_cmp_int( &ctx->E, 0 ) != 0; - - if( !is_priv ) - { + mbedtls_mpi_cmp_int(&ctx->N, 0) != 0 && + mbedtls_mpi_cmp_int(&ctx->P, 0) != 0 && + mbedtls_mpi_cmp_int(&ctx->Q, 0) != 0 && + mbedtls_mpi_cmp_int(&ctx->D, 0) != 0 && + mbedtls_mpi_cmp_int(&ctx->E, 0) != 0; + + if (!is_priv) { /* If we're trying to export private parameters for a public key, * something must be wrong. */ - if( P != NULL || Q != NULL || D != NULL ) - return( MBEDTLS_ERR_RSA_BAD_INPUT_DATA ); + if (P != NULL || Q != NULL || D != NULL) { + return MBEDTLS_ERR_RSA_BAD_INPUT_DATA; + } } /* Export all requested core parameters. */ - if( ( N != NULL && ( ret = mbedtls_mpi_copy( N, &ctx->N ) ) != 0 ) || - ( P != NULL && ( ret = mbedtls_mpi_copy( P, &ctx->P ) ) != 0 ) || - ( Q != NULL && ( ret = mbedtls_mpi_copy( Q, &ctx->Q ) ) != 0 ) || - ( D != NULL && ( ret = mbedtls_mpi_copy( D, &ctx->D ) ) != 0 ) || - ( E != NULL && ( ret = mbedtls_mpi_copy( E, &ctx->E ) ) != 0 ) ) - { - return( ret ); + if ((N != NULL && (ret = mbedtls_mpi_copy(N, &ctx->N)) != 0) || + (P != NULL && (ret = mbedtls_mpi_copy(P, &ctx->P)) != 0) || + (Q != NULL && (ret = mbedtls_mpi_copy(Q, &ctx->Q)) != 0) || + (D != NULL && (ret = mbedtls_mpi_copy(D, &ctx->D)) != 0) || + (E != NULL && (ret = mbedtls_mpi_copy(E, &ctx->E)) != 0)) { + return ret; } - return( 0 ); + return 0; } /* @@ -422,67 +416,63 @@ int mbedtls_rsa_export( const mbedtls_rsa_context *ctx, * write DER encoded RSA keys. The helper function mbedtls_rsa_deduce_crt * can be used in this case. */ -int mbedtls_rsa_export_crt( const mbedtls_rsa_context *ctx, - mbedtls_mpi *DP, mbedtls_mpi *DQ, mbedtls_mpi *QP ) +int mbedtls_rsa_export_crt(const mbedtls_rsa_context *ctx, + mbedtls_mpi *DP, mbedtls_mpi *DQ, mbedtls_mpi *QP) { int ret = MBEDTLS_ERR_ERROR_CORRUPTION_DETECTED; int is_priv; - RSA_VALIDATE_RET( ctx != NULL ); /* Check if key is private or public */ is_priv = - mbedtls_mpi_cmp_int( &ctx->N, 0 ) != 0 && - mbedtls_mpi_cmp_int( &ctx->P, 0 ) != 0 && - mbedtls_mpi_cmp_int( &ctx->Q, 0 ) != 0 && - mbedtls_mpi_cmp_int( &ctx->D, 0 ) != 0 && - mbedtls_mpi_cmp_int( &ctx->E, 0 ) != 0; + mbedtls_mpi_cmp_int(&ctx->N, 0) != 0 && + mbedtls_mpi_cmp_int(&ctx->P, 0) != 0 && + mbedtls_mpi_cmp_int(&ctx->Q, 0) != 0 && + mbedtls_mpi_cmp_int(&ctx->D, 0) != 0 && + mbedtls_mpi_cmp_int(&ctx->E, 0) != 0; - if( !is_priv ) - return( MBEDTLS_ERR_RSA_BAD_INPUT_DATA ); + if (!is_priv) { + return MBEDTLS_ERR_RSA_BAD_INPUT_DATA; + } #if !defined(MBEDTLS_RSA_NO_CRT) /* Export all requested blinding parameters. */ - if( ( DP != NULL && ( ret = mbedtls_mpi_copy( DP, &ctx->DP ) ) != 0 ) || - ( DQ != NULL && ( ret = mbedtls_mpi_copy( DQ, &ctx->DQ ) ) != 0 ) || - ( QP != NULL && ( ret = mbedtls_mpi_copy( QP, &ctx->QP ) ) != 0 ) ) - { - return( MBEDTLS_ERROR_ADD( MBEDTLS_ERR_RSA_BAD_INPUT_DATA, ret ) ); + if ((DP != NULL && (ret = mbedtls_mpi_copy(DP, &ctx->DP)) != 0) || + (DQ != NULL && (ret = mbedtls_mpi_copy(DQ, &ctx->DQ)) != 0) || + (QP != NULL && (ret = mbedtls_mpi_copy(QP, &ctx->QP)) != 0)) { + return MBEDTLS_ERROR_ADD(MBEDTLS_ERR_RSA_BAD_INPUT_DATA, ret); } #else /* CRT deduction is not applicable to MCU generated wrapped keys so we will add in some dummy values to get past the non-zero check in the import code */ - uint8_t dummy_val[4] ={0xFF, 0xFF, 0xFF, 0xFF}; - if (DP != NULL) - { - ret = mbedtls_mpi_read_binary(DP, dummy_val, sizeof(dummy_val)); - } - else if (DQ != NULL) - { - ret = mbedtls_mpi_read_binary(DQ, dummy_val, sizeof(dummy_val)); - } - else if (QP != NULL) - { - ret = mbedtls_mpi_read_binary(QP, dummy_val, sizeof(dummy_val)); - } - else - { - ret = 0; - } - return ret; + uint8_t dummy_val[4] ={0xFF, 0xFF, 0xFF, 0xFF}; + if (DP != NULL) + { + ret = mbedtls_mpi_read_binary(DP, dummy_val, sizeof(dummy_val)); + } + else if (DQ != NULL) + { + ret = mbedtls_mpi_read_binary(DQ, dummy_val, sizeof(dummy_val)); + } + else if (QP != NULL) + { + ret = mbedtls_mpi_read_binary(QP, dummy_val, sizeof(dummy_val)); + } + else + { + ret = 0; + } + return ret; #endif - } /* * Initialize an RSA context */ -void mbedtls_rsa_init( mbedtls_rsa_context *ctx ) +void mbedtls_rsa_init(mbedtls_rsa_context *ctx) { - RSA_VALIDATE( ctx != NULL ); - - memset( ctx, 0, sizeof( mbedtls_rsa_context ) ); + memset(ctx, 0, sizeof(mbedtls_rsa_context)); ctx->padding = MBEDTLS_RSA_PKCS_V15; ctx->hash_id = MBEDTLS_MD_NONE; @@ -491,18 +481,17 @@ void mbedtls_rsa_init( mbedtls_rsa_context *ctx ) /* Set ctx->ver to nonzero to indicate that the mutex has been * initialized and will need to be freed. */ ctx->ver = 1; - mbedtls_mutex_init( &ctx->mutex ); + mbedtls_mutex_init(&ctx->mutex); #endif } /* * Set padding for an existing RSA context */ -int mbedtls_rsa_set_padding( mbedtls_rsa_context *ctx, int padding, - mbedtls_md_type_t hash_id ) +int mbedtls_rsa_set_padding(mbedtls_rsa_context *ctx, int padding, + mbedtls_md_type_t hash_id) { - switch( padding ) - { + switch (padding) { #if defined(MBEDTLS_PKCS1_V15) case MBEDTLS_RSA_PKCS_V15: break; @@ -513,36 +502,51 @@ int mbedtls_rsa_set_padding( mbedtls_rsa_context *ctx, int padding, break; #endif default: - return( MBEDTLS_ERR_RSA_INVALID_PADDING ); + return MBEDTLS_ERR_RSA_INVALID_PADDING; } - if( ( padding == MBEDTLS_RSA_PKCS_V21 ) && - ( hash_id != MBEDTLS_MD_NONE ) ) - { - const mbedtls_md_info_t *md_info; - - md_info = mbedtls_md_info_from_type( hash_id ); - if( md_info == NULL ) - return( MBEDTLS_ERR_RSA_INVALID_PADDING ); +#if defined(MBEDTLS_PKCS1_V21) + if ((padding == MBEDTLS_RSA_PKCS_V21) && + (hash_id != MBEDTLS_MD_NONE)) { + /* Just make sure this hash is supported in this build. */ + if (mbedtls_hash_info_psa_from_md(hash_id) == PSA_ALG_NONE) { + return MBEDTLS_ERR_RSA_INVALID_PADDING; + } } +#endif /* MBEDTLS_PKCS1_V21 */ ctx->padding = padding; ctx->hash_id = hash_id; - return( 0 ); + return 0; } /* - * Get length in bytes of RSA modulus + * Get padding mode of initialized RSA context + */ +int mbedtls_rsa_get_padding_mode(const mbedtls_rsa_context *ctx) +{ + return ctx->padding; +} + +/* + * Get hash identifier of mbedtls_md_type_t type */ +int mbedtls_rsa_get_md_alg(const mbedtls_rsa_context *ctx) +{ + return ctx->hash_id; +} -size_t mbedtls_rsa_get_len( const mbedtls_rsa_context *ctx ) +/* + * Get length in bytes of RSA modulus + */ +size_t mbedtls_rsa_get_len(const mbedtls_rsa_context *ctx) { - return( ctx->len ); + return ctx->len; } - #if defined(MBEDTLS_GENPRIME) +#if defined(MBEDTLS_GENPRIME) #ifdef FSP_NOT_DEFINED // The HW accelerated version is defined in rsa_alt_process.c /* * Generate an RSA keypair @@ -550,31 +554,29 @@ size_t mbedtls_rsa_get_len( const mbedtls_rsa_context *ctx ) * This generation method follows the RSA key pair generation procedure of * FIPS 186-4 if 2^16 < exponent < 2^256 and nbits = 2048 or nbits = 3072. */ -int mbedtls_rsa_gen_key( mbedtls_rsa_context *ctx, - int (*f_rng)(void *, unsigned char *, size_t), - void *p_rng, - unsigned int nbits, int exponent ) +int mbedtls_rsa_gen_key(mbedtls_rsa_context *ctx, + int (*f_rng)(void *, unsigned char *, size_t), + void *p_rng, + unsigned int nbits, int exponent) { int ret = MBEDTLS_ERR_ERROR_CORRUPTION_DETECTED; mbedtls_mpi H, G, L; int prime_quality = 0; - RSA_VALIDATE_RET( ctx != NULL ); - RSA_VALIDATE_RET( f_rng != NULL ); /* * If the modulus is 1024 bit long or shorter, then the security strength of * the RSA algorithm is less than or equal to 80 bits and therefore an error * rate of 2^-80 is sufficient. */ - if( nbits > 1024 ) + if (nbits > 1024) { prime_quality = MBEDTLS_MPI_GEN_PRIME_FLAG_LOW_ERR; + } - mbedtls_mpi_init( &H ); - mbedtls_mpi_init( &G ); - mbedtls_mpi_init( &L ); + mbedtls_mpi_init(&H); + mbedtls_mpi_init(&G); + mbedtls_mpi_init(&L); - if( nbits < 128 || exponent < 3 || nbits % 2 != 0 ) - { + if (nbits < 128 || exponent < 3 || nbits % 2 != 0) { ret = MBEDTLS_ERR_RSA_BAD_INPUT_DATA; goto cleanup; } @@ -585,54 +587,56 @@ int mbedtls_rsa_gen_key( mbedtls_rsa_context *ctx, * 2. GCD( E, (P-1)*(Q-1) ) == 1 * 3. E^-1 mod LCM(P-1, Q-1) > 2^( nbits / 2 ) */ - MBEDTLS_MPI_CHK( mbedtls_mpi_lset( &ctx->E, exponent ) ); + MBEDTLS_MPI_CHK(mbedtls_mpi_lset(&ctx->E, exponent)); - do - { - MBEDTLS_MPI_CHK( mbedtls_mpi_gen_prime( &ctx->P, nbits >> 1, - prime_quality, f_rng, p_rng ) ); + do { + MBEDTLS_MPI_CHK(mbedtls_mpi_gen_prime(&ctx->P, nbits >> 1, + prime_quality, f_rng, p_rng)); - MBEDTLS_MPI_CHK( mbedtls_mpi_gen_prime( &ctx->Q, nbits >> 1, - prime_quality, f_rng, p_rng ) ); + MBEDTLS_MPI_CHK(mbedtls_mpi_gen_prime(&ctx->Q, nbits >> 1, + prime_quality, f_rng, p_rng)); /* make sure the difference between p and q is not too small (FIPS 186-4 §B.3.3 step 5.4) */ - MBEDTLS_MPI_CHK( mbedtls_mpi_sub_mpi( &H, &ctx->P, &ctx->Q ) ); - if( mbedtls_mpi_bitlen( &H ) <= ( ( nbits >= 200 ) ? ( ( nbits >> 1 ) - 99 ) : 0 ) ) + MBEDTLS_MPI_CHK(mbedtls_mpi_sub_mpi(&H, &ctx->P, &ctx->Q)); + if (mbedtls_mpi_bitlen(&H) <= ((nbits >= 200) ? ((nbits >> 1) - 99) : 0)) { continue; + } /* not required by any standards, but some users rely on the fact that P > Q */ - if( H.s < 0 ) - mbedtls_mpi_swap( &ctx->P, &ctx->Q ); + if (H.s < 0) { + mbedtls_mpi_swap(&ctx->P, &ctx->Q); + } /* Temporarily replace P,Q by P-1, Q-1 */ - MBEDTLS_MPI_CHK( mbedtls_mpi_sub_int( &ctx->P, &ctx->P, 1 ) ); - MBEDTLS_MPI_CHK( mbedtls_mpi_sub_int( &ctx->Q, &ctx->Q, 1 ) ); - MBEDTLS_MPI_CHK( mbedtls_mpi_mul_mpi( &H, &ctx->P, &ctx->Q ) ); + MBEDTLS_MPI_CHK(mbedtls_mpi_sub_int(&ctx->P, &ctx->P, 1)); + MBEDTLS_MPI_CHK(mbedtls_mpi_sub_int(&ctx->Q, &ctx->Q, 1)); + MBEDTLS_MPI_CHK(mbedtls_mpi_mul_mpi(&H, &ctx->P, &ctx->Q)); /* check GCD( E, (P-1)*(Q-1) ) == 1 (FIPS 186-4 §B.3.1 criterion 2(a)) */ - MBEDTLS_MPI_CHK( mbedtls_mpi_gcd( &G, &ctx->E, &H ) ); - if( mbedtls_mpi_cmp_int( &G, 1 ) != 0 ) + MBEDTLS_MPI_CHK(mbedtls_mpi_gcd(&G, &ctx->E, &H)); + if (mbedtls_mpi_cmp_int(&G, 1) != 0) { continue; + } /* compute smallest possible D = E^-1 mod LCM(P-1, Q-1) (FIPS 186-4 §B.3.1 criterion 3(b)) */ - MBEDTLS_MPI_CHK( mbedtls_mpi_gcd( &G, &ctx->P, &ctx->Q ) ); - MBEDTLS_MPI_CHK( mbedtls_mpi_div_mpi( &L, NULL, &H, &G ) ); - MBEDTLS_MPI_CHK( mbedtls_mpi_inv_mod( &ctx->D, &ctx->E, &L ) ); + MBEDTLS_MPI_CHK(mbedtls_mpi_gcd(&G, &ctx->P, &ctx->Q)); + MBEDTLS_MPI_CHK(mbedtls_mpi_div_mpi(&L, NULL, &H, &G)); + MBEDTLS_MPI_CHK(mbedtls_mpi_inv_mod(&ctx->D, &ctx->E, &L)); - if( mbedtls_mpi_bitlen( &ctx->D ) <= ( ( nbits + 1 ) / 2 ) ) // (FIPS 186-4 §B.3.1 criterion 3(a)) + if (mbedtls_mpi_bitlen(&ctx->D) <= ((nbits + 1) / 2)) { // (FIPS 186-4 §B.3.1 criterion 3(a)) continue; + } break; - } - while( 1 ); + } while (1); /* Restore P,Q */ - MBEDTLS_MPI_CHK( mbedtls_mpi_add_int( &ctx->P, &ctx->P, 1 ) ); - MBEDTLS_MPI_CHK( mbedtls_mpi_add_int( &ctx->Q, &ctx->Q, 1 ) ); + MBEDTLS_MPI_CHK(mbedtls_mpi_add_int(&ctx->P, &ctx->P, 1)); + MBEDTLS_MPI_CHK(mbedtls_mpi_add_int(&ctx->Q, &ctx->Q, 1)); - MBEDTLS_MPI_CHK( mbedtls_mpi_mul_mpi( &ctx->N, &ctx->P, &ctx->Q ) ); + MBEDTLS_MPI_CHK(mbedtls_mpi_mul_mpi(&ctx->N, &ctx->P, &ctx->Q)); - ctx->len = mbedtls_mpi_size( &ctx->N ); + ctx->len = mbedtls_mpi_size(&ctx->N); #if !defined(MBEDTLS_RSA_NO_CRT) /* @@ -640,29 +644,29 @@ int mbedtls_rsa_gen_key( mbedtls_rsa_context *ctx, * DQ = D mod (Q - 1) * QP = Q^-1 mod P */ - MBEDTLS_MPI_CHK( mbedtls_rsa_deduce_crt( &ctx->P, &ctx->Q, &ctx->D, - &ctx->DP, &ctx->DQ, &ctx->QP ) ); + MBEDTLS_MPI_CHK(mbedtls_rsa_deduce_crt(&ctx->P, &ctx->Q, &ctx->D, + &ctx->DP, &ctx->DQ, &ctx->QP)); #endif /* MBEDTLS_RSA_NO_CRT */ /* Double-check */ - MBEDTLS_MPI_CHK( mbedtls_rsa_check_privkey( ctx ) ); + MBEDTLS_MPI_CHK(mbedtls_rsa_check_privkey(ctx)); cleanup: - mbedtls_mpi_free( &H ); - mbedtls_mpi_free( &G ); - mbedtls_mpi_free( &L ); + mbedtls_mpi_free(&H); + mbedtls_mpi_free(&G); + mbedtls_mpi_free(&L); - if( ret != 0 ) - { - mbedtls_rsa_free( ctx ); + if (ret != 0) { + mbedtls_rsa_free(ctx); - if( ( -ret & ~0x7f ) == 0 ) - ret = MBEDTLS_ERROR_ADD( MBEDTLS_ERR_RSA_KEY_GEN_FAILED, ret ); - return( ret ); + if ((-ret & ~0x7f) == 0) { + ret = MBEDTLS_ERROR_ADD(MBEDTLS_ERR_RSA_KEY_GEN_FAILED, ret); + } + return ret; } - return( 0 ); + return 0; } #endif // FSP_NOT_DEFINED #endif /* MBEDTLS_GENPRIME */ @@ -670,131 +674,118 @@ int mbedtls_rsa_gen_key( mbedtls_rsa_context *ctx, /* * Check a public RSA key */ -int mbedtls_rsa_check_pubkey( const mbedtls_rsa_context *ctx ) +int mbedtls_rsa_check_pubkey(const mbedtls_rsa_context *ctx) { - RSA_VALIDATE_RET( ctx != NULL ); - - if( rsa_check_context( ctx, 0 /* public */, 0 /* no blinding */ ) != 0 ) - return( MBEDTLS_ERR_RSA_KEY_CHECK_FAILED ); + if (rsa_check_context(ctx, 0 /* public */, 0 /* no blinding */) != 0) { + return MBEDTLS_ERR_RSA_KEY_CHECK_FAILED; + } - if( mbedtls_mpi_bitlen( &ctx->N ) < 128 ) - { - return( MBEDTLS_ERR_RSA_KEY_CHECK_FAILED ); + if (mbedtls_mpi_bitlen(&ctx->N) < 128) { + return MBEDTLS_ERR_RSA_KEY_CHECK_FAILED; } - if( mbedtls_mpi_get_bit( &ctx->E, 0 ) == 0 || - mbedtls_mpi_bitlen( &ctx->E ) < 2 || - mbedtls_mpi_cmp_mpi( &ctx->E, &ctx->N ) >= 0 ) - { - return( MBEDTLS_ERR_RSA_KEY_CHECK_FAILED ); + if (mbedtls_mpi_get_bit(&ctx->E, 0) == 0 || + mbedtls_mpi_bitlen(&ctx->E) < 2 || + mbedtls_mpi_cmp_mpi(&ctx->E, &ctx->N) >= 0) { + return MBEDTLS_ERR_RSA_KEY_CHECK_FAILED; } - return( 0 ); + return 0; } /* * Check for the consistency of all fields in an RSA private key context */ -int mbedtls_rsa_check_privkey( const mbedtls_rsa_context *ctx ) +int mbedtls_rsa_check_privkey(const mbedtls_rsa_context *ctx) { - RSA_VALIDATE_RET( ctx != NULL ); - - if( mbedtls_rsa_check_pubkey( ctx ) != 0 || - rsa_check_context( ctx, 1 /* private */, 1 /* blinding */ ) != 0 ) - { - return( MBEDTLS_ERR_RSA_KEY_CHECK_FAILED ); + if (mbedtls_rsa_check_pubkey(ctx) != 0 || + rsa_check_context(ctx, 1 /* private */, 1 /* blinding */) != 0) { + return MBEDTLS_ERR_RSA_KEY_CHECK_FAILED; } - if( mbedtls_rsa_validate_params( &ctx->N, &ctx->P, &ctx->Q, - &ctx->D, &ctx->E, NULL, NULL ) != 0 ) - { - return( MBEDTLS_ERR_RSA_KEY_CHECK_FAILED ); + if (mbedtls_rsa_validate_params(&ctx->N, &ctx->P, &ctx->Q, + &ctx->D, &ctx->E, NULL, NULL) != 0) { + return MBEDTLS_ERR_RSA_KEY_CHECK_FAILED; } #if !defined(MBEDTLS_RSA_NO_CRT) - else if( mbedtls_rsa_validate_crt( &ctx->P, &ctx->Q, &ctx->D, - &ctx->DP, &ctx->DQ, &ctx->QP ) != 0 ) - { - return( MBEDTLS_ERR_RSA_KEY_CHECK_FAILED ); + else if (mbedtls_rsa_validate_crt(&ctx->P, &ctx->Q, &ctx->D, + &ctx->DP, &ctx->DQ, &ctx->QP) != 0) { + return MBEDTLS_ERR_RSA_KEY_CHECK_FAILED; } #endif - return( 0 ); + return 0; } /* * Check if contexts holding a public and private key match */ -int mbedtls_rsa_check_pub_priv( const mbedtls_rsa_context *pub, - const mbedtls_rsa_context *prv ) +int mbedtls_rsa_check_pub_priv(const mbedtls_rsa_context *pub, + const mbedtls_rsa_context *prv) { - RSA_VALIDATE_RET( pub != NULL ); - RSA_VALIDATE_RET( prv != NULL ); - - if( mbedtls_rsa_check_pubkey( pub ) != 0 || - mbedtls_rsa_check_privkey( prv ) != 0 ) - { - return( MBEDTLS_ERR_RSA_KEY_CHECK_FAILED ); + if (mbedtls_rsa_check_pubkey(pub) != 0 || + mbedtls_rsa_check_privkey(prv) != 0) { + return MBEDTLS_ERR_RSA_KEY_CHECK_FAILED; } - if( mbedtls_mpi_cmp_mpi( &pub->N, &prv->N ) != 0 || - mbedtls_mpi_cmp_mpi( &pub->E, &prv->E ) != 0 ) - { - return( MBEDTLS_ERR_RSA_KEY_CHECK_FAILED ); + if (mbedtls_mpi_cmp_mpi(&pub->N, &prv->N) != 0 || + mbedtls_mpi_cmp_mpi(&pub->E, &prv->E) != 0) { + return MBEDTLS_ERR_RSA_KEY_CHECK_FAILED; } - return( 0 ); + return 0; } /* * Do an RSA public key operation */ #ifdef FSP_NOT_DEFINED // The HW accelerated version is defined in rsa_alt_process.c -int mbedtls_rsa_public( mbedtls_rsa_context *ctx, - const unsigned char *input, - unsigned char *output ) +int mbedtls_rsa_public(mbedtls_rsa_context *ctx, + const unsigned char *input, + unsigned char *output) { int ret = MBEDTLS_ERR_ERROR_CORRUPTION_DETECTED; size_t olen; mbedtls_mpi T; - RSA_VALIDATE_RET( ctx != NULL ); - RSA_VALIDATE_RET( input != NULL ); - RSA_VALIDATE_RET( output != NULL ); - if( rsa_check_context( ctx, 0 /* public */, 0 /* no blinding */ ) ) - return( MBEDTLS_ERR_RSA_BAD_INPUT_DATA ); + if (rsa_check_context(ctx, 0 /* public */, 0 /* no blinding */)) { + return MBEDTLS_ERR_RSA_BAD_INPUT_DATA; + } - mbedtls_mpi_init( &T ); + mbedtls_mpi_init(&T); #if defined(MBEDTLS_THREADING_C) - if( ( ret = mbedtls_mutex_lock( &ctx->mutex ) ) != 0 ) - return( ret ); + if ((ret = mbedtls_mutex_lock(&ctx->mutex)) != 0) { + return ret; + } #endif - MBEDTLS_MPI_CHK( mbedtls_mpi_read_binary( &T, input, ctx->len ) ); + MBEDTLS_MPI_CHK(mbedtls_mpi_read_binary(&T, input, ctx->len)); - if( mbedtls_mpi_cmp_mpi( &T, &ctx->N ) >= 0 ) - { + if (mbedtls_mpi_cmp_mpi(&T, &ctx->N) >= 0) { ret = MBEDTLS_ERR_MPI_BAD_INPUT_DATA; goto cleanup; } olen = ctx->len; - MBEDTLS_MPI_CHK( mbedtls_mpi_exp_mod( &T, &T, &ctx->E, &ctx->N, &ctx->RN ) ); - MBEDTLS_MPI_CHK( mbedtls_mpi_write_binary( &T, output, olen ) ); + MBEDTLS_MPI_CHK(mbedtls_mpi_exp_mod(&T, &T, &ctx->E, &ctx->N, &ctx->RN)); + MBEDTLS_MPI_CHK(mbedtls_mpi_write_binary(&T, output, olen)); cleanup: #if defined(MBEDTLS_THREADING_C) - if( mbedtls_mutex_unlock( &ctx->mutex ) != 0 ) - return( MBEDTLS_ERR_THREADING_MUTEX_ERROR ); + if (mbedtls_mutex_unlock(&ctx->mutex) != 0) { + return MBEDTLS_ERR_THREADING_MUTEX_ERROR; + } #endif - mbedtls_mpi_free( &T ); + mbedtls_mpi_free(&T); - if( ret != 0 ) - return( MBEDTLS_ERROR_ADD( MBEDTLS_ERR_RSA_PUBLIC_FAILED, ret ) ); - - return( 0 ); + if (ret != 0) { + return MBEDTLS_ERROR_ADD(MBEDTLS_ERR_RSA_PUBLIC_FAILED, ret); + } + + return 0; } #endif // FSP_NOT_DEFINED /* @@ -803,63 +794,62 @@ int mbedtls_rsa_public( mbedtls_rsa_context *ctx, * DSS, and other systems. In : Advances in Cryptology-CRYPTO'96. Springer * Berlin Heidelberg, 1996. p. 104-113. */ -static int rsa_prepare_blinding( mbedtls_rsa_context *ctx, - int (*f_rng)(void *, unsigned char *, size_t), void *p_rng ) +static int rsa_prepare_blinding(mbedtls_rsa_context *ctx, + int (*f_rng)(void *, unsigned char *, size_t), void *p_rng) { int ret, count = 0; mbedtls_mpi R; - mbedtls_mpi_init( &R ); + mbedtls_mpi_init(&R); - if( ctx->Vf.p != NULL ) - { + if (ctx->Vf.p != NULL) { /* We already have blinding values, just update them by squaring */ - MBEDTLS_MPI_CHK( mbedtls_mpi_mul_mpi( &ctx->Vi, &ctx->Vi, &ctx->Vi ) ); - MBEDTLS_MPI_CHK( mbedtls_mpi_mod_mpi( &ctx->Vi, &ctx->Vi, &ctx->N ) ); - MBEDTLS_MPI_CHK( mbedtls_mpi_mul_mpi( &ctx->Vf, &ctx->Vf, &ctx->Vf ) ); - MBEDTLS_MPI_CHK( mbedtls_mpi_mod_mpi( &ctx->Vf, &ctx->Vf, &ctx->N ) ); + MBEDTLS_MPI_CHK(mbedtls_mpi_mul_mpi(&ctx->Vi, &ctx->Vi, &ctx->Vi)); + MBEDTLS_MPI_CHK(mbedtls_mpi_mod_mpi(&ctx->Vi, &ctx->Vi, &ctx->N)); + MBEDTLS_MPI_CHK(mbedtls_mpi_mul_mpi(&ctx->Vf, &ctx->Vf, &ctx->Vf)); + MBEDTLS_MPI_CHK(mbedtls_mpi_mod_mpi(&ctx->Vf, &ctx->Vf, &ctx->N)); goto cleanup; } /* Unblinding value: Vf = random number, invertible mod N */ do { - if( count++ > 10 ) - { + if (count++ > 10) { ret = MBEDTLS_ERR_RSA_RNG_FAILED; goto cleanup; } - MBEDTLS_MPI_CHK( mbedtls_mpi_fill_random( &ctx->Vf, ctx->len - 1, f_rng, p_rng ) ); + MBEDTLS_MPI_CHK(mbedtls_mpi_fill_random(&ctx->Vf, ctx->len - 1, f_rng, p_rng)); /* Compute Vf^-1 as R * (R Vf)^-1 to avoid leaks from inv_mod. */ - MBEDTLS_MPI_CHK( mbedtls_mpi_fill_random( &R, ctx->len - 1, f_rng, p_rng ) ); - MBEDTLS_MPI_CHK( mbedtls_mpi_mul_mpi( &ctx->Vi, &ctx->Vf, &R ) ); - MBEDTLS_MPI_CHK( mbedtls_mpi_mod_mpi( &ctx->Vi, &ctx->Vi, &ctx->N ) ); + MBEDTLS_MPI_CHK(mbedtls_mpi_fill_random(&R, ctx->len - 1, f_rng, p_rng)); + MBEDTLS_MPI_CHK(mbedtls_mpi_mul_mpi(&ctx->Vi, &ctx->Vf, &R)); + MBEDTLS_MPI_CHK(mbedtls_mpi_mod_mpi(&ctx->Vi, &ctx->Vi, &ctx->N)); /* At this point, Vi is invertible mod N if and only if both Vf and R * are invertible mod N. If one of them isn't, we don't need to know * which one, we just loop and choose new values for both of them. * (Each iteration succeeds with overwhelming probability.) */ - ret = mbedtls_mpi_inv_mod( &ctx->Vi, &ctx->Vi, &ctx->N ); - if( ret != 0 && ret != MBEDTLS_ERR_MPI_NOT_ACCEPTABLE ) + ret = mbedtls_mpi_inv_mod(&ctx->Vi, &ctx->Vi, &ctx->N); + if (ret != 0 && ret != MBEDTLS_ERR_MPI_NOT_ACCEPTABLE) { goto cleanup; + } - } while( ret == MBEDTLS_ERR_MPI_NOT_ACCEPTABLE ); + } while (ret == MBEDTLS_ERR_MPI_NOT_ACCEPTABLE); /* Finish the computation of Vf^-1 = R * (R Vf)^-1 */ - MBEDTLS_MPI_CHK( mbedtls_mpi_mul_mpi( &ctx->Vi, &ctx->Vi, &R ) ); - MBEDTLS_MPI_CHK( mbedtls_mpi_mod_mpi( &ctx->Vi, &ctx->Vi, &ctx->N ) ); + MBEDTLS_MPI_CHK(mbedtls_mpi_mul_mpi(&ctx->Vi, &ctx->Vi, &R)); + MBEDTLS_MPI_CHK(mbedtls_mpi_mod_mpi(&ctx->Vi, &ctx->Vi, &ctx->N)); /* Blinding value: Vi = Vf^(-e) mod N * (Vi already contains Vf^-1 at this point) */ - MBEDTLS_MPI_CHK( mbedtls_mpi_exp_mod( &ctx->Vi, &ctx->Vi, &ctx->E, &ctx->N, &ctx->RN ) ); + MBEDTLS_MPI_CHK(mbedtls_mpi_exp_mod(&ctx->Vi, &ctx->Vi, &ctx->E, &ctx->N, &ctx->RN)); cleanup: - mbedtls_mpi_free( &R ); + mbedtls_mpi_free(&R); - return( ret ); + return ret; } /* @@ -886,11 +876,11 @@ static int rsa_prepare_blinding( mbedtls_rsa_context *ctx, /* * Do an RSA private key operation */ -int mbedtls_rsa_private( mbedtls_rsa_context *ctx, - int (*f_rng)(void *, unsigned char *, size_t), - void *p_rng, - const unsigned char *input, - unsigned char *output ) +int mbedtls_rsa_private(mbedtls_rsa_context *ctx, + int (*f_rng)(void *, unsigned char *, size_t), + void *p_rng, + const unsigned char *input, + unsigned char *output) { int ret = MBEDTLS_ERR_ERROR_CORRUPTION_DETECTED; size_t olen; @@ -927,107 +917,103 @@ int mbedtls_rsa_private( mbedtls_rsa_context *ctx, * checked result; should be the same in the end. */ mbedtls_mpi I, C; - RSA_VALIDATE_RET( ctx != NULL ); - RSA_VALIDATE_RET( input != NULL ); - RSA_VALIDATE_RET( output != NULL ); - - if( f_rng == NULL ) - return( MBEDTLS_ERR_RSA_BAD_INPUT_DATA ); + if (f_rng == NULL) { + return MBEDTLS_ERR_RSA_BAD_INPUT_DATA; + } - if( rsa_check_context( ctx, 1 /* private key checks */, - 1 /* blinding on */ ) != 0 ) - { - return( MBEDTLS_ERR_RSA_BAD_INPUT_DATA ); + if (rsa_check_context(ctx, 1 /* private key checks */, + 1 /* blinding on */) != 0) { + return MBEDTLS_ERR_RSA_BAD_INPUT_DATA; } #if defined(MBEDTLS_THREADING_C) - if( ( ret = mbedtls_mutex_lock( &ctx->mutex ) ) != 0 ) - return( ret ); + if ((ret = mbedtls_mutex_lock(&ctx->mutex)) != 0) { + return ret; + } #endif /* MPI Initialization */ - mbedtls_mpi_init( &T ); + mbedtls_mpi_init(&T); - mbedtls_mpi_init( &P1 ); - mbedtls_mpi_init( &Q1 ); - mbedtls_mpi_init( &R ); + mbedtls_mpi_init(&P1); + mbedtls_mpi_init(&Q1); + mbedtls_mpi_init(&R); #if defined(MBEDTLS_RSA_NO_CRT) - mbedtls_mpi_init( &D_blind ); + mbedtls_mpi_init(&D_blind); #else - mbedtls_mpi_init( &DP_blind ); - mbedtls_mpi_init( &DQ_blind ); + mbedtls_mpi_init(&DP_blind); + mbedtls_mpi_init(&DQ_blind); #endif #if !defined(MBEDTLS_RSA_NO_CRT) - mbedtls_mpi_init( &TP ); mbedtls_mpi_init( &TQ ); + mbedtls_mpi_init(&TP); mbedtls_mpi_init(&TQ); #endif - mbedtls_mpi_init( &I ); - mbedtls_mpi_init( &C ); + mbedtls_mpi_init(&I); + mbedtls_mpi_init(&C); /* End of MPI initialization */ - MBEDTLS_MPI_CHK( mbedtls_mpi_read_binary( &T, input, ctx->len ) ); - if( mbedtls_mpi_cmp_mpi( &T, &ctx->N ) >= 0 ) - { + MBEDTLS_MPI_CHK(mbedtls_mpi_read_binary(&T, input, ctx->len)); + if (mbedtls_mpi_cmp_mpi(&T, &ctx->N) >= 0) { ret = MBEDTLS_ERR_MPI_BAD_INPUT_DATA; goto cleanup; } - MBEDTLS_MPI_CHK( mbedtls_mpi_copy( &I, &T ) ); + MBEDTLS_MPI_CHK(mbedtls_mpi_copy(&I, &T)); - /* - * Blinding - * T = T * Vi mod N - */ - MBEDTLS_MPI_CHK( rsa_prepare_blinding( ctx, f_rng, p_rng ) ); - MBEDTLS_MPI_CHK( mbedtls_mpi_mul_mpi( &T, &T, &ctx->Vi ) ); - MBEDTLS_MPI_CHK( mbedtls_mpi_mod_mpi( &T, &T, &ctx->N ) ); + /* + * Blinding + * T = T * Vi mod N + */ + MBEDTLS_MPI_CHK(rsa_prepare_blinding(ctx, f_rng, p_rng)); + MBEDTLS_MPI_CHK(mbedtls_mpi_mul_mpi(&T, &T, &ctx->Vi)); + MBEDTLS_MPI_CHK(mbedtls_mpi_mod_mpi(&T, &T, &ctx->N)); - /* - * Exponent blinding - */ - MBEDTLS_MPI_CHK( mbedtls_mpi_sub_int( &P1, &ctx->P, 1 ) ); - MBEDTLS_MPI_CHK( mbedtls_mpi_sub_int( &Q1, &ctx->Q, 1 ) ); + /* + * Exponent blinding + */ + MBEDTLS_MPI_CHK(mbedtls_mpi_sub_int(&P1, &ctx->P, 1)); + MBEDTLS_MPI_CHK(mbedtls_mpi_sub_int(&Q1, &ctx->Q, 1)); #if defined(MBEDTLS_RSA_NO_CRT) - /* - * D_blind = ( P - 1 ) * ( Q - 1 ) * R + D - */ - MBEDTLS_MPI_CHK( mbedtls_mpi_fill_random( &R, RSA_EXPONENT_BLINDING, - f_rng, p_rng ) ); - MBEDTLS_MPI_CHK( mbedtls_mpi_mul_mpi( &D_blind, &P1, &Q1 ) ); - MBEDTLS_MPI_CHK( mbedtls_mpi_mul_mpi( &D_blind, &D_blind, &R ) ); - MBEDTLS_MPI_CHK( mbedtls_mpi_add_mpi( &D_blind, &D_blind, &ctx->D ) ); + /* + * D_blind = ( P - 1 ) * ( Q - 1 ) * R + D + */ + MBEDTLS_MPI_CHK(mbedtls_mpi_fill_random(&R, RSA_EXPONENT_BLINDING, + f_rng, p_rng)); + MBEDTLS_MPI_CHK(mbedtls_mpi_mul_mpi(&D_blind, &P1, &Q1)); + MBEDTLS_MPI_CHK(mbedtls_mpi_mul_mpi(&D_blind, &D_blind, &R)); + MBEDTLS_MPI_CHK(mbedtls_mpi_add_mpi(&D_blind, &D_blind, &ctx->D)); - D = &D_blind; + D = &D_blind; #else - /* - * DP_blind = ( P - 1 ) * R + DP - */ - MBEDTLS_MPI_CHK( mbedtls_mpi_fill_random( &R, RSA_EXPONENT_BLINDING, - f_rng, p_rng ) ); - MBEDTLS_MPI_CHK( mbedtls_mpi_mul_mpi( &DP_blind, &P1, &R ) ); - MBEDTLS_MPI_CHK( mbedtls_mpi_add_mpi( &DP_blind, &DP_blind, - &ctx->DP ) ); + /* + * DP_blind = ( P - 1 ) * R + DP + */ + MBEDTLS_MPI_CHK(mbedtls_mpi_fill_random(&R, RSA_EXPONENT_BLINDING, + f_rng, p_rng)); + MBEDTLS_MPI_CHK(mbedtls_mpi_mul_mpi(&DP_blind, &P1, &R)); + MBEDTLS_MPI_CHK(mbedtls_mpi_add_mpi(&DP_blind, &DP_blind, + &ctx->DP)); - DP = &DP_blind; + DP = &DP_blind; - /* - * DQ_blind = ( Q - 1 ) * R + DQ - */ - MBEDTLS_MPI_CHK( mbedtls_mpi_fill_random( &R, RSA_EXPONENT_BLINDING, - f_rng, p_rng ) ); - MBEDTLS_MPI_CHK( mbedtls_mpi_mul_mpi( &DQ_blind, &Q1, &R ) ); - MBEDTLS_MPI_CHK( mbedtls_mpi_add_mpi( &DQ_blind, &DQ_blind, - &ctx->DQ ) ); + /* + * DQ_blind = ( Q - 1 ) * R + DQ + */ + MBEDTLS_MPI_CHK(mbedtls_mpi_fill_random(&R, RSA_EXPONENT_BLINDING, + f_rng, p_rng)); + MBEDTLS_MPI_CHK(mbedtls_mpi_mul_mpi(&DQ_blind, &Q1, &R)); + MBEDTLS_MPI_CHK(mbedtls_mpi_add_mpi(&DQ_blind, &DQ_blind, + &ctx->DQ)); - DQ = &DQ_blind; + DQ = &DQ_blind; #endif /* MBEDTLS_RSA_NO_CRT */ #if defined(MBEDTLS_RSA_NO_CRT) - MBEDTLS_MPI_CHK( mbedtls_mpi_exp_mod( &T, &T, D, &ctx->N, &ctx->RN ) ); + MBEDTLS_MPI_CHK(mbedtls_mpi_exp_mod(&T, &T, D, &ctx->N, &ctx->RN)); #else /* * Faster decryption using the CRT @@ -1036,72 +1022,73 @@ int mbedtls_rsa_private( mbedtls_rsa_context *ctx, * TQ = input ^ dQ mod Q */ - MBEDTLS_MPI_CHK( mbedtls_mpi_exp_mod( &TP, &T, DP, &ctx->P, &ctx->RP ) ); - MBEDTLS_MPI_CHK( mbedtls_mpi_exp_mod( &TQ, &T, DQ, &ctx->Q, &ctx->RQ ) ); + MBEDTLS_MPI_CHK(mbedtls_mpi_exp_mod(&TP, &T, DP, &ctx->P, &ctx->RP)); + MBEDTLS_MPI_CHK(mbedtls_mpi_exp_mod(&TQ, &T, DQ, &ctx->Q, &ctx->RQ)); /* * T = (TP - TQ) * (Q^-1 mod P) mod P */ - MBEDTLS_MPI_CHK( mbedtls_mpi_sub_mpi( &T, &TP, &TQ ) ); - MBEDTLS_MPI_CHK( mbedtls_mpi_mul_mpi( &TP, &T, &ctx->QP ) ); - MBEDTLS_MPI_CHK( mbedtls_mpi_mod_mpi( &T, &TP, &ctx->P ) ); + MBEDTLS_MPI_CHK(mbedtls_mpi_sub_mpi(&T, &TP, &TQ)); + MBEDTLS_MPI_CHK(mbedtls_mpi_mul_mpi(&TP, &T, &ctx->QP)); + MBEDTLS_MPI_CHK(mbedtls_mpi_mod_mpi(&T, &TP, &ctx->P)); /* * T = TQ + T * Q */ - MBEDTLS_MPI_CHK( mbedtls_mpi_mul_mpi( &TP, &T, &ctx->Q ) ); - MBEDTLS_MPI_CHK( mbedtls_mpi_add_mpi( &T, &TQ, &TP ) ); + MBEDTLS_MPI_CHK(mbedtls_mpi_mul_mpi(&TP, &T, &ctx->Q)); + MBEDTLS_MPI_CHK(mbedtls_mpi_add_mpi(&T, &TQ, &TP)); #endif /* MBEDTLS_RSA_NO_CRT */ - /* - * Unblind - * T = T * Vf mod N - */ - MBEDTLS_MPI_CHK( mbedtls_mpi_mul_mpi( &T, &T, &ctx->Vf ) ); - MBEDTLS_MPI_CHK( mbedtls_mpi_mod_mpi( &T, &T, &ctx->N ) ); + /* + * Unblind + * T = T * Vf mod N + */ + MBEDTLS_MPI_CHK(mbedtls_mpi_mul_mpi(&T, &T, &ctx->Vf)); + MBEDTLS_MPI_CHK(mbedtls_mpi_mod_mpi(&T, &T, &ctx->N)); /* Verify the result to prevent glitching attacks. */ - MBEDTLS_MPI_CHK( mbedtls_mpi_exp_mod( &C, &T, &ctx->E, - &ctx->N, &ctx->RN ) ); - if( mbedtls_mpi_cmp_mpi( &C, &I ) != 0 ) - { + MBEDTLS_MPI_CHK(mbedtls_mpi_exp_mod(&C, &T, &ctx->E, + &ctx->N, &ctx->RN)); + if (mbedtls_mpi_cmp_mpi(&C, &I) != 0) { ret = MBEDTLS_ERR_RSA_VERIFY_FAILED; goto cleanup; } olen = ctx->len; - MBEDTLS_MPI_CHK( mbedtls_mpi_write_binary( &T, output, olen ) ); + MBEDTLS_MPI_CHK(mbedtls_mpi_write_binary(&T, output, olen)); cleanup: #if defined(MBEDTLS_THREADING_C) - if( mbedtls_mutex_unlock( &ctx->mutex ) != 0 ) - return( MBEDTLS_ERR_THREADING_MUTEX_ERROR ); + if (mbedtls_mutex_unlock(&ctx->mutex) != 0) { + return MBEDTLS_ERR_THREADING_MUTEX_ERROR; + } #endif - mbedtls_mpi_free( &P1 ); - mbedtls_mpi_free( &Q1 ); - mbedtls_mpi_free( &R ); + mbedtls_mpi_free(&P1); + mbedtls_mpi_free(&Q1); + mbedtls_mpi_free(&R); #if defined(MBEDTLS_RSA_NO_CRT) - mbedtls_mpi_free( &D_blind ); + mbedtls_mpi_free(&D_blind); #else - mbedtls_mpi_free( &DP_blind ); - mbedtls_mpi_free( &DQ_blind ); + mbedtls_mpi_free(&DP_blind); + mbedtls_mpi_free(&DQ_blind); #endif - mbedtls_mpi_free( &T ); + mbedtls_mpi_free(&T); #if !defined(MBEDTLS_RSA_NO_CRT) - mbedtls_mpi_free( &TP ); mbedtls_mpi_free( &TQ ); + mbedtls_mpi_free(&TP); mbedtls_mpi_free(&TQ); #endif - mbedtls_mpi_free( &C ); - mbedtls_mpi_free( &I ); + mbedtls_mpi_free(&C); + mbedtls_mpi_free(&I); - if( ret != 0 && ret >= -0x007f ) - return( MBEDTLS_ERROR_ADD( MBEDTLS_ERR_RSA_PRIVATE_FAILED, ret ) ); + if (ret != 0 && ret >= -0x007f) { + return MBEDTLS_ERROR_ADD(MBEDTLS_ERR_RSA_PRIVATE_FAILED, ret); + } - return( ret ); + return ret; } #endif // FSP_NOT_DEFINED #if defined(MBEDTLS_PKCS1_V21) @@ -1112,43 +1099,86 @@ int mbedtls_rsa_private( mbedtls_rsa_context *ctx, * \param dlen length of destination buffer * \param src source of the mask generation * \param slen length of the source buffer - * \param md_ctx message digest context to use + * \param md_alg message digest to use */ -static int mgf_mask( unsigned char *dst, size_t dlen, unsigned char *src, - size_t slen, mbedtls_md_context_t *md_ctx ) +static int mgf_mask(unsigned char *dst, size_t dlen, unsigned char *src, + size_t slen, mbedtls_md_type_t md_alg) { - unsigned char mask[MBEDTLS_MD_MAX_SIZE]; unsigned char counter[4]; unsigned char *p; unsigned int hlen; size_t i, use_len; + unsigned char mask[MBEDTLS_HASH_MAX_SIZE]; +#if defined(MBEDTLS_MD_C) int ret = 0; + const mbedtls_md_info_t *md_info; + mbedtls_md_context_t md_ctx; + + mbedtls_md_init(&md_ctx); + md_info = mbedtls_md_info_from_type(md_alg); + if (md_info == NULL) { + return MBEDTLS_ERR_RSA_BAD_INPUT_DATA; + } + + mbedtls_md_init(&md_ctx); + if ((ret = mbedtls_md_setup(&md_ctx, md_info, 0)) != 0) { + goto exit; + } - memset( mask, 0, MBEDTLS_MD_MAX_SIZE ); - memset( counter, 0, 4 ); + hlen = mbedtls_md_get_size(md_info); +#else + psa_hash_operation_t op = PSA_HASH_OPERATION_INIT; + psa_algorithm_t alg = mbedtls_psa_translate_md(md_alg); + psa_status_t status = PSA_SUCCESS; + size_t out_len; + + hlen = PSA_HASH_LENGTH(alg); +#endif - hlen = mbedtls_md_get_size( md_ctx->md_info ); + memset(mask, 0, sizeof(mask)); + memset(counter, 0, 4); /* Generate and apply dbMask */ p = dst; - while( dlen > 0 ) - { + while (dlen > 0) { use_len = hlen; - if( dlen < hlen ) + if (dlen < hlen) { use_len = dlen; + } - if( ( ret = mbedtls_md_starts( md_ctx ) ) != 0 ) +#if defined(MBEDTLS_MD_C) + if ((ret = mbedtls_md_starts(&md_ctx)) != 0) { + goto exit; + } + if ((ret = mbedtls_md_update(&md_ctx, src, slen)) != 0) { + goto exit; + } + if ((ret = mbedtls_md_update(&md_ctx, counter, 4)) != 0) { + goto exit; + } + if ((ret = mbedtls_md_finish(&md_ctx, mask)) != 0) { + goto exit; + } +#else + if ((status = psa_hash_setup(&op, alg)) != PSA_SUCCESS) { goto exit; - if( ( ret = mbedtls_md_update( md_ctx, src, slen ) ) != 0 ) + } + if ((status = psa_hash_update(&op, src, slen)) != PSA_SUCCESS) { goto exit; - if( ( ret = mbedtls_md_update( md_ctx, counter, 4 ) ) != 0 ) + } + if ((status = psa_hash_update(&op, counter, 4)) != PSA_SUCCESS) { goto exit; - if( ( ret = mbedtls_md_finish( md_ctx, mask ) ) != 0 ) + } + status = psa_hash_finish(&op, mask, sizeof(mask), &out_len); + if (status != PSA_SUCCESS) { goto exit; + } +#endif - for( i = 0; i < use_len; ++i ) + for (i = 0; i < use_len; ++i) { *p++ ^= mask[i]; + } counter[3]++; @@ -1156,9 +1186,129 @@ static int mgf_mask( unsigned char *dst, size_t dlen, unsigned char *src, } exit: - mbedtls_platform_zeroize( mask, sizeof( mask ) ); + mbedtls_platform_zeroize(mask, sizeof(mask)); +#if defined(MBEDTLS_MD_C) + mbedtls_md_free(&md_ctx); + + return ret; +#else + psa_hash_abort(&op); + + return PSA_TO_MBEDTLS_ERR(status); +#endif +} + +/** + * Generate Hash(M') as in RFC 8017 page 43 points 5 and 6. + * + * \param hash the input hash + * \param hlen length of the input hash + * \param salt the input salt + * \param slen length of the input salt + * \param out the output buffer - must be large enough for \p md_alg + * \param md_alg message digest to use + */ +static int hash_mprime(const unsigned char *hash, size_t hlen, + const unsigned char *salt, size_t slen, + unsigned char *out, mbedtls_md_type_t md_alg) +{ + const unsigned char zeros[8] = { 0, 0, 0, 0, 0, 0, 0, 0 }; + +#if defined(MBEDTLS_MD_C) + mbedtls_md_context_t md_ctx; + int ret = MBEDTLS_ERR_ERROR_CORRUPTION_DETECTED; + + const mbedtls_md_info_t *md_info = mbedtls_md_info_from_type(md_alg); + if (md_info == NULL) { + return MBEDTLS_ERR_RSA_BAD_INPUT_DATA; + } + + mbedtls_md_init(&md_ctx); + if ((ret = mbedtls_md_setup(&md_ctx, md_info, 0)) != 0) { + goto exit; + } + if ((ret = mbedtls_md_starts(&md_ctx)) != 0) { + goto exit; + } + if ((ret = mbedtls_md_update(&md_ctx, zeros, sizeof(zeros))) != 0) { + goto exit; + } + if ((ret = mbedtls_md_update(&md_ctx, hash, hlen)) != 0) { + goto exit; + } + if ((ret = mbedtls_md_update(&md_ctx, salt, slen)) != 0) { + goto exit; + } + if ((ret = mbedtls_md_finish(&md_ctx, out)) != 0) { + goto exit; + } + +exit: + mbedtls_md_free(&md_ctx); + + return ret; +#else + psa_hash_operation_t op = PSA_HASH_OPERATION_INIT; + psa_algorithm_t alg = mbedtls_psa_translate_md(md_alg); + psa_status_t status = PSA_ERROR_CORRUPTION_DETECTED; + size_t out_size = PSA_HASH_LENGTH(alg); + size_t out_len; + + if ((status = psa_hash_setup(&op, alg)) != PSA_SUCCESS) { + goto exit; + } + if ((status = psa_hash_update(&op, zeros, sizeof(zeros))) != PSA_SUCCESS) { + goto exit; + } + if ((status = psa_hash_update(&op, hash, hlen)) != PSA_SUCCESS) { + goto exit; + } + if ((status = psa_hash_update(&op, salt, slen)) != PSA_SUCCESS) { + goto exit; + } + status = psa_hash_finish(&op, out, out_size, &out_len); + if (status != PSA_SUCCESS) { + goto exit; + } + +exit: + psa_hash_abort(&op); + + return PSA_TO_MBEDTLS_ERR(status); +#endif /* !MBEDTLS_MD_C */ +} + +/** + * Compute a hash. + * + * \param md_alg algorithm to use + * \param input input message to hash + * \param ilen input length + * \param output the output buffer - must be large enough for \p md_alg + */ +static int compute_hash(mbedtls_md_type_t md_alg, + const unsigned char *input, size_t ilen, + unsigned char *output) +{ +#if defined(MBEDTLS_MD_C) + const mbedtls_md_info_t *md_info; + + md_info = mbedtls_md_info_from_type(md_alg); + if (md_info == NULL) { + return MBEDTLS_ERR_RSA_BAD_INPUT_DATA; + } + + return mbedtls_md(md_info, input, ilen, output); +#else + psa_algorithm_t alg = mbedtls_psa_translate_md(md_alg); + psa_status_t status; + size_t out_size = PSA_HASH_LENGTH(alg); + size_t out_len; + + status = psa_hash_compute(alg, input, ilen, output, out_size, &out_len); - return( ret ); + return PSA_TO_MBEDTLS_ERR(status); +#endif /* !MBEDTLS_MD_C */ } #endif /* MBEDTLS_PKCS1_V21 */ @@ -1166,255 +1316,227 @@ static int mgf_mask( unsigned char *dst, size_t dlen, unsigned char *src, /* * Implementation of the PKCS#1 v2.1 RSAES-OAEP-ENCRYPT function */ -int mbedtls_rsa_rsaes_oaep_encrypt( mbedtls_rsa_context *ctx, - int (*f_rng)(void *, unsigned char *, size_t), - void *p_rng, - const unsigned char *label, size_t label_len, - size_t ilen, - const unsigned char *input, - unsigned char *output ) +int mbedtls_rsa_rsaes_oaep_encrypt(mbedtls_rsa_context *ctx, + int (*f_rng)(void *, unsigned char *, size_t), + void *p_rng, + const unsigned char *label, size_t label_len, + size_t ilen, + const unsigned char *input, + unsigned char *output) { size_t olen; int ret = MBEDTLS_ERR_ERROR_CORRUPTION_DETECTED; unsigned char *p = output; unsigned int hlen; - const mbedtls_md_info_t *md_info; - mbedtls_md_context_t md_ctx; - - RSA_VALIDATE_RET( ctx != NULL ); - RSA_VALIDATE_RET( output != NULL ); - RSA_VALIDATE_RET( ilen == 0 || input != NULL ); - RSA_VALIDATE_RET( label_len == 0 || label != NULL ); - if( f_rng == NULL ) - return( MBEDTLS_ERR_RSA_BAD_INPUT_DATA ); + if (f_rng == NULL) { + return MBEDTLS_ERR_RSA_BAD_INPUT_DATA; + } - md_info = mbedtls_md_info_from_type( (mbedtls_md_type_t) ctx->hash_id ); - if( md_info == NULL ) - return( MBEDTLS_ERR_RSA_BAD_INPUT_DATA ); + hlen = mbedtls_hash_info_get_size((mbedtls_md_type_t) ctx->hash_id); + if (hlen == 0) { + return MBEDTLS_ERR_RSA_BAD_INPUT_DATA; + } olen = ctx->len; - hlen = mbedtls_md_get_size( md_info ); /* first comparison checks for overflow */ - if( ilen + 2 * hlen + 2 < ilen || olen < ilen + 2 * hlen + 2 ) - return( MBEDTLS_ERR_RSA_BAD_INPUT_DATA ); + if (ilen + 2 * hlen + 2 < ilen || olen < ilen + 2 * hlen + 2) { + return MBEDTLS_ERR_RSA_BAD_INPUT_DATA; + } - memset( output, 0, olen ); + memset(output, 0, olen); *p++ = 0; /* Generate a random octet string seed */ - if( ( ret = f_rng( p_rng, p, hlen ) ) != 0 ) - return( MBEDTLS_ERROR_ADD( MBEDTLS_ERR_RSA_RNG_FAILED, ret ) ); + if ((ret = f_rng(p_rng, p, hlen)) != 0) { + return MBEDTLS_ERROR_ADD(MBEDTLS_ERR_RSA_RNG_FAILED, ret); + } p += hlen; /* Construct DB */ - if( ( ret = mbedtls_md( md_info, label, label_len, p ) ) != 0 ) - return( ret ); + ret = compute_hash((mbedtls_md_type_t) ctx->hash_id, label, label_len, p); + if (ret != 0) { + return ret; + } p += hlen; p += olen - 2 * hlen - 2 - ilen; *p++ = 1; - if( ilen != 0 ) - memcpy( p, input, ilen ); - - mbedtls_md_init( &md_ctx ); - if( ( ret = mbedtls_md_setup( &md_ctx, md_info, 0 ) ) != 0 ) - goto exit; + if (ilen != 0) { + memcpy(p, input, ilen); + } /* maskedDB: Apply dbMask to DB */ - if( ( ret = mgf_mask( output + hlen + 1, olen - hlen - 1, output + 1, hlen, - &md_ctx ) ) != 0 ) - goto exit; + if ((ret = mgf_mask(output + hlen + 1, olen - hlen - 1, output + 1, hlen, + (mbedtls_md_type_t) ctx->hash_id)) != 0) { + return ret; + } /* maskedSeed: Apply seedMask to seed */ - if( ( ret = mgf_mask( output + 1, hlen, output + hlen + 1, olen - hlen - 1, - &md_ctx ) ) != 0 ) - goto exit; - -exit: - mbedtls_md_free( &md_ctx ); - - if( ret != 0 ) - return( ret ); + if ((ret = mgf_mask(output + 1, hlen, output + hlen + 1, olen - hlen - 1, + (mbedtls_md_type_t)ctx->hash_id)) != 0) { + return ret; + } - return( mbedtls_rsa_public( ctx, output, output ) ); + return mbedtls_rsa_public(ctx, output, output); } #endif /* MBEDTLS_PKCS1_V21 */ - #if defined(MBEDTLS_PKCS1_V15) +#if defined(MBEDTLS_PKCS1_V15) /* * Implementation of the PKCS#1 v2.1 RSAES-PKCS1-V1_5-ENCRYPT function */ -int mbedtls_rsa_rsaes_pkcs1_v15_encrypt( mbedtls_rsa_context *ctx, - int (*f_rng)(void *, unsigned char *, size_t), - void *p_rng, size_t ilen, - const unsigned char *input, - unsigned char *output ) +int mbedtls_rsa_rsaes_pkcs1_v15_encrypt(mbedtls_rsa_context *ctx, + int (*f_rng)(void *, unsigned char *, size_t), + void *p_rng, size_t ilen, + const unsigned char *input, + unsigned char *output) { size_t nb_pad, olen; int ret = MBEDTLS_ERR_ERROR_CORRUPTION_DETECTED; unsigned char *p = output; - RSA_VALIDATE_RET( ctx != NULL ); - RSA_VALIDATE_RET( output != NULL ); - RSA_VALIDATE_RET( ilen == 0 || input != NULL ); - olen = ctx->len; /* first comparison checks for overflow */ - if( ilen + 11 < ilen || olen < ilen + 11 ) - return( MBEDTLS_ERR_RSA_BAD_INPUT_DATA ); + if (ilen + 11 < ilen || olen < ilen + 11) { + return MBEDTLS_ERR_RSA_BAD_INPUT_DATA; + } nb_pad = olen - 3 - ilen; *p++ = 0; - if( f_rng == NULL ) - return( MBEDTLS_ERR_RSA_BAD_INPUT_DATA ); + if (f_rng == NULL) { + return MBEDTLS_ERR_RSA_BAD_INPUT_DATA; + } *p++ = MBEDTLS_RSA_CRYPT; - while( nb_pad-- > 0 ) - { + while (nb_pad-- > 0) { int rng_dl = 100; do { - ret = f_rng( p_rng, p, 1 ); - } while( *p == 0 && --rng_dl && ret == 0 ); + ret = f_rng(p_rng, p, 1); + } while (*p == 0 && --rng_dl && ret == 0); /* Check if RNG failed to generate data */ - if( rng_dl == 0 || ret != 0 ) - return( MBEDTLS_ERROR_ADD( MBEDTLS_ERR_RSA_RNG_FAILED, ret ) ); + if (rng_dl == 0 || ret != 0) { + return MBEDTLS_ERROR_ADD(MBEDTLS_ERR_RSA_RNG_FAILED, ret); + } p++; } *p++ = 0; - if( ilen != 0 ) - memcpy( p, input, ilen ); + if (ilen != 0) { + memcpy(p, input, ilen); + } - return( mbedtls_rsa_public( ctx, output, output ) ); + return mbedtls_rsa_public(ctx, output, output); } #endif /* MBEDTLS_PKCS1_V15 */ /* * Add the message padding, then do an RSA operation */ -int mbedtls_rsa_pkcs1_encrypt( mbedtls_rsa_context *ctx, - int (*f_rng)(void *, unsigned char *, size_t), - void *p_rng, - size_t ilen, - const unsigned char *input, - unsigned char *output ) +int mbedtls_rsa_pkcs1_encrypt(mbedtls_rsa_context *ctx, + int (*f_rng)(void *, unsigned char *, size_t), + void *p_rng, + size_t ilen, + const unsigned char *input, + unsigned char *output) { - RSA_VALIDATE_RET( ctx != NULL ); - RSA_VALIDATE_RET( output != NULL ); - RSA_VALIDATE_RET( ilen == 0 || input != NULL ); - - switch( ctx->padding ) - { + switch (ctx->padding) { #if defined(MBEDTLS_PKCS1_V15) case MBEDTLS_RSA_PKCS_V15: - return mbedtls_rsa_rsaes_pkcs1_v15_encrypt( ctx, f_rng, p_rng, - ilen, input, output ); + return mbedtls_rsa_rsaes_pkcs1_v15_encrypt(ctx, f_rng, p_rng, + ilen, input, output); #endif #if defined(MBEDTLS_PKCS1_V21) case MBEDTLS_RSA_PKCS_V21: - return mbedtls_rsa_rsaes_oaep_encrypt( ctx, f_rng, p_rng, NULL, 0, - ilen, input, output ); + return mbedtls_rsa_rsaes_oaep_encrypt(ctx, f_rng, p_rng, NULL, 0, + ilen, input, output); #endif default: - return( MBEDTLS_ERR_RSA_INVALID_PADDING ); + return MBEDTLS_ERR_RSA_INVALID_PADDING; } } - #if defined(MBEDTLS_PKCS1_V21) +#if defined(MBEDTLS_PKCS1_V21) /* * Implementation of the PKCS#1 v2.1 RSAES-OAEP-DECRYPT function */ -int mbedtls_rsa_rsaes_oaep_decrypt( mbedtls_rsa_context *ctx, - int (*f_rng)(void *, unsigned char *, size_t), - void *p_rng, - const unsigned char *label, size_t label_len, - size_t *olen, - const unsigned char *input, - unsigned char *output, - size_t output_max_len ) +int mbedtls_rsa_rsaes_oaep_decrypt(mbedtls_rsa_context *ctx, + int (*f_rng)(void *, unsigned char *, size_t), + void *p_rng, + const unsigned char *label, size_t label_len, + size_t *olen, + const unsigned char *input, + unsigned char *output, + size_t output_max_len) { int ret = MBEDTLS_ERR_ERROR_CORRUPTION_DETECTED; size_t ilen, i, pad_len; unsigned char *p, bad, pad_done; unsigned char buf[MBEDTLS_MPI_MAX_SIZE]; - unsigned char lhash[MBEDTLS_MD_MAX_SIZE]; + unsigned char lhash[MBEDTLS_HASH_MAX_SIZE]; unsigned int hlen; - const mbedtls_md_info_t *md_info; - mbedtls_md_context_t md_ctx; - - RSA_VALIDATE_RET( ctx != NULL ); - RSA_VALIDATE_RET( output_max_len == 0 || output != NULL ); - RSA_VALIDATE_RET( label_len == 0 || label != NULL ); - RSA_VALIDATE_RET( input != NULL ); - RSA_VALIDATE_RET( olen != NULL ); /* * Parameters sanity checks */ - if( ctx->padding != MBEDTLS_RSA_PKCS_V21 ) - return( MBEDTLS_ERR_RSA_BAD_INPUT_DATA ); + if (ctx->padding != MBEDTLS_RSA_PKCS_V21) { + return MBEDTLS_ERR_RSA_BAD_INPUT_DATA; + } ilen = ctx->len; - if( ilen < 16 || ilen > sizeof( buf ) ) - return( MBEDTLS_ERR_RSA_BAD_INPUT_DATA ); - - md_info = mbedtls_md_info_from_type( (mbedtls_md_type_t) ctx->hash_id ); - if( md_info == NULL ) - return( MBEDTLS_ERR_RSA_BAD_INPUT_DATA ); + if (ilen < 16 || ilen > sizeof(buf)) { + return MBEDTLS_ERR_RSA_BAD_INPUT_DATA; + } - hlen = mbedtls_md_get_size( md_info ); + hlen = mbedtls_hash_info_get_size((mbedtls_md_type_t) ctx->hash_id); + if (hlen == 0) { + return MBEDTLS_ERR_RSA_BAD_INPUT_DATA; + } // checking for integer underflow - if( 2 * hlen + 2 > ilen ) - return( MBEDTLS_ERR_RSA_BAD_INPUT_DATA ); + if (2 * hlen + 2 > ilen) { + return MBEDTLS_ERR_RSA_BAD_INPUT_DATA; + } /* * RSA operation */ - ret = mbedtls_rsa_private( ctx, f_rng, p_rng, input, buf ); + ret = mbedtls_rsa_private(ctx, f_rng, p_rng, input, buf); - if( ret != 0 ) + if (ret != 0) { goto cleanup; + } /* * Unmask data and generate lHash */ - mbedtls_md_init( &md_ctx ); - if( ( ret = mbedtls_md_setup( &md_ctx, md_info, 0 ) ) != 0 ) - { - mbedtls_md_free( &md_ctx ); - goto cleanup; - } - /* seed: Apply seedMask to maskedSeed */ - if( ( ret = mgf_mask( buf + 1, hlen, buf + hlen + 1, ilen - hlen - 1, - &md_ctx ) ) != 0 || - /* DB: Apply dbMask to maskedDB */ - ( ret = mgf_mask( buf + hlen + 1, ilen - hlen - 1, buf + 1, hlen, - &md_ctx ) ) != 0 ) - { - mbedtls_md_free( &md_ctx ); + if ((ret = mgf_mask(buf + 1, hlen, buf + hlen + 1, ilen - hlen - 1, + (mbedtls_md_type_t) ctx->hash_id)) != 0 || + /* DB: Apply dbMask to maskedDB */ + (ret = mgf_mask(buf + hlen + 1, ilen - hlen - 1, buf + 1, hlen, + (mbedtls_md_type_t) ctx->hash_id)) != 0) { goto cleanup; } - mbedtls_md_free( &md_ctx ); - /* Generate lHash */ - if( ( ret = mbedtls_md( md_info, label, label_len, lhash ) ) != 0 ) + ret = compute_hash((mbedtls_md_type_t) ctx->hash_id, + label, label_len, lhash); + if (ret != 0) { goto cleanup; + } /* * Check contents, in "constant-time" @@ -1427,17 +1549,17 @@ int mbedtls_rsa_rsaes_oaep_decrypt( mbedtls_rsa_context *ctx, p += hlen; /* Skip seed */ /* Check lHash */ - for( i = 0; i < hlen; i++ ) + for (i = 0; i < hlen; i++) { bad |= lhash[i] ^ *p++; + } /* Get zero-padding len, but always read till end of buffer * (minus one, for the 01 byte) */ pad_len = 0; pad_done = 0; - for( i = 0; i < ilen - 2 * hlen - 2; i++ ) - { + for (i = 0; i < ilen - 2 * hlen - 2; i++) { pad_done |= p[i]; - pad_len += ((pad_done | (unsigned char)-pad_done) >> 7) ^ 1; + pad_len += ((pad_done | (unsigned char) -pad_done) >> 7) ^ 1; } p += pad_len; @@ -1449,120 +1571,111 @@ int mbedtls_rsa_rsaes_oaep_decrypt( mbedtls_rsa_context *ctx, * recommendations in PKCS#1 v2.2: an opponent cannot distinguish between * the different error conditions. */ - if( bad != 0 ) - { + if (bad != 0) { ret = MBEDTLS_ERR_RSA_INVALID_PADDING; goto cleanup; } - if( ilen - ( p - buf ) > output_max_len ) - { + if (ilen - (p - buf) > output_max_len) { ret = MBEDTLS_ERR_RSA_OUTPUT_TOO_LARGE; goto cleanup; } *olen = ilen - (p - buf); - if( *olen != 0 ) - memcpy( output, p, *olen ); + if (*olen != 0) { + memcpy(output, p, *olen); + } ret = 0; cleanup: - mbedtls_platform_zeroize( buf, sizeof( buf ) ); - mbedtls_platform_zeroize( lhash, sizeof( lhash ) ); + mbedtls_platform_zeroize(buf, sizeof(buf)); + mbedtls_platform_zeroize(lhash, sizeof(lhash)); - return( ret ); + return ret; } #endif /* MBEDTLS_PKCS1_V21 */ - #if defined(MBEDTLS_PKCS1_V15) +#if defined(MBEDTLS_PKCS1_V15) /* * Implementation of the PKCS#1 v2.1 RSAES-PKCS1-V1_5-DECRYPT function */ -int mbedtls_rsa_rsaes_pkcs1_v15_decrypt( mbedtls_rsa_context *ctx, - int (*f_rng)(void *, unsigned char *, size_t), - void *p_rng, - size_t *olen, - const unsigned char *input, - unsigned char *output, - size_t output_max_len ) +int mbedtls_rsa_rsaes_pkcs1_v15_decrypt(mbedtls_rsa_context *ctx, + int (*f_rng)(void *, unsigned char *, size_t), + void *p_rng, + size_t *olen, + const unsigned char *input, + unsigned char *output, + size_t output_max_len) { int ret = MBEDTLS_ERR_ERROR_CORRUPTION_DETECTED; size_t ilen; unsigned char buf[MBEDTLS_MPI_MAX_SIZE]; - RSA_VALIDATE_RET( ctx != NULL ); - RSA_VALIDATE_RET( output_max_len == 0 || output != NULL ); - RSA_VALIDATE_RET( input != NULL ); - RSA_VALIDATE_RET( olen != NULL ); - ilen = ctx->len; - if( ctx->padding != MBEDTLS_RSA_PKCS_V15 ) - return( MBEDTLS_ERR_RSA_BAD_INPUT_DATA ); + if (ctx->padding != MBEDTLS_RSA_PKCS_V15) { + return MBEDTLS_ERR_RSA_BAD_INPUT_DATA; + } - if( ilen < 16 || ilen > sizeof( buf ) ) - return( MBEDTLS_ERR_RSA_BAD_INPUT_DATA ); + if (ilen < 16 || ilen > sizeof(buf)) { + return MBEDTLS_ERR_RSA_BAD_INPUT_DATA; + } - ret = mbedtls_rsa_private( ctx, f_rng, p_rng, input, buf ); + ret = mbedtls_rsa_private(ctx, f_rng, p_rng, input, buf); - if( ret != 0 ) + if (ret != 0) { goto cleanup; + } - ret = mbedtls_ct_rsaes_pkcs1_v15_unpadding( buf, ilen, - output, output_max_len, olen ); + ret = mbedtls_ct_rsaes_pkcs1_v15_unpadding(buf, ilen, + output, output_max_len, olen); cleanup: - mbedtls_platform_zeroize( buf, sizeof( buf ) ); + mbedtls_platform_zeroize(buf, sizeof(buf)); - return( ret ); + return ret; } #endif /* MBEDTLS_PKCS1_V15 */ /* * Do an RSA operation, then remove the message padding */ -int mbedtls_rsa_pkcs1_decrypt( mbedtls_rsa_context *ctx, - int (*f_rng)(void *, unsigned char *, size_t), - void *p_rng, - size_t *olen, - const unsigned char *input, - unsigned char *output, - size_t output_max_len) +int mbedtls_rsa_pkcs1_decrypt(mbedtls_rsa_context *ctx, + int (*f_rng)(void *, unsigned char *, size_t), + void *p_rng, + size_t *olen, + const unsigned char *input, + unsigned char *output, + size_t output_max_len) { - RSA_VALIDATE_RET( ctx != NULL ); - RSA_VALIDATE_RET( output_max_len == 0 || output != NULL ); - RSA_VALIDATE_RET( input != NULL ); - RSA_VALIDATE_RET( olen != NULL ); - - switch( ctx->padding ) - { + switch (ctx->padding) { #if defined(MBEDTLS_PKCS1_V15) case MBEDTLS_RSA_PKCS_V15: - return mbedtls_rsa_rsaes_pkcs1_v15_decrypt( ctx, f_rng, p_rng, olen, - input, output, output_max_len ); + return mbedtls_rsa_rsaes_pkcs1_v15_decrypt(ctx, f_rng, p_rng, olen, + input, output, output_max_len); #endif #if defined(MBEDTLS_PKCS1_V21) case MBEDTLS_RSA_PKCS_V21: - return mbedtls_rsa_rsaes_oaep_decrypt( ctx, f_rng, p_rng, NULL, 0, - olen, input, output, - output_max_len ); + return mbedtls_rsa_rsaes_oaep_decrypt(ctx, f_rng, p_rng, NULL, 0, + olen, input, output, + output_max_len); #endif default: - return( MBEDTLS_ERR_RSA_INVALID_PADDING ); + return MBEDTLS_ERR_RSA_INVALID_PADDING; } } #if defined(MBEDTLS_PKCS1_V21) -static int rsa_rsassa_pss_sign( mbedtls_rsa_context *ctx, - int (*f_rng)(void *, unsigned char *, size_t), - void *p_rng, - mbedtls_md_type_t md_alg, - unsigned int hashlen, - const unsigned char *hash, - int saltlen, - unsigned char *sig ) +static int rsa_rsassa_pss_sign(mbedtls_rsa_context *ctx, + int (*f_rng)(void *, unsigned char *, size_t), + void *p_rng, + mbedtls_md_type_t md_alg, + unsigned int hashlen, + const unsigned char *hash, + int saltlen, + unsigned char *sig) { size_t olen; unsigned char *p = sig; @@ -1570,150 +1683,133 @@ static int rsa_rsassa_pss_sign( mbedtls_rsa_context *ctx, size_t slen, min_slen, hlen, offset = 0; int ret = MBEDTLS_ERR_ERROR_CORRUPTION_DETECTED; size_t msb; - const mbedtls_md_info_t *md_info; - mbedtls_md_context_t md_ctx; - RSA_VALIDATE_RET( ctx != NULL ); - RSA_VALIDATE_RET( ( md_alg == MBEDTLS_MD_NONE && - hashlen == 0 ) || - hash != NULL ); - RSA_VALIDATE_RET( sig != NULL ); - if( ctx->padding != MBEDTLS_RSA_PKCS_V21 ) - return( MBEDTLS_ERR_RSA_BAD_INPUT_DATA ); + if ((md_alg != MBEDTLS_MD_NONE || hashlen != 0) && hash == NULL) { + return MBEDTLS_ERR_RSA_BAD_INPUT_DATA; + } + + if (ctx->padding != MBEDTLS_RSA_PKCS_V21) { + return MBEDTLS_ERR_RSA_BAD_INPUT_DATA; + } - if( f_rng == NULL ) - return( MBEDTLS_ERR_RSA_BAD_INPUT_DATA ); + if (f_rng == NULL) { + return MBEDTLS_ERR_RSA_BAD_INPUT_DATA; + } olen = ctx->len; - if( md_alg != MBEDTLS_MD_NONE ) - { + if (md_alg != MBEDTLS_MD_NONE) { /* Gather length of hash to sign */ - md_info = mbedtls_md_info_from_type( md_alg ); - if( md_info == NULL ) - return( MBEDTLS_ERR_RSA_BAD_INPUT_DATA ); + size_t exp_hashlen = mbedtls_hash_info_get_size(md_alg); + if (exp_hashlen == 0) { + return MBEDTLS_ERR_RSA_BAD_INPUT_DATA; + } - if( hashlen != mbedtls_md_get_size( md_info ) ) - return( MBEDTLS_ERR_RSA_BAD_INPUT_DATA ); + if (hashlen != exp_hashlen) { + return MBEDTLS_ERR_RSA_BAD_INPUT_DATA; + } } - md_info = mbedtls_md_info_from_type( (mbedtls_md_type_t) ctx->hash_id ); - if( md_info == NULL ) - return( MBEDTLS_ERR_RSA_BAD_INPUT_DATA ); - - hlen = mbedtls_md_get_size( md_info ); + hlen = mbedtls_hash_info_get_size((mbedtls_md_type_t) ctx->hash_id); + if (hlen == 0) { + return MBEDTLS_ERR_RSA_BAD_INPUT_DATA; + } - if (saltlen == MBEDTLS_RSA_SALT_LEN_ANY) - { - /* Calculate the largest possible salt length, up to the hash size. - * Normally this is the hash length, which is the maximum salt length - * according to FIPS 185-4 §5.5 (e) and common practice. If there is not - * enough room, use the maximum salt length that fits. The constraint is - * that the hash length plus the salt length plus 2 bytes must be at most - * the key length. This complies with FIPS 186-4 §5.5 (e) and RFC 8017 - * (PKCS#1 v2.2) §9.1.1 step 3. */ + if (saltlen == MBEDTLS_RSA_SALT_LEN_ANY) { + /* Calculate the largest possible salt length, up to the hash size. + * Normally this is the hash length, which is the maximum salt length + * according to FIPS 185-4 §5.5 (e) and common practice. If there is not + * enough room, use the maximum salt length that fits. The constraint is + * that the hash length plus the salt length plus 2 bytes must be at most + * the key length. This complies with FIPS 186-4 §5.5 (e) and RFC 8017 + * (PKCS#1 v2.2) §9.1.1 step 3. */ min_slen = hlen - 2; - if( olen < hlen + min_slen + 2 ) - return( MBEDTLS_ERR_RSA_BAD_INPUT_DATA ); - else if( olen >= hlen + hlen + 2 ) + if (olen < hlen + min_slen + 2) { + return MBEDTLS_ERR_RSA_BAD_INPUT_DATA; + } else if (olen >= hlen + hlen + 2) { slen = hlen; - else + } else { slen = olen - hlen - 2; - } - else if ( (saltlen < 0) || (saltlen + hlen + 2 > olen) ) - { - return( MBEDTLS_ERR_RSA_BAD_INPUT_DATA ); - } - else - { + } + } else if ((saltlen < 0) || (saltlen + hlen + 2 > olen)) { + return MBEDTLS_ERR_RSA_BAD_INPUT_DATA; + } else { slen = (size_t) saltlen; } - memset( sig, 0, olen ); + memset(sig, 0, olen); /* Note: EMSA-PSS encoding is over the length of N - 1 bits */ - msb = mbedtls_mpi_bitlen( &ctx->N ) - 1; + msb = mbedtls_mpi_bitlen(&ctx->N) - 1; p += olen - hlen - slen - 2; *p++ = 0x01; /* Generate salt of length slen in place in the encoded message */ salt = p; - if( ( ret = f_rng( p_rng, salt, slen ) ) != 0 ) - return( MBEDTLS_ERROR_ADD( MBEDTLS_ERR_RSA_RNG_FAILED, ret ) ); + if ((ret = f_rng(p_rng, salt, slen)) != 0) { + return MBEDTLS_ERROR_ADD(MBEDTLS_ERR_RSA_RNG_FAILED, ret); + } p += slen; - mbedtls_md_init( &md_ctx ); - if( ( ret = mbedtls_md_setup( &md_ctx, md_info, 0 ) ) != 0 ) - goto exit; - /* Generate H = Hash( M' ) */ - if( ( ret = mbedtls_md_starts( &md_ctx ) ) != 0 ) - goto exit; - if( ( ret = mbedtls_md_update( &md_ctx, p, 8 ) ) != 0 ) - goto exit; - if( ( ret = mbedtls_md_update( &md_ctx, hash, hashlen ) ) != 0 ) - goto exit; - if( ( ret = mbedtls_md_update( &md_ctx, salt, slen ) ) != 0 ) - goto exit; - if( ( ret = mbedtls_md_finish( &md_ctx, p ) ) != 0 ) - goto exit; + ret = hash_mprime(hash, hashlen, salt, slen, p, (mbedtls_md_type_t) ctx->hash_id); + if (ret != 0) { + return ret; + } /* Compensate for boundary condition when applying mask */ - if( msb % 8 == 0 ) + if (msb % 8 == 0) { offset = 1; + } /* maskedDB: Apply dbMask to DB */ - if( ( ret = mgf_mask( sig + offset, olen - hlen - 1 - offset, p, hlen, - &md_ctx ) ) != 0 ) - goto exit; + ret = mgf_mask(sig + offset, olen - hlen - 1 - offset, p, hlen, + (mbedtls_md_type_t) ctx->hash_id); + if (ret != 0) { + return ret; + } - msb = mbedtls_mpi_bitlen( &ctx->N ) - 1; - sig[0] &= 0xFF >> ( olen * 8 - msb ); + msb = mbedtls_mpi_bitlen(&ctx->N) - 1; + sig[0] &= 0xFF >> (olen * 8 - msb); p += hlen; *p++ = 0xBC; -exit: - mbedtls_md_free( &md_ctx ); - - if( ret != 0 ) - return( ret ); - - return mbedtls_rsa_private( ctx, f_rng, p_rng, sig, sig ); + return mbedtls_rsa_private(ctx, f_rng, p_rng, sig, sig); } /* * Implementation of the PKCS#1 v2.1 RSASSA-PSS-SIGN function with * the option to pass in the salt length. */ -int mbedtls_rsa_rsassa_pss_sign_ext( mbedtls_rsa_context *ctx, - int (*f_rng)(void *, unsigned char *, size_t), - void *p_rng, - mbedtls_md_type_t md_alg, - unsigned int hashlen, - const unsigned char *hash, - int saltlen, - unsigned char *sig ) +int mbedtls_rsa_rsassa_pss_sign_ext(mbedtls_rsa_context *ctx, + int (*f_rng)(void *, unsigned char *, size_t), + void *p_rng, + mbedtls_md_type_t md_alg, + unsigned int hashlen, + const unsigned char *hash, + int saltlen, + unsigned char *sig) { - return rsa_rsassa_pss_sign( ctx, f_rng, p_rng, md_alg, - hashlen, hash, saltlen, sig ); + return rsa_rsassa_pss_sign(ctx, f_rng, p_rng, md_alg, + hashlen, hash, saltlen, sig); } /* * Implementation of the PKCS#1 v2.1 RSASSA-PSS-SIGN function */ -int mbedtls_rsa_rsassa_pss_sign( mbedtls_rsa_context *ctx, - int (*f_rng)(void *, unsigned char *, size_t), - void *p_rng, - mbedtls_md_type_t md_alg, - unsigned int hashlen, - const unsigned char *hash, - unsigned char *sig ) +int mbedtls_rsa_rsassa_pss_sign(mbedtls_rsa_context *ctx, + int (*f_rng)(void *, unsigned char *, size_t), + void *p_rng, + mbedtls_md_type_t md_alg, + unsigned int hashlen, + const unsigned char *hash, + unsigned char *sig) { - return rsa_rsassa_pss_sign( ctx, f_rng, p_rng, md_alg, - hashlen, hash, MBEDTLS_RSA_SALT_LEN_ANY, sig ); + return rsa_rsassa_pss_sign(ctx, f_rng, p_rng, md_alg, + hashlen, hash, MBEDTLS_RSA_SALT_LEN_ANY, sig); } #endif /* MBEDTLS_PKCS1_V21 */ @@ -1739,11 +1835,11 @@ int mbedtls_rsa_rsassa_pss_sign( mbedtls_rsa_context *ctx, * - dst points to a buffer of size at least dst_len. * */ -static int rsa_rsassa_pkcs1_v15_encode( mbedtls_md_type_t md_alg, - unsigned int hashlen, - const unsigned char *hash, - size_t dst_len, - unsigned char *dst ) +static int rsa_rsassa_pkcs1_v15_encode(mbedtls_md_type_t md_alg, + unsigned int hashlen, + const unsigned char *hash, + size_t dst_len, + unsigned char *dst) { size_t oid_size = 0; size_t nb_pad = dst_len; @@ -1751,24 +1847,27 @@ static int rsa_rsassa_pkcs1_v15_encode( mbedtls_md_type_t md_alg, const char *oid = NULL; /* Are we signing hashed or raw data? */ - if( md_alg != MBEDTLS_MD_NONE ) - { - const mbedtls_md_info_t *md_info = mbedtls_md_info_from_type( md_alg ); - if( md_info == NULL ) - return( MBEDTLS_ERR_RSA_BAD_INPUT_DATA ); + if (md_alg != MBEDTLS_MD_NONE) { + unsigned char md_size = mbedtls_hash_info_get_size(md_alg); + if (md_size == 0) { + return MBEDTLS_ERR_RSA_BAD_INPUT_DATA; + } - if( mbedtls_oid_get_oid_by_md( md_alg, &oid, &oid_size ) != 0 ) - return( MBEDTLS_ERR_RSA_BAD_INPUT_DATA ); + if (mbedtls_oid_get_oid_by_md(md_alg, &oid, &oid_size) != 0) { + return MBEDTLS_ERR_RSA_BAD_INPUT_DATA; + } - if( hashlen != mbedtls_md_get_size( md_info ) ) - return( MBEDTLS_ERR_RSA_BAD_INPUT_DATA ); + if (hashlen != md_size) { + return MBEDTLS_ERR_RSA_BAD_INPUT_DATA; + } /* Double-check that 8 + hashlen + oid_size can be used as a * 1-byte ASN.1 length encoding and that there's no overflow. */ - if( 8 + hashlen + oid_size >= 0x80 || + if (8 + hashlen + oid_size >= 0x80 || 10 + hashlen < hashlen || - 10 + hashlen + oid_size < 10 + hashlen ) - return( MBEDTLS_ERR_RSA_BAD_INPUT_DATA ); + 10 + hashlen + oid_size < 10 + hashlen) { + return MBEDTLS_ERR_RSA_BAD_INPUT_DATA; + } /* * Static bounds check: @@ -1778,22 +1877,23 @@ static int rsa_rsassa_pkcs1_v15_encode( mbedtls_md_type_t md_alg, * - Need hashlen bytes for hash * - Need oid_size bytes for hash alg OID. */ - if( nb_pad < 10 + hashlen + oid_size ) - return( MBEDTLS_ERR_RSA_BAD_INPUT_DATA ); + if (nb_pad < 10 + hashlen + oid_size) { + return MBEDTLS_ERR_RSA_BAD_INPUT_DATA; + } nb_pad -= 10 + hashlen + oid_size; - } - else - { - if( nb_pad < hashlen ) - return( MBEDTLS_ERR_RSA_BAD_INPUT_DATA ); + } else { + if (nb_pad < hashlen) { + return MBEDTLS_ERR_RSA_BAD_INPUT_DATA; + } nb_pad -= hashlen; } /* Need space for signature header and padding delimiter (3 bytes), * and 8 bytes for the minimal padding */ - if( nb_pad < 3 + 8 ) - return( MBEDTLS_ERR_RSA_BAD_INPUT_DATA ); + if (nb_pad < 3 + 8) { + return MBEDTLS_ERR_RSA_BAD_INPUT_DATA; + } nb_pad -= 3; /* Now nb_pad is the amount of memory to be filled @@ -1802,15 +1902,14 @@ static int rsa_rsassa_pkcs1_v15_encode( mbedtls_md_type_t md_alg, /* Write signature header and padding */ *p++ = 0; *p++ = MBEDTLS_RSA_SIGN; - memset( p, 0xFF, nb_pad ); + memset(p, 0xFF, nb_pad); p += nb_pad; *p++ = 0; /* Are we signing raw data? */ - if( md_alg == MBEDTLS_MD_NONE ) - { - memcpy( p, hash, hashlen ); - return( 0 ); + if (md_alg == MBEDTLS_MD_NONE) { + memcpy(p, hash, hashlen); + return 0; } /* Signing hashed data, add corresponding ASN.1 structure @@ -1827,61 +1926,60 @@ static int rsa_rsassa_pkcs1_v15_encode( mbedtls_md_type_t md_alg, * TAG-OCTET + LEN [ HASH ] ] */ *p++ = MBEDTLS_ASN1_SEQUENCE | MBEDTLS_ASN1_CONSTRUCTED; - *p++ = (unsigned char)( 0x08 + oid_size + hashlen ); + *p++ = (unsigned char) (0x08 + oid_size + hashlen); *p++ = MBEDTLS_ASN1_SEQUENCE | MBEDTLS_ASN1_CONSTRUCTED; - *p++ = (unsigned char)( 0x04 + oid_size ); + *p++ = (unsigned char) (0x04 + oid_size); *p++ = MBEDTLS_ASN1_OID; *p++ = (unsigned char) oid_size; - memcpy( p, oid, oid_size ); + memcpy(p, oid, oid_size); p += oid_size; *p++ = MBEDTLS_ASN1_NULL; *p++ = 0x00; *p++ = MBEDTLS_ASN1_OCTET_STRING; *p++ = (unsigned char) hashlen; - memcpy( p, hash, hashlen ); + memcpy(p, hash, hashlen); p += hashlen; /* Just a sanity-check, should be automatic * after the initial bounds check. */ - if( p != dst + dst_len ) - { - mbedtls_platform_zeroize( dst, dst_len ); - return( MBEDTLS_ERR_RSA_BAD_INPUT_DATA ); + if (p != dst + dst_len) { + mbedtls_platform_zeroize(dst, dst_len); + return MBEDTLS_ERR_RSA_BAD_INPUT_DATA; } - return( 0 ); + return 0; } /* * Do an RSA operation to sign the message digest */ -int mbedtls_rsa_rsassa_pkcs1_v15_sign( mbedtls_rsa_context *ctx, - int (*f_rng)(void *, unsigned char *, size_t), - void *p_rng, - mbedtls_md_type_t md_alg, - unsigned int hashlen, - const unsigned char *hash, - unsigned char *sig ) +int mbedtls_rsa_rsassa_pkcs1_v15_sign(mbedtls_rsa_context *ctx, + int (*f_rng)(void *, unsigned char *, size_t), + void *p_rng, + mbedtls_md_type_t md_alg, + unsigned int hashlen, + const unsigned char *hash, + unsigned char *sig) { int ret = MBEDTLS_ERR_ERROR_CORRUPTION_DETECTED; unsigned char *sig_try = NULL, *verif = NULL; - RSA_VALIDATE_RET( ctx != NULL ); - RSA_VALIDATE_RET( ( md_alg == MBEDTLS_MD_NONE && - hashlen == 0 ) || - hash != NULL ); - RSA_VALIDATE_RET( sig != NULL ); + if ((md_alg != MBEDTLS_MD_NONE || hashlen != 0) && hash == NULL) { + return MBEDTLS_ERR_RSA_BAD_INPUT_DATA; + } - if( ctx->padding != MBEDTLS_RSA_PKCS_V15 ) - return( MBEDTLS_ERR_RSA_BAD_INPUT_DATA ); + if (ctx->padding != MBEDTLS_RSA_PKCS_V15) { + return MBEDTLS_ERR_RSA_BAD_INPUT_DATA; + } /* * Prepare PKCS1-v1.5 encoding (padding and hash identifier) */ - if( ( ret = rsa_rsassa_pkcs1_v15_encode( md_alg, hashlen, hash, - ctx->len, sig ) ) != 0 ) - return( ret ); + if ((ret = rsa_rsassa_pkcs1_v15_encode(md_alg, hashlen, hash, + ctx->len, sig)) != 0) { + return ret; + } /* Private key operation * @@ -1889,73 +1987,70 @@ int mbedtls_rsa_rsassa_pkcs1_v15_sign( mbedtls_rsa_context *ctx, * temporary buffer and check it before returning it. */ - sig_try = mbedtls_calloc( 1, ctx->len ); - if( sig_try == NULL ) - return( MBEDTLS_ERR_MPI_ALLOC_FAILED ); + sig_try = mbedtls_calloc(1, ctx->len); + if (sig_try == NULL) { + return MBEDTLS_ERR_MPI_ALLOC_FAILED; + } - verif = mbedtls_calloc( 1, ctx->len ); - if( verif == NULL ) - { - mbedtls_free( sig_try ); - return( MBEDTLS_ERR_MPI_ALLOC_FAILED ); + verif = mbedtls_calloc(1, ctx->len); + if (verif == NULL) { + mbedtls_free(sig_try); + return MBEDTLS_ERR_MPI_ALLOC_FAILED; } - MBEDTLS_MPI_CHK( mbedtls_rsa_private( ctx, f_rng, p_rng, sig, sig_try ) ); - MBEDTLS_MPI_CHK( mbedtls_rsa_public( ctx, sig_try, verif ) ); + MBEDTLS_MPI_CHK(mbedtls_rsa_private(ctx, f_rng, p_rng, sig, sig_try)); + MBEDTLS_MPI_CHK(mbedtls_rsa_public(ctx, sig_try, verif)); - if( mbedtls_ct_memcmp( verif, sig, ctx->len ) != 0 ) - { + if (mbedtls_ct_memcmp(verif, sig, ctx->len) != 0) { ret = MBEDTLS_ERR_RSA_PRIVATE_FAILED; goto cleanup; } - memcpy( sig, sig_try, ctx->len ); + memcpy(sig, sig_try, ctx->len); cleanup: - mbedtls_platform_zeroize( sig_try, ctx->len ); - mbedtls_platform_zeroize( verif, ctx->len ); - mbedtls_free( sig_try ); - mbedtls_free( verif ); - - if( ret != 0 ) - memset( sig, '!', ctx->len ); - return( ret ); + mbedtls_platform_zeroize(sig_try, ctx->len); + mbedtls_platform_zeroize(verif, ctx->len); + mbedtls_free(sig_try); + mbedtls_free(verif); + + if (ret != 0) { + memset(sig, '!', ctx->len); + } + return ret; } #endif /* MBEDTLS_PKCS1_V15 */ /* * Do an RSA operation to sign the message digest */ -int mbedtls_rsa_pkcs1_sign( mbedtls_rsa_context *ctx, - int (*f_rng)(void *, unsigned char *, size_t), - void *p_rng, - mbedtls_md_type_t md_alg, - unsigned int hashlen, - const unsigned char *hash, - unsigned char *sig ) +int mbedtls_rsa_pkcs1_sign(mbedtls_rsa_context *ctx, + int (*f_rng)(void *, unsigned char *, size_t), + void *p_rng, + mbedtls_md_type_t md_alg, + unsigned int hashlen, + const unsigned char *hash, + unsigned char *sig) { - RSA_VALIDATE_RET( ctx != NULL ); - RSA_VALIDATE_RET( ( md_alg == MBEDTLS_MD_NONE && - hashlen == 0 ) || - hash != NULL ); - RSA_VALIDATE_RET( sig != NULL ); - - switch( ctx->padding ) - { + if ((md_alg != MBEDTLS_MD_NONE || hashlen != 0) && hash == NULL) { + return MBEDTLS_ERR_RSA_BAD_INPUT_DATA; + } + + switch (ctx->padding) { #if defined(MBEDTLS_PKCS1_V15) case MBEDTLS_RSA_PKCS_V15: - return mbedtls_rsa_rsassa_pkcs1_v15_sign( ctx, f_rng, p_rng, - md_alg, hashlen, hash, sig ); + return mbedtls_rsa_rsassa_pkcs1_v15_sign(ctx, f_rng, p_rng, + md_alg, hashlen, hash, sig); #endif #if defined(MBEDTLS_PKCS1_V21) case MBEDTLS_RSA_PKCS_V21: - return mbedtls_rsa_rsassa_pss_sign( ctx, f_rng, p_rng, md_alg, - hashlen, hash, sig ); + return mbedtls_rsa_rsassa_pss_sign(ctx, f_rng, p_rng, md_alg, + hashlen, hash, sig); #endif default: - return( MBEDTLS_ERR_RSA_INVALID_PADDING ); + return MBEDTLS_ERR_RSA_INVALID_PADDING; } } @@ -1963,192 +2058,164 @@ int mbedtls_rsa_pkcs1_sign( mbedtls_rsa_context *ctx, /* * Implementation of the PKCS#1 v2.1 RSASSA-PSS-VERIFY function */ -int mbedtls_rsa_rsassa_pss_verify_ext( mbedtls_rsa_context *ctx, - mbedtls_md_type_t md_alg, - unsigned int hashlen, - const unsigned char *hash, - mbedtls_md_type_t mgf1_hash_id, - int expected_salt_len, - const unsigned char *sig ) +int mbedtls_rsa_rsassa_pss_verify_ext(mbedtls_rsa_context *ctx, + mbedtls_md_type_t md_alg, + unsigned int hashlen, + const unsigned char *hash, + mbedtls_md_type_t mgf1_hash_id, + int expected_salt_len, + const unsigned char *sig) { int ret = MBEDTLS_ERR_ERROR_CORRUPTION_DETECTED; size_t siglen; unsigned char *p; unsigned char *hash_start; - unsigned char result[MBEDTLS_MD_MAX_SIZE]; - unsigned char zeros[8]; + unsigned char result[MBEDTLS_HASH_MAX_SIZE]; unsigned int hlen; size_t observed_salt_len, msb; - const mbedtls_md_info_t *md_info; - mbedtls_md_context_t md_ctx; - unsigned char buf[MBEDTLS_MPI_MAX_SIZE] = {0}; + unsigned char buf[MBEDTLS_MPI_MAX_SIZE] = { 0 }; - RSA_VALIDATE_RET( ctx != NULL ); - RSA_VALIDATE_RET( sig != NULL ); - RSA_VALIDATE_RET( ( md_alg == MBEDTLS_MD_NONE && - hashlen == 0 ) || - hash != NULL ); + if ((md_alg != MBEDTLS_MD_NONE || hashlen != 0) && hash == NULL) { + return MBEDTLS_ERR_RSA_BAD_INPUT_DATA; + } siglen = ctx->len; - if( siglen < 16 || siglen > sizeof( buf ) ) - return( MBEDTLS_ERR_RSA_BAD_INPUT_DATA ); + if (siglen < 16 || siglen > sizeof(buf)) { + return MBEDTLS_ERR_RSA_BAD_INPUT_DATA; + } - ret = mbedtls_rsa_public( ctx, sig, buf ); + ret = mbedtls_rsa_public(ctx, sig, buf); - if( ret != 0 ) - return( ret ); + if (ret != 0) { + return ret; + } p = buf; - if( buf[siglen - 1] != 0xBC ) - return( MBEDTLS_ERR_RSA_INVALID_PADDING ); + if (buf[siglen - 1] != 0xBC) { + return MBEDTLS_ERR_RSA_INVALID_PADDING; + } - if( md_alg != MBEDTLS_MD_NONE ) - { + if (md_alg != MBEDTLS_MD_NONE) { /* Gather length of hash to sign */ - md_info = mbedtls_md_info_from_type( md_alg ); - if( md_info == NULL ) - return( MBEDTLS_ERR_RSA_BAD_INPUT_DATA ); + size_t exp_hashlen = mbedtls_hash_info_get_size(md_alg); + if (exp_hashlen == 0) { + return MBEDTLS_ERR_RSA_BAD_INPUT_DATA; + } - if( hashlen != mbedtls_md_get_size( md_info ) ) - return( MBEDTLS_ERR_RSA_BAD_INPUT_DATA ); + if (hashlen != exp_hashlen) { + return MBEDTLS_ERR_RSA_BAD_INPUT_DATA; + } } - md_info = mbedtls_md_info_from_type( mgf1_hash_id ); - if( md_info == NULL ) - return( MBEDTLS_ERR_RSA_BAD_INPUT_DATA ); - - hlen = mbedtls_md_get_size( md_info ); - - memset( zeros, 0, 8 ); + hlen = mbedtls_hash_info_get_size(mgf1_hash_id); + if (hlen == 0) { + return MBEDTLS_ERR_RSA_BAD_INPUT_DATA; + } /* * Note: EMSA-PSS verification is over the length of N - 1 bits */ - msb = mbedtls_mpi_bitlen( &ctx->N ) - 1; + msb = mbedtls_mpi_bitlen(&ctx->N) - 1; - if( buf[0] >> ( 8 - siglen * 8 + msb ) ) - return( MBEDTLS_ERR_RSA_BAD_INPUT_DATA ); + if (buf[0] >> (8 - siglen * 8 + msb)) { + return MBEDTLS_ERR_RSA_BAD_INPUT_DATA; + } /* Compensate for boundary condition when applying mask */ - if( msb % 8 == 0 ) - { + if (msb % 8 == 0) { p++; siglen -= 1; } - if( siglen < hlen + 2 ) - return( MBEDTLS_ERR_RSA_BAD_INPUT_DATA ); + if (siglen < hlen + 2) { + return MBEDTLS_ERR_RSA_BAD_INPUT_DATA; + } hash_start = p + siglen - hlen - 1; - mbedtls_md_init( &md_ctx ); - if( ( ret = mbedtls_md_setup( &md_ctx, md_info, 0 ) ) != 0 ) - goto exit; - - ret = mgf_mask( p, siglen - hlen - 1, hash_start, hlen, &md_ctx ); - if( ret != 0 ) - goto exit; + ret = mgf_mask(p, siglen - hlen - 1, hash_start, hlen, mgf1_hash_id); + if (ret != 0) { + return ret; + } - buf[0] &= 0xFF >> ( siglen * 8 - msb ); + buf[0] &= 0xFF >> (siglen * 8 - msb); - while( p < hash_start - 1 && *p == 0 ) + while (p < hash_start - 1 && *p == 0) { p++; + } - if( *p++ != 0x01 ) - { - ret = MBEDTLS_ERR_RSA_INVALID_PADDING; - goto exit; + if (*p++ != 0x01) { + return MBEDTLS_ERR_RSA_INVALID_PADDING; } observed_salt_len = hash_start - p; - if( expected_salt_len != MBEDTLS_RSA_SALT_LEN_ANY && - observed_salt_len != (size_t) expected_salt_len ) - { - ret = MBEDTLS_ERR_RSA_INVALID_PADDING; - goto exit; + if (expected_salt_len != MBEDTLS_RSA_SALT_LEN_ANY && + observed_salt_len != (size_t) expected_salt_len) { + return MBEDTLS_ERR_RSA_INVALID_PADDING; } /* * Generate H = Hash( M' ) */ - ret = mbedtls_md_starts( &md_ctx ); - if ( ret != 0 ) - goto exit; - ret = mbedtls_md_update( &md_ctx, zeros, 8 ); - if ( ret != 0 ) - goto exit; - ret = mbedtls_md_update( &md_ctx, hash, hashlen ); - if ( ret != 0 ) - goto exit; - ret = mbedtls_md_update( &md_ctx, p, observed_salt_len ); - if ( ret != 0 ) - goto exit; - ret = mbedtls_md_finish( &md_ctx, result ); - if ( ret != 0 ) - goto exit; - - if( memcmp( hash_start, result, hlen ) != 0 ) - { - ret = MBEDTLS_ERR_RSA_VERIFY_FAILED; - goto exit; + ret = hash_mprime(hash, hashlen, p, observed_salt_len, + result, mgf1_hash_id); + if (ret != 0) { + return ret; } -exit: - mbedtls_md_free( &md_ctx ); + if (memcmp(hash_start, result, hlen) != 0) { + return MBEDTLS_ERR_RSA_VERIFY_FAILED; + } - return( ret ); + return 0; } /* * Simplified PKCS#1 v2.1 RSASSA-PSS-VERIFY function */ -int mbedtls_rsa_rsassa_pss_verify( mbedtls_rsa_context *ctx, - mbedtls_md_type_t md_alg, - unsigned int hashlen, - const unsigned char *hash, - const unsigned char *sig ) +int mbedtls_rsa_rsassa_pss_verify(mbedtls_rsa_context *ctx, + mbedtls_md_type_t md_alg, + unsigned int hashlen, + const unsigned char *hash, + const unsigned char *sig) { mbedtls_md_type_t mgf1_hash_id; - RSA_VALIDATE_RET( ctx != NULL ); - RSA_VALIDATE_RET( sig != NULL ); - RSA_VALIDATE_RET( ( md_alg == MBEDTLS_MD_NONE && - hashlen == 0 ) || - hash != NULL ); + if ((md_alg != MBEDTLS_MD_NONE || hashlen != 0) && hash == NULL) { + return MBEDTLS_ERR_RSA_BAD_INPUT_DATA; + } - mgf1_hash_id = ( ctx->hash_id != MBEDTLS_MD_NONE ) + mgf1_hash_id = (ctx->hash_id != MBEDTLS_MD_NONE) ? (mbedtls_md_type_t) ctx->hash_id : md_alg; - return( mbedtls_rsa_rsassa_pss_verify_ext( ctx, - md_alg, hashlen, hash, - mgf1_hash_id, - MBEDTLS_RSA_SALT_LEN_ANY, - sig ) ); + return mbedtls_rsa_rsassa_pss_verify_ext(ctx, + md_alg, hashlen, hash, + mgf1_hash_id, + MBEDTLS_RSA_SALT_LEN_ANY, + sig); } #endif /* MBEDTLS_PKCS1_V21 */ - #if defined(MBEDTLS_PKCS1_V15) +#if defined(MBEDTLS_PKCS1_V15) /* * Implementation of the PKCS#1 v2.1 RSASSA-PKCS1-v1_5-VERIFY function */ -int mbedtls_rsa_rsassa_pkcs1_v15_verify( mbedtls_rsa_context *ctx, - mbedtls_md_type_t md_alg, - unsigned int hashlen, - const unsigned char *hash, - const unsigned char *sig ) +int mbedtls_rsa_rsassa_pkcs1_v15_verify(mbedtls_rsa_context *ctx, + mbedtls_md_type_t md_alg, + unsigned int hashlen, + const unsigned char *hash, + const unsigned char *sig) { int ret = 0; size_t sig_len; unsigned char *encoded = NULL, *encoded_expected = NULL; - RSA_VALIDATE_RET( ctx != NULL ); - RSA_VALIDATE_RET( sig != NULL ); - RSA_VALIDATE_RET( ( md_alg == MBEDTLS_MD_NONE && - hashlen == 0 ) || - hash != NULL ); + if ((md_alg != MBEDTLS_MD_NONE || hashlen != 0) && hash == NULL) { + return MBEDTLS_ERR_RSA_BAD_INPUT_DATA; + } sig_len = ctx->len; @@ -2156,167 +2223,161 @@ int mbedtls_rsa_rsassa_pkcs1_v15_verify( mbedtls_rsa_context *ctx, * Prepare expected PKCS1 v1.5 encoding of hash. */ - if( ( encoded = mbedtls_calloc( 1, sig_len ) ) == NULL || - ( encoded_expected = mbedtls_calloc( 1, sig_len ) ) == NULL ) - { + if ((encoded = mbedtls_calloc(1, sig_len)) == NULL || + (encoded_expected = mbedtls_calloc(1, sig_len)) == NULL) { ret = MBEDTLS_ERR_MPI_ALLOC_FAILED; goto cleanup; } - if( ( ret = rsa_rsassa_pkcs1_v15_encode( md_alg, hashlen, hash, sig_len, - encoded_expected ) ) != 0 ) + if ((ret = rsa_rsassa_pkcs1_v15_encode(md_alg, hashlen, hash, sig_len, + encoded_expected)) != 0) { goto cleanup; + } /* * Apply RSA primitive to get what should be PKCS1 encoded hash. */ - ret = mbedtls_rsa_public( ctx, sig, encoded ); - if( ret != 0 ) + ret = mbedtls_rsa_public(ctx, sig, encoded); + if (ret != 0) { goto cleanup; + } /* * Compare */ - if( ( ret = mbedtls_ct_memcmp( encoded, encoded_expected, - sig_len ) ) != 0 ) - { + if ((ret = mbedtls_ct_memcmp(encoded, encoded_expected, + sig_len)) != 0) { ret = MBEDTLS_ERR_RSA_VERIFY_FAILED; goto cleanup; } cleanup: - if( encoded != NULL ) - { - mbedtls_platform_zeroize( encoded, sig_len ); - mbedtls_free( encoded ); + if (encoded != NULL) { + mbedtls_platform_zeroize(encoded, sig_len); + mbedtls_free(encoded); } - if( encoded_expected != NULL ) - { - mbedtls_platform_zeroize( encoded_expected, sig_len ); - mbedtls_free( encoded_expected ); + if (encoded_expected != NULL) { + mbedtls_platform_zeroize(encoded_expected, sig_len); + mbedtls_free(encoded_expected); } - return( ret ); + return ret; } #endif /* MBEDTLS_PKCS1_V15 */ /* * Do an RSA operation and check the message digest */ -int mbedtls_rsa_pkcs1_verify( mbedtls_rsa_context *ctx, - mbedtls_md_type_t md_alg, - unsigned int hashlen, - const unsigned char *hash, - const unsigned char *sig ) +int mbedtls_rsa_pkcs1_verify(mbedtls_rsa_context *ctx, + mbedtls_md_type_t md_alg, + unsigned int hashlen, + const unsigned char *hash, + const unsigned char *sig) { - RSA_VALIDATE_RET( ctx != NULL ); - RSA_VALIDATE_RET( sig != NULL ); - RSA_VALIDATE_RET( ( md_alg == MBEDTLS_MD_NONE && - hashlen == 0 ) || - hash != NULL ); - - switch( ctx->padding ) - { + if ((md_alg != MBEDTLS_MD_NONE || hashlen != 0) && hash == NULL) { + return MBEDTLS_ERR_RSA_BAD_INPUT_DATA; + } + + switch (ctx->padding) { #if defined(MBEDTLS_PKCS1_V15) case MBEDTLS_RSA_PKCS_V15: - return mbedtls_rsa_rsassa_pkcs1_v15_verify( ctx, md_alg, - hashlen, hash, sig ); + return mbedtls_rsa_rsassa_pkcs1_v15_verify(ctx, md_alg, + hashlen, hash, sig); #endif #if defined(MBEDTLS_PKCS1_V21) case MBEDTLS_RSA_PKCS_V21: - return mbedtls_rsa_rsassa_pss_verify( ctx, md_alg, - hashlen, hash, sig ); + return mbedtls_rsa_rsassa_pss_verify(ctx, md_alg, + hashlen, hash, sig); #endif default: - return( MBEDTLS_ERR_RSA_INVALID_PADDING ); + return MBEDTLS_ERR_RSA_INVALID_PADDING; } } /* * Copy the components of an RSA key */ -int mbedtls_rsa_copy( mbedtls_rsa_context *dst, const mbedtls_rsa_context *src ) +int mbedtls_rsa_copy(mbedtls_rsa_context *dst, const mbedtls_rsa_context *src) { int ret = MBEDTLS_ERR_ERROR_CORRUPTION_DETECTED; - RSA_VALIDATE_RET( dst != NULL ); - RSA_VALIDATE_RET( src != NULL ); dst->len = src->len; - MBEDTLS_MPI_CHK( mbedtls_mpi_copy( &dst->N, &src->N ) ); - MBEDTLS_MPI_CHK( mbedtls_mpi_copy( &dst->E, &src->E ) ); + MBEDTLS_MPI_CHK(mbedtls_mpi_copy(&dst->N, &src->N)); + MBEDTLS_MPI_CHK(mbedtls_mpi_copy(&dst->E, &src->E)); - MBEDTLS_MPI_CHK( mbedtls_mpi_copy( &dst->D, &src->D ) ); - MBEDTLS_MPI_CHK( mbedtls_mpi_copy( &dst->P, &src->P ) ); - MBEDTLS_MPI_CHK( mbedtls_mpi_copy( &dst->Q, &src->Q ) ); + MBEDTLS_MPI_CHK(mbedtls_mpi_copy(&dst->D, &src->D)); + MBEDTLS_MPI_CHK(mbedtls_mpi_copy(&dst->P, &src->P)); + MBEDTLS_MPI_CHK(mbedtls_mpi_copy(&dst->Q, &src->Q)); #if !defined(MBEDTLS_RSA_NO_CRT) - MBEDTLS_MPI_CHK( mbedtls_mpi_copy( &dst->DP, &src->DP ) ); - MBEDTLS_MPI_CHK( mbedtls_mpi_copy( &dst->DQ, &src->DQ ) ); - MBEDTLS_MPI_CHK( mbedtls_mpi_copy( &dst->QP, &src->QP ) ); - MBEDTLS_MPI_CHK( mbedtls_mpi_copy( &dst->RP, &src->RP ) ); - MBEDTLS_MPI_CHK( mbedtls_mpi_copy( &dst->RQ, &src->RQ ) ); + MBEDTLS_MPI_CHK(mbedtls_mpi_copy(&dst->DP, &src->DP)); + MBEDTLS_MPI_CHK(mbedtls_mpi_copy(&dst->DQ, &src->DQ)); + MBEDTLS_MPI_CHK(mbedtls_mpi_copy(&dst->QP, &src->QP)); + MBEDTLS_MPI_CHK(mbedtls_mpi_copy(&dst->RP, &src->RP)); + MBEDTLS_MPI_CHK(mbedtls_mpi_copy(&dst->RQ, &src->RQ)); #endif - MBEDTLS_MPI_CHK( mbedtls_mpi_copy( &dst->RN, &src->RN ) ); + MBEDTLS_MPI_CHK(mbedtls_mpi_copy(&dst->RN, &src->RN)); - MBEDTLS_MPI_CHK( mbedtls_mpi_copy( &dst->Vi, &src->Vi ) ); - MBEDTLS_MPI_CHK( mbedtls_mpi_copy( &dst->Vf, &src->Vf ) ); + MBEDTLS_MPI_CHK(mbedtls_mpi_copy(&dst->Vi, &src->Vi)); + MBEDTLS_MPI_CHK(mbedtls_mpi_copy(&dst->Vf, &src->Vf)); dst->padding = src->padding; dst->hash_id = src->hash_id; cleanup: - if( ret != 0 ) - mbedtls_rsa_free( dst ); + if (ret != 0) { + mbedtls_rsa_free(dst); + } - return( ret ); + return ret; } /* * Free the components of an RSA key */ -void mbedtls_rsa_free( mbedtls_rsa_context *ctx ) +void mbedtls_rsa_free(mbedtls_rsa_context *ctx) { - if( ctx == NULL ) + if (ctx == NULL) { return; + } - mbedtls_mpi_free( &ctx->Vi ); - mbedtls_mpi_free( &ctx->Vf ); - mbedtls_mpi_free( &ctx->RN ); - mbedtls_mpi_free( &ctx->D ); - mbedtls_mpi_free( &ctx->Q ); - mbedtls_mpi_free( &ctx->P ); - mbedtls_mpi_free( &ctx->E ); - mbedtls_mpi_free( &ctx->N ); + mbedtls_mpi_free(&ctx->Vi); + mbedtls_mpi_free(&ctx->Vf); + mbedtls_mpi_free(&ctx->RN); + mbedtls_mpi_free(&ctx->D); + mbedtls_mpi_free(&ctx->Q); + mbedtls_mpi_free(&ctx->P); + mbedtls_mpi_free(&ctx->E); + mbedtls_mpi_free(&ctx->N); #if !defined(MBEDTLS_RSA_NO_CRT) - mbedtls_mpi_free( &ctx->RQ ); - mbedtls_mpi_free( &ctx->RP ); - mbedtls_mpi_free( &ctx->QP ); - mbedtls_mpi_free( &ctx->DQ ); - mbedtls_mpi_free( &ctx->DP ); + mbedtls_mpi_free(&ctx->RQ); + mbedtls_mpi_free(&ctx->RP); + mbedtls_mpi_free(&ctx->QP); + mbedtls_mpi_free(&ctx->DQ); + mbedtls_mpi_free(&ctx->DP); #endif /* MBEDTLS_RSA_NO_CRT */ #if defined(MBEDTLS_THREADING_C) /* Free the mutex, but only if it hasn't been freed already. */ - if( ctx->ver != 0 ) - { - mbedtls_mutex_free( &ctx->mutex ); - ctx->ver = 0; + if (ctx->ver != 0) { + mbedtls_mutex_free(&ctx->mutex); + ctx->ver = 0; } #endif } #if defined(MBEDTLS_SELF_TEST) - #include "mbedtls/sha1.h" +#include "mbedtls/md.h" /* * Example RSA-1024 keypair, for test purposes @@ -2358,31 +2419,34 @@ void mbedtls_rsa_free( mbedtls_rsa_context *ctx ) "\x11\x22\x33\x0A\x0B\x0C\xCC\xDD\xDD\xDD\xDD\xDD" #if defined(MBEDTLS_PKCS1_V15) -static int myrand( void *rng_state, unsigned char *output, size_t len ) +static int myrand(void *rng_state, unsigned char *output, size_t len) { #if !defined(__OpenBSD__) && !defined(__NetBSD__) size_t i; - if( rng_state != NULL ) + if (rng_state != NULL) { rng_state = NULL; + } - for( i = 0; i < len; ++i ) + for (i = 0; i < len; ++i) { output[i] = rand(); + } #else - if( rng_state != NULL ) + if (rng_state != NULL) { rng_state = NULL; + } - arc4random_buf( output, len ); + arc4random_buf(output, len); #endif /* !OpenBSD && !NetBSD */ - return( 0 ); + return 0; } #endif /* MBEDTLS_PKCS1_V15 */ /* * Checkup routine */ -int mbedtls_rsa_self_test( int verbose ) +int mbedtls_rsa_self_test(int verbose) { int ret = 0; #if defined(MBEDTLS_PKCS1_V15) @@ -2397,127 +2461,136 @@ int mbedtls_rsa_self_test( int verbose ) mbedtls_mpi K; - mbedtls_mpi_init( &K ); - mbedtls_rsa_init( &rsa ); + mbedtls_mpi_init(&K); + mbedtls_rsa_init(&rsa); - MBEDTLS_MPI_CHK( mbedtls_mpi_read_string( &K, 16, RSA_N ) ); - MBEDTLS_MPI_CHK( mbedtls_rsa_import( &rsa, &K, NULL, NULL, NULL, NULL ) ); - MBEDTLS_MPI_CHK( mbedtls_mpi_read_string( &K, 16, RSA_P ) ); - MBEDTLS_MPI_CHK( mbedtls_rsa_import( &rsa, NULL, &K, NULL, NULL, NULL ) ); - MBEDTLS_MPI_CHK( mbedtls_mpi_read_string( &K, 16, RSA_Q ) ); - MBEDTLS_MPI_CHK( mbedtls_rsa_import( &rsa, NULL, NULL, &K, NULL, NULL ) ); - MBEDTLS_MPI_CHK( mbedtls_mpi_read_string( &K, 16, RSA_D ) ); - MBEDTLS_MPI_CHK( mbedtls_rsa_import( &rsa, NULL, NULL, NULL, &K, NULL ) ); - MBEDTLS_MPI_CHK( mbedtls_mpi_read_string( &K, 16, RSA_E ) ); - MBEDTLS_MPI_CHK( mbedtls_rsa_import( &rsa, NULL, NULL, NULL, NULL, &K ) ); + MBEDTLS_MPI_CHK(mbedtls_mpi_read_string(&K, 16, RSA_N)); + MBEDTLS_MPI_CHK(mbedtls_rsa_import(&rsa, &K, NULL, NULL, NULL, NULL)); + MBEDTLS_MPI_CHK(mbedtls_mpi_read_string(&K, 16, RSA_P)); + MBEDTLS_MPI_CHK(mbedtls_rsa_import(&rsa, NULL, &K, NULL, NULL, NULL)); + MBEDTLS_MPI_CHK(mbedtls_mpi_read_string(&K, 16, RSA_Q)); + MBEDTLS_MPI_CHK(mbedtls_rsa_import(&rsa, NULL, NULL, &K, NULL, NULL)); + MBEDTLS_MPI_CHK(mbedtls_mpi_read_string(&K, 16, RSA_D)); + MBEDTLS_MPI_CHK(mbedtls_rsa_import(&rsa, NULL, NULL, NULL, &K, NULL)); + MBEDTLS_MPI_CHK(mbedtls_mpi_read_string(&K, 16, RSA_E)); + MBEDTLS_MPI_CHK(mbedtls_rsa_import(&rsa, NULL, NULL, NULL, NULL, &K)); - MBEDTLS_MPI_CHK( mbedtls_rsa_complete( &rsa ) ); + MBEDTLS_MPI_CHK(mbedtls_rsa_complete(&rsa)); - if( verbose != 0 ) - mbedtls_printf( " RSA key validation: " ); + if (verbose != 0) { + mbedtls_printf(" RSA key validation: "); + } - if( mbedtls_rsa_check_pubkey( &rsa ) != 0 || - mbedtls_rsa_check_privkey( &rsa ) != 0 ) - { - if( verbose != 0 ) - mbedtls_printf( "failed\n" ); + if (mbedtls_rsa_check_pubkey(&rsa) != 0 || + mbedtls_rsa_check_privkey(&rsa) != 0) { + if (verbose != 0) { + mbedtls_printf("failed\n"); + } ret = 1; goto cleanup; } - if( verbose != 0 ) - mbedtls_printf( "passed\n PKCS#1 encryption : " ); + if (verbose != 0) { + mbedtls_printf("passed\n PKCS#1 encryption : "); + } - memcpy( rsa_plaintext, RSA_PT, PT_LEN ); + memcpy(rsa_plaintext, RSA_PT, PT_LEN); - if( mbedtls_rsa_pkcs1_encrypt( &rsa, myrand, NULL, - PT_LEN, rsa_plaintext, - rsa_ciphertext ) != 0 ) - { - if( verbose != 0 ) - mbedtls_printf( "failed\n" ); + if (mbedtls_rsa_pkcs1_encrypt(&rsa, myrand, NULL, + PT_LEN, rsa_plaintext, + rsa_ciphertext) != 0) { + if (verbose != 0) { + mbedtls_printf("failed\n"); + } ret = 1; goto cleanup; } - if( verbose != 0 ) - mbedtls_printf( "passed\n PKCS#1 decryption : " ); + if (verbose != 0) { + mbedtls_printf("passed\n PKCS#1 decryption : "); + } - if( mbedtls_rsa_pkcs1_decrypt( &rsa, myrand, NULL, - &len, rsa_ciphertext, rsa_decrypted, - sizeof(rsa_decrypted) ) != 0 ) - { - if( verbose != 0 ) - mbedtls_printf( "failed\n" ); + if (mbedtls_rsa_pkcs1_decrypt(&rsa, myrand, NULL, + &len, rsa_ciphertext, rsa_decrypted, + sizeof(rsa_decrypted)) != 0) { + if (verbose != 0) { + mbedtls_printf("failed\n"); + } ret = 1; goto cleanup; } - if( memcmp( rsa_decrypted, rsa_plaintext, len ) != 0 ) - { - if( verbose != 0 ) - mbedtls_printf( "failed\n" ); + if (memcmp(rsa_decrypted, rsa_plaintext, len) != 0) { + if (verbose != 0) { + mbedtls_printf("failed\n"); + } ret = 1; goto cleanup; } - if( verbose != 0 ) - mbedtls_printf( "passed\n" ); + if (verbose != 0) { + mbedtls_printf("passed\n"); + } #if defined(MBEDTLS_SHA1_C) - if( verbose != 0 ) - mbedtls_printf( " PKCS#1 data sign : " ); + if (verbose != 0) { + mbedtls_printf(" PKCS#1 data sign : "); + } - if( mbedtls_sha1( rsa_plaintext, PT_LEN, sha1sum ) != 0 ) - { - if( verbose != 0 ) - mbedtls_printf( "failed\n" ); + if (mbedtls_md(mbedtls_md_info_from_type(MBEDTLS_MD_SHA1), + rsa_plaintext, PT_LEN, sha1sum) != 0) { + if (verbose != 0) { + mbedtls_printf("failed\n"); + } - return( 1 ); + return 1; } - if( mbedtls_rsa_pkcs1_sign( &rsa, myrand, NULL, - MBEDTLS_MD_SHA1, 20, - sha1sum, rsa_ciphertext ) != 0 ) - { - if( verbose != 0 ) - mbedtls_printf( "failed\n" ); + if (mbedtls_rsa_pkcs1_sign(&rsa, myrand, NULL, + MBEDTLS_MD_SHA1, 20, + sha1sum, rsa_ciphertext) != 0) { + if (verbose != 0) { + mbedtls_printf("failed\n"); + } ret = 1; goto cleanup; } - if( verbose != 0 ) - mbedtls_printf( "passed\n PKCS#1 sig. verify: " ); + if (verbose != 0) { + mbedtls_printf("passed\n PKCS#1 sig. verify: "); + } - if( mbedtls_rsa_pkcs1_verify( &rsa, MBEDTLS_MD_SHA1, 20, - sha1sum, rsa_ciphertext ) != 0 ) - { - if( verbose != 0 ) - mbedtls_printf( "failed\n" ); + if (mbedtls_rsa_pkcs1_verify(&rsa, MBEDTLS_MD_SHA1, 20, + sha1sum, rsa_ciphertext) != 0) { + if (verbose != 0) { + mbedtls_printf("failed\n"); + } ret = 1; goto cleanup; } - if( verbose != 0 ) - mbedtls_printf( "passed\n" ); + if (verbose != 0) { + mbedtls_printf("passed\n"); + } #endif /* MBEDTLS_SHA1_C */ - if( verbose != 0 ) - mbedtls_printf( "\n" ); + if (verbose != 0) { + mbedtls_printf("\n"); + } cleanup: - mbedtls_mpi_free( &K ); - mbedtls_rsa_free( &rsa ); + mbedtls_mpi_free(&K); + mbedtls_rsa_free(&rsa); #else /* MBEDTLS_PKCS1_V15 */ ((void) verbose); #endif /* MBEDTLS_PKCS1_V15 */ - return( ret ); + return ret; } #endif /* MBEDTLS_SELF_TEST */ diff --git a/ra/fsp/src/rm_psa_crypto/sha256_alt.c b/ra/fsp/src/rm_psa_crypto/sha256_alt.c index 96849a587..26e716c15 100644 --- a/ra/fsp/src/rm_psa_crypto/sha256_alt.c +++ b/ra/fsp/src/rm_psa_crypto/sha256_alt.c @@ -29,9 +29,32 @@ */ /* UNCRUSTIFY-OFF */ + +#if defined(__aarch64__) && !defined(__ARM_FEATURE_CRYPTO) && \ + defined(__clang__) && __clang_major__ >= 4 +/* TODO: Re-consider above after https://reviews.llvm.org/D131064 merged. + * + * The intrinsic declaration are guarded by predefined ACLE macros in clang: + * these are normally only enabled by the -march option on the command line. + * By defining the macros ourselves we gain access to those declarations without + * requiring -march on the command line. + * + * `arm_neon.h` could be included by any header file, so we put these defines + * at the top of this file, before any includes. + */ +#define __ARM_FEATURE_CRYPTO 1 +/* See: https://arm-software.github.io/acle/main/acle.html#cryptographic-extensions + * + * `__ARM_FEATURE_CRYPTO` is deprecated, but we need to continue to specify it + * for older compilers. + */ +#define __ARM_FEATURE_SHA2 1 +#define MBEDTLS_ENABLE_ARM_CRYPTO_EXTENSIONS_COMPILER_FLAG +#endif + #include "common.h" -#if defined(MBEDTLS_SHA256_C) +#if defined(MBEDTLS_SHA256_C) || defined(MBEDTLS_SHA224_C) #include "mbedtls/sha256.h" #include "mbedtls/platform_util.h" @@ -39,21 +62,35 @@ #include <string.h> -#if defined(MBEDTLS_SELF_TEST) -#if defined(MBEDTLS_PLATFORM_C) #include "mbedtls/platform.h" -#else -#include <stdio.h> -#include <stdlib.h> -#define mbedtls_printf printf -#define mbedtls_calloc calloc -#define mbedtls_free free -#endif /* MBEDTLS_PLATFORM_C */ -#endif /* MBEDTLS_SELF_TEST */ #if defined(__aarch64__) # if defined(MBEDTLS_SHA256_USE_A64_CRYPTO_IF_PRESENT) || \ defined(MBEDTLS_SHA256_USE_A64_CRYPTO_ONLY) +/* *INDENT-OFF* */ +# if !defined(__ARM_FEATURE_CRYPTO) || defined(MBEDTLS_ENABLE_ARM_CRYPTO_EXTENSIONS_COMPILER_FLAG) +# if defined(__clang__) +# if __clang_major__ < 4 +# error "A more recent Clang is required for MBEDTLS_SHA256_USE_A64_CRYPTO_*" +# endif +# pragma clang attribute push (__attribute__((target("crypto"))), apply_to=function) +# define MBEDTLS_POP_TARGET_PRAGMA +# elif defined(__GNUC__) + /* FIXME: GCC 5 claims to support Armv8 Crypto Extensions, but some + * intrinsics are missing. Missing intrinsics could be worked around. + */ +# if __GNUC__ < 6 +# error "A more recent GCC is required for MBEDTLS_SHA256_USE_A64_CRYPTO_*" +# else +# pragma GCC push_options +# pragma GCC target ("arch=armv8-a+crypto") +# define MBEDTLS_POP_TARGET_PRAGMA +# endif +# else +# error "Only GCC and Clang supported for MBEDTLS_SHA256_USE_A64_CRYPTO_*" +# endif +# endif +/* *INDENT-ON* */ # include <arm_neon.h> # endif # if defined(MBEDTLS_SHA256_USE_A64_CRYPTO_IF_PRESENT) @@ -82,72 +119,68 @@ * MBEDTLS_SHA256_USE_A64_CRYPTO_IF_PRESENT if no detection mechanism found */ #if defined(HWCAP_SHA2) -static int mbedtls_a64_crypto_sha256_determine_support( void ) +static int mbedtls_a64_crypto_sha256_determine_support(void) { - return( ( getauxval( AT_HWCAP ) & HWCAP_SHA2 ) ? 1 : 0 ); + return (getauxval(AT_HWCAP) & HWCAP_SHA2) ? 1 : 0; } #elif defined(__APPLE__) -static int mbedtls_a64_crypto_sha256_determine_support( void ) +static int mbedtls_a64_crypto_sha256_determine_support(void) { - return( 1 ); + return 1; } #elif defined(_M_ARM64) #define WIN32_LEAN_AND_MEAN #include <Windows.h> #include <processthreadsapi.h> -static int mbedtls_a64_crypto_sha256_determine_support( void ) +static int mbedtls_a64_crypto_sha256_determine_support(void) { - return( IsProcessorFeaturePresent( PF_ARM_V8_CRYPTO_INSTRUCTIONS_AVAILABLE ) ? - 1 : 0 ); + return IsProcessorFeaturePresent(PF_ARM_V8_CRYPTO_INSTRUCTIONS_AVAILABLE) ? + 1 : 0; } #elif defined(__unix__) && defined(SIG_SETMASK) /* Detection with SIGILL, setjmp() and longjmp() */ #include <signal.h> #include <setjmp.h> -#ifndef asm -#define asm __asm__ -#endif - static jmp_buf return_from_sigill; /* * A64 SHA256 support detection via SIGILL */ -static void sigill_handler( int signal ) +static void sigill_handler(int signal) { (void) signal; - longjmp( return_from_sigill, 1 ); + longjmp(return_from_sigill, 1); } -static int mbedtls_a64_crypto_sha256_determine_support( void ) +static int mbedtls_a64_crypto_sha256_determine_support(void) { struct sigaction old_action, new_action; sigset_t old_mask; - if( sigprocmask( 0, NULL, &old_mask ) ) - return( 0 ); + if (sigprocmask(0, NULL, &old_mask)) { + return 0; + } - sigemptyset( &new_action.sa_mask ); + sigemptyset(&new_action.sa_mask); new_action.sa_flags = 0; new_action.sa_handler = sigill_handler; - sigaction( SIGILL, &new_action, &old_action ); + sigaction(SIGILL, &new_action, &old_action); static int ret = 0; - if( setjmp( return_from_sigill ) == 0 ) /* First return only */ - { + if (setjmp(return_from_sigill) == 0) { /* First return only */ /* If this traps, we will return a second time from setjmp() with 1 */ - asm( "sha256h q0, q0, v0.4s" : : : "v0" ); + asm ("sha256h q0, q0, v0.4s" : : : "v0"); ret = 1; } - sigaction( SIGILL, &old_action, NULL ); - sigprocmask( SIG_SETMASK, &old_mask, NULL ); + sigaction(SIGILL, &old_action, NULL); + sigprocmask(SIG_SETMASK, &old_mask, NULL); - return( ret ); + return ret; } #else #warning "No mechanism to detect A64_CRYPTO found, using C code only" @@ -156,10 +189,6 @@ static int mbedtls_a64_crypto_sha256_determine_support( void ) #endif /* MBEDTLS_SHA256_USE_A64_CRYPTO_IF_PRESENT */ -#define SHA256_VALIDATE_RET(cond) \ - MBEDTLS_INTERNAL_VALIDATE_RET( cond, MBEDTLS_ERR_SHA256_BAD_INPUT_DATA ) -#define SHA256_VALIDATE(cond) MBEDTLS_INTERNAL_VALIDATE( cond ) - #if defined(MBEDTLS_SHA256_ALT) #define SHA256_BLOCK_SIZE 64 @@ -210,48 +239,50 @@ do { \ } while (0) #endif -void mbedtls_sha256_init( mbedtls_sha256_context *ctx ) +void mbedtls_sha256_init(mbedtls_sha256_context *ctx) { - SHA256_VALIDATE( ctx != NULL ); - - memset( ctx, 0, sizeof( mbedtls_sha256_context ) ); + memset(ctx, 0, sizeof(mbedtls_sha256_context)); } -void mbedtls_sha256_free( mbedtls_sha256_context *ctx ) +void mbedtls_sha256_free(mbedtls_sha256_context *ctx) { - if( ctx == NULL ) + if (ctx == NULL) { return; + } - mbedtls_platform_zeroize( ctx, sizeof( mbedtls_sha256_context ) ); + mbedtls_platform_zeroize(ctx, sizeof(mbedtls_sha256_context)); } -void mbedtls_sha256_clone( mbedtls_sha256_context *dst, - const mbedtls_sha256_context *src ) +void mbedtls_sha256_clone(mbedtls_sha256_context *dst, + const mbedtls_sha256_context *src) { - SHA256_VALIDATE( dst != NULL ); - SHA256_VALIDATE( src != NULL ); - *dst = *src; } /* * SHA-256 context setup */ -int mbedtls_sha256_starts( mbedtls_sha256_context *ctx, int is224 ) +int mbedtls_sha256_starts(mbedtls_sha256_context *ctx, int is224) { - SHA256_VALIDATE_RET( ctx != NULL ); - -#if defined(MBEDTLS_SHA224_C) - SHA256_VALIDATE_RET( is224 == 0 || is224 == 1 ); -#else - SHA256_VALIDATE_RET( is224 == 0 ); +#if defined(MBEDTLS_SHA224_C) && defined(MBEDTLS_SHA256_C) + if (is224 != 0 && is224 != 1) { + return MBEDTLS_ERR_SHA256_BAD_INPUT_DATA; + } +#elif defined(MBEDTLS_SHA256_C) + if (is224 != 0) { + return MBEDTLS_ERR_SHA256_BAD_INPUT_DATA; + } +#else /* defined MBEDTLS_SHA224_C only */ + if (is224 == 0) { + return MBEDTLS_ERR_SHA256_BAD_INPUT_DATA; + } #endif ctx->total[0] = 0; ctx->total[1] = 0; - if (is224 == 0) - { + if (is224 == 0) { +#if defined(MBEDTLS_SHA256_C) /* SHA-256: Little Endian */ ctx->state[0] = 0x67E6096A; ctx->state[1] = 0x85AE67BB; @@ -261,9 +292,9 @@ int mbedtls_sha256_starts( mbedtls_sha256_context *ctx, int is224 ) ctx->state[5] = 0x8C68059B; ctx->state[6] = 0xABD9831F; ctx->state[7] = 0x19CDE05B; - } - else - { +#endif + } else { +#if defined(MBEDTLS_SHA224_C) /* SHA-224 Little Endian */ ctx->state[0] = 0xD89E05C1; ctx->state[1] = 0x07D57C36; @@ -273,11 +304,14 @@ int mbedtls_sha256_starts( mbedtls_sha256_context *ctx, int is224 ) ctx->state[5] = 0x11155868; ctx->state[6] = 0xA78FF964; ctx->state[7] = 0xA44FFABE; +#endif } +#if defined(MBEDTLS_SHA224_C) ctx->is224 = is224; +#endif - return( 0 ); + return 0; } #if !defined(MBEDTLS_SHA256_PROCESS_ALT) @@ -312,100 +346,98 @@ static const uint32_t K[] = #endif static size_t mbedtls_internal_sha256_process_many_a64_crypto( - mbedtls_sha256_context *ctx, const uint8_t *msg, size_t len ) + mbedtls_sha256_context *ctx, const uint8_t *msg, size_t len) { - uint32x4_t abcd = vld1q_u32( &ctx->state[0] ); - uint32x4_t efgh = vld1q_u32( &ctx->state[4] ); + uint32x4_t abcd = vld1q_u32(&ctx->state[0]); + uint32x4_t efgh = vld1q_u32(&ctx->state[4]); size_t processed = 0; - for( ; + for (; len >= SHA256_BLOCK_SIZE; processed += SHA256_BLOCK_SIZE, - msg += SHA256_BLOCK_SIZE, - len -= SHA256_BLOCK_SIZE ) - { + msg += SHA256_BLOCK_SIZE, + len -= SHA256_BLOCK_SIZE) { uint32x4_t tmp, abcd_prev; uint32x4_t abcd_orig = abcd; uint32x4_t efgh_orig = efgh; - uint32x4_t sched0 = (uint32x4_t) vld1q_u8( msg + 16 * 0 ); - uint32x4_t sched1 = (uint32x4_t) vld1q_u8( msg + 16 * 1 ); - uint32x4_t sched2 = (uint32x4_t) vld1q_u8( msg + 16 * 2 ); - uint32x4_t sched3 = (uint32x4_t) vld1q_u8( msg + 16 * 3 ); + uint32x4_t sched0 = (uint32x4_t) vld1q_u8(msg + 16 * 0); + uint32x4_t sched1 = (uint32x4_t) vld1q_u8(msg + 16 * 1); + uint32x4_t sched2 = (uint32x4_t) vld1q_u8(msg + 16 * 2); + uint32x4_t sched3 = (uint32x4_t) vld1q_u8(msg + 16 * 3); #if __BYTE_ORDER__ == __ORDER_LITTLE_ENDIAN__ /* Will be true if not defined */ /* Untested on BE */ - sched0 = vreinterpretq_u32_u8( vrev32q_u8( vreinterpretq_u8_u32( sched0 ) ) ); - sched1 = vreinterpretq_u32_u8( vrev32q_u8( vreinterpretq_u8_u32( sched1 ) ) ); - sched2 = vreinterpretq_u32_u8( vrev32q_u8( vreinterpretq_u8_u32( sched2 ) ) ); - sched3 = vreinterpretq_u32_u8( vrev32q_u8( vreinterpretq_u8_u32( sched3 ) ) ); + sched0 = vreinterpretq_u32_u8(vrev32q_u8(vreinterpretq_u8_u32(sched0))); + sched1 = vreinterpretq_u32_u8(vrev32q_u8(vreinterpretq_u8_u32(sched1))); + sched2 = vreinterpretq_u32_u8(vrev32q_u8(vreinterpretq_u8_u32(sched2))); + sched3 = vreinterpretq_u32_u8(vrev32q_u8(vreinterpretq_u8_u32(sched3))); #endif /* Rounds 0 to 3 */ - tmp = vaddq_u32( sched0, vld1q_u32( &K[0] ) ); + tmp = vaddq_u32(sched0, vld1q_u32(&K[0])); abcd_prev = abcd; - abcd = vsha256hq_u32( abcd_prev, efgh, tmp ); - efgh = vsha256h2q_u32( efgh, abcd_prev, tmp ); + abcd = vsha256hq_u32(abcd_prev, efgh, tmp); + efgh = vsha256h2q_u32(efgh, abcd_prev, tmp); /* Rounds 4 to 7 */ - tmp = vaddq_u32( sched1, vld1q_u32( &K[4] ) ); + tmp = vaddq_u32(sched1, vld1q_u32(&K[4])); abcd_prev = abcd; - abcd = vsha256hq_u32( abcd_prev, efgh, tmp ); - efgh = vsha256h2q_u32( efgh, abcd_prev, tmp ); + abcd = vsha256hq_u32(abcd_prev, efgh, tmp); + efgh = vsha256h2q_u32(efgh, abcd_prev, tmp); /* Rounds 8 to 11 */ - tmp = vaddq_u32( sched2, vld1q_u32( &K[8] ) ); + tmp = vaddq_u32(sched2, vld1q_u32(&K[8])); abcd_prev = abcd; - abcd = vsha256hq_u32( abcd_prev, efgh, tmp ); - efgh = vsha256h2q_u32( efgh, abcd_prev, tmp ); + abcd = vsha256hq_u32(abcd_prev, efgh, tmp); + efgh = vsha256h2q_u32(efgh, abcd_prev, tmp); /* Rounds 12 to 15 */ - tmp = vaddq_u32( sched3, vld1q_u32( &K[12] ) ); + tmp = vaddq_u32(sched3, vld1q_u32(&K[12])); abcd_prev = abcd; - abcd = vsha256hq_u32( abcd_prev, efgh, tmp ); - efgh = vsha256h2q_u32( efgh, abcd_prev, tmp ); + abcd = vsha256hq_u32(abcd_prev, efgh, tmp); + efgh = vsha256h2q_u32(efgh, abcd_prev, tmp); - for( int t = 16; t < 64; t += 16 ) - { + for (int t = 16; t < 64; t += 16) { /* Rounds t to t + 3 */ - sched0 = vsha256su1q_u32( vsha256su0q_u32( sched0, sched1 ), sched2, sched3 ); - tmp = vaddq_u32( sched0, vld1q_u32( &K[t] ) ); + sched0 = vsha256su1q_u32(vsha256su0q_u32(sched0, sched1), sched2, sched3); + tmp = vaddq_u32(sched0, vld1q_u32(&K[t])); abcd_prev = abcd; - abcd = vsha256hq_u32( abcd_prev, efgh, tmp ); - efgh = vsha256h2q_u32( efgh, abcd_prev, tmp ); + abcd = vsha256hq_u32(abcd_prev, efgh, tmp); + efgh = vsha256h2q_u32(efgh, abcd_prev, tmp); /* Rounds t + 4 to t + 7 */ - sched1 = vsha256su1q_u32( vsha256su0q_u32( sched1, sched2 ), sched3, sched0 ); - tmp = vaddq_u32( sched1, vld1q_u32( &K[t + 4] ) ); + sched1 = vsha256su1q_u32(vsha256su0q_u32(sched1, sched2), sched3, sched0); + tmp = vaddq_u32(sched1, vld1q_u32(&K[t + 4])); abcd_prev = abcd; - abcd = vsha256hq_u32( abcd_prev, efgh, tmp ); - efgh = vsha256h2q_u32( efgh, abcd_prev, tmp ); + abcd = vsha256hq_u32(abcd_prev, efgh, tmp); + efgh = vsha256h2q_u32(efgh, abcd_prev, tmp); /* Rounds t + 8 to t + 11 */ - sched2 = vsha256su1q_u32( vsha256su0q_u32( sched2, sched3 ), sched0, sched1 ); - tmp = vaddq_u32( sched2, vld1q_u32( &K[t + 8] ) ); + sched2 = vsha256su1q_u32(vsha256su0q_u32(sched2, sched3), sched0, sched1); + tmp = vaddq_u32(sched2, vld1q_u32(&K[t + 8])); abcd_prev = abcd; - abcd = vsha256hq_u32( abcd_prev, efgh, tmp ); - efgh = vsha256h2q_u32( efgh, abcd_prev, tmp ); + abcd = vsha256hq_u32(abcd_prev, efgh, tmp); + efgh = vsha256h2q_u32(efgh, abcd_prev, tmp); /* Rounds t + 12 to t + 15 */ - sched3 = vsha256su1q_u32( vsha256su0q_u32( sched3, sched0 ), sched1, sched2 ); - tmp = vaddq_u32( sched3, vld1q_u32( &K[t + 12] ) ); + sched3 = vsha256su1q_u32(vsha256su0q_u32(sched3, sched0), sched1, sched2); + tmp = vaddq_u32(sched3, vld1q_u32(&K[t + 12])); abcd_prev = abcd; - abcd = vsha256hq_u32( abcd_prev, efgh, tmp ); - efgh = vsha256h2q_u32( efgh, abcd_prev, tmp ); + abcd = vsha256hq_u32(abcd_prev, efgh, tmp); + efgh = vsha256h2q_u32(efgh, abcd_prev, tmp); } - abcd = vaddq_u32( abcd, abcd_orig ); - efgh = vaddq_u32( efgh, efgh_orig ); + abcd = vaddq_u32(abcd, abcd_orig); + efgh = vaddq_u32(efgh, efgh_orig); } - vst1q_u32( &ctx->state[0], abcd ); - vst1q_u32( &ctx->state[4], efgh ); + vst1q_u32(&ctx->state[0], abcd); + vst1q_u32(&ctx->state[4], efgh); - return( processed ); + return processed; } #if defined(MBEDTLS_SHA256_USE_A64_CRYPTO_IF_PRESENT) @@ -415,15 +447,24 @@ static size_t mbedtls_internal_sha256_process_many_a64_crypto( */ static #endif -int mbedtls_internal_sha256_process_a64_crypto( mbedtls_sha256_context *ctx, - const unsigned char data[SHA256_BLOCK_SIZE] ) +int mbedtls_internal_sha256_process_a64_crypto(mbedtls_sha256_context *ctx, + const unsigned char data[SHA256_BLOCK_SIZE]) { - return( ( mbedtls_internal_sha256_process_many_a64_crypto( ctx, data, - SHA256_BLOCK_SIZE ) == SHA256_BLOCK_SIZE ) ? 0 : -1 ); + return (mbedtls_internal_sha256_process_many_a64_crypto(ctx, data, + SHA256_BLOCK_SIZE) == + SHA256_BLOCK_SIZE) ? 0 : -1; } -#endif /* MBEDTLS_SHA256_USE_A64_CRYPTO_IF_PRESENT || MBEDTLS_SHA256_USE_A64_CRYPTO_ONLY */ +#if defined(MBEDTLS_POP_TARGET_PRAGMA) +#if defined(__clang__) +#pragma clang attribute pop +#elif defined(__GNUC__) +#pragma GCC pop_options +#endif +#undef MBEDTLS_POP_TARGET_PRAGMA +#endif +#endif /* MBEDTLS_SHA256_USE_A64_CRYPTO_IF_PRESENT || MBEDTLS_SHA256_USE_A64_CRYPTO_ONLY */ #if !defined(MBEDTLS_SHA256_USE_A64_CRYPTO_IF_PRESENT) #define mbedtls_internal_sha256_process_many_c mbedtls_internal_sha256_process_many @@ -434,17 +475,17 @@ int mbedtls_internal_sha256_process_a64_crypto( mbedtls_sha256_context *ctx, #if !defined(MBEDTLS_SHA256_PROCESS_ALT) && \ !defined(MBEDTLS_SHA256_USE_A64_CRYPTO_ONLY) -#define SHR(x,n) (((x) & 0xFFFFFFFF) >> (n)) -#define ROTR(x,n) (SHR(x,n) | ((x) << (32 - (n)))) +#define SHR(x, n) (((x) & 0xFFFFFFFF) >> (n)) +#define ROTR(x, n) (SHR(x, n) | ((x) << (32 - (n)))) -#define S0(x) (ROTR(x, 7) ^ ROTR(x,18) ^ SHR(x, 3)) -#define S1(x) (ROTR(x,17) ^ ROTR(x,19) ^ SHR(x,10)) +#define S0(x) (ROTR(x, 7) ^ ROTR(x, 18) ^ SHR(x, 3)) +#define S1(x) (ROTR(x, 17) ^ ROTR(x, 19) ^ SHR(x, 10)) -#define S2(x) (ROTR(x, 2) ^ ROTR(x,13) ^ ROTR(x,22)) -#define S3(x) (ROTR(x, 6) ^ ROTR(x,11) ^ ROTR(x,25)) +#define S2(x) (ROTR(x, 2) ^ ROTR(x, 13) ^ ROTR(x, 22)) +#define S3(x) (ROTR(x, 6) ^ ROTR(x, 11) ^ ROTR(x, 25)) -#define F0(x,y,z) (((x) & (y)) | ((z) & ((x) | (y)))) -#define F1(x,y,z) ((z) ^ ((x) & ((y) ^ (z)))) +#define F0(x, y, z) (((x) & (y)) | ((z) & ((x) | (y)))) +#define F1(x, y, z) ((z) ^ ((x) & ((y) ^ (z)))) #define R(t) \ ( \ @@ -452,13 +493,13 @@ int mbedtls_internal_sha256_process_a64_crypto( mbedtls_sha256_context *ctx, S0(local.W[(t) - 15]) + local.W[(t) - 16] \ ) -#define P(a,b,c,d,e,f,g,h,x,K) \ +#define P(a, b, c, d, e, f, g, h, x, K) \ do \ { \ - local.temp1 = (h) + S3(e) + F1((e),(f),(g)) + (K) + (x); \ - local.temp2 = S2(a) + F0((a),(b),(c)); \ + local.temp1 = (h) + S3(e) + F1((e), (f), (g)) + (K) + (x); \ + local.temp2 = S2(a) + F0((a), (b), (c)); \ (d) += local.temp1; (h) = local.temp1 + local.temp2; \ - } while( 0 ) + } while (0) #if defined(MBEDTLS_SHA256_USE_A64_CRYPTO_IF_PRESENT) /* @@ -467,33 +508,30 @@ int mbedtls_internal_sha256_process_a64_crypto( mbedtls_sha256_context *ctx, */ static #endif -int mbedtls_internal_sha256_process_c( mbedtls_sha256_context *ctx, - const unsigned char data[SHA256_BLOCK_SIZE] ) +int mbedtls_internal_sha256_process_c(mbedtls_sha256_context *ctx, + const unsigned char data[SHA256_BLOCK_SIZE]) { - struct - { + struct { uint32_t temp1, temp2, W[64]; uint32_t A[8]; } local; unsigned int i; - SHA256_VALIDATE_RET( ctx != NULL ); - SHA256_VALIDATE_RET( (const unsigned char *)data != NULL ); - - for( i = 0; i < 8; i++ ) + for (i = 0; i < 8; i++) { A[i] = ctx->state[i]; + } #if defined(MBEDTLS_SHA256_SMALLER) - for( i = 0; i < 64; i++ ) - { - if( i < 16 ) - GET_UINT32_BE( local.W[i], data, 4 * i ); - else - R( i ); + for (i = 0; i < 64; i++) { + if (i < 16) { + GET_UINT32_BE( local.W[i], data, 4 * i); + } else { + R(i); + } - P( local.A[0], local.A[1], local.A[2], local.A[3], local.A[4], - local.A[5], local.A[6], local.A[7], local.W[i], K[i] ); + P(local.A[0], local.A[1], local.A[2], local.A[3], local.A[4], + local.A[5], local.A[6], local.A[7], local.W[i], K[i]); local.temp1 = local.A[7]; local.A[7] = local.A[6]; local.A[6] = local.A[5]; local.A[5] = local.A[4]; @@ -502,57 +540,57 @@ int mbedtls_internal_sha256_process_c( mbedtls_sha256_context *ctx, local.A[0] = local.temp1; } #else /* MBEDTLS_SHA256_SMALLER */ - for( i = 0; i < 16; i++ ) - GET_UINT32_BE( local.W[i], data, 4 * i ); + for (i = 0; i < 16; i++) { + GET_UINT32_BE( local.W[i], data, 4 * i); + } - for( i = 0; i < 16; i += 8 ) - { - P( local.A[0], local.A[1], local.A[2], local.A[3], local.A[4], - local.A[5], local.A[6], local.A[7], local.W[i+0], K[i+0] ); - P( local.A[7], local.A[0], local.A[1], local.A[2], local.A[3], - local.A[4], local.A[5], local.A[6], local.W[i+1], K[i+1] ); - P( local.A[6], local.A[7], local.A[0], local.A[1], local.A[2], - local.A[3], local.A[4], local.A[5], local.W[i+2], K[i+2] ); - P( local.A[5], local.A[6], local.A[7], local.A[0], local.A[1], - local.A[2], local.A[3], local.A[4], local.W[i+3], K[i+3] ); - P( local.A[4], local.A[5], local.A[6], local.A[7], local.A[0], - local.A[1], local.A[2], local.A[3], local.W[i+4], K[i+4] ); - P( local.A[3], local.A[4], local.A[5], local.A[6], local.A[7], - local.A[0], local.A[1], local.A[2], local.W[i+5], K[i+5] ); - P( local.A[2], local.A[3], local.A[4], local.A[5], local.A[6], - local.A[7], local.A[0], local.A[1], local.W[i+6], K[i+6] ); - P( local.A[1], local.A[2], local.A[3], local.A[4], local.A[5], - local.A[6], local.A[7], local.A[0], local.W[i+7], K[i+7] ); + for (i = 0; i < 16; i += 8) { + P(local.A[0], local.A[1], local.A[2], local.A[3], local.A[4], + local.A[5], local.A[6], local.A[7], local.W[i+0], K[i+0]); + P(local.A[7], local.A[0], local.A[1], local.A[2], local.A[3], + local.A[4], local.A[5], local.A[6], local.W[i+1], K[i+1]); + P(local.A[6], local.A[7], local.A[0], local.A[1], local.A[2], + local.A[3], local.A[4], local.A[5], local.W[i+2], K[i+2]); + P(local.A[5], local.A[6], local.A[7], local.A[0], local.A[1], + local.A[2], local.A[3], local.A[4], local.W[i+3], K[i+3]); + P(local.A[4], local.A[5], local.A[6], local.A[7], local.A[0], + local.A[1], local.A[2], local.A[3], local.W[i+4], K[i+4]); + P(local.A[3], local.A[4], local.A[5], local.A[6], local.A[7], + local.A[0], local.A[1], local.A[2], local.W[i+5], K[i+5]); + P(local.A[2], local.A[3], local.A[4], local.A[5], local.A[6], + local.A[7], local.A[0], local.A[1], local.W[i+6], K[i+6]); + P(local.A[1], local.A[2], local.A[3], local.A[4], local.A[5], + local.A[6], local.A[7], local.A[0], local.W[i+7], K[i+7]); } - for( i = 16; i < 64; i += 8 ) - { - P( local.A[0], local.A[1], local.A[2], local.A[3], local.A[4], - local.A[5], local.A[6], local.A[7], R(i+0), K[i+0] ); - P( local.A[7], local.A[0], local.A[1], local.A[2], local.A[3], - local.A[4], local.A[5], local.A[6], R(i+1), K[i+1] ); - P( local.A[6], local.A[7], local.A[0], local.A[1], local.A[2], - local.A[3], local.A[4], local.A[5], R(i+2), K[i+2] ); - P( local.A[5], local.A[6], local.A[7], local.A[0], local.A[1], - local.A[2], local.A[3], local.A[4], R(i+3), K[i+3] ); - P( local.A[4], local.A[5], local.A[6], local.A[7], local.A[0], - local.A[1], local.A[2], local.A[3], R(i+4), K[i+4] ); - P( local.A[3], local.A[4], local.A[5], local.A[6], local.A[7], - local.A[0], local.A[1], local.A[2], R(i+5), K[i+5] ); - P( local.A[2], local.A[3], local.A[4], local.A[5], local.A[6], - local.A[7], local.A[0], local.A[1], R(i+6), K[i+6] ); - P( local.A[1], local.A[2], local.A[3], local.A[4], local.A[5], - local.A[6], local.A[7], local.A[0], R(i+7), K[i+7] ); + for (i = 16; i < 64; i += 8) { + P(local.A[0], local.A[1], local.A[2], local.A[3], local.A[4], + local.A[5], local.A[6], local.A[7], R(i+0), K[i+0]); + P(local.A[7], local.A[0], local.A[1], local.A[2], local.A[3], + local.A[4], local.A[5], local.A[6], R(i+1), K[i+1]); + P(local.A[6], local.A[7], local.A[0], local.A[1], local.A[2], + local.A[3], local.A[4], local.A[5], R(i+2), K[i+2]); + P(local.A[5], local.A[6], local.A[7], local.A[0], local.A[1], + local.A[2], local.A[3], local.A[4], R(i+3), K[i+3]); + P(local.A[4], local.A[5], local.A[6], local.A[7], local.A[0], + local.A[1], local.A[2], local.A[3], R(i+4), K[i+4]); + P(local.A[3], local.A[4], local.A[5], local.A[6], local.A[7], + local.A[0], local.A[1], local.A[2], R(i+5), K[i+5]); + P(local.A[2], local.A[3], local.A[4], local.A[5], local.A[6], + local.A[7], local.A[0], local.A[1], R(i+6), K[i+6]); + P(local.A[1], local.A[2], local.A[3], local.A[4], local.A[5], + local.A[6], local.A[7], local.A[0], R(i+7), K[i+7]); } #endif /* MBEDTLS_SHA256_SMALLER */ - for( i = 0; i < 8; i++ ) + for (i = 0; i < 8; i++) { ctx->state[i] += local.A[i]; + } /* Zeroise buffers and variables to clear sensitive data from memory. */ - mbedtls_platform_zeroize( &local, sizeof( local ) ); - - return( 0 ); + mbedtls_platform_zeroize(&local, sizeof(local)); + + return 0; } #endif /* !MBEDTLS_SHA256_PROCESS_ALT && !MBEDTLS_SHA256_USE_A64_CRYPTO_ONLY */ @@ -561,14 +599,14 @@ int mbedtls_internal_sha256_process_c( mbedtls_sha256_context *ctx, #if !defined(MBEDTLS_SHA256_USE_A64_CRYPTO_ONLY) static size_t mbedtls_internal_sha256_process_many_c( - mbedtls_sha256_context *ctx, const uint8_t *data, size_t len ) + mbedtls_sha256_context *ctx, const uint8_t *data, size_t len) { size_t processed = 0; - while( len >= SHA256_BLOCK_SIZE ) - { - if( mbedtls_internal_sha256_process_c( ctx, data ) != 0 ) - return( 0 ); + while (len >= SHA256_BLOCK_SIZE) { + if (mbedtls_internal_sha256_process_c(ctx, data) != 0) { + return 0; + } data += SHA256_BLOCK_SIZE; len -= SHA256_BLOCK_SIZE; @@ -576,7 +614,7 @@ static size_t mbedtls_internal_sha256_process_many_c( processed += SHA256_BLOCK_SIZE; } - return( processed ); + return processed; } #endif /* !MBEDTLS_SHA256_USE_A64_CRYPTO_ONLY */ @@ -584,36 +622,37 @@ static size_t mbedtls_internal_sha256_process_many_c( #if defined(MBEDTLS_SHA256_USE_A64_CRYPTO_IF_PRESENT) -static int mbedtls_a64_crypto_sha256_has_support( void ) +static int mbedtls_a64_crypto_sha256_has_support(void) { static int done = 0; static int supported = 0; - if( !done ) - { + if (!done) { supported = mbedtls_a64_crypto_sha256_determine_support(); done = 1; } - return( supported ); + return supported; } -static size_t mbedtls_internal_sha256_process_many( mbedtls_sha256_context *ctx, - const uint8_t *msg, size_t len ) +static size_t mbedtls_internal_sha256_process_many(mbedtls_sha256_context *ctx, + const uint8_t *msg, size_t len) { - if( mbedtls_a64_crypto_sha256_has_support() ) - return( mbedtls_internal_sha256_process_many_a64_crypto( ctx, msg, len ) ); - else - return( mbedtls_internal_sha256_process_many_c( ctx, msg, len ) ); + if (mbedtls_a64_crypto_sha256_has_support()) { + return mbedtls_internal_sha256_process_many_a64_crypto(ctx, msg, len); + } else { + return mbedtls_internal_sha256_process_many_c(ctx, msg, len); + } } -int mbedtls_internal_sha256_process( mbedtls_sha256_context *ctx, - const unsigned char data[SHA256_BLOCK_SIZE] ) +int mbedtls_internal_sha256_process(mbedtls_sha256_context *ctx, + const unsigned char data[SHA256_BLOCK_SIZE]) { - if( mbedtls_a64_crypto_sha256_has_support() ) - return( mbedtls_internal_sha256_process_a64_crypto( ctx, data ) ); - else - return( mbedtls_internal_sha256_process_c( ctx, data ) ); + if (mbedtls_a64_crypto_sha256_has_support()) { + return mbedtls_internal_sha256_process_a64_crypto(ctx, data); + } else { + return mbedtls_internal_sha256_process_c(ctx, data); + } } #endif /* MBEDTLS_SHA256_USE_A64_CRYPTO_IF_PRESENT */ @@ -622,20 +661,18 @@ int mbedtls_internal_sha256_process( mbedtls_sha256_context *ctx, /* * SHA-256 process buffer */ -int mbedtls_sha256_update( mbedtls_sha256_context *ctx, - const unsigned char *input, - size_t ilen ) +int mbedtls_sha256_update(mbedtls_sha256_context *ctx, + const unsigned char *input, + size_t ilen) { int ret = MBEDTLS_ERR_ERROR_CORRUPTION_DETECTED; size_t fill; uint32_t left; uint32_t sha256_block_aligned_size; - SHA256_VALIDATE_RET( ctx != NULL ); - SHA256_VALIDATE_RET( ilen == 0 || input != NULL ); - - if( ilen == 0 ) - return( 0 ); + if (ilen == 0) { + return 0; + } left = ctx->total[0] & 0x3F; fill = SHA256_BLOCK_SIZE - left; @@ -643,16 +680,17 @@ int mbedtls_sha256_update( mbedtls_sha256_context *ctx, ctx->total[0] += (uint32_t) ilen; ctx->total[0] &= 0xFFFFFFFF; - if( ctx->total[0] < (uint32_t) ilen ) + if (ctx->total[0] < (uint32_t) ilen) { ctx->total[1]++; + } - if( left && ilen >= fill ) - { - memcpy( (void *) (ctx->buffer + left), input, fill ); + if (left && ilen >= fill) { + memcpy((void *) (ctx->buffer + left), input, fill); /*mbedtls_internal_sha256_process_ext() is an SCE specific modification to improve processing speed by using the SCE for all the block size data rather than 64 bytes at a time. */ - if( ( ret = mbedtls_internal_sha256_process_ext( ctx, ctx->buffer, SIZE_MBEDTLS_SHA256_PROCESS_BUFFER_BYTES ) ) != 0 ) - return( ret ); + if( ( ret = mbedtls_internal_sha256_process_ext( ctx, ctx->buffer, SIZE_MBEDTLS_SHA256_PROCESS_BUFFER_BYTES ) ) != 0) { + return ret; + } input += fill; ilen -= fill; @@ -668,25 +706,23 @@ int mbedtls_sha256_update( mbedtls_sha256_context *ctx, input += (sha256_block_aligned_size * SIZE_MBEDTLS_SHA256_PROCESS_BUFFER_BYTES); } - if( ilen > 0 ) - memcpy( (void *) (ctx->buffer + left), input, ilen ); + if (ilen > 0) { + memcpy((void *) (ctx->buffer + left), input, ilen); + } - return( 0 ); + return 0; } /* * SHA-256 final digest */ -int mbedtls_sha256_finish( mbedtls_sha256_context *ctx, - unsigned char *output ) +int mbedtls_sha256_finish(mbedtls_sha256_context *ctx, + unsigned char *output) { int ret = MBEDTLS_ERR_ERROR_CORRUPTION_DETECTED; uint32_t used; uint32_t high, low; - SHA256_VALIDATE_RET( ctx != NULL ); - SHA256_VALIDATE_RET( (unsigned char *)output != NULL ); - /* * Add padding: 0x80 then 0x00 until 8 bytes remain for the length */ @@ -694,54 +730,56 @@ int mbedtls_sha256_finish( mbedtls_sha256_context *ctx, ctx->buffer[used++] = 0x80; - if( used <= 56 ) - { + if (used <= 56) { /* Enough room for padding + length in current block */ - memset( ctx->buffer + used, 0, 56 - used ); - } - else - { + memset(ctx->buffer + used, 0, 56 - used); + } else { /* We'll need an extra block */ - memset( ctx->buffer + used, 0, SHA256_BLOCK_SIZE - used ); + memset(ctx->buffer + used, 0, SHA256_BLOCK_SIZE - used); - if( ( ret = mbedtls_internal_sha256_process_ext( ctx, ctx->buffer, SIZE_MBEDTLS_SHA256_PROCESS_BUFFER_BYTES ) ) != 0 ) - return( ret ); + if((ret = mbedtls_internal_sha256_process_ext(ctx, ctx->buffer, SIZE_MBEDTLS_SHA256_PROCESS_BUFFER_BYTES)) != 0) { + return ret; + } - memset( ctx->buffer, 0, 56 ); + memset(ctx->buffer, 0, 56); } /* * Add message length */ - high = ( ctx->total[0] >> 29 ) - | ( ctx->total[1] << 3 ); - low = ( ctx->total[0] << 3 ); + high = (ctx->total[0] >> 29) + | (ctx->total[1] << 3); + low = (ctx->total[0] << 3); - MBEDTLS_PUT_UINT32_BE( high, ctx->buffer, 56 ); - MBEDTLS_PUT_UINT32_BE( low, ctx->buffer, 60 ); + MBEDTLS_PUT_UINT32_BE(high, ctx->buffer, 56); + MBEDTLS_PUT_UINT32_BE(low, ctx->buffer, 60); - if( ( ret = mbedtls_internal_sha256_process_ext( ctx, ctx->buffer, SIZE_MBEDTLS_SHA256_PROCESS_BUFFER_BYTES ) ) != 0 ) - return( ret ); + if( ( ret = mbedtls_internal_sha256_process_ext( ctx, ctx->buffer, SIZE_MBEDTLS_SHA256_PROCESS_BUFFER_BYTES ) ) != 0) { + return ret; + } /* * Output final state */ - MBEDTLS_PUT_UINT32_LE( ctx->state[0], output, 0 ); - MBEDTLS_PUT_UINT32_LE( ctx->state[1], output, 4 ); - MBEDTLS_PUT_UINT32_LE( ctx->state[2], output, 8 ); - MBEDTLS_PUT_UINT32_LE( ctx->state[3], output, 12 ); - MBEDTLS_PUT_UINT32_LE( ctx->state[4], output, 16 ); - MBEDTLS_PUT_UINT32_LE( ctx->state[5], output, 20 ); - MBEDTLS_PUT_UINT32_LE( ctx->state[6], output, 24 ); - + MBEDTLS_PUT_UINT32_LE(ctx->state[0], output, 0); + MBEDTLS_PUT_UINT32_LE(ctx->state[1], output, 4); + MBEDTLS_PUT_UINT32_LE(ctx->state[2], output, 8); + MBEDTLS_PUT_UINT32_LE(ctx->state[3], output, 12); + MBEDTLS_PUT_UINT32_LE(ctx->state[4], output, 16); + MBEDTLS_PUT_UINT32_LE(ctx->state[5], output, 20); + MBEDTLS_PUT_UINT32_LE(ctx->state[6], output, 24); + + int truncated = 0; #if defined(MBEDTLS_SHA224_C) - if( ctx->is224 == 0 ) + truncated = ctx->is224; #endif - MBEDTLS_PUT_UINT32_LE( ctx->state[7], output, 28 ); + if (!truncated) { + MBEDTLS_PUT_UINT32_LE(ctx->state[7], output, 28); + } - return( 0 ); + return 0; } #endif /* !MBEDTLS_SHA256_ALT */ -#endif /* MBEDTLS_SHA256_C */ +#endif /* MBEDTLS_SHA256_C */ \ No newline at end of file diff --git a/ra/fsp/src/rm_rai_data_collector/rm_rai_data_collector.c b/ra/fsp/src/rm_rai_data_collector/rm_rai_data_collector.c new file mode 100644 index 000000000..f370224f3 --- /dev/null +++ b/ra/fsp/src/rm_rai_data_collector/rm_rai_data_collector.c @@ -0,0 +1,554 @@ +/*********************************************************************************************************************** + * Copyright [2020-2023] Renesas Electronics Corporation and/or its affiliates. All Rights Reserved. + * + * This software and documentation are supplied by Renesas Electronics America Inc. and may only be used with products + * of Renesas Electronics Corp. and its affiliates ("Renesas"). No other uses are authorized. Renesas products are + * sold pursuant to Renesas terms and conditions of sale. Purchasers are solely responsible for the selection and use + * of Renesas products and Renesas assumes no liability. No license, express or implied, to any intellectual property + * right is granted by Renesas. This software is protected under all applicable laws, including copyright laws. Renesas + * reserves the right to change or discontinue this software and/or this documentation. THE SOFTWARE AND DOCUMENTATION + * IS DELIVERED TO YOU "AS IS," AND RENESAS MAKES NO REPRESENTATIONS OR WARRANTIES, AND TO THE FULLEST EXTENT + * PERMISSIBLE UNDER APPLICABLE LAW, DISCLAIMS ALL WARRANTIES, WHETHER EXPLICITLY OR IMPLICITLY, INCLUDING WARRANTIES + * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, AND NONINFRINGEMENT, WITH RESPECT TO THE SOFTWARE OR + * DOCUMENTATION. RENESAS SHALL HAVE NO LIABILITY ARISING OUT OF ANY SECURITY VULNERABILITY OR BREACH. TO THE MAXIMUM + * EXTENT PERMITTED BY LAW, IN NO EVENT WILL RENESAS BE LIABLE TO YOU IN CONNECTION WITH THE SOFTWARE OR DOCUMENTATION + * (OR ANY PERSON OR ENTITY CLAIMING RIGHTS DERIVED FROM YOU) FOR ANY LOSS, DAMAGES, OR CLAIMS WHATSOEVER, INCLUDING, + * WITHOUT LIMITATION, ANY DIRECT, CONSEQUENTIAL, SPECIAL, INDIRECT, PUNITIVE, OR INCIDENTAL DAMAGES; ANY LOST PROFITS, + * OTHER ECONOMIC DAMAGE, PROPERTY DAMAGE, OR PERSONAL INJURY; AND EVEN IF RENESAS HAS BEEN ADVISED OF THE POSSIBILITY + * OF SUCH LOSS, DAMAGES, CLAIMS OR COSTS. + **********************************************************************************************************************/ + +/*********************************************************************************************************************** + * Includes + **********************************************************************************************************************/ +#include <string.h> +#include <stdlib.h> + +#include "rm_rai_data_collector.h" + +/*********************************************************************************************************************** + * Macro definitions + **********************************************************************************************************************/ + +/** "RMDC" in ASCII, used to determine if module is open. */ +#define RAI_DATA_COLLECTOR_PRV_OPEN (0X524D4443ULL) + +/*********************************************************************************************************************** + * Typedef definitions + **********************************************************************************************************************/ + +/*********************************************************************************************************************** + * Private function prototypes + **********************************************************************************************************************/ + +static void rm_rai_data_collector_submit_frame_buffers(rai_data_collector_instance_ctrl_t * const p_ctrl, uint32_t idx); +static void rm_rai_data_collector_prepare_next_buffer(rai_data_collector_instance_ctrl_t * const p_ctrl, + uint8_t channel); +static void rm_rai_data_collector_error_notification(rai_data_collector_instance_ctrl_t * const p_ctrl, + rai_data_collector_error_event_t event); + +static void rm_rai_data_collector_dtc_end_cb(timer_callback_args_t * p_args); +static void rm_rai_data_collector_dtc_update_info(rai_data_collector_instance_ctrl_t * const p_ctrl, uint8_t channel); + +/*********************************************************************************************************************** + * Private global variables + **********************************************************************************************************************/ + +/*********************************************************************************************************************** + * Global variables + **********************************************************************************************************************/ + +const rai_data_collector_api_t g_dc_on_rai_data_collector = +{ + .open = RM_RAI_DATA_COLLECTOR_Open, + .snapshotChannelRegister = RM_RAI_DATA_COLLECTOR_SnapshotChannelRegister, + .snapshotStart = RM_RAI_DATA_COLLECTOR_SnapshotStart, + .snapshotStop = RM_RAI_DATA_COLLECTOR_SnapshotStop, + .channelBufferGet = RM_RAI_DATA_COLLECTOR_ChannelBufferGet, + .channelWrite = RM_RAI_DATA_COLLECTOR_ChannelWrite, + .bufferRelease = RM_RAI_DATA_COLLECTOR_BufferRelease, + .bufferReset = RM_RAI_DATA_COLLECTOR_BufferReset, + .close = RM_RAI_DATA_COLLECTOR_Close, +}; + +/*******************************************************************************************************************//** + * Opens and configures the Data Collector module. + * + * Implements @ref rai_data_collector_api_t::open(). + * + * @retval FSP_SUCCESS Data Collector successfully configured. + * @retval FSP_ERR_ALREADY_OPEN Module already open. + * @retval FSP_ERR_ASSERTION One or more pointers point to NULL or callback is NULL. + * + * @return See @ref RENESAS_ERROR_CODES or functions called by this function for other possible return codes. + ***********************************************************************************************************************/ +fsp_err_t RM_RAI_DATA_COLLECTOR_Open (rai_data_collector_ctrl_t * const p_api_ctrl, + rai_data_collector_cfg_t const * const p_cfg) +{ + fsp_err_t err = FSP_SUCCESS; + rai_data_collector_instance_ctrl_t * p_ctrl = (rai_data_collector_instance_ctrl_t *) p_api_ctrl; + + /* Validate the parameters and check if the module is initialized */ +#if RM_RAI_DATA_COLLECTOR_CFG_PARAM_CHECKING_ENABLE + FSP_ASSERT(NULL != p_ctrl); + FSP_ASSERT(NULL != p_cfg); + FSP_ASSERT(NULL != p_cfg->p_callback); + FSP_ASSERT(NULL != p_cfg->p_snapshot_cfg); + FSP_ASSERT(NULL != p_cfg->p_data_feed_cfg); + FSP_ASSERT(NULL != p_cfg->p_extend); + FSP_ASSERT(p_cfg->required_frame_len > 0); + FSP_ASSERT(p_cfg->channels > 0 && p_cfg->virt_channels > 0); + FSP_ERROR_RETURN(RAI_DATA_COLLECTOR_PRV_OPEN != p_ctrl->opened, FSP_ERR_ALREADY_OPEN); +#endif + + p_ctrl->p_cfg = p_cfg; + p_ctrl->p_extend = (rai_data_collector_extended_cfg_t *) p_cfg->p_extend; + +#if RM_RAI_DATA_COLLECTOR_CFG_PARAM_CHECKING_ENABLE + FSP_ASSERT(NULL != p_ctrl->p_extend->p_ping_pong_buf); + FSP_ASSERT(NULL != p_ctrl->p_extend->p_ping_pong_buf_hnd); +#endif + + if (p_cfg->p_snapshot_cfg->channels > 0) + { + rai_data_collector_snapshot_cfg_t const * p_snapshot_cfg = p_cfg->p_snapshot_cfg; + +#if RM_RAI_DATA_COLLECTOR_CFG_PARAM_CHECKING_ENABLE + FSP_ASSERT(NULL != p_snapshot_cfg->p_timer); + FSP_ASSERT(NULL != p_snapshot_cfg->p_transfer); + FSP_ASSERT(0 < p_snapshot_cfg->transfer_len); + FSP_ASSERT(NULL != p_ctrl->p_extend->p_transfer_info); +#endif + err = p_snapshot_cfg->p_transfer->p_api->open(p_snapshot_cfg->p_transfer->p_ctrl, + p_snapshot_cfg->p_transfer->p_cfg); + FSP_ERROR_RETURN(FSP_SUCCESS == err, err); + + err = p_snapshot_cfg->p_timer->p_api->open(p_snapshot_cfg->p_timer->p_ctrl, p_snapshot_cfg->p_timer->p_cfg); + FSP_ERROR_RETURN(FSP_SUCCESS == err, err); + + err = p_snapshot_cfg->p_timer->p_api->callbackSet(p_snapshot_cfg->p_timer->p_ctrl, + rm_rai_data_collector_dtc_end_cb, + p_ctrl, + NULL); + FSP_ERROR_RETURN(FSP_SUCCESS == err, err); + } + + p_ctrl->channel_ready = 0; + p_ctrl->buf_status = RAI_DATA_COLLECTOR_BUFFER_STATUS_IDLE; + + for (uint8_t i = 0; i < p_cfg->virt_channels; i++) + { + p_ctrl->p_extend->p_ping_pong_buf_hnd[i].buf_idx = 0; + p_ctrl->p_extend->p_ping_pong_buf_hnd[i].accumulated_len = 0; + } + + p_ctrl->opened = RAI_DATA_COLLECTOR_PRV_OPEN; + + return FSP_SUCCESS; +} + +/*******************************************************************************************************************//** + * Config transfer src address for snapshot mode channel + * + * Implements @ref rai_data_collector_api_t::snapshotChannelRegister(). + * + * @retval FSP_SUCCESS Src addresses are set. + * @retval FSP_ERR_ASSERTION An input parameter was invalid. + * @retval FSP_ERR_NOT_OPEN Module not open. + * + **********************************************************************************************************************/ +fsp_err_t RM_RAI_DATA_COLLECTOR_SnapshotChannelRegister (rai_data_collector_ctrl_t * const p_api_ctrl, + uint8_t channel, + void const * p_src) +{ + rai_data_collector_instance_ctrl_t * p_ctrl = (rai_data_collector_instance_ctrl_t *) p_api_ctrl; + +#if RM_RAI_DATA_COLLECTOR_CFG_PARAM_CHECKING_ENABLE + FSP_ASSERT(NULL != p_ctrl); + FSP_ASSERT(NULL != p_src); + FSP_ERROR_RETURN(RAI_DATA_COLLECTOR_PRV_OPEN == p_ctrl->opened, FSP_ERR_NOT_OPEN); + FSP_ASSERT(channel < p_ctrl->p_cfg->p_snapshot_cfg->channels); +#endif + + p_ctrl->p_extend->p_transfer_info[channel].p_src = p_src; + + return FSP_SUCCESS; +} + +/*******************************************************************************************************************//** + * Release frame buffer + * + * Implements @ref rai_data_collector_api_t::bufferRelease(). + * + * @retval FSP_SUCCESS Buffer released. + * @retval FSP_ERR_ASSERTION An input parameter was invalid. + * @retval FSP_ERR_NOT_OPEN Module not open. + * + **********************************************************************************************************************/ +fsp_err_t RM_RAI_DATA_COLLECTOR_BufferRelease (rai_data_collector_ctrl_t * const p_api_ctrl) +{ + rai_data_collector_instance_ctrl_t * p_ctrl = (rai_data_collector_instance_ctrl_t *) p_api_ctrl; + +#if RM_RAI_DATA_COLLECTOR_CFG_PARAM_CHECKING_ENABLE + FSP_ASSERT(NULL != p_ctrl); + FSP_ERROR_RETURN(RAI_DATA_COLLECTOR_PRV_OPEN == p_ctrl->opened, FSP_ERR_NOT_OPEN); +#endif + + p_ctrl->buf_status = RAI_DATA_COLLECTOR_BUFFER_STATUS_IDLE; + + return FSP_SUCCESS; +} + +/*******************************************************************************************************************//** + * Reset to discard accumulated data and start with PING buffer. + * @note Application must stop data transfer on all channels first. + * + * Implements @ref rai_data_collector_api_t::bufferReset(). + * + * @retval FSP_SUCCESS Data Collector module internal buffers reset. + * @retval FSP_ERR_ASSERTION An input parameter was invalid. + * @retval FSP_ERR_NOT_OPEN Module not open. + * + **********************************************************************************************************************/ +fsp_err_t RM_RAI_DATA_COLLECTOR_BufferReset (rai_data_collector_ctrl_t * const p_api_ctrl) +{ + rai_data_collector_instance_ctrl_t * p_ctrl = (rai_data_collector_instance_ctrl_t *) p_api_ctrl; + +#if RM_RAI_DATA_COLLECTOR_CFG_PARAM_CHECKING_ENABLE + FSP_ASSERT(NULL != p_ctrl); + FSP_ERROR_RETURN(RAI_DATA_COLLECTOR_PRV_OPEN == p_ctrl->opened, FSP_ERR_NOT_OPEN); +#endif + + p_ctrl->channel_ready = 0; + p_ctrl->buf_status = RAI_DATA_COLLECTOR_BUFFER_STATUS_IDLE; + + for (uint8_t i = 0; i < p_ctrl->p_cfg->virt_channels; i++) + { + p_ctrl->p_extend->p_ping_pong_buf_hnd[i].buf_idx = 0; + p_ctrl->p_extend->p_ping_pong_buf_hnd[i].accumulated_len = 0; + } + + return FSP_SUCCESS; +} + +/*******************************************************************************************************************//** + * Starts snapshot mode channels + * + * Implements @ref rai_data_collector_api_t::snapshotStart(). + * + * @retval FSP_SUCCESS Snapshot mode started. + * @retval FSP_ERR_ASSERTION An input parameter was invalid. + * @retval FSP_ERR_NOT_OPEN Module not open. + * @retval FSP_ERR_UNSUPPORTED No snapshot mode channel + * + * @return See @ref RENESAS_ERROR_CODES or functions called by this function for other possible return codes. + **********************************************************************************************************************/ +fsp_err_t RM_RAI_DATA_COLLECTOR_SnapshotStart (rai_data_collector_ctrl_t * const p_api_ctrl) +{ + rai_data_collector_instance_ctrl_t * p_ctrl = (rai_data_collector_instance_ctrl_t *) p_api_ctrl; + +#if RM_RAI_DATA_COLLECTOR_CFG_PARAM_CHECKING_ENABLE + FSP_ASSERT(NULL != p_ctrl); + FSP_ERROR_RETURN(RAI_DATA_COLLECTOR_PRV_OPEN == p_ctrl->opened, FSP_ERR_NOT_OPEN); + FSP_ERROR_RETURN(0 < p_ctrl->p_cfg->p_snapshot_cfg->channels, FSP_ERR_UNSUPPORTED); +#endif + + rm_rai_data_collector_dtc_update_info(p_ctrl, p_ctrl->p_cfg->p_data_feed_cfg->channels); + + timer_instance_t const * p_timer = p_ctrl->p_cfg->p_snapshot_cfg->p_timer; + fsp_err_t err = p_timer->p_api->reset(p_timer->p_ctrl); + FSP_ERROR_RETURN(FSP_SUCCESS == err, err); + + err = p_timer->p_api->start(p_timer->p_ctrl); + FSP_ERROR_RETURN(FSP_SUCCESS == err, err); + + return FSP_SUCCESS; +} + +/*******************************************************************************************************************//** + * Stops snapshot mode channels + * + * Implements @ref rai_data_collector_api_t::snapshotStop(). + * + * @retval FSP_SUCCESS Snapshot mode stopped. + * @retval FSP_ERR_ASSERTION An input parameter was invalid. + * @retval FSP_ERR_NOT_OPEN Module not open. + * @retval FSP_ERR_UNSUPPORTED No snapshot mode channel + * + * @return See @ref RENESAS_ERROR_CODES or functions called by this function for other possible return codes. + **********************************************************************************************************************/ +fsp_err_t RM_RAI_DATA_COLLECTOR_SnapshotStop (rai_data_collector_ctrl_t * const p_api_ctrl) +{ + rai_data_collector_instance_ctrl_t * p_ctrl = (rai_data_collector_instance_ctrl_t *) p_api_ctrl; + +#if RM_RAI_DATA_COLLECTOR_CFG_PARAM_CHECKING_ENABLE + FSP_ASSERT(NULL != p_ctrl); + FSP_ERROR_RETURN(RAI_DATA_COLLECTOR_PRV_OPEN == p_ctrl->opened, FSP_ERR_NOT_OPEN); + FSP_ERROR_RETURN(0 < p_ctrl->p_cfg->p_snapshot_cfg->channels, FSP_ERR_UNSUPPORTED); +#endif + + timer_instance_t const * p_timer = p_ctrl->p_cfg->p_snapshot_cfg->p_timer; + fsp_err_t err = p_timer->p_api->stop(p_timer->p_ctrl); + FSP_ERROR_RETURN(FSP_SUCCESS == err, err); + + transfer_instance_t const * p_transfer = p_ctrl->p_cfg->p_snapshot_cfg->p_transfer; + err = p_transfer->p_api->disable(p_transfer->p_ctrl); + FSP_ERROR_RETURN(FSP_SUCCESS == err, err); + + return FSP_SUCCESS; +} + +/*******************************************************************************************************************//** + * Get channel destination buffer address for asynchronous data transfer. + * + * Implements @ref rai_data_collector_api_t::channelBufferGet(). + * + * @retval FSP_SUCCESS Buffer avaialble. + * @retval FSP_ERR_ASSERTION An input parameter was invalid. + * @retval FSP_ERR_NOT_OPEN Module not open. + * + **********************************************************************************************************************/ +fsp_err_t RM_RAI_DATA_COLLECTOR_ChannelBufferGet (rai_data_collector_ctrl_t * const p_api_ctrl, + uint8_t channel, + void ** pp_buf) +{ + rai_data_collector_instance_ctrl_t * p_ctrl = (rai_data_collector_instance_ctrl_t *) p_api_ctrl; + +#if RM_RAI_DATA_COLLECTOR_CFG_PARAM_CHECKING_ENABLE + FSP_ASSERT(NULL != p_ctrl); + FSP_ASSERT(NULL != pp_buf); + FSP_ERROR_RETURN(RAI_DATA_COLLECTOR_PRV_OPEN == p_ctrl->opened, FSP_ERR_NOT_OPEN); + FSP_ASSERT(channel < p_ctrl->p_cfg->p_data_feed_cfg->channels); +#endif + + rm_rai_data_collector_prepare_next_buffer(p_ctrl, channel); + + uint32_t unit_size = p_ctrl->p_extend->p_ping_pong_buf[channel].data_type & RAI_DATA_COLLECTOR_DATA_TYPE_SIZE_MASK; + *pp_buf = (uint8_t *) p_ctrl->p_extend->p_ping_pong_buf[channel].p_buf + + p_ctrl->p_extend->p_ping_pong_buf_hnd[channel].buf_idx * p_ctrl->p_cfg->required_frame_len * + unit_size + + p_ctrl->p_extend->p_ping_pong_buf_hnd[channel].accumulated_len * unit_size; + + p_ctrl->p_extend->p_ping_pong_buf_hnd[channel].accumulated_len += p_ctrl->p_cfg->required_frame_len; + + return FSP_SUCCESS; +} + +/*******************************************************************************************************************//** + * Synchronouse data transfer using CPU copy. + * + * Implements @ref rai_data_collector_api_t::channelWrite(). + * + * @retval FSP_SUCCESS Data copy completed. + * @retval FSP_ERR_ASSERTION An input parameter was invalid. + * @retval FSP_ERR_NOT_OPEN Module not open. + * + **********************************************************************************************************************/ +fsp_err_t RM_RAI_DATA_COLLECTOR_ChannelWrite (rai_data_collector_ctrl_t * const p_api_ctrl, + uint8_t channel, + const void * p_buf, + uint32_t len) +{ + rai_data_collector_instance_ctrl_t * p_ctrl = (rai_data_collector_instance_ctrl_t *) p_api_ctrl; + +#if RM_RAI_DATA_COLLECTOR_CFG_PARAM_CHECKING_ENABLE + FSP_ASSERT(NULL != p_ctrl); + FSP_ASSERT(NULL != p_buf); + FSP_ASSERT(len > 0); + FSP_ERROR_RETURN(RAI_DATA_COLLECTOR_PRV_OPEN == p_ctrl->opened, FSP_ERR_NOT_OPEN); + FSP_ASSERT(channel < p_ctrl->p_cfg->p_data_feed_cfg->channels); + FSP_ASSERT(len + p_ctrl->p_extend->p_ping_pong_buf_hnd[channel].accumulated_len <= + p_ctrl->p_cfg->required_frame_len); +#endif + + uint32_t unit_size = p_ctrl->p_extend->p_ping_pong_buf[channel].data_type & RAI_DATA_COLLECTOR_DATA_TYPE_SIZE_MASK; + uint8_t * p_dest = (uint8_t *) p_ctrl->p_extend->p_ping_pong_buf[channel].p_buf + + (p_ctrl->p_extend->p_ping_pong_buf_hnd[channel].buf_idx * + p_ctrl->p_cfg->required_frame_len + + p_ctrl->p_extend->p_ping_pong_buf_hnd[channel].accumulated_len) * unit_size; + + memcpy(p_dest, p_buf, len * unit_size); + + p_ctrl->p_extend->p_ping_pong_buf_hnd[channel].accumulated_len += len; + rm_rai_data_collector_prepare_next_buffer(p_ctrl, channel); + + return FSP_SUCCESS; +} + +/*******************************************************************************************************************//** + * Closes Data Collector module instance. + * + * Implements @ref rai_data_collector_api_t::close(). + * + * @retval FSP_SUCCESS Data Collector module closed. + * @retval FSP_ERR_ASSERTION An input parameter was invalid. + * @retval FSP_ERR_NOT_OPEN Module not open. + * + * @return See @ref RENESAS_ERROR_CODES or functions called by this function for other possible return codes. + **********************************************************************************************************************/ +fsp_err_t RM_RAI_DATA_COLLECTOR_Close (rai_data_collector_ctrl_t * const p_api_ctrl) +{ + rai_data_collector_instance_ctrl_t * p_ctrl = (rai_data_collector_instance_ctrl_t *) p_api_ctrl; + +#if RM_RAI_DATA_COLLECTOR_CFG_PARAM_CHECKING_ENABLE + FSP_ASSERT(NULL != p_ctrl); + FSP_ERROR_RETURN(RAI_DATA_COLLECTOR_PRV_OPEN == p_ctrl->opened, FSP_ERR_NOT_OPEN); +#endif + + if (p_ctrl->p_cfg->p_snapshot_cfg->channels > 0) + { + timer_instance_t const * p_timer = p_ctrl->p_cfg->p_snapshot_cfg->p_timer; + fsp_err_t err = p_timer->p_api->close(p_timer->p_ctrl); + FSP_ERROR_RETURN(FSP_SUCCESS == err, err); + + transfer_instance_t const * p_transfer = p_ctrl->p_cfg->p_snapshot_cfg->p_transfer; + err = p_transfer->p_api->close(p_transfer->p_ctrl); + FSP_ERROR_RETURN(FSP_SUCCESS == err, err); + } + + p_ctrl->opened = 0; + + return FSP_SUCCESS; +} + +/* Data ready callback */ +static void rm_rai_data_collector_submit_frame_buffers (rai_data_collector_instance_ctrl_t * const p_ctrl, uint32_t idx) +{ + rai_data_collector_frame_buffer_t frame_buf[RM_RAI_DATA_COLLECTOR_CFG_MAX_CHANNELS]; + + rai_data_collector_callback_args_t args = + { + .instance_id = p_ctrl->p_cfg->instance_id, + .p_context = p_ctrl->p_cfg->p_context, + .frame_buf_len = p_ctrl->p_cfg->required_frame_len, + .frames = p_ctrl->p_cfg->channels, + .p_frame_buf = frame_buf, + }; + + for (uint8_t i = 0; i < p_ctrl->p_cfg->channels; i++) + { + uint32_t unit_size = p_ctrl->p_extend->p_ping_pong_buf[i].data_type & RAI_DATA_COLLECTOR_DATA_TYPE_SIZE_MASK; + frame_buf[i].p_buf = (uint8_t *) p_ctrl->p_extend->p_ping_pong_buf[i].p_buf + idx * + p_ctrl->p_cfg->required_frame_len * + unit_size; + + frame_buf[i].data_type = p_ctrl->p_extend->p_ping_pong_buf[i].data_type; + } + + p_ctrl->p_cfg->p_callback(&args); +} + +/* Error callback */ +static void rm_rai_data_collector_error_notification (rai_data_collector_instance_ctrl_t * const p_ctrl, + rai_data_collector_error_event_t event) +{ + if (p_ctrl->p_cfg->p_error_callback) + { + rai_data_collector_error_callback_args_t arg = + { + .instance_id = p_ctrl->p_cfg->instance_id, + .event = event, + }; + + p_ctrl->p_cfg->p_error_callback(&arg); + } +} + +/* Prepare frame buffer for next data transfer. Note this function may be called in ISRs. It is possible + * that application will be notified multpile times for the same error events (disabling global interrupt + * should be avoided in FSP). It is strongly recommended for the application to handle error event in the + * main loop, but not in the callback. + */ +static void rm_rai_data_collector_prepare_next_buffer (rai_data_collector_instance_ctrl_t * const p_ctrl, + uint8_t channel) +{ + if (p_ctrl->p_extend->p_ping_pong_buf_hnd[channel].accumulated_len >= p_ctrl->p_cfg->required_frame_len) + { + /* Current frame buffer is filled up */ + + if (!(RAI_DATA_COLLECTOR_BUFFER_STATUS_OVERRUN & p_ctrl->buf_status)) + { + if (RAI_DATA_COLLECTOR_BUFFER_STATUS_BUSY & p_ctrl->buf_status) + { + /* Overwrite the current frame buffer if next buffer has not been released yet */ + p_ctrl->buf_status |= RAI_DATA_COLLECTOR_BUFFER_STATUS_OVERRUN; + rm_rai_data_collector_error_notification(p_ctrl, RAI_DATA_COLLECTOR_ERROR_TYPE_BUF_OVERRUN); + } + else + { + /* PING-PONG buffer: the other buffer is available */ + + if (p_ctrl->channel_ready & (1 << channel)) + { + /* Fatal: The other buffer has not been submitted, e.g some channel stopped collecting data */ + rm_rai_data_collector_error_notification(p_ctrl, RAI_DATA_COLLECTOR_ERROR_TYPE_BUF_OUT_OF_SYNC); + } + else + { + /* Mark frame buffer as ready */ + p_ctrl->channel_ready |= 1 << channel; + + /* Check whether all frame buffers are ready */ + if (p_ctrl->p_cfg->channel_ready_mask == p_ctrl->channel_ready) + { + p_ctrl->buf_status |= RAI_DATA_COLLECTOR_BUFFER_STATUS_BUSY; + p_ctrl->channel_ready = 0; + rm_rai_data_collector_submit_frame_buffers(p_ctrl, + p_ctrl->p_extend->p_ping_pong_buf_hnd[channel].buf_idx); + } + } + + /* Switch Ping-Pong buffer */ + p_ctrl->p_extend->p_ping_pong_buf_hnd[channel].buf_idx ^= 1; + } + } + + p_ctrl->p_extend->p_ping_pong_buf_hnd[channel].accumulated_len = 0; + } +} + +static void rm_rai_data_collector_dtc_end_cb (timer_callback_args_t * p_args) +{ + rai_data_collector_instance_ctrl_t * p_ctrl = (rai_data_collector_instance_ctrl_t *) p_args->p_context; + + rm_rai_data_collector_dtc_update_info(p_ctrl, p_ctrl->p_cfg->p_data_feed_cfg->channels); +} + +static void rm_rai_data_collector_dtc_update_info (rai_data_collector_instance_ctrl_t * const p_ctrl, uint8_t channel) +{ + /* Snapshot mode channels shall have the same accumulated length and idx */ + transfer_info_t * p_info = p_ctrl->p_extend->p_transfer_info; + + rm_rai_data_collector_prepare_next_buffer(p_ctrl, channel); + + uint32_t offset = p_ctrl->p_extend->p_ping_pong_buf_hnd[channel].buf_idx * p_ctrl->p_cfg->required_frame_len; + for (uint8_t i = 0; i < p_ctrl->p_cfg->p_snapshot_cfg->channels; i++) + { + if (p_ctrl->p_extend->p_ping_pong_buf[i + p_ctrl->p_cfg->p_data_feed_cfg->channels].data_type != + RAI_DATA_COLLECTOR_DATA_TYPE_DOUBLE) + { + p_info[i].length = p_ctrl->p_cfg->p_snapshot_cfg->transfer_len; + p_info[i].p_dest = + (uint8_t *) p_ctrl->p_extend->p_ping_pong_buf[i + p_ctrl->p_cfg->p_data_feed_cfg->channels].p_buf + + ((offset + p_ctrl->p_extend->p_ping_pong_buf_hnd[channel].accumulated_len) << + p_info[i].transfer_settings_word_b.size); + } + else + { + /* The unit transfer size of DTC is 1 byte, 2bytes or 4 bytes. The transfer len for type "double" needs to be doubled + * when the unit transfer size is initialized to 4 Bytes. + */ + p_info[i].length = (uint16_t) (p_ctrl->p_cfg->p_snapshot_cfg->transfer_len << 1); + p_info[i].p_dest = + (uint8_t *) p_ctrl->p_extend->p_ping_pong_buf[i + p_ctrl->p_cfg->p_data_feed_cfg->channels].p_buf + + ((offset + p_ctrl->p_extend->p_ping_pong_buf_hnd[channel].accumulated_len) << 3); + } + + p_info[i].num_blocks = 1; + } + + p_ctrl->p_extend->p_ping_pong_buf_hnd[channel].accumulated_len += p_ctrl->p_cfg->p_snapshot_cfg->transfer_len; + + p_ctrl->p_cfg->p_snapshot_cfg->p_transfer->p_api->reconfigure(p_ctrl->p_cfg->p_snapshot_cfg->p_transfer->p_ctrl, + p_info); +} diff --git a/ra/fsp/src/rm_rai_data_shipper/rm_rai_data_shipper.c b/ra/fsp/src/rm_rai_data_shipper/rm_rai_data_shipper.c new file mode 100644 index 000000000..7f258c56e --- /dev/null +++ b/ra/fsp/src/rm_rai_data_shipper/rm_rai_data_shipper.c @@ -0,0 +1,336 @@ +/*********************************************************************************************************************** + * Copyright [2020-2023] Renesas Electronics Corporation and/or its affiliates. All Rights Reserved. + * + * This software and documentation are supplied by Renesas Electronics America Inc. and may only be used with products + * of Renesas Electronics Corp. and its affiliates ("Renesas"). No other uses are authorized. Renesas products are + * sold pursuant to Renesas terms and conditions of sale. Purchasers are solely responsible for the selection and use + * of Renesas products and Renesas assumes no liability. No license, express or implied, to any intellectual property + * right is granted by Renesas. This software is protected under all applicable laws, including copyright laws. Renesas + * reserves the right to change or discontinue this software and/or this documentation. THE SOFTWARE AND DOCUMENTATION + * IS DELIVERED TO YOU "AS IS," AND RENESAS MAKES NO REPRESENTATIONS OR WARRANTIES, AND TO THE FULLEST EXTENT + * PERMISSIBLE UNDER APPLICABLE LAW, DISCLAIMS ALL WARRANTIES, WHETHER EXPLICITLY OR IMPLICITLY, INCLUDING WARRANTIES + * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, AND NONINFRINGEMENT, WITH RESPECT TO THE SOFTWARE OR + * DOCUMENTATION. RENESAS SHALL HAVE NO LIABILITY ARISING OUT OF ANY SECURITY VULNERABILITY OR BREACH. TO THE MAXIMUM + * EXTENT PERMITTED BY LAW, IN NO EVENT WILL RENESAS BE LIABLE TO YOU IN CONNECTION WITH THE SOFTWARE OR DOCUMENTATION + * (OR ANY PERSON OR ENTITY CLAIMING RIGHTS DERIVED FROM YOU) FOR ANY LOSS, DAMAGES, OR CLAIMS WHATSOEVER, INCLUDING, + * WITHOUT LIMITATION, ANY DIRECT, CONSEQUENTIAL, SPECIAL, INDIRECT, PUNITIVE, OR INCIDENTAL DAMAGES; ANY LOST PROFITS, + * OTHER ECONOMIC DAMAGE, PROPERTY DAMAGE, OR PERSONAL INJURY; AND EVEN IF RENESAS HAS BEEN ADVISED OF THE POSSIBILITY + * OF SUCH LOSS, DAMAGES, CLAIMS OR COSTS. + **********************************************************************************************************************/ + +/*********************************************************************************************************************** + * Includes + **********************************************************************************************************************/ +#include <string.h> +#include <stdlib.h> + +#include "rm_rai_data_shipper.h" + +/*********************************************************************************************************************** + * Macro definitions + **********************************************************************************************************************/ + +/* "RMDS" in ASCII, used to determine if module is open. */ +#define RAI_DATA_SHIPPER_PRV_OPEN (0X524D4453ULL) + +#define RAI_DATA_SHIPPER_PRV_HEADER_BUFFER_BASE_SIZE (17U) ///< Size of rai_data_shipper_header_buffer_t excluding data_type array + +/*********************************************************************************************************************** + * Typedef definitions + **********************************************************************************************************************/ +#define RM_RAI_DATA_SHIPPER_HEADER_BUFFER_VERSION (0) + +/*********************************************************************************************************************** + * Private function prototypes + **********************************************************************************************************************/ + +static void rai_data_shipper_write_callback(rm_comms_callback_args_t * p_args); +static void rai_data_shipper_notify_application(rai_data_shipper_instance_ctrl_t * p_ctrl, rm_comms_event_t event); + +/*********************************************************************************************************************** + * Private global variables + **********************************************************************************************************************/ + +/*********************************************************************************************************************** + * Global variables + **********************************************************************************************************************/ + +const rai_data_shipper_api_t g_ds_on_rai_data_shipper = +{ + .open = RM_RAI_DATA_SHIPPER_Open, + .read = RM_RAI_DATA_SHIPPER_Read, + .write = RM_RAI_DATA_SHIPPER_Write, + .close = RM_RAI_DATA_SHIPPER_Close +}; + +/*******************************************************************************************************************//** + * Opens and configures the Data Shipper module. + * + * Implements @ref rai_data_shipper_api_t::open(). + * + * @retval FSP_SUCCESS Data Shipper successfully configured. + * @retval FSP_ERR_ALREADY_OPEN Module already open. + * @retval FSP_ERR_ASSERTION One or more pointers point to NULL or callback is NULL. + * + * @return See @ref RENESAS_ERROR_CODES or functions called by this function for other possible return codes. + ***********************************************************************************************************************/ +fsp_err_t RM_RAI_DATA_SHIPPER_Open (rai_data_shipper_ctrl_t * const p_api_ctrl, + rai_data_shipper_cfg_t const * const p_cfg) +{ + fsp_err_t err = FSP_SUCCESS; + rai_data_shipper_instance_ctrl_t * p_ctrl = (rai_data_shipper_instance_ctrl_t *) p_api_ctrl; + + /* Validate the parameters and check if the module is initialized */ +#if RM_RAI_DATA_SHIPPER_CFG_PARAM_CHECKING_ENABLE + FSP_ASSERT(NULL != p_ctrl); + FSP_ASSERT(NULL != p_cfg); + FSP_ASSERT(NULL != p_cfg->p_comms); + FSP_ERROR_RETURN(RAI_DATA_SHIPPER_PRV_OPEN != p_ctrl->opened, FSP_ERR_ALREADY_OPEN); +#endif + + p_ctrl->p_cfg = p_cfg; + + if (p_cfg->p_crc != NULL) + { + err = p_cfg->p_crc->p_api->open(p_cfg->p_crc->p_ctrl, p_cfg->p_crc->p_cfg); + FSP_ERROR_RETURN(FSP_SUCCESS == err, err); + } + + err = p_cfg->p_comms->p_api->open(p_cfg->p_comms->p_ctrl, p_cfg->p_comms->p_cfg); + FSP_ERROR_RETURN(FSP_SUCCESS == err, err); + + err = p_cfg->p_comms->p_api->callbackSet(p_cfg->p_comms->p_ctrl, rai_data_shipper_write_callback, p_ctrl); + FSP_ERROR_RETURN(FSP_SUCCESS == err, err); + + p_ctrl->tx_info.header.rssn[0] = 'R'; + p_ctrl->tx_info.header.rssn[1] = 'S'; + p_ctrl->tx_info.header.rssn[2] = 'S'; + p_ctrl->tx_info.header.rssn[3] = 'N'; + p_ctrl->tx_info.header.crc_enable = (p_cfg->p_crc != NULL) ? 1 : 0; + p_ctrl->tx_info.header.version = RM_RAI_DATA_SHIPPER_HEADER_BUFFER_VERSION; + + p_ctrl->opened = RAI_DATA_SHIPPER_PRV_OPEN; + + return FSP_SUCCESS; +} + +/*******************************************************************************************************************//** + * Read data. + * + * Implements @ref rai_data_shipper_api_t::read(). + * + * @retval FSP_ERR_UNSUPPORTED Data Shipper module read not supported + * + **********************************************************************************************************************/ +fsp_err_t RM_RAI_DATA_SHIPPER_Read (rai_data_shipper_ctrl_t * const p_api_ctrl, + void * const p_buf, + uint32_t * const buf_len) +{ + FSP_PARAMETER_NOT_USED(p_api_ctrl); + FSP_PARAMETER_NOT_USED(p_buf); + FSP_PARAMETER_NOT_USED(buf_len); + + return FSP_ERR_UNSUPPORTED; +} + +/*******************************************************************************************************************//** + * Write data. Note this funciton may be called in ISR. + * + * Implements @ref rai_data_shipper_api_t::write(). + * + * @retval FSP_SUCCESS Tx buf list created and transmission starts, or write request skipped. + * @retval FSP_ERR_ASSERTION An input parameter was invalid. + * @retval FSP_ERR_NOT_OPEN Module not open. + * + **********************************************************************************************************************/ +fsp_err_t RM_RAI_DATA_SHIPPER_Write (rai_data_shipper_ctrl_t * const p_api_ctrl, + rai_data_shipper_write_params_t const * p_write_params) +{ + rai_data_shipper_instance_ctrl_t * p_ctrl = (rai_data_shipper_instance_ctrl_t *) p_api_ctrl; + +#if RM_RAI_DATA_SHIPPER_CFG_PARAM_CHECKING_ENABLE + FSP_ASSERT(NULL != p_ctrl); + FSP_ASSERT(NULL != p_write_params); + FSP_ASSERT(NULL != p_write_params->p_diagnostic_data || NULL != p_write_params->p_sensor_data); + FSP_ERROR_RETURN(RAI_DATA_SHIPPER_PRV_OPEN == p_ctrl->opened, FSP_ERR_NOT_OPEN); +#endif + + /* Skip write requests */ + if (p_ctrl->tx_info.write_requests < p_ctrl->p_cfg->divider) + { + p_ctrl->tx_info.write_requests++; + rai_data_shipper_notify_application(p_ctrl, RM_COMMS_EVENT_TX_OPERATION_COMPLETE); + + return FSP_SUCCESS; + } + + p_ctrl->tx_info.write_requests = 0; + + p_ctrl->tx_info.current = 0; + p_ctrl->tx_info.channels = 0; + + if (p_write_params->p_sensor_data) + { + /* Fill up header buffer */ + p_ctrl->tx_info.header.channels = p_write_params->p_sensor_data->frames; + p_ctrl->tx_info.header.instance_id = p_write_params->p_sensor_data->instance_id; + p_ctrl->tx_info.header.frame_buf_len = p_write_params->p_sensor_data->frame_buf_len; + + for (uint8_t i = 0; i < p_write_params->p_sensor_data->frames; i++) + { + /* + * Data shipper shall be designed with maximum throughput in mind. So data type needs to be converted from "rai_data_collector_data_type_t" to 4 bits. + * The 4-bit data type value is encoded in bits [4:7] in rai_data_collector_data_type_t. + */ + if (i & 1) + { + /* Odd channels use high 4 bits */ + uint8_t val = + (uint8_t) (p_write_params->p_sensor_data->p_frame_buf[i].data_type & + (uint32_t) (~RAI_DATA_COLLECTOR_DATA_TYPE_SIZE_MASK)); + p_ctrl->tx_info.header.data_type[i >> 1] |= val; + } + else + { + /* Even channels use lower 4 bits */ + p_ctrl->tx_info.header.data_type[i >> + 1] = + (uint8_t) ((p_write_params->p_sensor_data->p_frame_buf[i].data_type >> 4) & + RAI_DATA_COLLECTOR_DATA_TYPE_SIZE_MASK); + } + + p_ctrl->tx_info.data[p_ctrl->tx_info.channels].p_buf = p_write_params->p_sensor_data->p_frame_buf[i].p_buf; + p_ctrl->tx_info.data[p_ctrl->tx_info.channels].len = p_write_params->p_sensor_data->frame_buf_len * + (p_write_params->p_sensor_data->p_frame_buf[i]. + data_type & + RAI_DATA_COLLECTOR_DATA_TYPE_SIZE_MASK); + p_ctrl->tx_info.channels++; + } + } + else + { + p_ctrl->tx_info.header.instance_id = 0; + p_ctrl->tx_info.header.channels = 0; + p_ctrl->tx_info.header.frame_buf_len = 0; + } + + uint32_t header_buffer_len = RAI_DATA_SHIPPER_PRV_HEADER_BUFFER_BASE_SIZE + + (uint32_t) ((p_ctrl->tx_info.header.channels + 1) >> 1); + + p_ctrl->tx_info.header.events = p_write_params->events; + p_ctrl->tx_info.header.diagnostic_data_len = p_write_params->diagnostic_data_len; + + if (p_write_params->p_diagnostic_data && (p_write_params->diagnostic_data_len > 0)) + { + p_ctrl->tx_info.data[p_ctrl->tx_info.channels].p_buf = (void *) p_write_params->p_diagnostic_data; + p_ctrl->tx_info.data[p_ctrl->tx_info.channels].len = p_write_params->diagnostic_data_len; + p_ctrl->tx_info.channels++; + } + + if (p_ctrl->p_cfg->p_crc) + { + uint32_t crc = 0; + crc_input_t input; + + input.p_input_buffer = (void *) &p_ctrl->tx_info.header; + input.num_bytes = header_buffer_len; + input.crc_seed = crc; + p_ctrl->p_cfg->p_crc->p_api->calculate(p_ctrl->p_cfg->p_crc->p_ctrl, &input, &crc); + + for (uint8_t i = 0; i < p_ctrl->tx_info.channels; i++) + { + input.p_input_buffer = p_ctrl->tx_info.data[i].p_buf; + input.num_bytes = p_ctrl->tx_info.data[i].len; + input.crc_seed = crc; + p_ctrl->p_cfg->p_crc->p_api->calculate(p_ctrl->p_cfg->p_crc->p_ctrl, &input, &crc); + } + + p_ctrl->tx_info.crc = (uint8_t) crc; + p_ctrl->tx_info.data[p_ctrl->tx_info.channels].p_buf = &p_ctrl->tx_info.crc; + p_ctrl->tx_info.data[p_ctrl->tx_info.channels].len = 1; + p_ctrl->tx_info.channels++; + } + + p_ctrl->p_cfg->p_comms->p_api->write(p_ctrl->p_cfg->p_comms->p_ctrl, + (uint8_t *) &p_ctrl->tx_info.header, + header_buffer_len); + + return FSP_SUCCESS; +} + +/*******************************************************************************************************************//** + * Closes Data Shipper module instance. + * + * Implements @ref rai_data_shipper_api_t::close(). + * + * @retval FSP_SUCCESS Data Shipper module closed. + * @retval FSP_ERR_ASSERTION An input parameter was invalid. + * @retval FSP_ERR_NOT_OPEN Module not open. + * + * @return See @ref RENESAS_ERROR_CODES or functions called by this function for other possible return codes. + **********************************************************************************************************************/ +fsp_err_t RM_RAI_DATA_SHIPPER_Close (rai_data_shipper_ctrl_t * const p_api_ctrl) +{ + fsp_err_t err = FSP_SUCCESS; + rai_data_shipper_instance_ctrl_t * p_ctrl = (rai_data_shipper_instance_ctrl_t *) p_api_ctrl; + +#if RM_RAI_DATA_SHIPPER_CFG_PARAM_CHECKING_ENABLE + FSP_ASSERT(NULL != p_ctrl); + FSP_ERROR_RETURN(RAI_DATA_SHIPPER_PRV_OPEN == p_ctrl->opened, FSP_ERR_NOT_OPEN); +#endif + + if (p_ctrl->p_cfg->p_crc) + { + p_ctrl->p_cfg->p_crc->p_api->close(p_ctrl->p_cfg->p_crc->p_ctrl); + } + + p_ctrl->p_cfg->p_comms->p_api->close(p_ctrl->p_cfg->p_comms->p_ctrl); + + p_ctrl->opened = 0; + + return err; +} + +static void rai_data_shipper_notify_application (rai_data_shipper_instance_ctrl_t * p_ctrl, rm_comms_event_t event) +{ + // Callback to application to release buffer etc. + rai_data_shipper_callback_args_t args = + { + .result = event, + .p_context = p_ctrl->p_cfg->p_context, + }; + + p_ctrl->p_cfg->p_callback(&args); +} + +static void rai_data_shipper_write_callback (rm_comms_callback_args_t * p_args) +{ + rai_data_shipper_instance_ctrl_t * p_ctrl = (rai_data_shipper_instance_ctrl_t *) p_args->p_context; + + if (p_args->event == RM_COMMS_EVENT_ERROR) + { + rai_data_shipper_notify_application(p_ctrl, p_args->event); + + return; + } + + if (p_ctrl->tx_info.current == p_ctrl->tx_info.channels) + { + rai_data_shipper_notify_application(p_ctrl, p_args->event); + + return; + } + + fsp_err_t err = + p_ctrl->p_cfg->p_comms->p_api->write(p_ctrl->p_cfg->p_comms->p_ctrl, + p_ctrl->tx_info.data[p_ctrl->tx_info.current].p_buf, + p_ctrl->tx_info.data[p_ctrl->tx_info.current].len); + if (FSP_SUCCESS != err) + { + rai_data_shipper_notify_application(p_ctrl, RM_COMMS_EVENT_ERROR); + + return; + } + + p_ctrl->tx_info.current++; +} diff --git a/ra/fsp/src/rm_tinycrypt_port/rm_tinycrypt_port_aes_decrypt.c b/ra/fsp/src/rm_tinycrypt_port/rm_tinycrypt_port_aes_decrypt.c index 02cd396ab..20c408677 100644 --- a/ra/fsp/src/rm_tinycrypt_port/rm_tinycrypt_port_aes_decrypt.c +++ b/ra/fsp/src/rm_tinycrypt_port/rm_tinycrypt_port_aes_decrypt.c @@ -34,6 +34,16 @@ int tc_aes128_set_decrypt_key (TCAesKeySched_t s, const uint8_t * k) return tc_aes128_set_encrypt_key(s, k); } +int tc_aes192_set_decrypt_key (TCAesKeySched_t s, const uint8_t * k) +{ + return tc_aes192_set_encrypt_key(s, k); +} + +int tc_aes256_set_decrypt_key (TCAesKeySched_t s, const uint8_t * k) +{ + return tc_aes256_set_encrypt_key(s, k); +} + int tc_aes_decrypt (uint8_t * out, const uint8_t * in, const TCAesKeySched_t s) { fsp_err_t err = FSP_ERR_CRYPTO_UNKNOWN; @@ -43,7 +53,7 @@ int tc_aes_decrypt (uint8_t * out, const uint8_t * in, const TCAesKeySched_t s) uint32_t local_out[TC_AES_BLOCK_SIZE / 4U]; uint32_t local_in[TC_AES_BLOCK_SIZE / 4U]; uint32_t dummy_iv[4] = {0}; - uint32_t indata_cmd = change_endian_long((uint32_t)SCE_AES_IN_DATA_CMD_ECB_DECRYPTION); + uint32_t indata_cmd = change_endian_long((uint32_t) SCE_AES_IN_DATA_CMD_ECB_DECRYPTION); uint32_t indata_key_type = 0; #if RM_TINYCRYPT_PORT_CFG_PARAM_CHECKING_ENABLE @@ -77,13 +87,38 @@ int tc_aes_decrypt (uint8_t * out, const uint8_t * in, const TCAesKeySched_t s) p_out = (uint32_t *) out; } - err = HW_SCE_Aes128EncryptDecryptInitSub(&indata_key_type, &indata_cmd, (uint32_t *) &s->words[0], dummy_iv); - if (err == FSP_SUCCESS) + if (SIZE_AES_192BIT_KEYLEN_BITS == (*s).key_size) { - HW_SCE_Aes128EncryptDecryptUpdateSub(p_in, p_out, TC_AES_BLOCK_SIZE / 4U); + err = HW_SCE_Aes192EncryptDecryptInitSub(&indata_cmd, (uint32_t *) &s->words[0], dummy_iv); + if (err == FSP_SUCCESS) + { + HW_SCE_Aes192EncryptDecryptUpdateSub(p_in, p_out, TC_AES_BLOCK_SIZE / 4U); + } + + err = HW_SCE_Aes192EncryptDecryptFinalSub(); } + else if (SIZE_AES_256BIT_KEYLEN_BITS == (*s).key_size) + { + err = + HW_SCE_Aes256EncryptDecryptInitSub(&indata_key_type, &indata_cmd, (uint32_t *) &s->words[0], dummy_iv); + if (err == FSP_SUCCESS) + { + HW_SCE_Aes256EncryptDecryptUpdateSub(p_in, p_out, TC_AES_BLOCK_SIZE / 4U); + } - err = HW_SCE_Aes128EncryptDecryptFinalSub(); + err = HW_SCE_Aes256EncryptDecryptFinalSub(); + } + else + { + err = + HW_SCE_Aes128EncryptDecryptInitSub(&indata_key_type, &indata_cmd, (uint32_t *) &s->words[0], dummy_iv); + if (err == FSP_SUCCESS) + { + HW_SCE_Aes128EncryptDecryptUpdateSub(p_in, p_out, TC_AES_BLOCK_SIZE / 4U); + } + + err = HW_SCE_Aes128EncryptDecryptFinalSub(); + } if (FSP_SUCCESS == err) { diff --git a/ra/fsp/src/rm_tinycrypt_port/rm_tinycrypt_port_aes_encrypt.c b/ra/fsp/src/rm_tinycrypt_port/rm_tinycrypt_port_aes_encrypt.c index 96ad99136..15a470288 100644 --- a/ra/fsp/src/rm_tinycrypt_port/rm_tinycrypt_port_aes_encrypt.c +++ b/ra/fsp/src/rm_tinycrypt_port/rm_tinycrypt_port_aes_encrypt.c @@ -39,7 +39,42 @@ int tc_aes128_set_encrypt_key (TCAesKeySched_t s, const uint8_t * k) } else { - memcpy(&(s->words[0]), k, TC_AES_KEY_SIZE); + memcpy(&(s->words[0]), k, SIZE_AES_128BIT_KEYLEN_BYTES); + s->key_size = SIZE_AES_128BIT_KEYLEN_BITS; + } + + return ret; +} + +int tc_aes192_set_encrypt_key (TCAesKeySched_t s, const uint8_t * k) +{ + int ret = TC_CRYPTO_SUCCESS; + + if ((s == (TCAesKeySched_t) 0) || (k == NULL)) + { + ret = TC_CRYPTO_FAIL; + } + else + { + memcpy(&(s->words[0]), k, SIZE_AES_192BIT_KEYLEN_BYTES); + s->key_size = SIZE_AES_192BIT_KEYLEN_BITS; + } + + return ret; +} + +int tc_aes256_set_encrypt_key (TCAesKeySched_t s, const uint8_t * k) +{ + int ret = TC_CRYPTO_SUCCESS; + + if ((s == (TCAesKeySched_t) 0) || (k == NULL)) + { + ret = TC_CRYPTO_FAIL; + } + else + { + memcpy(&(s->words[0]), k, SIZE_AES_256BIT_KEYLEN_BYTES); + s->key_size = SIZE_AES_256BIT_KEYLEN_BITS; } return ret; @@ -54,7 +89,7 @@ int tc_aes_encrypt (uint8_t * out, const uint8_t * in, const TCAesKeySched_t s) uint32_t local_out[TC_AES_BLOCK_SIZE / 4U] = {0U}; uint32_t local_in[TC_AES_BLOCK_SIZE / 4U] = {0U}; uint32_t dummy_iv[4] = {0}; - uint32_t indata_cmd = change_endian_long((uint32_t)SCE_AES_IN_DATA_CMD_ECB_ENCRYPTION); + uint32_t indata_cmd = change_endian_long((uint32_t) SCE_AES_IN_DATA_CMD_ECB_ENCRYPTION); uint32_t indata_key_type = 0; #if RM_TINYCRYPT_PORT_CFG_PARAM_CHECKING_ENABLE @@ -88,13 +123,38 @@ int tc_aes_encrypt (uint8_t * out, const uint8_t * in, const TCAesKeySched_t s) p_out = (uint32_t *) out; } - err = HW_SCE_Aes128EncryptDecryptInitSub(&indata_key_type, &indata_cmd, (uint32_t *) &s->words[0], dummy_iv); - if (err == FSP_SUCCESS) + if (SIZE_AES_192BIT_KEYLEN_BITS == (*s).key_size) + { + err = HW_SCE_Aes192EncryptDecryptInitSub(&indata_cmd, (uint32_t *) &s->words[0], dummy_iv); + if (err == FSP_SUCCESS) + { + HW_SCE_Aes192EncryptDecryptUpdateSub(p_in, p_out, TC_AES_BLOCK_SIZE / 4U); + } + + err = HW_SCE_Aes192EncryptDecryptFinalSub(); + } + else if (SIZE_AES_256BIT_KEYLEN_BITS == (*s).key_size) { - HW_SCE_Aes128EncryptDecryptUpdateSub(p_in, p_out, TC_AES_BLOCK_SIZE / 4U); + err = + HW_SCE_Aes256EncryptDecryptInitSub(&indata_key_type, &indata_cmd, (uint32_t *) &s->words[0], dummy_iv); + if (err == FSP_SUCCESS) + { + HW_SCE_Aes256EncryptDecryptUpdateSub(p_in, p_out, TC_AES_BLOCK_SIZE / 4U); + } + + err = HW_SCE_Aes256EncryptDecryptFinalSub(); } + else + { + err = + HW_SCE_Aes128EncryptDecryptInitSub(&indata_key_type, &indata_cmd, (uint32_t *) &s->words[0], dummy_iv); + if (err == FSP_SUCCESS) + { + HW_SCE_Aes128EncryptDecryptUpdateSub(p_in, p_out, TC_AES_BLOCK_SIZE / 4U); + } - err = HW_SCE_Aes128EncryptDecryptFinalSub(); + err = HW_SCE_Aes128EncryptDecryptFinalSub(); + } if (FSP_SUCCESS == err) { diff --git a/ra/fsp/src/rm_tinycrypt_port/rm_tinycrypt_port_cbc_mode.c b/ra/fsp/src/rm_tinycrypt_port/rm_tinycrypt_port_cbc_mode.c index ece8b75cd..1679dff7f 100644 --- a/ra/fsp/src/rm_tinycrypt_port/rm_tinycrypt_port_cbc_mode.c +++ b/ra/fsp/src/rm_tinycrypt_port/rm_tinycrypt_port_cbc_mode.c @@ -46,7 +46,7 @@ int tc_cbc_mode_encrypt (uint8_t * out, uint32_t num_loops = 1U; fsp_err_t err = FSP_SUCCESS; - uint32_t indata_cmd = change_endian_long((uint32_t)SCE_AES_IN_DATA_CMD_CBC_ENCRYPTION); + uint32_t indata_cmd = change_endian_long((uint32_t) SCE_AES_IN_DATA_CMD_CBC_ENCRYPTION); uint32_t indata_key_type = 0; #if RM_TINYCRYPT_PORT_CFG_PARAM_CHECKING_ENABLE @@ -82,10 +82,24 @@ int tc_cbc_mode_encrypt (uint8_t * out, num_loops = inlen / TC_AES_BLOCK_SIZE; memcpy((uint8_t *) local_iv, (uint8_t *) iv, TC_AES_BLOCK_SIZE); - err = HW_SCE_Aes128EncryptDecryptInitSub(&indata_key_type, - &indata_cmd, - (uint32_t *) &sched->words[0], - &local_iv[0]); + if (SIZE_AES_192BIT_KEYLEN_BITS == (*sched).key_size) + { + err = HW_SCE_Aes192EncryptDecryptInitSub(&indata_cmd, (uint32_t *) &sched->words[0], &local_iv[0]); + } + else if (SIZE_AES_256BIT_KEYLEN_BITS == (*sched).key_size) + { + err = HW_SCE_Aes256EncryptDecryptInitSub(&indata_key_type, + &indata_cmd, + (uint32_t *) &sched->words[0], + &local_iv[0]); + } + else + { + err = HW_SCE_Aes128EncryptDecryptInitSub(&indata_key_type, + &indata_cmd, + (uint32_t *) &sched->words[0], + &local_iv[0]); + } /* Offset the output buffer by iv size since the iv was previously * prepended to the output buffer as expected by the TinyCrypt API. */ @@ -97,7 +111,18 @@ int tc_cbc_mode_encrypt (uint8_t * out, if (err == FSP_SUCCESS) { - HW_SCE_Aes128EncryptDecryptUpdateSub(&local_in[0], &local_out[0], (TC_AES_BLOCK_SIZE / 4U)); + if (SIZE_AES_192BIT_KEYLEN_BITS == (*sched).key_size) + { + HW_SCE_Aes192EncryptDecryptUpdateSub(&local_in[0], &local_out[0], (TC_AES_BLOCK_SIZE / 4U)); + } + else if (SIZE_AES_256BIT_KEYLEN_BITS == (*sched).key_size) + { + HW_SCE_Aes256EncryptDecryptUpdateSub(&local_in[0], &local_out[0], (TC_AES_BLOCK_SIZE / 4U)); + } + else + { + HW_SCE_Aes128EncryptDecryptUpdateSub(&local_in[0], &local_out[0], (TC_AES_BLOCK_SIZE / 4U)); + } } if (FSP_SUCCESS != err) @@ -119,7 +144,18 @@ int tc_cbc_mode_encrypt (uint8_t * out, } } - err = HW_SCE_Aes128EncryptDecryptFinalSub(); + if (SIZE_AES_192BIT_KEYLEN_BITS == (*sched).key_size) + { + err = HW_SCE_Aes192EncryptDecryptFinalSub(); + } + else if (SIZE_AES_256BIT_KEYLEN_BITS == (*sched).key_size) + { + err = HW_SCE_Aes256EncryptDecryptFinalSub(); + } + else + { + err = HW_SCE_Aes128EncryptDecryptFinalSub(); + } if (FSP_SUCCESS != err) { @@ -130,17 +166,45 @@ int tc_cbc_mode_encrypt (uint8_t * out, { memcpy((uint8_t *) local_iv, (uint8_t *) iv, TC_AES_BLOCK_SIZE); - err = HW_SCE_Aes128EncryptDecryptInitSub(&indata_key_type, - &indata_cmd, - (uint32_t *) &sched->words[0], - &local_iv[0]); - if (err == FSP_SUCCESS) + if (SIZE_AES_192BIT_KEYLEN_BITS == (*sched).key_size) { - HW_SCE_Aes128EncryptDecryptUpdateSub((uint32_t *) &in[0], (uint32_t *) &out[TC_AES_BLOCK_SIZE], - (inlen / 4U)); + err = HW_SCE_Aes192EncryptDecryptInitSub(&indata_cmd, (uint32_t *) &sched->words[0], &local_iv[0]); + if (err == FSP_SUCCESS) + { + HW_SCE_Aes192EncryptDecryptUpdateSub((uint32_t *) &in[0], (uint32_t *) &out[TC_AES_BLOCK_SIZE], + (inlen / 4U)); + } + + err = HW_SCE_Aes192EncryptDecryptFinalSub(); } + else if (SIZE_AES_256BIT_KEYLEN_BITS == (*sched).key_size) + { + err = HW_SCE_Aes256EncryptDecryptInitSub(&indata_key_type, + &indata_cmd, + (uint32_t *) &sched->words[0], + &local_iv[0]); + if (err == FSP_SUCCESS) + { + HW_SCE_Aes256EncryptDecryptUpdateSub((uint32_t *) &in[0], (uint32_t *) &out[TC_AES_BLOCK_SIZE], + (inlen / 4U)); + } - err = HW_SCE_Aes128EncryptDecryptFinalSub(); + err = HW_SCE_Aes256EncryptDecryptFinalSub(); + } + else + { + err = HW_SCE_Aes128EncryptDecryptInitSub(&indata_key_type, + &indata_cmd, + (uint32_t *) &sched->words[0], + &local_iv[0]); + if (err == FSP_SUCCESS) + { + HW_SCE_Aes128EncryptDecryptUpdateSub((uint32_t *) &in[0], (uint32_t *) &out[TC_AES_BLOCK_SIZE], + (inlen / 4U)); + } + + err = HW_SCE_Aes128EncryptDecryptFinalSub(); + } if (FSP_SUCCESS != err) { @@ -167,7 +231,7 @@ int tc_cbc_mode_decrypt (uint8_t * out, uint32_t num_loops = 1U; fsp_err_t err = FSP_SUCCESS; - uint32_t indata_cmd = change_endian_long((uint32_t)SCE_AES_IN_DATA_CMD_CBC_DECRYPTION); + uint32_t indata_cmd = change_endian_long((uint32_t) SCE_AES_IN_DATA_CMD_CBC_DECRYPTION); uint32_t indata_key_type = 0; #if RM_TINYCRYPT_PORT_CFG_PARAM_CHECKING_ENABLE @@ -200,10 +264,24 @@ int tc_cbc_mode_decrypt (uint8_t * out, num_loops = ((inlen - TC_AES_BLOCK_SIZE) / TC_AES_BLOCK_SIZE); memcpy((uint8_t *) local_iv, (uint8_t *) iv, TC_AES_BLOCK_SIZE); - err = HW_SCE_Aes128EncryptDecryptInitSub(&indata_key_type, - &indata_cmd, - (uint32_t *) &sched->words[0], - &local_iv[0]); + if (SIZE_AES_192BIT_KEYLEN_BITS == (*sched).key_size) + { + err = HW_SCE_Aes192EncryptDecryptInitSub(&indata_cmd, (uint32_t *) &sched->words[0], &local_iv[0]); + } + else if (SIZE_AES_256BIT_KEYLEN_BITS == (*sched).key_size) + { + err = HW_SCE_Aes256EncryptDecryptInitSub(&indata_key_type, + &indata_cmd, + (uint32_t *) &sched->words[0], + &local_iv[0]); + } + else + { + err = HW_SCE_Aes128EncryptDecryptInitSub(&indata_key_type, + &indata_cmd, + (uint32_t *) &sched->words[0], + &local_iv[0]); + } for (uint32_t i = 0; i < num_loops; i++) { @@ -211,7 +289,18 @@ int tc_cbc_mode_decrypt (uint8_t * out, if (err == FSP_SUCCESS) { - HW_SCE_Aes128EncryptDecryptUpdateSub(&local_in[0], &local_out[0], (TC_AES_BLOCK_SIZE / 4U)); + if (SIZE_AES_192BIT_KEYLEN_BITS == (*sched).key_size) + { + HW_SCE_Aes192EncryptDecryptUpdateSub(&local_in[0], &local_out[0], (TC_AES_BLOCK_SIZE / 4U)); + } + else if (SIZE_AES_256BIT_KEYLEN_BITS == (*sched).key_size) + { + HW_SCE_Aes256EncryptDecryptUpdateSub(&local_in[0], &local_out[0], (TC_AES_BLOCK_SIZE / 4U)); + } + else + { + HW_SCE_Aes128EncryptDecryptUpdateSub(&local_in[0], &local_out[0], (TC_AES_BLOCK_SIZE / 4U)); + } } if (FSP_SUCCESS != err) @@ -231,7 +320,18 @@ int tc_cbc_mode_decrypt (uint8_t * out, } } - err = HW_SCE_Aes128EncryptDecryptFinalSub(); + if (SIZE_AES_192BIT_KEYLEN_BITS == (*sched).key_size) + { + err = HW_SCE_Aes192EncryptDecryptFinalSub(); + } + else if (SIZE_AES_256BIT_KEYLEN_BITS == (*sched).key_size) + { + err = HW_SCE_Aes256EncryptDecryptFinalSub(); + } + else + { + err = HW_SCE_Aes128EncryptDecryptFinalSub(); + } if (FSP_SUCCESS != err) { @@ -240,17 +340,41 @@ int tc_cbc_mode_decrypt (uint8_t * out, } else { - err = - HW_SCE_Aes128EncryptDecryptInitSub(&indata_key_type, - &indata_cmd, - (uint32_t *) &sched->words[0], - (uint32_t *) &iv[0]); - if (err == FSP_SUCCESS) + if (SIZE_AES_192BIT_KEYLEN_BITS == (*sched).key_size) { - HW_SCE_Aes128EncryptDecryptUpdateSub((uint32_t *) &in[0], (uint32_t *) &out[0], (inlen / 4U)); + err = + HW_SCE_Aes192EncryptDecryptInitSub(&indata_cmd, (uint32_t *) &sched->words[0], (uint32_t *) &iv[0]); + if (err == FSP_SUCCESS) + { + HW_SCE_Aes192EncryptDecryptUpdateSub((uint32_t *) &in[0], (uint32_t *) &out[0], (inlen / 4U)); + } + + err = HW_SCE_Aes192EncryptDecryptFinalSub(); } + else if (SIZE_AES_256BIT_KEYLEN_BITS == (*sched).key_size) + { + err = + HW_SCE_Aes256EncryptDecryptInitSub(&indata_key_type, &indata_cmd, (uint32_t *) &sched->words[0], + (uint32_t *) &iv[0]); + if (err == FSP_SUCCESS) + { + HW_SCE_Aes256EncryptDecryptUpdateSub((uint32_t *) &in[0], (uint32_t *) &out[0], (inlen / 4U)); + } - err = HW_SCE_Aes128EncryptDecryptFinalSub(); + err = HW_SCE_Aes256EncryptDecryptFinalSub(); + } + else + { + err = + HW_SCE_Aes128EncryptDecryptInitSub(&indata_key_type, &indata_cmd, (uint32_t *) &sched->words[0], + (uint32_t *) &iv[0]); + if (err == FSP_SUCCESS) + { + HW_SCE_Aes128EncryptDecryptUpdateSub((uint32_t *) &in[0], (uint32_t *) &out[0], (inlen / 4U)); + } + + err = HW_SCE_Aes128EncryptDecryptFinalSub(); + } if (FSP_SUCCESS != err) { diff --git a/ra/fsp/src/rm_tinycrypt_port/rm_tinycrypt_port_ctr_mode.c b/ra/fsp/src/rm_tinycrypt_port/rm_tinycrypt_port_ctr_mode.c index e25df152a..6ad827bc4 100644 --- a/ra/fsp/src/rm_tinycrypt_port/rm_tinycrypt_port_ctr_mode.c +++ b/ra/fsp/src/rm_tinycrypt_port/rm_tinycrypt_port_ctr_mode.c @@ -44,7 +44,7 @@ int tc_ctr_mode (uint8_t * out, bool src_unaligned = !TC_32BIT_ALIGNED((uint32_t) &in[0]); bool dst_unaligned = !TC_32BIT_ALIGNED((uint32_t) &out[0]); - uint32_t indata_cmd = change_endian_long((uint32_t)SCE_AES_IN_DATA_CMD_CTR_ENCRYPTION_DECRYPTION); + uint32_t indata_cmd = change_endian_long((uint32_t) SCE_AES_IN_DATA_CMD_CTR_ENCRYPTION_DECRYPTION); uint32_t indata_key_type = 0; #if RM_TINYCRYPT_PORT_CFG_PARAM_CHECKING_ENABLE @@ -87,11 +87,23 @@ int tc_ctr_mode (uint8_t * out, p_out = &local_out[0]; } - err = - HW_SCE_Aes128EncryptDecryptInitSub(&indata_key_type, - &indata_cmd, - (uint32_t *) &sched->words[0], - (uint32_t *) &ctr[0]); + if (SIZE_AES_192BIT_KEYLEN_BITS == (*sched).key_size) + { + err = + HW_SCE_Aes192EncryptDecryptInitSub(&indata_cmd, (uint32_t *) &sched->words[0], (uint32_t *) &ctr[0]); + } + else if (SIZE_AES_256BIT_KEYLEN_BITS == (*sched).key_size) + { + err = + HW_SCE_Aes256EncryptDecryptInitSub(&indata_key_type, &indata_cmd, (uint32_t *) &sched->words[0], + (uint32_t *) &ctr[0]); + } + else + { + err = + HW_SCE_Aes128EncryptDecryptInitSub(&indata_key_type, &indata_cmd, (uint32_t *) &sched->words[0], + (uint32_t *) &ctr[0]); + } for (uint32_t i = 0; i < num_loops; i++) { @@ -102,8 +114,21 @@ int tc_ctr_mode (uint8_t * out, if (err == FSP_SUCCESS) { - HW_SCE_Aes128EncryptDecryptUpdateSub((uint32_t const *) &p_in[0], (uint32_t *) &p_out[0], - (TC_AES_BLOCK_SIZE / 4U)); + if (SIZE_AES_192BIT_KEYLEN_BITS == (*sched).key_size) + { + HW_SCE_Aes192EncryptDecryptUpdateSub((uint32_t const *) &p_in[0], (uint32_t *) &p_out[0], + (TC_AES_BLOCK_SIZE / 4U)); + } + else if (SIZE_AES_256BIT_KEYLEN_BITS == (*sched).key_size) + { + HW_SCE_Aes256EncryptDecryptUpdateSub((uint32_t const *) &p_in[0], (uint32_t *) &p_out[0], + (TC_AES_BLOCK_SIZE / 4U)); + } + else + { + HW_SCE_Aes128EncryptDecryptUpdateSub((uint32_t const *) &p_in[0], (uint32_t *) &p_out[0], + (TC_AES_BLOCK_SIZE / 4U)); + } } if (FSP_SUCCESS != err) @@ -138,7 +163,18 @@ int tc_ctr_mode (uint8_t * out, } } - err = HW_SCE_Aes128EncryptDecryptFinalSub(); + if (SIZE_AES_192BIT_KEYLEN_BITS == (*sched).key_size) + { + err = HW_SCE_Aes192EncryptDecryptFinalSub(); + } + else if (SIZE_AES_256BIT_KEYLEN_BITS == (*sched).key_size) + { + err = HW_SCE_Aes256EncryptDecryptFinalSub(); + } + else + { + err = HW_SCE_Aes128EncryptDecryptFinalSub(); + } if (FSP_SUCCESS != err) { @@ -150,17 +186,44 @@ int tc_ctr_mode (uint8_t * out, uint32_t local_inlen; local_inlen = (uint32_t) ((inlen / TC_AES_BLOCK_SIZE) * TC_AES_BLOCK_SIZE); - err = - HW_SCE_Aes128EncryptDecryptInitSub(&indata_key_type, - &indata_cmd, - (uint32_t *) &sched->words[0], - (uint32_t *) &ctr[0]); - if (err == FSP_SUCCESS) + if (SIZE_AES_192BIT_KEYLEN_BITS == (*sched).key_size) { - HW_SCE_Aes128EncryptDecryptUpdateSub((uint32_t const *) &in[0], (uint32_t *) &out[0], (local_inlen / 4U)); + err = + HW_SCE_Aes192EncryptDecryptInitSub(&indata_cmd, (uint32_t *) &sched->words[0], (uint32_t *) &ctr[0]); + if (err == FSP_SUCCESS) + { + HW_SCE_Aes192EncryptDecryptUpdateSub((uint32_t const *) &in[0], (uint32_t *) &out[0], + (local_inlen / 4U)); + } + + err = HW_SCE_Aes192EncryptDecryptFinalSub(); } + else if (SIZE_AES_256BIT_KEYLEN_BITS == (*sched).key_size) + { + err = + HW_SCE_Aes256EncryptDecryptInitSub(&indata_key_type, &indata_cmd, (uint32_t *) &sched->words[0], + (uint32_t *) &ctr[0]); + if (err == FSP_SUCCESS) + { + HW_SCE_Aes256EncryptDecryptUpdateSub((uint32_t const *) &in[0], (uint32_t *) &out[0], + (local_inlen / 4U)); + } + + err = HW_SCE_Aes256EncryptDecryptFinalSub(); + } + else + { + err = + HW_SCE_Aes128EncryptDecryptInitSub(&indata_key_type, &indata_cmd, (uint32_t *) &sched->words[0], + (uint32_t *) &ctr[0]); + if (err == FSP_SUCCESS) + { + HW_SCE_Aes128EncryptDecryptUpdateSub((uint32_t const *) &in[0], (uint32_t *) &out[0], + (local_inlen / 4U)); + } - err = HW_SCE_Aes128EncryptDecryptFinalSub(); + err = HW_SCE_Aes128EncryptDecryptFinalSub(); + } if (FSP_SUCCESS != err) { @@ -181,18 +244,44 @@ int tc_ctr_mode (uint8_t * out, _copy(&local_in[0], sizeof(local_in), &in[((inlen / TC_AES_BLOCK_SIZE) * TC_AES_BLOCK_SIZE)], (inlen % TC_AES_BLOCK_SIZE)); - err = - HW_SCE_Aes128EncryptDecryptInitSub(&indata_key_type, - &indata_cmd, - (uint32_t *) &sched->words[0], - (uint32_t *) &ctr[0]); - if (err == FSP_SUCCESS) + if (SIZE_AES_192BIT_KEYLEN_BITS == (*sched).key_size) + { + err = + HW_SCE_Aes192EncryptDecryptInitSub(&indata_cmd, (uint32_t *) &sched->words[0], (uint32_t *) &ctr[0]); + if (err == FSP_SUCCESS) + { + HW_SCE_Aes192EncryptDecryptUpdateSub((uint32_t const *) &local_in[0], (uint32_t *) &local_out[0], + (TC_AES_BLOCK_SIZE / 4U)); + } + + err = HW_SCE_Aes192EncryptDecryptFinalSub(); + } + else if (SIZE_AES_256BIT_KEYLEN_BITS == (*sched).key_size) { - HW_SCE_Aes128EncryptDecryptUpdateSub((uint32_t const *) &local_in[0], (uint32_t *) &local_out[0], - (TC_AES_BLOCK_SIZE / 4U)); + err = + HW_SCE_Aes256EncryptDecryptInitSub(&indata_key_type, &indata_cmd, (uint32_t *) &sched->words[0], + (uint32_t *) &ctr[0]); + if (err == FSP_SUCCESS) + { + HW_SCE_Aes256EncryptDecryptUpdateSub((uint32_t const *) &local_in[0], (uint32_t *) &local_out[0], + (TC_AES_BLOCK_SIZE / 4U)); + } + + err = HW_SCE_Aes256EncryptDecryptFinalSub(); } + else + { + err = + HW_SCE_Aes128EncryptDecryptInitSub(&indata_key_type, &indata_cmd, (uint32_t *) &sched->words[0], + (uint32_t *) &ctr[0]); + if (err == FSP_SUCCESS) + { + HW_SCE_Aes128EncryptDecryptUpdateSub((uint32_t const *) &local_in[0], (uint32_t *) &local_out[0], + (TC_AES_BLOCK_SIZE / 4U)); + } - err = HW_SCE_Aes128EncryptDecryptFinalSub(); + err = HW_SCE_Aes128EncryptDecryptFinalSub(); + } if (FSP_SUCCESS != err) { diff --git a/ra/fsp/src/rm_tinycrypt_port/rm_tinycrypt_port_gcm_mode.c b/ra/fsp/src/rm_tinycrypt_port/rm_tinycrypt_port_gcm_mode.c new file mode 100644 index 000000000..882687b5d --- /dev/null +++ b/ra/fsp/src/rm_tinycrypt_port/rm_tinycrypt_port_gcm_mode.c @@ -0,0 +1,504 @@ +/*********************************************************************************************************************** + * Copyright [2020-2023] Renesas Electronics Corporation and/or its affiliates. All Rights Reserved. + * + * This software and documentation are supplied by Renesas Electronics America Inc. and may only be used with products + * of Renesas Electronics Corp. and its affiliates ("Renesas"). No other uses are authorized. Renesas products are + * sold pursuant to Renesas terms and conditions of sale. Purchasers are solely responsible for the selection and use + * of Renesas products and Renesas assumes no liability. No license, express or implied, to any intellectual property + * right is granted by Renesas. This software is protected under all applicable laws, including copyright laws. Renesas + * reserves the right to change or discontinue this software and/or this documentation. THE SOFTWARE AND DOCUMENTATION + * IS DELIVERED TO YOU "AS IS," AND RENESAS MAKES NO REPRESENTATIONS OR WARRANTIES, AND TO THE FULLEST EXTENT + * PERMISSIBLE UNDER APPLICABLE LAW, DISCLAIMS ALL WARRANTIES, WHETHER EXPLICITLY OR IMPLICITLY, INCLUDING WARRANTIES + * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, AND NONINFRINGEMENT, WITH RESPECT TO THE SOFTWARE OR + * DOCUMENTATION. RENESAS SHALL HAVE NO LIABILITY ARISING OUT OF ANY SECURITY VULNERABILITY OR BREACH. TO THE MAXIMUM + * EXTENT PERMITTED BY LAW, IN NO EVENT WILL RENESAS BE LIABLE TO YOU IN CONNECTION WITH THE SOFTWARE OR DOCUMENTATION + * (OR ANY PERSON OR ENTITY CLAIMING RIGHTS DERIVED FROM YOU) FOR ANY LOSS, DAMAGES, OR CLAIMS WHATSOEVER, INCLUDING, + * WITHOUT LIMITATION, ANY DIRECT, CONSEQUENTIAL, SPECIAL, INDIRECT, PUNITIVE, OR INCIDENTAL DAMAGES; ANY LOST PROFITS, + * OTHER ECONOMIC DAMAGE, PROPERTY DAMAGE, OR PERSONAL INJURY; AND EVEN IF RENESAS HAS BEEN ADVISED OF THE POSSIBILITY + * OF SUCH LOSS, DAMAGES, CLAIMS OR COSTS. + **********************************************************************************************************************/ + +/*********************************************************************************************************************** + * Includes + **********************************************************************************************************************/ + +#include <tinycrypt/constants.h> +#include <tinycrypt/utils.h> +#include "hw_sce_aes_private.h" +#include "hw_sce_private.h" +#include "hw_sce_ra_private.h" +#include "rm_tinycrypt_port_cfg.h" +#include "rm_tinycrypt_port.h" +#include <tinycrypt/gcm_mode.h> + +#if (2 == BSP_FEATURE_CRYPTO_AES_IP_VERSION) + #if (RM_TINYCRYPT_PORT_GCM_HW_ACCELERATION_ENABLED == 1) + + #define TC_GCM_T_LEN_128_IN_BYTE 16 + #define TC_GCM_T_LEN_120_IN_BYTE 15 + #define TC_GCM_T_LEN_112_IN_BYTE 14 + #define TC_GCM_T_LEN_104_IN_BYTE 13 + #define TC_GCM_T_LEN_96_IN_BYTE 12 + #define TC_GCM_T_LEN_64_IN_BYTE 8 + #define TC_GCM_T_LEN_32_IN_BYTE 4 + +int tc_gcm_config (TCGcmMode_t context, TCAesKeySched_t sched, uint8_t tlen) +{ + int tc_return = TC_CRYPTO_SUCCESS; + + /* input sanity check: */ + if ((context == (TCGcmMode_t) 0) || (sched == (TCAesKeySched_t) 0)) + { + tc_return = TC_CRYPTO_FAIL; + } + else if ((tlen != TC_GCM_T_LEN_128_IN_BYTE) && (tlen != TC_GCM_T_LEN_120_IN_BYTE) && + (tlen != TC_GCM_T_LEN_112_IN_BYTE) && (tlen != TC_GCM_T_LEN_104_IN_BYTE) && + (tlen != TC_GCM_T_LEN_96_IN_BYTE) && + (tlen != TC_GCM_T_LEN_64_IN_BYTE) && (tlen != TC_GCM_T_LEN_32_IN_BYTE)) + { + tc_return = TC_CRYPTO_FAIL; /* The allowed mac sizes are: 128, 120, 112, 104, 96, 64, 32*/ + } + else + { + context->tlen = tlen; + context->sched = sched; + } + + return tc_return; +} + +int tc_gcm_encryption_init (const TCAesKeySched_t sched, uint8_t * iv, uint8_t * aad, uint32_t additional_len) +{ + fsp_err_t err = FSP_SUCCESS; + int tc_return = TC_CRYPTO_SUCCESS; + #if RM_TINYCRYPT_PORT_CFG_PARAM_CHECKING_ENABLE + + /* input sanity check: */ + if ((sched == (TCAesKeySched_t) 0) || + (iv == (uint8_t *) 0) || + (aad == (uint8_t *) 0) || + (additional_len == 0)) + { + tc_return = TC_CRYPTO_FAIL; + } + #endif + + if (TC_CRYPTO_FAIL == tc_return) + { + } + else + { + if (SIZE_AES_192BIT_KEYLEN_BITS == (*sched).key_size) + { + err = HW_SCE_Aes192GcmEncryptInitSub((uint32_t *) &sched, (uint32_t *) &sched->words[0], (uint32_t *) iv); + if (FSP_SUCCESS == err) + { + HW_SCE_Aes192GcmEncryptUpdateAADSub((uint32_t *) aad, additional_len); + HW_SCE_Aes192GcmEncryptUpdateTransitionSub(); + } + } + else if (SIZE_AES_256BIT_KEYLEN_BITS == (*sched).key_size) + { + err = HW_SCE_Aes256GcmEncryptInitSub((uint32_t *) &sched, (uint32_t *) &sched->words[0], (uint32_t *) iv); + if (FSP_SUCCESS == err) + { + HW_SCE_Aes256GcmEncryptUpdateAADSub((uint32_t *) aad, additional_len); + HW_SCE_Aes256GcmEncryptUpdateTransitionSub(); + } + } + else + { + err = HW_SCE_Aes128GcmEncryptInitSub((uint32_t *) &sched, (uint32_t *) &sched->words[0], (uint32_t *) iv); + if (FSP_SUCCESS == err) + { + HW_SCE_Aes128GcmEncryptUpdateAADSub((uint32_t *) aad, additional_len); + HW_SCE_Aes128GcmEncryptUpdateTransitionSub(); + } + } + + if (FSP_SUCCESS != err) + { + tc_return = TC_CRYPTO_FAIL; + } + } + + return tc_return; +} + +int tc_gcm_encryption_update (const TCAesKeySched_t sched, const uint8_t * input, uint8_t * output, uint8_t length) +{ + int tc_return = TC_CRYPTO_SUCCESS; + #if RM_TINYCRYPT_PORT_CFG_PARAM_CHECKING_ENABLE + + /* input sanity check: */ + if ((sched == (TCAesKeySched_t) 0) || + (input == (uint8_t *) 0) || + (output == (uint8_t *) 0) || + (length == 0)) + { + tc_return = TC_CRYPTO_FAIL; + } + #endif + + if (TC_CRYPTO_FAIL == tc_return) + { + } + else + { + if (0 != length) + { + if (SIZE_AES_192BIT_KEYLEN_BITS == (*sched).key_size) + { + HW_SCE_Aes192GcmEncryptUpdateSub((uint32_t *) input, (uint32_t *) output, length); + } + else if (SIZE_AES_256BIT_KEYLEN_BITS == (*sched).key_size) + { + HW_SCE_Aes256GcmEncryptUpdateSub((uint32_t *) input, (uint32_t *) output, length); + } + else + { + HW_SCE_Aes128GcmEncryptUpdateSub((uint32_t *) input, (uint32_t *) output, length); + } + } + } + + return tc_return; +} + +int tc_gcm_encryption_final (const TCAesKeySched_t sched, + uint8_t * input, + uint8_t input_len, + uint8_t aad_len, + uint8_t * output, + uint8_t * tag) +{ + fsp_err_t err = FSP_SUCCESS; + int tc_return = TC_CRYPTO_SUCCESS; + + #if RM_TINYCRYPT_PORT_CFG_PARAM_CHECKING_ENABLE + + /* input sanity check: */ + + if ((sched == (TCAesKeySched_t) 0) || + (input == (uint8_t *) 0) || + (output == (uint8_t *) 0) || + (tag == (uint8_t *) 0) || + (input_len == 0) || + (aad_len == 0)) + { + tc_return = TC_CRYPTO_FAIL; + } + #endif + + if (TC_CRYPTO_FAIL == tc_return) + { + } + else + { + if (SIZE_AES_192BIT_KEYLEN_BITS == (*sched).key_size) + { + err = + HW_SCE_Aes192GcmEncryptFinalSub((uint32_t *) input, (uint32_t *) &aad_len, (uint32_t *) &input_len, + (uint32_t *) output, (uint32_t *) tag); + } + else if (SIZE_AES_256BIT_KEYLEN_BITS == (*sched).key_size) + { + err = + HW_SCE_Aes256GcmEncryptFinalSub((uint32_t *) input, (uint32_t *) &aad_len, (uint32_t *) &input_len, + (uint32_t *) output, (uint32_t *) tag); + } + else + { + err = + HW_SCE_Aes128GcmEncryptFinalSub((uint32_t *) input, (uint32_t *) &aad_len, (uint32_t *) &input_len, + (uint32_t *) output, (uint32_t *) tag); + } + } + + if (FSP_SUCCESS != err) + { + tc_return = TC_CRYPTO_FAIL; + } + + return tc_return; +} + +int tc_gcm_decryption_init (const TCAesKeySched_t sched, uint8_t * iv, uint8_t * aad, uint32_t additional_len) +{ + fsp_err_t err = FSP_SUCCESS; + int tc_return = TC_CRYPTO_SUCCESS; + + #if RM_TINYCRYPT_PORT_CFG_PARAM_CHECKING_ENABLE + + /* input sanity check: */ + if ((sched == (TCAesKeySched_t) 0) || + (iv == (uint8_t *) 0) || + (aad == (uint8_t *) 0) || + (additional_len == 0)) + { + tc_return = TC_CRYPTO_FAIL; + } + #endif + + if (TC_CRYPTO_FAIL == tc_return) + { + } + else + { + if (SIZE_AES_192BIT_KEYLEN_BITS == (*sched).key_size) + { + err = HW_SCE_Aes192GcmDecryptInitSub((uint32_t *) &sched, (uint32_t *) &sched->words[0], (uint32_t *) iv); + if (FSP_SUCCESS == err) + { + HW_SCE_Aes192GcmDecryptUpdateAADSub((uint32_t *) aad, additional_len); + HW_SCE_Aes192GcmDecryptUpdateTransitionSub(); + } + } + else if (SIZE_AES_256BIT_KEYLEN_BITS == (*sched).key_size) + { + err = HW_SCE_Aes256GcmDecryptInitSub((uint32_t *) &sched, (uint32_t *) &sched->words[0], (uint32_t *) iv); + if (FSP_SUCCESS == err) + { + HW_SCE_Aes256GcmDecryptUpdateAADSub((uint32_t *) aad, additional_len); + HW_SCE_Aes256GcmDecryptUpdateTransitionSub(); + } + } + else + { + err = HW_SCE_Aes128GcmDecryptInitSub((uint32_t *) &sched, (uint32_t *) &sched->words[0], (uint32_t *) iv); + if (FSP_SUCCESS == err) + { + HW_SCE_Aes128GcmDecryptUpdateAADSub((uint32_t *) aad, additional_len); + HW_SCE_Aes128GcmDecryptUpdateTransitionSub(); + } + } + } + + if (FSP_SUCCESS != err) + { + tc_return = TC_CRYPTO_FAIL; + } + + return tc_return; +} + +int tc_gcm_decryption_update (const TCAesKeySched_t sched, const uint8_t * input, uint8_t * output, uint8_t length) +{ + int tc_return = TC_CRYPTO_SUCCESS; + #if RM_TINYCRYPT_PORT_CFG_PARAM_CHECKING_ENABLE + + /* input sanity check: */ + if ((sched == (TCAesKeySched_t) 0) || + (input == (uint8_t *) 0) || + (output == (uint8_t *) 0) || + (length == 0)) + { + tc_return = TC_CRYPTO_FAIL; + } + #endif + + if (TC_CRYPTO_FAIL == tc_return) + { + } + else + { + if (0 != length) + { + if (SIZE_AES_192BIT_KEYLEN_BITS == (*sched).key_size) + { + HW_SCE_Aes192GcmDecryptUpdateSub((uint32_t *) input, (uint32_t *) output, length); + } + else if (SIZE_AES_256BIT_KEYLEN_BITS == (*sched).key_size) + { + HW_SCE_Aes256GcmDecryptUpdateSub((uint32_t *) input, (uint32_t *) output, length); + } + else + { + HW_SCE_Aes128GcmDecryptUpdateSub((uint32_t *) input, (uint32_t *) output, length); + } + } + } + + return tc_return; +} + +int tc_gcm_decryption_final (const TCAesKeySched_t sched, + uint8_t * input, + uint8_t * tag, + uint8_t aad_len, + uint8_t input_len, + uint8_t tag_len, + uint8_t * output) + +{ + fsp_err_t err = FSP_SUCCESS; + int tc_return = TC_CRYPTO_SUCCESS; + + #if RM_TINYCRYPT_PORT_CFG_PARAM_CHECKING_ENABLE + + /* input sanity check: */ + if ((sched == (TCAesKeySched_t) 0) || + (input == (uint8_t *) 0) || + (output == (uint8_t *) 0) || + (tag == (uint8_t *) 0) || + (input_len == 0) || + (aad_len == 0)) + { + tc_return = TC_CRYPTO_FAIL; + } + #endif + + if (TC_CRYPTO_FAIL == tc_return) + { + } + else + { + if (SIZE_AES_192BIT_KEYLEN_BITS == (*sched).key_size) + { + err = + HW_SCE_Aes192GcmDecryptFinalSub((uint32_t *) input, + (uint32_t *) tag, + (uint32_t *) &aad_len, + (uint32_t *) &input_len, + (uint32_t *) &tag_len, + (uint32_t *) output); + } + else if (SIZE_AES_256BIT_KEYLEN_BITS == (*sched).key_size) + { + err = + HW_SCE_Aes256GcmDecryptFinalSub((uint32_t *) input, + (uint32_t *) tag, + (uint32_t *) &aad_len, + (uint32_t *) &input_len, + (uint32_t *) &tag_len, + (uint32_t *) output); + } + else + { + err = + HW_SCE_Aes128GcmDecryptFinalSub((uint32_t *) input, + (uint32_t *) tag, + (uint32_t *) &aad_len, + (uint32_t *) &input_len, + (uint32_t *) &tag_len, + (uint32_t *) output); + } + } + + if (FSP_SUCCESS != err) + { + tc_return = TC_CRYPTO_FAIL; + } + + return tc_return; +} + +int tc_gcm_generation_encryption (uint8_t * out, + unsigned int olen, + uint8_t * tag, + const uint8_t * aad, + unsigned int alen, + const uint8_t * iv, + unsigned int ivlen, + const uint8_t * payload, + unsigned int plen, + TCGcmMode_t g) +{ + int tc_return = TC_CRYPTO_SUCCESS; + uint8_t temp_tag[TC_AES_BLOCK_SIZE] = {0}; + + #if RM_TINYCRYPT_PORT_CFG_PARAM_CHECKING_ENABLE + + /* input sanity check: */ + if ((g == (TCGcmMode_t) 0) || + (out == (uint8_t *) 0) || + ((plen > 0) && (payload == (uint8_t *) 0)) || + ((alen > 0) && (aad == (uint8_t *) 0)) || + ((ivlen > 0) && (iv == (uint8_t *) 0)) || + (olen != plen)) + { + tc_return = TC_CRYPTO_FAIL; + } + #endif + FSP_PARAMETER_NOT_USED(ivlen); + if (TC_CRYPTO_FAIL != tc_return) + { + tc_return = tc_gcm_encryption_init(g->sched, (uint8_t *) iv, (uint8_t *) aad, (uint8_t) alen); + } + + if (TC_CRYPTO_FAIL != tc_return) + { + tc_return = tc_gcm_encryption_update(g->sched, payload, out, (uint8_t) olen); + } + + if (TC_CRYPTO_FAIL != tc_return) + { + tc_return = + tc_gcm_encryption_final(g->sched, (uint8_t *) payload, (uint8_t) plen, (uint8_t) alen, out, temp_tag); + } + + if (TC_CRYPTO_FAIL != tc_return) + { + memcpy(tag, temp_tag, g->tlen); + } + + return tc_return; +} + +int tc_gcm_decryption_verification (uint8_t * out, + unsigned int olen, + uint8_t * tag, + const uint8_t * aad, + unsigned int alen, + const uint8_t * iv, + unsigned int ivlen, + const uint8_t * payload, + unsigned int plen, + TCGcmMode_t g) +{ + int tc_return = TC_CRYPTO_SUCCESS; + + #if RM_TINYCRYPT_PORT_CFG_PARAM_CHECKING_ENABLE + + /* input sanity check: */ + if ((g == (TCGcmMode_t) 0) || + (out == (uint8_t *) 0) || + ((plen > 0) && (payload == (uint8_t *) 0)) || + ((alen > 0) && (aad == (uint8_t *) 0)) || + ((ivlen > 0) && (iv == (uint8_t *) 0)) || + (olen != plen)) + { + tc_return = TC_CRYPTO_FAIL; + } + #endif + FSP_PARAMETER_NOT_USED(ivlen); + if (TC_CRYPTO_FAIL != tc_return) + { + tc_return = tc_gcm_decryption_init(g->sched, (uint8_t *) iv, (uint8_t *) aad, (uint8_t) alen); + } + + if (TC_CRYPTO_FAIL != tc_return) + { + tc_return = tc_gcm_decryption_update(g->sched, payload, out, (uint8_t) olen); + } + + if (TC_CRYPTO_FAIL != tc_return) + { + tc_return = tc_gcm_decryption_final(g->sched, + (uint8_t *) payload, + tag, + (uint8_t) alen, + (uint8_t) plen, + (uint8_t) g->tlen, + out); + } + else + { + /* Do nothing */ + } + + return tc_return; +} + + #endif +#endif diff --git a/ra/fsp/src/rm_usbx_port/rm_usbx_port.c b/ra/fsp/src/rm_usbx_port/rm_usbx_port.c index 46b3ea619..0ef7f9074 100644 --- a/ra/fsp/src/rm_usbx_port/rm_usbx_port.c +++ b/ra/fsp/src/rm_usbx_port/rm_usbx_port.c @@ -92,6 +92,7 @@ * Macro definitions ******************************************************************************/ #define VALUE_1000UL (1000UL) + #define VALUE_1024UL (1024UL) #if defined(USB_CFG_HHID_USE) #define UX_FSP_HC_AVAILABLE_BANDWIDTH (2322UL) #elif defined(USB_CFG_HUVC_USE) @@ -210,6 +211,13 @@ static uint16_t g_usbx_hub_port_reset_flg = 0; static uint16_t g_usbx_hub_port_clear_flg = 0; static uint32_t g_usbx_hub_status; static uint32_t g_usbx_hub_passed_count = 0; + + #if defined(USB_CFG_HUVC_USE) + #if (USB_CFG_DMA == USB_CFG_ENABLE) +static uint32_t g_internal_buffer[VALUE_1024UL / sizeof(uint32_t)]; + #endif /* #if (USB_CFG_DMA == USB_CFG_ENABLE) */ + #endif /* defined(USB_CFG_HUVC_USE) */ + #endif /* #if ((USB_CFG_MODE & USB_CFG_HOST) == USB_CFG_HOST) */ /****************************************************************************** @@ -2332,6 +2340,13 @@ static void usb_host_usbx_transfer_complete_cb (usb_utr_t * p_utr, uint16_t data (USB_DATA_SHT == g_p_usb_hstd_pipe[p_utr->ip][pipe]->status)) { transfer_request->ux_transfer_request_completion_code = UX_SUCCESS; + #if (USB_CFG_DMA == USB_CFG_ENABLE) + if (NULL != p_utr->p_tranadr_hold) + { + memcpy(transfer_request->ux_transfer_request_data_pointer, p_utr->p_tranadr, + (p_utr->read_req_len - p_utr->tranlen)); + } + #endif /* #if (USB_CFG_DMA == USB_CFG_ENABLE) */ } else { @@ -2696,10 +2711,27 @@ static UINT usb_host_usbx_to_basic (UX_HCD * hcd, UINT function, VOID * paramete g_usb_host_usbx_req_nml_msg[module_number][pipe_number].read_req_len = size; /* Request Data Size */ g_usb_host_usbx_req_nml_msg[module_number][pipe_number].keyword = pipe_number; /* Pipe Number */ - g_usb_host_usbx_req_nml_msg[module_number][pipe_number].p_tranadr = - transfer_request->ux_transfer_request_data_pointer; /* Data address */ + #if (USB_CFG_DMA == USB_CFG_ENABLE) + if ((USB_IP1 == module_number) && + (0 != ((uint32_t) transfer_request->ux_transfer_request_data_pointer) % sizeof(uint32_t))) + { + g_usb_host_usbx_req_nml_msg[module_number][pipe_number].p_tranadr = g_internal_buffer; + g_usb_host_usbx_req_nml_msg[module_number][pipe_number].p_tranadr_hold = + transfer_request->ux_transfer_request_data_pointer; /* Data address */ + } + else + { + g_usb_host_usbx_req_nml_msg[module_number][pipe_number].p_tranadr = + transfer_request->ux_transfer_request_data_pointer; /* Data address */ + g_usb_host_usbx_req_nml_msg[module_number][pipe_number].p_tranadr_hold = NULL; + } - g_usb_host_usbx_req_nml_msg[module_number][pipe_number].tranlen = size; /* Request Data Size */ + #else /* #if (USB_CFG_DMA == USB_CFG_ENABLE) */ + g_usb_host_usbx_req_nml_msg[module_number][pipe_number].p_tranadr = + transfer_request->ux_transfer_request_data_pointer; /* Data address */ + #endif /* #if (USB_CFG_DMA == USB_CFG_ENABLE) */ + + g_usb_host_usbx_req_nml_msg[module_number][pipe_number].tranlen = size; /* Request Data Size */ g_usb_host_usbx_req_nml_msg[module_number][pipe_number].complete = usb_host_usbx_transfer_complete_cb; diff --git a/ra/fsp/src/rm_vee_flash/rm_vee_flash.c b/ra/fsp/src/rm_vee_flash/rm_vee_flash.c index eb7bd4878..8330c36cf 100644 --- a/ra/fsp/src/rm_vee_flash/rm_vee_flash.c +++ b/ra/fsp/src/rm_vee_flash/rm_vee_flash.c @@ -230,6 +230,24 @@ fsp_err_t RM_VEE_FLASH_Open (rm_vee_ctrl_t * const p_api_ctrl, rm_vee_cfg_t cons p_ctrl->p_flash = ((rm_vee_flash_cfg_t *) p_ctrl->p_cfg->p_extend)->p_flash; p_ctrl->segment_size = p_cfg->total_size / p_cfg->num_segments; + p_ctrl->rec_hdr.length = 0; + p_ctrl->rec_hdr.offset = 0; + p_ctrl->p_rec_data = NULL; + + p_ctrl->seg_hdr.refresh_cnt = 0; + p_ctrl->seg_hdr.pad = 0; + p_ctrl->seg_hdr.valid_code = RM_VEE_FLASH_VALID_CODE; + + p_ctrl->rec_end.id = (uint16_t) RM_VEE_FLASH_ID_INVALID; + p_ctrl->rec_end.valid_code = RM_VEE_FLASH_VALID_CODE; + + p_ctrl->ref_hdr.pad = 0; + p_ctrl->ref_hdr.valid_code = RM_VEE_FLASH_VALID_CODE; + + p_ctrl->p_callback = p_cfg->p_callback; + p_ctrl->p_context = p_cfg->p_context; + p_ctrl->p_callback_memory = NULL; + /* Open flash */ err = p_ctrl->p_flash->p_api->open(p_ctrl->p_flash->p_ctrl, p_ctrl->p_flash->p_cfg); FSP_ERROR_RETURN(FSP_SUCCESS == err, err); @@ -284,22 +302,6 @@ fsp_err_t RM_VEE_FLASH_Open (rm_vee_ctrl_t * const p_api_ctrl, rm_vee_cfg_t cons else { p_ctrl->seg_hdr.refresh_cnt = ((rm_vee_seg_hdr_t *) p_ctrl->active_seg_addr)->refresh_cnt; - p_ctrl->seg_hdr.pad = 0; - p_ctrl->seg_hdr.valid_code = RM_VEE_FLASH_VALID_CODE; - - p_ctrl->rec_hdr.length = 0; - p_ctrl->rec_hdr.offset = 0; - p_ctrl->p_rec_data = NULL; - - p_ctrl->rec_end.id = (uint16_t) RM_VEE_FLASH_ID_INVALID; - p_ctrl->rec_end.valid_code = RM_VEE_FLASH_VALID_CODE; - - p_ctrl->ref_hdr.pad = 0; - p_ctrl->ref_hdr.valid_code = RM_VEE_FLASH_VALID_CODE; - - p_ctrl->p_callback = p_cfg->p_callback; - p_ctrl->p_context = p_cfg->p_context; - p_ctrl->p_callback_memory = NULL; p_ctrl->mode = RM_VEE_FLASH_PRV_MODE_NORMAL; @@ -752,6 +754,7 @@ fsp_err_t RM_VEE_FLASH_Close (rm_vee_ctrl_t * const p_api_ctrl) static fsp_err_t rm_vee_internal_open (rm_vee_flash_instance_ctrl_t * const p_ctrl) { fsp_err_t err; + bool err_not_initialized = false; /* Clear record offset cache */ memset((void *) &p_ctrl->p_cfg->rec_offset[0], 0, @@ -762,15 +765,33 @@ static fsp_err_t rm_vee_internal_open (rm_vee_flash_instance_ctrl_t * const p_ct /* Determine active segment and erase incomplete segments if any (refresh or erase interrupted). */ err = rm_vee_inspect_segments(p_ctrl); - FSP_ERROR_RETURN(FSP_SUCCESS == err, err); - /* Get latest record location for each ID and determine next write location. */ - err = rm_vee_load_record_table(p_ctrl, true); - FSP_ERROR_RETURN(FSP_SUCCESS == err, err); + /* Catch FSP_ERR_NOT_INITIALIZED but continue checking records and refdata so that refresh is done properly. */ + if (FSP_ERR_NOT_INITIALIZED == err) + { + err_not_initialized = true; + } + else + { + FSP_ERROR_RETURN(FSP_SUCCESS == err, err); + } p_ctrl->new_refdata_valid = false; p_ctrl->factory_refdata = false; + /* Get latest record location for each ID and determine next write location. */ + err = rm_vee_load_record_table(p_ctrl, true); + + /* Catch FSP_ERR_NOT_INITIALIZED but continue checking refdata so that refresh is done properly. */ + if (FSP_ERR_NOT_INITIALIZED == err) + { + err_not_initialized = true; + } + else + { + FSP_ERROR_RETURN(FSP_SUCCESS == err, err); + } + #if RM_VEE_FLASH_CFG_REF_DATA_SUPPORT if (0 != p_ctrl->p_cfg->ref_data_size) { @@ -780,9 +801,15 @@ static fsp_err_t rm_vee_internal_open (rm_vee_flash_instance_ctrl_t * const p_ct } #endif + /* If FSP_ERR_NOT_INITIALIZED was caught then return FSP_ERR_NOT_INITIALIZED so that a refresh happens. */ + if (err_not_initialized) + { + return FSP_ERR_NOT_INITIALIZED; + } + p_ctrl->state = RM_VEE_FLASH_PRV_STATES_READY; - return err; + return FSP_SUCCESS; } /*******************************************************************************************************************//** diff --git a/ra/fsp/src/rm_wifi_onchip_da16200/rm_wifi_api_da16200.c b/ra/fsp/src/rm_wifi_onchip_da16xxx/rm_wifi_api_da16xxx.c similarity index 94% rename from ra/fsp/src/rm_wifi_onchip_da16200/rm_wifi_api_da16200.c rename to ra/fsp/src/rm_wifi_onchip_da16xxx/rm_wifi_api_da16xxx.c index 20ceed2a3..92fd0cd14 100644 --- a/ra/fsp/src/rm_wifi_onchip_da16200/rm_wifi_api_da16200.c +++ b/ra/fsp/src/rm_wifi_onchip_da16xxx/rm_wifi_api_da16xxx.c @@ -24,7 +24,7 @@ #include <stdio.h> #include <string.h> -#include "rm_wifi_onchip_da16200.h" +#include "rm_wifi_onchip_da16xxx.h" #if (BSP_CFG_RTOS == 2) @@ -50,7 +50,7 @@ WIFIReturnCode_t WIFI_On (void) WIFIReturnCode_t xRetVal = eWiFiFailure; fsp_err_t ret = FSP_ERR_WIFI_FAILED; - ret = rm_wifi_onchip_da16200_open(&g_wifi_onchip_da16200_cfg); + ret = rm_wifi_onchip_da16xxx_open(&g_wifi_onchip_da16xxx_cfg); if (!ret) { xRetVal = eWiFiSuccess; @@ -72,7 +72,7 @@ WIFIReturnCode_t WIFI_Off (void) WIFIReturnCode_t xRetVal = eWiFiFailure; int32_t ret = FSP_ERR_WIFI_FAILED; - ret = (int32_t) rm_wifi_onchip_da16200_close(); + ret = (int32_t) rm_wifi_onchip_da16xxx_close(); if (!ret) { xRetVal = eWiFiSuccess; @@ -143,10 +143,10 @@ WIFIReturnCode_t WIFI_ConnectAP (const WIFINetworkParams_t * const pxNetworkPara return eWiFiFailure; } - ret = (int32_t) rm_wifi_onchip_da16200_connect((char *) pxNetworkParams->ucSSID, + ret = (int32_t) rm_wifi_onchip_da16xxx_connect((char *) pxNetworkParams->ucSSID, pxNetworkParams->xSecurity, pxNetworkParams->xPassword.xWPA.cPassphrase, - WIFI_ONCHIP_DA16200_TKIP_AES_ENC_TYPE); + WIFI_ONCHIP_DA16XXX_TKIP_AES_ENC_TYPE); if (!ret) { xRetVal = eWiFiSuccess; @@ -165,7 +165,7 @@ WIFIReturnCode_t WIFI_Disconnect (void) { WIFIReturnCode_t xRetVal = eWiFiFailure; int32_t ret = -1; - ret = (int32_t) rm_wifi_onchip_da16200_disconnect(); + ret = (int32_t) rm_wifi_onchip_da16xxx_disconnect(); if (!ret) { xRetVal = eWiFiSuccess; @@ -218,7 +218,7 @@ WIFIReturnCode_t WIFI_Scan (WIFIScanResult_t * pxBuffer, uint8_t ucNumNetworks) { fsp_err_t err = FSP_SUCCESS; - err = rm_wifi_onchip_da16200_scan(pxBuffer, ucNumNetworks); + err = rm_wifi_onchip_da16xxx_scan(pxBuffer, ucNumNetworks); FSP_ERROR_RETURN(FSP_SUCCESS == err, eWiFiFailure); @@ -252,7 +252,7 @@ WIFIReturnCode_t WIFI_Ping (uint8_t * pucIPAddr, uint16_t usCount, uint32_t ulIn { int32_t ret = -1; - ret = (int32_t) rm_wifi_onchip_da16200_ping(pucIPAddr, usCount, ulIntervalMS); + ret = (int32_t) rm_wifi_onchip_da16xxx_ping(pucIPAddr, usCount, ulIntervalMS); FSP_ERROR_RETURN(FSP_SUCCESS == ret, eWiFiFailure); return eWiFiSuccess; @@ -276,7 +276,7 @@ WIFIReturnCode_t WIFI_Ping (uint8_t * pucIPAddr, uint16_t usCount, uint32_t ulIn WIFIReturnCode_t WIFI_GetIPInfo (WIFIIPConfiguration_t * pxIPInfo) { int32_t ret = -1; - ret = (int32_t) rm_wifi_onchip_da16200_network_info_get(pxIPInfo->xIPAddress.ulAddress, + ret = (int32_t) rm_wifi_onchip_da16xxx_network_info_get(pxIPInfo->xIPAddress.ulAddress, pxIPInfo->xNetMask.ulAddress, pxIPInfo->xGateway.ulAddress); FSP_ERROR_RETURN(FSP_SUCCESS == ret, eWiFiFailure); @@ -300,7 +300,7 @@ WIFIReturnCode_t WIFI_GetIPInfo (WIFIIPConfiguration_t * pxIPInfo) { WIFIReturnCode_t WIFI_GetMAC (uint8_t * pucMac) { int32_t ret = -1; - ret = (int32_t) rm_wifi_onchip_da16200_mac_addr_get(pucMac); + ret = (int32_t) rm_wifi_onchip_da16xxx_mac_addr_get(pucMac); FSP_ERROR_RETURN(FSP_SUCCESS == ret, eWiFiFailure); return eWiFiSuccess; @@ -328,7 +328,7 @@ WIFIReturnCode_t WIFI_GetHostIP (char * pcHost, uint8_t * pucIPAddr) { return eWiFiFailure; } - ret = (int32_t) rm_wifi_onchip_da16200_dns_query(pcHost, pucIPAddr); + ret = (int32_t) rm_wifi_onchip_da16xxx_dns_query(pcHost, pucIPAddr); FSP_ERROR_RETURN(FSP_SUCCESS == ret, eWiFiFailure); return eWiFiSuccess; @@ -347,7 +347,7 @@ BaseType_t WIFI_IsConnected (const WIFINetworkParams_t * pxNetworkParams) { FSP_PARAMETER_NOT_USED(pxNetworkParams); - rm_wifi_onchip_da16200_connected(&status); + rm_wifi_onchip_da16xxx_connected(&status); if (0 == status) { xIsConnected = pdTRUE; diff --git a/ra/fsp/src/rm_wifi_onchip_da16200/rm_wifi_onchip_da16200.c b/ra/fsp/src/rm_wifi_onchip_da16xxx/rm_wifi_onchip_da16xxx.c similarity index 74% rename from ra/fsp/src/rm_wifi_onchip_da16200/rm_wifi_onchip_da16200.c rename to ra/fsp/src/rm_wifi_onchip_da16xxx/rm_wifi_onchip_da16xxx.c index f294e2589..97608b1e9 100644 --- a/ra/fsp/src/rm_wifi_onchip_da16200/rm_wifi_onchip_da16200.c +++ b/ra/fsp/src/rm_wifi_onchip_da16xxx/rm_wifi_onchip_da16xxx.c @@ -21,24 +21,24 @@ /*********************************************************************************************************************** * Includes **********************************************************************************************************************/ -#include "rm_wifi_onchip_da16200.h" +#include "rm_wifi_onchip_da16xxx.h" #if (BSP_FEATURE_SCI_VERSION == 2U) #include "r_sci_b_uart.h" -typedef sci_b_uart_instance_ctrl_t rm_wifi_onchip_da16200_uart_instance_ctrl_t; -typedef sci_b_uart_extended_cfg_t rm_wifi_onchip_da16200_uart_extended_cfg_t; -typedef sci_b_baud_setting_t rm_wifi_onchip_da16200_baud_setting_t; - #define RM_WIFI_ONCHIP_DA16200_SCI_UART_FLOW_CONTROL_RTS SCI_B_UART_FLOW_CONTROL_RTS - #define RM_WIFI_ONCHIP_DA16200_SCI_UART_FLOW_CONTROL_HARDWARE_CTSRTS SCI_B_UART_FLOW_CONTROL_HARDWARE_CTSRTS +typedef sci_b_uart_instance_ctrl_t rm_wifi_onchip_da16xxx_uart_instance_ctrl_t; +typedef sci_b_uart_extended_cfg_t rm_wifi_onchip_da16xxx_uart_extended_cfg_t; +typedef sci_b_baud_setting_t rm_wifi_onchip_da16xxx_baud_setting_t; + #define RM_WIFI_ONCHIP_DA16XXX_SCI_UART_FLOW_CONTROL_RTS SCI_B_UART_FLOW_CONTROL_RTS + #define RM_WIFI_ONCHIP_DA16XXX_SCI_UART_FLOW_CONTROL_HARDWARE_CTSRTS SCI_B_UART_FLOW_CONTROL_HARDWARE_CTSRTS static fsp_err_t (* p_sci_uart_baud_calculate)(uint32_t, bool, uint32_t, struct st_sci_b_baud_setting_t * const) = &R_SCI_B_UART_BaudCalculate; #else #include "r_sci_uart.h" -typedef sci_uart_instance_ctrl_t rm_wifi_onchip_da16200_uart_instance_ctrl_t; -typedef sci_uart_extended_cfg_t rm_wifi_onchip_da16200_uart_extended_cfg_t; -typedef baud_setting_t rm_wifi_onchip_da16200_baud_setting_t; - #define RM_WIFI_ONCHIP_DA16200_SCI_UART_FLOW_CONTROL_RTS SCI_UART_FLOW_CONTROL_RTS - #define RM_WIFI_ONCHIP_DA16200_SCI_UART_FLOW_CONTROL_HARDWARE_CTSRTS SCI_UART_FLOW_CONTROL_HARDWARE_CTSRTS +typedef sci_uart_instance_ctrl_t rm_wifi_onchip_da16xxx_uart_instance_ctrl_t; +typedef sci_uart_extended_cfg_t rm_wifi_onchip_da16xxx_uart_extended_cfg_t; +typedef baud_setting_t rm_wifi_onchip_da16xxx_baud_setting_t; + #define RM_WIFI_ONCHIP_DA16XXX_SCI_UART_FLOW_CONTROL_RTS SCI_UART_FLOW_CONTROL_RTS + #define RM_WIFI_ONCHIP_DA16XXX_SCI_UART_FLOW_CONTROL_HARDWARE_CTSRTS SCI_UART_FLOW_CONTROL_HARDWARE_CTSRTS static fsp_err_t (* p_sci_uart_baud_calculate)(uint32_t, bool, uint32_t, baud_setting_t * const) = &R_SCI_UART_BaudCalculate; #endif @@ -48,89 +48,89 @@ static fsp_err_t (* p_sci_uart_baud_calculate)(uint32_t, bool, uint32_t, /*********************************************************************************************************************** * Defines **********************************************************************************************************************/ -#define WIFI_ONCHIP_DA16200_TEMP_BUFFER_SIZE (256) +#define WIFI_ONCHIP_DA16XXX_TEMP_BUFFER_SIZE (256) /* Text full versions of AT command returns */ -#define WIFI_ONCHIP_DA16200_RETURN_TEXT_OK "OK" -#define WIFI_ONCHIP_DA16200_RETURN_CONN_TEXT "+WFJAP:1" +#define WIFI_ONCHIP_DA16XXX_RETURN_TEXT_OK "OK" +#define WIFI_ONCHIP_DA16XXX_RETURN_CONN_TEXT "+WFJAP:1" -/* DA16200 UART port defines */ -#define WIFI_ONCHIP_DA16200_UART_INITIAL_PORT (0) -#define WIFI_ONCHIP_DA16200_UART_SECOND_PORT (1) +/* DA16XXX UART port defines */ +#define WIFI_ONCHIP_DA16XXX_UART_INITIAL_PORT (0) +#define WIFI_ONCHIP_DA16XXX_UART_SECOND_PORT (1) -/* Initial DA16200 Wifi module UART settings */ -#define WIFI_ONCHIP_DA16200_DEFAULT_BAUDRATE (115200) -#define WIFI_ONCHIP_DA16200_DEFAULT_MODULATION false -#define WIFI_ONCHIP_DA16200_DEFAULT_ERROR (9000) +/* Initial DA16XXX Wifi module UART settings */ +#define WIFI_ONCHIP_DA16XXX_DEFAULT_BAUDRATE (115200) +#define WIFI_ONCHIP_DA16XXX_DEFAULT_MODULATION false +#define WIFI_ONCHIP_DA16XXX_DEFAULT_ERROR (9000) /* Pin or port invalid definition */ -#define WIFI_ONCHIP_DA16200_BSP_PIN_PORT_INVALID (UINT16_MAX) +#define WIFI_ONCHIP_DA16XXX_BSP_PIN_PORT_INVALID (UINT16_MAX) -#define WIFI_ONCHIP_DA16200_TEMP_BUFF_SIZE (30) +#define WIFI_ONCHIP_DA16XXX_TEMP_BUFF_SIZE (30) /* Mutex give/take defines */ -#define WIFI_ONCHIP_DA16200_MUTEX_TX (1 << 0) -#define WIFI_ONCHIP_DA16200_MUTEX_RX (1 << 1) +#define WIFI_ONCHIP_DA16XXX_MUTEX_TX (1 << 0) +#define WIFI_ONCHIP_DA16XXX_MUTEX_RX (1 << 1) /* Predefined timeout values */ -#define WIFI_ONCHIP_DA16200_TIMEOUT_1MS (1) -#define WIFI_ONCHIP_DA16200_TIMEOUT_3MS (3) -#define WIFI_ONCHIP_DA16200_TIMEOUT_5MS (5) -#define WIFI_ONCHIP_DA16200_TIMEOUT_10MS (10) -#define WIFI_ONCHIP_DA16200_TIMEOUT_20MS (20) -#define WIFI_ONCHIP_DA16200_TIMEOUT_30MS (30) -#define WIFI_ONCHIP_DA16200_TIMEOUT_100MS (100) -#define WIFI_ONCHIP_DA16200_TIMEOUT_200MS (200) -#define WIFI_ONCHIP_DA16200_TIMEOUT_300MS (300) -#define WIFI_ONCHIP_DA16200_TIMEOUT_400MS (400) -#define WIFI_ONCHIP_DA16200_TIMEOUT_500MS (500) -#define WIFI_ONCHIP_DA16200_TIMEOUT_1SEC (1000) -#define WIFI_ONCHIP_DA16200_TIMEOUT_2SEC (2000) -#define WIFI_ONCHIP_DA16200_TIMEOUT_3SEC (3000) -#define WIFI_ONCHIP_DA16200_TIMEOUT_4SEC (4000) -#define WIFI_ONCHIP_DA16200_TIMEOUT_5SEC (5000) -#define WIFI_ONCHIP_DA16200_TIMEOUT_8SEC (8000) -#define WIFI_ONCHIP_DA16200_TIMEOUT_15SEC (15000) -#define WIFI_ONCHIP_DA16200_TIMEOUT_20SEC (20000) - -/* DA16200 AT command retry delay in milliseconds */ -#define WIFI_ONCHIP_DA16200_DELAY_20MS (20) -#define WIFI_ONCHIP_DA16200_DELAY_50MS (50) -#define WIFI_ONCHIP_DA16200_DELAY_100MS (100) -#define WIFI_ONCHIP_DA16200_DELAY_200MS (200) -#define WIFI_ONCHIP_DA16200_DELAY_300MS (300) -#define WIFI_ONCHIP_DA16200_DELAY_500MS (500) -#define WIFI_ONCHIP_DA16200_DELAY_1000MS (1000) -#define WIFI_ONCHIP_DA16200_DELAY_2000MS (2000) -#define WIFI_ONCHIP_DA16200_DELAY_5000MS (5000) -#define WIFI_ONCHIP_DA16200_DELAY_8000MS (8000) -#define WIFI_ONCHIP_DA16200_DELAY_15SEC (15000) +#define WIFI_ONCHIP_DA16XXX_TIMEOUT_1MS (1) +#define WIFI_ONCHIP_DA16XXX_TIMEOUT_3MS (3) +#define WIFI_ONCHIP_DA16XXX_TIMEOUT_5MS (5) +#define WIFI_ONCHIP_DA16XXX_TIMEOUT_10MS (10) +#define WIFI_ONCHIP_DA16XXX_TIMEOUT_20MS (20) +#define WIFI_ONCHIP_DA16XXX_TIMEOUT_30MS (30) +#define WIFI_ONCHIP_DA16XXX_TIMEOUT_100MS (100) +#define WIFI_ONCHIP_DA16XXX_TIMEOUT_200MS (200) +#define WIFI_ONCHIP_DA16XXX_TIMEOUT_300MS (300) +#define WIFI_ONCHIP_DA16XXX_TIMEOUT_400MS (400) +#define WIFI_ONCHIP_DA16XXX_TIMEOUT_500MS (500) +#define WIFI_ONCHIP_DA16XXX_TIMEOUT_1SEC (1000) +#define WIFI_ONCHIP_DA16XXX_TIMEOUT_2SEC (2000) +#define WIFI_ONCHIP_DA16XXX_TIMEOUT_3SEC (3000) +#define WIFI_ONCHIP_DA16XXX_TIMEOUT_4SEC (4000) +#define WIFI_ONCHIP_DA16XXX_TIMEOUT_5SEC (5000) +#define WIFI_ONCHIP_DA16XXX_TIMEOUT_8SEC (8000) +#define WIFI_ONCHIP_DA16XXX_TIMEOUT_15SEC (15000) +#define WIFI_ONCHIP_DA16XXX_TIMEOUT_20SEC (20000) + +/* DA16XXX AT command retry delay in milliseconds */ +#define WIFI_ONCHIP_DA16XXX_DELAY_20MS (20) +#define WIFI_ONCHIP_DA16XXX_DELAY_50MS (50) +#define WIFI_ONCHIP_DA16XXX_DELAY_100MS (100) +#define WIFI_ONCHIP_DA16XXX_DELAY_200MS (200) +#define WIFI_ONCHIP_DA16XXX_DELAY_300MS (300) +#define WIFI_ONCHIP_DA16XXX_DELAY_500MS (500) +#define WIFI_ONCHIP_DA16XXX_DELAY_1000MS (1000) +#define WIFI_ONCHIP_DA16XXX_DELAY_2000MS (2000) +#define WIFI_ONCHIP_DA16XXX_DELAY_5000MS (5000) +#define WIFI_ONCHIP_DA16XXX_DELAY_8000MS (8000) +#define WIFI_ONCHIP_DA16XXX_DELAY_15SEC (15000) /* Minimum string size for getting local time string */ -#define WIFI_ONCHIP_DA16200_LOCAL_TIME_STR_SIZE (25) +#define WIFI_ONCHIP_DA16XXX_LOCAL_TIME_STR_SIZE (25) #define HOURS_IN_SECONDS (3600) /* Socket Types supported */ -#define WIFI_ONCHIP_DA16200_SOCKET_TYPE_TCP_SERVER (0) -#define WIFI_ONCHIP_DA16200_SOCKET_TYPE_TCP_CLIENT (1) -#define WIFI_ONCHIP_DA16200_SOCKET_TYPE_UDP (2) -#define WIFI_ONCHIP_DA16200_SOCKET_TYPE_MAX (3) +#define WIFI_ONCHIP_DA16XXX_SOCKET_TYPE_TCP_SERVER (0) +#define WIFI_ONCHIP_DA16XXX_SOCKET_TYPE_TCP_CLIENT (1) +#define WIFI_ONCHIP_DA16XXX_SOCKET_TYPE_UDP (2) +#define WIFI_ONCHIP_DA16XXX_SOCKET_TYPE_MAX (3) /* Error Response Codes */ -#define WIFI_ONCHIP_DA16200_ERR_UNKNOWN_CMD (-1) -#define WIFI_ONCHIP_DA16200_ERR_INSUF_PARAMS (-2) -#define WIFI_ONCHIP_DA16200_ERR_TOO_MANY_PARAMS (-3) -#define WIFI_ONCHIP_DA16200_ERR_INVALID_PARAM (-4) -#define WIFI_ONCHIP_DA16200_ERR_UNSUPPORTED_FUN (-5) -#define WIFI_ONCHIP_DA16200_ERR_NOT_CONNECTED_AP (-6) -#define WIFI_ONCHIP_DA16200_ERR_NO_RESULT (-7) -#define WIFI_ONCHIP_DA16200_ERR_RESP_BUF_OVERFLOW (-8) -#define WIFI_ONCHIP_DA16200_ERR_FUNC_NOT_CONFIG (-9) -#define WIFI_ONCHIP_DA16200_ERR_CMD_TIMEOUT (-10) -#define WIFI_ONCHIP_DA16200_ERR_NVRAM_WR_FAIL (-11) -#define WIFI_ONCHIP_DA16200_ERR_RETEN_MEM_WR_FAIL (-12) -#define WIFI_ONCHIP_DA16200_ERR_UNKNOWN (-99) +#define WIFI_ONCHIP_DA16XXX_ERR_UNKNOWN_CMD (-1) +#define WIFI_ONCHIP_DA16XXX_ERR_INSUF_PARAMS (-2) +#define WIFI_ONCHIP_DA16XXX_ERR_TOO_MANY_PARAMS (-3) +#define WIFI_ONCHIP_DA16XXX_ERR_INVALID_PARAM (-4) +#define WIFI_ONCHIP_DA16XXX_ERR_UNSUPPORTED_FUN (-5) +#define WIFI_ONCHIP_DA16XXX_ERR_NOT_CONNECTED_AP (-6) +#define WIFI_ONCHIP_DA16XXX_ERR_NO_RESULT (-7) +#define WIFI_ONCHIP_DA16XXX_ERR_RESP_BUF_OVERFLOW (-8) +#define WIFI_ONCHIP_DA16XXX_ERR_FUNC_NOT_CONFIG (-9) +#define WIFI_ONCHIP_DA16XXX_ERR_CMD_TIMEOUT (-10) +#define WIFI_ONCHIP_DA16XXX_ERR_NVRAM_WR_FAIL (-11) +#define WIFI_ONCHIP_DA16XXX_ERR_RETEN_MEM_WR_FAIL (-12) +#define WIFI_ONCHIP_DA16XXX_ERR_UNKNOWN (-99) #define sbFLAGS_IS_MESSAGE_BUFFER ((uint8_t) 1) /* Set if the stream buffer was created as a message buffer, in which case it holds discrete messages rather than a stream. */ #define sbBYTES_TO_STORE_MESSAGE_LENGTH (sizeof(configMESSAGE_BUFFER_LENGTH_TYPE)) @@ -165,19 +165,19 @@ extern const ioport_instance_t g_ioport; /* Numeric return types for AT basic function commands */ typedef enum { - WIFI_ONCHIP_DA16200_RETURN_OK = 0, ///< WIFI_ONCHIP_DA16200_RETURN_OK - WIFI_ONCHIP_DA16200_RETURN_INIT_OK, ///< WIFI_ONCHIP_DA16200_RETURN_INIT_OK - WIFI_ONCHIP_DA16200_RETURN_CONNECT, ///< WIFI_ONCHIP_DA16200_RETURN_CONNECT - WIFI_ONCHIP_DA16200_RETURN_CONNECT_FAIL, ///< WIFI_ONCHIP_DA16200_RETURN_CONNECT_FAIL - WIFI_ONCHIP_DA16200_RETURN_ERROR_CODES, - WIFI_ONCHIP_DA16200_RETURN_PROVISION_IDLE, - WIFI_ONCHIP_DA16200_RETURN_PROVISION_START -} da16200_return_code_t; + WIFI_ONCHIP_DA16XXX_RETURN_OK = 0, ///< WIFI_ONCHIP_DA16XXX_RETURN_OK + WIFI_ONCHIP_DA16XXX_RETURN_INIT_OK, ///< WIFI_ONCHIP_DA16XXX_RETURN_INIT_OK + WIFI_ONCHIP_DA16XXX_RETURN_CONNECT, ///< WIFI_ONCHIP_DA16XXX_RETURN_CONNECT + WIFI_ONCHIP_DA16XXX_RETURN_CONNECT_FAIL, ///< WIFI_ONCHIP_DA16XXX_RETURN_CONNECT_FAIL + WIFI_ONCHIP_DA16XXX_RETURN_ERROR_CODES, + WIFI_ONCHIP_DA16XXX_RETURN_PROVISION_IDLE, + WIFI_ONCHIP_DA16XXX_RETURN_PROVISION_START +} da16xxx_return_code_t; /*********************************************************************************************************************** * Static Globals **********************************************************************************************************************/ -static rm_wifi_onchip_da16200_baud_setting_t g_baud_setting = +static rm_wifi_onchip_da16xxx_baud_setting_t g_baud_setting = { #if (2U == BSP_FEATURE_SCI_VERSION) .baudrate_bits_b.brme = 0, @@ -196,8 +196,8 @@ static rm_wifi_onchip_da16200_baud_setting_t g_baud_setting = #endif }; -/* Control instance for the da16200 wifi module */ -static wifi_onchip_da16200_instance_ctrl_t g_rm_wifi_onchip_da16200_instance; +/* Control instance for the da16xxx wifi module */ +static wifi_onchip_da16xxx_instance_ctrl_t g_rm_wifi_onchip_da16xxx_instance; /* Transmit and receive mutexes for UARTs */ static StaticSemaphore_t g_socket_mutexes[2]; @@ -206,10 +206,10 @@ static StaticSemaphore_t g_uart_tei_mutex[2]; /** * Maximum time in ticks to wait for obtaining a semaphore. */ -static const TickType_t wifi_sx_wifi_onchip_da16200_sem_block_timeout = pdMS_TO_TICKS( - WIFI_ONCHIP_DA16200_CFG_SEM_MAX_TIMEOUT); +static const TickType_t wifi_sx_wifi_onchip_da16xxx_sem_block_timeout = pdMS_TO_TICKS( + WIFI_ONCHIP_DA16XXX_CFG_SEM_MAX_TIMEOUT); -static uint8_t rx_buffer[WIFI_ONCHIP_DA16200_TEMP_BUFFER_SIZE] = {0}; +static uint8_t rx_buffer[WIFI_ONCHIP_DA16XXX_TEMP_BUFFER_SIZE] = {0}; static uint8_t rx_data_index = 0; /* Structure that hold state information on the buffer. */ @@ -244,10 +244,10 @@ typedef struct StreamBufferDef_t /*lint !e9058 Style convention /*********************************************************************************************************************** * Local function prototypes **********************************************************************************************************************/ -static void rm_wifi_onchip_da16200_cleanup_open(wifi_onchip_da16200_instance_ctrl_t * const p_instance_ctrl); -static void rm_wifi_onchip_da16200_wifi_module_reset(wifi_onchip_da16200_instance_ctrl_t * const p_instance_ctrl); -static fsp_err_t rm_wifi_onchip_da16200_error_lookup(char * resp); -static fsp_err_t rm_wifi_onchip_da16200_send_basic(wifi_onchip_da16200_instance_ctrl_t * p_instance_ctrl, +static void rm_wifi_onchip_da16xxx_cleanup_open(wifi_onchip_da16xxx_instance_ctrl_t * const p_instance_ctrl); +static void rm_wifi_onchip_da16xxx_wifi_module_reset(wifi_onchip_da16xxx_instance_ctrl_t * const p_instance_ctrl); +static fsp_err_t rm_wifi_onchip_da16xxx_error_lookup(char * resp); +static fsp_err_t rm_wifi_onchip_da16xxx_send_basic(wifi_onchip_da16xxx_instance_ctrl_t * p_instance_ctrl, uint32_t serial_ch_id, const char * p_textstring, uint32_t length, @@ -255,20 +255,20 @@ static fsp_err_t rm_wifi_onchip_da16200_send_basic(wifi_onchip_da16200_instance_ uint32_t retry_delay, const char * p_expect_code); -static BaseType_t rm_wifi_onchip_da16200_send_basic_take_mutex(wifi_onchip_da16200_instance_ctrl_t * p_instance_ctrl, +static BaseType_t rm_wifi_onchip_da16xxx_send_basic_take_mutex(wifi_onchip_da16xxx_instance_ctrl_t * p_instance_ctrl, uint32_t mutex_flag); -static BaseType_t rm_wifi_onchip_da16200_send_basic_give_mutex(wifi_onchip_da16200_instance_ctrl_t * p_instance_ctrl, +static BaseType_t rm_wifi_onchip_da16xxx_send_basic_give_mutex(wifi_onchip_da16xxx_instance_ctrl_t * p_instance_ctrl, uint32_t mutex_flag); -static void rm_wifi_da16200_handle_incoming_socket_data(da16200_socket_t * pSocket, uint8_t data_byte); +static void rm_wifi_da16xxx_handle_incoming_socket_data(da16xxx_socket_t * pSocket, uint8_t data_byte); static size_t xStreamBufferReceiveAlt(StreamBufferHandle_t xStreamBuffer, void * pvRxData, size_t xBufferLengthBytes, TickType_t xTicksToWait); -#if (1 == WIFI_ONCHIP_DA16200_CFG_SNTP_ENABLE) -static fsp_err_t rm_wifi_onchip_da16200_sntp_service_init(wifi_onchip_da16200_instance_ctrl_t * const p_instance_ctrl); +#if (1 == WIFI_ONCHIP_DA16XXX_CFG_SNTP_ENABLE) +static fsp_err_t rm_wifi_onchip_da16xxx_sntp_service_init(wifi_onchip_da16xxx_instance_ctrl_t * const p_instance_ctrl); #endif @@ -277,25 +277,25 @@ static fsp_err_t rm_wifi_onchip_da16200_sntp_service_init(wifi_onchip_da16200_in **********************************************************************************************************************/ /*******************************************************************************************************************//** - * Opens and configures the WIFI_ONCHIP_DA16200 Middleware module. + * Opens and configures the WIFI_ONCHIP_DA16XXX Middleware module. * * @param[in] p_cfg Pointer to pin configuration structure. * - * @retval FSP_SUCCESS WIFI_ONCHIP_DA16200 successfully configured. + * @retval FSP_SUCCESS WIFI_ONCHIP_DA16XXX successfully configured. * @retval FSP_ERR_ASSERTION The parameter p_cfg or p_instance_ctrl is NULL. * @retval FSP_ERR_OUT_OF_MEMORY There is no more heap memory available. * @retval FSP_ERR_WIFI_FAILED Error occurred with command to Wifi module. * @retval FSP_ERR_ALREADY_OPEN Module is already open. This module can only be opened once. * @retval FSP_ERR_WIFI_INIT_FAILED WiFi module initialization failed. **********************************************************************************************************************/ -fsp_err_t rm_wifi_onchip_da16200_open (wifi_onchip_da16200_cfg_t const * const p_cfg) +fsp_err_t rm_wifi_onchip_da16xxx_open (wifi_onchip_da16xxx_cfg_t const * const p_cfg) { - wifi_onchip_da16200_instance_ctrl_t * p_instance_ctrl = &g_rm_wifi_onchip_da16200_instance; + wifi_onchip_da16xxx_instance_ctrl_t * p_instance_ctrl = &g_rm_wifi_onchip_da16xxx_instance; fsp_err_t err = FSP_SUCCESS; uart_instance_t * p_uart = NULL; - rm_wifi_onchip_da16200_uart_extended_cfg_t uart0_cfg_extended; + rm_wifi_onchip_da16xxx_uart_extended_cfg_t uart0_cfg_extended; uart_cfg_t uart0_cfg; - uint8_t temp_buff[WIFI_ONCHIP_DA16200_TEMP_BUFF_SIZE] = {0}; + uint8_t temp_buff[WIFI_ONCHIP_DA16XXX_TEMP_BUFF_SIZE] = {0}; uint8_t * p_temp_buff = temp_buff; uint32_t uart_baud_rates[UART_BAUD_MAX_CNT] = { @@ -304,17 +304,19 @@ fsp_err_t rm_wifi_onchip_da16200_open (wifi_onchip_da16200_cfg_t const * const p uint32_t curr_uart_baud = 0; int index = 0; -#if (WIFI_ONCHIP_DA16200_CFG_PARAM_CHECKING_ENABLED == 1) +#if (WIFI_ONCHIP_DA16XXX_CFG_PARAM_CHECKING_ENABLED == 1) FSP_ASSERT(NULL != p_cfg); FSP_ERROR_RETURN(WIFI_OPEN != p_instance_ctrl->open, FSP_ERR_ALREADY_OPEN); #endif /* Clear the control structure */ - memset(p_instance_ctrl, 0, sizeof(wifi_onchip_da16200_instance_ctrl_t)); + memset(p_instance_ctrl, 0, sizeof(wifi_onchip_da16xxx_instance_ctrl_t)); /* Update control structure from configuration values */ - p_instance_ctrl->p_wifi_onchip_da16200_cfg = p_cfg; - p_instance_ctrl->num_uarts = p_cfg->num_uarts; + p_instance_ctrl->p_wifi_onchip_da16xxx_cfg = p_cfg; + p_instance_ctrl->num_uarts = p_cfg->num_uarts; + p_instance_ctrl->p_current_cmd_rx_buffer = p_instance_ctrl->cmd_rx_buff; + p_instance_ctrl->current_cmd_rx_buffer_size = sizeof(p_instance_ctrl->cmd_rx_buff); for (uint32_t i = 0; i < p_instance_ctrl->num_uarts; i++) { @@ -323,7 +325,7 @@ fsp_err_t rm_wifi_onchip_da16200_open (wifi_onchip_da16200_cfg_t const * const p p_instance_ctrl->uart_tei_sem[i] = xSemaphoreCreateBinaryStatic(&g_uart_tei_mutex[i]); if (NULL == p_instance_ctrl->uart_tei_sem[i]) { - rm_wifi_onchip_da16200_cleanup_open(p_instance_ctrl); + rm_wifi_onchip_da16xxx_cleanup_open(p_instance_ctrl); } FSP_ERROR_RETURN(NULL != p_instance_ctrl->uart_tei_sem[i], FSP_ERR_OUT_OF_MEMORY); @@ -333,10 +335,10 @@ fsp_err_t rm_wifi_onchip_da16200_open (wifi_onchip_da16200_cfg_t const * const p p_instance_ctrl->reset_pin = p_cfg->reset_pin; p_instance_ctrl->num_creatable_sockets = p_cfg->num_sockets; - p_instance_ctrl->curr_cmd_port = WIFI_ONCHIP_DA16200_UART_INITIAL_PORT; + p_instance_ctrl->curr_cmd_port = WIFI_ONCHIP_DA16XXX_UART_INITIAL_PORT; /* Reset the wi-fi module to a known state */ - rm_wifi_onchip_da16200_wifi_module_reset(p_instance_ctrl); + rm_wifi_onchip_da16xxx_wifi_module_reset(p_instance_ctrl); /* Create the Tx/Rx mutexes */ if (p_instance_ctrl->tx_sem != NULL) @@ -347,7 +349,7 @@ fsp_err_t rm_wifi_onchip_da16200_open (wifi_onchip_da16200_cfg_t const * const p p_instance_ctrl->tx_sem = xSemaphoreCreateMutexStatic(&g_socket_mutexes[0]); if (NULL == p_instance_ctrl->tx_sem) { - rm_wifi_onchip_da16200_cleanup_open(p_instance_ctrl); + rm_wifi_onchip_da16xxx_cleanup_open(p_instance_ctrl); } FSP_ERROR_RETURN(NULL != p_instance_ctrl->tx_sem, FSP_ERR_OUT_OF_MEMORY); @@ -360,7 +362,7 @@ fsp_err_t rm_wifi_onchip_da16200_open (wifi_onchip_da16200_cfg_t const * const p p_instance_ctrl->rx_sem = xSemaphoreCreateMutexStatic(&g_socket_mutexes[1]); if (NULL == p_instance_ctrl->rx_sem) { - rm_wifi_onchip_da16200_cleanup_open(p_instance_ctrl); + rm_wifi_onchip_da16xxx_cleanup_open(p_instance_ctrl); } FSP_ERROR_RETURN(NULL != p_instance_ctrl->rx_sem, FSP_ERR_OUT_OF_MEMORY); @@ -372,14 +374,14 @@ fsp_err_t rm_wifi_onchip_da16200_open (wifi_onchip_da16200_cfg_t const * const p &p_instance_ctrl->socket_byteq_struct); if (NULL == p_instance_ctrl->socket_byteq_hdl) { - rm_wifi_onchip_da16200_cleanup_open(p_instance_ctrl); + rm_wifi_onchip_da16xxx_cleanup_open(p_instance_ctrl); } FSP_ERROR_RETURN(NULL != p_instance_ctrl->socket_byteq_hdl, FSP_ERR_OUT_OF_MEMORY); /* Create memory copy of uart extended configuration and then copy new configuration values in. */ memcpy((void *) &uart0_cfg_extended, (void *) p_instance_ctrl->uart_instance_objects[0]->p_cfg->p_extend, - sizeof(rm_wifi_onchip_da16200_uart_extended_cfg_t)); + sizeof(rm_wifi_onchip_da16xxx_uart_extended_cfg_t)); /* Create memory copy of uart configuration and update with new extended configuration structure. */ memcpy((void *) &uart0_cfg, p_instance_ctrl->uart_instance_objects[0]->p_cfg, sizeof(uart_cfg_t)); @@ -388,64 +390,64 @@ fsp_err_t rm_wifi_onchip_da16200_open (wifi_onchip_da16200_cfg_t const * const p { curr_uart_baud = uart_baud_rates[index]; - (*p_sci_uart_baud_calculate)(curr_uart_baud, WIFI_ONCHIP_DA16200_DEFAULT_MODULATION, - WIFI_ONCHIP_DA16200_DEFAULT_ERROR, &g_baud_setting); + (*p_sci_uart_baud_calculate)(curr_uart_baud, WIFI_ONCHIP_DA16XXX_DEFAULT_MODULATION, + WIFI_ONCHIP_DA16XXX_DEFAULT_ERROR, &g_baud_setting); uart0_cfg_extended.p_baud_setting = &g_baud_setting; - uart0_cfg_extended.flow_control = RM_WIFI_ONCHIP_DA16200_SCI_UART_FLOW_CONTROL_RTS; - uart0_cfg_extended.flow_control_pin = (bsp_io_port_pin_t) WIFI_ONCHIP_DA16200_BSP_PIN_PORT_INVALID; + uart0_cfg_extended.flow_control = RM_WIFI_ONCHIP_DA16XXX_SCI_UART_FLOW_CONTROL_RTS; + uart0_cfg_extended.flow_control_pin = (bsp_io_port_pin_t) WIFI_ONCHIP_DA16XXX_BSP_PIN_PORT_INVALID; uart0_cfg.p_extend = (void *) &uart0_cfg_extended; - uart0_cfg.p_callback = rm_wifi_onchip_da16200_uart_callback; + uart0_cfg.p_callback = rm_wifi_onchip_da16xxx_uart_callback; /* Open UART */ - p_uart = p_instance_ctrl->uart_instance_objects[WIFI_ONCHIP_DA16200_UART_INITIAL_PORT]; + p_uart = p_instance_ctrl->uart_instance_objects[WIFI_ONCHIP_DA16XXX_UART_INITIAL_PORT]; err = p_uart->p_api->open(p_uart->p_ctrl, &uart0_cfg); if (FSP_SUCCESS != err) { - rm_wifi_onchip_da16200_cleanup_open(p_instance_ctrl); + rm_wifi_onchip_da16xxx_cleanup_open(p_instance_ctrl); } FSP_ERROR_RETURN(FSP_SUCCESS == err, FSP_ERR_WIFI_INIT_FAILED); /* Delay after open */ - vTaskDelay(pdMS_TO_TICKS(WIFI_ONCHIP_DA16200_TIMEOUT_10MS)); + vTaskDelay(pdMS_TO_TICKS(WIFI_ONCHIP_DA16XXX_TIMEOUT_10MS)); /* Test basic communications with an AT command. */ - err = rm_wifi_onchip_da16200_send_basic(p_instance_ctrl, + err = rm_wifi_onchip_da16xxx_send_basic(p_instance_ctrl, p_instance_ctrl->curr_cmd_port, "ATZ\r", 0, - WIFI_ONCHIP_DA16200_TIMEOUT_20MS, - WIFI_ONCHIP_DA16200_DELAY_20MS, - WIFI_ONCHIP_DA16200_RETURN_TEXT_OK); + WIFI_ONCHIP_DA16XXX_TIMEOUT_20MS, + WIFI_ONCHIP_DA16XXX_DELAY_20MS, + WIFI_ONCHIP_DA16XXX_RETURN_TEXT_OK); if (FSP_SUCCESS != err) { - vTaskDelay(pdMS_TO_TICKS(WIFI_ONCHIP_DA16200_TIMEOUT_10MS)); + vTaskDelay(pdMS_TO_TICKS(WIFI_ONCHIP_DA16XXX_TIMEOUT_10MS)); /* Test basic communications with an AT command. */ - err = rm_wifi_onchip_da16200_send_basic(p_instance_ctrl, + err = rm_wifi_onchip_da16xxx_send_basic(p_instance_ctrl, p_instance_ctrl->curr_cmd_port, "ATZ\r", 0, - WIFI_ONCHIP_DA16200_TIMEOUT_20MS, - WIFI_ONCHIP_DA16200_DELAY_20MS, - WIFI_ONCHIP_DA16200_RETURN_TEXT_OK); + WIFI_ONCHIP_DA16XXX_TIMEOUT_20MS, + WIFI_ONCHIP_DA16XXX_DELAY_20MS, + WIFI_ONCHIP_DA16XXX_RETURN_TEXT_OK); if (FSP_SUCCESS != err) { /* Close the UART port */ - err = p_instance_ctrl->uart_instance_objects[WIFI_ONCHIP_DA16200_UART_INITIAL_PORT]->p_api->close( - p_instance_ctrl->uart_instance_objects[WIFI_ONCHIP_DA16200_UART_INITIAL_PORT]->p_ctrl); + err = p_instance_ctrl->uart_instance_objects[WIFI_ONCHIP_DA16XXX_UART_INITIAL_PORT]->p_api->close( + p_instance_ctrl->uart_instance_objects[WIFI_ONCHIP_DA16XXX_UART_INITIAL_PORT]->p_ctrl); if (FSP_SUCCESS != err) { - rm_wifi_onchip_da16200_cleanup_open(p_instance_ctrl); + rm_wifi_onchip_da16xxx_cleanup_open(p_instance_ctrl); FSP_ERROR_RETURN(FSP_SUCCESS == err, FSP_ERR_WIFI_INIT_FAILED); } /* Delay after close */ - vTaskDelay(pdMS_TO_TICKS(WIFI_ONCHIP_DA16200_TIMEOUT_10MS)); + vTaskDelay(pdMS_TO_TICKS(WIFI_ONCHIP_DA16XXX_TIMEOUT_10MS)); } else { @@ -461,73 +463,73 @@ fsp_err_t rm_wifi_onchip_da16200_open (wifi_onchip_da16200_cfg_t const * const p FSP_ERROR_RETURN(UART_BAUD_MAX_CNT != (index), FSP_ERR_WIFI_FAILED); /* Update the module baud rate in case if it doesn't match with user configured baud rate */ - if (curr_uart_baud != (uint32_t) strtol((char *) g_wifi_onchip_da16200_uart_cmd_baud, NULL, 10)) + if (curr_uart_baud != (uint32_t) strtol((char *) g_wifi_onchip_da16xxx_uart_cmd_baud, NULL, 10)) { strncpy((char *) p_temp_buff, "ATB=", 5); - strncat((char *) p_temp_buff, g_wifi_onchip_da16200_uart_cmd_baud, 10); + strncat((char *) p_temp_buff, g_wifi_onchip_da16xxx_uart_cmd_baud, 10); strncat((char *) p_temp_buff, "\r", 3); /* Send UART Baud rate reconfiguration AT command to wifi module */ - err = rm_wifi_onchip_da16200_send_basic(p_instance_ctrl, + err = rm_wifi_onchip_da16xxx_send_basic(p_instance_ctrl, p_instance_ctrl->curr_cmd_port, (char *) p_temp_buff, 0, - WIFI_ONCHIP_DA16200_TIMEOUT_20MS, - WIFI_ONCHIP_DA16200_DELAY_20MS, - WIFI_ONCHIP_DA16200_RETURN_TEXT_OK); + WIFI_ONCHIP_DA16XXX_TIMEOUT_20MS, + WIFI_ONCHIP_DA16XXX_DELAY_20MS, + WIFI_ONCHIP_DA16XXX_RETURN_TEXT_OK); if (FSP_SUCCESS != err) { - rm_wifi_onchip_da16200_cleanup_open(p_instance_ctrl); + rm_wifi_onchip_da16xxx_cleanup_open(p_instance_ctrl); } FSP_ERROR_RETURN(FSP_SUCCESS == err, FSP_ERR_WIFI_INIT_FAILED); } /* Close the UART port */ - err = p_instance_ctrl->uart_instance_objects[WIFI_ONCHIP_DA16200_UART_INITIAL_PORT]->p_api->close( - p_instance_ctrl->uart_instance_objects[WIFI_ONCHIP_DA16200_UART_INITIAL_PORT]->p_ctrl); + err = p_instance_ctrl->uart_instance_objects[WIFI_ONCHIP_DA16XXX_UART_INITIAL_PORT]->p_api->close( + p_instance_ctrl->uart_instance_objects[WIFI_ONCHIP_DA16XXX_UART_INITIAL_PORT]->p_ctrl); if (FSP_SUCCESS != err) { - rm_wifi_onchip_da16200_cleanup_open(p_instance_ctrl); + rm_wifi_onchip_da16xxx_cleanup_open(p_instance_ctrl); FSP_ERROR_RETURN(FSP_SUCCESS == err, FSP_ERR_WIFI_INIT_FAILED); } /* Delay after close */ - vTaskDelay(pdMS_TO_TICKS(WIFI_ONCHIP_DA16200_TIMEOUT_10MS)); + vTaskDelay(pdMS_TO_TICKS(WIFI_ONCHIP_DA16XXX_TIMEOUT_10MS)); /* Open uart port with config values from the configurator */ - p_uart = p_instance_ctrl->uart_instance_objects[WIFI_ONCHIP_DA16200_UART_INITIAL_PORT]; + p_uart = p_instance_ctrl->uart_instance_objects[WIFI_ONCHIP_DA16XXX_UART_INITIAL_PORT]; err = p_uart->p_api->open(p_uart->p_ctrl, p_uart->p_cfg); if (FSP_SUCCESS != err) { - rm_wifi_onchip_da16200_cleanup_open(p_instance_ctrl); + rm_wifi_onchip_da16xxx_cleanup_open(p_instance_ctrl); } FSP_ERROR_RETURN(FSP_SUCCESS == err, FSP_ERR_WIFI_INIT_FAILED); /* Delay after open */ - vTaskDelay(pdMS_TO_TICKS(WIFI_ONCHIP_DA16200_TIMEOUT_100MS)); + vTaskDelay(pdMS_TO_TICKS(WIFI_ONCHIP_DA16XXX_TIMEOUT_100MS)); /* Test basic communications with an AT command. */ - err = rm_wifi_onchip_da16200_send_basic(p_instance_ctrl, + err = rm_wifi_onchip_da16xxx_send_basic(p_instance_ctrl, p_instance_ctrl->curr_cmd_port, "ATZ\r", 0, - WIFI_ONCHIP_DA16200_TIMEOUT_500MS, - WIFI_ONCHIP_DA16200_DELAY_20MS, - WIFI_ONCHIP_DA16200_RETURN_TEXT_OK); + WIFI_ONCHIP_DA16XXX_TIMEOUT_500MS, + WIFI_ONCHIP_DA16XXX_DELAY_20MS, + WIFI_ONCHIP_DA16XXX_RETURN_TEXT_OK); FSP_ERROR_RETURN(FSP_SUCCESS == err, FSP_ERR_WIFI_INIT_FAILED); /* Set AP mode */ - err = rm_wifi_onchip_da16200_send_basic(p_instance_ctrl, + err = rm_wifi_onchip_da16xxx_send_basic(p_instance_ctrl, p_instance_ctrl->curr_cmd_port, "AT+WFMODE=0\r", 0, - WIFI_ONCHIP_DA16200_TIMEOUT_500MS, - WIFI_ONCHIP_DA16200_DELAY_20MS, - WIFI_ONCHIP_DA16200_RETURN_TEXT_OK); + WIFI_ONCHIP_DA16XXX_TIMEOUT_500MS, + WIFI_ONCHIP_DA16XXX_DELAY_20MS, + WIFI_ONCHIP_DA16XXX_RETURN_TEXT_OK); FSP_ERROR_RETURN(FSP_SUCCESS == err, FSP_ERR_WIFI_INIT_FAILED); @@ -537,23 +539,23 @@ fsp_err_t rm_wifi_onchip_da16200_open (wifi_onchip_da16200_cfg_t const * const p "AT+WFCC=%s\r", p_cfg->country_code); - err = rm_wifi_onchip_da16200_send_basic(p_instance_ctrl, + err = rm_wifi_onchip_da16xxx_send_basic(p_instance_ctrl, p_instance_ctrl->curr_cmd_port, (char *) p_instance_ctrl->cmd_tx_buff, 0, - WIFI_ONCHIP_DA16200_TIMEOUT_500MS, - WIFI_ONCHIP_DA16200_DELAY_20MS, - WIFI_ONCHIP_DA16200_RETURN_TEXT_OK); + WIFI_ONCHIP_DA16XXX_TIMEOUT_500MS, + WIFI_ONCHIP_DA16XXX_DELAY_20MS, + WIFI_ONCHIP_DA16XXX_RETURN_TEXT_OK); FSP_ERROR_RETURN(FSP_SUCCESS == err, FSP_ERR_WIFI_INIT_FAILED); -#if (1 == WIFI_ONCHIP_DA16200_CFG_SNTP_ENABLE) +#if (1 == WIFI_ONCHIP_DA16XXX_CFG_SNTP_ENABLE) p_instance_ctrl->open = WIFI_OPEN; // Allows interface calls to complete for SNTP init. - err = rm_wifi_onchip_da16200_sntp_service_init(p_instance_ctrl); + err = rm_wifi_onchip_da16xxx_sntp_service_init(p_instance_ctrl); p_instance_ctrl->open = 0; if (FSP_SUCCESS != err) { - rm_wifi_onchip_da16200_cleanup_open(p_instance_ctrl); + rm_wifi_onchip_da16xxx_cleanup_open(p_instance_ctrl); } FSP_ERROR_RETURN(FSP_SUCCESS == err, FSP_ERR_WIFI_INIT_FAILED); #endif @@ -565,42 +567,42 @@ fsp_err_t rm_wifi_onchip_da16200_open (wifi_onchip_da16200_cfg_t const * const p } /*******************************************************************************************************************//** - * Disables WIFI_ONCHIP_DA16200. + * Disables WIFI_ONCHIP_DA16XXX. * - * @retval FSP_SUCCESS WIFI_ONCHIP_DA16200 closed successfully. + * @retval FSP_SUCCESS WIFI_ONCHIP_DA16XXX closed successfully. * @retval FSP_ERR_ASSERTION The parameter p_instance_ctrl is NULL. * @retval FSP_ERR_WIFI_FAILED Error occurred with command to Wifi module. * @retval FSP_ERR_NOT_OPEN Module is not open. **********************************************************************************************************************/ -fsp_err_t rm_wifi_onchip_da16200_close (void) +fsp_err_t rm_wifi_onchip_da16xxx_close (void) { uint32_t mutex_flag; fsp_err_t err = FSP_SUCCESS; - wifi_onchip_da16200_instance_ctrl_t * p_instance_ctrl = &g_rm_wifi_onchip_da16200_instance; + wifi_onchip_da16xxx_instance_ctrl_t * p_instance_ctrl = &g_rm_wifi_onchip_da16xxx_instance; -#if (WIFI_ONCHIP_DA16200_CFG_PARAM_CHECKING_ENABLED == 1) +#if (WIFI_ONCHIP_DA16XXX_CFG_PARAM_CHECKING_ENABLED == 1) FSP_ERROR_RETURN(WIFI_OPEN == p_instance_ctrl->open, FSP_ERR_NOT_OPEN); #endif /* Take mutexes */ - mutex_flag = (WIFI_ONCHIP_DA16200_MUTEX_TX | WIFI_ONCHIP_DA16200_MUTEX_RX); - FSP_ERROR_RETURN(pdTRUE == rm_wifi_onchip_da16200_send_basic_take_mutex(p_instance_ctrl, mutex_flag), + mutex_flag = (WIFI_ONCHIP_DA16XXX_MUTEX_TX | WIFI_ONCHIP_DA16XXX_MUTEX_RX); + FSP_ERROR_RETURN(pdTRUE == rm_wifi_onchip_da16xxx_send_basic_take_mutex(p_instance_ctrl, mutex_flag), FSP_ERR_WIFI_FAILED); /* Tell wifi module to disconnect from the current AP */ - err = rm_wifi_onchip_da16200_send_basic(p_instance_ctrl, + err = rm_wifi_onchip_da16xxx_send_basic(p_instance_ctrl, p_instance_ctrl->curr_cmd_port, "AT+WFQAP\r", 0, - WIFI_ONCHIP_DA16200_TIMEOUT_20MS, - WIFI_ONCHIP_DA16200_DELAY_50MS, - WIFI_ONCHIP_DA16200_RETURN_TEXT_OK); + WIFI_ONCHIP_DA16XXX_TIMEOUT_20MS, + WIFI_ONCHIP_DA16XXX_DELAY_50MS, + WIFI_ONCHIP_DA16XXX_RETURN_TEXT_OK); - rm_wifi_onchip_da16200_send_basic_give_mutex(p_instance_ctrl, mutex_flag); + rm_wifi_onchip_da16xxx_send_basic_give_mutex(p_instance_ctrl, mutex_flag); p_instance_ctrl->open = 0; - rm_wifi_onchip_da16200_cleanup_open(p_instance_ctrl); + rm_wifi_onchip_da16xxx_cleanup_open(p_instance_ctrl); return err; } @@ -608,34 +610,34 @@ fsp_err_t rm_wifi_onchip_da16200_close (void) /*******************************************************************************************************************//** * Disconnects from connected AP. * - * @retval FSP_SUCCESS WIFI_ONCHIP_DA16200 disconnected successfully. + * @retval FSP_SUCCESS WIFI_ONCHIP_DA16XXX disconnected successfully. * @retval FSP_ERR_ASSERTION The parameter p_instance_ctrl is NULL. * @retval FSP_ERR_WIFI_FAILED Error occurred with command to Wifi module. * @retval FSP_ERR_NOT_OPEN Module is not open. **********************************************************************************************************************/ -fsp_err_t rm_wifi_onchip_da16200_disconnect (void) +fsp_err_t rm_wifi_onchip_da16xxx_disconnect (void) { fsp_err_t err = FSP_SUCCESS; uint32_t mutex_flag; - wifi_onchip_da16200_instance_ctrl_t * p_instance_ctrl = &g_rm_wifi_onchip_da16200_instance; + wifi_onchip_da16xxx_instance_ctrl_t * p_instance_ctrl = &g_rm_wifi_onchip_da16xxx_instance; -#if (WIFI_ONCHIP_DA16200_CFG_PARAM_CHECKING_ENABLED == 1) +#if (WIFI_ONCHIP_DA16XXX_CFG_PARAM_CHECKING_ENABLED == 1) FSP_ERROR_RETURN(WIFI_OPEN == p_instance_ctrl->open, FSP_ERR_NOT_OPEN); #endif /* Take mutexes */ - mutex_flag = (WIFI_ONCHIP_DA16200_MUTEX_TX | WIFI_ONCHIP_DA16200_MUTEX_RX); - FSP_ERROR_RETURN(pdTRUE == rm_wifi_onchip_da16200_send_basic_take_mutex(p_instance_ctrl, mutex_flag), + mutex_flag = (WIFI_ONCHIP_DA16XXX_MUTEX_TX | WIFI_ONCHIP_DA16XXX_MUTEX_RX); + FSP_ERROR_RETURN(pdTRUE == rm_wifi_onchip_da16xxx_send_basic_take_mutex(p_instance_ctrl, mutex_flag), FSP_ERR_WIFI_FAILED); /* Tell wifi module to disconnect from the current AP */ - err = rm_wifi_onchip_da16200_send_basic(p_instance_ctrl, + err = rm_wifi_onchip_da16xxx_send_basic(p_instance_ctrl, p_instance_ctrl->curr_cmd_port, "AT+WFQAP\r", 0, - WIFI_ONCHIP_DA16200_TIMEOUT_3SEC, - WIFI_ONCHIP_DA16200_DELAY_500MS, - WIFI_ONCHIP_DA16200_RETURN_TEXT_OK); + WIFI_ONCHIP_DA16XXX_TIMEOUT_3SEC, + WIFI_ONCHIP_DA16XXX_DELAY_500MS, + WIFI_ONCHIP_DA16XXX_RETURN_TEXT_OK); if (FSP_SUCCESS == err) { memset(p_instance_ctrl->curr_ipaddr, 0, 4); @@ -643,13 +645,13 @@ fsp_err_t rm_wifi_onchip_da16200_disconnect (void) memset(p_instance_ctrl->curr_gateway, 0, 4); } - rm_wifi_onchip_da16200_send_basic_give_mutex(p_instance_ctrl, mutex_flag); + rm_wifi_onchip_da16xxx_send_basic_give_mutex(p_instance_ctrl, mutex_flag); return err; } /*******************************************************************************************************************//** - * Check if DA16200 module is connected to an Access point. + * Check if DA16XXX module is connected to an Access point. * * @param[out] p_status Pointer to integer holding the socket connection status. * @@ -657,11 +659,11 @@ fsp_err_t rm_wifi_onchip_da16200_disconnect (void) * @retval FSP_ERR_WIFI_AP_NOT_CONNECTED WiFi module is not connected to access point. * @retval FSP_ERR_NOT_OPEN The instance has not been opened. **********************************************************************************************************************/ -fsp_err_t rm_wifi_onchip_da16200_connected (fsp_err_t * p_status) +fsp_err_t rm_wifi_onchip_da16xxx_connected (fsp_err_t * p_status) { - wifi_onchip_da16200_instance_ctrl_t * p_instance_ctrl = &g_rm_wifi_onchip_da16200_instance; + wifi_onchip_da16xxx_instance_ctrl_t * p_instance_ctrl = &g_rm_wifi_onchip_da16xxx_instance; -#if (WIFI_ONCHIP_DA16200_CFG_PARAM_CHECKING_ENABLED == 1) +#if (WIFI_ONCHIP_DA16XXX_CFG_PARAM_CHECKING_ENABLED == 1) FSP_ASSERT(NULL != p_status); FSP_ERROR_RETURN(WIFI_OPEN == p_instance_ctrl->open, FSP_ERR_NOT_OPEN); #endif @@ -691,11 +693,11 @@ fsp_err_t rm_wifi_onchip_da16200_connected (fsp_err_t * p_status) * @retval FSP_ERR_NOT_OPEN The instance has not been opened. * @retval FSP_ERR_WIFI_AP_NOT_CONNECTED No connection to access point has happened. **********************************************************************************************************************/ -fsp_err_t rm_wifi_onchip_da16200_network_info_get (uint32_t * p_ip_addr, uint32_t * p_subnet_mask, uint32_t * p_gateway) +fsp_err_t rm_wifi_onchip_da16xxx_network_info_get (uint32_t * p_ip_addr, uint32_t * p_subnet_mask, uint32_t * p_gateway) { - wifi_onchip_da16200_instance_ctrl_t * p_instance_ctrl = &g_rm_wifi_onchip_da16200_instance; + wifi_onchip_da16xxx_instance_ctrl_t * p_instance_ctrl = &g_rm_wifi_onchip_da16xxx_instance; -#if (WIFI_ONCHIP_DA16200_CFG_PARAM_CHECKING_ENABLED == 1) +#if (WIFI_ONCHIP_DA16XXX_CFG_PARAM_CHECKING_ENABLED == 1) FSP_ASSERT(NULL != p_ip_addr); FSP_ASSERT(NULL != p_subnet_mask); FSP_ASSERT(NULL != p_gateway); @@ -730,7 +732,7 @@ fsp_err_t rm_wifi_onchip_da16200_network_info_get (uint32_t * p_ip_addr, uint32_ * @retval FSP_ERR_NOT_OPEN The instance has not been opened. * @retval FSP_ERR_INVALID_ARGUMENT No commas are accepted in the SSID or Passphrase. **********************************************************************************************************************/ -fsp_err_t rm_wifi_onchip_da16200_connect (const char * p_ssid, +fsp_err_t rm_wifi_onchip_da16xxx_connect (const char * p_ssid, WIFISecurity_t security, const char * p_passphrase, uint8_t enc_type) @@ -743,10 +745,10 @@ fsp_err_t rm_wifi_onchip_da16200_connect (const char * p_ssid, int subnetmask[4] = {0, 0, 0, 0}; int gateway[4] = {0, 0, 0, 0}; - wifi_onchip_da16200_instance_ctrl_t * p_instance_ctrl = &g_rm_wifi_onchip_da16200_instance; + wifi_onchip_da16xxx_instance_ctrl_t * p_instance_ctrl = &g_rm_wifi_onchip_da16xxx_instance; char * ptr = (char *) (p_instance_ctrl->cmd_rx_buff); -#if (WIFI_ONCHIP_DA16200_CFG_PARAM_CHECKING_ENABLED == 1) +#if (WIFI_ONCHIP_DA16XXX_CFG_PARAM_CHECKING_ENABLED == 1) FSP_ASSERT(NULL != p_ssid); FSP_ASSERT(NULL != p_passphrase); FSP_ERROR_RETURN(WIFI_OPEN == p_instance_ctrl->open, FSP_ERR_NOT_OPEN); @@ -755,16 +757,16 @@ fsp_err_t rm_wifi_onchip_da16200_connect (const char * p_ssid, /* Commas are not accepted by the WiFi module in the SSID or Passphrase */ FSP_ERROR_RETURN((NULL == strchr(p_ssid, ',') && NULL == strchr(p_passphrase, ',')), FSP_ERR_INVALID_ARGUMENT); - mutex_flag = (WIFI_ONCHIP_DA16200_MUTEX_TX | WIFI_ONCHIP_DA16200_MUTEX_RX); - FSP_ERROR_RETURN(pdTRUE == rm_wifi_onchip_da16200_send_basic_take_mutex(p_instance_ctrl, mutex_flag), + mutex_flag = (WIFI_ONCHIP_DA16XXX_MUTEX_TX | WIFI_ONCHIP_DA16XXX_MUTEX_RX); + FSP_ERROR_RETURN(pdTRUE == rm_wifi_onchip_da16xxx_send_basic_take_mutex(p_instance_ctrl, mutex_flag), FSP_ERR_WIFI_FAILED); - rm_wifi_onchip_da16200_connected(&status); + rm_wifi_onchip_da16xxx_connected(&status); if (FSP_SUCCESS == status) { /* If Wifi is already connected, do nothing and return fail. */ - rm_wifi_onchip_da16200_send_basic_give_mutex(p_instance_ctrl, mutex_flag); + rm_wifi_onchip_da16xxx_send_basic_give_mutex(p_instance_ctrl, mutex_flag); return FSP_ERR_WIFI_FAILED; } @@ -796,19 +798,19 @@ fsp_err_t rm_wifi_onchip_da16200_connect (const char * p_ssid, switch (enc_type) { - case WIFI_ONCHIP_DA16200_TKIP_ENC_TYPE: + case WIFI_ONCHIP_DA16XXX_TKIP_ENC_TYPE: { strncat((char *) p_instance_ctrl->cmd_tx_buff, "0,", 3); break; } - case WIFI_ONCHIP_DA16200_AES_ENC_TYPE: + case WIFI_ONCHIP_DA16XXX_AES_ENC_TYPE: { strncat((char *) p_instance_ctrl->cmd_tx_buff, "1,", 3); break; } - case WIFI_ONCHIP_DA16200_TKIP_AES_ENC_TYPE: + case WIFI_ONCHIP_DA16XXX_TKIP_AES_ENC_TYPE: { strncat((char *) p_instance_ctrl->cmd_tx_buff, "2,", 3); break; @@ -824,7 +826,7 @@ fsp_err_t rm_wifi_onchip_da16200_connect (const char * p_ssid, else { /* Return with error for unsupported secuirty types */ - rm_wifi_onchip_da16200_send_basic_give_mutex(p_instance_ctrl, mutex_flag); + rm_wifi_onchip_da16xxx_send_basic_give_mutex(p_instance_ctrl, mutex_flag); return FSP_ERR_WIFI_FAILED; } @@ -832,15 +834,15 @@ fsp_err_t rm_wifi_onchip_da16200_connect (const char * p_ssid, strncat((char *) p_instance_ctrl->cmd_tx_buff, p_passphrase, wificonfigMAX_PASSPHRASE_LEN); strncat((char *) p_instance_ctrl->cmd_tx_buff, "\r", 2); - ret = rm_wifi_onchip_da16200_send_basic(p_instance_ctrl, + ret = rm_wifi_onchip_da16xxx_send_basic(p_instance_ctrl, p_instance_ctrl->curr_cmd_port, (char *) p_instance_ctrl->cmd_tx_buff, 0, - WIFI_ONCHIP_DA16200_TIMEOUT_5SEC, - WIFI_ONCHIP_DA16200_DELAY_500MS, - WIFI_ONCHIP_DA16200_RETURN_CONN_TEXT); + WIFI_ONCHIP_DA16XXX_TIMEOUT_5SEC, + WIFI_ONCHIP_DA16XXX_DELAY_500MS, + WIFI_ONCHIP_DA16XXX_RETURN_CONN_TEXT); - rm_wifi_onchip_da16200_send_basic_give_mutex(p_instance_ctrl, mutex_flag); + rm_wifi_onchip_da16xxx_send_basic_give_mutex(p_instance_ctrl, mutex_flag); if (FSP_SUCCESS == ret) { @@ -848,46 +850,46 @@ fsp_err_t rm_wifi_onchip_da16200_connect (const char * p_ssid, ptr = strstr(ptr, "ERROR:"); if (NULL != ptr) { - ret = rm_wifi_onchip_da16200_error_lookup(ptr); + ret = rm_wifi_onchip_da16xxx_error_lookup(ptr); } else { /* Parsing the response */ - rm_wifi_onchip_da16200_send_basic_take_mutex(p_instance_ctrl, mutex_flag); + rm_wifi_onchip_da16xxx_send_basic_take_mutex(p_instance_ctrl, mutex_flag); /* Enable DHCP */ - ret = rm_wifi_onchip_da16200_send_basic(p_instance_ctrl, + ret = rm_wifi_onchip_da16xxx_send_basic(p_instance_ctrl, p_instance_ctrl->curr_cmd_port, "AT+NWDHC=1\r", 0, - WIFI_ONCHIP_DA16200_TIMEOUT_200MS, - WIFI_ONCHIP_DA16200_DELAY_500MS, - WIFI_ONCHIP_DA16200_RETURN_TEXT_OK); + WIFI_ONCHIP_DA16XXX_TIMEOUT_200MS, + WIFI_ONCHIP_DA16XXX_DELAY_500MS, + WIFI_ONCHIP_DA16XXX_RETURN_TEXT_OK); - rm_wifi_onchip_da16200_send_basic_give_mutex(p_instance_ctrl, mutex_flag); + rm_wifi_onchip_da16xxx_send_basic_give_mutex(p_instance_ctrl, mutex_flag); FSP_ERROR_RETURN(FSP_SUCCESS == ret, FSP_ERR_WIFI_FAILED); ptr = (char *) (p_instance_ctrl->cmd_rx_buff); - R_BSP_SoftwareDelay(WIFI_ONCHIP_DA16200_TIMEOUT_3SEC, BSP_DELAY_UNITS_MILLISECONDS); + R_BSP_SoftwareDelay(WIFI_ONCHIP_DA16XXX_TIMEOUT_3SEC, BSP_DELAY_UNITS_MILLISECONDS); /* Call to get IP address does not always work the first time */ - for (int index = 0; index < WIFI_ONCHIP_DA16200_CFG_MAX_RETRIES_UART_COMMS; index++) + for (int index = 0; index < WIFI_ONCHIP_DA16XXX_CFG_MAX_RETRIES_UART_COMMS; index++) { - FSP_ERROR_RETURN(pdTRUE == rm_wifi_onchip_da16200_send_basic_take_mutex(p_instance_ctrl, mutex_flag), + FSP_ERROR_RETURN(pdTRUE == rm_wifi_onchip_da16xxx_send_basic_take_mutex(p_instance_ctrl, mutex_flag), FSP_ERR_WIFI_FAILED); /* Query the IP address from the current AP */ - ret = rm_wifi_onchip_da16200_send_basic(p_instance_ctrl, + ret = rm_wifi_onchip_da16xxx_send_basic(p_instance_ctrl, p_instance_ctrl->curr_cmd_port, "AT+NWIP=?\r", 0, - WIFI_ONCHIP_DA16200_TIMEOUT_5SEC, - WIFI_ONCHIP_DA16200_DELAY_200MS, - WIFI_ONCHIP_DA16200_RETURN_TEXT_OK); + WIFI_ONCHIP_DA16XXX_TIMEOUT_5SEC, + WIFI_ONCHIP_DA16XXX_DELAY_200MS, + WIFI_ONCHIP_DA16XXX_RETURN_TEXT_OK); - rm_wifi_onchip_da16200_send_basic_give_mutex(p_instance_ctrl, mutex_flag); + rm_wifi_onchip_da16xxx_send_basic_give_mutex(p_instance_ctrl, mutex_flag); FSP_ERROR_RETURN(FSP_SUCCESS == ret, FSP_ERR_WIFI_FAILED); @@ -895,7 +897,7 @@ fsp_err_t rm_wifi_onchip_da16200_connect (const char * p_ssid, ptr = strstr(ptr, "+NWIP:"); if (ptr == NULL) { - R_BSP_SoftwareDelay(WIFI_ONCHIP_DA16200_TIMEOUT_3SEC, BSP_DELAY_UNITS_MILLISECONDS); + R_BSP_SoftwareDelay(WIFI_ONCHIP_DA16XXX_TIMEOUT_3SEC, BSP_DELAY_UNITS_MILLISECONDS); } else { @@ -946,35 +948,35 @@ fsp_err_t rm_wifi_onchip_da16200_connect (const char * p_ssid, * @retval FSP_ERR_ASSERTION The parameter p_macaddr is NULL. * @retval FSP_ERR_NOT_OPEN The instance has not been opened. **********************************************************************************************************************/ -fsp_err_t rm_wifi_onchip_da16200_mac_addr_get (uint8_t * p_macaddr) +fsp_err_t rm_wifi_onchip_da16xxx_mac_addr_get (uint8_t * p_macaddr) { fsp_err_t ret; int32_t err; unsigned int macaddr[6]; uint32_t mutex_flag; - wifi_onchip_da16200_instance_ctrl_t * p_instance_ctrl = &g_rm_wifi_onchip_da16200_instance; + wifi_onchip_da16xxx_instance_ctrl_t * p_instance_ctrl = &g_rm_wifi_onchip_da16xxx_instance; char * ptr = (char *) (p_instance_ctrl->cmd_rx_buff); -#if (WIFI_ONCHIP_DA16200_CFG_PARAM_CHECKING_ENABLED == 1) +#if (WIFI_ONCHIP_DA16XXX_CFG_PARAM_CHECKING_ENABLED == 1) FSP_ASSERT(NULL != p_macaddr); FSP_ERROR_RETURN(WIFI_OPEN == p_instance_ctrl->open, FSP_ERR_NOT_OPEN); #endif memset((char *) p_instance_ctrl->cmd_rx_buff, 0, sizeof(p_instance_ctrl->cmd_rx_buff)); - mutex_flag = (WIFI_ONCHIP_DA16200_MUTEX_TX | WIFI_ONCHIP_DA16200_MUTEX_RX); - FSP_ERROR_RETURN(pdTRUE == rm_wifi_onchip_da16200_send_basic_take_mutex(p_instance_ctrl, mutex_flag), + mutex_flag = (WIFI_ONCHIP_DA16XXX_MUTEX_TX | WIFI_ONCHIP_DA16XXX_MUTEX_RX); + FSP_ERROR_RETURN(pdTRUE == rm_wifi_onchip_da16xxx_send_basic_take_mutex(p_instance_ctrl, mutex_flag), FSP_ERR_WIFI_FAILED); - ret = rm_wifi_onchip_da16200_send_basic(p_instance_ctrl, + ret = rm_wifi_onchip_da16xxx_send_basic(p_instance_ctrl, p_instance_ctrl->curr_cmd_port, "AT+WFMAC=?\r", 0, - WIFI_ONCHIP_DA16200_TIMEOUT_400MS, - WIFI_ONCHIP_DA16200_DELAY_200MS, - WIFI_ONCHIP_DA16200_RETURN_TEXT_OK); + WIFI_ONCHIP_DA16XXX_TIMEOUT_400MS, + WIFI_ONCHIP_DA16XXX_DELAY_200MS, + WIFI_ONCHIP_DA16XXX_RETURN_TEXT_OK); - rm_wifi_onchip_da16200_send_basic_give_mutex(p_instance_ctrl, mutex_flag); + rm_wifi_onchip_da16xxx_send_basic_give_mutex(p_instance_ctrl, mutex_flag); FSP_ERROR_RETURN(FSP_SUCCESS == ret, FSP_ERR_WIFI_FAILED); @@ -1023,7 +1025,7 @@ fsp_err_t rm_wifi_onchip_da16200_mac_addr_get (uint8_t * p_macaddr) * @retval FSP_ERR_NOT_OPEN The instance has not been opened. * @retval FSP_ERR_WIFI_SCAN_COMPLETE Wifi scan has completed. **********************************************************************************************************************/ -fsp_err_t rm_wifi_onchip_da16200_scan (WIFIScanResult_t * p_results, uint32_t maxNetworks) +fsp_err_t rm_wifi_onchip_da16xxx_scan (WIFIScanResult_t * p_results, uint32_t maxNetworks) { fsp_err_t ret = FSP_ERR_INTERNAL; int32_t err; @@ -1031,9 +1033,9 @@ fsp_err_t rm_wifi_onchip_da16200_scan (WIFIScanResult_t * p_results, uint32_t ma uint8_t * bssid; uint32_t mutex_flag; - wifi_onchip_da16200_instance_ctrl_t * p_instance_ctrl = &g_rm_wifi_onchip_da16200_instance; + wifi_onchip_da16xxx_instance_ctrl_t * p_instance_ctrl = &g_rm_wifi_onchip_da16xxx_instance; -#if (WIFI_ONCHIP_DA16200_CFG_PARAM_CHECKING_ENABLED == 1) +#if (WIFI_ONCHIP_DA16XXX_CFG_PARAM_CHECKING_ENABLED == 1) FSP_ASSERT(NULL != p_results); FSP_ERROR_RETURN(WIFI_OPEN == p_instance_ctrl->open, FSP_ERR_NOT_OPEN); #endif @@ -1044,19 +1046,19 @@ fsp_err_t rm_wifi_onchip_da16200_scan (WIFIScanResult_t * p_results, uint32_t ma memset((char *) p_instance_ctrl->cmd_rx_buff, 0, sizeof(p_instance_ctrl->cmd_rx_buff)); - mutex_flag = (WIFI_ONCHIP_DA16200_MUTEX_TX | WIFI_ONCHIP_DA16200_MUTEX_RX); - FSP_ERROR_RETURN(pdTRUE == rm_wifi_onchip_da16200_send_basic_take_mutex(p_instance_ctrl, mutex_flag), + mutex_flag = (WIFI_ONCHIP_DA16XXX_MUTEX_TX | WIFI_ONCHIP_DA16XXX_MUTEX_RX); + FSP_ERROR_RETURN(pdTRUE == rm_wifi_onchip_da16xxx_send_basic_take_mutex(p_instance_ctrl, mutex_flag), FSP_ERR_WIFI_FAILED); - ret = rm_wifi_onchip_da16200_send_basic(p_instance_ctrl, + ret = rm_wifi_onchip_da16xxx_send_basic(p_instance_ctrl, p_instance_ctrl->curr_cmd_port, "AT+WFSCAN\r", 0, - WIFI_ONCHIP_DA16200_TIMEOUT_8SEC, - WIFI_ONCHIP_DA16200_DELAY_1000MS, - WIFI_ONCHIP_DA16200_RETURN_TEXT_OK); + WIFI_ONCHIP_DA16XXX_TIMEOUT_8SEC, + WIFI_ONCHIP_DA16XXX_DELAY_1000MS, + WIFI_ONCHIP_DA16XXX_RETURN_TEXT_OK); - rm_wifi_onchip_da16200_send_basic_give_mutex(p_instance_ctrl, mutex_flag); + rm_wifi_onchip_da16xxx_send_basic_give_mutex(p_instance_ctrl, mutex_flag); FSP_ERROR_RETURN(FSP_SUCCESS == ret, FSP_ERR_WIFI_FAILED); @@ -1206,7 +1208,7 @@ fsp_err_t rm_wifi_onchip_da16200_scan (WIFIScanResult_t * p_results, uint32_t ma * @retval FSP_ERR_ASSERTION The parameter p_ip_addr is NULL. * @retval FSP_ERR_NOT_OPEN The instance has not been opened. **********************************************************************************************************************/ -fsp_err_t rm_wifi_onchip_da16200_ping (uint8_t * p_ip_addr, int count, uint32_t interval_ms) +fsp_err_t rm_wifi_onchip_da16xxx_ping (uint8_t * p_ip_addr, int count, uint32_t interval_ms) { FSP_PARAMETER_NOT_USED(interval_ms); fsp_err_t func_ret = FSP_ERR_WIFI_FAILED; @@ -1214,9 +1216,9 @@ fsp_err_t rm_wifi_onchip_da16200_ping (uint8_t * p_ip_addr, int count, uint32_t int sent_cnt = 0; int recv_cnt = 0; - wifi_onchip_da16200_instance_ctrl_t * p_instance_ctrl = &g_rm_wifi_onchip_da16200_instance; + wifi_onchip_da16xxx_instance_ctrl_t * p_instance_ctrl = &g_rm_wifi_onchip_da16xxx_instance; -#if (WIFI_ONCHIP_DA16200_CFG_PARAM_CHECKING_ENABLED == 1) +#if (WIFI_ONCHIP_DA16XXX_CFG_PARAM_CHECKING_ENABLED == 1) FSP_ASSERT(NULL != p_ip_addr); FSP_ERROR_RETURN(0 != count, FSP_ERR_INVALID_ARGUMENT); FSP_ERROR_RETURN(WIFI_OPEN == p_instance_ctrl->open, FSP_ERR_NOT_OPEN); @@ -1225,8 +1227,8 @@ fsp_err_t rm_wifi_onchip_da16200_ping (uint8_t * p_ip_addr, int count, uint32_t memset((char *) p_instance_ctrl->cmd_rx_buff, 0, sizeof(p_instance_ctrl->cmd_rx_buff)); char * ptr = (char *) (p_instance_ctrl->cmd_rx_buff); - mutex_flag = (WIFI_ONCHIP_DA16200_MUTEX_TX | WIFI_ONCHIP_DA16200_MUTEX_RX); - FSP_ERROR_RETURN((pdTRUE == rm_wifi_onchip_da16200_send_basic_take_mutex(p_instance_ctrl, mutex_flag)), + mutex_flag = (WIFI_ONCHIP_DA16XXX_MUTEX_TX | WIFI_ONCHIP_DA16XXX_MUTEX_RX); + FSP_ERROR_RETURN((pdTRUE == rm_wifi_onchip_da16xxx_send_basic_take_mutex(p_instance_ctrl, mutex_flag)), FSP_ERR_WIFI_FAILED); snprintf((char *) p_instance_ctrl->cmd_tx_buff, @@ -1238,15 +1240,15 @@ fsp_err_t rm_wifi_onchip_da16200_ping (uint8_t * p_ip_addr, int count, uint32_t p_ip_addr[3], count); - func_ret = rm_wifi_onchip_da16200_send_basic(p_instance_ctrl, + func_ret = rm_wifi_onchip_da16xxx_send_basic(p_instance_ctrl, p_instance_ctrl->curr_cmd_port, (char *) p_instance_ctrl->cmd_tx_buff, 0, - WIFI_ONCHIP_DA16200_TIMEOUT_2SEC, - WIFI_ONCHIP_DA16200_DELAY_500MS, - WIFI_ONCHIP_DA16200_RETURN_TEXT_OK); + WIFI_ONCHIP_DA16XXX_TIMEOUT_2SEC, + WIFI_ONCHIP_DA16XXX_DELAY_500MS, + WIFI_ONCHIP_DA16XXX_RETURN_TEXT_OK); - rm_wifi_onchip_da16200_send_basic_give_mutex(p_instance_ctrl, mutex_flag); + rm_wifi_onchip_da16xxx_send_basic_give_mutex(p_instance_ctrl, mutex_flag); /* Parsing the response */ ptr = strstr(ptr, "+NWPING:"); @@ -1287,7 +1289,7 @@ fsp_err_t rm_wifi_onchip_da16200_ping (uint8_t * p_ip_addr, int count, uint32_t * @retval FSP_ERR_WIFI_FAILED Error occurred with command to Wifi module. * @retval FSP_ERR_ASSERTION Assertion error occurred. **********************************************************************************************************************/ -fsp_err_t rm_wifi_onchip_da16200_ipaddr_get (uint32_t * p_ip_addr) +fsp_err_t rm_wifi_onchip_da16xxx_ipaddr_get (uint32_t * p_ip_addr) { fsp_err_t err = FSP_SUCCESS; uint32_t mutex_flag; @@ -1297,9 +1299,9 @@ fsp_err_t rm_wifi_onchip_da16200_ipaddr_get (uint32_t * p_ip_addr) int subnetmask[4] = {0, 0, 0, 0}; int gateway[4] = {0, 0, 0, 0}; - wifi_onchip_da16200_instance_ctrl_t * p_instance_ctrl = &g_rm_wifi_onchip_da16200_instance; + wifi_onchip_da16xxx_instance_ctrl_t * p_instance_ctrl = &g_rm_wifi_onchip_da16xxx_instance; -#if (WIFI_ONCHIP_DA16200_CFG_PARAM_CHECKING_ENABLED == 1) +#if (WIFI_ONCHIP_DA16XXX_CFG_PARAM_CHECKING_ENABLED == 1) FSP_ERROR_RETURN(WIFI_OPEN == p_instance_ctrl->open, FSP_ERR_NOT_OPEN); #endif @@ -1307,24 +1309,24 @@ fsp_err_t rm_wifi_onchip_da16200_ipaddr_get (uint32_t * p_ip_addr) memset((char *) p_instance_ctrl->cmd_rx_buff, 0, sizeof(p_instance_ctrl->cmd_rx_buff)); /* Take mutexes */ - mutex_flag = (WIFI_ONCHIP_DA16200_MUTEX_TX | WIFI_ONCHIP_DA16200_MUTEX_RX); + mutex_flag = (WIFI_ONCHIP_DA16XXX_MUTEX_TX | WIFI_ONCHIP_DA16XXX_MUTEX_RX); /* Call to get IP address does not always work the first time */ - for (index = 0; index < WIFI_ONCHIP_DA16200_CFG_MAX_RETRIES_UART_COMMS; index++) + for (index = 0; index < WIFI_ONCHIP_DA16XXX_CFG_MAX_RETRIES_UART_COMMS; index++) { - FSP_ERROR_RETURN(pdTRUE == rm_wifi_onchip_da16200_send_basic_take_mutex(p_instance_ctrl, mutex_flag), + FSP_ERROR_RETURN(pdTRUE == rm_wifi_onchip_da16xxx_send_basic_take_mutex(p_instance_ctrl, mutex_flag), FSP_ERR_WIFI_FAILED); /* Query the IP address from the current AP */ - err = rm_wifi_onchip_da16200_send_basic(p_instance_ctrl, + err = rm_wifi_onchip_da16xxx_send_basic(p_instance_ctrl, p_instance_ctrl->curr_cmd_port, "AT+NWIP=?\r", 0, - WIFI_ONCHIP_DA16200_TIMEOUT_5SEC, - WIFI_ONCHIP_DA16200_DELAY_200MS, - WIFI_ONCHIP_DA16200_RETURN_TEXT_OK); + WIFI_ONCHIP_DA16XXX_TIMEOUT_5SEC, + WIFI_ONCHIP_DA16XXX_DELAY_200MS, + WIFI_ONCHIP_DA16XXX_RETURN_TEXT_OK); - rm_wifi_onchip_da16200_send_basic_give_mutex(p_instance_ctrl, mutex_flag); + rm_wifi_onchip_da16xxx_send_basic_give_mutex(p_instance_ctrl, mutex_flag); FSP_ERROR_RETURN(FSP_SUCCESS == err, FSP_ERR_WIFI_FAILED); @@ -1332,7 +1334,7 @@ fsp_err_t rm_wifi_onchip_da16200_ipaddr_get (uint32_t * p_ip_addr) ptr = strstr(ptr, "+NWIP:"); if (ptr == NULL) { - R_BSP_SoftwareDelay(WIFI_ONCHIP_DA16200_TIMEOUT_3SEC, BSP_DELAY_UNITS_MILLISECONDS); + R_BSP_SoftwareDelay(WIFI_ONCHIP_DA16XXX_TIMEOUT_3SEC, BSP_DELAY_UNITS_MILLISECONDS); } else { @@ -1369,7 +1371,7 @@ fsp_err_t rm_wifi_onchip_da16200_ipaddr_get (uint32_t * p_ip_addr) } } - FSP_ERROR_RETURN(WIFI_ONCHIP_DA16200_CFG_MAX_RETRIES_UART_COMMS != (index), FSP_ERR_WIFI_FAILED); + FSP_ERROR_RETURN(WIFI_ONCHIP_DA16XXX_CFG_MAX_RETRIES_UART_COMMS != (index), FSP_ERR_WIFI_FAILED); return FSP_SUCCESS; } @@ -1386,7 +1388,7 @@ fsp_err_t rm_wifi_onchip_da16200_ipaddr_get (uint32_t * p_ip_addr) * @retval FSP_ERR_NOT_OPEN The instance has not been opened. * @retval FSP_ERR_INVALID_ARGUMENT The URL passed in is to long. **********************************************************************************************************************/ -fsp_err_t rm_wifi_onchip_da16200_dns_query (const char * p_textstring, uint8_t * p_ip_addr) +fsp_err_t rm_wifi_onchip_da16xxx_dns_query (const char * p_textstring, uint8_t * p_ip_addr) { fsp_err_t func_ret; int32_t scanf_ret; @@ -1394,10 +1396,10 @@ fsp_err_t rm_wifi_onchip_da16200_dns_query (const char * p_textstring, uint8_t * int32_t i = 0; uint32_t mutex_flag; - wifi_onchip_da16200_instance_ctrl_t * p_instance_ctrl = &g_rm_wifi_onchip_da16200_instance; + wifi_onchip_da16xxx_instance_ctrl_t * p_instance_ctrl = &g_rm_wifi_onchip_da16xxx_instance; char * buff = (char *) p_instance_ctrl->cmd_rx_buff; -#if (WIFI_ONCHIP_DA16200_CFG_PARAM_CHECKING_ENABLED == 1) +#if (WIFI_ONCHIP_DA16XXX_CFG_PARAM_CHECKING_ENABLED == 1) FSP_ASSERT(NULL != p_textstring); FSP_ASSERT(NULL != p_ip_addr); FSP_ERROR_RETURN(WIFI_OPEN == p_instance_ctrl->open, FSP_ERR_NOT_OPEN); @@ -1406,23 +1408,23 @@ fsp_err_t rm_wifi_onchip_da16200_dns_query (const char * p_textstring, uint8_t * memset((char *) p_instance_ctrl->cmd_rx_buff, 0, sizeof(p_instance_ctrl->cmd_rx_buff)); - mutex_flag = (WIFI_ONCHIP_DA16200_MUTEX_TX | WIFI_ONCHIP_DA16200_MUTEX_RX); - FSP_ERROR_RETURN(pdTRUE == rm_wifi_onchip_da16200_send_basic_take_mutex(p_instance_ctrl, mutex_flag), + mutex_flag = (WIFI_ONCHIP_DA16XXX_MUTEX_TX | WIFI_ONCHIP_DA16XXX_MUTEX_RX); + FSP_ERROR_RETURN(pdTRUE == rm_wifi_onchip_da16xxx_send_basic_take_mutex(p_instance_ctrl, mutex_flag), FSP_ERR_WIFI_FAILED); strncpy((char *) p_instance_ctrl->cmd_tx_buff, "AT+NWHOST=", sizeof(p_instance_ctrl->cmd_tx_buff)); snprintf((char *) p_instance_ctrl->cmd_tx_buff + strlen((char *) p_instance_ctrl->cmd_tx_buff), sizeof(p_instance_ctrl->cmd_tx_buff), "%s\r\n", p_textstring); - func_ret = rm_wifi_onchip_da16200_send_basic(p_instance_ctrl, + func_ret = rm_wifi_onchip_da16xxx_send_basic(p_instance_ctrl, p_instance_ctrl->curr_cmd_port, (char *) p_instance_ctrl->cmd_tx_buff, 0, - WIFI_ONCHIP_DA16200_TIMEOUT_8SEC, - WIFI_ONCHIP_DA16200_DELAY_1000MS, - WIFI_ONCHIP_DA16200_RETURN_TEXT_OK); + WIFI_ONCHIP_DA16XXX_TIMEOUT_8SEC, + WIFI_ONCHIP_DA16XXX_DELAY_1000MS, + WIFI_ONCHIP_DA16XXX_RETURN_TEXT_OK); - rm_wifi_onchip_da16200_send_basic_give_mutex(p_instance_ctrl, mutex_flag); + rm_wifi_onchip_da16xxx_send_basic_give_mutex(p_instance_ctrl, mutex_flag); if (FSP_SUCCESS == func_ret) { @@ -1469,11 +1471,11 @@ fsp_err_t rm_wifi_onchip_da16200_dns_query (const char * p_textstring, uint8_t * * @retval FSP_ERR_NOT_OPEN The instance has not been opened. * @retval FSP_ERR_WIFI_FAILED Error occured in the execution of this function **********************************************************************************************************************/ -fsp_err_t rm_wifi_onchip_da16200_avail_socket_get (uint32_t * p_socket_id) +fsp_err_t rm_wifi_onchip_da16xxx_avail_socket_get (uint32_t * p_socket_id) { - wifi_onchip_da16200_instance_ctrl_t * p_instance_ctrl = &g_rm_wifi_onchip_da16200_instance; + wifi_onchip_da16xxx_instance_ctrl_t * p_instance_ctrl = &g_rm_wifi_onchip_da16xxx_instance; -#if (WIFI_ONCHIP_DA16200_CFG_PARAM_CHECKING_ENABLED == 1) +#if (WIFI_ONCHIP_DA16XXX_CFG_PARAM_CHECKING_ENABLED == 1) FSP_ASSERT(NULL != p_socket_id); FSP_ERROR_RETURN(WIFI_OPEN == p_instance_ctrl->open, FSP_ERR_NOT_OPEN); #endif @@ -1504,11 +1506,11 @@ fsp_err_t rm_wifi_onchip_da16200_avail_socket_get (uint32_t * p_socket_id) * is greater than/equal num_creatable_sockets. * @retval FSP_ERR_NOT_OPEN The instance has not been opened. **********************************************************************************************************************/ -fsp_err_t rm_wifi_onchip_da16200_socket_status_get (uint32_t socket_no, uint32_t * p_socket_status) +fsp_err_t rm_wifi_onchip_da16xxx_socket_status_get (uint32_t socket_no, uint32_t * p_socket_status) { - wifi_onchip_da16200_instance_ctrl_t * p_instance_ctrl = &g_rm_wifi_onchip_da16200_instance; + wifi_onchip_da16xxx_instance_ctrl_t * p_instance_ctrl = &g_rm_wifi_onchip_da16xxx_instance; -#if (WIFI_ONCHIP_DA16200_CFG_PARAM_CHECKING_ENABLED == 1) +#if (WIFI_ONCHIP_DA16XXX_CFG_PARAM_CHECKING_ENABLED == 1) FSP_ASSERT(NULL != p_socket_status); FSP_ASSERT(socket_no < p_instance_ctrl->num_creatable_sockets); FSP_ERROR_RETURN(WIFI_OPEN == p_instance_ctrl->open, FSP_ERR_NOT_OPEN); @@ -1532,13 +1534,13 @@ fsp_err_t rm_wifi_onchip_da16200_socket_status_get (uint32_t socket_no, uint32_t * @retval FSP_ERR_NOT_OPEN The instance has not been opened. * @retval FSP_ERR_UNSUPPORTED Selected mode not supported by this API **********************************************************************************************************************/ -fsp_err_t rm_wifi_onchip_da16200_socket_create (uint32_t socket_no, uint32_t type, uint32_t ipversion) +fsp_err_t rm_wifi_onchip_da16xxx_socket_create (uint32_t socket_no, uint32_t type, uint32_t ipversion) { - wifi_onchip_da16200_instance_ctrl_t * p_instance_ctrl = &g_rm_wifi_onchip_da16200_instance; + wifi_onchip_da16xxx_instance_ctrl_t * p_instance_ctrl = &g_rm_wifi_onchip_da16xxx_instance; -#if (WIFI_ONCHIP_DA16200_CFG_PARAM_CHECKING_ENABLED == 1) +#if (WIFI_ONCHIP_DA16XXX_CFG_PARAM_CHECKING_ENABLED == 1) FSP_ERROR_RETURN(WIFI_OPEN == p_instance_ctrl->open, FSP_ERR_NOT_OPEN); - FSP_ASSERT(type <= WIFI_ONCHIP_DA16200_SOCKET_TYPE_MAX); + FSP_ASSERT(type <= WIFI_ONCHIP_DA16XXX_SOCKET_TYPE_MAX); #endif if ((1 == p_instance_ctrl->sockets[socket_no].socket_create_flag) || (1 < p_instance_ctrl->num_creatable_sockets)) @@ -1546,9 +1548,9 @@ fsp_err_t rm_wifi_onchip_da16200_socket_create (uint32_t socket_no, uint32_t typ return FSP_ERR_WIFI_FAILED; } - if (WIFI_ONCHIP_DA16200_SOCKET_TYPE_TCP_CLIENT == type) + if (WIFI_ONCHIP_DA16XXX_SOCKET_TYPE_TCP_CLIENT == type) { - p_instance_ctrl->sockets[socket_no].socket_type = WIFI_ONCHIP_DA16200_SOCKET_TYPE_TCP_CLIENT; + p_instance_ctrl->sockets[socket_no].socket_type = WIFI_ONCHIP_DA16XXX_SOCKET_TYPE_TCP_CLIENT; } else { @@ -1595,19 +1597,19 @@ fsp_err_t rm_wifi_onchip_da16200_socket_create (uint32_t socket_no, uint32_t typ * @retval FSP_ERR_ASSERTION The p_instance_ctrl is NULL. * @retval FSP_ERR_NOT_OPEN The instance has not been opened. **********************************************************************************************************************/ -fsp_err_t rm_wifi_onchip_da16200_tcp_connect (uint32_t socket_no, uint32_t ipaddr, uint32_t port) +fsp_err_t rm_wifi_onchip_da16xxx_tcp_connect (uint32_t socket_no, uint32_t ipaddr, uint32_t port) { fsp_err_t ret = FSP_SUCCESS; uint32_t mutex_flag; - wifi_onchip_da16200_instance_ctrl_t * p_instance_ctrl = &g_rm_wifi_onchip_da16200_instance; + wifi_onchip_da16xxx_instance_ctrl_t * p_instance_ctrl = &g_rm_wifi_onchip_da16xxx_instance; -#if (WIFI_ONCHIP_DA16200_CFG_PARAM_CHECKING_ENABLED == 1) +#if (WIFI_ONCHIP_DA16XXX_CFG_PARAM_CHECKING_ENABLED == 1) FSP_ERROR_RETURN(WIFI_OPEN == p_instance_ctrl->open, FSP_ERR_NOT_OPEN); #endif - mutex_flag = (WIFI_ONCHIP_DA16200_MUTEX_TX | WIFI_ONCHIP_DA16200_MUTEX_RX); - FSP_ERROR_RETURN(pdTRUE == rm_wifi_onchip_da16200_send_basic_take_mutex(p_instance_ctrl, mutex_flag), + mutex_flag = (WIFI_ONCHIP_DA16XXX_MUTEX_TX | WIFI_ONCHIP_DA16XXX_MUTEX_RX); + FSP_ERROR_RETURN(pdTRUE == rm_wifi_onchip_da16xxx_send_basic_take_mutex(p_instance_ctrl, mutex_flag), FSP_ERR_WIFI_FAILED); memset(p_instance_ctrl->cmd_tx_buff, 0, sizeof(p_instance_ctrl->cmd_tx_buff)); @@ -1620,15 +1622,15 @@ fsp_err_t rm_wifi_onchip_da16200_tcp_connect (uint32_t socket_no, uint32_t ipadd (uint8_t) (ipaddr >> 16), (uint8_t) (ipaddr >> 8), (uint8_t) (ipaddr), (int) port); - ret = rm_wifi_onchip_da16200_send_basic(p_instance_ctrl, + ret = rm_wifi_onchip_da16xxx_send_basic(p_instance_ctrl, p_instance_ctrl->curr_cmd_port, (char *) p_instance_ctrl->cmd_tx_buff, 0, - WIFI_ONCHIP_DA16200_TIMEOUT_5SEC, - WIFI_ONCHIP_DA16200_DELAY_500MS, - WIFI_ONCHIP_DA16200_RETURN_TEXT_OK); + WIFI_ONCHIP_DA16XXX_TIMEOUT_5SEC, + WIFI_ONCHIP_DA16XXX_DELAY_500MS, + WIFI_ONCHIP_DA16XXX_RETURN_TEXT_OK); - rm_wifi_onchip_da16200_send_basic_give_mutex(p_instance_ctrl, mutex_flag); + rm_wifi_onchip_da16xxx_send_basic_give_mutex(p_instance_ctrl, mutex_flag); FSP_ERROR_RETURN(FSP_SUCCESS == ret, FSP_ERR_WIFI_FAILED); @@ -1637,10 +1639,10 @@ fsp_err_t rm_wifi_onchip_da16200_tcp_connect (uint32_t socket_no, uint32_t ipadd p_instance_ctrl->sockets[socket_no].remote_ipaddr[2] = (uint8_t) (ipaddr >> 8); p_instance_ctrl->sockets[socket_no].remote_ipaddr[3] = (uint8_t) (ipaddr); p_instance_ctrl->sockets[socket_no].remote_port = (int) port; - p_instance_ctrl->sockets[socket_no].socket_status = WIFI_ONCHIP_DA16200_SOCKET_STATUS_CONNECTED; - p_instance_ctrl->sockets[socket_no].socket_read_write_flag = WIFI_ONCHIP_DA16200_SOCKET_READ | - WIFI_ONCHIP_DA16200_SOCKET_WRITE; - p_instance_ctrl->sockets[socket_no].socket_recv_state = WIFI_ONCHIP_DA16200_RECV_PREFIX; + p_instance_ctrl->sockets[socket_no].socket_status = WIFI_ONCHIP_DA16XXX_SOCKET_STATUS_CONNECTED; + p_instance_ctrl->sockets[socket_no].socket_read_write_flag = WIFI_ONCHIP_DA16XXX_SOCKET_READ | + WIFI_ONCHIP_DA16XXX_SOCKET_WRITE; + p_instance_ctrl->sockets[socket_no].socket_recv_state = WIFI_ONCHIP_DA16XXX_RECV_PREFIX; p_instance_ctrl->sockets[socket_no].socket_create_flag = 1; return ret; @@ -1658,7 +1660,7 @@ fsp_err_t rm_wifi_onchip_da16200_tcp_connect (uint32_t socket_no, uint32_t ipadd * @retval FSP_ERR_ASSERTION The p_instance_ctrl or parameter p_data is NULL. * @retval FSP_ERR_NOT_OPEN The instance has not been opened. **********************************************************************************************************************/ -int32_t rm_wifi_onchip_da16200_send (uint32_t socket_no, const uint8_t * p_data, uint32_t length, uint32_t timeout_ms) +int32_t rm_wifi_onchip_da16xxx_send (uint32_t socket_no, const uint8_t * p_data, uint32_t length, uint32_t timeout_ms) { uint32_t sent_count = 0; uint32_t tx_length; @@ -1666,33 +1668,33 @@ int32_t rm_wifi_onchip_da16200_send (uint32_t socket_no, const uint8_t * p_data, uint32_t mutex_flag; int header_len; - wifi_onchip_da16200_instance_ctrl_t * p_instance_ctrl = &g_rm_wifi_onchip_da16200_instance; + wifi_onchip_da16xxx_instance_ctrl_t * p_instance_ctrl = &g_rm_wifi_onchip_da16xxx_instance; -#if (WIFI_ONCHIP_DA16200_CFG_PARAM_CHECKING_ENABLED == 1) +#if (WIFI_ONCHIP_DA16XXX_CFG_PARAM_CHECKING_ENABLED == 1) FSP_ASSERT(NULL != p_data); FSP_ERROR_RETURN(WIFI_OPEN == p_instance_ctrl->open, FSP_ERR_NOT_OPEN); - FSP_ERROR_RETURN(WIFI_ONCHIP_DA16200_CFG_CMD_TX_BUF_SIZE > length, FSP_ERR_INVALID_ARGUMENT); + FSP_ERROR_RETURN(WIFI_ONCHIP_DA16XXX_CFG_CMD_TX_BUF_SIZE > length, FSP_ERR_INVALID_ARGUMENT); #endif /* If socket write has been disabled by shutdown call then return 0 bytes sent */ - if (!(p_instance_ctrl->sockets[socket_no].socket_read_write_flag & WIFI_ONCHIP_DA16200_SOCKET_WRITE)) + if (!(p_instance_ctrl->sockets[socket_no].socket_read_write_flag & WIFI_ONCHIP_DA16XXX_SOCKET_WRITE)) { return 0; } if ((0 == p_instance_ctrl->sockets[socket_no].socket_create_flag) || - (WIFI_ONCHIP_DA16200_SOCKET_STATUS_CONNECTED != p_instance_ctrl->sockets[socket_no].socket_status)) + (WIFI_ONCHIP_DA16XXX_SOCKET_STATUS_CONNECTED != p_instance_ctrl->sockets[socket_no].socket_status)) { return FSP_ERR_WIFI_FAILED; } - mutex_flag = WIFI_ONCHIP_DA16200_MUTEX_TX; - FSP_ERROR_RETURN(pdTRUE == rm_wifi_onchip_da16200_send_basic_take_mutex(p_instance_ctrl, mutex_flag), + mutex_flag = WIFI_ONCHIP_DA16XXX_MUTEX_TX; + FSP_ERROR_RETURN(pdTRUE == rm_wifi_onchip_da16xxx_send_basic_take_mutex(p_instance_ctrl, mutex_flag), FSP_ERR_WIFI_FAILED); if (socket_no != p_instance_ctrl->curr_socket_index) { - rm_wifi_onchip_da16200_send_basic_give_mutex(p_instance_ctrl, mutex_flag); + rm_wifi_onchip_da16xxx_send_basic_give_mutex(p_instance_ctrl, mutex_flag); return FSP_ERR_WIFI_FAILED; } @@ -1703,7 +1705,7 @@ int32_t rm_wifi_onchip_da16200_send (uint32_t socket_no, const uint8_t * p_data, while (sent_count < length) { - /* Put the DA16200 module into data input mode */ + /* Put the DA16XXX module into data input mode */ header_len = snprintf((char *) p_instance_ctrl->cmd_tx_buff, sizeof(p_instance_ctrl->cmd_tx_buff), "%s%s%d%d,%d.%d.%d.%d,%d,%s,", @@ -1718,9 +1720,9 @@ int32_t rm_wifi_onchip_da16200_send (uint32_t socket_no, const uint8_t * p_data, p_instance_ctrl->sockets[socket_no].remote_port, "r"); - if (length - sent_count > (uint32_t) (WIFI_ONCHIP_DA16200_CFG_CMD_TX_BUF_SIZE - header_len)) + if (length - sent_count > (uint32_t) (WIFI_ONCHIP_DA16XXX_CFG_CMD_TX_BUF_SIZE - header_len)) { - tx_length = (uint32_t) (WIFI_ONCHIP_DA16200_CFG_CMD_TX_BUF_SIZE - header_len); + tx_length = (uint32_t) (WIFI_ONCHIP_DA16XXX_CFG_CMD_TX_BUF_SIZE - header_len); } else { @@ -1732,16 +1734,16 @@ int32_t rm_wifi_onchip_da16200_send (uint32_t socket_no, const uint8_t * p_data, (char *) p_data, tx_length); - ret = rm_wifi_onchip_da16200_send_basic(p_instance_ctrl, + ret = rm_wifi_onchip_da16xxx_send_basic(p_instance_ctrl, p_instance_ctrl->curr_cmd_port, (char *) p_instance_ctrl->cmd_tx_buff, tx_length + (uint32_t) header_len, timeout_ms, - WIFI_ONCHIP_DA16200_DELAY_500MS, - WIFI_ONCHIP_DA16200_RETURN_TEXT_OK); + WIFI_ONCHIP_DA16XXX_DELAY_500MS, + WIFI_ONCHIP_DA16XXX_RETURN_TEXT_OK); if (FSP_SUCCESS != ret) { - rm_wifi_onchip_da16200_send_basic_give_mutex(p_instance_ctrl, mutex_flag); + rm_wifi_onchip_da16xxx_send_basic_give_mutex(p_instance_ctrl, mutex_flag); } FSP_ERROR_RETURN(FSP_SUCCESS == ret, FSP_ERR_WIFI_FAILED); @@ -1750,7 +1752,7 @@ int32_t rm_wifi_onchip_da16200_send (uint32_t socket_no, const uint8_t * p_data, p_data = p_data + sent_count; } - rm_wifi_onchip_da16200_send_basic_give_mutex(p_instance_ctrl, mutex_flag); + rm_wifi_onchip_da16xxx_send_basic_give_mutex(p_instance_ctrl, mutex_flag); return (int32_t) sent_count; } @@ -1768,22 +1770,22 @@ int32_t rm_wifi_onchip_da16200_send (uint32_t socket_no, const uint8_t * p_data, * @retval FSP_ERR_NOT_OPEN The instance has not been opened. * @retval FSP_ERR_ASSERTION The p_instance_ctrl or parameter p_data is NULL. **********************************************************************************************************************/ -int32_t rm_wifi_onchip_da16200_recv (uint32_t socket_no, uint8_t * p_data, uint32_t length, uint32_t timeout_ms) +int32_t rm_wifi_onchip_da16xxx_recv (uint32_t socket_no, uint8_t * p_data, uint32_t length, uint32_t timeout_ms) { uint32_t mutex_flag; uint32_t recvcnt = 0; int32_t ret = 0; - wifi_onchip_da16200_instance_ctrl_t * p_instance_ctrl = &g_rm_wifi_onchip_da16200_instance; + wifi_onchip_da16xxx_instance_ctrl_t * p_instance_ctrl = &g_rm_wifi_onchip_da16xxx_instance; -#if (WIFI_ONCHIP_DA16200_CFG_PARAM_CHECKING_ENABLED == 1) +#if (WIFI_ONCHIP_DA16XXX_CFG_PARAM_CHECKING_ENABLED == 1) FSP_ASSERT(NULL != p_data); FSP_ERROR_RETURN(WIFI_OPEN == p_instance_ctrl->open, FSP_ERR_NOT_OPEN); FSP_ERROR_RETURN(0 != length, FSP_ERR_INVALID_ARGUMENT); #endif - /* if socket read has been disabled by shutdown call then return any bytes left in the stream buffer. - However if 0 bytes left, return error. */ - if (!(p_instance_ctrl->sockets[socket_no].socket_read_write_flag & WIFI_ONCHIP_DA16200_SOCKET_READ)) + /* if socket read has been disabled by shutdown call then return any bytes left in the stream buffer. + * However if 0 bytes left, return error. */ + if (!(p_instance_ctrl->sockets[socket_no].socket_read_write_flag & WIFI_ONCHIP_DA16XXX_SOCKET_READ)) { size_t xReceivedBytes = xStreamBufferReceiveAlt(p_instance_ctrl->sockets[socket_no].socket_byteq_hdl, p_data, @@ -1791,29 +1793,29 @@ int32_t rm_wifi_onchip_da16200_recv (uint32_t socket_no, uint8_t * p_data, uint3 0); /* No wait needed as data is already in stream buffer*/ if (0 < xReceivedBytes) { - return (int32_t)xReceivedBytes; + return (int32_t) xReceivedBytes; } - - return -FSP_ERR_WIFI_FAILED; + + return -FSP_ERR_WIFI_FAILED; } /* Take the receive mutex */ - mutex_flag = (WIFI_ONCHIP_DA16200_MUTEX_RX); - FSP_ERROR_RETURN(pdTRUE == rm_wifi_onchip_da16200_send_basic_take_mutex(p_instance_ctrl, mutex_flag), + mutex_flag = (WIFI_ONCHIP_DA16XXX_MUTEX_RX); + FSP_ERROR_RETURN(pdTRUE == rm_wifi_onchip_da16xxx_send_basic_take_mutex(p_instance_ctrl, mutex_flag), -FSP_ERR_WIFI_FAILED); if (0 == p_instance_ctrl->sockets[socket_no].socket_create_flag) { - rm_wifi_onchip_da16200_send_basic_give_mutex(p_instance_ctrl, mutex_flag); + rm_wifi_onchip_da16xxx_send_basic_give_mutex(p_instance_ctrl, mutex_flag); return -FSP_ERR_WIFI_FAILED; } if (socket_no != p_instance_ctrl->curr_socket_index) { - rm_wifi_onchip_da16200_send_basic_give_mutex(p_instance_ctrl, mutex_flag); + rm_wifi_onchip_da16xxx_send_basic_give_mutex(p_instance_ctrl, mutex_flag); - return WIFI_ONCHIP_DA16200_ERR_UNKNOWN; + return WIFI_ONCHIP_DA16XXX_ERR_UNKNOWN; } volatile size_t xReceivedBytes = @@ -1841,7 +1843,7 @@ int32_t rm_wifi_onchip_da16200_recv (uint32_t socket_no, uint8_t * p_data, uint3 xStreamBufferReceiveAlt(p_instance_ctrl->sockets[socket_no].socket_byteq_hdl, (p_data + recvcnt), num_bytes_left, - pdMS_TO_TICKS(WIFI_ONCHIP_DA16200_TIMEOUT_500MS)); + pdMS_TO_TICKS(WIFI_ONCHIP_DA16XXX_TIMEOUT_500MS)); if (xReceivedBytes > 0) { recvcnt += xReceivedBytes; @@ -1860,7 +1862,7 @@ int32_t rm_wifi_onchip_da16200_recv (uint32_t socket_no, uint8_t * p_data, uint3 /* Reset the trigger level for socket stream buffer */ xStreamBufferSetTriggerLevel(p_instance_ctrl->sockets[socket_no].socket_byteq_hdl, 1); - rm_wifi_onchip_da16200_send_basic_give_mutex(p_instance_ctrl, mutex_flag); + rm_wifi_onchip_da16xxx_send_basic_give_mutex(p_instance_ctrl, mutex_flag); return ret; } @@ -1876,22 +1878,22 @@ int32_t rm_wifi_onchip_da16200_recv (uint32_t socket_no, uint8_t * p_data, uint3 * @retval FSP_ERR_NOT_OPEN The instance has not been opened. * @retval FSP_ERR_INVALID_ARGUMENT Bad parameter value was passed into function. **********************************************************************************************************************/ -fsp_err_t rm_wifi_onchip_da16200_socket_disconnect (uint32_t socket_no) +fsp_err_t rm_wifi_onchip_da16xxx_socket_disconnect (uint32_t socket_no) { fsp_err_t ret = FSP_ERR_WIFI_FAILED; uint32_t mutex_flag; - wifi_onchip_da16200_instance_ctrl_t * p_instance_ctrl = &g_rm_wifi_onchip_da16200_instance; + wifi_onchip_da16xxx_instance_ctrl_t * p_instance_ctrl = &g_rm_wifi_onchip_da16xxx_instance; -#if (WIFI_ONCHIP_DA16200_CFG_PARAM_CHECKING_ENABLED == 1) +#if (WIFI_ONCHIP_DA16XXX_CFG_PARAM_CHECKING_ENABLED == 1) FSP_ERROR_RETURN(WIFI_OPEN == p_instance_ctrl->open, FSP_ERR_NOT_OPEN); #endif /* Test if socket has been created for socket index passed in to function */ if (1 == p_instance_ctrl->sockets[socket_no].socket_create_flag) { - mutex_flag = (WIFI_ONCHIP_DA16200_MUTEX_TX | WIFI_ONCHIP_DA16200_MUTEX_RX); - FSP_ERROR_RETURN(pdTRUE == rm_wifi_onchip_da16200_send_basic_take_mutex(p_instance_ctrl, mutex_flag), + mutex_flag = (WIFI_ONCHIP_DA16XXX_MUTEX_TX | WIFI_ONCHIP_DA16XXX_MUTEX_RX); + FSP_ERROR_RETURN(pdTRUE == rm_wifi_onchip_da16xxx_send_basic_take_mutex(p_instance_ctrl, mutex_flag), FSP_ERR_WIFI_FAILED); // NOLINT(clang-analyzer-security.insecureAPI.strchr) Disable warning about use of strcpy @@ -1899,15 +1901,15 @@ fsp_err_t rm_wifi_onchip_da16200_socket_disconnect (uint32_t socket_no) snprintf((char *) p_instance_ctrl->cmd_tx_buff + strlen((char *) p_instance_ctrl->cmd_tx_buff), sizeof(p_instance_ctrl->cmd_tx_buff), "%d\r", p_instance_ctrl->sockets[socket_no].socket_type); - ret = rm_wifi_onchip_da16200_send_basic(p_instance_ctrl, + ret = rm_wifi_onchip_da16xxx_send_basic(p_instance_ctrl, p_instance_ctrl->curr_cmd_port, (char *) p_instance_ctrl->cmd_tx_buff, 0, - WIFI_ONCHIP_DA16200_TIMEOUT_2SEC, - WIFI_ONCHIP_DA16200_DELAY_500MS, - WIFI_ONCHIP_DA16200_RETURN_TEXT_OK); + WIFI_ONCHIP_DA16XXX_TIMEOUT_2SEC, + WIFI_ONCHIP_DA16XXX_DELAY_500MS, + WIFI_ONCHIP_DA16XXX_RETURN_TEXT_OK); - rm_wifi_onchip_da16200_send_basic_give_mutex(p_instance_ctrl, mutex_flag); + rm_wifi_onchip_da16xxx_send_basic_give_mutex(p_instance_ctrl, mutex_flag); FSP_ERROR_RETURN(FSP_SUCCESS == ret, FSP_ERR_WIFI_FAILED); @@ -1915,7 +1917,7 @@ fsp_err_t rm_wifi_onchip_da16200_socket_disconnect (uint32_t socket_no) if (FSP_SUCCESS == ret) { p_instance_ctrl->sockets[socket_no].socket_create_flag = 0; - p_instance_ctrl->sockets[socket_no].socket_status = WIFI_ONCHIP_DA16200_SOCKET_STATUS_CLOSED; + p_instance_ctrl->sockets[socket_no].socket_status = WIFI_ONCHIP_DA16XXX_SOCKET_STATUS_CLOSED; p_instance_ctrl->sockets[socket_no].socket_read_write_flag = 0; BaseType_t rst_status = xStreamBufferReset(p_instance_ctrl->sockets[socket_no].socket_byteq_hdl); @@ -1929,10 +1931,10 @@ fsp_err_t rm_wifi_onchip_da16200_socket_disconnect (uint32_t socket_no) return ret; } -#if (1 == WIFI_ONCHIP_DA16200_CFG_SNTP_ENABLE) +#if (1 == WIFI_ONCHIP_DA16XXX_CFG_SNTP_ENABLE) /*******************************************************************************************************************//** - * Initialize DA16200 module SNTP client service. + * Initialize DA16XXX module SNTP client service. * * @param[in] p_instance_ctrl Pointer to array holding URL to query from DNS. * @@ -1942,7 +1944,7 @@ fsp_err_t rm_wifi_onchip_da16200_socket_disconnect (uint32_t socket_no) * @retval FSP_ERR_INVALID_ARGUMENT Parameter passed into function was invalid. * @retval FSP_ERR_NOT_OPEN Module is not open. **********************************************************************************************************************/ -static fsp_err_t rm_wifi_onchip_da16200_sntp_service_init (wifi_onchip_da16200_instance_ctrl_t * const p_instance_ctrl) +static fsp_err_t rm_wifi_onchip_da16xxx_sntp_service_init (wifi_onchip_da16xxx_instance_ctrl_t * const p_instance_ctrl) { fsp_err_t err = FSP_ERR_INTERNAL; uint8_t ip_address_sntp_server[4] = {0, 0, 0, 0}; @@ -1952,7 +1954,7 @@ static fsp_err_t rm_wifi_onchip_da16200_sntp_service_init (wifi_onchip_da16200_i err_scan = // NOLINTNEXTLINE(cert-err34-c) Disable warning about the use of sscanf - sscanf((const char *) p_instance_ctrl->p_wifi_onchip_da16200_cfg->sntp_server_ip, + sscanf((const char *) p_instance_ctrl->p_wifi_onchip_da16xxx_cfg->sntp_server_ip, "%u.%u.%u.%u,", (unsigned int *) &ip_address_sntp_server[0], (unsigned int *) &ip_address_sntp_server[1], @@ -1961,22 +1963,22 @@ static fsp_err_t rm_wifi_onchip_da16200_sntp_service_init (wifi_onchip_da16200_i if (4 == err_scan) { /* Configure the SNTP Server Address */ - err = RM_WIFI_ONCHIP_DA16200_SntpServerIpAddressSet((uint8_t *) ip_address_sntp_server); + err = RM_WIFI_ONCHIP_DA16XXX_SntpServerIpAddressSet((uint8_t *) ip_address_sntp_server); } if (FSP_SUCCESS == err) { /* Enable/disable the SNTP clinet */ - err = RM_WIFI_ONCHIP_DA16200_SntpEnableSet(WIFI_ONCHIP_DA16200_SNTP_ENABLE); + err = RM_WIFI_ONCHIP_DA16XXX_SntpEnableSet(WIFI_ONCHIP_DA16XXX_SNTP_ENABLE); } /* Set the SNTP Timezone configuration string */ if (FSP_SUCCESS == err) { - err = RM_WIFI_ONCHIP_DA16200_SntpTimeZoneSet( - p_instance_ctrl->p_wifi_onchip_da16200_cfg->sntp_utc_offset_in_hours, + err = RM_WIFI_ONCHIP_DA16XXX_SntpTimeZoneSet( + p_instance_ctrl->p_wifi_onchip_da16xxx_cfg->sntp_utc_offset_in_hours, 0, - WIFI_ONCHIP_DA16200_SNTP_DAYLIGHT_SAVINGS_DISABLE); + WIFI_ONCHIP_DA16XXX_SNTP_DAYLIGHT_SAVINGS_DISABLE); } return err; @@ -1987,7 +1989,7 @@ static fsp_err_t rm_wifi_onchip_da16200_sntp_service_init (wifi_onchip_da16200_i /*! \endcond */ /*******************************************************************************************************************//** - * @addtogroup WIFI_ONCHIP_DA16200 WIFI_ONCHIP_DA16200 + * @addtogroup WIFI_ONCHIP_DA16XXX WIFI_ONCHIP_DA16XXX * @{ **********************************************************************************************************************/ @@ -2001,19 +2003,19 @@ static fsp_err_t rm_wifi_onchip_da16200_sntp_service_init (wifi_onchip_da16200_i * @retval FSP_ERR_NOT_OPEN Module is not open. * @retval FSP_ERR_ASSERTION The parameter p_server_ip_addr is NULL. **********************************************************************************************************************/ -fsp_err_t RM_WIFI_ONCHIP_DA16200_SntpServerIpAddressSet (uint8_t * p_server_ip_addr) +fsp_err_t RM_WIFI_ONCHIP_DA16XXX_SntpServerIpAddressSet (uint8_t * p_server_ip_addr) { fsp_err_t err = FSP_SUCCESS; uint32_t mutex_flag; - wifi_onchip_da16200_instance_ctrl_t * p_instance_ctrl = &g_rm_wifi_onchip_da16200_instance; + wifi_onchip_da16xxx_instance_ctrl_t * p_instance_ctrl = &g_rm_wifi_onchip_da16xxx_instance; -#if (WIFI_ONCHIP_DA16200_CFG_PARAM_CHECKING_ENABLED == 1) +#if (WIFI_ONCHIP_DA16XXX_CFG_PARAM_CHECKING_ENABLED == 1) FSP_ASSERT(NULL != p_server_ip_addr); FSP_ERROR_RETURN(WIFI_OPEN == p_instance_ctrl->open, FSP_ERR_NOT_OPEN); #endif - mutex_flag = (WIFI_ONCHIP_DA16200_MUTEX_TX | WIFI_ONCHIP_DA16200_MUTEX_RX); - FSP_ERROR_RETURN(pdTRUE == rm_wifi_onchip_da16200_send_basic_take_mutex(p_instance_ctrl, mutex_flag), + mutex_flag = (WIFI_ONCHIP_DA16XXX_MUTEX_TX | WIFI_ONCHIP_DA16XXX_MUTEX_RX); + FSP_ERROR_RETURN(pdTRUE == rm_wifi_onchip_da16xxx_send_basic_take_mutex(p_instance_ctrl, mutex_flag), FSP_ERR_WIFI_FAILED); // NOLINT(clang-analyzer-security.insecureAPI.strchr) Disable warning about use of strcpy @@ -2023,15 +2025,15 @@ fsp_err_t RM_WIFI_ONCHIP_DA16200_SntpServerIpAddressSet (uint8_t * p_server_ip_a sizeof(p_instance_ctrl->cmd_tx_buff), "%u.%u.%u.%u\r\n", p_server_ip_addr[0], p_server_ip_addr[1], p_server_ip_addr[2], p_server_ip_addr[3]); - err = rm_wifi_onchip_da16200_send_basic(p_instance_ctrl, + err = rm_wifi_onchip_da16xxx_send_basic(p_instance_ctrl, p_instance_ctrl->curr_cmd_port, (char *) p_instance_ctrl->cmd_tx_buff, 0, - WIFI_ONCHIP_DA16200_TIMEOUT_400MS, - WIFI_ONCHIP_DA16200_DELAY_500MS, - WIFI_ONCHIP_DA16200_RETURN_TEXT_OK); + WIFI_ONCHIP_DA16XXX_TIMEOUT_400MS, + WIFI_ONCHIP_DA16XXX_DELAY_500MS, + WIFI_ONCHIP_DA16XXX_RETURN_TEXT_OK); - rm_wifi_onchip_da16200_send_basic_give_mutex(p_instance_ctrl, mutex_flag); + rm_wifi_onchip_da16xxx_send_basic_give_mutex(p_instance_ctrl, mutex_flag); return err; } @@ -2045,32 +2047,32 @@ fsp_err_t RM_WIFI_ONCHIP_DA16200_SntpServerIpAddressSet (uint8_t * p_server_ip_a * @retval FSP_ERR_WIFI_FAILED Error occurred with command to Wifi module. * @retval FSP_ERR_NOT_OPEN Module is not open. **********************************************************************************************************************/ -fsp_err_t RM_WIFI_ONCHIP_DA16200_SntpEnableSet (wifi_onchip_da16200_sntp_enable_t enable) +fsp_err_t RM_WIFI_ONCHIP_DA16XXX_SntpEnableSet (wifi_onchip_da16xxx_sntp_enable_t enable) { fsp_err_t err = FSP_SUCCESS; uint32_t mutex_flag; - wifi_onchip_da16200_instance_ctrl_t * p_instance_ctrl = &g_rm_wifi_onchip_da16200_instance; + wifi_onchip_da16xxx_instance_ctrl_t * p_instance_ctrl = &g_rm_wifi_onchip_da16xxx_instance; -#if (WIFI_ONCHIP_DA16200_CFG_PARAM_CHECKING_ENABLED == 1) +#if (WIFI_ONCHIP_DA16XXX_CFG_PARAM_CHECKING_ENABLED == 1) FSP_ERROR_RETURN(WIFI_OPEN == p_instance_ctrl->open, FSP_ERR_NOT_OPEN); #endif - mutex_flag = (WIFI_ONCHIP_DA16200_MUTEX_TX | WIFI_ONCHIP_DA16200_MUTEX_RX); - FSP_ERROR_RETURN(pdTRUE == rm_wifi_onchip_da16200_send_basic_take_mutex(p_instance_ctrl, mutex_flag), + mutex_flag = (WIFI_ONCHIP_DA16XXX_MUTEX_TX | WIFI_ONCHIP_DA16XXX_MUTEX_RX); + FSP_ERROR_RETURN(pdTRUE == rm_wifi_onchip_da16xxx_send_basic_take_mutex(p_instance_ctrl, mutex_flag), FSP_ERR_WIFI_FAILED); - if (WIFI_ONCHIP_DA16200_SNTP_ENABLE == enable) + if (WIFI_ONCHIP_DA16XXX_SNTP_ENABLE == enable) { // NOLINT(clang-analyzer-security.insecureAPI.strchr) Disable warning about use of strcpy strncpy((char *) p_instance_ctrl->cmd_tx_buff, "AT+NWSNTP=1\r\n", sizeof(p_instance_ctrl->cmd_tx_buff)); - err = rm_wifi_onchip_da16200_send_basic(p_instance_ctrl, + err = rm_wifi_onchip_da16xxx_send_basic(p_instance_ctrl, p_instance_ctrl->curr_cmd_port, (char *) p_instance_ctrl->cmd_tx_buff, 0, - WIFI_ONCHIP_DA16200_TIMEOUT_400MS, - WIFI_ONCHIP_DA16200_DELAY_500MS, - WIFI_ONCHIP_DA16200_RETURN_TEXT_OK); + WIFI_ONCHIP_DA16XXX_TIMEOUT_400MS, + WIFI_ONCHIP_DA16XXX_DELAY_500MS, + WIFI_ONCHIP_DA16XXX_RETURN_TEXT_OK); p_instance_ctrl->is_sntp_enabled = true; } @@ -2078,18 +2080,18 @@ fsp_err_t RM_WIFI_ONCHIP_DA16200_SntpEnableSet (wifi_onchip_da16200_sntp_enable_ { // NOLINT(clang-analyzer-security.insecureAPI.strchr) Disable warning about use of strcpy strncpy((char *) p_instance_ctrl->cmd_tx_buff, "AT+NWSNTP=0\r\n", sizeof(p_instance_ctrl->cmd_tx_buff)); - err = rm_wifi_onchip_da16200_send_basic(p_instance_ctrl, + err = rm_wifi_onchip_da16xxx_send_basic(p_instance_ctrl, p_instance_ctrl->curr_cmd_port, (char *) p_instance_ctrl->cmd_tx_buff, 0, - WIFI_ONCHIP_DA16200_TIMEOUT_400MS, - WIFI_ONCHIP_DA16200_DELAY_500MS, - WIFI_ONCHIP_DA16200_RETURN_TEXT_OK); + WIFI_ONCHIP_DA16XXX_TIMEOUT_400MS, + WIFI_ONCHIP_DA16XXX_DELAY_500MS, + WIFI_ONCHIP_DA16XXX_RETURN_TEXT_OK); p_instance_ctrl->is_sntp_enabled = false; } - rm_wifi_onchip_da16200_send_basic_give_mutex(p_instance_ctrl, mutex_flag); + rm_wifi_onchip_da16xxx_send_basic_give_mutex(p_instance_ctrl, mutex_flag); return err; } @@ -2106,23 +2108,23 @@ fsp_err_t RM_WIFI_ONCHIP_DA16200_SntpEnableSet (wifi_onchip_da16200_sntp_enable_ * @retval FSP_ERR_NOT_OPEN Module is not open. * @retval FSP_ERR_INVALID_ARGUMENT Parameter passed into function was invalid. **********************************************************************************************************************/ -fsp_err_t RM_WIFI_ONCHIP_DA16200_SntpTimeZoneSet ( +fsp_err_t RM_WIFI_ONCHIP_DA16XXX_SntpTimeZoneSet ( int utc_offset_in_hours, uint32_t minutes, - wifi_onchip_da16200_sntp_daylight_savings_enable_t daylightSavingsEnable) + wifi_onchip_da16xxx_sntp_daylight_savings_enable_t daylightSavingsEnable) { fsp_err_t err = FSP_SUCCESS; uint32_t mutex_flag; - wifi_onchip_da16200_instance_ctrl_t * p_instance_ctrl = &g_rm_wifi_onchip_da16200_instance; + wifi_onchip_da16xxx_instance_ctrl_t * p_instance_ctrl = &g_rm_wifi_onchip_da16xxx_instance; -#if (WIFI_ONCHIP_DA16200_CFG_PARAM_CHECKING_ENABLED == 1) +#if (WIFI_ONCHIP_DA16XXX_CFG_PARAM_CHECKING_ENABLED == 1) FSP_ERROR_RETURN(WIFI_OPEN == p_instance_ctrl->open, FSP_ERR_NOT_OPEN); FSP_ERROR_RETURN(((utc_offset_in_hours >= -12) && (utc_offset_in_hours <= 12)), FSP_ERR_INVALID_ARGUMENT); FSP_ERROR_RETURN((0 == minutes) && (0 == daylightSavingsEnable), FSP_ERR_INVALID_ARGUMENT); #endif - mutex_flag = (WIFI_ONCHIP_DA16200_MUTEX_TX | WIFI_ONCHIP_DA16200_MUTEX_RX); - FSP_ERROR_RETURN(pdTRUE == rm_wifi_onchip_da16200_send_basic_take_mutex(p_instance_ctrl, mutex_flag), + mutex_flag = (WIFI_ONCHIP_DA16XXX_MUTEX_TX | WIFI_ONCHIP_DA16XXX_MUTEX_RX); + FSP_ERROR_RETURN(pdTRUE == rm_wifi_onchip_da16xxx_send_basic_take_mutex(p_instance_ctrl, mutex_flag), FSP_ERR_WIFI_FAILED); int utc_offset_in_secs = (utc_offset_in_hours * HOURS_IN_SECONDS); @@ -2131,15 +2133,15 @@ fsp_err_t RM_WIFI_ONCHIP_DA16200_SntpTimeZoneSet ( "AT+TZONE=%d\r", utc_offset_in_secs); - err = rm_wifi_onchip_da16200_send_basic(p_instance_ctrl, + err = rm_wifi_onchip_da16xxx_send_basic(p_instance_ctrl, p_instance_ctrl->curr_cmd_port, (char *) p_instance_ctrl->cmd_tx_buff, 0, - WIFI_ONCHIP_DA16200_TIMEOUT_400MS, - WIFI_ONCHIP_DA16200_DELAY_200MS, - WIFI_ONCHIP_DA16200_RETURN_TEXT_OK); + WIFI_ONCHIP_DA16XXX_TIMEOUT_400MS, + WIFI_ONCHIP_DA16XXX_DELAY_200MS, + WIFI_ONCHIP_DA16XXX_RETURN_TEXT_OK); - rm_wifi_onchip_da16200_send_basic_give_mutex(p_instance_ctrl, mutex_flag); + rm_wifi_onchip_da16xxx_send_basic_give_mutex(p_instance_ctrl, mutex_flag); FSP_PARAMETER_NOT_USED(minutes); FSP_PARAMETER_NOT_USED(daylightSavingsEnable); @@ -2159,36 +2161,36 @@ fsp_err_t RM_WIFI_ONCHIP_DA16200_SntpTimeZoneSet ( * @retval FSP_ERR_NOT_OPEN Module is not open. * @retval FSP_ERR_INVALID_SIZE String size value passed in exceeds maximum. **********************************************************************************************************************/ -fsp_err_t RM_WIFI_ONCHIP_DA16200_LocalTimeGet (uint8_t * p_local_time, uint32_t size_string) +fsp_err_t RM_WIFI_ONCHIP_DA16XXX_LocalTimeGet (uint8_t * p_local_time, uint32_t size_string) { uint32_t mutex_flag; fsp_err_t ret; - wifi_onchip_da16200_instance_ctrl_t * p_instance_ctrl = &g_rm_wifi_onchip_da16200_instance; + wifi_onchip_da16xxx_instance_ctrl_t * p_instance_ctrl = &g_rm_wifi_onchip_da16xxx_instance; char * p_str = (char *) p_instance_ctrl->cmd_rx_buff; -#if (WIFI_ONCHIP_DA16200_CFG_PARAM_CHECKING_ENABLED == 1) +#if (WIFI_ONCHIP_DA16XXX_CFG_PARAM_CHECKING_ENABLED == 1) FSP_ASSERT(NULL != p_local_time); FSP_ERROR_RETURN(WIFI_OPEN == p_instance_ctrl->open, FSP_ERR_NOT_OPEN); - FSP_ERROR_RETURN(WIFI_ONCHIP_DA16200_LOCAL_TIME_STR_SIZE <= size_string, FSP_ERR_INVALID_SIZE); + FSP_ERROR_RETURN(WIFI_ONCHIP_DA16XXX_LOCAL_TIME_STR_SIZE <= size_string, FSP_ERR_INVALID_SIZE); FSP_ERROR_RETURN(p_instance_ctrl->is_sntp_enabled == true, FSP_ERR_WIFI_FAILED); #endif /* Take mutexes */ - mutex_flag = (WIFI_ONCHIP_DA16200_MUTEX_TX | WIFI_ONCHIP_DA16200_MUTEX_RX); - FSP_ERROR_RETURN(pdTRUE == rm_wifi_onchip_da16200_send_basic_take_mutex(p_instance_ctrl, mutex_flag), + mutex_flag = (WIFI_ONCHIP_DA16XXX_MUTEX_TX | WIFI_ONCHIP_DA16XXX_MUTEX_RX); + FSP_ERROR_RETURN(pdTRUE == rm_wifi_onchip_da16xxx_send_basic_take_mutex(p_instance_ctrl, mutex_flag), FSP_ERR_WIFI_FAILED); memset(p_local_time, 0, size_string); memset((char *) p_instance_ctrl->cmd_rx_buff, 0, sizeof(p_instance_ctrl->cmd_rx_buff)); - ret = rm_wifi_onchip_da16200_send_basic(p_instance_ctrl, + ret = rm_wifi_onchip_da16xxx_send_basic(p_instance_ctrl, p_instance_ctrl->curr_cmd_port, "AT+TIME=?\r", 0, - WIFI_ONCHIP_DA16200_TIMEOUT_2SEC, - WIFI_ONCHIP_DA16200_DELAY_1000MS, - WIFI_ONCHIP_DA16200_RETURN_TEXT_OK); + WIFI_ONCHIP_DA16XXX_TIMEOUT_2SEC, + WIFI_ONCHIP_DA16XXX_DELAY_1000MS, + WIFI_ONCHIP_DA16XXX_RETURN_TEXT_OK); if (FSP_SUCCESS == ret) { /* Parse the response */ @@ -2206,13 +2208,13 @@ fsp_err_t RM_WIFI_ONCHIP_DA16200_LocalTimeGet (uint8_t * p_local_time, uint32_t } } - rm_wifi_onchip_da16200_send_basic_give_mutex(p_instance_ctrl, mutex_flag); + rm_wifi_onchip_da16xxx_send_basic_give_mutex(p_instance_ctrl, mutex_flag); return ret; } /*******************************************************************************************************************//** - * @} (end addtogroup WIFI_ONCHIP_DA16200) + * @} (end addtogroup WIFI_ONCHIP_DA16XXX) **********************************************************************************************************************/ /*! \cond PRIVATE */ @@ -2228,19 +2230,19 @@ fsp_err_t RM_WIFI_ONCHIP_DA16200_LocalTimeGet (uint8_t * p_local_time, uint32_t * @param[in] data_byte Incoming data in byte * **********************************************************************************************************************/ -static void rm_wifi_da16200_handle_incoming_socket_data (da16200_socket_t * pSocket, uint8_t data_byte) +static void rm_wifi_da16xxx_handle_incoming_socket_data (da16xxx_socket_t * pSocket, uint8_t data_byte) { - wifi_onchip_da16200_instance_ctrl_t * p_instance_ctrl = &g_rm_wifi_onchip_da16200_instance; - da16200_socket_t * p_socket = pSocket; + wifi_onchip_da16xxx_instance_ctrl_t * p_instance_ctrl = &g_rm_wifi_onchip_da16xxx_instance; + da16xxx_socket_t * p_socket = pSocket; BaseType_t xHigherPriorityTaskWoken = pdFALSE; // Initialized to pdFALSE. switch (p_socket->socket_recv_state) { - case WIFI_ONCHIP_DA16200_RECV_PREFIX: + case WIFI_ONCHIP_DA16XXX_RECV_PREFIX: { if ('+' == data_byte) { - p_socket->socket_recv_state = WIFI_ONCHIP_DA16200_RECV_CMD; + p_socket->socket_recv_state = WIFI_ONCHIP_DA16XXX_RECV_CMD; rx_data_index = 0; } else @@ -2251,99 +2253,99 @@ static void rm_wifi_da16200_handle_incoming_socket_data (da16200_socket_t * pSoc break; } - case WIFI_ONCHIP_DA16200_RECV_CMD: + case WIFI_ONCHIP_DA16XXX_RECV_CMD: { rx_buffer[rx_data_index++] = data_byte; - rx_data_index = (rx_data_index) % WIFI_ONCHIP_DA16200_TEMP_BUFFER_SIZE; + rx_data_index = (rx_data_index) % WIFI_ONCHIP_DA16XXX_TEMP_BUFFER_SIZE; if (5 == rx_data_index) { /* Check for incoming data through socket */ if (0 == strncmp("TRDTC", (char *) rx_buffer, strlen("TRDTC"))) { - p_socket->socket_recv_state = WIFI_ONCHIP_DA16200_RECV_SUFFIX; + p_socket->socket_recv_state = WIFI_ONCHIP_DA16XXX_RECV_SUFFIX; } /* Check for TCP socket disconnect notification */ else if (0 == strncmp("TRXTC", (char *) rx_buffer, strlen("TRXTC"))) { - p_socket->socket_recv_state = WIFI_ONCHIP_DA16200_RECV_PREFIX; + p_socket->socket_recv_state = WIFI_ONCHIP_DA16XXX_RECV_PREFIX; /* Socket disconnect event received */ p_instance_ctrl->sockets[p_instance_ctrl->curr_socket_index].socket_create_flag = 0; p_instance_ctrl->sockets[p_instance_ctrl->curr_socket_index].socket_status = - WIFI_ONCHIP_DA16200_SOCKET_STATUS_CLOSED; + WIFI_ONCHIP_DA16XXX_SOCKET_STATUS_CLOSED; p_instance_ctrl->sockets[p_instance_ctrl->curr_socket_index].socket_read_write_flag = 0; } else { - p_socket->socket_recv_state = WIFI_ONCHIP_DA16200_RECV_PREFIX; + p_socket->socket_recv_state = WIFI_ONCHIP_DA16XXX_RECV_PREFIX; } } break; } - case WIFI_ONCHIP_DA16200_RECV_SUFFIX: + case WIFI_ONCHIP_DA16XXX_RECV_SUFFIX: { if (':' == data_byte) { - p_socket->socket_recv_state = WIFI_ONCHIP_DA16200_RECV_PARAM_CID; + p_socket->socket_recv_state = WIFI_ONCHIP_DA16XXX_RECV_PARAM_CID; } break; } - case WIFI_ONCHIP_DA16200_RECV_PARAM_CID: + case WIFI_ONCHIP_DA16XXX_RECV_PARAM_CID: { if (',' == data_byte) { - p_socket->socket_recv_state = WIFI_ONCHIP_DA16200_RECV_PARAM_IP; + p_socket->socket_recv_state = WIFI_ONCHIP_DA16XXX_RECV_PARAM_IP; rx_data_index = 0; } break; } - case WIFI_ONCHIP_DA16200_RECV_PARAM_IP: + case WIFI_ONCHIP_DA16XXX_RECV_PARAM_IP: { if (',' == data_byte) { - p_socket->socket_recv_state = WIFI_ONCHIP_DA16200_RECV_PARAM_PORT; + p_socket->socket_recv_state = WIFI_ONCHIP_DA16XXX_RECV_PARAM_PORT; rx_data_index = 0; } break; } - case WIFI_ONCHIP_DA16200_RECV_PARAM_PORT: + case WIFI_ONCHIP_DA16XXX_RECV_PARAM_PORT: { if (',' == data_byte) { - p_socket->socket_recv_state = WIFI_ONCHIP_DA16200_RECV_PARAM_LEN; + p_socket->socket_recv_state = WIFI_ONCHIP_DA16XXX_RECV_PARAM_LEN; rx_data_index = 0; } break; } - case WIFI_ONCHIP_DA16200_RECV_PARAM_LEN: + case WIFI_ONCHIP_DA16XXX_RECV_PARAM_LEN: { if (',' == data_byte) { p_socket->socket_recv_data_len = strtol((char *) rx_buffer, NULL, 10); - p_socket->socket_recv_state = WIFI_ONCHIP_DA16200_RECV_DATA; + p_socket->socket_recv_state = WIFI_ONCHIP_DA16XXX_RECV_DATA; rx_data_index = 0; } else { rx_buffer[rx_data_index++] = data_byte; - rx_data_index = (rx_data_index) % WIFI_ONCHIP_DA16200_TEMP_BUFFER_SIZE; + rx_data_index = (rx_data_index) % WIFI_ONCHIP_DA16XXX_TEMP_BUFFER_SIZE; } break; } - case WIFI_ONCHIP_DA16200_RECV_DATA: + case WIFI_ONCHIP_DA16XXX_RECV_DATA: { if (0 < p_socket->socket_recv_data_len--) { @@ -2355,7 +2357,7 @@ static void rm_wifi_da16200_handle_incoming_socket_data (da16200_socket_t * pSoc if (0 >= p_socket->socket_recv_data_len) { - p_socket->socket_recv_state = WIFI_ONCHIP_DA16200_RECV_PREFIX; + p_socket->socket_recv_state = WIFI_ONCHIP_DA16XXX_RECV_PREFIX; } break; @@ -2369,23 +2371,23 @@ static void rm_wifi_da16200_handle_incoming_socket_data (da16200_socket_t * pSoc * @param[in] p_args Pointer to uart callback structure. * **********************************************************************************************************************/ -void rm_wifi_onchip_da16200_uart_callback (uart_callback_args_t * p_args) +void rm_wifi_onchip_da16xxx_uart_callback (uart_callback_args_t * p_args) { BaseType_t xHigherPriorityTaskWoken = pdFALSE; // Initialized to pdFALSE. - wifi_onchip_da16200_instance_ctrl_t * p_instance_ctrl = &g_rm_wifi_onchip_da16200_instance; + wifi_onchip_da16xxx_instance_ctrl_t * p_instance_ctrl = &g_rm_wifi_onchip_da16xxx_instance; volatile uint32_t uart_context_index = 0; -#if (WIFI_ONCHIP_DA16200_CFG_PARAM_CHECKING_ENABLED == 1) +#if (WIFI_ONCHIP_DA16XXX_CFG_PARAM_CHECKING_ENABLED == 1) if (NULL == p_args) { return; } #endif - if ((NULL != p_instance_ctrl->uart_instance_objects[WIFI_ONCHIP_DA16200_UART_SECOND_PORT]) && + if ((NULL != p_instance_ctrl->uart_instance_objects[WIFI_ONCHIP_DA16XXX_UART_SECOND_PORT]) && (p_args->channel == - p_instance_ctrl->uart_instance_objects[WIFI_ONCHIP_DA16200_UART_SECOND_PORT]->p_cfg->channel)) + p_instance_ctrl->uart_instance_objects[WIFI_ONCHIP_DA16XXX_UART_SECOND_PORT]->p_cfg->channel)) { uart_context_index = 1; } @@ -2396,7 +2398,7 @@ void rm_wifi_onchip_da16200_uart_callback (uart_callback_args_t * p_args) { uint8_t data_byte = (uint8_t) p_args->data; - if (uart_context_index == WIFI_ONCHIP_DA16200_UART_INITIAL_PORT) + if (uart_context_index == WIFI_ONCHIP_DA16XXX_UART_INITIAL_PORT) { if (0 == p_instance_ctrl->sockets[p_instance_ctrl->curr_socket_index].socket_create_flag) { @@ -2405,12 +2407,12 @@ void rm_wifi_onchip_da16200_uart_callback (uart_callback_args_t * p_args) } else // socket data mode { - rm_wifi_da16200_handle_incoming_socket_data(&p_instance_ctrl->sockets[p_instance_ctrl-> + rm_wifi_da16xxx_handle_incoming_socket_data(&p_instance_ctrl->sockets[p_instance_ctrl-> curr_socket_index], data_byte); } } - else if (uart_context_index == WIFI_ONCHIP_DA16200_UART_SECOND_PORT) + else if (uart_context_index == WIFI_ONCHIP_DA16XXX_UART_SECOND_PORT) { xStreamBufferSendFromISR(p_instance_ctrl->socket_byteq_hdl, &data_byte, 1, &xHigherPriorityTaskWoken); } @@ -2442,12 +2444,12 @@ void rm_wifi_onchip_da16200_uart_callback (uart_callback_args_t * p_args) } /*******************************************************************************************************************//** - * Clean up the DA16200 instance. + * Clean up the DA16XXX instance. * - * @param[in] p_instance_ctrl Pointer to DA16200 instance structure. + * @param[in] p_instance_ctrl Pointer to DA16XXX instance structure. * **********************************************************************************************************************/ -static void rm_wifi_onchip_da16200_cleanup_open (wifi_onchip_da16200_instance_ctrl_t * const p_instance_ctrl) +static void rm_wifi_onchip_da16xxx_cleanup_open (wifi_onchip_da16xxx_instance_ctrl_t * const p_instance_ctrl) { /* Delete the semaphores */ if (NULL != p_instance_ctrl->tx_sem) @@ -2469,50 +2471,50 @@ static void rm_wifi_onchip_da16200_cleanup_open (wifi_onchip_da16200_instance_ct p_instance_ctrl->socket_byteq_hdl = NULL; } - if (NULL != p_instance_ctrl->uart_tei_sem[WIFI_ONCHIP_DA16200_UART_INITIAL_PORT]) + if (NULL != p_instance_ctrl->uart_tei_sem[WIFI_ONCHIP_DA16XXX_UART_INITIAL_PORT]) { - vSemaphoreDelete(p_instance_ctrl->uart_tei_sem[WIFI_ONCHIP_DA16200_UART_INITIAL_PORT]); - p_instance_ctrl->uart_tei_sem[WIFI_ONCHIP_DA16200_UART_INITIAL_PORT] = NULL; + vSemaphoreDelete(p_instance_ctrl->uart_tei_sem[WIFI_ONCHIP_DA16XXX_UART_INITIAL_PORT]); + p_instance_ctrl->uart_tei_sem[WIFI_ONCHIP_DA16XXX_UART_INITIAL_PORT] = NULL; } if (p_instance_ctrl->num_uarts > 1) { - if (NULL != p_instance_ctrl->uart_tei_sem[WIFI_ONCHIP_DA16200_UART_SECOND_PORT]) + if (NULL != p_instance_ctrl->uart_tei_sem[WIFI_ONCHIP_DA16XXX_UART_SECOND_PORT]) { - vSemaphoreDelete(p_instance_ctrl->uart_tei_sem[WIFI_ONCHIP_DA16200_UART_SECOND_PORT]); - p_instance_ctrl->uart_tei_sem[WIFI_ONCHIP_DA16200_UART_SECOND_PORT] = NULL; + vSemaphoreDelete(p_instance_ctrl->uart_tei_sem[WIFI_ONCHIP_DA16XXX_UART_SECOND_PORT]); + p_instance_ctrl->uart_tei_sem[WIFI_ONCHIP_DA16XXX_UART_SECOND_PORT] = NULL; } } - uart_instance_t * p_uart = p_instance_ctrl->uart_instance_objects[WIFI_ONCHIP_DA16200_UART_INITIAL_PORT]; - if (SCIU_OPEN == ((rm_wifi_onchip_da16200_uart_instance_ctrl_t *) p_uart->p_ctrl)->open) + uart_instance_t * p_uart = p_instance_ctrl->uart_instance_objects[WIFI_ONCHIP_DA16XXX_UART_INITIAL_PORT]; + if (SCIU_OPEN == ((rm_wifi_onchip_da16xxx_uart_instance_ctrl_t *) p_uart->p_ctrl)->open) { p_uart->p_api->close(p_uart->p_ctrl); } - p_uart = p_instance_ctrl->uart_instance_objects[WIFI_ONCHIP_DA16200_UART_SECOND_PORT]; - if (SCIU_OPEN == ((rm_wifi_onchip_da16200_uart_instance_ctrl_t *) p_uart->p_ctrl)->open) + p_uart = p_instance_ctrl->uart_instance_objects[WIFI_ONCHIP_DA16XXX_UART_SECOND_PORT]; + if (SCIU_OPEN == ((rm_wifi_onchip_da16xxx_uart_instance_ctrl_t *) p_uart->p_ctrl)->open) { p_uart->p_api->close(p_uart->p_ctrl); } } /*******************************************************************************************************************//** - * Resets the DA16200 module. + * Resets the DA16XXX module. * - * @param[in] p_instance_ctrl Pointer to DA16200 instance structure. + * @param[in] p_instance_ctrl Pointer to DA16XXX instance structure. * **********************************************************************************************************************/ -static void rm_wifi_onchip_da16200_wifi_module_reset (wifi_onchip_da16200_instance_ctrl_t * const p_instance_ctrl) +static void rm_wifi_onchip_da16xxx_wifi_module_reset (wifi_onchip_da16xxx_instance_ctrl_t * const p_instance_ctrl) { /* Reset the wifi module */ g_ioport.p_api->pinWrite(g_ioport.p_ctrl, p_instance_ctrl->reset_pin, BSP_IO_LEVEL_LOW); - vTaskDelay(pdMS_TO_TICKS(WIFI_ONCHIP_DA16200_TIMEOUT_20MS)); + vTaskDelay(pdMS_TO_TICKS(WIFI_ONCHIP_DA16XXX_TIMEOUT_20MS)); g_ioport.p_api->pinWrite(g_ioport.p_ctrl, p_instance_ctrl->reset_pin, BSP_IO_LEVEL_HIGH); - vTaskDelay(pdMS_TO_TICKS(WIFI_ONCHIP_DA16200_TIMEOUT_1MS)); + vTaskDelay(pdMS_TO_TICKS(WIFI_ONCHIP_DA16XXX_TIMEOUT_1MS)); } /*******************************************************************************************************************//** @@ -2523,12 +2525,12 @@ static void rm_wifi_onchip_da16200_wifi_module_reset (wifi_onchip_da16200_instan * * @retval pdTrue Function completed successfully. **********************************************************************************************************************/ -static BaseType_t rm_wifi_onchip_da16200_send_basic_give_mutex (wifi_onchip_da16200_instance_ctrl_t * p_instance_ctrl, +static BaseType_t rm_wifi_onchip_da16xxx_send_basic_give_mutex (wifi_onchip_da16xxx_instance_ctrl_t * p_instance_ctrl, uint32_t mutex_flag) { BaseType_t volatile xSemRet = pdFALSE; - if (0 != (mutex_flag & WIFI_ONCHIP_DA16200_MUTEX_RX)) + if (0 != (mutex_flag & WIFI_ONCHIP_DA16XXX_MUTEX_RX)) { xSemRet = xSemaphoreGive(p_instance_ctrl->rx_sem); if (xSemRet != pdTRUE) @@ -2537,7 +2539,7 @@ static BaseType_t rm_wifi_onchip_da16200_send_basic_give_mutex (wifi_onchip_da16 } } - if (0 != (mutex_flag & WIFI_ONCHIP_DA16200_MUTEX_TX)) + if (0 != (mutex_flag & WIFI_ONCHIP_DA16XXX_MUTEX_TX)) { xSemRet = xSemaphoreGive(p_instance_ctrl->tx_sem); if (xSemRet != pdTRUE) @@ -2557,18 +2559,18 @@ static BaseType_t rm_wifi_onchip_da16200_send_basic_give_mutex (wifi_onchip_da16 * * @retval pdTrue Function completed successfully. **********************************************************************************************************************/ -static BaseType_t rm_wifi_onchip_da16200_send_basic_take_mutex (wifi_onchip_da16200_instance_ctrl_t * p_instance_ctrl, +static BaseType_t rm_wifi_onchip_da16xxx_send_basic_take_mutex (wifi_onchip_da16xxx_instance_ctrl_t * p_instance_ctrl, uint32_t mutex_flag) { BaseType_t volatile xSemRet = pdFALSE; - if (0 != (mutex_flag & WIFI_ONCHIP_DA16200_MUTEX_TX)) + if (0 != (mutex_flag & WIFI_ONCHIP_DA16XXX_MUTEX_TX)) { if (NULL != p_instance_ctrl->tx_sem) { xSemRet = xSemaphoreTake(p_instance_ctrl->tx_sem, - (wifi_sx_wifi_onchip_da16200_sem_block_timeout / portTICK_PERIOD_MS)); + (wifi_sx_wifi_onchip_da16xxx_sem_block_timeout / portTICK_PERIOD_MS)); if (xSemRet != pdTRUE) { return pdFALSE; @@ -2576,16 +2578,16 @@ static BaseType_t rm_wifi_onchip_da16200_send_basic_take_mutex (wifi_onchip_da16 } } - if (0 != (mutex_flag & WIFI_ONCHIP_DA16200_MUTEX_RX)) + if (0 != (mutex_flag & WIFI_ONCHIP_DA16XXX_MUTEX_RX)) { if (NULL != p_instance_ctrl->rx_sem) { xSemRet = xSemaphoreTake(p_instance_ctrl->rx_sem, - (wifi_sx_wifi_onchip_da16200_sem_block_timeout / portTICK_PERIOD_MS)); + (wifi_sx_wifi_onchip_da16xxx_sem_block_timeout / portTICK_PERIOD_MS)); if (xSemRet != pdTRUE) { - if (0 != (mutex_flag & WIFI_ONCHIP_DA16200_MUTEX_TX)) + if (0 != (mutex_flag & WIFI_ONCHIP_DA16XXX_MUTEX_TX)) { xSemaphoreGive(p_instance_ctrl->tx_sem); } @@ -2614,7 +2616,7 @@ static BaseType_t rm_wifi_onchip_da16200_send_basic_take_mutex (wifi_onchip_da16 * @retval FSP_ERR_ASSERTION Assertion error occurred. * @retval FSP_ERR_INVALID_DATA Accuracy of data is not guaranteed **********************************************************************************************************************/ -static fsp_err_t rm_wifi_onchip_da16200_send_basic (wifi_onchip_da16200_instance_ctrl_t * p_instance_ctrl, +static fsp_err_t rm_wifi_onchip_da16xxx_send_basic (wifi_onchip_da16xxx_instance_ctrl_t * p_instance_ctrl, uint32_t serial_ch_id, const char * p_textstring, uint32_t length, @@ -2624,19 +2626,16 @@ static fsp_err_t rm_wifi_onchip_da16200_send_basic (wifi_onchip_da16200_instance { fsp_err_t err = FSP_SUCCESS; volatile uint8_t retry_count = 0U; - uint32_t recvcnt = 0; char * ret = NULL; -#if (WIFI_ONCHIP_DA16200_CFG_PARAM_CHECKING_ENABLED == 1) +#if (WIFI_ONCHIP_DA16XXX_CFG_PARAM_CHECKING_ENABLED == 1) FSP_ASSERT(NULL != p_textstring); #endif - memset(p_instance_ctrl->cmd_rx_buff, 0, sizeof(p_instance_ctrl->cmd_rx_buff)); + memset(p_instance_ctrl->p_current_cmd_rx_buffer, 0, p_instance_ctrl->current_cmd_rx_buffer_size); if (p_textstring != NULL) { - recvcnt = 0; - if (uxQueueMessagesWaiting((QueueHandle_t) p_instance_ctrl->uart_tei_sem[serial_ch_id]) != 0) { return FSP_ERR_WIFI_FAILED; @@ -2667,22 +2666,23 @@ static fsp_err_t rm_wifi_onchip_da16200_send_basic (wifi_onchip_da16200_instance FSP_ERR_WIFI_FAILED); } - for (retry_count = 0; retry_count < WIFI_ONCHIP_DA16200_CFG_MAX_RETRIES_UART_COMMS; retry_count++) + for (retry_count = 0; retry_count < WIFI_ONCHIP_DA16XXX_CFG_MAX_RETRIES_UART_COMMS; retry_count++) { if (NULL != p_expect_code) { /* Get the transmitted message from the stream buffer */ - xStreamBufferSetTriggerLevel(p_instance_ctrl->socket_byteq_hdl, sizeof(p_instance_ctrl->cmd_rx_buff)); + xStreamBufferSetTriggerLevel(p_instance_ctrl->socket_byteq_hdl, + p_instance_ctrl->current_cmd_rx_buffer_size); size_t xReceivedBytes = xStreamBufferReceiveAlt(p_instance_ctrl->socket_byteq_hdl, - &p_instance_ctrl->cmd_rx_buff[recvcnt], - (int) sizeof(p_instance_ctrl->cmd_rx_buff), + p_instance_ctrl->p_current_cmd_rx_buffer, + p_instance_ctrl->current_cmd_rx_buffer_size, pdMS_TO_TICKS(timeout_ms)); /* Response data check */ if (xReceivedBytes > 0) { - ret = strstr((char *) &p_instance_ctrl->cmd_rx_buff[0], p_expect_code); + ret = strstr((char *) p_instance_ctrl->p_current_cmd_rx_buffer, p_expect_code); if (ret == NULL) { R_BSP_SoftwareDelay(retry_delay, BSP_DELAY_UNITS_MILLISECONDS); @@ -2703,12 +2703,12 @@ static fsp_err_t rm_wifi_onchip_da16200_send_basic (wifi_onchip_da16200_instance } } - FSP_ERROR_RETURN(WIFI_ONCHIP_DA16200_CFG_MAX_RETRIES_UART_COMMS != (retry_count), FSP_ERR_WIFI_FAILED); + FSP_ERROR_RETURN(WIFI_ONCHIP_DA16XXX_CFG_MAX_RETRIES_UART_COMMS != (retry_count), FSP_ERR_WIFI_FAILED); if (ret == NULL) { - if (p_instance_ctrl->cmd_rx_buff[0] != 0) + if (p_instance_ctrl->p_current_cmd_rx_buffer[0] != 0) { - err = rm_wifi_onchip_da16200_error_lookup((char *) p_instance_ctrl->cmd_rx_buff); + err = rm_wifi_onchip_da16xxx_error_lookup((char *) p_instance_ctrl->p_current_cmd_rx_buffer); } } @@ -2716,27 +2716,27 @@ static fsp_err_t rm_wifi_onchip_da16200_send_basic (wifi_onchip_da16200_instance } /*******************************************************************************************************************//** - * Parse the incoming DA16200 error code and translates into FSP error. + * Parse the incoming DA16XXX error code and translates into FSP error. * * @param[in] p_resp Pointer to response string. * - * @retval FSP_ERR_WIFI_UNKNOWN_AT_CMD DA16200 Unknown AT command Error. - * @retval FSP_ERR_WIFI_INSUF_PARAM DA16200 Insufficient parameter. - * @retval FSP_ERR_WIFI_TOO_MANY_PARAMS DA16200 Too many parameters. - * @retval FSP_ERR_WIFI_INV_PARAM_VAL DA16200 Wrong parameter value. + * @retval FSP_ERR_WIFI_UNKNOWN_AT_CMD DA16XXX Unknown AT command Error. + * @retval FSP_ERR_WIFI_INSUF_PARAM DA16XXX Insufficient parameter. + * @retval FSP_ERR_WIFI_TOO_MANY_PARAMS DA16XXX Too many parameters. + * @retval FSP_ERR_WIFI_INV_PARAM_VAL DA16XXX Wrong parameter value. * @retval FSP_ERR_UNSUPPORTED Selected mode not supported by this API. - * @retval FSP_ERR_WIFI_AP_NOT_CONNECTED DA16200 Not connected to an AP or Communication peer. - * @retval FSP_ERR_WIFI_NO_RESULT DA16200 No result. - * @retval FSP_ERR_WIFI_RSP_BUF_OVFLW DA16200 Response buffer overflow. - * @retval FSP_ERR_WIFI_FUNC_NOT_CONFIG DA16200 Function is not configured. + * @retval FSP_ERR_WIFI_AP_NOT_CONNECTED DA16XXX Not connected to an AP or Communication peer. + * @retval FSP_ERR_WIFI_NO_RESULT DA16XXX No result. + * @retval FSP_ERR_WIFI_RSP_BUF_OVFLW DA16XXX Response buffer overflow. + * @retval FSP_ERR_WIFI_FUNC_NOT_CONFIG DA16XXX Function is not configured. * @retval FSP_ERR_TIMEOUT Timeout error - * @retval FSP_ERR_WIFI_NVRAM_WR_FAIL DA16200 NVRAM write failure - * @retval FSP_ERR_WIFI_RET_MEM_WR_FAIL DA16200 Retention memory write failure - * @retval FSP_ERR_WIFI_UNKNOWN_ERR DA16200 unknown error + * @retval FSP_ERR_WIFI_NVRAM_WR_FAIL DA16XXX NVRAM write failure + * @retval FSP_ERR_WIFI_RET_MEM_WR_FAIL DA16XXX Retention memory write failure + * @retval FSP_ERR_WIFI_UNKNOWN_ERR DA16XXX unknown error * @retval FSP_ERR_INVALID_DATA Accuracy of data is not guaranteed * @retval FSP_ERR_INTERNAL Internal error **********************************************************************************************************************/ -static fsp_err_t rm_wifi_onchip_da16200_error_lookup (char * p_resp) +static fsp_err_t rm_wifi_onchip_da16xxx_error_lookup (char * p_resp) { int8_t err_code; int32_t scanf_ret; @@ -2751,79 +2751,79 @@ static fsp_err_t rm_wifi_onchip_da16200_error_lookup (char * p_resp) switch (err_code) { - case WIFI_ONCHIP_DA16200_ERR_UNKNOWN_CMD: + case WIFI_ONCHIP_DA16XXX_ERR_UNKNOWN_CMD: { err = FSP_ERR_WIFI_UNKNOWN_AT_CMD; break; } - case WIFI_ONCHIP_DA16200_ERR_INSUF_PARAMS: + case WIFI_ONCHIP_DA16XXX_ERR_INSUF_PARAMS: { err = FSP_ERR_WIFI_INSUF_PARAM; break; } - case WIFI_ONCHIP_DA16200_ERR_TOO_MANY_PARAMS: + case WIFI_ONCHIP_DA16XXX_ERR_TOO_MANY_PARAMS: { err = FSP_ERR_WIFI_TOO_MANY_PARAMS; break; } - case WIFI_ONCHIP_DA16200_ERR_INVALID_PARAM: + case WIFI_ONCHIP_DA16XXX_ERR_INVALID_PARAM: { err = FSP_ERR_WIFI_INV_PARAM_VAL; break; } - case WIFI_ONCHIP_DA16200_ERR_UNSUPPORTED_FUN: + case WIFI_ONCHIP_DA16XXX_ERR_UNSUPPORTED_FUN: { err = FSP_ERR_UNSUPPORTED; break; } - case WIFI_ONCHIP_DA16200_ERR_NOT_CONNECTED_AP: + case WIFI_ONCHIP_DA16XXX_ERR_NOT_CONNECTED_AP: { err = FSP_ERR_WIFI_AP_NOT_CONNECTED; break; } - case WIFI_ONCHIP_DA16200_ERR_NO_RESULT: + case WIFI_ONCHIP_DA16XXX_ERR_NO_RESULT: { err = FSP_ERR_WIFI_NO_RESULT; break; } - case WIFI_ONCHIP_DA16200_ERR_RESP_BUF_OVERFLOW: + case WIFI_ONCHIP_DA16XXX_ERR_RESP_BUF_OVERFLOW: { err = FSP_ERR_WIFI_RSP_BUF_OVFLW; break; } - case WIFI_ONCHIP_DA16200_ERR_FUNC_NOT_CONFIG: + case WIFI_ONCHIP_DA16XXX_ERR_FUNC_NOT_CONFIG: { err = FSP_ERR_WIFI_FUNC_NOT_CONFIG; break; } - case WIFI_ONCHIP_DA16200_ERR_CMD_TIMEOUT: + case WIFI_ONCHIP_DA16XXX_ERR_CMD_TIMEOUT: { err = FSP_ERR_TIMEOUT; break; } - case WIFI_ONCHIP_DA16200_ERR_NVRAM_WR_FAIL: + case WIFI_ONCHIP_DA16XXX_ERR_NVRAM_WR_FAIL: { err = FSP_ERR_WIFI_NVRAM_WR_FAIL; break; } - case WIFI_ONCHIP_DA16200_ERR_RETEN_MEM_WR_FAIL: + case WIFI_ONCHIP_DA16XXX_ERR_RETEN_MEM_WR_FAIL: { err = FSP_ERR_WIFI_RET_MEM_WR_FAIL; break; } - case WIFI_ONCHIP_DA16200_ERR_UNKNOWN: + case WIFI_ONCHIP_DA16XXX_ERR_UNKNOWN: { err = FSP_ERR_WIFI_UNKNOWN_ERR; break; @@ -3094,4 +3094,100 @@ static size_t xStreamBufferReceiveAlt (StreamBufferHandle_t xStreamBuffer, return xReceivedLength; } +/*******************************************************************************************************************//** + * Send an AT command with testing for return response. + * + * @param[in] timeout_ms Timeout in milliseconds. + * @param[in] delay_ms Delay in milliseconds. + * @param[in] response Expected response from the module + * + * @retval FSP_SUCCESS Function completed successfully. + * @retval FSP_ERR_WIFI_FAILED Error occurred with command to Wifi module. + * @retval FSP_ERR_ASSERTION Assertion error occurred. + * @retval FSP_ERR_INVALID_DATA Accuracy of data is not guaranteed + **********************************************************************************************************************/ +fsp_err_t rm_wifi_onchip_da16xxx_at_command_send (const char * p_textstring, + uint8_t * const p_response_buffer, + uint32_t response_buffer_size, + uint32_t timeout_ms, + uint32_t delay_ms, + char * response) +{ + fsp_err_t err = FSP_SUCCESS; + wifi_onchip_da16xxx_instance_ctrl_t * p_instance_ctrl = &g_rm_wifi_onchip_da16xxx_instance; + uint32_t mutex_flag; + +#if (WIFI_ONCHIP_DA16XXX_CFG_PARAM_CHECKING_ENABLED == 1) + FSP_ERROR_RETURN(WIFI_OPEN == p_instance_ctrl->open, FSP_ERR_NOT_OPEN); +#endif + + mutex_flag = (WIFI_ONCHIP_DA16XXX_MUTEX_TX | WIFI_ONCHIP_DA16XXX_MUTEX_RX); + + FSP_ERROR_RETURN(pdTRUE == rm_wifi_onchip_da16xxx_send_basic_take_mutex(p_instance_ctrl, mutex_flag), + FSP_ERR_WIFI_FAILED); + + /* After taking the mutex set the response buffer to the one passed in. */ + p_instance_ctrl->p_current_cmd_rx_buffer = p_response_buffer; + p_instance_ctrl->current_cmd_rx_buffer_size = response_buffer_size; + + err = rm_wifi_onchip_da16xxx_send_basic(p_instance_ctrl, + p_instance_ctrl->curr_cmd_port, + p_textstring, + 0, + timeout_ms, + delay_ms, + response); + + /* Restore back to the original WiFi buffer after getting the response */ + p_instance_ctrl->p_current_cmd_rx_buffer = p_instance_ctrl->cmd_rx_buff; + p_instance_ctrl->current_cmd_rx_buffer_size = sizeof(p_instance_ctrl->cmd_rx_buff); + + rm_wifi_onchip_da16xxx_send_basic_give_mutex(p_instance_ctrl, mutex_flag); + + /* Check response for 'OK' */ + FSP_ERROR_RETURN(FSP_SUCCESS == err, FSP_ERR_WIFI_FAILED); + + return FSP_SUCCESS; +} + +/*******************************************************************************************************************//** + * Receive data from stream buffer. + * + * @param[in] trigger_level Trigger level for stream buffer + * + * @retval FSP_SUCCESS Function completed successfully. + * @retval FSP_ERR_WIFI_FAILED Error occurred with command to Wifi module. + * @retval FSP_ERR_ASSERTION Assertion error occurred. + * @retval FSP_ERR_INVALID_DATA Accuracy of data is not guaranteed + **********************************************************************************************************************/ +size_t rm_wifi_onchip_da16xxx_buffer_recv (const char * p_data, + uint32_t length, + uint32_t rx_timeout, + size_t trigger_level) +{ + wifi_onchip_da16xxx_instance_ctrl_t * p_instance_ctrl = &g_rm_wifi_onchip_da16xxx_instance; + size_t xReceivedBytes; + uint32_t mutex_flag; + +#if (WIFI_ONCHIP_DA16XXX_CFG_PARAM_CHECKING_ENABLED == 1) + FSP_ASSERT(NULL != p_data); + FSP_ERROR_RETURN(WIFI_OPEN == p_instance_ctrl->open, FSP_ERR_NOT_OPEN); +#endif + FSP_ERROR_RETURN(trigger_level > length, FSP_ERR_INVALID_DATA); + + mutex_flag = (WIFI_ONCHIP_DA16XXX_MUTEX_RX); + + rm_wifi_onchip_da16xxx_send_basic_take_mutex(p_instance_ctrl, mutex_flag); + + /* Get the transmitted message from the stream buffer */ + xStreamBufferSetTriggerLevel(p_instance_ctrl->socket_byteq_hdl, trigger_level); + + xReceivedBytes = + xStreamBufferReceiveAlt(p_instance_ctrl->socket_byteq_hdl, (char *) p_data, length, pdMS_TO_TICKS(rx_timeout)); + + rm_wifi_onchip_da16xxx_send_basic_give_mutex(p_instance_ctrl, mutex_flag); + + return xReceivedBytes; +} + /*! \endcond */ diff --git a/ra/fsp/src/rm_zmod4xxx/iaq_1st_gen/rm_zmod4410_iaq_1st_gen.c b/ra/fsp/src/rm_zmod4xxx/iaq_1st_gen/rm_zmod4410_iaq_1st_gen.c index f2b704bcc..1ef9e54e0 100644 --- a/ra/fsp/src/rm_zmod4xxx/iaq_1st_gen/rm_zmod4410_iaq_1st_gen.c +++ b/ra/fsp/src/rm_zmod4xxx/iaq_1st_gen/rm_zmod4410_iaq_1st_gen.c @@ -81,6 +81,12 @@ static fsp_err_t rm_zmod4410_iaq_1st_gen_oaq_2nd_gen_data_calculate(rm_zmod4xxx_ static fsp_err_t rm_zmod4410_iaq_1st_gen_raq_data_calculate(rm_zmod4xxx_ctrl_t * const p_api_ctrl, rm_zmod4xxx_raw_data_t * const p_raw_data, rm_zmod4xxx_raq_data_t * const p_zmod4xxx_data); +static fsp_err_t rm_zmod4410_iaq_1st_gen_rel_iaq_data_calculate(rm_zmod4xxx_ctrl_t * const p_api_ctrl, + rm_zmod4xxx_raw_data_t * const p_raw_data, + rm_zmod4xxx_rel_iaq_data_t * const p_zmod4xxx_data); +static fsp_err_t rm_zmod4410_iaq_1st_gen_pbaq_data_calculate(rm_zmod4xxx_ctrl_t * const p_api_ctrl, + rm_zmod4xxx_raw_data_t * const p_raw_data, + rm_zmod4xxx_pbaq_data_t * const p_zmod4xxx_data); static fsp_err_t rm_zmod4410_iaq_1st_gen_close(rm_zmod4xxx_ctrl_t * const p_api_ctrl); static fsp_err_t rm_zmod4410_iaq_1st_gen_device_error_check(rm_zmod4xxx_ctrl_t * const p_api_ctrl); @@ -102,6 +108,8 @@ rm_zmod4xxx_api_t const g_zmod4xxx_on_zmod4410_iaq_1st_gen = .oaq1stGenDataCalculate = rm_zmod4410_iaq_1st_gen_oaq_1st_gen_data_calculate, .oaq2ndGenDataCalculate = rm_zmod4410_iaq_1st_gen_oaq_2nd_gen_data_calculate, .raqDataCalculate = rm_zmod4410_iaq_1st_gen_raq_data_calculate, + .relIaqDataCalculate = rm_zmod4410_iaq_1st_gen_rel_iaq_data_calculate, + .pbaqDataCalculate = rm_zmod4410_iaq_1st_gen_pbaq_data_calculate, .temperatureAndHumiditySet = rm_zmod4410_iaq_1st_gen_temperature_and_humidity_set, .deviceErrorCheck = rm_zmod4410_iaq_1st_gen_device_error_check, }; @@ -342,6 +350,38 @@ static fsp_err_t rm_zmod4410_iaq_1st_gen_raq_data_calculate (rm_zmod4xxx_ctrl_t return FSP_ERR_UNSUPPORTED; } +/*******************************************************************************************************************//** + * @brief Unsupported API. + * + * @retval FSP_ERR_UNSUPPORTED Operation mode is not supported. + **********************************************************************************************************************/ +static fsp_err_t rm_zmod4410_iaq_1st_gen_rel_iaq_data_calculate (rm_zmod4xxx_ctrl_t * const p_api_ctrl, + rm_zmod4xxx_raw_data_t * const p_raw_data, + rm_zmod4xxx_rel_iaq_data_t * const p_zmod4xxx_data) +{ + FSP_PARAMETER_NOT_USED(p_api_ctrl); + FSP_PARAMETER_NOT_USED(p_raw_data); + FSP_PARAMETER_NOT_USED(p_zmod4xxx_data); + + return FSP_ERR_UNSUPPORTED; +} + +/*******************************************************************************************************************//** + * @brief Unsupported API. + * + * @retval FSP_ERR_UNSUPPORTED Operation mode is not supported. + **********************************************************************************************************************/ +static fsp_err_t rm_zmod4410_iaq_1st_gen_pbaq_data_calculate (rm_zmod4xxx_ctrl_t * const p_api_ctrl, + rm_zmod4xxx_raw_data_t * const p_raw_data, + rm_zmod4xxx_pbaq_data_t * const p_zmod4xxx_data) +{ + FSP_PARAMETER_NOT_USED(p_api_ctrl); + FSP_PARAMETER_NOT_USED(p_raw_data); + FSP_PARAMETER_NOT_USED(p_zmod4xxx_data); + + return FSP_ERR_UNSUPPORTED; +} + /*******************************************************************************************************************//** * @brief Unsupported API. * diff --git a/ra/fsp/src/rm_zmod4xxx/iaq_2nd_gen/iaq_2nd_gen.h b/ra/fsp/src/rm_zmod4xxx/iaq_2nd_gen/iaq_2nd_gen.h index 5e234e337..a2b28f43a 100644 --- a/ra/fsp/src/rm_zmod4xxx/iaq_2nd_gen/iaq_2nd_gen.h +++ b/ra/fsp/src/rm_zmod4xxx/iaq_2nd_gen/iaq_2nd_gen.h @@ -19,26 +19,26 @@ **********************************************************************************************************************/ /** - * @file iaq_2nd_gen.h - * @author Renesas Electronics Corporation - * @version 2.2.0 - * @brief This file contains the data structure definitions and - * the function definitions for the 2nd generation IAQ algorithm. - * @details The library contains an algorithm to calculate an EtOH, TVOC and - * IAQ index from ZMOD4410 measurements. - * The implementation is made to allow more than one sensor. - * - */ + * @file iaq_2nd_gen.h + * @author Renesas Electronics Corporation + * @version 3.1.0 + * @brief This file contains the data structure definitions and + * the function definitions for the 2nd generation IAQ algorithm. + * @details The library contains an algorithm to calculate an EtOH, TVOC and + * IAQ index from ZMOD4410 measurements. + * The implementation is made to allow more than one sensor. + * + */ #ifndef IAQ_2ND_GEN_H_ - #define IAQ_2ND_GEN_H_ +#define IAQ_2ND_GEN_H_ - #ifdef __cplusplus +#ifdef __cplusplus extern "C" { - #endif +#endif - #include <stdint.h> - #include <math.h> +#include <stdint.h> +#include <math.h> #if TEST_RM_ZMOD4XXX // For RA FSP test #include "../../../../../fsp/src/rm_zmod4xxx/zmod4xxx_types.h" @@ -49,73 +49,80 @@ extern "C" { /** \addtogroup RetCodes Return codes of the algorithm functions. * @{ */ - #define IAQ_2ND_GEN_OK (0) /**< everything okay */ - #define IAQ_2ND_GEN_STABILIZATION (1) /**< sensor in stabilization */ +#define IAQ_2ND_GEN_OK (0) /**< everything okay */ +#define IAQ_2ND_GEN_STABILIZATION (1) /**< sensor in stabilization */ +#define IAQ_2ND_GEN_DAMAGE (-102) /**< sensor damaged */ /** @}*/ /** - * @brief Variables that describe the sensor or the algorithm state. - */ -typedef struct -{ - float log_rcda[9]; /**< log10 of CDA resistances. */ - uint8_t - stabilization_sample; /**< Number of remaining stabilization samples. */ +* @brief Variables that describe the sensor or the algorithm state. +*/ +typedef struct { + float log_rcda[9]; /**< log10 of CDA resistances. */ + float rh_cda; + float t_cda; + uint32_t sample_counter; + float rg_mean; + float var_log10_rel_iaq; uint8_t need_filter_init; - float tvoc_smooth; - float tvoc_deltafilter; - float acchw; - float accow; - float etoh; - float tvoc; - float eco2; - float iaq; + float rel_iaq_smooth; + float rel_iaq_deltafilter; + float eco2_untracked; + float min_tracking; + float acchw; + float accow; + float etoh; + float iaq; } iaq_2nd_gen_handle_t; /** - * @brief Variables that receive the algorithm outputs. - */ -typedef struct -{ - float rmox[13]; /**< MOx resistance. */ - float log_rcda; /**< log10 of CDA resistance. */ - float iaq; /**< IAQ index. */ - float tvoc; /**< TVOC concentration (mg/m^3). */ - float etoh; /**< EtOH concentration (ppm). */ - float eco2; /**< eCO2 concentration (ppm). */ +* @brief Variables that receive the algorithm outputs. +*/ +typedef struct { + float rmox[13]; /**< MOx resistance. */ + float log_rcda; /**< log10 of CDA resistance. */ + float rhtr; /**< heater resistance. */ + float temperature; /**< ambient temperature (degC). */ + float iaq; /**< IAQ index. */ + float tvoc; /**< TVOC concentration (mg/m^3). */ + float etoh; /**< EtOH concentration (ppm). */ + float eco2; /**< eCO2 concentration (ppm). */ } iaq_2nd_gen_results_t; /** - * @brief Algorithm input structure - * @param [in] adc_result Array of 32 bytes with the values from the sensor results table. - */ -typedef struct -{ - uint8_t * adc_result; /** Sensor raw values. **/ +* @brief Variables that are needed for algorithm + * @param [in] adc_result Value from read_adc_result function + * @param [in] humidity_pct relative ambient humidity (%) + * @param [in] temperature_degc ambient temperature (degC) +*/ +typedef struct { + uint8_t *adc_result; + float humidity_pct; + float temperature_degc; } iaq_2nd_gen_inputs_t; /** - * @brief calculates IAQ results from present sample. + * @brief calculates algorithm results from present sample. * @param [in] handle Pointer to algorithm state variable. * @param [in] dev Pointer to the device. * @param [in] algo_input Structure containing inputs required for algo calculation. * @param [out] results Pointer for storing the algorithm results. * @return error code. */ -int8_t calc_iaq_2nd_gen(iaq_2nd_gen_handle_t * handle, - zmod4xxx_dev_t * dev, - const iaq_2nd_gen_inputs_t * algo_input, - iaq_2nd_gen_results_t * results); +int8_t calc_iaq_2nd_gen(iaq_2nd_gen_handle_t *handle, const zmod4xxx_dev_t *dev, + const iaq_2nd_gen_inputs_t *algo_input, + iaq_2nd_gen_results_t *results); /** - * @brief Initializes the IAQ algorithm. + * @brief Initializes the algorithm. * @param [out] handle Pointer to algorithm state variable. * @return error code. - */ -int8_t init_iaq_2nd_gen(iaq_2nd_gen_handle_t * handle); +*/ +int8_t init_iaq_2nd_gen(iaq_2nd_gen_handle_t *handle); - #ifdef __cplusplus +#ifdef __cplusplus } - #endif +#endif + +#endif /* IAQ_2ND_GEN_H_ */ -#endif /* IAQ_2ND_GEN_H_ */ diff --git a/ra/fsp/src/rm_zmod4xxx/iaq_2nd_gen/rm_zmod4410_iaq_2nd_gen.c b/ra/fsp/src/rm_zmod4xxx/iaq_2nd_gen/rm_zmod4410_iaq_2nd_gen.c index ae9d15250..7e4a381cd 100644 --- a/ra/fsp/src/rm_zmod4xxx/iaq_2nd_gen/rm_zmod4410_iaq_2nd_gen.c +++ b/ra/fsp/src/rm_zmod4xxx/iaq_2nd_gen/rm_zmod4410_iaq_2nd_gen.c @@ -39,6 +39,10 @@ * Macro definitions *********************************************************************************************************************/ +/* Definitions of IAQ 2nd gen Parameter */ + #define RM_ZMOD4410_IAQ_2ND_GEN_DEFAULT_HUMIDITY (50.0F) + #define RM_ZMOD4410_IAQ_2ND_GEN_DEFAULT_TEMPERATURE (20.0F) + /********************************************************************************************************************** * Local Typedef definitions *********************************************************************************************************************/ @@ -82,6 +86,12 @@ static fsp_err_t rm_zmod4410_iaq_2nd_gen_oaq_2nd_gen_data_calculate(rm_zmod4xxx_ static fsp_err_t rm_zmod4410_iaq_2nd_gen_raq_data_calculate(rm_zmod4xxx_ctrl_t * const p_api_ctrl, rm_zmod4xxx_raw_data_t * const p_raw_data, rm_zmod4xxx_raq_data_t * const p_zmod4xxx_data); +static fsp_err_t rm_zmod4410_iaq_2nd_gen_rel_iaq_data_calculate(rm_zmod4xxx_ctrl_t * const p_api_ctrl, + rm_zmod4xxx_raw_data_t * const p_raw_data, + rm_zmod4xxx_rel_iaq_data_t * const p_zmod4xxx_data); +static fsp_err_t rm_zmod4410_iaq_2nd_gen_pbaq_data_calculate(rm_zmod4xxx_ctrl_t * const p_api_ctrl, + rm_zmod4xxx_raw_data_t * const p_raw_data, + rm_zmod4xxx_pbaq_data_t * const p_zmod4xxx_data); static fsp_err_t rm_zmod4410_iaq_2nd_gen_close(rm_zmod4xxx_ctrl_t * const p_api_ctrl); static fsp_err_t rm_zmod4410_iaq_2nd_gen_device_error_check(rm_zmod4xxx_ctrl_t * const p_api_ctrl); @@ -103,6 +113,8 @@ rm_zmod4xxx_api_t const g_zmod4xxx_on_zmod4410_iaq_2nd_gen = .oaq1stGenDataCalculate = rm_zmod4410_iaq_2nd_gen_oaq_1st_gen_data_calculate, .oaq2ndGenDataCalculate = rm_zmod4410_iaq_2nd_gen_oaq_2nd_gen_data_calculate, .raqDataCalculate = rm_zmod4410_iaq_2nd_gen_raq_data_calculate, + .relIaqDataCalculate = rm_zmod4410_iaq_2nd_gen_rel_iaq_data_calculate, + .pbaqDataCalculate = rm_zmod4410_iaq_2nd_gen_pbaq_data_calculate, .temperatureAndHumiditySet = rm_zmod4410_iaq_2nd_gen_temperature_and_humidity_set, .deviceErrorCheck = rm_zmod4410_iaq_2nd_gen_device_error_check, }; @@ -127,6 +139,10 @@ static fsp_err_t rm_zmod4410_iaq_2nd_gen_open (rm_zmod4xxx_ctrl_t * const p FSP_PARAMETER_NOT_USED(p_cfg); + /* Set default temperature and humidity */ + p_lib->temperature = RM_ZMOD4410_IAQ_2ND_GEN_DEFAULT_TEMPERATURE; + p_lib->humidity = RM_ZMOD4410_IAQ_2ND_GEN_DEFAULT_HUMIDITY; + /* Initialize the library */ lib_err = init_iaq_2nd_gen(p_handle); FSP_ERROR_RETURN(0 == lib_err, FSP_ERR_ASSERTION); @@ -140,6 +156,7 @@ static fsp_err_t rm_zmod4410_iaq_2nd_gen_open (rm_zmod4xxx_ctrl_t * const p * @retval FSP_SUCCESS Successfully results are read. * @retval FSP_ERR_ASSERTION Null pointer passed as a parameter. * @retval FSP_ERR_SENSOR_IN_STABILIZATION Module is stabilizing. + * @retval FSP_ERR_SENSOR_INVALID_DATA Sensor probably damaged. Algorithm results may be incorrect. **********************************************************************************************************************/ static fsp_err_t rm_zmod4410_iaq_2nd_gen_data_calculate (rm_zmod4xxx_ctrl_t * const p_api_ctrl, rm_zmod4xxx_raw_data_t * const p_raw_data, @@ -155,7 +172,9 @@ static fsp_err_t rm_zmod4410_iaq_2nd_gen_data_calculate (rm_zmod4xxx_ctrl_t * co iaq_2nd_gen_inputs_t algorithm_input; /* Calculate IAQ 2nd Gen. data form ADC data */ - algorithm_input.adc_result = &p_raw_data->adc_data[0]; + algorithm_input.adc_result = &p_raw_data->adc_data[0]; + algorithm_input.humidity_pct = p_lib->humidity; + algorithm_input.temperature_degc = p_lib->temperature; lib_err = calc_iaq_2nd_gen(p_handle, p_device, &algorithm_input, p_results); FSP_ERROR_RETURN(0 <= lib_err, FSP_ERR_ASSERTION); @@ -171,6 +190,7 @@ static fsp_err_t rm_zmod4410_iaq_2nd_gen_data_calculate (rm_zmod4xxx_ctrl_t * co p_zmod4xxx_data->etoh = p_results->etoh; p_zmod4xxx_data->eco2 = p_results->eco2; FSP_ERROR_RETURN(IAQ_2ND_GEN_STABILIZATION != lib_err, FSP_ERR_SENSOR_IN_STABILIZATION); + FSP_ERROR_RETURN(IAQ_2ND_GEN_DAMAGE != lib_err, FSP_ERR_SENSOR_INVALID_DATA); return FSP_SUCCESS; } @@ -349,6 +369,38 @@ static fsp_err_t rm_zmod4410_iaq_2nd_gen_raq_data_calculate (rm_zmod4xxx_ctrl_t return FSP_ERR_UNSUPPORTED; } +/*******************************************************************************************************************//** + * @brief Unsupported API. + * + * @retval FSP_ERR_UNSUPPORTED Operation mode is not supported. + **********************************************************************************************************************/ +static fsp_err_t rm_zmod4410_iaq_2nd_gen_rel_iaq_data_calculate (rm_zmod4xxx_ctrl_t * const p_api_ctrl, + rm_zmod4xxx_raw_data_t * const p_raw_data, + rm_zmod4xxx_rel_iaq_data_t * const p_zmod4xxx_data) +{ + FSP_PARAMETER_NOT_USED(p_api_ctrl); + FSP_PARAMETER_NOT_USED(p_raw_data); + FSP_PARAMETER_NOT_USED(p_zmod4xxx_data); + + return FSP_ERR_UNSUPPORTED; +} + +/*******************************************************************************************************************//** + * @brief Unsupported API. + * + * @retval FSP_ERR_UNSUPPORTED Operation mode is not supported. + **********************************************************************************************************************/ +static fsp_err_t rm_zmod4410_iaq_2nd_gen_pbaq_data_calculate (rm_zmod4xxx_ctrl_t * const p_api_ctrl, + rm_zmod4xxx_raw_data_t * const p_raw_data, + rm_zmod4xxx_pbaq_data_t * const p_zmod4xxx_data) +{ + FSP_PARAMETER_NOT_USED(p_api_ctrl); + FSP_PARAMETER_NOT_USED(p_raw_data); + FSP_PARAMETER_NOT_USED(p_zmod4xxx_data); + + return FSP_ERR_UNSUPPORTED; +} + /*******************************************************************************************************************//** * @brief Unsupported API. * diff --git a/ra/fsp/src/rm_zmod4xxx/iaq_2nd_gen/zmod4410_config_iaq2.h b/ra/fsp/src/rm_zmod4xxx/iaq_2nd_gen/zmod4410_config_iaq2.h index 6864defd2..50bc258d2 100644 --- a/ra/fsp/src/rm_zmod4xxx/iaq_2nd_gen/zmod4410_config_iaq2.h +++ b/ra/fsp/src/rm_zmod4xxx/iaq_2nd_gen/zmod4410_config_iaq2.h @@ -22,7 +22,7 @@ * @file zmod4410_config_iaq2.h * @brief This is the configuration for zmod4410 module - iaq_2nd_gen library * @author Renesas Electronics Corporation - * @version 2.2.0 + * @version 3.1.0 */ #ifndef _ZMOD4410_CONFIG_IAQ_2ND_GEN_H @@ -36,87 +36,76 @@ #include "../zmod4xxx_types.h" #endif -#define INIT 0 -#define MEASUREMENT 1 +#define INIT 0 +#define MEASUREMENT 1 -#define ZMOD4410_PID 0x2310 -#define ZMOD4410_I2C_ADDR 0x32 +#define ZMOD4410_PID 0x2310 +#define ZMOD4410_I2C_ADDR 0x32 // REMOVE Sequencer adresses -#define ZMOD4410_H_ADDR 0x40 -#define ZMOD4410_D_ADDR 0x50 -#define ZMOD4410_M_ADDR 0x60 -#define ZMOD4410_S_ADDR 0x68 +#define ZMOD4410_H_ADDR 0x40 +#define ZMOD4410_D_ADDR 0x50 +#define ZMOD4410_M_ADDR 0x60 +#define ZMOD4410_S_ADDR 0x68 -#define ZMOD4410_PROD_DATA_LEN 7 -#define ZMOD4410_ADC_DATA_LEN 32 +#define ZMOD4410_PROD_DATA_LEN 7 +#define ZMOD4410_ADC_DATA_LEN 32 // sequencer run time (with margin) and sample time -#define ZMOD4410_IAQ2_SAMPLE_TIME (3000U) +#define ZMOD4410_IAQ2_SAMPLE_TIME (3000U) // clang-format off -static uint8_t data_set_4410i[] = -{ +static uint8_t data_set_4410i[] = { // REMOVE heater - 0x00, 0x50, - + 0x00, 0x50, // REMOVE delay , measurement - 0x00, 0x28,0xC3, 0xE3, - + 0x00, 0x28, 0xC3, 0xE3, // REMOVE sequencer - 0x00, 0x00,0x80, 0x40 -}; + 0x00, 0x00, 0x80, 0x40}; -static uint8_t data_set_4410_iaq_2nd_gen[] = -{ +// REMOVE This implements "SelectiveOdor_03ext.xml". +static uint8_t data_set_4410_iaq_2nd_gen[] = { // REMOVE heater - 0x00, 0x50, 0xFF, 0x38, - 0xFE, 0xD4, 0xFE, 0x70, - 0xFE, 0x0C, 0xFD, 0xA8, - 0xFD, 0x44, 0xFC, 0xE0, - + 0x00, 0x50, 0xFF, 0x38, + 0xFE, 0xD4, 0xFE, 0x70, + 0xFE, 0x0C, 0xFD, 0xA8, + 0xFD, 0x44, 0xFC, 0xE0, // REMOVE delay - 0x00, 0x52, 0x02, 0x67, - 0x00, 0xCD, 0x03, 0x34, - + 0x00, 0x52, 0x02, 0x67, + 0x00, 0xCD, 0x03, 0x34, // REMOVE measurement - 0x23, 0x03, 0xA3, 0x43, - + 0x23, 0x03, 0xA3, 0x43, // REMOVE sequencer - 0x00, 0x00, 0x06, 0x49, - 0x06, 0x4A, 0x06, 0x4B, - 0x06, 0x4C, 0x06, 0x4D, - 0x06, 0x4E, 0x06, 0x97, - 0x06, 0xD7, 0x06, 0x57, - 0x06, 0x4E, 0x06, 0x4D, - 0x06, 0x4C, 0x06, 0x4B, - 0x06, 0x4A, 0x86, 0x59 -}; + 0x00, 0x00, 0x06, 0x49, + 0x06, 0x4A, 0x06, 0x4B, + 0x06, 0x4C, 0x06, 0x4D, + 0x06, 0x4E, 0x06, 0x97, + 0x06, 0xD7, 0x06, 0x57, + 0x06, 0x4E, 0x06, 0x4D, + 0x06, 0x4C, 0x06, 0x4B, + 0x06, 0x4A, 0x86, 0x59}; // clang-format on -zmod4xxx_conf g_zmod4410_iaq_2nd_gen_sensor_type[] = -{ - [INIT] = - { - .start = 0x80, - .h = {.addr = ZMOD4410_H_ADDR, .len = 2, .data_buf = &data_set_4410i[0] }, - .d = {.addr = ZMOD4410_D_ADDR, .len = 2, .data_buf = &data_set_4410i[2] }, - .m = {.addr = ZMOD4410_M_ADDR, .len = 2, .data_buf = &data_set_4410i[4] }, - .s = {.addr = ZMOD4410_S_ADDR, .len = 4, .data_buf = &data_set_4410i[6] }, - .r = {.addr = 0x97, .len = 4}, +zmod4xxx_conf g_zmod4410_iaq_2nd_gen_sensor_type[] = { + [INIT] = { + .start = 0x80, + .h = { .addr = ZMOD4410_H_ADDR, .len = 2, .data_buf = &data_set_4410i[0]}, + .d = { .addr = ZMOD4410_D_ADDR, .len = 2, .data_buf = &data_set_4410i[2]}, + .m = { .addr = ZMOD4410_M_ADDR, .len = 2, .data_buf = &data_set_4410i[4]}, + .s = { .addr = ZMOD4410_S_ADDR, .len = 4, .data_buf = &data_set_4410i[6]}, + .r = { .addr = 0x97, .len = 4}, }, - [MEASUREMENT] = - { - .start = 0x80, - .h = {.addr = ZMOD4410_H_ADDR, .len = 16, .data_buf = &data_set_4410_iaq_2nd_gen[0] }, - .d = {.addr = ZMOD4410_D_ADDR, .len = 8, .data_buf = &data_set_4410_iaq_2nd_gen[16]}, - .m = {.addr = ZMOD4410_M_ADDR, .len = 4, .data_buf = &data_set_4410_iaq_2nd_gen[24]}, - .s = {.addr = ZMOD4410_S_ADDR, .len = 32, .data_buf = &data_set_4410_iaq_2nd_gen[28]}, - .r = {.addr = 0x97, .len = 32}, - .prod_data_len = ZMOD4410_PROD_DATA_LEN, + [MEASUREMENT] = { + .start = 0x80, + .h = {.addr = ZMOD4410_H_ADDR, .len = 16, .data_buf = &data_set_4410_iaq_2nd_gen[0]}, + .d = {.addr = ZMOD4410_D_ADDR, .len = 8, .data_buf = &data_set_4410_iaq_2nd_gen[16]}, + .m = {.addr = ZMOD4410_M_ADDR, .len = 4, .data_buf = &data_set_4410_iaq_2nd_gen[24]}, + .s = {.addr = ZMOD4410_S_ADDR, .len = 32, .data_buf = &data_set_4410_iaq_2nd_gen[28]}, + .r = {.addr = 0x97, .len = 32}, + .prod_data_len = ZMOD4410_PROD_DATA_LEN, }, }; -#endif // _ZMOD4410_CONFIG_IAQ_2ND_GEN_H +#endif //_ZMOD4410_CONFIG_IAQ_2ND_GEN_H diff --git a/ra/fsp/src/rm_zmod4xxx/iaq_2nd_gen_ulp/iaq_2nd_gen_ulp.h b/ra/fsp/src/rm_zmod4xxx/iaq_2nd_gen_ulp/iaq_2nd_gen_ulp.h index 4f33079c9..85a99df4d 100644 --- a/ra/fsp/src/rm_zmod4xxx/iaq_2nd_gen_ulp/iaq_2nd_gen_ulp.h +++ b/ra/fsp/src/rm_zmod4xxx/iaq_2nd_gen_ulp/iaq_2nd_gen_ulp.h @@ -19,27 +19,27 @@ **********************************************************************************************************************/ /** - * @file iaq_2nd_gen_ulp.h - * @author Renesas Electronics Corporation - * @version 1.0.0 - * @brief This file contains the data structure definitions and - * the function definitions for the 2nd Gen IAQ ULP algorithm. - * @details The library contains an algorithm to calculate an eCO2, EtOH, TVOC and - * IAQ index from ZMOD4410 measurements. - * The implementation is made to allow more than one sensor. - * - */ + * @file iaq_2nd_gen_ulp.h + * @author Renesas Electronics Corporation + * @version 1.1.0 + * @brief This file contains the data structure definitions and + * the function definitions for the 2nd Gen IAQ ULP algorithm. + * @details The library contains an algorithm to calculate an eCO2, EtOH, TVOC and + * IAQ index from ZMOD4410 measurements. + * The implementation is made to allow more than one sensor. + * + */ #ifndef IAQ_2ND_GEN_ULP_H_ - #define IAQ_2ND_GEN_ULP_H_ +#define IAQ_2ND_GEN_ULP_H_ - #ifdef __cplusplus +#ifdef __cplusplus extern "C" { - #endif +#endif + +#include <stdint.h> +#include <math.h> - #include <stdint.h> - #include <math.h> - #if TEST_RM_ZMOD4XXX // For RA FSP test #include "../../../../../fsp/src/rm_zmod4xxx/zmod4xxx_types.h" #else @@ -49,8 +49,9 @@ extern "C" { /** \addtogroup RetCodes Return codes of the algorithm functions. * @{ */ - #define IAQ_2ND_GEN_ULP_OK (0) /**< everything okay */ - #define IAQ_2ND_GEN_ULP_STABILIZATION (1) /**< sensor in stabilization */ +#define IAQ_2ND_GEN_ULP_OK (0) /**< everything okay */ +#define IAQ_2ND_GEN_ULP_STABILIZATION (1) /**< sensor in stabilization */ +#define IAQ_2ND_GEN_ULP_DAMAGE (-102) /**< sensor damaged */ /** @}*/ /** @@ -58,65 +59,66 @@ extern "C" { * or the algorithm state. It needs to be passed with between * initialization and after each algorithm calculation. */ -typedef struct -{ - float log_nonlog_rcda[3]; /**< various baselines. */ - uint8_t - stabilization_sample; /**< Number of remaining stabilization samples. */ +typedef struct { + float log_nonlog_rcda[3]; /**< various baselines. */ + uint32_t sample_counter; /**< sample sounter. */ + float rg_mean; + float var_log10_rel_iaq; uint8_t need_filter_init; - float tvoc_smooth; - float tvoc_deltafilter; - float acchw; - float accow; - float etoh; - float eco2; + float rel_iaq_smooth; + float rel_iaq_deltafilter; + float eco2_untracked; + float min_tracking; + float acchw; + float accow; + float etoh; } iaq_2nd_gen_ulp_handle_t; /** - * @brief Variables that receive the algorithm outputs. - */ -typedef struct -{ - float rmox[13]; /**< MOx resistance. */ - float log_nonlog_rcda[3]; /**< various baselines. */ - float iaq; /**< IAQ index. */ - float tvoc; /**< TVOC concentration (mg/m^3). */ - float etoh; /**< EtOH concentration (ppm). */ - float eco2; /**< eCO2 concentration (ppm). */ +* @brief Variables that receive the algorithm outputs. +*/ +typedef struct { + float rmox[13]; /**< MOx resistance. */ + float log_nonlog_rcda[3]; /**< various baselines. */ + float rhtr; /**< heater resistance. */ + float temperature; /**< ambient temperature (degC). */ + float iaq; /**< IAQ index. */ + float tvoc; /**< TVOC concentration (mg/m^3). */ + float etoh; /**< EtOH concentration (ppm). */ + float eco2; /**< eCO2 concentration (ppm). */ } iaq_2nd_gen_ulp_results_t; /** - * @brief Algorithm input structure - */ -typedef struct -{ - uint8_t * adc_result; /**< Sensor raw values. */ - float humidity_pct; /**< Relative Humditiy in percentage */ - float temperature_degc; /**< Ambient Temperature in C */ +* @brief Algorithm input structure +*/ +typedef struct { + uint8_t *adc_result; /**< Sensor raw values. */ + float humidity_pct; /**< Relative Humditiy in percentage */ + float temperature_degc; /**< Ambient Temperature in C */ } iaq_2nd_gen_ulp_inputs_t; /** - * @brief calculates IAQ results from present sample. + * @brief calculates algorithm results from present sample. * @param [in] handle Pointer to algorithm state variable. * @param [in] dev Pointer to the device. * @param [in] algo_input Structure containing inputs required for algo calculation. * @param [out] results Pointer for storing the algorithm results. * @return error code. */ -int8_t calc_iaq_2nd_gen_ulp(iaq_2nd_gen_ulp_handle_t * handle, - zmod4xxx_dev_t * dev, - const iaq_2nd_gen_ulp_inputs_t * algo_input, - iaq_2nd_gen_ulp_results_t * results); +int8_t calc_iaq_2nd_gen_ulp(iaq_2nd_gen_ulp_handle_t *handle, + const zmod4xxx_dev_t *dev, + const iaq_2nd_gen_ulp_inputs_t *algo_input, + iaq_2nd_gen_ulp_results_t *results); /** - * @brief Initializes the IAQ algorithm. + * @brief Initializes the algorithm. * @param [out] handle Pointer to algorithm state variable. * @return error code. - */ -int8_t init_iaq_2nd_gen_ulp(iaq_2nd_gen_ulp_handle_t * handle); +*/ +int8_t init_iaq_2nd_gen_ulp(iaq_2nd_gen_ulp_handle_t *handle); - #ifdef __cplusplus +#ifdef __cplusplus } - #endif +#endif -#endif /* IAQ_2ND_GEN_ULP_H_ */ +#endif /* IAQ_2ND_GEN_ULP_H_ */ diff --git a/ra/fsp/src/rm_zmod4xxx/iaq_2nd_gen_ulp/rm_zmod4410_iaq_2nd_gen_ulp.c b/ra/fsp/src/rm_zmod4xxx/iaq_2nd_gen_ulp/rm_zmod4410_iaq_2nd_gen_ulp.c index 2ca8058e2..7758e86ff 100644 --- a/ra/fsp/src/rm_zmod4xxx/iaq_2nd_gen_ulp/rm_zmod4410_iaq_2nd_gen_ulp.c +++ b/ra/fsp/src/rm_zmod4xxx/iaq_2nd_gen_ulp/rm_zmod4410_iaq_2nd_gen_ulp.c @@ -39,7 +39,7 @@ * Macro definitions *********************************************************************************************************************/ -/* Definitions of OAQ 2nd gen Parameter */ +/* Definitions of IAQ 2nd gen ULP Parameter */ #define RM_ZMOD4410_IAQ_2ND_GEN_ULP_DEFAULT_HUMIDITY (50.0F) #define RM_ZMOD4410_IAQ_2ND_GEN_ULP_DEFAULT_TEMPERATURE (20.0F) @@ -87,6 +87,12 @@ static fsp_err_t rm_zmod4410_iaq_2nd_gen_ulp_oaq_2nd_gen_data_calculate(rm_zmod4 static fsp_err_t rm_zmod4410_iaq_2nd_gen_ulp_raq_data_calculate(rm_zmod4xxx_ctrl_t * const p_api_ctrl, rm_zmod4xxx_raw_data_t * const p_raw_data, rm_zmod4xxx_raq_data_t * const p_zmod4xxx_data); +static fsp_err_t rm_zmod4410_iaq_2nd_gen_ulp_rel_iaq_data_calculate(rm_zmod4xxx_ctrl_t * const p_api_ctrl, + rm_zmod4xxx_raw_data_t * const p_raw_data, + rm_zmod4xxx_rel_iaq_data_t * const p_zmod4xxx_data); +static fsp_err_t rm_zmod4410_iaq_2nd_gen_ulp_pbaq_data_calculate(rm_zmod4xxx_ctrl_t * const p_api_ctrl, + rm_zmod4xxx_raw_data_t * const p_raw_data, + rm_zmod4xxx_pbaq_data_t * const p_zmod4xxx_data); static fsp_err_t rm_zmod4410_iaq_2nd_gen_ulp_close(rm_zmod4xxx_ctrl_t * const p_api_ctrl); static fsp_err_t rm_zmod4410_iaq_2nd_gen_ulp_device_error_check(rm_zmod4xxx_ctrl_t * const p_api_ctrl); @@ -108,6 +114,8 @@ rm_zmod4xxx_api_t const g_zmod4xxx_on_zmod4410_iaq_2nd_gen_ulp = .oaq1stGenDataCalculate = rm_zmod4410_iaq_2nd_gen_ulp_oaq_1st_gen_data_calculate, .oaq2ndGenDataCalculate = rm_zmod4410_iaq_2nd_gen_ulp_oaq_2nd_gen_data_calculate, .raqDataCalculate = rm_zmod4410_iaq_2nd_gen_ulp_raq_data_calculate, + .relIaqDataCalculate = rm_zmod4410_iaq_2nd_gen_ulp_rel_iaq_data_calculate, + .pbaqDataCalculate = rm_zmod4410_iaq_2nd_gen_ulp_pbaq_data_calculate, .temperatureAndHumiditySet = rm_zmod4410_iaq_2nd_gen_ulp_temperature_and_humidity_set, .deviceErrorCheck = rm_zmod4410_iaq_2nd_gen_ulp_device_error_check, }; @@ -149,6 +157,7 @@ static fsp_err_t rm_zmod4410_iaq_2nd_gen_ulp_open (rm_zmod4xxx_ctrl_t * const * @retval FSP_SUCCESS Successfully results are read. * @retval FSP_ERR_ASSERTION Null pointer passed as a parameter. * @retval FSP_ERR_SENSOR_IN_STABILIZATION Module is stabilizing. + * @retval FSP_ERR_SENSOR_INVALID_DATA Sensor probably damaged. Algorithm results may be incorrect. **********************************************************************************************************************/ static fsp_err_t rm_zmod4410_iaq_2nd_gen_ulp_data_calculate (rm_zmod4xxx_ctrl_t * const p_api_ctrl, rm_zmod4xxx_raw_data_t * const p_raw_data, @@ -186,6 +195,7 @@ static fsp_err_t rm_zmod4410_iaq_2nd_gen_ulp_data_calculate (rm_zmod4xxx_ctrl_t p_zmod4xxx_data->etoh = p_results->etoh; p_zmod4xxx_data->eco2 = p_results->eco2; FSP_ERROR_RETURN(IAQ_2ND_GEN_ULP_STABILIZATION != lib_err, FSP_ERR_SENSOR_IN_STABILIZATION); + FSP_ERROR_RETURN(IAQ_2ND_GEN_ULP_DAMAGE != lib_err, FSP_ERR_SENSOR_INVALID_DATA); return FSP_SUCCESS; } @@ -365,6 +375,38 @@ static fsp_err_t rm_zmod4410_iaq_2nd_gen_ulp_raq_data_calculate (rm_zmod4xxx_ctr return FSP_ERR_UNSUPPORTED; } +/*******************************************************************************************************************//** + * @brief Unsupported API. + * + * @retval FSP_ERR_UNSUPPORTED Operation mode is not supported. + **********************************************************************************************************************/ +static fsp_err_t rm_zmod4410_iaq_2nd_gen_ulp_rel_iaq_data_calculate (rm_zmod4xxx_ctrl_t * const p_api_ctrl, + rm_zmod4xxx_raw_data_t * const p_raw_data, + rm_zmod4xxx_rel_iaq_data_t * const p_zmod4xxx_data) +{ + FSP_PARAMETER_NOT_USED(p_api_ctrl); + FSP_PARAMETER_NOT_USED(p_raw_data); + FSP_PARAMETER_NOT_USED(p_zmod4xxx_data); + + return FSP_ERR_UNSUPPORTED; +} + +/*******************************************************************************************************************//** + * @brief Unsupported API. + * + * @retval FSP_ERR_UNSUPPORTED Operation mode is not supported. + **********************************************************************************************************************/ +static fsp_err_t rm_zmod4410_iaq_2nd_gen_ulp_pbaq_data_calculate (rm_zmod4xxx_ctrl_t * const p_api_ctrl, + rm_zmod4xxx_raw_data_t * const p_raw_data, + rm_zmod4xxx_pbaq_data_t * const p_zmod4xxx_data) +{ + FSP_PARAMETER_NOT_USED(p_api_ctrl); + FSP_PARAMETER_NOT_USED(p_raw_data); + FSP_PARAMETER_NOT_USED(p_zmod4xxx_data); + + return FSP_ERR_UNSUPPORTED; +} + /*******************************************************************************************************************//** * @brief Unsupported API. * diff --git a/ra/fsp/src/rm_zmod4xxx/iaq_2nd_gen_ulp/zmod4410_config_iaq2_ulp.h b/ra/fsp/src/rm_zmod4xxx/iaq_2nd_gen_ulp/zmod4410_config_iaq2_ulp.h index c5df13dd2..a70ff16dc 100644 --- a/ra/fsp/src/rm_zmod4xxx/iaq_2nd_gen_ulp/zmod4410_config_iaq2_ulp.h +++ b/ra/fsp/src/rm_zmod4xxx/iaq_2nd_gen_ulp/zmod4410_config_iaq2_ulp.h @@ -22,7 +22,7 @@ * @file zmod4410_config_iaq2_ulp.h * @brief This is the configuration for zmod4410 module - iaq_2nd_gen_ulp library * @author Renesas Electronics Corporation - * @version 1.0.0 + * @version 1.1.0 */ #ifndef _ZMOD4410_CONFIG_IAQ_2ND_GEN_ULP_H @@ -36,89 +36,77 @@ #include "../zmod4xxx_types.h" #endif -#define INIT 0 -#define MEASUREMENT 1 +#define INIT 0 +#define MEASUREMENT 1 -#define ZMOD4410_PID 0x2310 -#define ZMOD4410_I2C_ADDR 0x32 +#define ZMOD4410_PID 0x2310 +#define ZMOD4410_I2C_ADDR 0x32 // REMOVE Sequencer adresses -#define ZMOD4410_H_ADDR 0x40 -#define ZMOD4410_D_ADDR 0x50 -#define ZMOD4410_M_ADDR 0x60 -#define ZMOD4410_S_ADDR 0x68 +#define ZMOD4410_H_ADDR 0x40 +#define ZMOD4410_D_ADDR 0x50 +#define ZMOD4410_M_ADDR 0x60 +#define ZMOD4410_S_ADDR 0x68 -#define ZMOD4410_TRACK_NUM_LEN 6 -#define ZMOD4410_PROD_DATA_LEN 7 -#define ZMOD4410_ADC_DATA_LEN 32 +#define ZMOD4410_TRACK_NUM_LEN 6 +#define ZMOD4410_PROD_DATA_LEN 7 +#define ZMOD4410_ADC_DATA_LEN 32 /* Measurement time with margin and sample time */ -#define ZMOD4410_IAQ2_ULP_SEQ_RUN_TIME_WITH_MARGIN (1500U) -#define ZMOD4410_IAQ2_ULP_SAMPLE_TIME (90000U) +#define ZMOD4410_IAQ2_ULP_SEQ_RUN_TIME_WITH_MARGIN (1500U) +#define ZMOD4410_IAQ2_ULP_SAMPLE_TIME (90000U) // clang-format off -static uint8_t data_set_4410i[] = -{ +static uint8_t data_set_4410i[] = { // REMOVE heater - 0x00, 0x50, - + 0x00, 0x50, // REMOVE delay , measurement - 0x00, 0x28,0xC3, 0xE3, - + 0x00, 0x28, 0xC3, 0xE3, // REMOVE sequencer - 0x00, 0x00,0x80, 0x40 -}; + 0x00, 0x00, 0x80, 0x40}; -static uint8_t data_set_4410_iaq_2nd_gen_ulp[] = -{ +static uint8_t data_set_4410_iaq_2nd_gen_ulp[] = { // REMOVE heater - 0x00, 0x50, 0xFF, 0x38, - 0xFE, 0xD4, 0xFE, 0x70, - 0xFE, 0x0C, 0xFD, 0xA8, - 0xFD, 0x44, 0xFC, 0xE0, - + 0x00, 0x50, 0xFF, 0x38, + 0xFE, 0xD4, 0xFE, 0x70, + 0xFE, 0x0C, 0xFD, 0xA8, + 0xFD, 0x44, 0xFC, 0xE0, // REMOVE delay - 0x00, 0x52, 0x02, 0x67, - 0x00, 0xCD, 0x03, 0x34, - + 0x00, 0x52, 0x02, 0x67, + 0x00, 0xCD, 0x03, 0x34, // REMOVE measurement - 0x23, 0x03, 0xA3, 0x43, - + 0x23, 0x03, 0xA3, 0x43, // REMOVE sequencer - 0x00, 0x00, 0x06, 0x49, - 0x06, 0x4A, 0x06, 0x4B, - 0x06, 0x4C, 0x06, 0x4D, - 0x06, 0x4E, 0x06, 0x97, - 0x06, 0xD7, 0x06, 0x57, - 0x06, 0x4E, 0x06, 0x4D, - 0x06, 0x4C, 0x06, 0x4B, - 0x06, 0x4A, 0x86, 0x59 -}; + 0x00, 0x00, 0x06, 0x49, + 0x06, 0x4A, 0x06, 0x4B, + 0x06, 0x4C, 0x06, 0x4D, + 0x06, 0x4E, 0x06, 0x97, + 0x06, 0xD7, 0x06, 0x57, + 0x06, 0x4E, 0x06, 0x4D, + 0x06, 0x4C, 0x06, 0x4B, + 0x06, 0x4A, 0x86, 0x59}; // clang-format on -zmod4xxx_conf g_zmod4410_iaq_2nd_gen_ulp_sensor_type[] = -{ - [INIT] = - { - .start = 0x80, - .h = {.addr = ZMOD4410_H_ADDR, .len = 2, .data_buf = &data_set_4410i[0] }, - .d = {.addr = ZMOD4410_D_ADDR, .len = 2, .data_buf = &data_set_4410i[2] }, - .m = {.addr = ZMOD4410_M_ADDR, .len = 2, .data_buf = &data_set_4410i[4] }, - .s = {.addr = ZMOD4410_S_ADDR, .len = 4, .data_buf = &data_set_4410i[6] }, - .r = {.addr = 0x97, .len = 4}, +zmod4xxx_conf g_zmod4410_iaq_2nd_gen_ulp_sensor_type[] = { + [INIT] = { + .start = 0x80, + .h = { .addr = ZMOD4410_H_ADDR, .len = 2, .data_buf = &data_set_4410i[0]}, + .d = { .addr = ZMOD4410_D_ADDR, .len = 2, .data_buf = &data_set_4410i[2]}, + .m = { .addr = ZMOD4410_M_ADDR, .len = 2, .data_buf = &data_set_4410i[4]}, + .s = { .addr = ZMOD4410_S_ADDR, .len = 4, .data_buf = &data_set_4410i[6]}, + .r = { .addr = 0x97, .len = 4}, }, - [MEASUREMENT] = - { - .start = 0x80, - .h = {.addr = ZMOD4410_H_ADDR, .len = 16, .data_buf = &data_set_4410_iaq_2nd_gen_ulp[0] }, - .d = {.addr = ZMOD4410_D_ADDR, .len = 8, .data_buf = &data_set_4410_iaq_2nd_gen_ulp[16]}, - .m = {.addr = ZMOD4410_M_ADDR, .len = 4, .data_buf = &data_set_4410_iaq_2nd_gen_ulp[24]}, - .s = {.addr = ZMOD4410_S_ADDR, .len = 32, .data_buf = &data_set_4410_iaq_2nd_gen_ulp[28]}, - .r = {.addr = 0x97, .len = 32}, - .prod_data_len = ZMOD4410_PROD_DATA_LEN, + [MEASUREMENT] = { + .start = 0x80, + .h = {.addr = ZMOD4410_H_ADDR, .len = 16, .data_buf = &data_set_4410_iaq_2nd_gen_ulp[0]}, + .d = {.addr = ZMOD4410_D_ADDR, .len = 8, .data_buf = &data_set_4410_iaq_2nd_gen_ulp[16]}, + .m = {.addr = ZMOD4410_M_ADDR, .len = 4, .data_buf = &data_set_4410_iaq_2nd_gen_ulp[24]}, + .s = {.addr = ZMOD4410_S_ADDR, .len = 32, .data_buf = &data_set_4410_iaq_2nd_gen_ulp[28]}, + .r = {.addr = 0x97, .len = 32}, + .prod_data_len = ZMOD4410_PROD_DATA_LEN, }, }; -#endif // _ZMOD4410_CONFIG_IAQ_2ND_GEN_ULP_H +#endif //_ZMOD4410_CONFIG_IAQ_2ND_GEN_ULP_H diff --git a/ra/fsp/src/rm_zmod4xxx/oaq_1st_gen/rm_zmod4510_oaq_1st_gen.c b/ra/fsp/src/rm_zmod4xxx/oaq_1st_gen/rm_zmod4510_oaq_1st_gen.c index fa9e70046..10d98157c 100644 --- a/ra/fsp/src/rm_zmod4xxx/oaq_1st_gen/rm_zmod4510_oaq_1st_gen.c +++ b/ra/fsp/src/rm_zmod4xxx/oaq_1st_gen/rm_zmod4510_oaq_1st_gen.c @@ -81,6 +81,12 @@ static fsp_err_t rm_zmod4510_oaq_1st_gen_oaq_2nd_gen_data_calculate(rm_zmod4xxx_ static fsp_err_t rm_zmod4510_oaq_1st_gen_raq_data_calculate(rm_zmod4xxx_ctrl_t * const p_api_ctrl, rm_zmod4xxx_raw_data_t * const p_raw_data, rm_zmod4xxx_raq_data_t * const p_zmod4xxx_data); +static fsp_err_t rm_zmod4510_oaq_1st_gen_rel_iaq_data_calculate(rm_zmod4xxx_ctrl_t * const p_api_ctrl, + rm_zmod4xxx_raw_data_t * const p_raw_data, + rm_zmod4xxx_rel_iaq_data_t * const p_zmod4xxx_data); +static fsp_err_t rm_zmod4510_oaq_1st_gen_pbaq_data_calculate(rm_zmod4xxx_ctrl_t * const p_api_ctrl, + rm_zmod4xxx_raw_data_t * const p_raw_data, + rm_zmod4xxx_pbaq_data_t * const p_zmod4xxx_data); static fsp_err_t rm_zmod4510_oaq_1st_gen_close(rm_zmod4xxx_ctrl_t * const p_api_ctrl); static fsp_err_t rm_zmod4510_oaq_1st_gen_device_error_check(rm_zmod4xxx_ctrl_t * const p_api_ctrl); static fsp_err_t rm_zmod4510_oaq_1st_gen_calc_rmox(rm_zmod4xxx_instance_ctrl_t * const p_ctrl, @@ -105,6 +111,8 @@ rm_zmod4xxx_api_t const g_zmod4xxx_on_zmod4510_oaq_1st_gen = .oaq1stGenDataCalculate = rm_zmod4510_oaq_1st_gen_data_calculate, .oaq2ndGenDataCalculate = rm_zmod4510_oaq_1st_gen_oaq_2nd_gen_data_calculate, .raqDataCalculate = rm_zmod4510_oaq_1st_gen_raq_data_calculate, + .relIaqDataCalculate = rm_zmod4510_oaq_1st_gen_rel_iaq_data_calculate, + .pbaqDataCalculate = rm_zmod4510_oaq_1st_gen_pbaq_data_calculate, .temperatureAndHumiditySet = rm_zmod4510_oaq_1st_gen_temperature_and_humidity_set, .deviceErrorCheck = rm_zmod4510_oaq_1st_gen_device_error_check, }; @@ -342,6 +350,38 @@ static fsp_err_t rm_zmod4510_oaq_1st_gen_raq_data_calculate (rm_zmod4xxx_ctrl_t return FSP_ERR_UNSUPPORTED; } +/*******************************************************************************************************************//** + * @brief Unsupported API. + * + * @retval FSP_ERR_UNSUPPORTED Operation mode is not supported. + **********************************************************************************************************************/ +static fsp_err_t rm_zmod4510_oaq_1st_gen_rel_iaq_data_calculate (rm_zmod4xxx_ctrl_t * const p_api_ctrl, + rm_zmod4xxx_raw_data_t * const p_raw_data, + rm_zmod4xxx_rel_iaq_data_t * const p_zmod4xxx_data) +{ + FSP_PARAMETER_NOT_USED(p_api_ctrl); + FSP_PARAMETER_NOT_USED(p_raw_data); + FSP_PARAMETER_NOT_USED(p_zmod4xxx_data); + + return FSP_ERR_UNSUPPORTED; +} + +/*******************************************************************************************************************//** + * @brief Unsupported API. + * + * @retval FSP_ERR_UNSUPPORTED Operation mode is not supported. + **********************************************************************************************************************/ +static fsp_err_t rm_zmod4510_oaq_1st_gen_pbaq_data_calculate (rm_zmod4xxx_ctrl_t * const p_api_ctrl, + rm_zmod4xxx_raw_data_t * const p_raw_data, + rm_zmod4xxx_pbaq_data_t * const p_zmod4xxx_data) +{ + FSP_PARAMETER_NOT_USED(p_api_ctrl); + FSP_PARAMETER_NOT_USED(p_raw_data); + FSP_PARAMETER_NOT_USED(p_zmod4xxx_data); + + return FSP_ERR_UNSUPPORTED; +} + /*******************************************************************************************************************//** * @brief Unsupported API. * diff --git a/ra/fsp/src/rm_zmod4xxx/oaq_2nd_gen/rm_zmod4510_oaq_2nd_gen.c b/ra/fsp/src/rm_zmod4xxx/oaq_2nd_gen/rm_zmod4510_oaq_2nd_gen.c index 85759cf63..1ec734de1 100644 --- a/ra/fsp/src/rm_zmod4xxx/oaq_2nd_gen/rm_zmod4510_oaq_2nd_gen.c +++ b/ra/fsp/src/rm_zmod4xxx/oaq_2nd_gen/rm_zmod4510_oaq_2nd_gen.c @@ -82,6 +82,12 @@ static fsp_err_t rm_zmod4510_oaq_2nd_gen_data_calculate(rm_zmod4xxx_ctrl_t * con static fsp_err_t rm_zmod4510_oaq_2nd_gen_raq_data_calculate(rm_zmod4xxx_ctrl_t * const p_api_ctrl, rm_zmod4xxx_raw_data_t * const p_raw_data, rm_zmod4xxx_raq_data_t * const p_zmod4xxx_data); +static fsp_err_t rm_zmod4510_oaq_2nd_gen_rel_iaq_data_calculate(rm_zmod4xxx_ctrl_t * const p_api_ctrl, + rm_zmod4xxx_raw_data_t * const p_raw_data, + rm_zmod4xxx_rel_iaq_data_t * const p_zmod4xxx_data); +static fsp_err_t rm_zmod4510_oaq_2nd_gen_pbaq_data_calculate(rm_zmod4xxx_ctrl_t * const p_api_ctrl, + rm_zmod4xxx_raw_data_t * const p_raw_data, + rm_zmod4xxx_pbaq_data_t * const p_zmod4xxx_data); static fsp_err_t rm_zmod4510_oaq_2nd_gen_close(rm_zmod4xxx_ctrl_t * const p_api_ctrl); static fsp_err_t rm_zmod4510_oaq_2nd_gen_device_error_check(rm_zmod4xxx_ctrl_t * const p_api_ctrl); @@ -103,6 +109,8 @@ rm_zmod4xxx_api_t const g_zmod4xxx_on_zmod4510_oaq_2nd_gen = .oaq1stGenDataCalculate = rm_zmod4510_oaq_2nd_gen_oaq_1st_gen_data_calculate, .oaq2ndGenDataCalculate = rm_zmod4510_oaq_2nd_gen_data_calculate, .raqDataCalculate = rm_zmod4510_oaq_2nd_gen_raq_data_calculate, + .relIaqDataCalculate = rm_zmod4510_oaq_2nd_gen_rel_iaq_data_calculate, + .pbaqDataCalculate = rm_zmod4510_oaq_2nd_gen_pbaq_data_calculate, .temperatureAndHumiditySet = rm_zmod4510_oaq_2nd_gen_temperature_and_humidity_set, .deviceErrorCheck = rm_zmod4510_oaq_2nd_gen_device_error_check, }; @@ -357,6 +365,38 @@ static fsp_err_t rm_zmod4510_oaq_2nd_gen_raq_data_calculate (rm_zmod4xxx_ctrl_t return FSP_ERR_UNSUPPORTED; } +/*******************************************************************************************************************//** + * @brief Unsupported API. + * + * @retval FSP_ERR_UNSUPPORTED Operation mode is not supported. + **********************************************************************************************************************/ +static fsp_err_t rm_zmod4510_oaq_2nd_gen_rel_iaq_data_calculate (rm_zmod4xxx_ctrl_t * const p_api_ctrl, + rm_zmod4xxx_raw_data_t * const p_raw_data, + rm_zmod4xxx_rel_iaq_data_t * const p_zmod4xxx_data) +{ + FSP_PARAMETER_NOT_USED(p_api_ctrl); + FSP_PARAMETER_NOT_USED(p_raw_data); + FSP_PARAMETER_NOT_USED(p_zmod4xxx_data); + + return FSP_ERR_UNSUPPORTED; +} + +/*******************************************************************************************************************//** + * @brief Unsupported API. + * + * @retval FSP_ERR_UNSUPPORTED Operation mode is not supported. + **********************************************************************************************************************/ +static fsp_err_t rm_zmod4510_oaq_2nd_gen_pbaq_data_calculate (rm_zmod4xxx_ctrl_t * const p_api_ctrl, + rm_zmod4xxx_raw_data_t * const p_raw_data, + rm_zmod4xxx_pbaq_data_t * const p_zmod4xxx_data) +{ + FSP_PARAMETER_NOT_USED(p_api_ctrl); + FSP_PARAMETER_NOT_USED(p_raw_data); + FSP_PARAMETER_NOT_USED(p_zmod4xxx_data); + + return FSP_ERR_UNSUPPORTED; +} + /*******************************************************************************************************************//** * @brief Unsupported API. * diff --git a/ra/fsp/src/rm_zmod4xxx/odor/rm_zmod4410_odor.c b/ra/fsp/src/rm_zmod4xxx/odor/rm_zmod4410_odor.c index 383fe836f..73b045425 100644 --- a/ra/fsp/src/rm_zmod4xxx/odor/rm_zmod4410_odor.c +++ b/ra/fsp/src/rm_zmod4xxx/odor/rm_zmod4410_odor.c @@ -89,6 +89,12 @@ static fsp_err_t rm_zmod4410_odor_oaq_2nd_gen_data_calculate(rm_zmod4xxx_ctrl_t static fsp_err_t rm_zmod4410_odor_raq_data_calculate(rm_zmod4xxx_ctrl_t * const p_api_ctrl, rm_zmod4xxx_raw_data_t * const p_raw_data, rm_zmod4xxx_raq_data_t * const p_zmod4xxx_data); +static fsp_err_t rm_zmod4410_odor_rel_iaq_data_calculate(rm_zmod4xxx_ctrl_t * const p_api_ctrl, + rm_zmod4xxx_raw_data_t * const p_raw_data, + rm_zmod4xxx_rel_iaq_data_t * const p_zmod4xxx_data); +static fsp_err_t rm_zmod4410_odor_pbaq_data_calculate(rm_zmod4xxx_ctrl_t * const p_api_ctrl, + rm_zmod4xxx_raw_data_t * const p_raw_data, + rm_zmod4xxx_pbaq_data_t * const p_zmod4xxx_data); static fsp_err_t rm_zmod4410_odor_close(rm_zmod4xxx_ctrl_t * const p_api_ctrl); static fsp_err_t rm_zmod4410_odor_device_error_check(rm_zmod4xxx_ctrl_t * const p_api_ctrl); static fsp_err_t rm_zmod4410_odor_calc_rmox(rm_zmod4xxx_instance_ctrl_t * const p_ctrl, @@ -113,6 +119,8 @@ rm_zmod4xxx_api_t const g_zmod4xxx_on_zmod4410_odor = .oaq1stGenDataCalculate = rm_zmod4410_odor_oaq_1st_gen_data_calculate, .oaq2ndGenDataCalculate = rm_zmod4410_odor_oaq_2nd_gen_data_calculate, .raqDataCalculate = rm_zmod4410_odor_raq_data_calculate, + .relIaqDataCalculate = rm_zmod4410_odor_rel_iaq_data_calculate, + .pbaqDataCalculate = rm_zmod4410_odor_pbaq_data_calculate, .temperatureAndHumiditySet = rm_zmod4410_odor_temperature_and_humidity_set, .deviceErrorCheck = rm_zmod4410_odor_device_error_check, }; @@ -357,6 +365,38 @@ static fsp_err_t rm_zmod4410_odor_raq_data_calculate (rm_zmod4xxx_ctrl_t * const return FSP_ERR_UNSUPPORTED; } +/*******************************************************************************************************************//** + * @brief Unsupported API. + * + * @retval FSP_ERR_UNSUPPORTED Operation mode is not supported. + **********************************************************************************************************************/ +static fsp_err_t rm_zmod4410_odor_rel_iaq_data_calculate (rm_zmod4xxx_ctrl_t * const p_api_ctrl, + rm_zmod4xxx_raw_data_t * const p_raw_data, + rm_zmod4xxx_rel_iaq_data_t * const p_zmod4xxx_data) +{ + FSP_PARAMETER_NOT_USED(p_api_ctrl); + FSP_PARAMETER_NOT_USED(p_raw_data); + FSP_PARAMETER_NOT_USED(p_zmod4xxx_data); + + return FSP_ERR_UNSUPPORTED; +} + +/*******************************************************************************************************************//** + * @brief Unsupported API. + * + * @retval FSP_ERR_UNSUPPORTED Operation mode is not supported. + **********************************************************************************************************************/ +static fsp_err_t rm_zmod4410_odor_pbaq_data_calculate (rm_zmod4xxx_ctrl_t * const p_api_ctrl, + rm_zmod4xxx_raw_data_t * const p_raw_data, + rm_zmod4xxx_pbaq_data_t * const p_zmod4xxx_data) +{ + FSP_PARAMETER_NOT_USED(p_api_ctrl); + FSP_PARAMETER_NOT_USED(p_raw_data); + FSP_PARAMETER_NOT_USED(p_zmod4xxx_data); + + return FSP_ERR_UNSUPPORTED; +} + /*******************************************************************************************************************//** * @brief Unsupported API. * diff --git a/ra/fsp/src/rm_zmod4xxx/pbaq/pbaq.h b/ra/fsp/src/rm_zmod4xxx/pbaq/pbaq.h new file mode 100644 index 000000000..1a14bc927 --- /dev/null +++ b/ra/fsp/src/rm_zmod4xxx/pbaq/pbaq.h @@ -0,0 +1,94 @@ +/** + * @file pbaq.h + * @author Renesas Electronics Corporation + * @version 1.0.0 + * @brief This file contains the data structure definitions and + * the function definitions for the PBAQ algorithm. + * @details The library contains an algorithm to calculate an EtOH, TVOC + * from ZMOD4410 measurements. + * The implementation is made to allow more than one sensor. + * + */ + +#ifndef PBAQ_H_ +#define PBAQ_H_ + +#ifdef __cplusplus +extern "C" { +#endif + +#include <stdint.h> +#include <math.h> + +#if TEST_RM_ZMOD4XXX // For RA FSP test + #include "../../../../../fsp/src/rm_zmod4xxx/zmod4xxx_types.h" +#else + #include "../zmod4xxx_types.h" +#endif + +/** \addtogroup RetCodes Return codes of the algorithm functions. + * @{ + */ +#define PBAQ_OK (0) /**< everything okay */ +#define PBAQ_STABILIZATION (1) /**< sensor in stabilization */ +#define PBAQ_DAMAGE (-102) /**< sensor damaged */ +/** @}*/ + +/** +* @brief Variables that describe the sensor or the algorithm state. +*/ +typedef struct { + float log_rcda[9]; /**< log10 of CDA resistances. */ + float rh_cda; + float t_cda; + uint32_t sample_counter; + float etoh; +} pbaq_handle_t; + +/** +* @brief Variables that receive the algorithm outputs. +*/ +typedef struct { + float rmox[13]; /**< MOx resistance. */ + float log_rcda; /**< log10 of CDA resistance. */ + float rhtr; /**< heater resistance. */ + float temperature; /**< ambient temperature (degC). */ + float tvoc; /**< TVOC concentration (mg/m^3). */ + float etoh; /**< EtOH concentration (ppm). */ +} pbaq_results_t; + +/** +* @brief Variables that are needed for algorithm + * @param [in] adc_result Value from read_adc_result function + * @param [in] humidity_pct relative ambient humidity (%) + * @param [in] temperature_degc ambient temperature (degC) +*/ +typedef struct { + uint8_t *adc_result; + float humidity_pct; + float temperature_degc; +} pbaq_inputs_t; + +/** + * @brief calculates algorithm results from present sample. + * @param [in] handle Pointer to algorithm state variable. + * @param [in] dev Pointer to the device. + * @param [in] algo_input Structure containing inputs required for algo calculation. + * @param [out] results Pointer for storing the algorithm results. + * @return error code. + */ +int8_t calc_pbaq(pbaq_handle_t *handle, const zmod4xxx_dev_t *dev, + const pbaq_inputs_t *algo_input, pbaq_results_t *results); + +/** + * @brief Initializes the algorithm. + * @param [out] handle Pointer to algorithm state variable. + * @return error code. +*/ +int8_t init_pbaq(pbaq_handle_t *handle); + +#ifdef __cplusplus +} +#endif + +#endif /* PBAQ_H_ */ diff --git a/ra/fsp/src/rm_zmod4xxx/pbaq/rm_zmod4410_pbaq.c b/ra/fsp/src/rm_zmod4xxx/pbaq/rm_zmod4410_pbaq.c new file mode 100644 index 000000000..2c4e4adba --- /dev/null +++ b/ra/fsp/src/rm_zmod4xxx/pbaq/rm_zmod4410_pbaq.c @@ -0,0 +1,406 @@ +/*********************************************************************************************************************** + * Copyright [2020-2023] Renesas Electronics Corporation and/or its affiliates. All Rights Reserved. + * + * This software and documentation are supplied by Renesas Electronics America Inc. and may only be used with products + * of Renesas Electronics Corp. and its affiliates ("Renesas"). No other uses are authorized. Renesas products are + * sold pursuant to Renesas terms and conditions of sale. Purchasers are solely responsible for the selection and use + * of Renesas products and Renesas assumes no liability. No license, express or implied, to any intellectual property + * right is granted by Renesas. This software is protected under all applicable laws, including copyright laws. Renesas + * reserves the right to change or discontinue this software and/or this documentation. THE SOFTWARE AND DOCUMENTATION + * IS DELIVERED TO YOU "AS IS," AND RENESAS MAKES NO REPRESENTATIONS OR WARRANTIES, AND TO THE FULLEST EXTENT + * PERMISSIBLE UNDER APPLICABLE LAW, DISCLAIMS ALL WARRANTIES, WHETHER EXPLICITLY OR IMPLICITLY, INCLUDING WARRANTIES + * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, AND NONINFRINGEMENT, WITH RESPECT TO THE SOFTWARE OR + * DOCUMENTATION. RENESAS SHALL HAVE NO LIABILITY ARISING OUT OF ANY SECURITY VULNERABILITY OR BREACH. TO THE MAXIMUM + * EXTENT PERMITTED BY LAW, IN NO EVENT WILL RENESAS BE LIABLE TO YOU IN CONNECTION WITH THE SOFTWARE OR DOCUMENTATION + * (OR ANY PERSON OR ENTITY CLAIMING RIGHTS DERIVED FROM YOU) FOR ANY LOSS, DAMAGES, OR CLAIMS WHATSOEVER, INCLUDING, + * WITHOUT LIMITATION, ANY DIRECT, CONSEQUENTIAL, SPECIAL, INDIRECT, PUNITIVE, OR INCIDENTAL DAMAGES; ANY LOST PROFITS, + * OTHER ECONOMIC DAMAGE, PROPERTY DAMAGE, OR PERSONAL INJURY; AND EVEN IF RENESAS HAS BEEN ADVISED OF THE POSSIBILITY + * OF SUCH LOSS, DAMAGES, CLAIMS OR COSTS. + **********************************************************************************************************************/ + +/********************************************************************************************************************** + * Includes <System Includes> , "Project Includes" + *********************************************************************************************************************/ +#if defined(__CCRX__) || defined(__ICCRX__) || defined(__RX__) + #include "r_zmod4xxx_if.h" +#elif defined(__CCRL__) || defined(__ICCRL78__) || defined(__RL78__) + #include "r_zmod4xxx_if.h" +#else + #define RM_ZMOD4410_PBAQ_CFG_LIB_ENABLE (1) +#endif + +#if RM_ZMOD4410_PBAQ_CFG_LIB_ENABLE + #include "rm_zmod4xxx.h" + #include "../zmod4xxx_types.h" + #include "pbaq.h" + #include "zmod4410_config_pbaq.h" + +/********************************************************************************************************************** + * Macro definitions + *********************************************************************************************************************/ + +/********************************************************************************************************************** + * Local Typedef definitions + *********************************************************************************************************************/ + +/********************************************************************************************************************** + * Exported global functions + *********************************************************************************************************************/ + +/********************************************************************************************************************** + * Private (static) variables and functions + *********************************************************************************************************************/ + +static fsp_err_t rm_zmod4410_pbaq_open(rm_zmod4xxx_ctrl_t * const p_api_ctrl, rm_zmod4xxx_cfg_t const * const p_cfg); +static fsp_err_t rm_zmod4410_pbaq_measurement_start(rm_zmod4xxx_ctrl_t * const p_api_ctrl); +static fsp_err_t rm_zmod4410_pbaq_measurement_stop(rm_zmod4xxx_ctrl_t * const p_api_ctrl); +static fsp_err_t rm_zmod4410_pbaq_status_check(rm_zmod4xxx_ctrl_t * const p_api_ctrl); +static fsp_err_t rm_zmod4410_pbaq_read(rm_zmod4xxx_ctrl_t * const p_api_ctrl, + rm_zmod4xxx_raw_data_t * const p_raw_data); +static fsp_err_t rm_zmod4410_pbaq_temperature_and_humidity_set(rm_zmod4xxx_ctrl_t * const p_api_ctrl, + float temperature, + float humidity); +static fsp_err_t rm_zmod4410_pbaq_iaq_1st_gen_data_calculate(rm_zmod4xxx_ctrl_t * const p_api_ctrl, + rm_zmod4xxx_raw_data_t * const p_raw_data, + rm_zmod4xxx_iaq_1st_data_t * const p_zmod4xxx_data); +static fsp_err_t rm_zmod4410_pbaq_iaq_2nd_gen_data_calculate(rm_zmod4xxx_ctrl_t * const p_api_ctrl, + rm_zmod4xxx_raw_data_t * const p_raw_data, + rm_zmod4xxx_iaq_2nd_data_t * const p_zmod4xxx_data); +static fsp_err_t rm_zmod4410_pbaq_odor_data_calculate(rm_zmod4xxx_ctrl_t * const p_api_ctrl, + rm_zmod4xxx_raw_data_t * const p_raw_data, + rm_zmod4xxx_odor_data_t * const p_zmod4xxx_data); +static fsp_err_t rm_zmod4410_pbaq_sulfur_odor_data_calculate(rm_zmod4xxx_ctrl_t * const p_api_ctrl, + rm_zmod4xxx_raw_data_t * const p_raw_data, + rm_zmod4xxx_sulfur_odor_data_t * const p_zmod4xxx_data); +static fsp_err_t rm_zmod4410_pbaq_oaq_1st_gen_data_calculate(rm_zmod4xxx_ctrl_t * const p_api_ctrl, + rm_zmod4xxx_raw_data_t * const p_raw_data, + rm_zmod4xxx_oaq_1st_data_t * const p_zmod4xxx_data); +static fsp_err_t rm_zmod4410_pbaq_oaq_2nd_gen_data_calculate(rm_zmod4xxx_ctrl_t * const p_api_ctrl, + rm_zmod4xxx_raw_data_t * const p_raw_data, + rm_zmod4xxx_oaq_2nd_data_t * const p_zmod4xxx_data); +static fsp_err_t rm_zmod4410_pbaq_raq_data_calculate(rm_zmod4xxx_ctrl_t * const p_api_ctrl, + rm_zmod4xxx_raw_data_t * const p_raw_data, + rm_zmod4xxx_raq_data_t * const p_zmod4xxx_data); +static fsp_err_t rm_zmod4410_pbaq_rel_iaq_data_calculate(rm_zmod4xxx_ctrl_t * const p_api_ctrl, + rm_zmod4xxx_raw_data_t * const p_raw_data, + rm_zmod4xxx_rel_iaq_data_t * const p_zmod4xxx_data); +static fsp_err_t rm_zmod4410_pbaq_data_calculate(rm_zmod4xxx_ctrl_t * const p_api_ctrl, + rm_zmod4xxx_raw_data_t * const p_raw_data, + rm_zmod4xxx_pbaq_data_t * const p_zmod4xxx_data); +static fsp_err_t rm_zmod4410_pbaq_close(rm_zmod4xxx_ctrl_t * const p_api_ctrl); +static fsp_err_t rm_zmod4410_pbaq_device_error_check(rm_zmod4xxx_ctrl_t * const p_api_ctrl); + +/********************************************************************************************************************** + * Exported global variables + *********************************************************************************************************************/ +rm_zmod4xxx_api_t const g_zmod4xxx_on_zmod4410_pbaq = +{ + .open = rm_zmod4410_pbaq_open, + .close = rm_zmod4410_pbaq_close, + .measurementStart = rm_zmod4410_pbaq_measurement_start, + .measurementStop = rm_zmod4410_pbaq_measurement_stop, + .statusCheck = rm_zmod4410_pbaq_status_check, + .read = rm_zmod4410_pbaq_read, + .iaq1stGenDataCalculate = rm_zmod4410_pbaq_iaq_1st_gen_data_calculate, + .iaq2ndGenDataCalculate = rm_zmod4410_pbaq_iaq_2nd_gen_data_calculate, + .odorDataCalculate = rm_zmod4410_pbaq_odor_data_calculate, + .sulfurOdorDataCalculate = rm_zmod4410_pbaq_sulfur_odor_data_calculate, + .oaq1stGenDataCalculate = rm_zmod4410_pbaq_oaq_1st_gen_data_calculate, + .oaq2ndGenDataCalculate = rm_zmod4410_pbaq_oaq_2nd_gen_data_calculate, + .raqDataCalculate = rm_zmod4410_pbaq_raq_data_calculate, + .relIaqDataCalculate = rm_zmod4410_pbaq_rel_iaq_data_calculate, + .pbaqDataCalculate = rm_zmod4410_pbaq_data_calculate, + .temperatureAndHumiditySet = rm_zmod4410_pbaq_temperature_and_humidity_set, + .deviceErrorCheck = rm_zmod4410_pbaq_device_error_check, +}; + +/*********************************************************************************************************************** + * Functions + **********************************************************************************************************************/ + +/*******************************************************************************************************************//** + * @brief Initialize the PBAQ library + * + * @retval FSP_SUCCESS Successfully started. + * @retval FSP_ERR_ASSERTION Null pointer passed as a parameter. + **********************************************************************************************************************/ +static fsp_err_t rm_zmod4410_pbaq_open (rm_zmod4xxx_ctrl_t * const p_api_ctrl, rm_zmod4xxx_cfg_t const * const p_cfg) +{ + rm_zmod4xxx_instance_ctrl_t * p_ctrl = (rm_zmod4xxx_instance_ctrl_t *) p_api_ctrl; + int8_t lib_err = 0; + rm_zmod4xxx_lib_extended_cfg_t * p_lib = p_ctrl->p_zmod4xxx_lib; + pbaq_handle_t * p_handle = (pbaq_handle_t *) p_lib->p_handle; + + FSP_PARAMETER_NOT_USED(p_cfg); + + /* Initialize the library */ + lib_err = init_pbaq(p_handle); + FSP_ERROR_RETURN(0 == lib_err, FSP_ERR_ASSERTION); + + return FSP_SUCCESS; +} + +/*******************************************************************************************************************//** + * @brief Calculate the IAQ 2nd Gen. data with the library API. + * + * @retval FSP_SUCCESS Successfully results are read. + * @retval FSP_ERR_ASSERTION Null pointer passed as a parameter. + * @retval FSP_ERR_SENSOR_IN_STABILIZATION Module is stabilizing. + * @retval FSP_ERR_SENSOR_INVALID_DATA Sensor probably damaged. Algorithm results may be incorrect. + **********************************************************************************************************************/ +static fsp_err_t rm_zmod4410_pbaq_data_calculate (rm_zmod4xxx_ctrl_t * const p_api_ctrl, + rm_zmod4xxx_raw_data_t * const p_raw_data, + rm_zmod4xxx_pbaq_data_t * const p_zmod4xxx_data) +{ + rm_zmod4xxx_instance_ctrl_t * p_ctrl = (rm_zmod4xxx_instance_ctrl_t *) p_api_ctrl; + rm_zmod4xxx_lib_extended_cfg_t * p_lib = p_ctrl->p_zmod4xxx_lib; + pbaq_handle_t * p_handle = (pbaq_handle_t *) p_lib->p_handle; + pbaq_results_t * p_results = (pbaq_results_t *) p_lib->p_results; + zmod4xxx_dev_t * p_device = (zmod4xxx_dev_t *) p_lib->p_device; + uint16_t i; + int8_t lib_err = 0; + pbaq_inputs_t algorithm_input; + + /* Calculate IAQ 2nd Gen. data form ADC data */ + algorithm_input.adc_result = &p_raw_data->adc_data[0]; + algorithm_input.humidity_pct = p_lib->humidity; + algorithm_input.temperature_degc = p_lib->temperature; + lib_err = calc_pbaq(p_handle, p_device, &algorithm_input, p_results); + FSP_ERROR_RETURN(0 <= lib_err, FSP_ERR_ASSERTION); + + /* Set Data */ + for (i = 0; i < 13; i++) + { + p_zmod4xxx_data->rmox[i] = p_results->rmox[i]; + } + + p_zmod4xxx_data->log_rcda = p_results->log_rcda; + p_zmod4xxx_data->rhtr = p_results->rhtr; + p_zmod4xxx_data->temperature = p_results->temperature; + p_zmod4xxx_data->tvoc = p_results->tvoc; + p_zmod4xxx_data->etoh = p_results->etoh; + FSP_ERROR_RETURN(PBAQ_STABILIZATION != lib_err, FSP_ERR_SENSOR_IN_STABILIZATION); + FSP_ERROR_RETURN(PBAQ_DAMAGE != lib_err, FSP_ERR_SENSOR_INVALID_DATA); + + return FSP_SUCCESS; +} + +/*******************************************************************************************************************//** + * @brief Unsupported API. + * + * @retval FSP_ERR_UNSUPPORTED Operation mode is not supported. + **********************************************************************************************************************/ +static fsp_err_t rm_zmod4410_pbaq_close (rm_zmod4xxx_ctrl_t * const p_api_ctrl) +{ + FSP_PARAMETER_NOT_USED(p_api_ctrl); + + return FSP_ERR_UNSUPPORTED; +} + +/*******************************************************************************************************************//** + * @brief Unsupported API. + * + * @retval FSP_ERR_UNSUPPORTED Operation mode is not supported. + **********************************************************************************************************************/ +static fsp_err_t rm_zmod4410_pbaq_measurement_start (rm_zmod4xxx_ctrl_t * const p_api_ctrl) +{ + FSP_PARAMETER_NOT_USED(p_api_ctrl); + + return FSP_ERR_UNSUPPORTED; +} + +/*******************************************************************************************************************//** + * @brief Unsupported API. + * + * @retval FSP_ERR_UNSUPPORTED Operation mode is not supported. + **********************************************************************************************************************/ +static fsp_err_t rm_zmod4410_pbaq_measurement_stop (rm_zmod4xxx_ctrl_t * const p_api_ctrl) +{ + FSP_PARAMETER_NOT_USED(p_api_ctrl); + + return FSP_ERR_UNSUPPORTED; +} + +/*******************************************************************************************************************//** + * @brief Unsupported API. + * + * @retval FSP_ERR_UNSUPPORTED Operation mode is not supported. + **********************************************************************************************************************/ +static fsp_err_t rm_zmod4410_pbaq_status_check (rm_zmod4xxx_ctrl_t * const p_api_ctrl) +{ + FSP_PARAMETER_NOT_USED(p_api_ctrl); + + return FSP_ERR_UNSUPPORTED; +} + +/*******************************************************************************************************************//** + * @brief Unsupported API. + * + * @retval FSP_ERR_UNSUPPORTED Operation mode is not supported. + **********************************************************************************************************************/ +static fsp_err_t rm_zmod4410_pbaq_read (rm_zmod4xxx_ctrl_t * const p_api_ctrl, + rm_zmod4xxx_raw_data_t * const p_raw_data) +{ + FSP_PARAMETER_NOT_USED(p_api_ctrl); + FSP_PARAMETER_NOT_USED(p_raw_data); + + return FSP_ERR_UNSUPPORTED; +} + +/*******************************************************************************************************************//** + * @brief Unsupported API. + * + * @retval FSP_ERR_UNSUPPORTED Operation mode is not supported. + **********************************************************************************************************************/ +static fsp_err_t rm_zmod4410_pbaq_temperature_and_humidity_set (rm_zmod4xxx_ctrl_t * const p_api_ctrl, + float temperature, + float humidity) +{ + FSP_PARAMETER_NOT_USED(p_api_ctrl); + FSP_PARAMETER_NOT_USED(temperature); + FSP_PARAMETER_NOT_USED(humidity); + + return FSP_ERR_UNSUPPORTED; +} + +/*******************************************************************************************************************//** + * @brief Unsupported API. + * + * @retval FSP_ERR_UNSUPPORTED Operation mode is not supported. + **********************************************************************************************************************/ +static fsp_err_t rm_zmod4410_pbaq_iaq_1st_gen_data_calculate (rm_zmod4xxx_ctrl_t * const p_api_ctrl, + rm_zmod4xxx_raw_data_t * const p_raw_data, + rm_zmod4xxx_iaq_1st_data_t * const p_zmod4xxx_data) +{ + FSP_PARAMETER_NOT_USED(p_api_ctrl); + FSP_PARAMETER_NOT_USED(p_raw_data); + FSP_PARAMETER_NOT_USED(p_zmod4xxx_data); + + return FSP_ERR_UNSUPPORTED; +} + +/*******************************************************************************************************************//** + * @brief Unsupported API. + * + * @retval FSP_ERR_UNSUPPORTED Operation mode is not supported. + **********************************************************************************************************************/ +static fsp_err_t rm_zmod4410_pbaq_iaq_2nd_gen_data_calculate (rm_zmod4xxx_ctrl_t * const p_api_ctrl, + rm_zmod4xxx_raw_data_t * const p_raw_data, + rm_zmod4xxx_iaq_2nd_data_t * const p_zmod4xxx_data) +{ + FSP_PARAMETER_NOT_USED(p_api_ctrl); + FSP_PARAMETER_NOT_USED(p_raw_data); + FSP_PARAMETER_NOT_USED(p_zmod4xxx_data); + + return FSP_ERR_UNSUPPORTED; +} + +/*******************************************************************************************************************//** + * @brief Unsupported API. + * + * @retval FSP_ERR_UNSUPPORTED Operation mode is not supported. + **********************************************************************************************************************/ +static fsp_err_t rm_zmod4410_pbaq_odor_data_calculate (rm_zmod4xxx_ctrl_t * const p_api_ctrl, + rm_zmod4xxx_raw_data_t * const p_raw_data, + rm_zmod4xxx_odor_data_t * const p_zmod4xxx_data) +{ + FSP_PARAMETER_NOT_USED(p_api_ctrl); + FSP_PARAMETER_NOT_USED(p_raw_data); + FSP_PARAMETER_NOT_USED(p_zmod4xxx_data); + + return FSP_ERR_UNSUPPORTED; +} + +/*******************************************************************************************************************//** + * @brief Unsupported API. + * + * @retval FSP_ERR_UNSUPPORTED Operation mode is not supported. + **********************************************************************************************************************/ +static fsp_err_t rm_zmod4410_pbaq_sulfur_odor_data_calculate (rm_zmod4xxx_ctrl_t * const p_api_ctrl, + rm_zmod4xxx_raw_data_t * const p_raw_data, + rm_zmod4xxx_sulfur_odor_data_t * const p_zmod4xxx_data) +{ + FSP_PARAMETER_NOT_USED(p_api_ctrl); + FSP_PARAMETER_NOT_USED(p_raw_data); + FSP_PARAMETER_NOT_USED(p_zmod4xxx_data); + + return FSP_ERR_UNSUPPORTED; +} + +/*******************************************************************************************************************//** + * @brief Unsupported API. + * + * @retval FSP_ERR_UNSUPPORTED Operation mode is not supported. + **********************************************************************************************************************/ +static fsp_err_t rm_zmod4410_pbaq_oaq_1st_gen_data_calculate (rm_zmod4xxx_ctrl_t * const p_api_ctrl, + rm_zmod4xxx_raw_data_t * const p_raw_data, + rm_zmod4xxx_oaq_1st_data_t * const p_zmod4xxx_data) +{ + FSP_PARAMETER_NOT_USED(p_api_ctrl); + FSP_PARAMETER_NOT_USED(p_raw_data); + FSP_PARAMETER_NOT_USED(p_zmod4xxx_data); + + return FSP_ERR_UNSUPPORTED; +} + +/*******************************************************************************************************************//** + * @brief Unsupported API. + * + * @retval FSP_ERR_UNSUPPORTED Operation mode is not supported. + **********************************************************************************************************************/ +static fsp_err_t rm_zmod4410_pbaq_oaq_2nd_gen_data_calculate (rm_zmod4xxx_ctrl_t * const p_api_ctrl, + rm_zmod4xxx_raw_data_t * const p_raw_data, + rm_zmod4xxx_oaq_2nd_data_t * const p_zmod4xxx_data) +{ + FSP_PARAMETER_NOT_USED(p_api_ctrl); + FSP_PARAMETER_NOT_USED(p_raw_data); + FSP_PARAMETER_NOT_USED(p_zmod4xxx_data); + + return FSP_ERR_UNSUPPORTED; +} + +/*******************************************************************************************************************//** + * @brief Unsupported API. + * + * @retval FSP_ERR_UNSUPPORTED Operation mode is not supported. + **********************************************************************************************************************/ +static fsp_err_t rm_zmod4410_pbaq_raq_data_calculate (rm_zmod4xxx_ctrl_t * const p_api_ctrl, + rm_zmod4xxx_raw_data_t * const p_raw_data, + rm_zmod4xxx_raq_data_t * const p_zmod4xxx_data) +{ + FSP_PARAMETER_NOT_USED(p_api_ctrl); + FSP_PARAMETER_NOT_USED(p_raw_data); + FSP_PARAMETER_NOT_USED(p_zmod4xxx_data); + + return FSP_ERR_UNSUPPORTED; +} + +/*******************************************************************************************************************//** + * @brief Unsupported API. + * + * @retval FSP_ERR_UNSUPPORTED Operation mode is not supported. + **********************************************************************************************************************/ +static fsp_err_t rm_zmod4410_pbaq_rel_iaq_data_calculate (rm_zmod4xxx_ctrl_t * const p_api_ctrl, + rm_zmod4xxx_raw_data_t * const p_raw_data, + rm_zmod4xxx_rel_iaq_data_t * const p_zmod4xxx_data) +{ + FSP_PARAMETER_NOT_USED(p_api_ctrl); + FSP_PARAMETER_NOT_USED(p_raw_data); + FSP_PARAMETER_NOT_USED(p_zmod4xxx_data); + + return FSP_ERR_UNSUPPORTED; +} + +/*******************************************************************************************************************//** + * @brief Unsupported API. + * + * @retval FSP_ERR_UNSUPPORTED Operation mode is not supported. + **********************************************************************************************************************/ +static fsp_err_t rm_zmod4410_pbaq_device_error_check (rm_zmod4xxx_ctrl_t * const p_api_ctrl) +{ + FSP_PARAMETER_NOT_USED(p_api_ctrl); + + return FSP_ERR_UNSUPPORTED; +} + +#endif diff --git a/ra/fsp/src/rm_zmod4xxx/pbaq/zmod4410_config_pbaq.h b/ra/fsp/src/rm_zmod4xxx/pbaq/zmod4410_config_pbaq.h new file mode 100644 index 000000000..8e1a33433 --- /dev/null +++ b/ra/fsp/src/rm_zmod4xxx/pbaq/zmod4410_config_pbaq.h @@ -0,0 +1,92 @@ +/** + * @file zmod4410_config_pbaq.h + * @brief This is the configuration for zmod4410 module - pbaq library + * @author Renesas Electronics Corporation + * @version 1.0.0 + */ + +#ifndef _ZMOD4410_CONFIG_PBAQ_H +#define _ZMOD4410_CONFIG_PBAQ_H + +#include <stdio.h> + +#if TEST_RM_ZMOD4XXX // For RA FSP test + #include "../../../../../fsp/src/rm_zmod4xxx/zmod4xxx_types.h" +#else + #include "../zmod4xxx_types.h" +#endif + +#define INIT 0 +#define MEASUREMENT 1 + +#define ZMOD4410_PID 0x2310 +#define ZMOD4410_I2C_ADDR 0x32 + +// REMOVE Sequencer adresses +#define ZMOD4410_H_ADDR 0x40 +#define ZMOD4410_D_ADDR 0x50 +#define ZMOD4410_M_ADDR 0x60 +#define ZMOD4410_S_ADDR 0x68 + +#define ZMOD4410_PROD_DATA_LEN 7 +#define ZMOD4410_ADC_DATA_LEN 32 + +// time between consecutive samples +#define ZMOD4410_PBAQ_SAMPLE_TIME (5000U) + +// clang-format off +static uint8_t data_set_4410i[] = { +// REMOVE heater + 0x00, 0x50, +// REMOVE delay , measurement + 0x00, 0x28, 0xC3, 0xE3, +// REMOVE sequencer + 0x00, 0x00, 0x80, 0x40}; + +// REMOVE This implements "SelectiveOdor_03ext(0_25).xml". +static uint8_t data_set_4410_pbaq[] = { +// REMOVE heater + 0x00, 0x50, 0xFF, 0x38, + 0xFE, 0xD4, 0xFE, 0x70, + 0xFE, 0x0C, 0xFD, 0xA8, + 0xFD, 0x44, 0xFC, 0xE0, +// REMOVE delay + 0x00, 0x14, 0x00, 0x9C, + 0x00, 0x31, 0x00, 0x39, + 0x00, 0xCD, +// REMOVE measurement + 0x23, 0x03, 0xA3, 0x43, +// REMOVE sequencer + 0x00, 0x00, 0x06, 0x49, + 0x06, 0x4A, 0x06, 0x4B, + 0x06, 0x4C, 0x06, 0x4D, + 0x06, 0x4E, 0x06, 0x97, + 0x06, 0xD7, 0x06, 0x5F, + 0x06, 0x4E, 0x06, 0x4D, + 0x06, 0x4C, 0x06, 0x4B, + 0x06, 0x4A, 0x86, 0x61}; + +// clang-format on + +zmod4xxx_conf g_zmod4410_pbaq_sensor_type[] = { + [INIT] = { + .start = 0x80, + .h = { .addr = ZMOD4410_H_ADDR, .len = 2, .data_buf = &data_set_4410i[0]}, + .d = { .addr = ZMOD4410_D_ADDR, .len = 2, .data_buf = &data_set_4410i[2]}, + .m = { .addr = ZMOD4410_M_ADDR, .len = 2, .data_buf = &data_set_4410i[4]}, + .s = { .addr = ZMOD4410_S_ADDR, .len = 4, .data_buf = &data_set_4410i[6]}, + .r = { .addr = 0x97, .len = 4}, + }, + + [MEASUREMENT] = { + .start = 0x80, + .h = {.addr = ZMOD4410_H_ADDR, .len = 16, .data_buf = &data_set_4410_pbaq[0]}, + .d = {.addr = ZMOD4410_D_ADDR, .len = 10, .data_buf = &data_set_4410_pbaq[16]}, + .m = {.addr = ZMOD4410_M_ADDR, .len = 4, .data_buf = &data_set_4410_pbaq[26]}, + .s = {.addr = ZMOD4410_S_ADDR, .len = 32, .data_buf = &data_set_4410_pbaq[30]}, + .r = {.addr = 0x97, .len = 32}, + .prod_data_len = ZMOD4410_PROD_DATA_LEN, + }, +}; + +#endif //_ZMOD4410_CONFIG_PBAQ_H diff --git a/ra/fsp/src/rm_zmod4xxx/raq/rm_zmod4450_raq.c b/ra/fsp/src/rm_zmod4xxx/raq/rm_zmod4450_raq.c index 26eaa7110..3742c08c5 100644 --- a/ra/fsp/src/rm_zmod4xxx/raq/rm_zmod4450_raq.c +++ b/ra/fsp/src/rm_zmod4xxx/raq/rm_zmod4450_raq.c @@ -88,6 +88,12 @@ static fsp_err_t rm_zmod4450_raq_oaq_2nd_gen_data_calculate(rm_zmod4xxx_ctrl_t * static fsp_err_t rm_zmod4450_raq_data_calculate(rm_zmod4xxx_ctrl_t * const p_api_ctrl, rm_zmod4xxx_raw_data_t * const p_raw_data, rm_zmod4xxx_raq_data_t * const p_zmod4xxx_data); +static fsp_err_t rm_zmod4450_raq_rel_iaq_data_calculate(rm_zmod4xxx_ctrl_t * const p_api_ctrl, + rm_zmod4xxx_raw_data_t * const p_raw_data, + rm_zmod4xxx_rel_iaq_data_t * const p_zmod4xxx_data); +static fsp_err_t rm_zmod4450_raq_pbaq_data_calculate(rm_zmod4xxx_ctrl_t * const p_api_ctrl, + rm_zmod4xxx_raw_data_t * const p_raw_data, + rm_zmod4xxx_pbaq_data_t * const p_zmod4xxx_data); static fsp_err_t rm_zmod4450_raq_close(rm_zmod4xxx_ctrl_t * const p_api_ctrl); static fsp_err_t rm_zmod4410_raq_device_error_check(rm_zmod4xxx_ctrl_t * const p_api_ctrl); @@ -113,6 +119,8 @@ rm_zmod4xxx_api_t const g_zmod4xxx_on_zmod4450_raq = .oaq1stGenDataCalculate = rm_zmod4450_raq_oaq_1st_gen_data_calculate, .oaq2ndGenDataCalculate = rm_zmod4450_raq_oaq_2nd_gen_data_calculate, .raqDataCalculate = rm_zmod4450_raq_data_calculate, + .relIaqDataCalculate = rm_zmod4450_raq_rel_iaq_data_calculate, + .pbaqDataCalculate = rm_zmod4450_raq_pbaq_data_calculate, .temperatureAndHumiditySet = rm_zmod4450_raq_temperature_and_humidity_set, .deviceErrorCheck = rm_zmod4410_raq_device_error_check, }; @@ -356,6 +364,38 @@ static fsp_err_t rm_zmod4450_raq_oaq_2nd_gen_data_calculate (rm_zmod4xxx_ctrl_t return FSP_ERR_UNSUPPORTED; } +/*******************************************************************************************************************//** + * @brief Unsupported API. + * + * @retval FSP_ERR_UNSUPPORTED Operation mode is not supported. + **********************************************************************************************************************/ +static fsp_err_t rm_zmod4450_raq_rel_iaq_data_calculate (rm_zmod4xxx_ctrl_t * const p_api_ctrl, + rm_zmod4xxx_raw_data_t * const p_raw_data, + rm_zmod4xxx_rel_iaq_data_t * const p_zmod4xxx_data) +{ + FSP_PARAMETER_NOT_USED(p_api_ctrl); + FSP_PARAMETER_NOT_USED(p_raw_data); + FSP_PARAMETER_NOT_USED(p_zmod4xxx_data); + + return FSP_ERR_UNSUPPORTED; +} + +/*******************************************************************************************************************//** + * @brief Unsupported API. + * + * @retval FSP_ERR_UNSUPPORTED Operation mode is not supported. + **********************************************************************************************************************/ +static fsp_err_t rm_zmod4450_raq_pbaq_data_calculate (rm_zmod4xxx_ctrl_t * const p_api_ctrl, + rm_zmod4xxx_raw_data_t * const p_raw_data, + rm_zmod4xxx_pbaq_data_t * const p_zmod4xxx_data) +{ + FSP_PARAMETER_NOT_USED(p_api_ctrl); + FSP_PARAMETER_NOT_USED(p_raw_data); + FSP_PARAMETER_NOT_USED(p_zmod4xxx_data); + + return FSP_ERR_UNSUPPORTED; +} + /*******************************************************************************************************************//** * @brief Unsupported API. * diff --git a/ra/fsp/src/rm_zmod4xxx/rel_iaq/rel_iaq.h b/ra/fsp/src/rm_zmod4xxx/rel_iaq/rel_iaq.h new file mode 100644 index 000000000..882041b46 --- /dev/null +++ b/ra/fsp/src/rm_zmod4xxx/rel_iaq/rel_iaq.h @@ -0,0 +1,90 @@ +/** + * @file rel_iaq.h + * @author Renesas Electronics Corporation + * @version 1.0.0 + * @brief This file contains the data structure definitions and + * the function definitions for the Relative IAQ algorithm. + * @details The library contains an algorithm to calculate a relative + * IAQ index from ZMOD4410 measurements. + * The implementation is made to allow more than one sensor. + * + */ + +#ifndef REL_IAQ_H_ +#define REL_IAQ_H_ + +#ifdef __cplusplus +extern "C" { +#endif + +#include <stdint.h> +#include <math.h> + +#if TEST_RM_ZMOD4XXX // For RA FSP test + #include "../../../../../fsp/src/rm_zmod4xxx/zmod4xxx_types.h" +#else + #include "../zmod4xxx_types.h" +#endif + +/** \addtogroup RetCodes Return codes of the algorithm functions. + * @{ + */ +#define REL_IAQ_OK (0) /**< everything okay */ +#define REL_IAQ_STABILIZATION (1) /**< sensor in stabilization */ +#define REL_IAQ_DAMAGE (-102) /**< sensor damaged */ +/** @}*/ + +/** +* @brief Variables that describe the sensor or the algorithm state. +*/ +typedef struct { + uint32_t sample_counter; + float rg_mean; + float rel_iaq_raw; + float log10_rel_iaq_smooth; + float var_log10_rel_iaq; + float dev_log10_rel_iaq_target; +} rel_iaq_handle_t; + +/** +* @brief Variables that receive the algorithm outputs. +*/ +typedef struct { + float rmox[13]; /**< MOx resistances. */ + float rhtr; /**< heater resistance. */ + float rel_iaq; /**< relative IAQ index. */ +} rel_iaq_results_t; + +/** +* @brief Algorithm input structure +* @param [in] adc_result Array of 32 bytes with the values from the sensor results table. +*/ +typedef struct { + uint8_t *adc_result; /** Sensor raw values. **/ +} rel_iaq_inputs_t; + +/** + * @brief calculates algorithm results from present sample. + * @param [in] handle Pointer to algorithm state variable. + * @param [in] dev Pointer to the device. + * @param [in] algo_input Structure containing inputs required for algo calculation. + * @param [out] results Pointer for storing the algorithm results. + * @return error code. + */ +int8_t calc_rel_iaq(rel_iaq_handle_t *handle, const zmod4xxx_dev_t *dev, + const rel_iaq_inputs_t *algo_input, + rel_iaq_results_t *results); + +/** + * @brief Initializes the algorithm. + * @param [out] handle Pointer to algorithm state variable. + * @return error code. +*/ +int8_t init_rel_iaq(rel_iaq_handle_t *handle); + +#ifdef __cplusplus +} +#endif + +#endif /* REL_IAQ_H_ */ + diff --git a/ra/fsp/src/rm_zmod4xxx/rel_iaq/rm_zmod4410_rel_iaq.c b/ra/fsp/src/rm_zmod4xxx/rel_iaq/rm_zmod4410_rel_iaq.c new file mode 100644 index 000000000..ab4cd7099 --- /dev/null +++ b/ra/fsp/src/rm_zmod4xxx/rel_iaq/rm_zmod4410_rel_iaq.c @@ -0,0 +1,401 @@ +/*********************************************************************************************************************** + * Copyright [2020-2023] Renesas Electronics Corporation and/or its affiliates. All Rights Reserved. + * + * This software and documentation are supplied by Renesas Electronics America Inc. and may only be used with products + * of Renesas Electronics Corp. and its affiliates ("Renesas"). No other uses are authorized. Renesas products are + * sold pursuant to Renesas terms and conditions of sale. Purchasers are solely responsible for the selection and use + * of Renesas products and Renesas assumes no liability. No license, express or implied, to any intellectual property + * right is granted by Renesas. This software is protected under all applicable laws, including copyright laws. Renesas + * reserves the right to change or discontinue this software and/or this documentation. THE SOFTWARE AND DOCUMENTATION + * IS DELIVERED TO YOU "AS IS," AND RENESAS MAKES NO REPRESENTATIONS OR WARRANTIES, AND TO THE FULLEST EXTENT + * PERMISSIBLE UNDER APPLICABLE LAW, DISCLAIMS ALL WARRANTIES, WHETHER EXPLICITLY OR IMPLICITLY, INCLUDING WARRANTIES + * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, AND NONINFRINGEMENT, WITH RESPECT TO THE SOFTWARE OR + * DOCUMENTATION. RENESAS SHALL HAVE NO LIABILITY ARISING OUT OF ANY SECURITY VULNERABILITY OR BREACH. TO THE MAXIMUM + * EXTENT PERMITTED BY LAW, IN NO EVENT WILL RENESAS BE LIABLE TO YOU IN CONNECTION WITH THE SOFTWARE OR DOCUMENTATION + * (OR ANY PERSON OR ENTITY CLAIMING RIGHTS DERIVED FROM YOU) FOR ANY LOSS, DAMAGES, OR CLAIMS WHATSOEVER, INCLUDING, + * WITHOUT LIMITATION, ANY DIRECT, CONSEQUENTIAL, SPECIAL, INDIRECT, PUNITIVE, OR INCIDENTAL DAMAGES; ANY LOST PROFITS, + * OTHER ECONOMIC DAMAGE, PROPERTY DAMAGE, OR PERSONAL INJURY; AND EVEN IF RENESAS HAS BEEN ADVISED OF THE POSSIBILITY + * OF SUCH LOSS, DAMAGES, CLAIMS OR COSTS. + **********************************************************************************************************************/ + +/********************************************************************************************************************** + * Includes <System Includes> , "Project Includes" + *********************************************************************************************************************/ +#if defined(__CCRX__) || defined(__ICCRX__) || defined(__RX__) + #include "r_zmod4xxx_if.h" +#elif defined(__CCRL__) || defined(__ICCRL78__) || defined(__RL78__) + #include "r_zmod4xxx_if.h" +#else + #define RM_ZMOD4410_REL_IAQ_CFG_LIB_ENABLE (1) +#endif + +#if RM_ZMOD4410_REL_IAQ_CFG_LIB_ENABLE + #include "rm_zmod4xxx.h" + #include "../zmod4xxx_types.h" + #include "rel_iaq.h" + #include "zmod4410_config_rel_iaq.h" + +/********************************************************************************************************************** + * Macro definitions + *********************************************************************************************************************/ + +/********************************************************************************************************************** + * Local Typedef definitions + *********************************************************************************************************************/ + +/********************************************************************************************************************** + * Exported global functions + *********************************************************************************************************************/ + +/********************************************************************************************************************** + * Private (static) variables and functions + *********************************************************************************************************************/ + +static fsp_err_t rm_zmod4410_rel_iaq_open(rm_zmod4xxx_ctrl_t * const p_api_ctrl, rm_zmod4xxx_cfg_t const * const p_cfg); +static fsp_err_t rm_zmod4410_rel_iaq_measurement_start(rm_zmod4xxx_ctrl_t * const p_api_ctrl); +static fsp_err_t rm_zmod4410_rel_iaq_measurement_stop(rm_zmod4xxx_ctrl_t * const p_api_ctrl); +static fsp_err_t rm_zmod4410_rel_iaq_status_check(rm_zmod4xxx_ctrl_t * const p_api_ctrl); +static fsp_err_t rm_zmod4410_rel_iaq_read(rm_zmod4xxx_ctrl_t * const p_api_ctrl, + rm_zmod4xxx_raw_data_t * const p_raw_data); +static fsp_err_t rm_zmod4410_rel_iaq_temperature_and_humidity_set(rm_zmod4xxx_ctrl_t * const p_api_ctrl, + float temperature, + float humidity); +static fsp_err_t rm_zmod4410_rel_iaq_iaq_1st_gen_data_calculate(rm_zmod4xxx_ctrl_t * const p_api_ctrl, + rm_zmod4xxx_raw_data_t * const p_raw_data, + rm_zmod4xxx_iaq_1st_data_t * const p_zmod4xxx_data); +static fsp_err_t rm_zmod4410_rel_iaq_iaq_2nd_gen_data_calculate(rm_zmod4xxx_ctrl_t * const p_api_ctrl, + rm_zmod4xxx_raw_data_t * const p_raw_data, + rm_zmod4xxx_iaq_2nd_data_t * const p_zmod4xxx_data); +static fsp_err_t rm_zmod4410_rel_iaq_odor_data_calculate(rm_zmod4xxx_ctrl_t * const p_api_ctrl, + rm_zmod4xxx_raw_data_t * const p_raw_data, + rm_zmod4xxx_odor_data_t * const p_zmod4xxx_data); +static fsp_err_t rm_zmod4410_rel_iaq_sulfur_odor_data_calculate(rm_zmod4xxx_ctrl_t * const p_api_ctrl, + rm_zmod4xxx_raw_data_t * const p_raw_data, + rm_zmod4xxx_sulfur_odor_data_t * const p_zmod4xxx_data); +static fsp_err_t rm_zmod4410_rel_iaq_oaq_1st_gen_data_calculate(rm_zmod4xxx_ctrl_t * const p_api_ctrl, + rm_zmod4xxx_raw_data_t * const p_raw_data, + rm_zmod4xxx_oaq_1st_data_t * const p_zmod4xxx_data); +static fsp_err_t rm_zmod4410_rel_iaq_oaq_2nd_gen_data_calculate(rm_zmod4xxx_ctrl_t * const p_api_ctrl, + rm_zmod4xxx_raw_data_t * const p_raw_data, + rm_zmod4xxx_oaq_2nd_data_t * const p_zmod4xxx_data); +static fsp_err_t rm_zmod4410_rel_iaq_raq_data_calculate(rm_zmod4xxx_ctrl_t * const p_api_ctrl, + rm_zmod4xxx_raw_data_t * const p_raw_data, + rm_zmod4xxx_raq_data_t * const p_zmod4xxx_data); +static fsp_err_t rm_zmod4410_rel_iaq_data_calculate(rm_zmod4xxx_ctrl_t * const p_api_ctrl, + rm_zmod4xxx_raw_data_t * const p_raw_data, + rm_zmod4xxx_rel_iaq_data_t * const p_zmod4xxx_data); +static fsp_err_t rm_zmod4410_rel_iaq_pbaq_data_calculate(rm_zmod4xxx_ctrl_t * const p_api_ctrl, + rm_zmod4xxx_raw_data_t * const p_raw_data, + rm_zmod4xxx_pbaq_data_t * const p_zmod4xxx_data); +static fsp_err_t rm_zmod4410_rel_iaq_close(rm_zmod4xxx_ctrl_t * const p_api_ctrl); +static fsp_err_t rm_zmod4410_rel_iaq_device_error_check(rm_zmod4xxx_ctrl_t * const p_api_ctrl); + +/********************************************************************************************************************** + * Exported global variables + *********************************************************************************************************************/ +rm_zmod4xxx_api_t const g_zmod4xxx_on_zmod4410_rel_iaq = +{ + .open = rm_zmod4410_rel_iaq_open, + .close = rm_zmod4410_rel_iaq_close, + .measurementStart = rm_zmod4410_rel_iaq_measurement_start, + .measurementStop = rm_zmod4410_rel_iaq_measurement_stop, + .statusCheck = rm_zmod4410_rel_iaq_status_check, + .read = rm_zmod4410_rel_iaq_read, + .iaq1stGenDataCalculate = rm_zmod4410_rel_iaq_iaq_1st_gen_data_calculate, + .iaq2ndGenDataCalculate = rm_zmod4410_rel_iaq_iaq_2nd_gen_data_calculate, + .odorDataCalculate = rm_zmod4410_rel_iaq_odor_data_calculate, + .sulfurOdorDataCalculate = rm_zmod4410_rel_iaq_sulfur_odor_data_calculate, + .oaq1stGenDataCalculate = rm_zmod4410_rel_iaq_oaq_1st_gen_data_calculate, + .oaq2ndGenDataCalculate = rm_zmod4410_rel_iaq_oaq_2nd_gen_data_calculate, + .raqDataCalculate = rm_zmod4410_rel_iaq_raq_data_calculate, + .relIaqDataCalculate = rm_zmod4410_rel_iaq_data_calculate, + .pbaqDataCalculate = rm_zmod4410_rel_iaq_pbaq_data_calculate, + .temperatureAndHumiditySet = rm_zmod4410_rel_iaq_temperature_and_humidity_set, + .deviceErrorCheck = rm_zmod4410_rel_iaq_device_error_check, +}; + +/*********************************************************************************************************************** + * Functions + **********************************************************************************************************************/ + +/*******************************************************************************************************************//** + * @brief Initialize the Relative IAQ library + * + * @retval FSP_SUCCESS Successfully started. + * @retval FSP_ERR_ASSERTION Null pointer passed as a parameter. + **********************************************************************************************************************/ +static fsp_err_t rm_zmod4410_rel_iaq_open (rm_zmod4xxx_ctrl_t * const p_api_ctrl, rm_zmod4xxx_cfg_t const * const p_cfg) +{ + rm_zmod4xxx_instance_ctrl_t * p_ctrl = (rm_zmod4xxx_instance_ctrl_t *) p_api_ctrl; + int8_t lib_err = 0; + rm_zmod4xxx_lib_extended_cfg_t * p_lib = p_ctrl->p_zmod4xxx_lib; + rel_iaq_handle_t * p_handle = (rel_iaq_handle_t *) p_lib->p_handle; + + FSP_PARAMETER_NOT_USED(p_cfg); + + /* Initialize the library */ + lib_err = init_rel_iaq(p_handle); + FSP_ERROR_RETURN(0 == lib_err, FSP_ERR_ASSERTION); + + return FSP_SUCCESS; +} + +/*******************************************************************************************************************//** + * @brief Calculate the Relative IAQ data with the library API. + * + * @retval FSP_SUCCESS Successfully results are read. + * @retval FSP_ERR_ASSERTION Null pointer passed as a parameter. + * @retval FSP_ERR_SENSOR_IN_STABILIZATION Module is stabilizing. + * @retval FSP_ERR_SENSOR_INVALID_DATA Sensor probably damaged. Algorithm results may be incorrect. + **********************************************************************************************************************/ +static fsp_err_t rm_zmod4410_rel_iaq_data_calculate (rm_zmod4xxx_ctrl_t * const p_api_ctrl, + rm_zmod4xxx_raw_data_t * const p_raw_data, + rm_zmod4xxx_rel_iaq_data_t * const p_zmod4xxx_data) +{ + rm_zmod4xxx_instance_ctrl_t * p_ctrl = (rm_zmod4xxx_instance_ctrl_t *) p_api_ctrl; + rm_zmod4xxx_lib_extended_cfg_t * p_lib = p_ctrl->p_zmod4xxx_lib; + rel_iaq_handle_t * p_handle = (rel_iaq_handle_t *) p_lib->p_handle; + rel_iaq_results_t * p_results = (rel_iaq_results_t *) p_lib->p_results; + zmod4xxx_dev_t * p_device = (zmod4xxx_dev_t *) p_lib->p_device; + uint16_t i; + int8_t lib_err = 0; + rel_iaq_inputs_t algorithm_input; + + /* Calculate Relative IAQ data form ADC data */ + algorithm_input.adc_result = &p_raw_data->adc_data[0]; + lib_err = calc_rel_iaq(p_handle, p_device, &algorithm_input, p_results); + FSP_ERROR_RETURN(0 <= lib_err, FSP_ERR_ASSERTION); + + /* Set Data */ + for (i = 0; i < 13; i++) + { + p_zmod4xxx_data->rmox[i] = p_results->rmox[i]; + } + + p_zmod4xxx_data->rhtr = p_results->rhtr; + p_zmod4xxx_data->rel_iaq = p_results->rel_iaq; + FSP_ERROR_RETURN(REL_IAQ_STABILIZATION != lib_err, FSP_ERR_SENSOR_IN_STABILIZATION); + FSP_ERROR_RETURN(REL_IAQ_DAMAGE != lib_err, FSP_ERR_SENSOR_INVALID_DATA); + + return FSP_SUCCESS; +} + +/*******************************************************************************************************************//** + * @brief Unsupported API. + * + * @retval FSP_ERR_UNSUPPORTED Operation mode is not supported. + **********************************************************************************************************************/ +static fsp_err_t rm_zmod4410_rel_iaq_close (rm_zmod4xxx_ctrl_t * const p_api_ctrl) +{ + FSP_PARAMETER_NOT_USED(p_api_ctrl); + + return FSP_ERR_UNSUPPORTED; +} + +/*******************************************************************************************************************//** + * @brief Unsupported API. + * + * @retval FSP_ERR_UNSUPPORTED Operation mode is not supported. + **********************************************************************************************************************/ +static fsp_err_t rm_zmod4410_rel_iaq_measurement_start (rm_zmod4xxx_ctrl_t * const p_api_ctrl) +{ + FSP_PARAMETER_NOT_USED(p_api_ctrl); + + return FSP_ERR_UNSUPPORTED; +} + +/*******************************************************************************************************************//** + * @brief Unsupported API. + * + * @retval FSP_ERR_UNSUPPORTED Operation mode is not supported. + **********************************************************************************************************************/ +static fsp_err_t rm_zmod4410_rel_iaq_measurement_stop (rm_zmod4xxx_ctrl_t * const p_api_ctrl) +{ + FSP_PARAMETER_NOT_USED(p_api_ctrl); + + return FSP_ERR_UNSUPPORTED; +} + +/*******************************************************************************************************************//** + * @brief Unsupported API. + * + * @retval FSP_ERR_UNSUPPORTED Operation mode is not supported. + **********************************************************************************************************************/ +static fsp_err_t rm_zmod4410_rel_iaq_status_check (rm_zmod4xxx_ctrl_t * const p_api_ctrl) +{ + FSP_PARAMETER_NOT_USED(p_api_ctrl); + + return FSP_ERR_UNSUPPORTED; +} + +/*******************************************************************************************************************//** + * @brief Unsupported API. + * + * @retval FSP_ERR_UNSUPPORTED Operation mode is not supported. + **********************************************************************************************************************/ +static fsp_err_t rm_zmod4410_rel_iaq_read (rm_zmod4xxx_ctrl_t * const p_api_ctrl, + rm_zmod4xxx_raw_data_t * const p_raw_data) +{ + FSP_PARAMETER_NOT_USED(p_api_ctrl); + FSP_PARAMETER_NOT_USED(p_raw_data); + + return FSP_ERR_UNSUPPORTED; +} + +/*******************************************************************************************************************//** + * @brief Unsupported API. + * + * @retval FSP_ERR_UNSUPPORTED Operation mode is not supported. + **********************************************************************************************************************/ +static fsp_err_t rm_zmod4410_rel_iaq_temperature_and_humidity_set (rm_zmod4xxx_ctrl_t * const p_api_ctrl, + float temperature, + float humidity) +{ + FSP_PARAMETER_NOT_USED(p_api_ctrl); + FSP_PARAMETER_NOT_USED(temperature); + FSP_PARAMETER_NOT_USED(humidity); + + return FSP_ERR_UNSUPPORTED; +} + +/*******************************************************************************************************************//** + * @brief Unsupported API. + * + * @retval FSP_ERR_UNSUPPORTED Operation mode is not supported. + **********************************************************************************************************************/ +static fsp_err_t rm_zmod4410_rel_iaq_iaq_1st_gen_data_calculate (rm_zmod4xxx_ctrl_t * const p_api_ctrl, + rm_zmod4xxx_raw_data_t * const p_raw_data, + rm_zmod4xxx_iaq_1st_data_t * const p_zmod4xxx_data) +{ + FSP_PARAMETER_NOT_USED(p_api_ctrl); + FSP_PARAMETER_NOT_USED(p_raw_data); + FSP_PARAMETER_NOT_USED(p_zmod4xxx_data); + + return FSP_ERR_UNSUPPORTED; +} + +/*******************************************************************************************************************//** + * @brief Unsupported API. + * + * @retval FSP_ERR_UNSUPPORTED Operation mode is not supported. + **********************************************************************************************************************/ +static fsp_err_t rm_zmod4410_rel_iaq_iaq_2nd_gen_data_calculate (rm_zmod4xxx_ctrl_t * const p_api_ctrl, + rm_zmod4xxx_raw_data_t * const p_raw_data, + rm_zmod4xxx_iaq_2nd_data_t * const p_zmod4xxx_data) +{ + FSP_PARAMETER_NOT_USED(p_api_ctrl); + FSP_PARAMETER_NOT_USED(p_raw_data); + FSP_PARAMETER_NOT_USED(p_zmod4xxx_data); + + return FSP_ERR_UNSUPPORTED; +} + +/*******************************************************************************************************************//** + * @brief Unsupported API. + * + * @retval FSP_ERR_UNSUPPORTED Operation mode is not supported. + **********************************************************************************************************************/ +static fsp_err_t rm_zmod4410_rel_iaq_odor_data_calculate (rm_zmod4xxx_ctrl_t * const p_api_ctrl, + rm_zmod4xxx_raw_data_t * const p_raw_data, + rm_zmod4xxx_odor_data_t * const p_zmod4xxx_data) +{ + FSP_PARAMETER_NOT_USED(p_api_ctrl); + FSP_PARAMETER_NOT_USED(p_raw_data); + FSP_PARAMETER_NOT_USED(p_zmod4xxx_data); + + return FSP_ERR_UNSUPPORTED; +} + +/*******************************************************************************************************************//** + * @brief Unsupported API. + * + * @retval FSP_ERR_UNSUPPORTED Operation mode is not supported. + **********************************************************************************************************************/ +static fsp_err_t rm_zmod4410_rel_iaq_sulfur_odor_data_calculate (rm_zmod4xxx_ctrl_t * const p_api_ctrl, + rm_zmod4xxx_raw_data_t * const p_raw_data, + rm_zmod4xxx_sulfur_odor_data_t * const p_zmod4xxx_data) +{ + FSP_PARAMETER_NOT_USED(p_api_ctrl); + FSP_PARAMETER_NOT_USED(p_raw_data); + FSP_PARAMETER_NOT_USED(p_zmod4xxx_data); + + return FSP_ERR_UNSUPPORTED; +} + +/*******************************************************************************************************************//** + * @brief Unsupported API. + * + * @retval FSP_ERR_UNSUPPORTED Operation mode is not supported. + **********************************************************************************************************************/ +static fsp_err_t rm_zmod4410_rel_iaq_oaq_1st_gen_data_calculate (rm_zmod4xxx_ctrl_t * const p_api_ctrl, + rm_zmod4xxx_raw_data_t * const p_raw_data, + rm_zmod4xxx_oaq_1st_data_t * const p_zmod4xxx_data) +{ + FSP_PARAMETER_NOT_USED(p_api_ctrl); + FSP_PARAMETER_NOT_USED(p_raw_data); + FSP_PARAMETER_NOT_USED(p_zmod4xxx_data); + + return FSP_ERR_UNSUPPORTED; +} + +/*******************************************************************************************************************//** + * @brief Unsupported API. + * + * @retval FSP_ERR_UNSUPPORTED Operation mode is not supported. + **********************************************************************************************************************/ +static fsp_err_t rm_zmod4410_rel_iaq_oaq_2nd_gen_data_calculate (rm_zmod4xxx_ctrl_t * const p_api_ctrl, + rm_zmod4xxx_raw_data_t * const p_raw_data, + rm_zmod4xxx_oaq_2nd_data_t * const p_zmod4xxx_data) +{ + FSP_PARAMETER_NOT_USED(p_api_ctrl); + FSP_PARAMETER_NOT_USED(p_raw_data); + FSP_PARAMETER_NOT_USED(p_zmod4xxx_data); + + return FSP_ERR_UNSUPPORTED; +} + +/*******************************************************************************************************************//** + * @brief Unsupported API. + * + * @retval FSP_ERR_UNSUPPORTED Operation mode is not supported. + **********************************************************************************************************************/ +static fsp_err_t rm_zmod4410_rel_iaq_raq_data_calculate (rm_zmod4xxx_ctrl_t * const p_api_ctrl, + rm_zmod4xxx_raw_data_t * const p_raw_data, + rm_zmod4xxx_raq_data_t * const p_zmod4xxx_data) +{ + FSP_PARAMETER_NOT_USED(p_api_ctrl); + FSP_PARAMETER_NOT_USED(p_raw_data); + FSP_PARAMETER_NOT_USED(p_zmod4xxx_data); + + return FSP_ERR_UNSUPPORTED; +} + +/*******************************************************************************************************************//** + * @brief Unsupported API. + * + * @retval FSP_ERR_UNSUPPORTED Operation mode is not supported. + **********************************************************************************************************************/ +static fsp_err_t rm_zmod4410_rel_iaq_pbaq_data_calculate (rm_zmod4xxx_ctrl_t * const p_api_ctrl, + rm_zmod4xxx_raw_data_t * const p_raw_data, + rm_zmod4xxx_pbaq_data_t * const p_zmod4xxx_data) +{ + FSP_PARAMETER_NOT_USED(p_api_ctrl); + FSP_PARAMETER_NOT_USED(p_raw_data); + FSP_PARAMETER_NOT_USED(p_zmod4xxx_data); + + return FSP_ERR_UNSUPPORTED; +} + +/*******************************************************************************************************************//** + * @brief Unsupported API. + * + * @retval FSP_ERR_UNSUPPORTED Operation mode is not supported. + **********************************************************************************************************************/ +static fsp_err_t rm_zmod4410_rel_iaq_device_error_check (rm_zmod4xxx_ctrl_t * const p_api_ctrl) +{ + FSP_PARAMETER_NOT_USED(p_api_ctrl); + + return FSP_ERR_UNSUPPORTED; +} + +#endif diff --git a/ra/fsp/src/rm_zmod4xxx/rel_iaq/zmod4410_config_rel_iaq.h b/ra/fsp/src/rm_zmod4xxx/rel_iaq/zmod4410_config_rel_iaq.h new file mode 100644 index 000000000..9ffc0b7cc --- /dev/null +++ b/ra/fsp/src/rm_zmod4xxx/rel_iaq/zmod4410_config_rel_iaq.h @@ -0,0 +1,90 @@ +/** + * @file zmod4410_config_rel_iaq.h + * @brief This is the configuration for zmod4410 module - rel_iaq library + * @author Renesas Electronics Corporation + * @version 1.0.0 + */ + +#ifndef _ZMOD4410_CONFIG_REL_IAQ_H +#define _ZMOD4410_CONFIG_REL_IAQ_H + +#include <stdio.h> + +#if TEST_RM_ZMOD4XXX // For RA FSP test + #include "../../../../../fsp/src/rm_zmod4xxx/zmod4xxx_types.h" +#else + #include "../zmod4xxx_types.h" +#endif + +#define INIT 0 +#define MEASUREMENT 1 + +#define ZMOD4410_PID 0x2310 +#define ZMOD4410_I2C_ADDR 0x32 + +// REMOVE Sequencer adresses +#define ZMOD4410_H_ADDR 0x40 +#define ZMOD4410_D_ADDR 0x50 +#define ZMOD4410_M_ADDR 0x60 +#define ZMOD4410_S_ADDR 0x68 + +#define ZMOD4410_PROD_DATA_LEN 7 +#define ZMOD4410_ADC_DATA_LEN 32 + +// Measurement interval +#define ZMOD4410_REL_IAQ_SAMPLE_TIME (3000U) + +// clang-format off +static uint8_t data_set_4410i[] = { +// REMOVE heater + 0x00, 0x50, +// REMOVE delay , measurement + 0x00, 0x28, 0xC3, 0xE3, +// REMOVE sequencer + 0x00, 0x00, 0x80, 0x40}; + +static uint8_t data_set_4410_rel_iaq[] = { +// REMOVE heater + 0x00, 0x50, 0xFF, 0x38, + 0xFE, 0xD4, 0xFE, 0x70, + 0xFE, 0x0C, 0xFD, 0xA8, + 0xFD, 0x44, 0xFC, 0xE0, +// REMOVE delay + 0x00, 0x52, 0x02, 0x67, + 0x00, 0xCD, 0x03, 0x34, +// REMOVE measurement + 0x23, 0x03, 0xA3, 0x43, +// REMOVE sequencer + 0x00, 0x00, 0x06, 0x49, + 0x06, 0x4A, 0x06, 0x4B, + 0x06, 0x4C, 0x06, 0x4D, + 0x06, 0x4E, 0x06, 0x97, + 0x06, 0xD7, 0x06, 0x57, + 0x06, 0x4E, 0x06, 0x4D, + 0x06, 0x4C, 0x06, 0x4B, + 0x06, 0x4A, 0x86, 0x59}; + +// clang-format on + +zmod4xxx_conf g_zmod4410_rel_iaq_sensor_type[] = { + [INIT] = { + .start = 0x80, + .h = { .addr = ZMOD4410_H_ADDR, .len = 2, .data_buf = &data_set_4410i[0]}, + .d = { .addr = ZMOD4410_D_ADDR, .len = 2, .data_buf = &data_set_4410i[2]}, + .m = { .addr = ZMOD4410_M_ADDR, .len = 2, .data_buf = &data_set_4410i[4]}, + .s = { .addr = ZMOD4410_S_ADDR, .len = 4, .data_buf = &data_set_4410i[6]}, + .r = { .addr = 0x97, .len = 4}, + }, + + [MEASUREMENT] = { + .start = 0x80, + .h = {.addr = ZMOD4410_H_ADDR, .len = 16, .data_buf = &data_set_4410_rel_iaq[0]}, + .d = {.addr = ZMOD4410_D_ADDR, .len = 8, .data_buf = &data_set_4410_rel_iaq[16]}, + .m = {.addr = ZMOD4410_M_ADDR, .len = 4, .data_buf = &data_set_4410_rel_iaq[24]}, + .s = {.addr = ZMOD4410_S_ADDR, .len = 32, .data_buf = &data_set_4410_rel_iaq[28]}, + .r = {.addr = 0x97, .len = 32}, + .prod_data_len = ZMOD4410_PROD_DATA_LEN, + }, +}; + +#endif //_ZMOD4410_CONFIG_REL_IAQ_H diff --git a/ra/fsp/src/rm_zmod4xxx/rel_iaq_ulp/rel_iaq_ulp.h b/ra/fsp/src/rm_zmod4xxx/rel_iaq_ulp/rel_iaq_ulp.h new file mode 100644 index 000000000..dbc94de3a --- /dev/null +++ b/ra/fsp/src/rm_zmod4xxx/rel_iaq_ulp/rel_iaq_ulp.h @@ -0,0 +1,89 @@ +/** + * @file rel_iaq_ulp.h + * @author Renesas Electronics Corporation + * @version 1.0.0 + * @brief This file contains the data structure definitions and + * the function definitions for the Relative IAQ ULP algorithm. + * @details The library contains an algorithm to calculate a relative + * IAQ index from ZMOD4410 measurements. + * The implementation is made to allow more than one sensor. + * + */ + +#ifndef REL_IAQ_ULP_H_ +#define REL_IAQ_ULP_H_ + +#ifdef __cplusplus +extern "C" { +#endif + +#include <stdint.h> +#include <math.h> + +#if TEST_RM_ZMOD4XXX // For RA FSP test + #include "../../../../../fsp/src/rm_zmod4xxx/zmod4xxx_types.h" +#else + #include "../zmod4xxx_types.h" +#endif + +/** \addtogroup RetCodes Return codes of the algorithm functions. + * @{ + */ +#define REL_IAQ_ULP_OK (0) /**< everything okay */ +#define REL_IAQ_ULP_STABILIZATION (1) /**< sensor in stabilization */ +#define REL_IAQ_ULP_DAMAGE (-102) /**< sensor damaged */ +/** @}*/ + +/** +* @brief Variables that describe the sensor or the algorithm state. +*/ +typedef struct { + uint32_t sample_counter; + float rg_mean; + float rel_iaq_raw; + float log10_rel_iaq_smooth; + float var_log10_rel_iaq; + float dev_log10_rel_iaq_target; +} rel_iaq_ulp_handle_t; + +/** +* @brief Variables that receive the algorithm outputs. +*/ +typedef struct { + float rmox[13]; /**< MOx resistances. */ + float rhtr; /**< heater resistance. */ + float rel_iaq; /**< relative IAQ index. */ +} rel_iaq_ulp_results_t; + +/** +* @brief Algorithm input structure +* @param [in] adc_result Array of 32 bytes with the values from the sensor results table. +*/ +typedef struct { + uint8_t *adc_result; /** Sensor raw values. **/ +} rel_iaq_ulp_inputs_t; + +/** + * @brief calculates algorithm results from present sample. + * @param [in] handle Pointer to algorithm state variable. + * @param [in] dev Pointer to the device. + * @param [in] algo_input Structure containing inputs required for algo calculation. + * @param [out] results Pointer for storing the algorithm results. + * @return error code. + */ +int8_t calc_rel_iaq_ulp(rel_iaq_ulp_handle_t *handle, const zmod4xxx_dev_t *dev, + const rel_iaq_ulp_inputs_t *algo_input, + rel_iaq_ulp_results_t *results); + +/** + * @brief Initializes the algorithm. + * @param [out] handle Pointer to algorithm state variable. + * @return error code. +*/ +int8_t init_rel_iaq_ulp(rel_iaq_ulp_handle_t *handle); + +#ifdef __cplusplus +} +#endif + +#endif /* REL_IAQ_ULP_H_ */ diff --git a/ra/fsp/src/rm_zmod4xxx/rel_iaq_ulp/rm_zmod4410_rel_iaq_ulp.c b/ra/fsp/src/rm_zmod4xxx/rel_iaq_ulp/rm_zmod4410_rel_iaq_ulp.c new file mode 100644 index 000000000..a11ed8ce8 --- /dev/null +++ b/ra/fsp/src/rm_zmod4xxx/rel_iaq_ulp/rm_zmod4410_rel_iaq_ulp.c @@ -0,0 +1,403 @@ +/*********************************************************************************************************************** + * Copyright [2020-2023] Renesas Electronics Corporation and/or its affiliates. All Rights Reserved. + * + * This software and documentation are supplied by Renesas Electronics America Inc. and may only be used with products + * of Renesas Electronics Corp. and its affiliates ("Renesas"). No other uses are authorized. Renesas products are + * sold pursuant to Renesas terms and conditions of sale. Purchasers are solely responsible for the selection and use + * of Renesas products and Renesas assumes no liability. No license, express or implied, to any intellectual property + * right is granted by Renesas. This software is protected under all applicable laws, including copyright laws. Renesas + * reserves the right to change or discontinue this software and/or this documentation. THE SOFTWARE AND DOCUMENTATION + * IS DELIVERED TO YOU "AS IS," AND RENESAS MAKES NO REPRESENTATIONS OR WARRANTIES, AND TO THE FULLEST EXTENT + * PERMISSIBLE UNDER APPLICABLE LAW, DISCLAIMS ALL WARRANTIES, WHETHER EXPLICITLY OR IMPLICITLY, INCLUDING WARRANTIES + * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, AND NONINFRINGEMENT, WITH RESPECT TO THE SOFTWARE OR + * DOCUMENTATION. RENESAS SHALL HAVE NO LIABILITY ARISING OUT OF ANY SECURITY VULNERABILITY OR BREACH. TO THE MAXIMUM + * EXTENT PERMITTED BY LAW, IN NO EVENT WILL RENESAS BE LIABLE TO YOU IN CONNECTION WITH THE SOFTWARE OR DOCUMENTATION + * (OR ANY PERSON OR ENTITY CLAIMING RIGHTS DERIVED FROM YOU) FOR ANY LOSS, DAMAGES, OR CLAIMS WHATSOEVER, INCLUDING, + * WITHOUT LIMITATION, ANY DIRECT, CONSEQUENTIAL, SPECIAL, INDIRECT, PUNITIVE, OR INCIDENTAL DAMAGES; ANY LOST PROFITS, + * OTHER ECONOMIC DAMAGE, PROPERTY DAMAGE, OR PERSONAL INJURY; AND EVEN IF RENESAS HAS BEEN ADVISED OF THE POSSIBILITY + * OF SUCH LOSS, DAMAGES, CLAIMS OR COSTS. + **********************************************************************************************************************/ + +/********************************************************************************************************************** + * Includes <System Includes> , "Project Includes" + *********************************************************************************************************************/ +#if defined(__CCRX__) || defined(__ICCRX__) || defined(__RX__) + #include "r_zmod4xxx_if.h" +#elif defined(__CCRL__) || defined(__ICCRL78__) || defined(__RL78__) + #include "r_zmod4xxx_if.h" +#else + #define RM_ZMOD4410_REL_IAQ_ULP_CFG_LIB_ENABLE (1) +#endif + +#if RM_ZMOD4410_REL_IAQ_ULP_CFG_LIB_ENABLE + #include "rm_zmod4xxx.h" + #include "../zmod4xxx_types.h" + #include "rel_iaq_ulp.h" + #include "zmod4410_config_rel_iaq_ulp.h" + +/********************************************************************************************************************** + * Macro definitions + *********************************************************************************************************************/ + +/********************************************************************************************************************** + * Local Typedef definitions + *********************************************************************************************************************/ + +/********************************************************************************************************************** + * Exported global functions + *********************************************************************************************************************/ + +/********************************************************************************************************************** + * Private (static) variables and functions + *********************************************************************************************************************/ + +static fsp_err_t rm_zmod4410_rel_iaq_ulp_open(rm_zmod4xxx_ctrl_t * const p_api_ctrl, + rm_zmod4xxx_cfg_t const * const p_cfg); +static fsp_err_t rm_zmod4410_rel_iaq_ulp_measurement_start(rm_zmod4xxx_ctrl_t * const p_api_ctrl); +static fsp_err_t rm_zmod4410_rel_iaq_ulp_measurement_stop(rm_zmod4xxx_ctrl_t * const p_api_ctrl); +static fsp_err_t rm_zmod4410_rel_iaq_ulp_status_check(rm_zmod4xxx_ctrl_t * const p_api_ctrl); +static fsp_err_t rm_zmod4410_rel_iaq_ulp_read(rm_zmod4xxx_ctrl_t * const p_api_ctrl, + rm_zmod4xxx_raw_data_t * const p_raw_data); +static fsp_err_t rm_zmod4410_rel_iaq_ulp_temperature_and_humidity_set(rm_zmod4xxx_ctrl_t * const p_api_ctrl, + float temperature, + float humidity); +static fsp_err_t rm_zmod4410_rel_iaq_ulp_iaq_1st_gen_data_calculate(rm_zmod4xxx_ctrl_t * const p_api_ctrl, + rm_zmod4xxx_raw_data_t * const p_raw_data, + rm_zmod4xxx_iaq_1st_data_t * const p_zmod4xxx_data); +static fsp_err_t rm_zmod4410_rel_iaq_ulp_iaq_2nd_gen_data_calculate(rm_zmod4xxx_ctrl_t * const p_api_ctrl, + rm_zmod4xxx_raw_data_t * const p_raw_data, + rm_zmod4xxx_iaq_2nd_data_t * const p_zmod4xxx_data); +static fsp_err_t rm_zmod4410_rel_iaq_ulp_odor_data_calculate(rm_zmod4xxx_ctrl_t * const p_api_ctrl, + rm_zmod4xxx_raw_data_t * const p_raw_data, + rm_zmod4xxx_odor_data_t * const p_zmod4xxx_data); +static fsp_err_t rm_zmod4410_rel_iaq_ulp_sulfur_odor_data_calculate(rm_zmod4xxx_ctrl_t * const p_api_ctrl, + rm_zmod4xxx_raw_data_t * const p_raw_data, + rm_zmod4xxx_sulfur_odor_data_t * const p_zmod4xxx_data); +static fsp_err_t rm_zmod4410_rel_iaq_ulp_oaq_1st_gen_data_calculate(rm_zmod4xxx_ctrl_t * const p_api_ctrl, + rm_zmod4xxx_raw_data_t * const p_raw_data, + rm_zmod4xxx_oaq_1st_data_t * const p_zmod4xxx_data); +static fsp_err_t rm_zmod4410_rel_iaq_ulp_oaq_2nd_gen_data_calculate(rm_zmod4xxx_ctrl_t * const p_api_ctrl, + rm_zmod4xxx_raw_data_t * const p_raw_data, + rm_zmod4xxx_oaq_2nd_data_t * const p_zmod4xxx_data); +static fsp_err_t rm_zmod4410_rel_iaq_ulp_raq_data_calculate(rm_zmod4xxx_ctrl_t * const p_api_ctrl, + rm_zmod4xxx_raw_data_t * const p_raw_data, + rm_zmod4xxx_raq_data_t * const p_zmod4xxx_data); +static fsp_err_t rm_zmod4410_rel_iaq_ulp_data_calculate(rm_zmod4xxx_ctrl_t * const p_api_ctrl, + rm_zmod4xxx_raw_data_t * const p_raw_data, + rm_zmod4xxx_rel_iaq_data_t * const p_zmod4xxx_data); +static fsp_err_t rm_zmod4410_rel_iaq_ulp_pbaq_data_calculate(rm_zmod4xxx_ctrl_t * const p_api_ctrl, + rm_zmod4xxx_raw_data_t * const p_raw_data, + rm_zmod4xxx_pbaq_data_t * const p_zmod4xxx_data); +static fsp_err_t rm_zmod4410_rel_iaq_ulp_close(rm_zmod4xxx_ctrl_t * const p_api_ctrl); +static fsp_err_t rm_zmod4410_rel_iaq_ulp_device_error_check(rm_zmod4xxx_ctrl_t * const p_api_ctrl); + +/********************************************************************************************************************** + * Exported global variables + *********************************************************************************************************************/ +rm_zmod4xxx_api_t const g_zmod4xxx_on_zmod4410_rel_iaq_ulp = +{ + .open = rm_zmod4410_rel_iaq_ulp_open, + .close = rm_zmod4410_rel_iaq_ulp_close, + .measurementStart = rm_zmod4410_rel_iaq_ulp_measurement_start, + .measurementStop = rm_zmod4410_rel_iaq_ulp_measurement_stop, + .statusCheck = rm_zmod4410_rel_iaq_ulp_status_check, + .read = rm_zmod4410_rel_iaq_ulp_read, + .iaq1stGenDataCalculate = rm_zmod4410_rel_iaq_ulp_iaq_1st_gen_data_calculate, + .iaq2ndGenDataCalculate = rm_zmod4410_rel_iaq_ulp_iaq_2nd_gen_data_calculate, + .odorDataCalculate = rm_zmod4410_rel_iaq_ulp_odor_data_calculate, + .sulfurOdorDataCalculate = rm_zmod4410_rel_iaq_ulp_sulfur_odor_data_calculate, + .oaq1stGenDataCalculate = rm_zmod4410_rel_iaq_ulp_oaq_1st_gen_data_calculate, + .oaq2ndGenDataCalculate = rm_zmod4410_rel_iaq_ulp_oaq_2nd_gen_data_calculate, + .raqDataCalculate = rm_zmod4410_rel_iaq_ulp_raq_data_calculate, + .relIaqDataCalculate = rm_zmod4410_rel_iaq_ulp_data_calculate, + .pbaqDataCalculate = rm_zmod4410_rel_iaq_ulp_pbaq_data_calculate, + .temperatureAndHumiditySet = rm_zmod4410_rel_iaq_ulp_temperature_and_humidity_set, + .deviceErrorCheck = rm_zmod4410_rel_iaq_ulp_device_error_check, +}; + +/*********************************************************************************************************************** + * Functions + **********************************************************************************************************************/ + +/*******************************************************************************************************************//** + * @brief Initialize the Relative IAQ ULP library + * + * @retval FSP_SUCCESS Successfully started. + * @retval FSP_ERR_ASSERTION Null pointer passed as a parameter. + **********************************************************************************************************************/ +static fsp_err_t rm_zmod4410_rel_iaq_ulp_open (rm_zmod4xxx_ctrl_t * const p_api_ctrl, + rm_zmod4xxx_cfg_t const * const p_cfg) +{ + rm_zmod4xxx_instance_ctrl_t * p_ctrl = (rm_zmod4xxx_instance_ctrl_t *) p_api_ctrl; + int8_t lib_err = 0; + rm_zmod4xxx_lib_extended_cfg_t * p_lib = p_ctrl->p_zmod4xxx_lib; + rel_iaq_ulp_handle_t * p_handle = (rel_iaq_ulp_handle_t *) p_lib->p_handle; + + FSP_PARAMETER_NOT_USED(p_cfg); + + /* Initialize the library */ + lib_err = init_rel_iaq_ulp(p_handle); + FSP_ERROR_RETURN(0 == lib_err, FSP_ERR_ASSERTION); + + return FSP_SUCCESS; +} + +/*******************************************************************************************************************//** + * @brief Calculate the Relative IAQ ULP data with the library API. + * + * @retval FSP_SUCCESS Successfully results are read. + * @retval FSP_ERR_ASSERTION Null pointer passed as a parameter. + * @retval FSP_ERR_SENSOR_IN_STABILIZATION Module is stabilizing. + * @retval FSP_ERR_SENSOR_INVALID_DATA Sensor probably damaged. Algorithm results may be incorrect. + **********************************************************************************************************************/ +static fsp_err_t rm_zmod4410_rel_iaq_ulp_data_calculate (rm_zmod4xxx_ctrl_t * const p_api_ctrl, + rm_zmod4xxx_raw_data_t * const p_raw_data, + rm_zmod4xxx_rel_iaq_data_t * const p_zmod4xxx_data) +{ + rm_zmod4xxx_instance_ctrl_t * p_ctrl = (rm_zmod4xxx_instance_ctrl_t *) p_api_ctrl; + rm_zmod4xxx_lib_extended_cfg_t * p_lib = p_ctrl->p_zmod4xxx_lib; + rel_iaq_ulp_handle_t * p_handle = (rel_iaq_ulp_handle_t *) p_lib->p_handle; + rel_iaq_ulp_results_t * p_results = (rel_iaq_ulp_results_t *) p_lib->p_results; + zmod4xxx_dev_t * p_device = (zmod4xxx_dev_t *) p_lib->p_device; + uint16_t i; + int8_t lib_err = 0; + rel_iaq_ulp_inputs_t algorithm_input; + + /* Calculate Relative IAQ ULP data form ADC data */ + algorithm_input.adc_result = &p_raw_data->adc_data[0]; + lib_err = calc_rel_iaq_ulp(p_handle, p_device, &algorithm_input, p_results); + FSP_ERROR_RETURN(0 <= lib_err, FSP_ERR_ASSERTION); + + /* Set Data */ + for (i = 0; i < 13; i++) + { + p_zmod4xxx_data->rmox[i] = p_results->rmox[i]; + } + + p_zmod4xxx_data->rhtr = p_results->rhtr; + p_zmod4xxx_data->rel_iaq = p_results->rel_iaq; + FSP_ERROR_RETURN(REL_IAQ_ULP_STABILIZATION != lib_err, FSP_ERR_SENSOR_IN_STABILIZATION); + FSP_ERROR_RETURN(REL_IAQ_ULP_DAMAGE != lib_err, FSP_ERR_SENSOR_INVALID_DATA); + + return FSP_SUCCESS; +} + +/*******************************************************************************************************************//** + * @brief Unsupported API. + * + * @retval FSP_ERR_UNSUPPORTED Operation mode is not supported. + **********************************************************************************************************************/ +static fsp_err_t rm_zmod4410_rel_iaq_ulp_close (rm_zmod4xxx_ctrl_t * const p_api_ctrl) +{ + FSP_PARAMETER_NOT_USED(p_api_ctrl); + + return FSP_ERR_UNSUPPORTED; +} + +/*******************************************************************************************************************//** + * @brief Unsupported API. + * + * @retval FSP_ERR_UNSUPPORTED Operation mode is not supported. + **********************************************************************************************************************/ +static fsp_err_t rm_zmod4410_rel_iaq_ulp_measurement_start (rm_zmod4xxx_ctrl_t * const p_api_ctrl) +{ + FSP_PARAMETER_NOT_USED(p_api_ctrl); + + return FSP_ERR_UNSUPPORTED; +} + +/*******************************************************************************************************************//** + * @brief Unsupported API. + * + * @retval FSP_ERR_UNSUPPORTED Operation mode is not supported. + **********************************************************************************************************************/ +static fsp_err_t rm_zmod4410_rel_iaq_ulp_measurement_stop (rm_zmod4xxx_ctrl_t * const p_api_ctrl) +{ + FSP_PARAMETER_NOT_USED(p_api_ctrl); + + return FSP_ERR_UNSUPPORTED; +} + +/*******************************************************************************************************************//** + * @brief Unsupported API. + * + * @retval FSP_ERR_UNSUPPORTED Operation mode is not supported. + **********************************************************************************************************************/ +static fsp_err_t rm_zmod4410_rel_iaq_ulp_status_check (rm_zmod4xxx_ctrl_t * const p_api_ctrl) +{ + FSP_PARAMETER_NOT_USED(p_api_ctrl); + + return FSP_ERR_UNSUPPORTED; +} + +/*******************************************************************************************************************//** + * @brief Unsupported API. + * + * @retval FSP_ERR_UNSUPPORTED Operation mode is not supported. + **********************************************************************************************************************/ +static fsp_err_t rm_zmod4410_rel_iaq_ulp_read (rm_zmod4xxx_ctrl_t * const p_api_ctrl, + rm_zmod4xxx_raw_data_t * const p_raw_data) +{ + FSP_PARAMETER_NOT_USED(p_api_ctrl); + FSP_PARAMETER_NOT_USED(p_raw_data); + + return FSP_ERR_UNSUPPORTED; +} + +/*******************************************************************************************************************//** + * @brief Unsupported API. + * + * @retval FSP_ERR_UNSUPPORTED Operation mode is not supported. + **********************************************************************************************************************/ +static fsp_err_t rm_zmod4410_rel_iaq_ulp_temperature_and_humidity_set (rm_zmod4xxx_ctrl_t * const p_api_ctrl, + float temperature, + float humidity) +{ + FSP_PARAMETER_NOT_USED(p_api_ctrl); + FSP_PARAMETER_NOT_USED(temperature); + FSP_PARAMETER_NOT_USED(humidity); + + return FSP_ERR_UNSUPPORTED; +} + +/*******************************************************************************************************************//** + * @brief Unsupported API. + * + * @retval FSP_ERR_UNSUPPORTED Operation mode is not supported. + **********************************************************************************************************************/ +static fsp_err_t rm_zmod4410_rel_iaq_ulp_iaq_1st_gen_data_calculate (rm_zmod4xxx_ctrl_t * const p_api_ctrl, + rm_zmod4xxx_raw_data_t * const p_raw_data, + rm_zmod4xxx_iaq_1st_data_t * const p_zmod4xxx_data) +{ + FSP_PARAMETER_NOT_USED(p_api_ctrl); + FSP_PARAMETER_NOT_USED(p_raw_data); + FSP_PARAMETER_NOT_USED(p_zmod4xxx_data); + + return FSP_ERR_UNSUPPORTED; +} + +/*******************************************************************************************************************//** + * @brief Unsupported API. + * + * @retval FSP_ERR_UNSUPPORTED Operation mode is not supported. + **********************************************************************************************************************/ +static fsp_err_t rm_zmod4410_rel_iaq_ulp_iaq_2nd_gen_data_calculate (rm_zmod4xxx_ctrl_t * const p_api_ctrl, + rm_zmod4xxx_raw_data_t * const p_raw_data, + rm_zmod4xxx_iaq_2nd_data_t * const p_zmod4xxx_data) +{ + FSP_PARAMETER_NOT_USED(p_api_ctrl); + FSP_PARAMETER_NOT_USED(p_raw_data); + FSP_PARAMETER_NOT_USED(p_zmod4xxx_data); + + return FSP_ERR_UNSUPPORTED; +} + +/*******************************************************************************************************************//** + * @brief Unsupported API. + * + * @retval FSP_ERR_UNSUPPORTED Operation mode is not supported. + **********************************************************************************************************************/ +static fsp_err_t rm_zmod4410_rel_iaq_ulp_odor_data_calculate (rm_zmod4xxx_ctrl_t * const p_api_ctrl, + rm_zmod4xxx_raw_data_t * const p_raw_data, + rm_zmod4xxx_odor_data_t * const p_zmod4xxx_data) +{ + FSP_PARAMETER_NOT_USED(p_api_ctrl); + FSP_PARAMETER_NOT_USED(p_raw_data); + FSP_PARAMETER_NOT_USED(p_zmod4xxx_data); + + return FSP_ERR_UNSUPPORTED; +} + +/*******************************************************************************************************************//** + * @brief Unsupported API. + * + * @retval FSP_ERR_UNSUPPORTED Operation mode is not supported. + **********************************************************************************************************************/ +static fsp_err_t rm_zmod4410_rel_iaq_ulp_sulfur_odor_data_calculate (rm_zmod4xxx_ctrl_t * const p_api_ctrl, + rm_zmod4xxx_raw_data_t * const p_raw_data, + rm_zmod4xxx_sulfur_odor_data_t * const p_zmod4xxx_data) +{ + FSP_PARAMETER_NOT_USED(p_api_ctrl); + FSP_PARAMETER_NOT_USED(p_raw_data); + FSP_PARAMETER_NOT_USED(p_zmod4xxx_data); + + return FSP_ERR_UNSUPPORTED; +} + +/*******************************************************************************************************************//** + * @brief Unsupported API. + * + * @retval FSP_ERR_UNSUPPORTED Operation mode is not supported. + **********************************************************************************************************************/ +static fsp_err_t rm_zmod4410_rel_iaq_ulp_oaq_1st_gen_data_calculate (rm_zmod4xxx_ctrl_t * const p_api_ctrl, + rm_zmod4xxx_raw_data_t * const p_raw_data, + rm_zmod4xxx_oaq_1st_data_t * const p_zmod4xxx_data) +{ + FSP_PARAMETER_NOT_USED(p_api_ctrl); + FSP_PARAMETER_NOT_USED(p_raw_data); + FSP_PARAMETER_NOT_USED(p_zmod4xxx_data); + + return FSP_ERR_UNSUPPORTED; +} + +/*******************************************************************************************************************//** + * @brief Unsupported API. + * + * @retval FSP_ERR_UNSUPPORTED Operation mode is not supported. + **********************************************************************************************************************/ +static fsp_err_t rm_zmod4410_rel_iaq_ulp_oaq_2nd_gen_data_calculate (rm_zmod4xxx_ctrl_t * const p_api_ctrl, + rm_zmod4xxx_raw_data_t * const p_raw_data, + rm_zmod4xxx_oaq_2nd_data_t * const p_zmod4xxx_data) +{ + FSP_PARAMETER_NOT_USED(p_api_ctrl); + FSP_PARAMETER_NOT_USED(p_raw_data); + FSP_PARAMETER_NOT_USED(p_zmod4xxx_data); + + return FSP_ERR_UNSUPPORTED; +} + +/*******************************************************************************************************************//** + * @brief Unsupported API. + * + * @retval FSP_ERR_UNSUPPORTED Operation mode is not supported. + **********************************************************************************************************************/ +static fsp_err_t rm_zmod4410_rel_iaq_ulp_raq_data_calculate (rm_zmod4xxx_ctrl_t * const p_api_ctrl, + rm_zmod4xxx_raw_data_t * const p_raw_data, + rm_zmod4xxx_raq_data_t * const p_zmod4xxx_data) +{ + FSP_PARAMETER_NOT_USED(p_api_ctrl); + FSP_PARAMETER_NOT_USED(p_raw_data); + FSP_PARAMETER_NOT_USED(p_zmod4xxx_data); + + return FSP_ERR_UNSUPPORTED; +} + +/*******************************************************************************************************************//** + * @brief Unsupported API. + * + * @retval FSP_ERR_UNSUPPORTED Operation mode is not supported. + **********************************************************************************************************************/ +static fsp_err_t rm_zmod4410_rel_iaq_ulp_pbaq_data_calculate (rm_zmod4xxx_ctrl_t * const p_api_ctrl, + rm_zmod4xxx_raw_data_t * const p_raw_data, + rm_zmod4xxx_pbaq_data_t * const p_zmod4xxx_data) +{ + FSP_PARAMETER_NOT_USED(p_api_ctrl); + FSP_PARAMETER_NOT_USED(p_raw_data); + FSP_PARAMETER_NOT_USED(p_zmod4xxx_data); + + return FSP_ERR_UNSUPPORTED; +} + +/*******************************************************************************************************************//** + * @brief Unsupported API. + * + * @retval FSP_ERR_UNSUPPORTED Operation mode is not supported. + **********************************************************************************************************************/ +static fsp_err_t rm_zmod4410_rel_iaq_ulp_device_error_check (rm_zmod4xxx_ctrl_t * const p_api_ctrl) +{ + FSP_PARAMETER_NOT_USED(p_api_ctrl); + + return FSP_ERR_UNSUPPORTED; +} + +#endif diff --git a/ra/fsp/src/rm_zmod4xxx/rel_iaq_ulp/zmod4410_config_rel_iaq_ulp.h b/ra/fsp/src/rm_zmod4xxx/rel_iaq_ulp/zmod4410_config_rel_iaq_ulp.h new file mode 100644 index 000000000..551202ff2 --- /dev/null +++ b/ra/fsp/src/rm_zmod4xxx/rel_iaq_ulp/zmod4410_config_rel_iaq_ulp.h @@ -0,0 +1,90 @@ +/** + * @file zmod4410_config_rel_iaq_ulp.h + * @brief This is the configuration for zmod4410 module - rel_iaq_ulp library + * @author Renesas Electronics Corporation + * @version 1.0.0 + */ + +#ifndef _ZMOD4410_CONFIG_REL_IAQ_ULP_H +#define _ZMOD4410_CONFIG_REL_IAQ_ULP_H + +#include <stdio.h> +#if TEST_RM_ZMOD4XXX // For RA FSP test + #include "../../../../../fsp/src/rm_zmod4xxx/zmod4xxx_types.h" +#else + #include "../zmod4xxx_types.h" +#endif + +#define INIT 0 +#define MEASUREMENT 1 + +#define ZMOD4410_PID 0x2310 +#define ZMOD4410_I2C_ADDR 0x32 + +// REMOVE Sequencer adresses +#define ZMOD4410_H_ADDR 0x40 +#define ZMOD4410_D_ADDR 0x50 +#define ZMOD4410_M_ADDR 0x60 +#define ZMOD4410_S_ADDR 0x68 + +#define ZMOD4410_PROD_DATA_LEN 7 +#define ZMOD4410_ADC_DATA_LEN 32 + +// Measurement interval +#define ZMOD4410_REL_IAQ_ULP_SEQ_RUN_TIME_WITH_MARGIN (1500U) +#define ZMOD4410_REL_IAQ_ULP_SAMPLE_TIME (90000U) + +// clang-format off +static uint8_t data_set_4410i[] = { +// REMOVE heater + 0x00, 0x50, +// REMOVE delay , measurement + 0x00, 0x28, 0xC3, 0xE3, +// REMOVE sequencer + 0x00, 0x00, 0x80, 0x40}; + +static uint8_t data_set_4410_rel_iaq_ulp[] = { +// REMOVE heater + 0x00, 0x50, 0xFF, 0x38, + 0xFE, 0xD4, 0xFE, 0x70, + 0xFE, 0x0C, 0xFD, 0xA8, + 0xFD, 0x44, 0xFC, 0xE0, +// REMOVE delay + 0x00, 0x52, 0x02, 0x67, + 0x00, 0xCD, 0x03, 0x34, +// REMOVE measurement + 0x23, 0x03, 0xA3, 0x43, +// REMOVE sequencer + 0x00, 0x00, 0x06, 0x49, + 0x06, 0x4A, 0x06, 0x4B, + 0x06, 0x4C, 0x06, 0x4D, + 0x06, 0x4E, 0x06, 0x97, + 0x06, 0xD7, 0x06, 0x57, + 0x06, 0x4E, 0x06, 0x4D, + 0x06, 0x4C, 0x06, 0x4B, + 0x06, 0x4A, 0x86, 0x59}; + +// clang-format on + +zmod4xxx_conf g_zmod4410_rel_iaq_ulp_sensor_type[] = { + [INIT] = { + .start = 0x80, + .h = { .addr = ZMOD4410_H_ADDR, .len = 2, .data_buf = &data_set_4410i[0]}, + .d = { .addr = ZMOD4410_D_ADDR, .len = 2, .data_buf = &data_set_4410i[2]}, + .m = { .addr = ZMOD4410_M_ADDR, .len = 2, .data_buf = &data_set_4410i[4]}, + .s = { .addr = ZMOD4410_S_ADDR, .len = 4, .data_buf = &data_set_4410i[6]}, + .r = { .addr = 0x97, .len = 4}, + }, + + [MEASUREMENT] = { + .start = 0x80, + .h = {.addr = ZMOD4410_H_ADDR, .len = 16, .data_buf = &data_set_4410_rel_iaq_ulp[0]}, + .d = {.addr = ZMOD4410_D_ADDR, .len = 8, .data_buf = &data_set_4410_rel_iaq_ulp[16]}, + .m = {.addr = ZMOD4410_M_ADDR, .len = 4, .data_buf = &data_set_4410_rel_iaq_ulp[24]}, + .s = {.addr = ZMOD4410_S_ADDR, .len = 32, .data_buf = &data_set_4410_rel_iaq_ulp[28]}, + .r = {.addr = 0x97, .len = 32}, + .prod_data_len = ZMOD4410_PROD_DATA_LEN, + }, +}; + +#endif //_ZMOD4410_CONFIG_REL_IAQ_ULP_H diff --git a/ra/fsp/src/rm_zmod4xxx/rm_zmod4xxx.c b/ra/fsp/src/rm_zmod4xxx/rm_zmod4xxx.c index d65207aa7..5a9edc1af 100644 --- a/ra/fsp/src/rm_zmod4xxx/rm_zmod4xxx.c +++ b/ra/fsp/src/rm_zmod4xxx/rm_zmod4xxx.c @@ -101,6 +101,8 @@ rm_zmod4xxx_api_t const g_zmod4xxx_on_zmod4xxx = .oaq1stGenDataCalculate = RM_ZMOD4XXX_Oaq1stGenDataCalculate, .oaq2ndGenDataCalculate = RM_ZMOD4XXX_Oaq2ndGenDataCalculate, .raqDataCalculate = RM_ZMOD4XXX_RaqDataCalculate, + .relIaqDataCalculate = RM_ZMOD4XXX_RelIaqDataCalculate, + .pbaqDataCalculate = RM_ZMOD4XXX_PbaqDataCalculate, .temperatureAndHumiditySet = RM_ZMOD4XXX_TemperatureAndHumiditySet, .deviceErrorCheck = RM_ZMOD4XXX_DeviceErrorCheck, }; @@ -616,6 +618,74 @@ fsp_err_t RM_ZMOD4XXX_RaqDataCalculate (rm_zmod4xxx_ctrl_t * const p_api_ctr return FSP_SUCCESS; } +/*******************************************************************************************************************//** + * @brief This function should be called when measurement finishes. To check measurement status either polling or + * busy/interrupt pin can be used. + * Implements @ref rm_zmod4xxx_api_t::relIaqDataCalculate + * + * @retval FSP_SUCCESS Successfully results are read. + * @retval FSP_ERR_ASSERTION Null pointer passed as a parameter. + * @retval FSP_ERR_NOT_OPEN Module is not opened configured. + **********************************************************************************************************************/ +fsp_err_t RM_ZMOD4XXX_RelIaqDataCalculate (rm_zmod4xxx_ctrl_t * const p_api_ctrl, + rm_zmod4xxx_raw_data_t * const p_raw_data, + rm_zmod4xxx_rel_iaq_data_t * const p_zmod4xxx_data) +{ + fsp_err_t err = FSP_SUCCESS; + rm_zmod4xxx_instance_ctrl_t * p_ctrl = (rm_zmod4xxx_instance_ctrl_t *) p_api_ctrl; + rm_zmod4xxx_lib_extended_cfg_t * p_lib; + +#if RM_ZMOD4XXX_CFG_PARAM_CHECKING_ENABLE + FSP_ASSERT(NULL != p_ctrl); + FSP_ASSERT(NULL != p_raw_data); + FSP_ASSERT(NULL != p_zmod4xxx_data); + FSP_ERROR_RETURN(RM_ZMOD4XXX_OPEN == p_ctrl->open, FSP_ERR_NOT_OPEN); +#endif + + /* Set ZMOD4XXX library specific */ + p_lib = p_ctrl->p_zmod4xxx_lib; + + /* Calculate Relative IAQ data */ + err = p_lib->p_api->relIaqDataCalculate(p_ctrl, p_raw_data, p_zmod4xxx_data); + FSP_ERROR_RETURN(FSP_SUCCESS == err, err); + + return FSP_SUCCESS; +} + +/*******************************************************************************************************************//** + * @brief This function should be called when measurement finishes. To check measurement status either polling or + * busy/interrupt pin can be used. + * Implements @ref rm_zmod4xxx_api_t::pbaqDataCalculate + * + * @retval FSP_SUCCESS Successfully results are read. + * @retval FSP_ERR_ASSERTION Null pointer passed as a parameter. + * @retval FSP_ERR_NOT_OPEN Module is not opened configured. + **********************************************************************************************************************/ +fsp_err_t RM_ZMOD4XXX_PbaqDataCalculate (rm_zmod4xxx_ctrl_t * const p_api_ctrl, + rm_zmod4xxx_raw_data_t * const p_raw_data, + rm_zmod4xxx_pbaq_data_t * const p_zmod4xxx_data) +{ + fsp_err_t err = FSP_SUCCESS; + rm_zmod4xxx_instance_ctrl_t * p_ctrl = (rm_zmod4xxx_instance_ctrl_t *) p_api_ctrl; + rm_zmod4xxx_lib_extended_cfg_t * p_lib; + +#if RM_ZMOD4XXX_CFG_PARAM_CHECKING_ENABLE + FSP_ASSERT(NULL != p_ctrl); + FSP_ASSERT(NULL != p_raw_data); + FSP_ASSERT(NULL != p_zmod4xxx_data); + FSP_ERROR_RETURN(RM_ZMOD4XXX_OPEN == p_ctrl->open, FSP_ERR_NOT_OPEN); +#endif + + /* Set ZMOD4XXX library specific */ + p_lib = p_ctrl->p_zmod4xxx_lib; + + /* Calculate PBAQ data */ + err = p_lib->p_api->pbaqDataCalculate(p_ctrl, p_raw_data, p_zmod4xxx_data); + FSP_ERROR_RETURN(FSP_SUCCESS == err, err); + + return FSP_SUCCESS; +} + /*******************************************************************************************************************//** * @brief This function is valid only for OAQ_2nd_Gen and IAQ_2nd_Gen_ULP. This function should be called before DataCalculate. * Humidity and temperature measurements are needed for ambient compensation. diff --git a/ra/fsp/src/rm_zmod4xxx/sulfur_odor/rm_zmod4410_sulfur_odor.c b/ra/fsp/src/rm_zmod4xxx/sulfur_odor/rm_zmod4410_sulfur_odor.c index bc125866a..11636f54f 100644 --- a/ra/fsp/src/rm_zmod4xxx/sulfur_odor/rm_zmod4410_sulfur_odor.c +++ b/ra/fsp/src/rm_zmod4xxx/sulfur_odor/rm_zmod4410_sulfur_odor.c @@ -82,6 +82,12 @@ static fsp_err_t rm_zmod4410_sulfur_odor_oaq_2nd_gen_data_calculate(rm_zmod4xxx_ static fsp_err_t rm_zmod4410_sulfur_odor_raq_data_calculate(rm_zmod4xxx_ctrl_t * const p_api_ctrl, rm_zmod4xxx_raw_data_t * const p_raw_data, rm_zmod4xxx_raq_data_t * const p_zmod4xxx_data); +static fsp_err_t rm_zmod4410_sulfur_odor_rel_iaq_data_calculate(rm_zmod4xxx_ctrl_t * const p_api_ctrl, + rm_zmod4xxx_raw_data_t * const p_raw_data, + rm_zmod4xxx_rel_iaq_data_t * const p_zmod4xxx_data); +static fsp_err_t rm_zmod4410_sulfur_odor_pbaq_data_calculate(rm_zmod4xxx_ctrl_t * const p_api_ctrl, + rm_zmod4xxx_raw_data_t * const p_raw_data, + rm_zmod4xxx_pbaq_data_t * const p_zmod4xxx_data); static fsp_err_t rm_zmod4410_sulfur_odor_close(rm_zmod4xxx_ctrl_t * const p_api_ctrl); static fsp_err_t rm_zmod4410_sulfur_odor_device_error_check(rm_zmod4xxx_ctrl_t * const p_api_ctrl); @@ -103,6 +109,8 @@ rm_zmod4xxx_api_t const g_zmod4xxx_on_zmod4410_sulfur_odor = .oaq1stGenDataCalculate = rm_zmod4410_sulfur_odor_oaq_1st_gen_data_calculate, .oaq2ndGenDataCalculate = rm_zmod4410_sulfur_odor_oaq_2nd_gen_data_calculate, .raqDataCalculate = rm_zmod4410_sulfur_odor_raq_data_calculate, + .relIaqDataCalculate = rm_zmod4410_sulfur_odor_rel_iaq_data_calculate, + .pbaqDataCalculate = rm_zmod4410_sulfur_odor_pbaq_data_calculate, .temperatureAndHumiditySet = rm_zmod4410_sulfur_odor_temperature_and_humidity_set, .deviceErrorCheck = rm_zmod4410_sulfur_odor_device_error_check, }; @@ -354,6 +362,38 @@ static fsp_err_t rm_zmod4410_sulfur_odor_raq_data_calculate (rm_zmod4xxx_ctrl_t return FSP_ERR_UNSUPPORTED; } +/*******************************************************************************************************************//** + * @brief Unsupported API. + * + * @retval FSP_ERR_UNSUPPORTED Operation mode is not supported. + **********************************************************************************************************************/ +static fsp_err_t rm_zmod4410_sulfur_odor_rel_iaq_data_calculate (rm_zmod4xxx_ctrl_t * const p_api_ctrl, + rm_zmod4xxx_raw_data_t * const p_raw_data, + rm_zmod4xxx_rel_iaq_data_t * const p_zmod4xxx_data) +{ + FSP_PARAMETER_NOT_USED(p_api_ctrl); + FSP_PARAMETER_NOT_USED(p_raw_data); + FSP_PARAMETER_NOT_USED(p_zmod4xxx_data); + + return FSP_ERR_UNSUPPORTED; +} + +/*******************************************************************************************************************//** + * @brief Unsupported API. + * + * @retval FSP_ERR_UNSUPPORTED Operation mode is not supported. + **********************************************************************************************************************/ +static fsp_err_t rm_zmod4410_sulfur_odor_pbaq_data_calculate (rm_zmod4xxx_ctrl_t * const p_api_ctrl, + rm_zmod4xxx_raw_data_t * const p_raw_data, + rm_zmod4xxx_pbaq_data_t * const p_zmod4xxx_data) +{ + FSP_PARAMETER_NOT_USED(p_api_ctrl); + FSP_PARAMETER_NOT_USED(p_raw_data); + FSP_PARAMETER_NOT_USED(p_zmod4xxx_data); + + return FSP_ERR_UNSUPPORTED; +} + /*******************************************************************************************************************//** * @brief Unsupported API. *