You signed in with another tab or window. Reload to refresh your session.You signed out in another tab or window. Reload to refresh your session.You switched accounts on another tab or window. Reload to refresh your session.Dismiss alert
I've been working on documenting my 5A-75E V8.0
I can compile and run pin-scan [1] on the board, after specifying my FPGA has a CABGA256 package. Then all the pins on the LED connectors are driven, and I can check those with a serial to USB converter.
Next I made a .lpf file, and a verilog program to let each outputs blink in an unique pattern [2]. After setting output enable (FPGA pin M4) to 0, I can drive about half of the outputs on the LED connectors. I have not been able to drive these pins:
J1 pin 3
J1 pin 8
J1 pin 12
J1 pin 14
J1 pin 15
J2 pin 3
J2 pin 8
J2 pin 12
J2 pin 14
J2 pin 15
(and a lot more, see top.v [3] for the full list)
I've been working on documenting my 5A-75E V8.0
I can compile and run pin-scan [1] on the board, after specifying my FPGA has a CABGA256 package. Then all the pins on the LED connectors are driven, and I can check those with a serial to USB converter.
Next I made a .lpf file, and a verilog program to let each outputs blink in an unique pattern [2]. After setting output enable (FPGA pin M4) to 0, I can drive about half of the outputs on the LED connectors. I have not been able to drive these pins:
J1 pin 3
J1 pin 8
J1 pin 12
J1 pin 14
J1 pin 15
J2 pin 3
J2 pin 8
J2 pin 12
J2 pin 14
J2 pin 15
(and a lot more, see top.v [3] for the full list)
What am I missing in my multiblink program?
[1] https://github.com/cdwijs/chubby75/tree/colorlight-75E-V80/5a-75e/pin-scan
[2] https://github.com/cdwijs/chubby75/tree/colorlight-75E-V80/5a-75e/multiblink
[3]https://github.com/cdwijs/chubby75/blob/colorlight-75E-V80/5a-75e/multiblink/top.v#L14
The text was updated successfully, but these errors were encountered: