From 0abe74fd9dfb5b0622af1ddd1a1d4e5afc935b49 Mon Sep 17 00:00:00 2001 From: chenyanxzhu Date: Thu, 7 Dec 2023 14:55:14 +0800 Subject: [PATCH] Ignore set domain for dgpu Cause kernel doesn't support this op for dgpu. Tracked-On: OAM-114098 Signed-off-by: chenyanxzhu --- i915.c | 35 ++++++++++++++++++----------------- 1 file changed, 18 insertions(+), 17 deletions(-) diff --git a/i915.c b/i915.c index 9c68d5c0..72e74feb 100644 --- a/i915.c +++ b/i915.c @@ -476,7 +476,6 @@ static bool i915_bo_query_prelim_meminfo(struct driver *drv, struct i915_device return false; } if (item.length <= 0) { - drv_log("drv: Invalid memory region length\n"); return false; } struct prelim_drm_i915_query_memory_regions *meminfo = calloc(1, item.length); @@ -567,7 +566,6 @@ static int i915_init(struct driver *drv) i915->has_fence_reg = gem_param(drv->fd, I915_PARAM_NUM_FENCES_AVAIL) > 0; if (!i915_bo_query_prelim_meminfo(drv, i915)) { - drv_info("drv: Kernel does not support prelim\n"); i915_bo_query_meminfo(drv, i915); } else { drv_info("drv: kernel supports prelim\n"); @@ -1042,23 +1040,26 @@ static int i915_bo_invalidate(struct bo *bo, struct mapping *mapping) { int ret; struct drm_i915_gem_set_domain set_domain; + struct i915_device *i915_dev = (struct i915_device *)bo->drv->priv; - memset(&set_domain, 0, sizeof(set_domain)); - set_domain.handle = bo->handles[0].u32; - if (bo->meta.tiling == I915_TILING_NONE) { - set_domain.read_domains = I915_GEM_DOMAIN_CPU; - if (mapping->vma->map_flags & BO_MAP_WRITE) - set_domain.write_domain = I915_GEM_DOMAIN_CPU; - } else { - set_domain.read_domains = I915_GEM_DOMAIN_GTT; - if (mapping->vma->map_flags & BO_MAP_WRITE) - set_domain.write_domain = I915_GEM_DOMAIN_GTT; - } + if (i915_dev->genx10 != 125) { + memset(&set_domain, 0, sizeof(set_domain)); + set_domain.handle = bo->handles[0].u32; + if (bo->meta.tiling == I915_TILING_NONE) { + set_domain.read_domains = I915_GEM_DOMAIN_CPU; + if (mapping->vma->map_flags & BO_MAP_WRITE) + set_domain.write_domain = I915_GEM_DOMAIN_CPU; + } else { + set_domain.read_domains = I915_GEM_DOMAIN_GTT; + if (mapping->vma->map_flags & BO_MAP_WRITE) + set_domain.write_domain = I915_GEM_DOMAIN_GTT; + } - ret = drmIoctl(bo->drv->fd, DRM_IOCTL_I915_GEM_SET_DOMAIN, &set_domain); - if (ret) { - drv_log("DRM_IOCTL_I915_GEM_SET_DOMAIN with %d\n", ret); - return ret; + ret = drmIoctl(bo->drv->fd, DRM_IOCTL_I915_GEM_SET_DOMAIN, &set_domain); + if (ret) { + drv_log("DRM_IOCTL_I915_GEM_SET_DOMAIN with %d\n", ret); + return ret; + } } return 0;