Significant technical and schedule risk due to Block 4.1 adding new capabilities to the already-stretched TR2 avionics hardware, along with Block 4.2 attempting to simultaneously migrate to a new open-architecture TR3 processor while adding many significant new capabilities. ▪ For Block 4.1, the program plans to add multiple new capabilities to the TR2 avionics hardware, even though this architecture already has memory and processing limitations running the full Block 3F capabilities, resulting in avionics stability issues and capability limitations. ▪ For Block 4.2, the program plans to simultaneously add multiple significant new software capabilities while migrating to a new avionics hardware configuration, including a new open-architecture TR3 processor and new electronic warfare (EW) hardware. This will be far more challenging than the program’s problematic re-hosting of Block 2B software, designed to run on TR1 processors, on to TR2 processors to create Block 3i. Although no new capabilities were added in Block 3i, significant avionics stability issues were manifested due to technical debt and differences with the new architecture. ▪ The program claims the new F-35 Block 4.2 software, which will be designed to run on new TR3 processors, will also be backward-compatible to run in the hundreds of early production aircraft with TR2 processors, but has not yet presented a plan to demonstrate this. Based on the current TR2 architecture capacity limitations with Block 3F, this claim is unlikely to be realized. ▪ Instead of adding lab capacity to support testing of processor loads with the additional mission systems capabilities, the program plans to reduce the lab infrastructure supporting development. The program has already retired the Cooperative Avionics Test Bed aircraft – a decision that has increased the burden on flight testing with F-35 aircraft. ▪ Current JPO projections for modifying aircraft with TR2 processors to the TR3 processor configuration extend into the 2030s. As a result, up to three configurations of test aircraft and labs may be needed if the program requires more advanced processors than the TR3 planned for Block 4 (i.e., the next Block upgrade requiring even more processing capacity driving the need for new processors). ▪ The program also does not yet have an executable plan to provide a mission data reprogramming lab in the TR3 configuration in time to support Block 4.2 OT and fielding.