From cd747212ff05ae618de18a9518a1e9b9b64478ea Mon Sep 17 00:00:00 2001 From: Balazs Racz Date: Mon, 13 May 2024 23:31:01 +0200 Subject: [PATCH 1/6] Ports the library to the stm32duino arduino core. --- LocoNet.cpp | 16 ++++---- LocoNet.h | 4 +- utility/ln_config.h | 22 ++++++++++- utility/ln_sw_uart.cpp | 85 ++++++++++++++++++++++++++++++++++++++---- utility/ln_sw_uart.h | 40 +++++++++++++++++++- 5 files changed, 147 insertions(+), 20 deletions(-) diff --git a/LocoNet.cpp b/LocoNet.cpp index 13c6989..b5bae1b 100644 --- a/LocoNet.cpp +++ b/LocoNet.cpp @@ -83,10 +83,10 @@ uint8_t eeprom_read_byte(const uint8_t* offset) { void eeprom_write_byte(const uint8_t* offset, uint8_t value) { EEPROM.write((int)offset, value); } -#elif defined(STM32F1) -# include -# include -# include +#elif defined(STM32F1) || defined(ARDUINO_ARCH_STM32) +//# include +//# include +//# include # include #else # include @@ -154,7 +154,7 @@ void LocoNetClass::setTxPin(uint8_t txPin) LnPortRegisterType bitMaskTest = 0x01; LnPortRegisterType bitNum = 0; - LnPortRegisterType port = digitalPinToPort(txPin); + auto port = digitalPinToPort(txPin); LnPortAddrType out = portOutputRegister(port); while (bitMask != bitMaskTest) @@ -618,7 +618,7 @@ void LocoNetThrottleClass::updateState(TH_STATE State, uint8_t ForceNotify) void LocoNetThrottleClass::updateStatus1(uint8_t Status, uint8_t ForceNotify) { - register uint8_t Mask; // Temporary uint8_t Variable for bitwise AND to force + uint8_t Mask; // Temporary uint8_t Variable for bitwise AND to force // the compiler to only do 8 bit operations not 16 if (ForceNotify || myStatus1 != Status) @@ -1428,7 +1428,7 @@ void LocoNetFastClockClass::process66msActions(void) } } -#if defined(STM32F1) +#if defined(STM32F1) || defined(ARDUINO_ARCH_STM32) // STM31F1 has no EEPROM. #else @@ -1760,7 +1760,7 @@ SV_STATUS LocoNetSystemVariableClass::doDeferredProcessing(void) return SV_OK; } -#endif // STM32F1 +#endif // STM32F1 || ARDUINO_ARCH_STM32 /***************************************************************************** diff --git a/LocoNet.h b/LocoNet.h index e0c2fb6..8ea28d0 100644 --- a/LocoNet.h +++ b/LocoNet.h @@ -335,7 +335,7 @@ class LocoNetFastClockClass /************************************************************************************ SV (System Variable Handling ************************************************************************************/ -#if defined(STM32F1) +#if defined(STM32F1) || defined(ARDUINO_ARCH_STM32) // STM31F1 has no flash. #else @@ -490,7 +490,7 @@ class LocoNetSystemVariableClass SV_STATUS doDeferredProcessing(void); }; -#endif // STM32F1 +#endif // STM32F1 || ARDUINO_ARCH_STM32 class LocoNetCVClass { diff --git a/utility/ln_config.h b/utility/ln_config.h index 58222be..b01d364 100644 --- a/utility/ln_config.h +++ b/utility/ln_config.h @@ -55,7 +55,7 @@ // figure out what board we are building // Common defines -#if !defined(STM32F1) && !defined(ESP8266) +#if !defined(STM32F1) && !defined(ARDUINO_ARCH_STM32) && !defined(ESP8266) # ifdef PINL // For the Mega 2560 (should work with 1280, etc) # define _LNET_USE_MEGA # else // For the UNO: @@ -72,7 +72,7 @@ # endif #endif -#if defined(STM32F1) +#if defined(STM32F1) || defined(ARDUINO_ARCH_STM32) typedef uint32_t LnPortRegisterType; typedef uint32_t LnCompareTargetType; #else @@ -97,6 +97,8 @@ typedef volatile LnPortRegisterType* LnPortAddrType; #else # if defined(STM32F1) # define LN_BIT_PERIOD (rcc_apb1_frequency * 2 / 16666) +# elif defined(ARDUINO_ARCH_STM32) +# define LN_BIT_PERIOD (36000000 * 2 / 16666) # else # define LN_BIT_PERIOD (F_CPU / 16666) # endif @@ -209,6 +211,22 @@ defined(__AVR_ATmega1284P__) #define LN_TMR_CONTROL_REG TCCR1B // the code. #define LN_INIT_COMPARATOR() { TCCR1A = 0; TCCR1B = 0x01; } // no prescaler, normal mode +#elif defined(ARDUINO_ARCH_STM32) + +#define LN_RX_PIN_NAME PB14 +#define LN_RX_PORT (*portInputRegister(GPIOB)) +#define LN_RX_BIT (14) +#define LN_RX_BITCFG LL_SYSCFG_EXTI_LINE14 +#define LN_RX_GPIOSEL EXTI_GPIOB +#define LN_RX_GPIOCFG LL_SYSCFG_EXTI_PORTB + + +#define LN_SB_SIGNAL EXTI15_10_IRQHandler +#define LN_SB_IRQn EXTI15_10_IRQn +#define LN_TMR_SIGNAL TIM2_IRQHandler + +#define ISR(name) void name(void) + #elif defined(STM32F1) #define LN_RX_PIN_NAME PB14 diff --git a/utility/ln_sw_uart.cpp b/utility/ln_sw_uart.cpp index 920830f..6ac3450 100755 --- a/utility/ln_sw_uart.cpp +++ b/utility/ln_sw_uart.cpp @@ -45,12 +45,18 @@ extern "C" { # include "gpio.h" } -#elif defined(STM32F1) +#elif defined(STM32F1) // no ARCH here # include # include # include # include # include +#elif defined(ARDUINO_ARCH_STM32) +#include +#include +#include +#include +/// @todo #else # include # include @@ -84,7 +90,7 @@ volatile uint8_t lnTxSuccess; // this boolean flag as a message from timer in volatile uint8_t lnLastTxBit; #endif -#ifndef ESP8266 +#if !defined(ESP8266) && !defined(ARDUINO_ARCH_STM32) volatile uint8_t* txPort; #else LnPortAddrType txPort; @@ -131,7 +137,7 @@ bool ICACHE_RAM_ATTR isLocoNetCollision() } #endif -#if defined(STM32F1) +#if defined(STM32F1) || defined(ARDUINO_ARCH_STM32) # define bit_is_set(PORT, PIN) (((PORT >> PIN) & 0x01) != 0) # define bit_is_clear(PORT, PIN) (((PORT >> PIN) & 0x01) == 0) #endif @@ -160,6 +166,12 @@ ISR(LN_SB_SIGNAL) // Ignore any interrupt that is not EXTI14. return; } +#elif defined(ARDUINO_ARCH_STM32) + // Check if it really was EXTI14 that triggered this interrupt. + if (!LL_EXTI_IsActiveFlag_0_31(1u< -#elif !defined(STM32F1) +#elif !defined(STM32F1) && !defined(ARDUINO_ARCH_STM32) # include # include #endif @@ -100,6 +100,25 @@ # define LN_ENABLE_TIMER_INTERRUPT() (timer_enable_irq(TIM2, TIM_DIER_CC1IE)) // Disable Timer Compare Interrupt # define LN_DISABLE_TIMER_INTERRUPT() (timer_disable_irq(TIM2, TIM_DIER_CC1IE)) + +#elif defined(ARDUINO_ARCH_STM32) + +# define LN_EXTI_FLAG (1u << LN_RX_BIT) +//Clear StartBit Interrupt flag +# define LN_CLEAR_START_BIT_FLAG() (LL_EXTI_ClearFlag_0_31(LN_EXTI_FLAG)) +//Enable StartBit Interrupt +# define LN_ENABLE_START_BIT_INTERRUPT() (LL_EXTI_EnableIT_0_31(LN_EXTI_FLAG)) +//Disable StartBit Interrupt +# define LN_DISABLE_START_BIT_INTERRUPT() (LL_EXTI_DisableIT_0_31(LN_EXTI_FLAG)) + +// Clear Timer Interrupt Flag +# define LN_CLEAR_TIMER_FLAG() (LL_TIM_ClearFlag_CC1(TIM2)) + +// Enable Timer Compare Interrupt +# define LN_ENABLE_TIMER_INTERRUPT() (LL_TIM_EnableIT_CC1(TIM2)) +// Disable Timer Compare Interrupt +# define LN_DISABLE_TIMER_INTERRUPT() (LL_TIM_DisableIT_CC1(TIM2)) + #elif !defined(ESP8266) //Clear StartBit Interrupt flag # define LN_CLEAR_START_BIT_FLAG() (sbi( LN_SB_INT_STATUS_REG, LN_SB_INT_STATUS_BIT )) @@ -117,6 +136,25 @@ # define LN_DISABLE_TIMER_INTERRUPT() (cbi( LN_TMR_INT_ENABLE_REG, LN_TMR_INT_ENABLE_BIT )) #endif +#if defined(ARDUINO_ARCH_STM32) +#elif !defined(ESP8266) +//Clear StartBit Interrupt flag +# define LN_CLEAR_START_BIT_FLAG() (sbi( LN_SB_INT_STATUS_REG, LN_SB_INT_STATUS_BIT )) +//Enable StartBit Interrupt +# define LN_ENABLE_START_BIT_INTERRUPT() (sbi( LN_SB_INT_ENABLE_REG, LN_SB_INT_ENABLE_BIT )) +//Disable StartBit Interrupt +# define LN_DISABLE_START_BIT_INTERRUPT() (cbi( LN_SB_INT_ENABLE_REG, LN_SB_INT_ENABLE_BIT )) + +// Clear Timer Interrupt Flag +# define LN_CLEAR_TIMER_FLAG() (sbi(LN_TMR_INT_STATUS_REG, LN_TMR_INT_STATUS_BIT)) + +// Enable Timer Compare Interrupt +# define LN_ENABLE_TIMER_INTERRUPT() (sbi(LN_TMR_INT_ENABLE_REG, LN_TMR_INT_ENABLE_BIT)) +// Disable Timer Compare Interrupt +# define LN_DISABLE_TIMER_INTERRUPT() (cbi( LN_TMR_INT_ENABLE_REG, LN_TMR_INT_ENABLE_BIT )) +#endif + + // For now we will simply check that TX and RX ARE NOT THE SAME as our circuit // requires the TX signal to be INVERTED. If they are THE SAME then we have a // Collision. From cc63bd663bebe490298be5f4a2b65689a6c69c07 Mon Sep 17 00:00:00 2001 From: Balazs Racz Date: Tue, 14 May 2024 00:55:16 +0200 Subject: [PATCH 2/6] Fixes timer overflow computations. Makes interrupt priority higher. --- utility/ln_config.h | 8 ++++++-- utility/ln_sw_uart.cpp | 13 +++++++++---- 2 files changed, 15 insertions(+), 6 deletions(-) diff --git a/utility/ln_config.h b/utility/ln_config.h index b01d364..5e09a0d 100644 --- a/utility/ln_config.h +++ b/utility/ln_config.h @@ -98,7 +98,8 @@ typedef volatile LnPortRegisterType* LnPortAddrType; # if defined(STM32F1) # define LN_BIT_PERIOD (rcc_apb1_frequency * 2 / 16666) # elif defined(ARDUINO_ARCH_STM32) -# define LN_BIT_PERIOD (36000000 * 2 / 16666) +# define LN_BIT_PERIOD (36000000 / 16666) +//# define LN_BIT_PERIOD (72000000 * 2 / 16666) # else # define LN_BIT_PERIOD (F_CPU / 16666) # endif @@ -221,11 +222,14 @@ defined(__AVR_ATmega1284P__) #define LN_RX_GPIOCFG LL_SYSCFG_EXTI_PORTB +#undef TIM2_IRQHandler +#undef EXTI15_10_IRQHandler + #define LN_SB_SIGNAL EXTI15_10_IRQHandler #define LN_SB_IRQn EXTI15_10_IRQn #define LN_TMR_SIGNAL TIM2_IRQHandler -#define ISR(name) void name(void) +#define ISR(name) extern "C" void name(void) #elif defined(STM32F1) diff --git a/utility/ln_sw_uart.cpp b/utility/ln_sw_uart.cpp index 6ac3450..993ba2b 100755 --- a/utility/ln_sw_uart.cpp +++ b/utility/ln_sw_uart.cpp @@ -193,7 +193,7 @@ ISR(LN_SB_SIGNAL) # elif defined(ARDUINO_ARCH_STM32) lnCompareTarget = LL_TIM_GetCounter(TIM2) + LN_TIMER_RX_START_PERIOD; /* Set the initual output compare value for OC1. */ - LL_TIM_OC_SetCompareCH1(TIM2, lnCompareTarget); + LL_TIM_OC_SetCompareCH1(TIM2, lnCompareTarget & 0xffff); # else // Get the Current Timer1 Count and Add the offset for the Compare target lnCompareTarget = LN_TMR_INP_CAPT_REG + LN_TIMER_RX_START_PERIOD; LN_TMR_OUTP_CAPT_REG = lnCompareTarget; @@ -247,7 +247,8 @@ ISR(LN_TMR_SIGNAL) /* signal handler for timer0 overflow */ # if defined(STM32F1) timer_set_oc_value(TIM2, TIM_OC1, lnCompareTarget); # elif defined(ARDUINO_ARCH_STM32) - LL_TIM_OC_SetCompareCH1(TIM2, lnCompareTarget); + lnCompareTarget &= 0xffff; + LL_TIM_OC_SetCompareCH1(TIM2, lnCompareTarget & 0xffff); # else LN_TMR_OUTP_CAPT_REG = lnCompareTarget; # endif @@ -365,7 +366,7 @@ ISR(LN_TMR_SIGNAL) /* signal handler for timer0 overflow */ timer_set_oc_value(TIM2, TIM_OC1, lnCompareTarget); # elif defined(ARDUINO_ARCH_STM32) lnCompareTarget = LL_TIM_GetCounter(TIM2) + LN_TIMER_TX_RELOAD_PERIOD - LN_TIMER_TX_RELOAD_ADJUST; - LL_TIM_OC_SetCompareCH1(TIM2, lnCompareTarget); + LL_TIM_OC_SetCompareCH1(TIM2, lnCompareTarget & 0xffff); # else lnCompareTarget = LN_TMR_COUNT_REG + LN_TIMER_TX_RELOAD_PERIOD - LN_TIMER_TX_RELOAD_ADJUST; LN_TMR_OUTP_CAPT_REG = lnCompareTarget; @@ -526,6 +527,7 @@ void initLocoNetHardware(LnBuf * RxBuffer) //__HAL_RCC_EXTI_CLK_ENABLE(); // Enable TIM2 interrupt. + NVIC_SetPriority(TIM2_IRQn, 0); NVIC_EnableIRQ(TIM2_IRQn); // Reset TIM2 peripheral to defaults. @@ -544,6 +546,8 @@ void initLocoNetHardware(LnBuf * RxBuffer) TimHandle.Init.RepetitionCounter = 0; HAL_TIM_Base_Init(&TimHandle); HAL_TIM_Base_Start(&TimHandle); + // Disables all interrupts on the timer. + TIM2->DIER = 0; // Setup level change interrupt @@ -558,6 +562,7 @@ void initLocoNetHardware(LnBuf * RxBuffer) LN_CLEAR_START_BIT_FLAG(); LN_ENABLE_START_BIT_INTERRUPT(); + NVIC_SetPriority(LN_SB_IRQn, 0); NVIC_EnableIRQ(LN_SB_IRQn); #else @@ -710,7 +715,7 @@ LN_STATUS sendLocoNetPacketTry(lnMsg * TxData, unsigned char ucPrioDelay) # elif defined(ARDUINO_ARCH_STM32) lnCompareTarget = LL_TIM_GetCounter(TIM2) + LN_TIMER_TX_RELOAD_PERIOD - LN_TIMER_TX_RELOAD_ADJUST; /* Set the initual output compare value for OC1. */ - LL_TIM_OC_SetCompareCH1(TIM2, lnCompareTarget); + LL_TIM_OC_SetCompareCH1(TIM2, lnCompareTarget & 0xffff); # else lnCompareTarget = LN_TMR_COUNT_REG + LN_TIMER_TX_RELOAD_PERIOD - LN_TIMER_TX_RELOAD_ADJUST; LN_TMR_OUTP_CAPT_REG = lnCompareTarget; From a9ec2ff685ddf2b7c4a7ebbfa4e27535c73dabae Mon Sep 17 00:00:00 2001 From: Balazs Racz Date: Thu, 16 May 2024 18:44:43 +0200 Subject: [PATCH 3/6] Fix bug in loconet send routine. --- utility/ln_sw_uart.cpp | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/utility/ln_sw_uart.cpp b/utility/ln_sw_uart.cpp index 993ba2b..71031cd 100755 --- a/utility/ln_sw_uart.cpp +++ b/utility/ln_sw_uart.cpp @@ -682,7 +682,7 @@ LN_STATUS sendLocoNetPacketTry(lnMsg * TxData, unsigned char ucPrioDelay) # if defined(STM32F1) if (exti_get_flag_status(EXTI14)) { # elif defined(ARDUINO_ARCH_STM32) - if (!LL_EXTI_IsActiveFlag_0_31(1u< Date: Wed, 22 May 2024 15:23:44 +0200 Subject: [PATCH 4/6] Clean up comments. --- LocoNet.cpp | 10 ++++++---- utility/ln_config.h | 10 ++++------ utility/ln_sw_uart.cpp | 8 +++----- 3 files changed, 13 insertions(+), 15 deletions(-) diff --git a/LocoNet.cpp b/LocoNet.cpp index b5bae1b..d1f732b 100644 --- a/LocoNet.cpp +++ b/LocoNet.cpp @@ -83,10 +83,12 @@ uint8_t eeprom_read_byte(const uint8_t* offset) { void eeprom_write_byte(const uint8_t* offset, uint8_t value) { EEPROM.write((int)offset, value); } -#elif defined(STM32F1) || defined(ARDUINO_ARCH_STM32) -//# include -//# include -//# include +#elif defined(STM32F1) +# include +# include +# include +# include +#elif defined(ARDUINO_ARCH_STM32) # include #else # include diff --git a/utility/ln_config.h b/utility/ln_config.h index 5e09a0d..68ebcb1 100644 --- a/utility/ln_config.h +++ b/utility/ln_config.h @@ -98,8 +98,8 @@ typedef volatile LnPortRegisterType* LnPortAddrType; # if defined(STM32F1) # define LN_BIT_PERIOD (rcc_apb1_frequency * 2 / 16666) # elif defined(ARDUINO_ARCH_STM32) + // TMR2 runs at half the CPU clock on the STM32F3. # define LN_BIT_PERIOD (36000000 / 16666) -//# define LN_BIT_PERIOD (72000000 * 2 / 16666) # else # define LN_BIT_PERIOD (F_CPU / 16666) # endif @@ -213,6 +213,9 @@ defined(__AVR_ATmega1284P__) #define LN_INIT_COMPARATOR() { TCCR1A = 0; TCCR1B = 0x01; } // no prescaler, normal mode #elif defined(ARDUINO_ARCH_STM32) +// This architecture is used for the stm32 core in Arduino (aka stm32duino, +// also present in the boards manager under 'stm32'. The default settings +// are for an STM32F303RE (nucleo). #define LN_RX_PIN_NAME PB14 #define LN_RX_PORT (*portInputRegister(GPIOB)) @@ -220,11 +223,6 @@ defined(__AVR_ATmega1284P__) #define LN_RX_BITCFG LL_SYSCFG_EXTI_LINE14 #define LN_RX_GPIOSEL EXTI_GPIOB #define LN_RX_GPIOCFG LL_SYSCFG_EXTI_PORTB - - -#undef TIM2_IRQHandler -#undef EXTI15_10_IRQHandler - #define LN_SB_SIGNAL EXTI15_10_IRQHandler #define LN_SB_IRQn EXTI15_10_IRQn #define LN_TMR_SIGNAL TIM2_IRQHandler diff --git a/utility/ln_sw_uart.cpp b/utility/ln_sw_uart.cpp index 71031cd..b205a87 100755 --- a/utility/ln_sw_uart.cpp +++ b/utility/ln_sw_uart.cpp @@ -45,7 +45,7 @@ extern "C" { # include "gpio.h" } -#elif defined(STM32F1) // no ARCH here +#elif defined(STM32F1) # include # include # include @@ -524,7 +524,6 @@ void initLocoNetHardware(LnBuf * RxBuffer) // Enable TIM2 clock. __HAL_RCC_TIM2_CLK_ENABLE(); - //__HAL_RCC_EXTI_CLK_ENABLE(); // Enable TIM2 interrupt. NVIC_SetPriority(TIM2_IRQn, 0); @@ -535,7 +534,7 @@ void initLocoNetHardware(LnBuf * RxBuffer) asm("nop ; nop ; nop; "); __HAL_RCC_TIM2_RELEASE_RESET(); - /* Initializes the blinker timer. */ + // Initializes TIM2 timer to count at max speed. TIM_HandleTypeDef TimHandle; memset(&TimHandle, 0, sizeof(TimHandle)); TimHandle.Instance = TIM2; @@ -549,8 +548,7 @@ void initLocoNetHardware(LnBuf * RxBuffer) // Disables all interrupts on the timer. TIM2->DIER = 0; - // Setup level change interrupt - + // Sets up level change interrupt on RX pin. LL_SYSCFG_SetEXTISource(LN_RX_GPIOCFG, LN_RX_BITCFG); # ifdef LN_SW_UART_RX_INVERTED LL_EXTI_EnableRisingTrig_0_31(LN_EXTI_FLAG); From ef2f2fa679237b5a8fae3ef564bbd093b0fe4c1c Mon Sep 17 00:00:00 2001 From: Balazs Racz Date: Wed, 22 May 2024 15:27:03 +0200 Subject: [PATCH 5/6] Update readme with new port. --- README.md | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/README.md b/README.md index 847437f..79b9171 100644 --- a/README.md +++ b/README.md @@ -32,7 +32,7 @@ It's known to work with: - MEGA (ATmega2560) - Leonardo, LeoStick, Arduino Pro Micro (ATmega32U4) - Various AVRTiny Boards (ATTiny84, ATTiny84A, ATTiny841) -- Blue Pill (STM32F1 w/ libopencm3 and Arduino Stubs) +- Blue Pill (STM32F1 w/ libopencm3 and Arduino Stubs, or STM32F3 with stm32duino core) - NodeMCU v1.0 (ESP8266 core for Arduino) As of 2020-03-28 - Hans Tanner added the capability to change the polarity From c2dd0aefcb446652980a94dde19d2ad659fb9dda Mon Sep 17 00:00:00 2001 From: Balazs Racz Date: Wed, 22 May 2024 15:31:38 +0200 Subject: [PATCH 6/6] Delete unneeded defines. --- utility/ln_sw_uart.h | 22 +++------------------- 1 file changed, 3 insertions(+), 19 deletions(-) diff --git a/utility/ln_sw_uart.h b/utility/ln_sw_uart.h index 4afeec2..9c35bd7 100755 --- a/utility/ln_sw_uart.h +++ b/utility/ln_sw_uart.h @@ -119,25 +119,9 @@ // Disable Timer Compare Interrupt # define LN_DISABLE_TIMER_INTERRUPT() (LL_TIM_DisableIT_CC1(TIM2)) -#elif !defined(ESP8266) -//Clear StartBit Interrupt flag -# define LN_CLEAR_START_BIT_FLAG() (sbi( LN_SB_INT_STATUS_REG, LN_SB_INT_STATUS_BIT )) -//Enable StartBit Interrupt -# define LN_ENABLE_START_BIT_INTERRUPT() (sbi( LN_SB_INT_ENABLE_REG, LN_SB_INT_ENABLE_BIT )) -//Disable StartBit Interrupt -# define LN_DISABLE_START_BIT_INTERRUPT() (cbi( LN_SB_INT_ENABLE_REG, LN_SB_INT_ENABLE_BIT )) - -// Clear Timer Interrupt Flag -# define LN_CLEAR_TIMER_FLAG() (sbi(LN_TMR_INT_STATUS_REG, LN_TMR_INT_STATUS_BIT)) - -// Enable Timer Compare Interrupt -# define LN_ENABLE_TIMER_INTERRUPT() (sbi(LN_TMR_INT_ENABLE_REG, LN_TMR_INT_ENABLE_BIT)) -// Disable Timer Compare Interrupt -# define LN_DISABLE_TIMER_INTERRUPT() (cbi( LN_TMR_INT_ENABLE_REG, LN_TMR_INT_ENABLE_BIT )) -#endif - -#if defined(ARDUINO_ARCH_STM32) -#elif !defined(ESP8266) +#elif defined(ESP8266) +// No common definitions needed for the ESP. +#else // AVR //Clear StartBit Interrupt flag # define LN_CLEAR_START_BIT_FLAG() (sbi( LN_SB_INT_STATUS_REG, LN_SB_INT_STATUS_BIT )) //Enable StartBit Interrupt