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disasembly.txt
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disasembly.txt
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main.elf: file format elf32-littlearm
Disassembly of section .text:
00000000 <__isr_vector>:
0: 00 80 00 20 ad 02 00 00 ed 02 00 00 ed 02 00 00 ... ............
10: ed 02 00 00 ed 02 00 00 ed 02 00 00 00 00 00 00 ................
...
2c: ed 02 00 00 ed 02 00 00 00 00 00 00 ed 02 00 00 ................
3c: ed 02 00 00 ed 02 00 00 ed 02 00 00 ed 02 00 00 ................
4c: ed 02 00 00 ed 02 00 00 ed 02 00 00 ed 02 00 00 ................
5c: ed 02 00 00 ed 02 00 00 ed 02 00 00 ed 02 00 00 ................
6c: ed 02 00 00 ed 02 00 00 ed 02 00 00 ed 02 00 00 ................
7c: ed 02 00 00 ed 02 00 00 ed 02 00 00 ed 02 00 00 ................
8c: ed 02 00 00 ed 02 00 00 ed 02 00 00 ed 02 00 00 ................
9c: ed 02 00 00 ed 02 00 00 ed 02 00 00 ed 02 00 00 ................
ac: 00 00 00 00 ed 02 00 00 ed 02 00 00 fd 02 00 00 ................
...
c4: ed 02 00 00 ed 02 00 00 ed 02 00 00 ed 02 00 00 ................
d4: ed 02 00 00 ed 02 00 00 ed 02 00 00 ed 02 00 00 ................
...
ec: ed 02 00 00 ed 02 00 00 ed 02 00 00 ed 02 00 00 ................
fc: ed 02 00 00 ed 02 00 00 ed 02 00 00 ed 02 00 00 ................
10c: ed 02 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
...
124: ed 02 00 00 ed 02 00 00 ed 02 00 00 ed 02 00 00 ................
134: ed 02 00 00 ed 02 00 00 ed 02 00 00 00 00 00 00 ................
...
150: ed 02 00 00 ed 02 00 00 ed 02 00 00 ed 02 00 00 ................
...
1b0: ed 02 00 00 ed 02 00 00 ed 02 00 00 ed 02 00 00 ................
1c0: ed 02 00 00 ed 02 00 00 ed 02 00 00 ed 02 00 00 ................
1d0: ed 02 00 00 ed 02 00 00 ed 02 00 00 ed 02 00 00 ................
1e0: ed 02 00 00 ed 02 00 00 ed 02 00 00 00 00 00 00 ................
...
258: ed 02 00 00 ed 02 00 00 ed 02 00 00 ed 02 00 00 ................
268: ed 02 00 00 ....
0000026c <__do_global_dtors_aux>:
26c: b510 push {r4, lr}
26e: 4c05 ldr r4, [pc, #20] ; (284 <__do_global_dtors_aux+0x18>)
270: 7823 ldrb r3, [r4, #0]
272: b933 cbnz r3, 282 <__do_global_dtors_aux+0x16>
274: 4b04 ldr r3, [pc, #16] ; (288 <__do_global_dtors_aux+0x1c>)
276: b113 cbz r3, 27e <__do_global_dtors_aux+0x12>
278: 4804 ldr r0, [pc, #16] ; (28c <__do_global_dtors_aux+0x20>)
27a: f3af 8000 nop.w
27e: 2301 movs r3, #1
280: 7023 strb r3, [r4, #0]
282: bd10 pop {r4, pc}
284: 2000008c .word 0x2000008c
288: 00000000 .word 0x00000000
28c: 00003e78 .word 0x00003e78
00000290 <frame_dummy>:
290: b508 push {r3, lr}
292: 4b03 ldr r3, [pc, #12] ; (2a0 <frame_dummy+0x10>)
294: b11b cbz r3, 29e <frame_dummy+0xe>
296: 4903 ldr r1, [pc, #12] ; (2a4 <frame_dummy+0x14>)
298: 4803 ldr r0, [pc, #12] ; (2a8 <frame_dummy+0x18>)
29a: f3af 8000 nop.w
29e: bd08 pop {r3, pc}
2a0: 00000000 .word 0x00000000
2a4: 20000090 .word 0x20000090
2a8: 00003e78 .word 0x00003e78
000002ac <Reset_Handler>:
* __data_start__: VMA of start of the section to copy to
* __data_end__: VMA of end of the section to copy to
*
* All addresses must be aligned to 4 bytes boundary.
*/
ldr r1, =__etext
2ac: 490a ldr r1, [pc, #40] ; (2d8 <Reset_Handler+0x2c>)
ldr r2, =__data_start__
2ae: 4a0b ldr r2, [pc, #44] ; (2dc <Reset_Handler+0x30>)
ldr r3, =__data_end__
2b0: 4b0b ldr r3, [pc, #44] ; (2e0 <Reset_Handler+0x34>)
.L_loop1:
cmp r2, r3
2b2: 429a cmp r2, r3
ittt lt
2b4: bfbe ittt lt
ldrlt r0, [r1], #4
2b6: f851 0b04 ldrlt.w r0, [r1], #4
strlt r0, [r2], #4
2ba: f842 0b04 strlt.w r0, [r2], #4
blt .L_loop1
2be: e7f8 blt.n 2b2 <Reset_Handler+0x6>
* __bss_start__: start of the BSS section.
* __bss_end__: end of the BSS section.
*
* Both addresses must be aligned to 4 bytes boundary.
*/
ldr r1, =__bss_start__
2c0: 4908 ldr r1, [pc, #32] ; (2e4 <Reset_Handler+0x38>)
ldr r2, =__bss_end__
2c2: 4a09 ldr r2, [pc, #36] ; (2e8 <Reset_Handler+0x3c>)
movs r0, 0
2c4: 2000 movs r0, #0
.L_loop3:
cmp r1, r2
2c6: 4291 cmp r1, r2
itt lt
2c8: bfbc itt lt
strlt r0, [r1], #4
2ca: f841 0b04 strlt.w r0, [r1], #4
blt .L_loop3
2ce: e7fa blt.n 2c6 <Reset_Handler+0x1a>
#endif /* __STARTUP_CLEAR_BSS_MULTIPLE || __STARTUP_CLEAR_BSS */
#ifndef __NO_SYSTEM_INIT
bl SystemInit
2d0: f000 f87e bl 3d0 <SystemInit>
#endif
#ifndef __START
#define __START _start
#endif
bl __START
2d4: f000 f8d2 bl 47c <main>
ldr r1, =__etext
2d8: 0000417c .word 0x0000417c
ldr r2, =__data_start__
2dc: 20000000 .word 0x20000000
ldr r3, =__data_end__
2e0: 2000008c .word 0x2000008c
ldr r1, =__bss_start__
2e4: 2000008c .word 0x2000008c
ldr r2, =__bss_end__
2e8: 20000220 .word 0x20000220
000002ec <ADC_0_Sequence_0_Handler>:
.align 1
.thumb_func
.weak Default_Handler
.type Default_Handler, %function
Default_Handler:
b .
2ec: e7fe b.n 2ec <ADC_0_Sequence_0_Handler>
2ee: bf00 nop
000002f0 <__cxa_pure_virtual>:
/**
* These functions further help eliminate unwanted exceptions
*/
extern "C" void __cxa_pure_virtual()
{
2f0: b480 push {r7}
2f2: af00 add r7, sp, #0
while(1);
2f4: e7fe b.n 2f4 <__cxa_pure_virtual+0x4>
000002f6 <_ZN9__gnu_cxx27__verbose_terminate_handlerEv>:
}
void __gnu_cxx::__verbose_terminate_handler()
{
2f6: b480 push {r7}
2f8: af00 add r7, sp, #0
while(1);
2fa: e7fe b.n 2fa <_ZN9__gnu_cxx27__verbose_terminate_handlerEv+0x4>
000002fc <GPIO_Port_F_Handler>:
}
extern "C" void GPIO_Port_F_Handler(void)
{
2fc: b580 push {r7, lr}
2fe: af00 add r7, sp, #0
if(swtich1.read() == 1)
300: 4824 ldr r0, [pc, #144] ; (394 <GPIO_Port_F_Handler+0x98>)
302: f001 f9a3 bl 164c <_ZN4Gpio4readEv>
306: 4603 mov r3, r0
308: 2b01 cmp r3, #1
30a: bf0c ite eq
30c: 2301 moveq r3, #1
30e: 2300 movne r3, #0
310: b2db uxtb r3, r3
312: 2b00 cmp r3, #0
314: d006 beq.n 324 <GPIO_Port_F_Handler+0x28>
{
redLed.write((uint32_t)setORClear::clear);
316: 2100 movs r1, #0
318: 481f ldr r0, [pc, #124] ; (398 <GPIO_Port_F_Handler+0x9c>)
31a: f001 f97b bl 1614 <_ZN4Gpio5writeEm>
swtich1.interruptClear();
31e: 481d ldr r0, [pc, #116] ; (394 <GPIO_Port_F_Handler+0x98>)
320: f001 f963 bl 15ea <_ZN4Gpio14interruptClearEv>
}
if(swtich1.read() == 0)
324: 481b ldr r0, [pc, #108] ; (394 <GPIO_Port_F_Handler+0x98>)
326: f001 f991 bl 164c <_ZN4Gpio4readEv>
32a: 4603 mov r3, r0
32c: 2b00 cmp r3, #0
32e: bf0c ite eq
330: 2301 moveq r3, #1
332: 2300 movne r3, #0
334: b2db uxtb r3, r3
336: 2b00 cmp r3, #0
338: d006 beq.n 348 <GPIO_Port_F_Handler+0x4c>
{
redLed.write((uint32_t)setORClear::set);
33a: 2101 movs r1, #1
33c: 4816 ldr r0, [pc, #88] ; (398 <GPIO_Port_F_Handler+0x9c>)
33e: f001 f969 bl 1614 <_ZN4Gpio5writeEm>
swtich1.interruptClear();
342: 4814 ldr r0, [pc, #80] ; (394 <GPIO_Port_F_Handler+0x98>)
344: f001 f951 bl 15ea <_ZN4Gpio14interruptClearEv>
}
if(swtich2.read() == 1)
348: 4814 ldr r0, [pc, #80] ; (39c <GPIO_Port_F_Handler+0xa0>)
34a: f001 f97f bl 164c <_ZN4Gpio4readEv>
34e: 4603 mov r3, r0
350: 2b01 cmp r3, #1
352: bf0c ite eq
354: 2301 moveq r3, #1
356: 2300 movne r3, #0
358: b2db uxtb r3, r3
35a: 2b00 cmp r3, #0
35c: d006 beq.n 36c <GPIO_Port_F_Handler+0x70>
{
blueLed.write((uint32_t)setORClear::clear);
35e: 2100 movs r1, #0
360: 480f ldr r0, [pc, #60] ; (3a0 <GPIO_Port_F_Handler+0xa4>)
362: f001 f957 bl 1614 <_ZN4Gpio5writeEm>
swtich2.interruptClear();
366: 480d ldr r0, [pc, #52] ; (39c <GPIO_Port_F_Handler+0xa0>)
368: f001 f93f bl 15ea <_ZN4Gpio14interruptClearEv>
}
if(swtich2.read() == 0)
36c: 480b ldr r0, [pc, #44] ; (39c <GPIO_Port_F_Handler+0xa0>)
36e: f001 f96d bl 164c <_ZN4Gpio4readEv>
372: 4603 mov r3, r0
374: 2b00 cmp r3, #0
376: bf0c ite eq
378: 2301 moveq r3, #1
37a: 2300 movne r3, #0
37c: b2db uxtb r3, r3
37e: 2b00 cmp r3, #0
380: d006 beq.n 390 <GPIO_Port_F_Handler+0x94>
{
blueLed.write((uint32_t)setORClear::set);
382: 2101 movs r1, #1
384: 4806 ldr r0, [pc, #24] ; (3a0 <GPIO_Port_F_Handler+0xa4>)
386: f001 f945 bl 1614 <_ZN4Gpio5writeEm>
swtich2.interruptClear();
38a: 4804 ldr r0, [pc, #16] ; (39c <GPIO_Port_F_Handler+0xa0>)
38c: f001 f92d bl 15ea <_ZN4Gpio14interruptClearEv>
}
}
390: bf00 nop
392: bd80 pop {r7, pc}
394: 200000f4 .word 0x200000f4
398: 200000dc .word 0x200000dc
39c: 2000010c .word 0x2000010c
3a0: 200000c4 .word 0x200000c4
000003a4 <_Z8pollTestv>:
// myTimer.clearInterrupt();
// }
// }
void pollTest(void)
{
3a4: b580 push {r7, lr}
3a6: af00 add r7, sp, #0
(void)testAdc.getAdcSample();
3a8: 4807 ldr r0, [pc, #28] ; (3c8 <_Z8pollTestv+0x24>)
3aa: f000 fd38 bl e1e <_ZN3Adc12getAdcSampleEv>
readme = testAdc.getAdcSample();
3ae: 4806 ldr r0, [pc, #24] ; (3c8 <_Z8pollTestv+0x24>)
3b0: f000 fd35 bl e1e <_ZN3Adc12getAdcSampleEv>
3b4: 4603 mov r3, r0
3b6: 461a mov r2, r3
3b8: 4b04 ldr r3, [pc, #16] ; (3cc <_Z8pollTestv+0x28>)
3ba: 601a str r2, [r3, #0]
testAdc.clearInterrupt();
3bc: 4802 ldr r0, [pc, #8] ; (3c8 <_Z8pollTestv+0x24>)
3be: f000 fd44 bl e4a <_ZN3Adc14clearInterruptEv>
}
3c2: bf00 nop
3c4: bd80 pop {r7, pc}
3c6: bf00 nop
3c8: 20000144 .word 0x20000144
3cc: 20000004 .word 0x20000004
000003d0 <SystemInit>:
extern "C" void SystemInit(void)
{
3d0: b580 push {r7, lr}
3d2: b086 sub sp, #24
3d4: af06 add r7, sp, #24
SystemControl::initializeGPIOHB();
3d6: f000 fecb bl 1170 <_ZN13SystemControl16initializeGPIOHBEv>
SystemControl::initializeClock(_80MHz);
3da: 2005 movs r0, #5
3dc: f000 ff00 bl 11e0 <_ZN13SystemControl15initializeClockE7SYSDIV2>
greenLed.initialize((uint32_t)PF3::M1PWM7, output);
3e0: 2201 movs r2, #1
3e2: f241 01d2 movw r1, #4306 ; 0x10d2
3e6: 481d ldr r0, [pc, #116] ; (45c <Stack_Size+0x5c>)
3e8: f000 ff80 bl 12ec <_ZN4Gpio10initializeEm9direction>
blueLed.initialize((uint32_t)PF2::GPIO, output);
3ec: 2201 movs r2, #1
3ee: f241 0168 movw r1, #4200 ; 0x1068
3f2: 481b ldr r0, [pc, #108] ; (460 <Stack_Size+0x60>)
3f4: f000 ff7a bl 12ec <_ZN4Gpio10initializeEm9direction>
redLed.initialize((uint32_t)PF1::GPIO, output);
3f8: 2201 movs r2, #1
3fa: f241 0104 movw r1, #4100 ; 0x1004
3fe: 4819 ldr r0, [pc, #100] ; (464 <Stack_Size+0x64>)
400: f000 ff74 bl 12ec <_ZN4Gpio10initializeEm9direction>
adcPin.initialize((uint32_t)PE3::AIN0, input);
404: 2200 movs r2, #0
406: f640 51ad movw r1, #3501 ; 0xdad
40a: 4817 ldr r0, [pc, #92] ; (468 <Stack_Size+0x68>)
40c: f000 ff6e bl 12ec <_ZN4Gpio10initializeEm9direction>
greenPwm.initializeSingle(7, module1, 0xFFFF, 0xFFFF/2, 0x1, countDirectionPwm::down, (uint32_t)ACTZERO::invertPwm, true, (uint32_t)pwmUnitClockDivisor::_64);
410: 2305 movs r3, #5
412: 9305 str r3, [sp, #20]
414: 2301 movs r3, #1
416: 9304 str r3, [sp, #16]
418: 2301 movs r3, #1
41a: 9303 str r3, [sp, #12]
41c: 2300 movs r3, #0
41e: 9302 str r3, [sp, #8]
420: 2301 movs r3, #1
422: 9301 str r3, [sp, #4]
424: f647 73ff movw r3, #32767 ; 0x7fff
428: 9300 str r3, [sp, #0]
42a: f64f 73ff movw r3, #65535 ; 0xffff
42e: 2201 movs r2, #1
430: 2107 movs r1, #7
432: 480e ldr r0, [pc, #56] ; (46c <Stack_Size+0x6c>)
434: f001 f934 bl 16a0 <_ZN3Pwm16initializeSingleEm9pwmModulemmm17countDirectionPwmmbm>
testAdc.initializeModule((uint32_t)adcModule::module0, sequencerPriority, false, false);
438: 4b0d ldr r3, [pc, #52] ; (470 <Stack_Size+0x70>)
43a: 681a ldr r2, [r3, #0]
43c: 2300 movs r3, #0
43e: 9300 str r3, [sp, #0]
440: 2300 movs r3, #0
442: 2100 movs r1, #0
444: 480b ldr r0, [pc, #44] ; (474 <Stack_Size+0x74>)
446: f000 fa79 bl 93c <_ZN3Adc16initializeModuleEmmmm>
adcResolution = Adc::getAdcResolution();
44a: f000 fd3f bl ecc <_ZN3Adc16getAdcResolutionEv>
44e: 4602 mov r2, r0
450: 4b09 ldr r3, [pc, #36] ; (478 <Stack_Size+0x78>)
452: 601a str r2, [r3, #0]
}
454: bf00 nop
456: 46bd mov sp, r7
458: bd80 pop {r7, pc}
45a: bf00 nop
45c: 200000ac .word 0x200000ac
460: 200000c4 .word 0x200000c4
464: 200000dc .word 0x200000dc
468: 20000124 .word 0x20000124
46c: 2000013c .word 0x2000013c
470: 2000000c .word 0x2000000c
474: 20000144 .word 0x20000144
478: 200000a8 .word 0x200000a8
0000047c <main>:
int main(void)
{
47c: b5b0 push {r4, r5, r7, lr}
47e: b082 sub sp, #8
480: af02 add r7, sp, #8
Nvic::disableInterrupts();
482: f000 fa1d bl 8c0 <_ZN4Nvic17disableInterruptsEv>
swtich1.initialize((uint32_t)PF4::GPIO, input, 3);
486: 2303 movs r3, #3
488: 2200 movs r2, #0
48a: f241 1130 movw r1, #4400 ; 0x1130
48e: 482c ldr r0, [pc, #176] ; (540 <main+0xc4>)
490: f001 f846 bl 1520 <_ZN4Gpio10initializeEm9directionm>
swtich2.initialize((uint32_t)PF0::GPIO, input, 3);
494: 2303 movs r3, #3
496: 2200 movs r2, #0
498: f44f 617a mov.w r1, #4000 ; 0xfa0
49c: 4829 ldr r0, [pc, #164] ; (544 <main+0xc8>)
49e: f001 f83f bl 1520 <_ZN4Gpio10initializeEm9directionm>
// myTimer.initializeForInterupt(periodic, shortTimer0, 80000000, down, concatenated, 3);
// myTimer.enableTimer();
Nvic::enableInterrupts();
4a2: f000 fa1c bl 8de <_ZN4Nvic16enableInterruptsEv>
testAdc.initializeForPolling((uint32_t)sampleSequencer::SS3, (uint32_t)ssTriggerSource::processor, (uint32_t)ssInputSrc0::AIN0, (uint32_t)ssControl0::END0|(uint32_t)ssControl0::IE0, pollTest);
4a6: 4b28 ldr r3, [pc, #160] ; (548 <main+0xcc>)
4a8: 9301 str r3, [sp, #4]
4aa: 2306 movs r3, #6
4ac: 9300 str r3, [sp, #0]
4ae: 2300 movs r3, #0
4b0: 2200 movs r2, #0
4b2: 2103 movs r1, #3
4b4: 4825 ldr r0, [pc, #148] ; (54c <main+0xd0>)
4b6: f000 fab3 bl a20 <_ZN3Adc20initializeForPollingEmmmmPFvvE>
testAdc.enableSampleSequencer();
4ba: 4824 ldr r0, [pc, #144] ; (54c <main+0xd0>)
4bc: f000 fb3d bl b3a <_ZN3Adc21enableSampleSequencerEv>
testAdc.initiateSampling();
4c0: 4822 ldr r0, [pc, #136] ; (54c <main+0xd0>)
4c2: f000 fc98 bl df6 <_ZN3Adc16initiateSamplingEv>
blueLed.write((uint32_t)setORClear::set);
4c6: 2101 movs r1, #1
4c8: 4821 ldr r0, [pc, #132] ; (550 <main+0xd4>)
4ca: f001 f8a3 bl 1614 <_ZN4Gpio5writeEm>
redLed.write((uint32_t)setORClear::set);
4ce: 2101 movs r1, #1
4d0: 4820 ldr r0, [pc, #128] ; (554 <main+0xd8>)
4d2: f001 f89f bl 1614 <_ZN4Gpio5writeEm>
while(1)
{
// Nvic::wfi();
testAdc.pollStatus();
4d6: 481d ldr r0, [pc, #116] ; (54c <main+0xd0>)
4d8: f000 fc54 bl d84 <_ZN3Adc10pollStatusEv>
voltageValue = (3.3/(1<<adcResolution))*readme;
4dc: 4b1e ldr r3, [pc, #120] ; (558 <main+0xdc>)
4de: 681b ldr r3, [r3, #0]
4e0: 2201 movs r2, #1
4e2: fa02 f303 lsl.w r3, r2, r3
4e6: 4618 mov r0, r3
4e8: f001 fbba bl 1c60 <__aeabi_i2d>
4ec: 4603 mov r3, r0
4ee: 460c mov r4, r1
4f0: 461a mov r2, r3
4f2: 4623 mov r3, r4
4f4: a110 add r1, pc, #64 ; (adr r1, 538 <main+0xbc>)
4f6: e9d1 0100 ldrd r0, r1, [r1]
4fa: f001 fd45 bl 1f88 <__aeabi_ddiv>
4fe: 4603 mov r3, r0
500: 460c mov r4, r1
502: 4625 mov r5, r4
504: 461c mov r4, r3
506: 4b15 ldr r3, [pc, #84] ; (55c <main+0xe0>)
508: 681b ldr r3, [r3, #0]
50a: 4618 mov r0, r3
50c: f001 fba8 bl 1c60 <__aeabi_i2d>
510: 4602 mov r2, r0
512: 460b mov r3, r1
514: 4620 mov r0, r4
516: 4629 mov r1, r5
518: f001 fc0c bl 1d34 <__aeabi_dmul>
51c: 4603 mov r3, r0
51e: 460c mov r4, r1
520: 4618 mov r0, r3
522: 4621 mov r1, r4
524: f001 fe18 bl 2158 <__aeabi_d2f>
528: 4602 mov r2, r0
52a: 4b0d ldr r3, [pc, #52] ; (560 <main+0xe4>)
52c: 601a str r2, [r3, #0]
voltageValue = voltageValue;
52e: 4b0c ldr r3, [pc, #48] ; (560 <main+0xe4>)
530: 681b ldr r3, [r3, #0]
532: 4a0b ldr r2, [pc, #44] ; (560 <main+0xe4>)
534: 6013 str r3, [r2, #0]
testAdc.pollStatus();
536: e7ce b.n 4d6 <main+0x5a>
538: 66666666 .word 0x66666666
53c: 400a6666 .word 0x400a6666
540: 200000f4 .word 0x200000f4
544: 2000010c .word 0x2000010c
548: 000003a5 .word 0x000003a5
54c: 20000144 .word 0x20000144
550: 200000c4 .word 0x200000c4
554: 200000dc .word 0x200000dc
558: 200000a8 .word 0x200000a8
55c: 20000004 .word 0x20000004
560: 20000008 .word 0x20000008
00000564 <_Z41__static_initialization_and_destruction_0ii>:
}
}
564: b580 push {r7, lr}
566: b082 sub sp, #8
568: af00 add r7, sp, #0
56a: 6078 str r0, [r7, #4]
56c: 6039 str r1, [r7, #0]
56e: 687b ldr r3, [r7, #4]
570: 2b01 cmp r3, #1
572: d144 bne.n 5fe <_Z41__static_initialization_and_destruction_0ii+0x9a>
574: 683b ldr r3, [r7, #0]
576: f64f 72ff movw r2, #65535 ; 0xffff
57a: 4293 cmp r3, r2
57c: d13f bne.n 5fe <_Z41__static_initialization_and_destruction_0ii+0x9a>
Gpio greenLed;
57e: 4822 ldr r0, [pc, #136] ; (608 <_Z41__static_initialization_and_destruction_0ii+0xa4>)
580: f000 fe9a bl 12b8 <_ZN4GpioC1Ev>
584: 4a21 ldr r2, [pc, #132] ; (60c <_Z41__static_initialization_and_destruction_0ii+0xa8>)
586: 4922 ldr r1, [pc, #136] ; (610 <_Z41__static_initialization_and_destruction_0ii+0xac>)
588: 481f ldr r0, [pc, #124] ; (608 <_Z41__static_initialization_and_destruction_0ii+0xa4>)
58a: f001 fa11 bl 19b0 <__aeabi_atexit>
Gpio blueLed;
58e: 4821 ldr r0, [pc, #132] ; (614 <_Z41__static_initialization_and_destruction_0ii+0xb0>)
590: f000 fe92 bl 12b8 <_ZN4GpioC1Ev>
594: 4a1d ldr r2, [pc, #116] ; (60c <_Z41__static_initialization_and_destruction_0ii+0xa8>)
596: 491e ldr r1, [pc, #120] ; (610 <_Z41__static_initialization_and_destruction_0ii+0xac>)
598: 481e ldr r0, [pc, #120] ; (614 <_Z41__static_initialization_and_destruction_0ii+0xb0>)
59a: f001 fa09 bl 19b0 <__aeabi_atexit>
Gpio redLed;
59e: 481e ldr r0, [pc, #120] ; (618 <_Z41__static_initialization_and_destruction_0ii+0xb4>)
5a0: f000 fe8a bl 12b8 <_ZN4GpioC1Ev>
5a4: 4a19 ldr r2, [pc, #100] ; (60c <_Z41__static_initialization_and_destruction_0ii+0xa8>)
5a6: 491a ldr r1, [pc, #104] ; (610 <_Z41__static_initialization_and_destruction_0ii+0xac>)
5a8: 481b ldr r0, [pc, #108] ; (618 <_Z41__static_initialization_and_destruction_0ii+0xb4>)
5aa: f001 fa01 bl 19b0 <__aeabi_atexit>
Gpio swtich1;
5ae: 481b ldr r0, [pc, #108] ; (61c <_Z41__static_initialization_and_destruction_0ii+0xb8>)
5b0: f000 fe82 bl 12b8 <_ZN4GpioC1Ev>
5b4: 4a15 ldr r2, [pc, #84] ; (60c <_Z41__static_initialization_and_destruction_0ii+0xa8>)
5b6: 4916 ldr r1, [pc, #88] ; (610 <_Z41__static_initialization_and_destruction_0ii+0xac>)
5b8: 4818 ldr r0, [pc, #96] ; (61c <_Z41__static_initialization_and_destruction_0ii+0xb8>)
5ba: f001 f9f9 bl 19b0 <__aeabi_atexit>
Gpio swtich2;
5be: 4818 ldr r0, [pc, #96] ; (620 <_Z41__static_initialization_and_destruction_0ii+0xbc>)
5c0: f000 fe7a bl 12b8 <_ZN4GpioC1Ev>
5c4: 4a11 ldr r2, [pc, #68] ; (60c <_Z41__static_initialization_and_destruction_0ii+0xa8>)
5c6: 4912 ldr r1, [pc, #72] ; (610 <_Z41__static_initialization_and_destruction_0ii+0xac>)
5c8: 4815 ldr r0, [pc, #84] ; (620 <_Z41__static_initialization_and_destruction_0ii+0xbc>)
5ca: f001 f9f1 bl 19b0 <__aeabi_atexit>
Gpio adcPin;
5ce: 4815 ldr r0, [pc, #84] ; (624 <_Z41__static_initialization_and_destruction_0ii+0xc0>)
5d0: f000 fe72 bl 12b8 <_ZN4GpioC1Ev>
5d4: 4a0d ldr r2, [pc, #52] ; (60c <_Z41__static_initialization_and_destruction_0ii+0xa8>)
5d6: 490e ldr r1, [pc, #56] ; (610 <_Z41__static_initialization_and_destruction_0ii+0xac>)
5d8: 4812 ldr r0, [pc, #72] ; (624 <_Z41__static_initialization_and_destruction_0ii+0xc0>)
5da: f001 f9e9 bl 19b0 <__aeabi_atexit>
Pwm greenPwm;
5de: 4812 ldr r0, [pc, #72] ; (628 <_Z41__static_initialization_and_destruction_0ii+0xc4>)
5e0: f001 f848 bl 1674 <_ZN3PwmC1Ev>
5e4: 4a09 ldr r2, [pc, #36] ; (60c <_Z41__static_initialization_and_destruction_0ii+0xa8>)
5e6: 4911 ldr r1, [pc, #68] ; (62c <_Z41__static_initialization_and_destruction_0ii+0xc8>)
5e8: 480f ldr r0, [pc, #60] ; (628 <_Z41__static_initialization_and_destruction_0ii+0xc4>)
5ea: f001 f9e1 bl 19b0 <__aeabi_atexit>
Adc testAdc;
5ee: 4810 ldr r0, [pc, #64] ; (630 <_Z41__static_initialization_and_destruction_0ii+0xcc>)
5f0: f000 f98e bl 910 <_ZN3AdcC1Ev>
5f4: 4a05 ldr r2, [pc, #20] ; (60c <_Z41__static_initialization_and_destruction_0ii+0xa8>)
5f6: 490f ldr r1, [pc, #60] ; (634 <_Z41__static_initialization_and_destruction_0ii+0xd0>)
5f8: 480d ldr r0, [pc, #52] ; (630 <_Z41__static_initialization_and_destruction_0ii+0xcc>)
5fa: f001 f9d9 bl 19b0 <__aeabi_atexit>
}
5fe: bf00 nop
600: 3708 adds r7, #8
602: 46bd mov sp, r7
604: bd80 pop {r7, pc}
606: bf00 nop
608: 200000ac .word 0x200000ac
60c: 20000000 .word 0x20000000
610: 000012d7 .word 0x000012d7
614: 200000c4 .word 0x200000c4
618: 200000dc .word 0x200000dc
61c: 200000f4 .word 0x200000f4
620: 2000010c .word 0x2000010c
624: 20000124 .word 0x20000124
628: 2000013c .word 0x2000013c
62c: 0000168b .word 0x0000168b
630: 20000144 .word 0x20000144
634: 00000927 .word 0x00000927
00000638 <_GLOBAL__sub_I_readme>:
638: b580 push {r7, lr}
63a: af00 add r7, sp, #0
63c: f64f 71ff movw r1, #65535 ; 0xffff
640: 2001 movs r0, #1
642: f7ff ff8f bl 564 <_Z41__static_initialization_and_destruction_0ii>
646: bd80 pop {r7, pc}
00000648 <_ZN8RegisterC1Ev>:
#include "register.h"
/**
* @brief empty constructor placeholder
*/
Register::Register()
648: b480 push {r7}
64a: b083 sub sp, #12
64c: af00 add r7, sp, #0
64e: 6078 str r0, [r7, #4]
{
}
650: 687b ldr r3, [r7, #4]
652: 4618 mov r0, r3
654: 370c adds r7, #12
656: 46bd mov sp, r7
658: f85d 7b04 ldr.w r7, [sp], #4
65c: 4770 bx lr
0000065e <_ZN8RegisterD1Ev>:
/**
* @brief empty deconstructor placeholder
*/
Register::~Register()
65e: b480 push {r7}
660: b083 sub sp, #12
662: af00 add r7, sp, #0
664: 6078 str r0, [r7, #4]
{
}
666: 687b ldr r3, [r7, #4]
668: 4618 mov r0, r3
66a: 370c adds r7, #12
66c: 46bd mov sp, r7
66e: f85d 7b04 ldr.w r7, [sp], #4
672: 4770 bx lr
00000674 <_ZN8Register25getRegisterBitFieldStatusEPVmmm18bitFieldPermission>:
* @param permission of the bitfield, read-only, write-only, etc...
*
* @return retrieved information in the bitfield
*/
uint32_t Register::getRegisterBitFieldStatus(volatile uint32_t* address, uint32_t bit, uint32_t bitWidth, bitFieldPermission permission)
{
674: b480 push {r7}
676: b087 sub sp, #28
678: af00 add r7, sp, #0
67a: 60f8 str r0, [r7, #12]
67c: 60b9 str r1, [r7, #8]
67e: 607a str r2, [r7, #4]
680: 70fb strb r3, [r7, #3]
if((permission == RW) || (permission == RO) || (permission == RW1C))
682: 78fb ldrb r3, [r7, #3]
684: 2b00 cmp r3, #0
686: d005 beq.n 694 <_ZN8Register25getRegisterBitFieldStatusEPVmmm18bitFieldPermission+0x20>
688: 78fb ldrb r3, [r7, #3]
68a: 2b01 cmp r3, #1
68c: d002 beq.n 694 <_ZN8Register25getRegisterBitFieldStatusEPVmmm18bitFieldPermission+0x20>
68e: 78fb ldrb r3, [r7, #3]
690: 2b03 cmp r3, #3
692: d111 bne.n 6b8 <_ZN8Register25getRegisterBitFieldStatusEPVmmm18bitFieldPermission+0x44>
{
uint32_t select = ((((0xFFFFFFFF >> (32 - bitWidth)))) << bit);
694: 687b ldr r3, [r7, #4]
696: f1c3 0320 rsb r3, r3, #32
69a: f04f 32ff mov.w r2, #4294967295 ; 0xffffffff
69e: 40da lsrs r2, r3
6a0: 68bb ldr r3, [r7, #8]
6a2: fa02 f303 lsl.w r3, r2, r3
6a6: 617b str r3, [r7, #20]
return(((*address) & select) >> bit);
6a8: 68fb ldr r3, [r7, #12]
6aa: 681a ldr r2, [r3, #0]
6ac: 697b ldr r3, [r7, #20]
6ae: 401a ands r2, r3
6b0: 68bb ldr r3, [r7, #8]
6b2: fa22 f303 lsr.w r3, r2, r3
6b6: e001 b.n 6bc <_ZN8Register25getRegisterBitFieldStatusEPVmmm18bitFieldPermission+0x48>
}
else
{
return(UINT32_MAX);
6b8: f04f 33ff mov.w r3, #4294967295 ; 0xffffffff
}
}
6bc: 4618 mov r0, r3
6be: 371c adds r7, #28
6c0: 46bd mov sp, r7
6c2: f85d 7b04 ldr.w r7, [sp], #4
6c6: 4770 bx lr
000006c8 <_ZN8Register25setRegisterBitFieldStatusEPVmmmm18bitFieldPermission>:
* @param bit to be set or the first bit of the bitfield to be set
* @param width of the bitfield
* @param permission of the bitfield, read-only, write-only, etc...
*/
void Register::setRegisterBitFieldStatus(volatile uint32_t* address, uint32_t value, uint32_t bit, uint32_t bitWidth, bitFieldPermission permission)
{
6c8: b480 push {r7}
6ca: b087 sub sp, #28
6cc: af00 add r7, sp, #0
6ce: 60f8 str r0, [r7, #12]
6d0: 60b9 str r1, [r7, #8]
6d2: 607a str r2, [r7, #4]
6d4: 603b str r3, [r7, #0]
if((permission == RW1C) && (value != 1))
6d6: f897 3020 ldrb.w r3, [r7, #32]
6da: 2b03 cmp r3, #3
6dc: d102 bne.n 6e4 <_ZN8Register25setRegisterBitFieldStatusEPVmmmm18bitFieldPermission+0x1c>
6de: 68bb ldr r3, [r7, #8]
6e0: 2b01 cmp r3, #1
6e2: d12f bne.n 744 <_ZN8Register25setRegisterBitFieldStatusEPVmmmm18bitFieldPermission+0x7c>
{
return;
}
else if((permission == RW) || (permission == WO) || (permission == RW1C))
6e4: f897 3020 ldrb.w r3, [r7, #32]
6e8: 2b00 cmp r3, #0
6ea: d007 beq.n 6fc <_ZN8Register25setRegisterBitFieldStatusEPVmmmm18bitFieldPermission+0x34>
6ec: f897 3020 ldrb.w r3, [r7, #32]
6f0: 2b02 cmp r3, #2
6f2: d003 beq.n 6fc <_ZN8Register25setRegisterBitFieldStatusEPVmmmm18bitFieldPermission+0x34>
6f4: f897 3020 ldrb.w r3, [r7, #32]
6f8: 2b03 cmp r3, #3
6fa: d125 bne.n 748 <_ZN8Register25setRegisterBitFieldStatusEPVmmmm18bitFieldPermission+0x80>
{
uint32_t maxValue = (0xFFFFFFFF >> (32 - bitWidth));
6fc: 683b ldr r3, [r7, #0]
6fe: f1c3 0320 rsb r3, r3, #32
702: f04f 32ff mov.w r2, #4294967295 ; 0xffffffff
706: fa22 f303 lsr.w r3, r2, r3
70a: 617b str r3, [r7, #20]
if((value <= maxValue))
70c: 68ba ldr r2, [r7, #8]
70e: 697b ldr r3, [r7, #20]
710: 429a cmp r2, r3
712: d81b bhi.n 74c <_ZN8Register25setRegisterBitFieldStatusEPVmmmm18bitFieldPermission+0x84>
{
uint32_t clear = (~(maxValue << bit));
714: 697a ldr r2, [r7, #20]
716: 687b ldr r3, [r7, #4]
718: fa02 f303 lsl.w r3, r2, r3
71c: 43db mvns r3, r3
71e: 613b str r3, [r7, #16]
value = value << bit;
720: 68ba ldr r2, [r7, #8]
722: 687b ldr r3, [r7, #4]
724: fa02 f303 lsl.w r3, r2, r3
728: 60bb str r3, [r7, #8]
(*address) &= clear;
72a: 68fb ldr r3, [r7, #12]
72c: 681a ldr r2, [r3, #0]
72e: 693b ldr r3, [r7, #16]
730: 401a ands r2, r3
732: 68fb ldr r3, [r7, #12]
734: 601a str r2, [r3, #0]
(*address) |= value;
736: 68fb ldr r3, [r7, #12]
738: 681a ldr r2, [r3, #0]
73a: 68bb ldr r3, [r7, #8]
73c: 431a orrs r2, r3
73e: 68fb ldr r3, [r7, #12]
740: 601a str r2, [r3, #0]
}
else
{
return;
}
742: e004 b.n 74e <_ZN8Register25setRegisterBitFieldStatusEPVmmmm18bitFieldPermission+0x86>
return;
744: bf00 nop
746: e002 b.n 74e <_ZN8Register25setRegisterBitFieldStatusEPVmmmm18bitFieldPermission+0x86>
}
else
{
return;
748: bf00 nop
74a: e000 b.n 74e <_ZN8Register25setRegisterBitFieldStatusEPVmmmm18bitFieldPermission+0x86>
return;
74c: bf00 nop
}
}
74e: 371c adds r7, #28
750: 46bd mov sp, r7
752: f85d 7b04 ldr.w r7, [sp], #4
756: 4770 bx lr
00000758 <_Znwj>:
void* operator new(size_t size) noexcept
{
758: b580 push {r7, lr}
75a: b082 sub sp, #8
75c: af00 add r7, sp, #0
75e: 6078 str r0, [r7, #4]
return malloc(size);
760: 6878 ldr r0, [r7, #4]
762: f002 fcd9 bl 3118 <malloc>
766: 4603 mov r3, r0
}
768: 4618 mov r0, r3
76a: 3708 adds r7, #8
76c: 46bd mov sp, r7
76e: bd80 pop {r7, pc}
00000770 <_ZdlPv>:
void operator delete(void *p) noexcept
{
770: b580 push {r7, lr}
772: b082 sub sp, #8
774: af00 add r7, sp, #0
776: 6078 str r0, [r7, #4]
free(p);
778: 6878 ldr r0, [r7, #4]
77a: f002 fcd5 bl 3128 <free>
}
77e: bf00 nop
780: 3708 adds r7, #8
782: 46bd mov sp, r7
784: bd80 pop {r7, pc}
00000786 <_Znaj>:
void* operator new[](size_t size) noexcept
{
786: b580 push {r7, lr}
788: b082 sub sp, #8
78a: af00 add r7, sp, #0
78c: 6078 str r0, [r7, #4]
return operator new(size); // Same as regular new
78e: 6878 ldr r0, [r7, #4]
790: f7ff ffe2 bl 758 <_Znwj>
794: 4603 mov r3, r0
}
796: 4618 mov r0, r3
798: 3708 adds r7, #8
79a: 46bd mov sp, r7
79c: bd80 pop {r7, pc}
0000079e <_ZdaPv>:
void operator delete[](void *p) noexcept
{
79e: b580 push {r7, lr}
7a0: b082 sub sp, #8
7a2: af00 add r7, sp, #0
7a4: 6078 str r0, [r7, #4]
operator delete(p); // Same as regular delete
7a6: 6878 ldr r0, [r7, #4]
7a8: f7ff ffe2 bl 770 <_ZdlPv>
}
7ac: bf00 nop
7ae: 3708 adds r7, #8
7b0: 46bd mov sp, r7
7b2: bd80 pop {r7, pc}
000007b4 <_ZnwjSt9nothrow_t>:
void* operator new(size_t size, std::nothrow_t) noexcept
{
7b4: b580 push {r7, lr}
7b6: b082 sub sp, #8
7b8: af00 add r7, sp, #0
7ba: 6078 str r0, [r7, #4]
7bc: 7039 strb r1, [r7, #0]
return operator new(size); // Same as regular new
7be: 6878 ldr r0, [r7, #4]
7c0: f7ff ffca bl 758 <_Znwj>
7c4: 4603 mov r3, r0
}
7c6: 4618 mov r0, r3
7c8: 3708 adds r7, #8
7ca: 46bd mov sp, r7
7cc: bd80 pop {r7, pc}
000007ce <_ZdlPvSt9nothrow_t>:
void operator delete(void *p, std::nothrow_t) noexcept
{
7ce: b580 push {r7, lr}
7d0: b082 sub sp, #8
7d2: af00 add r7, sp, #0
7d4: 6078 str r0, [r7, #4]
7d6: 7039 strb r1, [r7, #0]
operator delete(p); // Same as regular delete
7d8: 6878 ldr r0, [r7, #4]
7da: f7ff ffc9 bl 770 <_ZdlPv>
}
7de: bf00 nop
7e0: 3708 adds r7, #8
7e2: 46bd mov sp, r7
7e4: bd80 pop {r7, pc}
000007e6 <_ZnajSt9nothrow_t>:
void* operator new[](size_t size, std::nothrow_t) noexcept
{
7e6: b580 push {r7, lr}
7e8: b082 sub sp, #8
7ea: af00 add r7, sp, #0
7ec: 6078 str r0, [r7, #4]
7ee: 7039 strb r1, [r7, #0]
return operator new(size); // Same as regular new
7f0: 6878 ldr r0, [r7, #4]
7f2: f7ff ffb1 bl 758 <_Znwj>
7f6: 4603 mov r3, r0
}
7f8: 4618 mov r0, r3
7fa: 3708 adds r7, #8
7fc: 46bd mov sp, r7
7fe: bd80 pop {r7, pc}
00000800 <_ZdaPvSt9nothrow_t>:
void operator delete[](void *p, std::nothrow_t) noexcept
{
800: b580 push {r7, lr}
802: b082 sub sp, #8
804: af00 add r7, sp, #0
806: 6078 str r0, [r7, #4]
808: 7039 strb r1, [r7, #0]
operator delete(p); // Same as regular delete
80a: 6878 ldr r0, [r7, #4]
80c: f7ff ffb0 bl 770 <_ZdlPv>
}
810: bf00 nop
812: 3708 adds r7, #8
814: 46bd mov sp, r7
816: bd80 pop {r7, pc}
00000818 <_ZN4NvicC1Ev>:
/**
* @brief empty constructor placeholder
*/
Nvic::Nvic()
818: b480 push {r7}
81a: b083 sub sp, #12
81c: af00 add r7, sp, #0
81e: 6078 str r0, [r7, #4]
{
}
820: 687b ldr r3, [r7, #4]
822: 4618 mov r0, r3
824: 370c adds r7, #12
826: 46bd mov sp, r7
828: f85d 7b04 ldr.w r7, [sp], #4
82c: 4770 bx lr
0000082e <_ZN4NvicD1Ev>:
/**
* @brief empty deconstructor placeholder
*/
Nvic::~Nvic()
82e: b480 push {r7}
830: b083 sub sp, #12
832: af00 add r7, sp, #0
834: 6078 str r0, [r7, #4]
{
}
836: 687b ldr r3, [r7, #4]
838: 4618 mov r0, r3
83a: 370c adds r7, #12
83c: 46bd mov sp, r7
83e: f85d 7b04 ldr.w r7, [sp], #4
842: 4770 bx lr
00000844 <_ZN4Nvic17activateInterruptE9interruptm>:
* @param myInterrupt coresponds to the interrupt number of the interrupt that
* you want to activate.
* @param priority of the interrput that you want to activate
*/
void Nvic::activateInterrupt(interrupt myInterrupt, uint32_t priority)
{
844: b580 push {r7, lr}
846: b084 sub sp, #16
848: af02 add r7, sp, #8
84a: 4603 mov r3, r0
84c: 6039 str r1, [r7, #0]
84e: 71fb strb r3, [r7, #7]
if((myInterrupt < 139) && (priority < 8))
850: 79fb ldrb r3, [r7, #7]
852: 2b8a cmp r3, #138 ; 0x8a
854: d82b bhi.n 8ae <_ZN4Nvic17activateInterruptE9interruptm+0x6a>
856: 683b ldr r3, [r7, #0]
858: 2b07 cmp r3, #7
85a: d828 bhi.n 8ae <_ZN4Nvic17activateInterruptE9interruptm+0x6a>
{