diff --git a/riscv_cpu.c b/riscv_cpu.c index 464bc68..271b2c9 100644 --- a/riscv_cpu.c +++ b/riscv_cpu.c @@ -33,7 +33,10 @@ #include "iomem.h" #include "riscv_cpu.h" -void print_console(void *machine0, const char *buf, int len); +#define _info(...) {} //// +// #define _info(...) printf(...) //// + +void print_console(void *machine0, const char *buf, int len); //// #ifndef MAX_XLEN #error MAX_XLEN must be defined @@ -42,7 +45,7 @@ void print_console(void *machine0, const char *buf, int len); #error CONFIG_RISCV_MAX_XLEN must be defined #endif -#define DUMP_INVALID_MEM_ACCESS +// #define DUMP_INVALID_MEM_ACCESS #define DUMP_MMU_EXCEPTIONS #define DUMP_INTERRUPTS #define DUMP_INVALID_CSR @@ -394,12 +397,12 @@ int target_read_slow(RISCVCPUState *s, mem_uint_t *pval, // Console Input: BL808_UART_INT_STS (0x30002020) must return UART_INT_STS_URX_END_INT (1 << 1) case 0x30002020: - puts("read BL808_UART_INT_STS"); + _info("read BL808_UART_INT_STS\n"); ret = (1 << 1); break; // Console Input: BL808_UART_INT_MASK (0x30002024) must NOT return UART_INT_MASK_CR_URX_END_MASK (1 << 1) case 0x30002024: - puts("read BL808_UART_INT_MASK"); + _info("read BL808_UART_INT_MASK\n"); ret = 0; break; // Console Input: BL808_UART_FIFO_RDATA_OFFSET (0x3000208c) returns the Input Char @@ -517,7 +520,7 @@ int target_write_slow(RISCVCPUState *s, target_ulong addr, } // Console Input: Clear the interrupt after setting BL808_UART_INT_CLEAR (0x30002028) case 0x30002028: { - printf("write BL808_UART_INT_CLEAR: 0x%x\n", val); + _info("write BL808_UART_INT_CLEAR: 0x%x\n", val); void virtio_ack_irq(void *device0); virtio_ack_irq(NULL); break; @@ -527,6 +530,8 @@ int target_write_slow(RISCVCPUState *s, target_ulong addr, printf("target_write_slow: invalid physical address 0x"); print_target_ulong(paddr); printf("\n"); +#else + break; #endif } //// End Test @@ -1106,7 +1111,7 @@ static void set_priv(RISCVCPUState *s, int priv) static void raise_exception2(RISCVCPUState *s, uint32_t cause, target_ulong tval) { - printf("raise_exception2: cause=%d, tval=%p, pc=%p\n", cause, (void *)tval, s->pc);//// + _info("raise_exception2: cause=%d, tval=%p, pc=%p\n", cause, (void *)tval, s->pc);//// BOOL deleg; target_ulong causel; @@ -1148,15 +1153,15 @@ static void raise_exception2(RISCVCPUState *s, uint32_t cause, //// Begin Test: Emulate OpenSBI for System Timer if (cause == CAUSE_SUPERVISOR_ECALL) { - puts("TODO: Emulate OpenSBI for System Timer"); - printf("%s:\n", s->pc == 0x5020bad0 ? "Set Timer" : "Get Time"); + _info("TODO: Emulate OpenSBI for System Timer\n"); + _info("%s:\n", s->pc == 0x5020bad0 ? "Set Timer" : "Get Time"); - printf("Before: reg %s=%p\n", reg_name[16], s->reg[16]); //// A6 is X16 (fid) - printf("Before: reg %s=%p\n", reg_name[17], s->reg[17]); //// A7 is X17 (extid) - printf("Before: reg %s=%p\n", reg_name[10], s->reg[10]); //// A0 is X10 (parm0) - printf("Before: reg %s=%p\n", reg_name[11], s->reg[11]); //// A1 is X11 (parm1) - printf("Before: reg %s=%p\n", reg_name[12], s->reg[12]); //// A2 is X12 (parm2) - printf("Before: reg %s=%p\n", reg_name[13], s->reg[13]); //// A3 is X13 (parm3) + _info("Before: reg %s=%p\n", reg_name[16], s->reg[16]); //// A6 is X16 (fid) + _info("Before: reg %s=%p\n", reg_name[17], s->reg[17]); //// A7 is X17 (extid) + _info("Before: reg %s=%p\n", reg_name[10], s->reg[10]); //// A0 is X10 (parm0) + _info("Before: reg %s=%p\n", reg_name[11], s->reg[11]); //// A1 is X11 (parm1) + _info("Before: reg %s=%p\n", reg_name[12], s->reg[12]); //// A2 is X12 (parm2) + _info("Before: reg %s=%p\n", reg_name[13], s->reg[13]); //// A3 is X13 (parm3) // For OpenSBI Set Timer: Clear the pending timer interrupt bit // https://github.com/riscv-non-isa/riscv-sbi-doc/blob/v1.0.0/riscv-sbi.adoc#61-function-set-timer-fid-0 @@ -1166,12 +1171,12 @@ static void raise_exception2(RISCVCPUState *s, uint32_t cause, // https://five-embeddev.com/riscv-isa-manual/latest/counters.html#zicntr-standard-extension-for-base-counters-and-timers static uint64_t t = 0; s->reg[10] = t++ << 8; // Not too much or usleep will hang - printf("After: reg %s=%p\n", reg_name[10], s->reg[10]); //// A0 is X10 + _info("After: reg %s=%p\n", reg_name[10], s->reg[10]); //// A0 is X10 s->pc += 4; // Jump to the next instruction (ret) return; } - if (cause == CAUSE_USER_ECALL) { printf("User ECALL: pc=%p\n", s->pc); } //// + if (cause == CAUSE_USER_ECALL) { _info("User ECALL: pc=%p\n", s->pc); } //// //// End Test if (s->priv <= PRV_S) { @@ -1218,10 +1223,7 @@ static void raise_exception2(RISCVCPUState *s, uint32_t cause, static void raise_exception(RISCVCPUState *s, uint32_t cause) { - printf("raise_exception: cause=%d\n", cause);//// - #ifndef EMSCRIPTEN //// - // printf("raise_exception: sleep\n"); sleep(4);//// - #endif //// EMSCRIPTEN + _info("raise_exception: cause=%d\n", cause);//// raise_exception2(s, cause, 0); } diff --git a/riscv_machine.c b/riscv_machine.c index 7f9ea8b..b714417 100644 --- a/riscv_machine.c +++ b/riscv_machine.c @@ -40,6 +40,9 @@ #include "elf.h" #include "compress.h" +#define _info(...) {} //// +// #define _info(...) printf(...) //// + /* RISCV machine */ typedef struct RISCVMachine { @@ -245,10 +248,10 @@ static void plic_update_mip(RISCVMachine *s) uint32_t mask; mask = s->plic_pending_irq & ~s->plic_served_irq; if (mask) { - printf("plic_update_mip: set_mip, pending=0x%x, served=0x%x\n", s->plic_pending_irq, s->plic_served_irq);//// + _info("plic_update_mip: set_mip, pending=0x%x, served=0x%x\n", s->plic_pending_irq, s->plic_served_irq);//// riscv_cpu_set_mip(cpu, MIP_MEIP | MIP_SEIP); } else { - printf("plic_update_mip: reset_mip, pending=0x%x, served=0x%x\n", s->plic_pending_irq, s->plic_served_irq);//// + _info("plic_update_mip: reset_mip, pending=0x%x, served=0x%x\n", s->plic_pending_irq, s->plic_served_irq);//// riscv_cpu_reset_mip(cpu, MIP_MEIP | MIP_SEIP); } } @@ -258,7 +261,7 @@ static void plic_update_mip(RISCVMachine *s) static uint32_t plic_read(void *opaque, uint32_t offset, int size_log2) { - printf("plic_read: offset=0x%x\n", offset);//// + _info("plic_read: offset=0x%x\n", offset);//// RISCVMachine *s = opaque; uint32_t val, mask; int i; @@ -288,7 +291,7 @@ static uint32_t plic_read(void *opaque, uint32_t offset, int size_log2) static void plic_write(void *opaque, uint32_t offset, uint32_t val, int size_log2) { - printf("plic_write: offset=0x%x, val=0x%x\n", offset, val);//// + _info("plic_write: offset=0x%x, val=0x%x\n", offset, val);//// RISCVMachine *s = opaque; assert(size_log2 == 2); @@ -307,7 +310,7 @@ static void plic_write(void *opaque, uint32_t offset, uint32_t val, static void plic_set_irq(void *opaque, int irq_num, int state) { - printf("plic_set_irq: irq_num=%d, state=%d\n", irq_num, state);//// + _info("plic_set_irq: irq_num=%d, state=%d\n", irq_num, state);//// RISCVMachine *s = opaque; uint32_t mask; diff --git a/virtio.c b/virtio.c index 13680d9..76c2f39 100644 --- a/virtio.c +++ b/virtio.c @@ -32,6 +32,9 @@ #include "list.h" #include "virtio.h" +#define _info(...) {} //// +// #define _info(...) printf(...) //// + #define DEBUG_VIRTIO //// /* MMIO addresses - from the Linux kernel */ @@ -1300,7 +1303,7 @@ BOOL virtio_console_can_write_data(VIRTIODevice *s) QueueState *qs = &s->queue[0]; uint16_t avail_idx; - //if (!qs->ready) { printf("virtio_console_can_write_data: ready=%d\n", qs->ready); }//// + //if (!qs->ready) { _info("virtio_console_can_write_data: ready=%d\n", qs->ready); }//// if (!qs->ready) return FALSE; avail_idx = virtio_read16(s, qs->avail_addr + 2); @@ -1337,7 +1340,7 @@ int virtio_console_write_data(VIRTIODevice *s, const uint8_t *buf, int buf_len) { //// To handle a keypress, we trigger the UART3 Interrupt. //// Pass the keypress to VM Guest - printf("[%c]\n", buf[0]); //// + _info("[%c]\n", buf[0]); //// set_input(buf[0]); s->int_status |= 1; set_irq(s->irq, 1); @@ -1348,11 +1351,11 @@ int virtio_console_write_data(VIRTIODevice *s, const uint8_t *buf, int buf_len) int desc_idx; uint16_t avail_idx; - printf("virtio_console_write_data: ready=%d\n", qs->ready);//// + _info("virtio_console_write_data: ready=%d\n", qs->ready);//// if (!qs->ready) return 0; avail_idx = virtio_read16(s, qs->avail_addr + 2); - printf("virtio_console_write_data: last_avail_idx=%d, avail_idx=%d\n", qs->last_avail_idx, avail_idx);//// + _info("virtio_console_write_data: last_avail_idx=%d, avail_idx=%d\n", qs->last_avail_idx, avail_idx);//// if (qs->last_avail_idx == avail_idx) return 0; desc_idx = virtio_read16(s, qs->avail_addr + 4 + @@ -1360,7 +1363,7 @@ int virtio_console_write_data(VIRTIODevice *s, const uint8_t *buf, int buf_len) memcpy_to_queue(s, queue_idx, desc_idx, 0, buf, buf_len); virtio_consume_desc(s, queue_idx, desc_idx, buf_len); qs->last_avail_idx++; - printf("virtio_console_write_data: buf[0]=%c, buf_len=%d\n", buf[0], buf_len);//// + _info("virtio_console_write_data: buf[0]=%c, buf_len=%d\n", buf[0], buf_len);//// return buf_len; #endif // NOTUSED } @@ -2687,11 +2690,9 @@ void virtio_ack_irq(VIRTIODevice *device0) { if (device0 != NULL) { device = device0; return; } if (device == NULL) { puts("virtio_ack_irq: Missing device"); } - puts("virtio_ack_irq"); - // device->int_status &= ~val; - // if (device->int_status == 0) { - set_irq(device->irq, 0); - // } + // Trigger the Device IRQ + _info("virtio_ack_irq"); + set_irq(device->irq, 0); } //// Remember and return the Input Char