Swap ports 10 and 11 in Golden Cove Scheduler Models #117360
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backend:X86 Scheduler Models
Accuracy of X86 scheduler models
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Based on intel/perfmon#149, the documentation is incorrect and the pfm counter names are actually correct. This patch adjusts the Alder Lake scheduling model to match the performance counter naming/ correct naming that will soon be reflected in the optimization manual. This fixes part of llvm#117360.
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Based on intel/perfmon#149, the documentation is incorrect and the pfm counter names are actually correct. This patch adjusts the SapphireRapids scheduling model to match the performance counter naming/ correct naming that will soon be reflected in the optimization manual. This fixes part of llvm#117360.
boomanaiden154
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Nov 24, 2024
Based on intel/perfmon#149, the documentation is incorrect and the pfm counter names are actually correct. This patch adjusts the Alder Lake scheduling model to match the performance counter naming/ correct naming that will soon be reflected in the optimization manual. This fixes part of llvm#117360.
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The documentation is incorrect according to intel/perfmon#149. We should update our scheduling models to be consistent with all the other tools.
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