From 748b028540de67000345dfb3454ccd011ace4bb5 Mon Sep 17 00:00:00 2001 From: SpencerAbson Date: Thu, 14 Nov 2024 11:04:04 +0000 Subject: [PATCH] [AArch64] Make +sve2-aes an alias of +sve2+sve-aes (#116026) This patch essentially re-lands https://github.com/llvm/llvm-project/pull/114293 with the following fixups - `nosve2-aes` should disable the backend feature `FeatureSVEAES` such that the set of existing instructions that this removes is unchanged. - FMV dependencies now use the autogenerated `ExtensionDepencies` structure (since https://github.com/llvm/llvm-project/pull/113281) so we do not require the change to `AArch64FMV.td`. --- clang/include/clang/Basic/arm_sve.td | 2 +- clang/lib/Basic/Targets/AArch64.cpp | 10 ++--- clang/lib/Basic/Targets/AArch64.h | 2 +- clang/test/CodeGen/AArch64/fmv-dependencies.c | 2 +- .../AArch64/sve2-intrinsics/acle_sve2_aesd.c | 8 ++-- .../AArch64/sve2-intrinsics/acle_sve2_aese.c | 8 ++-- .../sve2-intrinsics/acle_sve2_aesimc.c | 8 ++-- .../AArch64/sve2-intrinsics/acle_sve2_aesmc.c | 8 ++-- .../sve2-intrinsics/acle_sve2_pmullb_128.c | 8 ++-- .../sve2-intrinsics/acle_sve2_pmullt_128.c | 8 ++-- .../Driver/aarch64-implied-sme-features.c | 3 ++ .../Driver/aarch64-implied-sve-features.c | 9 +++-- .../print-supported-extensions-aarch64.c | 7 ++-- .../Preprocessor/aarch64-target-features.c | 14 ++++++- .../acle_sve2_aes_bitperm_sha3_sm4.cpp | 32 +++++++-------- llvm/lib/Target/AArch64/AArch64.td | 2 +- llvm/lib/Target/AArch64/AArch64Features.td | 11 ++++-- llvm/lib/Target/AArch64/AArch64InstrInfo.td | 4 +- .../lib/Target/AArch64/AArch64SVEInstrInfo.td | 4 +- .../AArch64/AsmParser/AArch64AsmParser.cpp | 3 +- llvm/lib/TargetParser/AArch64TargetParser.cpp | 7 ++++ .../CodeGen/AArch64/sve2-intrinsics-crypto.ll | 1 + llvm/test/MC/AArch64/SVE2/aesd.s | 4 +- llvm/test/MC/AArch64/SVE2/aese.s | 4 +- llvm/test/MC/AArch64/SVE2/aesimc.s | 6 ++- llvm/test/MC/AArch64/SVE2/aesmc.s | 6 ++- .../MC/AArch64/SVE2/directive-arch-negative.s | 11 ++++-- llvm/test/MC/AArch64/SVE2/directive-arch.s | 4 ++ .../SVE2/directive-arch_extension-negative.s | 9 ++++- .../AArch64/SVE2/directive-arch_extension.s | 4 ++ .../MC/AArch64/SVE2/directive-cpu-negative.s | 11 ++++-- llvm/test/MC/AArch64/SVE2/directive-cpu.s | 4 ++ llvm/test/MC/AArch64/SVE2/pmullb-128.s | 4 +- llvm/test/MC/AArch64/SVE2/pmullt-128.s | 4 +- .../TargetParser/TargetParserTest.cpp | 39 ++++++++++++++----- 35 files changed, 181 insertions(+), 90 deletions(-) diff --git a/clang/include/clang/Basic/arm_sve.td b/clang/include/clang/Basic/arm_sve.td index 1f74e11ab062315..d492fae4145b921 100644 --- a/clang/include/clang/Basic/arm_sve.td +++ b/clang/include/clang/Basic/arm_sve.td @@ -1964,7 +1964,7 @@ let SVETargetGuard = "sve2,lut,bf16", SMETargetGuard = "sme2,lut,bf16" in { //////////////////////////////////////////////////////////////////////////////// // SVE2 - Optional -let SVETargetGuard = "sve2-aes", SMETargetGuard = InvalidMode in { +let SVETargetGuard = "sve2,sve-aes", SMETargetGuard = InvalidMode in { def SVAESD : SInst<"svaesd[_{d}]", "ddd", "Uc", MergeNone, "aarch64_sve_aesd", [IsOverloadNone]>; def SVAESIMC : SInst<"svaesimc[_{d}]", "dd", "Uc", MergeNone, "aarch64_sve_aesimc", [IsOverloadNone]>; def SVAESE : SInst<"svaese[_{d}]", "ddd", "Uc", MergeNone, "aarch64_sve_aese", [IsOverloadNone]>; diff --git a/clang/lib/Basic/Targets/AArch64.cpp b/clang/lib/Basic/Targets/AArch64.cpp index 6355dc1ea0c3060..eb8a3ada0344827 100644 --- a/clang/lib/Basic/Targets/AArch64.cpp +++ b/clang/lib/Basic/Targets/AArch64.cpp @@ -473,7 +473,7 @@ void AArch64TargetInfo::getTargetDefines(const LangOptions &Opts, if (HasSVE2p1) Builder.defineMacro("__ARM_FEATURE_SVE2p1", "1"); - if (HasSVE2 && HasSVE2AES) + if (HasSVE2 && HasSVEAES) Builder.defineMacro("__ARM_FEATURE_SVE2_AES", "1"); if (HasSVE2 && HasSVE2BitPerm) @@ -769,7 +769,7 @@ bool AArch64TargetInfo::hasFeature(StringRef Feature) const { .Case("f32mm", FPU & SveMode && HasMatmulFP32) .Case("f64mm", FPU & SveMode && HasMatmulFP64) .Case("sve2", FPU & SveMode && HasSVE2) - .Case("sve2-pmull128", FPU & SveMode && HasSVE2AES) + .Case("sve-aes", HasSVEAES) .Case("sve2-bitperm", FPU & SveMode && HasSVE2BitPerm) .Case("sve2-sha3", FPU & SveMode && HasSVE2SHA3) .Case("sve2-sm4", FPU & SveMode && HasSVE2SM4) @@ -861,12 +861,10 @@ bool AArch64TargetInfo::handleTargetFeatures(std::vector &Features, HasSVE2 = true; HasSVE2p1 = true; } - if (Feature == "+sve2-aes") { + if (Feature == "+sve-aes") { FPU |= NeonMode; - FPU |= SveMode; HasFullFP16 = true; - HasSVE2 = true; - HasSVE2AES = true; + HasSVEAES = true; } if (Feature == "+sve2-sha3") { FPU |= NeonMode; diff --git a/clang/lib/Basic/Targets/AArch64.h b/clang/lib/Basic/Targets/AArch64.h index ea3e4015d842653..4c25bdb5bb16df0 100644 --- a/clang/lib/Basic/Targets/AArch64.h +++ b/clang/lib/Basic/Targets/AArch64.h @@ -78,7 +78,7 @@ class LLVM_LIBRARY_VISIBILITY AArch64TargetInfo : public TargetInfo { bool HasBFloat16 = false; bool HasSVE2 = false; bool HasSVE2p1 = false; - bool HasSVE2AES = false; + bool HasSVEAES = false; bool HasSVE2SHA3 = false; bool HasSVE2SM4 = false; bool HasSVEB16B16 = false; diff --git a/clang/test/CodeGen/AArch64/fmv-dependencies.c b/clang/test/CodeGen/AArch64/fmv-dependencies.c index ffed3df3cb01153..f74b7aa32c7dcaf 100644 --- a/clang/test/CodeGen/AArch64/fmv-dependencies.c +++ b/clang/test/CodeGen/AArch64/fmv-dependencies.c @@ -190,7 +190,7 @@ int caller() { // CHECK: attributes #[[ssbs]] = { {{.*}} "target-features"="+fmv,+fp-armv8,+neon,+outline-atomics,+ssbs,+v8a" // CHECK: attributes #[[sve]] = { {{.*}} "target-features"="+fmv,+fp-armv8,+fullfp16,+neon,+outline-atomics,+sve,+v8a" // CHECK: attributes #[[sve2]] = { {{.*}} "target-features"="+fmv,+fp-armv8,+fullfp16,+neon,+outline-atomics,+sve,+sve2,+v8a" -// CHECK: attributes #[[sve2_aes]] = { {{.*}} "target-features"="+aes,+fmv,+fp-armv8,+fullfp16,+neon,+outline-atomics,+sve,+sve2,+sve2-aes,+v8a" +// CHECK: attributes #[[sve2_aes]] = { {{.*}} "target-features"="+aes,+fmv,+fp-armv8,+fullfp16,+neon,+outline-atomics,+sve,+sve-aes,+sve2,+sve2-aes,+v8a" // CHECK: attributes #[[sve2_bitperm]] = { {{.*}} "target-features"="+fmv,+fp-armv8,+fullfp16,+neon,+outline-atomics,+sve,+sve2,+sve2-bitperm,+v8a" // CHECK: attributes #[[sve2_sha3]] = { {{.*}} "target-features"="+fmv,+fp-armv8,+fullfp16,+neon,+outline-atomics,+sha2,+sha3,+sve,+sve2,+sve2-sha3,+v8a" // CHECK: attributes #[[sve2_sm4]] = { {{.*}} "target-features"="+fmv,+fp-armv8,+fullfp16,+neon,+outline-atomics,+sm4,+sve,+sve2,+sve2-sm4,+v8a" diff --git a/clang/test/CodeGen/AArch64/sve2-intrinsics/acle_sve2_aesd.c b/clang/test/CodeGen/AArch64/sve2-intrinsics/acle_sve2_aesd.c index 5ea27aa3b768c5a..0839b32fecb78ea 100644 --- a/clang/test/CodeGen/AArch64/sve2-intrinsics/acle_sve2_aesd.c +++ b/clang/test/CodeGen/AArch64/sve2-intrinsics/acle_sve2_aesd.c @@ -1,8 +1,8 @@ // NOTE: Assertions have been autogenerated by utils/update_cc_test_checks.py -// RUN: %clang_cc1 -fclang-abi-compat=latest -triple aarch64 -target-feature +sve -target-feature +sve2 -target-feature +sve2-aes -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s -// RUN: %clang_cc1 -fclang-abi-compat=latest -triple aarch64 -target-feature +sve -target-feature +sve2 -target-feature +sve2-aes -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s -check-prefix=CPP-CHECK -// RUN: %clang_cc1 -fclang-abi-compat=latest -DSVE_OVERLOADED_FORMS -triple aarch64 -target-feature +sve -target-feature +sve2 -target-feature +sve2-aes -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s -// RUN: %clang_cc1 -fclang-abi-compat=latest -DSVE_OVERLOADED_FORMS -triple aarch64 -target-feature +sve -target-feature +sve2 -target-feature +sve2-aes -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s -check-prefix=CPP-CHECK +// RUN: %clang_cc1 -fclang-abi-compat=latest -triple aarch64 -target-feature +sve -target-feature +sve2 -target-feature +sve-aes -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s +// RUN: %clang_cc1 -fclang-abi-compat=latest -triple aarch64 -target-feature +sve -target-feature +sve2 -target-feature +sve-aes -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s -check-prefix=CPP-CHECK +// RUN: %clang_cc1 -fclang-abi-compat=latest -DSVE_OVERLOADED_FORMS -triple aarch64 -target-feature +sve -target-feature +sve2 -target-feature +sve-aes -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s +// RUN: %clang_cc1 -fclang-abi-compat=latest -DSVE_OVERLOADED_FORMS -triple aarch64 -target-feature +sve -target-feature +sve2 -target-feature +sve-aes -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s -check-prefix=CPP-CHECK // REQUIRES: aarch64-registered-target diff --git a/clang/test/CodeGen/AArch64/sve2-intrinsics/acle_sve2_aese.c b/clang/test/CodeGen/AArch64/sve2-intrinsics/acle_sve2_aese.c index 9442d14de83633b..08ca748c96fe76b 100644 --- a/clang/test/CodeGen/AArch64/sve2-intrinsics/acle_sve2_aese.c +++ b/clang/test/CodeGen/AArch64/sve2-intrinsics/acle_sve2_aese.c @@ -1,8 +1,8 @@ // NOTE: Assertions have been autogenerated by utils/update_cc_test_checks.py -// RUN: %clang_cc1 -fclang-abi-compat=latest -triple aarch64 -target-feature +sve -target-feature +sve2 -target-feature +sve2-aes -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s -// RUN: %clang_cc1 -fclang-abi-compat=latest -triple aarch64 -target-feature +sve -target-feature +sve2 -target-feature +sve2-aes -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s -check-prefix=CPP-CHECK -// RUN: %clang_cc1 -fclang-abi-compat=latest -DSVE_OVERLOADED_FORMS -triple aarch64 -target-feature +sve -target-feature +sve2 -target-feature +sve2-aes -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s -// RUN: %clang_cc1 -fclang-abi-compat=latest -DSVE_OVERLOADED_FORMS -triple aarch64 -target-feature +sve -target-feature +sve2 -target-feature +sve2-aes -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s -check-prefix=CPP-CHECK +// RUN: %clang_cc1 -fclang-abi-compat=latest -triple aarch64 -target-feature +sve -target-feature +sve2 -target-feature +sve-aes -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s +// RUN: %clang_cc1 -fclang-abi-compat=latest -triple aarch64 -target-feature +sve -target-feature +sve2 -target-feature +sve-aes -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s -check-prefix=CPP-CHECK +// RUN: %clang_cc1 -fclang-abi-compat=latest -DSVE_OVERLOADED_FORMS -triple aarch64 -target-feature +sve -target-feature +sve2 -target-feature +sve-aes -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s +// RUN: %clang_cc1 -fclang-abi-compat=latest -DSVE_OVERLOADED_FORMS -triple aarch64 -target-feature +sve -target-feature +sve2 -target-feature +sve-aes -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s -check-prefix=CPP-CHECK // REQUIRES: aarch64-registered-target diff --git a/clang/test/CodeGen/AArch64/sve2-intrinsics/acle_sve2_aesimc.c b/clang/test/CodeGen/AArch64/sve2-intrinsics/acle_sve2_aesimc.c index 23f838c5bb30ec9..78d3debad4b34aa 100644 --- a/clang/test/CodeGen/AArch64/sve2-intrinsics/acle_sve2_aesimc.c +++ b/clang/test/CodeGen/AArch64/sve2-intrinsics/acle_sve2_aesimc.c @@ -1,8 +1,8 @@ // NOTE: Assertions have been autogenerated by utils/update_cc_test_checks.py -// RUN: %clang_cc1 -triple aarch64 -target-feature +sve -target-feature +sve2 -target-feature +sve2-aes -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s -// RUN: %clang_cc1 -triple aarch64 -target-feature +sve -target-feature +sve2 -target-feature +sve2-aes -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s -check-prefix=CPP-CHECK -// RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64 -target-feature +sve -target-feature +sve2 -target-feature +sve2-aes -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s -// RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64 -target-feature +sve -target-feature +sve2 -target-feature +sve2-aes -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s -check-prefix=CPP-CHECK +// RUN: %clang_cc1 -triple aarch64 -target-feature +sve -target-feature +sve2 -target-feature +sve-aes -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s +// RUN: %clang_cc1 -triple aarch64 -target-feature +sve -target-feature +sve2 -target-feature +sve-aes -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s -check-prefix=CPP-CHECK +// RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64 -target-feature +sve -target-feature +sve2 -target-feature +sve-aes -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s +// RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64 -target-feature +sve -target-feature +sve2 -target-feature +sve-aes -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s -check-prefix=CPP-CHECK // REQUIRES: aarch64-registered-target diff --git a/clang/test/CodeGen/AArch64/sve2-intrinsics/acle_sve2_aesmc.c b/clang/test/CodeGen/AArch64/sve2-intrinsics/acle_sve2_aesmc.c index 575c09c325f78f5..48d130174788ac5 100644 --- a/clang/test/CodeGen/AArch64/sve2-intrinsics/acle_sve2_aesmc.c +++ b/clang/test/CodeGen/AArch64/sve2-intrinsics/acle_sve2_aesmc.c @@ -1,8 +1,8 @@ // NOTE: Assertions have been autogenerated by utils/update_cc_test_checks.py -// RUN: %clang_cc1 -triple aarch64 -target-feature +sve -target-feature +sve2 -target-feature +sve2-aes -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s -// RUN: %clang_cc1 -triple aarch64 -target-feature +sve -target-feature +sve2 -target-feature +sve2-aes -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s -check-prefix=CPP-CHECK -// RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64 -target-feature +sve -target-feature +sve2 -target-feature +sve2-aes -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s -// RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64 -target-feature +sve -target-feature +sve2 -target-feature +sve2-aes -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s -check-prefix=CPP-CHECK +// RUN: %clang_cc1 -triple aarch64 -target-feature +sve -target-feature +sve2 -target-feature +sve-aes -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s +// RUN: %clang_cc1 -triple aarch64 -target-feature +sve -target-feature +sve2 -target-feature +sve-aes -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s -check-prefix=CPP-CHECK +// RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64 -target-feature +sve -target-feature +sve2 -target-feature +sve-aes -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s +// RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64 -target-feature +sve -target-feature +sve2 -target-feature +sve-aes -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s -check-prefix=CPP-CHECK // REQUIRES: aarch64-registered-target diff --git a/clang/test/CodeGen/AArch64/sve2-intrinsics/acle_sve2_pmullb_128.c b/clang/test/CodeGen/AArch64/sve2-intrinsics/acle_sve2_pmullb_128.c index a4935d8dadd542c..09583f98393a35f 100644 --- a/clang/test/CodeGen/AArch64/sve2-intrinsics/acle_sve2_pmullb_128.c +++ b/clang/test/CodeGen/AArch64/sve2-intrinsics/acle_sve2_pmullb_128.c @@ -1,10 +1,10 @@ // NOTE: Assertions have been autogenerated by utils/update_cc_test_checks.py // REQUIRES: aarch64-registered-target -// RUN: %clang_cc1 -fclang-abi-compat=latest -triple aarch64 -target-feature +sve -target-feature +sve2 -target-feature +sve2-aes -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s -// RUN: %clang_cc1 -fclang-abi-compat=latest -triple aarch64 -target-feature +sve -target-feature +sve2 -target-feature +sve2-aes -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s -check-prefix=CPP-CHECK -// RUN: %clang_cc1 -fclang-abi-compat=latest -DSVE_OVERLOADED_FORMS -triple aarch64 -target-feature +sve -target-feature +sve2 -target-feature +sve2-aes -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s -// RUN: %clang_cc1 -fclang-abi-compat=latest -DSVE_OVERLOADED_FORMS -triple aarch64 -target-feature +sve -target-feature +sve2 -target-feature +sve2-aes -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s -check-prefix=CPP-CHECK +// RUN: %clang_cc1 -fclang-abi-compat=latest -triple aarch64 -target-feature +sve -target-feature +sve2 -target-feature +sve-aes -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s +// RUN: %clang_cc1 -fclang-abi-compat=latest -triple aarch64 -target-feature +sve -target-feature +sve2 -target-feature +sve-aes -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s -check-prefix=CPP-CHECK +// RUN: %clang_cc1 -fclang-abi-compat=latest -DSVE_OVERLOADED_FORMS -triple aarch64 -target-feature +sve -target-feature +sve2 -target-feature +sve-aes -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s +// RUN: %clang_cc1 -fclang-abi-compat=latest -DSVE_OVERLOADED_FORMS -triple aarch64 -target-feature +sve -target-feature +sve2 -target-feature +sve-aes -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s -check-prefix=CPP-CHECK #include diff --git a/clang/test/CodeGen/AArch64/sve2-intrinsics/acle_sve2_pmullt_128.c b/clang/test/CodeGen/AArch64/sve2-intrinsics/acle_sve2_pmullt_128.c index a712a4f847f427a..a4ffc3165ec8b1f 100644 --- a/clang/test/CodeGen/AArch64/sve2-intrinsics/acle_sve2_pmullt_128.c +++ b/clang/test/CodeGen/AArch64/sve2-intrinsics/acle_sve2_pmullt_128.c @@ -1,10 +1,10 @@ // NOTE: Assertions have been autogenerated by utils/update_cc_test_checks.py // REQUIRES: aarch64-registered-target -// RUN: %clang_cc1 -fclang-abi-compat=latest -triple aarch64 -target-feature +sve -target-feature +sve2 -target-feature +sve2-aes -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s -// RUN: %clang_cc1 -fclang-abi-compat=latest -triple aarch64 -target-feature +sve -target-feature +sve2 -target-feature +sve2-aes -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s -check-prefix=CPP-CHECK -// RUN: %clang_cc1 -fclang-abi-compat=latest -DSVE_OVERLOADED_FORMS -triple aarch64 -target-feature +sve -target-feature +sve2 -target-feature +sve2-aes -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s -// RUN: %clang_cc1 -fclang-abi-compat=latest -DSVE_OVERLOADED_FORMS -triple aarch64 -target-feature +sve -target-feature +sve2 -target-feature +sve2-aes -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s -check-prefix=CPP-CHECK +// RUN: %clang_cc1 -fclang-abi-compat=latest -triple aarch64 -target-feature +sve -target-feature +sve2 -target-feature +sve-aes -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s +// RUN: %clang_cc1 -fclang-abi-compat=latest -triple aarch64 -target-feature +sve -target-feature +sve2 -target-feature +sve-aes -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s -check-prefix=CPP-CHECK +// RUN: %clang_cc1 -fclang-abi-compat=latest -DSVE_OVERLOADED_FORMS -triple aarch64 -target-feature +sve -target-feature +sve2 -target-feature +sve-aes -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s +// RUN: %clang_cc1 -fclang-abi-compat=latest -DSVE_OVERLOADED_FORMS -triple aarch64 -target-feature +sve -target-feature +sve2 -target-feature +sve-aes -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s -check-prefix=CPP-CHECK #include diff --git a/clang/test/Driver/aarch64-implied-sme-features.c b/clang/test/Driver/aarch64-implied-sme-features.c index eca62e2563b7883..4d507c0e99dd919 100644 --- a/clang/test/Driver/aarch64-implied-sme-features.c +++ b/clang/test/Driver/aarch64-implied-sme-features.c @@ -49,3 +49,6 @@ // RUN: %clang -target aarch64-linux-gnu -march=armv8-a+nosme+sme-i16i64 %s -### 2>&1 | FileCheck %s --check-prefix=SME-SUBFEATURE-CONFLICT-REV // SME-SUBFEATURE-CONFLICT-REV: "-target-feature" "+bf16"{{.*}} "-target-feature" "+sme" "-target-feature" "+sme-i16i64" + +// RUN: %clang --target=aarch64-linux-gnu -march=armv8-a+ssve-aes %s -### 2>&1 | FileCheck %s --check-prefix=SVE-AES +// SVE-AES: "-target-feature" "+sme" "-target-feature" "+sme2" "-target-feature" "+ssve-aes" "-target-feature" "+sve-aes" \ No newline at end of file diff --git a/clang/test/Driver/aarch64-implied-sve-features.c b/clang/test/Driver/aarch64-implied-sve-features.c index f04e1a785673b87..e5f1e553454143c 100644 --- a/clang/test/Driver/aarch64-implied-sve-features.c +++ b/clang/test/Driver/aarch64-implied-sve-features.c @@ -36,7 +36,7 @@ // SVE2-BITPERM-REVERT: "-target-feature" "+sve" "-target-feature" "+sve2" "-target-feature" "-sve2-bitperm" // RUN: %clang --target=aarch64-linux-gnu -march=armv8-a+sve2-aes+nosve2-aes %s -### 2>&1 | FileCheck %s --check-prefix=SVE2-AES-REVERT -// SVE2-AES-REVERT: "-target-feature" "+sve" "-target-feature" "+sve2" "-target-feature" "-sve2-aes" +// SVE2-AES-REVERT: "-target-feature" "+sve" "-target-feature" "-sve-aes" "-target-feature" "+sve2" "-target-feature" "-sve2-aes" // RUN: %clang --target=aarch64-linux-gnu -march=armv8-a+sve2-sha3+nosve2-sha3 %s -### 2>&1 | FileCheck %s --check-prefix=SVE2-SHA3-REVERT // SVE2-SHA3-REVERT: "-target-feature" "+sve" "-target-feature" "+sve2" "-target-feature" "-sve2-sha3" @@ -47,8 +47,11 @@ // RUN: %clang --target=aarch64-linux-gnu -march=armv8-a+sve2-sha3 %s -### 2>&1 | FileCheck %s --check-prefix=SVE2-SHA3 // SVE2-SHA3: "-target-feature" "+sve" "-target-feature" "+sve2" "-target-feature" "+sve2-sha3" +// RUN: %clang --target=aarch64-linux-gnu -march=armv8-a+sve-aes %s -### 2>&1 | FileCheck %s --check-prefix=SVE-AES +// SVE-AES: "-target-feature" "+aes"{{.*}} "-target-feature" "+sve-aes" + // RUN: %clang --target=aarch64-linux-gnu -march=armv8-a+sve2-aes %s -### 2>&1 | FileCheck %s --check-prefix=SVE2-AES -// SVE2-AES: "-target-feature" "+sve" "-target-feature" "+sve2" "-target-feature" "+sve2-aes" +// SVE2-AES: "-target-feature" "+sve" "-target-feature" "+sve-aes" "-target-feature" "+sve2" "-target-feature" "+sve2-aes" // RUN: %clang --target=aarch64-linux-gnu -march=armv8-a+sve2-sm4 %s -### 2>&1 | FileCheck %s --check-prefix=SVE2-SM4 // SVE2-SM4: "-target-feature" "+sve" "-target-feature" "+sve2" "-target-feature" "+sve2-sm4" @@ -66,7 +69,7 @@ // SVE-SUBFEATURE-CONFLICT-NOT: "-target-feature" "+sve" // RUN: %clang --target=aarch64-linux-gnu -march=armv8-a+nosve+sve2-aes %s -### 2>&1 | FileCheck %s --check-prefix=SVE-SUBFEATURE-CONFLICT-REV -// SVE-SUBFEATURE-CONFLICT-REV: "-target-feature" "+sve" "-target-feature" "+sve2" "-target-feature" "+sve2-aes" +// SVE-SUBFEATURE-CONFLICT-REV: "-target-feature" "+sve" "-target-feature" "+sve-aes" "-target-feature" "+sve2" "-target-feature" "+sve2-aes" // RUN: %clang --target=aarch64-linux-gnu -mcpu=neoverse-n2+nosve2 %s -### 2>&1 | FileCheck %s --check-prefix=SVE-MCPU-FEATURES // SVE-MCPU-FEATURES-NOT: "-target-feature" "+sve2-bitperm" diff --git a/clang/test/Driver/print-supported-extensions-aarch64.c b/clang/test/Driver/print-supported-extensions-aarch64.c index 03eacf99736f9e1..09d499548aa5655 100644 --- a/clang/test/Driver/print-supported-extensions-aarch64.c +++ b/clang/test/Driver/print-supported-extensions-aarch64.c @@ -77,17 +77,18 @@ // CHECK-NEXT: profile FEAT_SPE Enable Statistical Profiling extension // CHECK-NEXT: predres2 FEAT_SPECRES2 Enable Speculation Restriction Instruction // CHECK-NEXT: ssbs FEAT_SSBS, FEAT_SSBS2 Enable Speculative Store Bypass Safe bit -// CHECK-NEXT: ssve-aes FEAT_SSVE_AES Enable Armv9.6-A SVE2 AES support in streaming SVE mode +// CHECK-NEXT: ssve-aes FEAT_SSVE_AES Enable Armv9.6-A SVE AES support in streaming SVE mode // CHECK-NEXT: ssve-fp8dot2 FEAT_SSVE_FP8DOT2 Enable SVE2 FP8 2-way dot product instructions // CHECK-NEXT: ssve-fp8dot4 FEAT_SSVE_FP8DOT4 Enable SVE2 FP8 4-way dot product instructions // CHECK-NEXT: ssve-fp8fma FEAT_SSVE_FP8FMA Enable SVE2 FP8 multiply-add instructions // CHECK-NEXT: sve FEAT_SVE Enable Scalable Vector Extension (SVE) instructions -// CHECK-NEXT: sve-aes2 FEAT_SVE_AES2 Enable Armv9.6-A SVE multi-vector AES and 128-bit PMULL instructions +// CHECK-NEXT: sve-aes FEAT_SVE_AES, FEAT_SVE_PMULL128 Enable SVE AES and quadword SVE polynomial multiply instructions +// CHECK-NEXT: sve-aes2 FEAT_SVE_AES2 Enable Armv9.6-A SVE multi-vector AES and multi-vector quadword polynomial multiply instructions // CHECK-NEXT: sve-b16b16 FEAT_SVE_B16B16 Enable SVE2 non-widening and SME2 Z-targeting non-widening BFloat16 instructions // CHECK-NEXT: sve-bfscale FEAT_SVE_BFSCALE Enable Armv9.6-A SVE BFloat16 scaling instructions // CHECK-NEXT: sve-f16f32mm FEAT_SVE_F16F32MM Enable Armv9.6-A FP16 to FP32 Matrix Multiply // CHECK-NEXT: sve2 FEAT_SVE2 Enable Scalable Vector Extension 2 (SVE2) instructions -// CHECK-NEXT: sve2-aes FEAT_SVE_AES, FEAT_SVE_PMULL128 Enable AES SVE2 instructions +// CHECK-NEXT: sve2-aes Shorthand for +sve2+sve-aes // CHECK-NEXT: sve2-bitperm FEAT_SVE_BitPerm Enable bit permutation SVE2 instructions // CHECK-NEXT: sve2-sha3 FEAT_SVE_SHA3 Enable SHA3 SVE2 instructions // CHECK-NEXT: sve2-sm4 FEAT_SVE_SM4 Enable SM4 SVE2 instructions diff --git a/clang/test/Preprocessor/aarch64-target-features.c b/clang/test/Preprocessor/aarch64-target-features.c index 283d8bf021092da..037a3e186ee5597 100644 --- a/clang/test/Preprocessor/aarch64-target-features.c +++ b/clang/test/Preprocessor/aarch64-target-features.c @@ -227,8 +227,20 @@ // CHECK-NONEON-NOT: __ARM_FEATURE_SVE 1 // CHECK-NONEON-NOT: __ARM_NEON 1 -// RUN: %clang -target aarch64-none-linux-gnu -march=armv9-a+sve2-aes -x c -E -dM %s -o - | FileCheck --check-prefix=CHECK-SVE2AES %s +// RUN: %clang -target aarch64-none-linux-gnu -march=armv9-a+sve-aes -x c -E -dM %s -o - | FileCheck --check-prefix=CHECK-SVEAES %s +// CHECK-SVEAES: __ARM_FEATURE_AES 1 + +// RUN: %clang -target aarch64-none-linux-gnu -march=armv8-a+sve2-aes -x c -E -dM %s -o - | FileCheck --check-prefix=CHECK-SVE2AES %s +// RUN: %clang -target aarch64-none-linux-gnu -march=armv8-a+sve-aes+sve2 -x c -E -dM %s -o - | FileCheck --check-prefix=CHECK-SVE2AES %s +// CHECK-SVE2AES: __ARM_FEATURE_AES 1 +// CHECK-SVE2AES: __ARM_FEATURE_SVE2 1 // CHECK-SVE2AES: __ARM_FEATURE_SVE2_AES 1 + +// RUN: %clang -target aarch64-none-linux-gnu -march=armv8-a+sve2-aes+nosve2-aes -x c -E -dM %s -o - | FileCheck --check-prefix=CHECK-SVE2AES-REV %s +// RUN: %clang -target aarch64-none-linux-gnu -march=armv8-a+sve2+sve-aes+nosve2-aes -x c -E -dM %s -o - | FileCheck --check-prefix=CHECK-SVE2AES-REV %s +// CHECK-SVE2AES-REV: __ARM_FEATURE_SVE2 1 +// CHECK-SVE2AES-REV-NOT: __ARM_FEATURE_SVE2_AES 1 + // RUN: %clang -target aarch64-none-linux-gnu -march=armv9-a+sve2-sha3 -x c -E -dM %s -o - | FileCheck --check-prefix=CHECK-SVE2SHA3 %s // CHECK-SVE2SHA3: __ARM_FEATURE_SVE2_SHA3 1 // RUN: %clang -target aarch64-none-linux-gnu -march=armv9-a+sve2-sm4 -x c -E -dM %s -o - | FileCheck --check-prefix=CHECK-SVE2SM4 %s diff --git a/clang/test/Sema/aarch64-sve2-intrinsics/acle_sve2_aes_bitperm_sha3_sm4.cpp b/clang/test/Sema/aarch64-sve2-intrinsics/acle_sve2_aes_bitperm_sha3_sm4.cpp index 795bb7605330342..93d4b0070169378 100644 --- a/clang/test/Sema/aarch64-sve2-intrinsics/acle_sve2_aes_bitperm_sha3_sm4.cpp +++ b/clang/test/Sema/aarch64-sve2-intrinsics/acle_sve2_aes_bitperm_sha3_sm4.cpp @@ -14,17 +14,17 @@ void test(uint8_t u8, uint16_t u16, uint32_t u32, uint64_t u64) { - // expected-error@+2 {{'svaesd_u8' needs target feature sve,sve2-aes}} - // overload-error@+1 {{'svaesd' needs target feature sve,sve2-aes}} + // expected-error@+2 {{'svaesd_u8' needs target feature sve,sve2,sve-aes}} + // overload-error@+1 {{'svaesd' needs target feature sve,sve2,sve-aes}} SVE_ACLE_FUNC(svaesd,_u8,,)(svundef_u8(), svundef_u8()); - // expected-error@+2 {{'svaese_u8' needs target feature sve,sve2-aes}} - // overload-error@+1 {{'svaese' needs target feature sve,sve2-aes}} + // expected-error@+2 {{'svaese_u8' needs target feature sve,sve2,sve-aes}} + // overload-error@+1 {{'svaese' needs target feature sve,sve2,sve-aes}} SVE_ACLE_FUNC(svaese,_u8,,)(svundef_u8(), svundef_u8()); - // expected-error@+2 {{'svaesimc_u8' needs target feature sve,sve2-aes}} - // overload-error@+1 {{'svaesimc' needs target feature sve,sve2-aes}} + // expected-error@+2 {{'svaesimc_u8' needs target feature sve,sve2,sve-aes}} + // overload-error@+1 {{'svaesimc' needs target feature sve,sve2,sve-aes}} SVE_ACLE_FUNC(svaesimc,_u8,,)(svundef_u8()); - // expected-error@+2 {{'svaesmc_u8' needs target feature sve,sve2-aes}} - // overload-error@+1 {{'svaesmc' needs target feature sve,sve2-aes}} + // expected-error@+2 {{'svaesmc_u8' needs target feature sve,sve2,sve-aes}} + // overload-error@+1 {{'svaesmc' needs target feature sve,sve2,sve-aes}} SVE_ACLE_FUNC(svaesmc,_u8,,)(svundef_u8()); // expected-error@+2 {{'svbdep_u8' needs target feature sve,sve2-bitperm}} // overload-error@+1 {{'svbdep' needs target feature sve,sve2-bitperm}} @@ -107,17 +107,17 @@ void test(uint8_t u8, uint16_t u16, uint32_t u32, uint64_t u64) // expected-error@+2 {{'svbgrp_n_u64' needs target feature sve,sve2-bitperm}} // overload-error@+1 {{'svbgrp' needs target feature sve,sve2-bitperm}} SVE_ACLE_FUNC(svbgrp,_n_u64,,)(svundef_u64(), u64); - // expected-error@+2 {{'svpmullb_pair_u64' needs target feature sve,sve2-aes}} - // overload-error@+1 {{'svpmullb_pair' needs target feature sve,sve2-aes}} + // expected-error@+2 {{'svpmullb_pair_u64' needs target feature sve,sve2,sve-aes}} + // overload-error@+1 {{'svpmullb_pair' needs target feature sve,sve2,sve-aes}} SVE_ACLE_FUNC(svpmullb_pair,_u64,,)(svundef_u64(), svundef_u64()); - // expected-error@+2 {{'svpmullb_pair_n_u64' needs target feature sve,sve2-aes}} - // overload-error@+1 {{'svpmullb_pair' needs target feature sve,sve2-aes}} + // expected-error@+2 {{'svpmullb_pair_n_u64' needs target feature sve,sve2,sve-aes}} + // overload-error@+1 {{'svpmullb_pair' needs target feature sve,sve2,sve-aes}} SVE_ACLE_FUNC(svpmullb_pair,_n_u64,,)(svundef_u64(), u64); - // expected-error@+2 {{'svpmullt_pair_u64' needs target feature sve,sve2-aes}} - // overload-error@+1 {{'svpmullt_pair' needs target feature sve,sve2-aes}} + // expected-error@+2 {{'svpmullt_pair_u64' needs target feature sve,sve2,sve-aes}} + // overload-error@+1 {{'svpmullt_pair' needs target feature sve,sve2,sve-aes}} SVE_ACLE_FUNC(svpmullt_pair,_u64,,)(svundef_u64(), svundef_u64()); - // expected-error@+2 {{'svpmullt_pair_n_u64' needs target feature sve,sve2-aes}} - // overload-error@+1 {{'svpmullt_pair' needs target feature sve,sve2-aes}} + // expected-error@+2 {{'svpmullt_pair_n_u64' needs target feature sve,sve2,sve-aes}} + // overload-error@+1 {{'svpmullt_pair' needs target feature sve,sve2,sve-aes}} SVE_ACLE_FUNC(svpmullt_pair,_n_u64,,)(svundef_u64(), u64); // expected-error@+2 {{'svrax1_u64' needs target feature sve,sve2-sha3}} // overload-error@+1 {{'svrax1' needs target feature sve,sve2-sha3}} diff --git a/llvm/lib/Target/AArch64/AArch64.td b/llvm/lib/Target/AArch64/AArch64.td index 6854cccaafa1d78..0d69bbeb50260f4 100644 --- a/llvm/lib/Target/AArch64/AArch64.td +++ b/llvm/lib/Target/AArch64/AArch64.td @@ -63,7 +63,7 @@ def SVE2p1Unsupported : AArch64Unsupported; def SVE2Unsupported : AArch64Unsupported { let F = !listconcat([HasSVE2, HasSVE2orSME, HasSVE2orSME2, HasSSVE_FP8FMA, HasSMEF8F16, - HasSMEF8F32, HasSVE2AES, HasSVE2SHA3, HasSVE2SM4, HasSVE2BitPerm, + HasSMEF8F32, HasSVEAES, HasSVE2SHA3, HasSVE2SM4, HasSVE2BitPerm, HasSVEB16B16], SVE2p1Unsupported.F); } diff --git a/llvm/lib/Target/AArch64/AArch64Features.td b/llvm/lib/Target/AArch64/AArch64Features.td index 95a3421c8a5651b..088de4328a198da 100644 --- a/llvm/lib/Target/AArch64/AArch64Features.td +++ b/llvm/lib/Target/AArch64/AArch64Features.td @@ -362,9 +362,12 @@ def FeatureSVE2 : ExtensionWithMArch<"sve2", "SVE2", "FEAT_SVE2", "Enable Scalable Vector Extension 2 (SVE2) instructions", [FeatureSVE]>; -def FeatureSVE2AES : ExtensionWithMArch<"sve2-aes", "SVE2AES", +def FeatureSVEAES : ExtensionWithMArch<"sve-aes", "SVEAES", "FEAT_SVE_AES, FEAT_SVE_PMULL128", - "Enable AES SVE2 instructions", [FeatureSVE2, FeatureAES]>; + "Enable SVE AES and quadword SVE polynomial multiply instructions", [FeatureAES]>; + +def FeatureAliasSVE2AES : ExtensionWithMArch<"sve2-aes", "SVE2AES", + "", "Shorthand for +sve2+sve-aes", [FeatureSVE2, FeatureSVEAES]>; def FeatureSVE2SM4 : ExtensionWithMArch<"sve2-sm4", "SVE2SM4", "FEAT_SVE_SM4", "Enable SM4 SVE2 instructions", [FeatureSVE2, FeatureSM4]>; @@ -535,13 +538,13 @@ def FeatureSME2p2: ExtensionWithMArch<"sme2p2", "SME2p2", "FEAT_SME2p2", "Enable Armv9.6-A Scalable Matrix Extension 2.2 instructions", [FeatureSME2p1]>; def FeatureSSVE_AES : ExtensionWithMArch<"ssve-aes", "SSVE_AES", "FEAT_SSVE_AES", - "Enable Armv9.6-A SVE2 AES support in streaming SVE mode", [FeatureSME2, FeatureSVE2AES]>; + "Enable Armv9.6-A SVE AES support in streaming SVE mode", [FeatureSME2, FeatureSVEAES]>; def FeatureSVE2p2 : ExtensionWithMArch<"sve2p2", "SVE2p2", "FEAT_SVE2p2", "Enable Armv9.6-A Scalable Vector Extension 2.2 instructions", [FeatureSVE2p1]>; def FeatureSVEAES2: ExtensionWithMArch<"sve-aes2", "SVE_AES2", "FEAT_SVE_AES2", - "Enable Armv9.6-A SVE multi-vector AES and 128-bit PMULL instructions">; + "Enable Armv9.6-A SVE multi-vector AES and multi-vector quadword polynomial multiply instructions">; def FeatureSVEBFSCALE: ExtensionWithMArch<"sve-bfscale", "SVE_BFSCALE", "FEAT_SVE_BFSCALE", "Enable Armv9.6-A SVE BFloat16 scaling instructions">; diff --git a/llvm/lib/Target/AArch64/AArch64InstrInfo.td b/llvm/lib/Target/AArch64/AArch64InstrInfo.td index ccb90e31f77a344..e4ad27d4bcfc008 100644 --- a/llvm/lib/Target/AArch64/AArch64InstrInfo.td +++ b/llvm/lib/Target/AArch64/AArch64InstrInfo.td @@ -149,8 +149,8 @@ def HasSVE2 : Predicate<"Subtarget->isSVEAvailable() && Subtarget->hasS AssemblerPredicateWithAll<(all_of FeatureSVE2), "sve2">; def HasSVE2p1 : Predicate<"Subtarget->isSVEAvailable() && Subtarget->hasSVE2p1()">, AssemblerPredicateWithAll<(all_of FeatureSVE2p1), "sve2p1">; -def HasSVE2AES : Predicate<"Subtarget->isSVEAvailable() && Subtarget->hasSVE2AES()">, - AssemblerPredicateWithAll<(all_of FeatureSVE2AES), "sve2-aes">; +def HasSVEAES : Predicate<"Subtarget->hasSVEAES()">, + AssemblerPredicateWithAll<(all_of FeatureSVEAES), "sve-aes">; def HasSVE2SM4 : Predicate<"Subtarget->isSVEAvailable() && Subtarget->hasSVE2SM4()">, AssemblerPredicateWithAll<(all_of FeatureSVE2SM4), "sve2-sm4">; def HasSVE2SHA3 : Predicate<"Subtarget->isSVEAvailable() && Subtarget->hasSVE2SHA3()">, diff --git a/llvm/lib/Target/AArch64/AArch64SVEInstrInfo.td b/llvm/lib/Target/AArch64/AArch64SVEInstrInfo.td index c10653e05841cde..4f146b3ee59e9ac 100644 --- a/llvm/lib/Target/AArch64/AArch64SVEInstrInfo.td +++ b/llvm/lib/Target/AArch64/AArch64SVEInstrInfo.td @@ -3906,7 +3906,7 @@ let Predicates = [HasSVE2orSME] in { defm WHILERW_PXX : sve2_int_while_rr<0b1, "whilerw", "int_aarch64_sve_whilerw">; } // End HasSVE2orSME -let Predicates = [HasSVE2AES] in { +let Predicates = [HasSVE2, HasSVEAES] in { // SVE2 crypto destructive binary operations defm AESE_ZZZ_B : sve2_crypto_des_bin_op<0b00, "aese", ZPR8, int_aarch64_sve_aese, nxv16i8>; defm AESD_ZZZ_B : sve2_crypto_des_bin_op<0b01, "aesd", ZPR8, int_aarch64_sve_aesd, nxv16i8>; @@ -3920,7 +3920,7 @@ let Predicates = [HasSVE2AES] in { // to NEON PMULL2 instruction. defm PMULLB_ZZZ_Q : sve2_wide_int_arith_pmul<0b00, 0b11010, "pmullb", int_aarch64_sve_pmullb_pair>; defm PMULLT_ZZZ_Q : sve2_wide_int_arith_pmul<0b00, 0b11011, "pmullt", int_aarch64_sve_pmullt_pair>; -} // End HasSVE2AES +} let Predicates = [HasSVE2SM4] in { // SVE2 crypto constructive binary operations diff --git a/llvm/lib/Target/AArch64/AsmParser/AArch64AsmParser.cpp b/llvm/lib/Target/AArch64/AsmParser/AArch64AsmParser.cpp index 712f6de52941c94..d8bd14f97980a3e 100644 --- a/llvm/lib/Target/AArch64/AsmParser/AArch64AsmParser.cpp +++ b/llvm/lib/Target/AArch64/AsmParser/AArch64AsmParser.cpp @@ -3738,7 +3738,8 @@ static const struct Extension { {"sve", {AArch64::FeatureSVE}}, {"sve-b16b16", {AArch64::FeatureSVEB16B16}}, {"sve2", {AArch64::FeatureSVE2}}, - {"sve2-aes", {AArch64::FeatureSVE2AES}}, + {"sve-aes", {AArch64::FeatureSVEAES}}, + {"sve2-aes", {AArch64::FeatureAliasSVE2AES, AArch64::FeatureSVEAES}}, {"sve2-sm4", {AArch64::FeatureSVE2SM4}}, {"sve2-sha3", {AArch64::FeatureSVE2SHA3}}, {"sve2-bitperm", {AArch64::FeatureSVE2BitPerm}}, diff --git a/llvm/lib/TargetParser/AArch64TargetParser.cpp b/llvm/lib/TargetParser/AArch64TargetParser.cpp index 9fc7201efac6e24..45ecc4f24c2afdf 100644 --- a/llvm/lib/TargetParser/AArch64TargetParser.cpp +++ b/llvm/lib/TargetParser/AArch64TargetParser.cpp @@ -253,6 +253,13 @@ void AArch64::ExtensionSet::disable(ArchExtKind E) { disable(AEK_SM4); } + // sve2-aes was historically associated with both FEAT_SVE2 and FEAT_SVE_AES, + // the latter is now associated with sve-aes and sve2-aes has become shorthand + // for +sve2+sve-aes. For backwards compatibility, when we disable sve2-aes we + // must also disable sve-aes. + if (E == AEK_SVE2AES) + disable(AEK_SVEAES); + if (!Enabled.test(E)) return; diff --git a/llvm/test/CodeGen/AArch64/sve2-intrinsics-crypto.ll b/llvm/test/CodeGen/AArch64/sve2-intrinsics-crypto.ll index 3bfaf6dddaef8ec..fe8271cdf054bf7 100644 --- a/llvm/test/CodeGen/AArch64/sve2-intrinsics-crypto.ll +++ b/llvm/test/CodeGen/AArch64/sve2-intrinsics-crypto.ll @@ -1,5 +1,6 @@ ; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py ; RUN: llc -mtriple=aarch64-linux-gnu -mattr=+sve2-aes,+sve2-sha3,+sve2-sm4 < %s | FileCheck %s +; RUN: llc -mtriple=aarch64-linux-gnu -mattr=+sve2,+sve-aes,+sve2-sha3,+sve2-sm4 < %s | FileCheck %s ; ; AESD diff --git a/llvm/test/MC/AArch64/SVE2/aesd.s b/llvm/test/MC/AArch64/SVE2/aesd.s index 44eb9b68fd44ee7..58491785189d302 100644 --- a/llvm/test/MC/AArch64/SVE2/aesd.s +++ b/llvm/test/MC/AArch64/SVE2/aesd.s @@ -1,5 +1,7 @@ // RUN: llvm-mc -triple=aarch64 -show-encoding -mattr=+sve2-aes < %s \ // RUN: | FileCheck %s --check-prefixes=CHECK-ENCODING,CHECK-INST +// RUN: llvm-mc -triple=aarch64 -show-encoding -mattr=+sve2,+sve-aes < %s \ +// RUN: | FileCheck %s --check-prefixes=CHECK-ENCODING,CHECK-INST // RUN: not llvm-mc -triple=aarch64 -show-encoding < %s 2>&1 \ // RUN: | FileCheck %s --check-prefix=CHECK-ERROR // RUN: not llvm-mc -triple=aarch64 -show-encoding -mattr=+sme < %s 2>&1 \ @@ -13,5 +15,5 @@ aesd z0.b, z0.b, z31.b // CHECK-INST: aesd z0.b, z0.b, z31.b // CHECK-ENCODING: [0xe0,0xe7,0x22,0x45] -// CHECK-ERROR: instruction requires: sve2-aes +// CHECK-ERROR: instruction requires: sve2 sve-aes // CHECK-UNKNOWN: 4522e7e0 diff --git a/llvm/test/MC/AArch64/SVE2/aese.s b/llvm/test/MC/AArch64/SVE2/aese.s index e64f2137ad39a59..e8d8a9dde66ad0a 100644 --- a/llvm/test/MC/AArch64/SVE2/aese.s +++ b/llvm/test/MC/AArch64/SVE2/aese.s @@ -1,5 +1,7 @@ // RUN: llvm-mc -triple=aarch64 -show-encoding -mattr=+sve2-aes < %s \ // RUN: | FileCheck %s --check-prefixes=CHECK-ENCODING,CHECK-INST +// RUN: llvm-mc -triple=aarch64 -show-encoding -mattr=+sve2,+sve-aes < %s \ +// RUN: | FileCheck %s --check-prefixes=CHECK-ENCODING,CHECK-INST // RUN: not llvm-mc -triple=aarch64 -show-encoding < %s 2>&1 \ // RUN: | FileCheck %s --check-prefix=CHECK-ERROR // RUN: not llvm-mc -triple=aarch64 -show-encoding -mattr=+sme < %s 2>&1 \ @@ -13,5 +15,5 @@ aese z0.b, z0.b, z31.b // CHECK-INST: aese z0.b, z0.b, z31.b // CHECK-ENCODING: [0xe0,0xe3,0x22,0x45] -// CHECK-ERROR: instruction requires: sve2-aes +// CHECK-ERROR: instruction requires: sve2 sve-aes // CHECK-UNKNOWN: 4522e3e0 diff --git a/llvm/test/MC/AArch64/SVE2/aesimc.s b/llvm/test/MC/AArch64/SVE2/aesimc.s index c868ed0badf49fc..e5f2f6294c54c0e 100644 --- a/llvm/test/MC/AArch64/SVE2/aesimc.s +++ b/llvm/test/MC/AArch64/SVE2/aesimc.s @@ -1,5 +1,7 @@ // RUN: llvm-mc -triple=aarch64 -show-encoding -mattr=+sve2-aes < %s \ // RUN: | FileCheck %s --check-prefixes=CHECK-ENCODING,CHECK-INST +// RUN: llvm-mc -triple=aarch64 -show-encoding -mattr=+sve2,+sve-aes < %s \ +// RUN: | FileCheck %s --check-prefixes=CHECK-ENCODING,CHECK-INST // RUN: not llvm-mc -triple=aarch64 -show-encoding < %s 2>&1 \ // RUN: | FileCheck %s --check-prefix=CHECK-ERROR // RUN: not llvm-mc -triple=aarch64 -show-encoding -mattr=+sme < %s 2>&1 \ @@ -13,11 +15,11 @@ aesimc z0.b, z0.b // CHECK-INST: aesimc z0.b, z0.b // CHECK-ENCODING: [0x00,0xe4,0x20,0x45] -// CHECK-ERROR: instruction requires: sve2-aes +// CHECK-ERROR: instruction requires: sve2 sve-aes // CHECK-UNKNOWN: 4520e400 aesimc z31.b, z31.b // CHECK-INST: aesimc z31.b, z31.b // CHECK-ENCODING: [0x1f,0xe4,0x20,0x45] -// CHECK-ERROR: instruction requires: sve2-aes +// CHECK-ERROR: instruction requires: sve2 sve-aes // CHECK-UNKNOWN: 4520e41f diff --git a/llvm/test/MC/AArch64/SVE2/aesmc.s b/llvm/test/MC/AArch64/SVE2/aesmc.s index e158d2b1e0b56e5..a77f56f31aedeee 100644 --- a/llvm/test/MC/AArch64/SVE2/aesmc.s +++ b/llvm/test/MC/AArch64/SVE2/aesmc.s @@ -1,5 +1,7 @@ // RUN: llvm-mc -triple=aarch64 -show-encoding -mattr=+sve2-aes < %s \ // RUN: | FileCheck %s --check-prefixes=CHECK-ENCODING,CHECK-INST +// RUN: llvm-mc -triple=aarch64 -show-encoding -mattr=+sve2,+sve-aes < %s \ +// RUN: | FileCheck %s --check-prefixes=CHECK-ENCODING,CHECK-INST // RUN: not llvm-mc -triple=aarch64 -show-encoding < %s 2>&1 \ // RUN: | FileCheck %s --check-prefix=CHECK-ERROR // RUN: not llvm-mc -triple=aarch64 -show-encoding -mattr=+sme < %s 2>&1 \ @@ -13,11 +15,11 @@ aesmc z0.b, z0.b // CHECK-INST: aesmc z0.b, z0.b // CHECK-ENCODING: [0x00,0xe0,0x20,0x45] -// CHECK-ERROR: instruction requires: sve2-aes +// CHECK-ERROR: instruction requires: sve2 sve-aes // CHECK-UNKNOWN: 4520e000 aesmc z31.b, z31.b // CHECK-INST: aesmc z31.b, z31.b // CHECK-ENCODING: [0x1f,0xe0,0x20,0x45] -// CHECK-ERROR: instruction requires: sve2-aes +// CHECK-ERROR: instruction requires: sve2 sve-aes // CHECK-UNKNOWN: 4520e01f diff --git a/llvm/test/MC/AArch64/SVE2/directive-arch-negative.s b/llvm/test/MC/AArch64/SVE2/directive-arch-negative.s index 966bead071fe395..090d8af85825a3d 100644 --- a/llvm/test/MC/AArch64/SVE2/directive-arch-negative.s +++ b/llvm/test/MC/AArch64/SVE2/directive-arch-negative.s @@ -6,10 +6,15 @@ tbx z0.b, z1.b, z2.b // CHECK: error: instruction requires: sve2 or sme // CHECK-NEXT: tbx z0.b, z1.b, z2.b -.arch armv9-a+sve2-aes -.arch armv9-a+nosve2-aes +.arch armv9-a+sve-aes+nosve-aes aesd z23.b, z23.b, z13.b -// CHECK: error: instruction requires: sve2-aes +// CHECK: error: instruction requires: sve-aes +// CHECK-NEXT: aesd z23.b, z23.b, z13.b + +// nosve2-aes should disable sve-aes but not sve2. +.arch armv9-a+sve2-aes+nosve2-aes +aesd z23.b, z23.b, z13.b +// CHECK: error: instruction requires: sve-aes // CHECK-NEXT: aesd z23.b, z23.b, z13.b .arch armv9-a+sve2-sm4 diff --git a/llvm/test/MC/AArch64/SVE2/directive-arch.s b/llvm/test/MC/AArch64/SVE2/directive-arch.s index 99f6198a60abbcd..1319a8a186971cd 100644 --- a/llvm/test/MC/AArch64/SVE2/directive-arch.s +++ b/llvm/test/MC/AArch64/SVE2/directive-arch.s @@ -4,6 +4,10 @@ tbx z0.b, z1.b, z2.b // CHECK: tbx z0.b, z1.b, z2.b +.arch armv9-a+sve-aes +aesd z23.b, z23.b, z13.b +// CHECK: aesd z23.b, z23.b, z13.b + .arch armv9-a+sve2-aes aesd z23.b, z23.b, z13.b // CHECK: aesd z23.b, z23.b, z13.b diff --git a/llvm/test/MC/AArch64/SVE2/directive-arch_extension-negative.s b/llvm/test/MC/AArch64/SVE2/directive-arch_extension-negative.s index e967f5aa60bd738..fbe84d0c95a4350 100644 --- a/llvm/test/MC/AArch64/SVE2/directive-arch_extension-negative.s +++ b/llvm/test/MC/AArch64/SVE2/directive-arch_extension-negative.s @@ -6,10 +6,17 @@ tbx z0.b, z1.b, z2.b // CHECK: error: instruction requires: sve2 or sme // CHECK-NEXT: tbx z0.b, z1.b, z2.b +.arch_extension sve-aes +.arch_extension nosve-aes +aesd z23.b, z23.b, z13.b +// CHECK: error: instruction requires: sve2 sve-aes +// CHECK-NEXT: aesd z23.b, z23.b, z13.b + +// nosve2-aes should disable sve-aes but not sve2. .arch_extension sve2-aes .arch_extension nosve2-aes aesd z23.b, z23.b, z13.b -// CHECK: error: instruction requires: sve2-aes +// CHECK: error: instruction requires: sve-aes // CHECK-NEXT: aesd z23.b, z23.b, z13.b .arch_extension sve2-sm4 diff --git a/llvm/test/MC/AArch64/SVE2/directive-arch_extension.s b/llvm/test/MC/AArch64/SVE2/directive-arch_extension.s index 2fdbb525464d90f..ce56127ca93b1c2 100644 --- a/llvm/test/MC/AArch64/SVE2/directive-arch_extension.s +++ b/llvm/test/MC/AArch64/SVE2/directive-arch_extension.s @@ -4,6 +4,10 @@ tbx z0.b, z1.b, z2.b // CHECK: tbx z0.b, z1.b, z2.b +.arch_extension sve-aes +aesd z23.b, z23.b, z13.b +// CHECK: aesd z23.b, z23.b, z13.b + .arch_extension sve2-aes aesd z23.b, z23.b, z13.b // CHECK: aesd z23.b, z23.b, z13.b diff --git a/llvm/test/MC/AArch64/SVE2/directive-cpu-negative.s b/llvm/test/MC/AArch64/SVE2/directive-cpu-negative.s index 9a8af638b703780..a0c52cf29682a30 100644 --- a/llvm/test/MC/AArch64/SVE2/directive-cpu-negative.s +++ b/llvm/test/MC/AArch64/SVE2/directive-cpu-negative.s @@ -6,10 +6,15 @@ tbx z0.b, z1.b, z2.b // CHECK: error: instruction requires: sve2 or sme // CHECK-NEXT: tbx z0.b, z1.b, z2.b -.cpu generic+sve2-aes -.cpu generic+nosve2-aes +// nosve2-aes should disable sve-aes but not sve2. +.cpu generic+sve2-aes+nosve2-aes aesd z23.b, z23.b, z13.b -// CHECK: error: instruction requires: sve2-aes +// CHECK: error: instruction requires: sve-aes +// CHECK-NEXT: aesd z23.b, z23.b, z13.b + +.cpu generic+sve-aes+nosve-aes +aesd z23.b, z23.b, z13.b +// CHECK: error: instruction requires: sve2 sve-aes // CHECK-NEXT: aesd z23.b, z23.b, z13.b .cpu generic+sve2-sm4 diff --git a/llvm/test/MC/AArch64/SVE2/directive-cpu.s b/llvm/test/MC/AArch64/SVE2/directive-cpu.s index daa5ec510b226ae..c54a3a9f272c3d0 100644 --- a/llvm/test/MC/AArch64/SVE2/directive-cpu.s +++ b/llvm/test/MC/AArch64/SVE2/directive-cpu.s @@ -8,6 +8,10 @@ tbx z0.b, z1.b, z2.b aesd z23.b, z23.b, z13.b // CHECK: aesd z23.b, z23.b, z13.b +.cpu generic+sve2+sve-aes +aesd z23.b, z23.b, z13.b +// CHECK: aesd z23.b, z23.b, z13.b + .cpu generic+sve2-sm4 sm4e z0.s, z0.s, z0.s // CHECK: sm4e z0.s, z0.s, z0.s diff --git a/llvm/test/MC/AArch64/SVE2/pmullb-128.s b/llvm/test/MC/AArch64/SVE2/pmullb-128.s index d48c75b3d499979..dd407addf52d770 100644 --- a/llvm/test/MC/AArch64/SVE2/pmullb-128.s +++ b/llvm/test/MC/AArch64/SVE2/pmullb-128.s @@ -1,5 +1,7 @@ // RUN: llvm-mc -triple=aarch64 -show-encoding -mattr=+sve2-aes < %s \ // RUN: | FileCheck %s --check-prefixes=CHECK-ENCODING,CHECK-INST +// RUN: llvm-mc -triple=aarch64 -show-encoding -mattr=+sve2,sve-aes < %s \ +// RUN: | FileCheck %s --check-prefixes=CHECK-ENCODING,CHECK-INST // RUN: not llvm-mc -triple=aarch64 -show-encoding < %s 2>&1 \ // RUN: | FileCheck %s --check-prefix=CHECK-ERROR // RUN: not llvm-mc -triple=aarch64 -show-encoding -mattr=+sme < %s 2>&1 \ @@ -13,5 +15,5 @@ pmullb z29.q, z30.d, z31.d // CHECK-INST: pmullb z29.q, z30.d, z31.d // CHECK-ENCODING: [0xdd,0x6b,0x1f,0x45] -// CHECK-ERROR: instruction requires: sve2-aes +// CHECK-ERROR: instruction requires: sve2 sve-aes // CHECK-UNKNOWN: 451f6bdd diff --git a/llvm/test/MC/AArch64/SVE2/pmullt-128.s b/llvm/test/MC/AArch64/SVE2/pmullt-128.s index e1eca8d1d89f807..42c4bd3feed8e70 100644 --- a/llvm/test/MC/AArch64/SVE2/pmullt-128.s +++ b/llvm/test/MC/AArch64/SVE2/pmullt-128.s @@ -1,5 +1,7 @@ // RUN: llvm-mc -triple=aarch64 -show-encoding -mattr=+sve2-aes < %s \ // RUN: | FileCheck %s --check-prefixes=CHECK-ENCODING,CHECK-INST +// RUN: llvm-mc -triple=aarch64 -show-encoding -mattr=+sve2,+sve-aes < %s \ +// RUN: | FileCheck %s --check-prefixes=CHECK-ENCODING,CHECK-INST // RUN: not llvm-mc -triple=aarch64 -show-encoding < %s 2>&1 \ // RUN: | FileCheck %s --check-prefix=CHECK-ERROR // RUN: not llvm-mc -triple=aarch64 -show-encoding -mattr=+sme < %s 2>&1 \ @@ -13,5 +15,5 @@ pmullt z29.q, z30.d, z31.d // CHECK-INST: pmullt z29.q, z30.d, z31.d // CHECK-ENCODING: [0xdd,0x6f,0x1f,0x45] -// CHECK-ERROR: instruction requires: sve2-aes +// CHECK-ERROR: instruction requires: sve2 sve-aes // CHECK-UNKNOWN: 451f6fdd diff --git a/llvm/unittests/TargetParser/TargetParserTest.cpp b/llvm/unittests/TargetParser/TargetParserTest.cpp index d69b2d6b13b1a6f..d281c2cbd55d35b 100644 --- a/llvm/unittests/TargetParser/TargetParserTest.cpp +++ b/llvm/unittests/TargetParser/TargetParserTest.cpp @@ -1334,7 +1334,7 @@ TEST(TargetParserTest, AArch64ExtensionFeatures) { AArch64::AEK_FPRCVT, AArch64::AEK_CMPBR, AArch64::AEK_LSUI, AArch64::AEK_OCCMO, AArch64::AEK_PCDPHINT, AArch64::AEK_POPS, - }; + AArch64::AEK_SVEAES}; std::vector Features; @@ -1369,6 +1369,7 @@ TEST(TargetParserTest, AArch64ExtensionFeatures) { EXPECT_TRUE(llvm::is_contained(Features, "+sve-bfscale")); EXPECT_TRUE(llvm::is_contained(Features, "+sve-f16f32mm")); EXPECT_TRUE(llvm::is_contained(Features, "+sve2")); + EXPECT_TRUE(llvm::is_contained(Features, "+sve-aes")); EXPECT_TRUE(llvm::is_contained(Features, "+sve2-aes")); EXPECT_TRUE(llvm::is_contained(Features, "+sve2-sm4")); EXPECT_TRUE(llvm::is_contained(Features, "+sve2-sha3")); @@ -1538,6 +1539,7 @@ TEST(TargetParserTest, AArch64ArchExtFeature) { {"sve-bfscale", "nosve-bfscale", "+sve-bfscale", "-sve-bfscale"}, {"sve-f16f32mm", "nosve-f16f32mm", "+sve-f16f32mm", "-sve-f16f32mm"}, {"sve2", "nosve2", "+sve2", "-sve2"}, + {"sve-aes", "nosve-aes", "+sve-aes", "-sve-aes"}, {"sve2-aes", "nosve2-aes", "+sve2-aes", "-sve2-aes"}, {"sve2-sm4", "nosve2-sm4", "+sve2-sm4", "-sve2-sm4"}, {"sve2-sha3", "nosve2-sha3", "+sve2-sha3", "-sve2-sha3"}, @@ -1840,7 +1842,11 @@ AArch64ExtensionDependenciesBaseArchTestParams {}, {"sve", "sve-f16f32mm"}}, - // sve2 -> {sve2p1, sve2-bitperm, sve2-sha3, sve2-sm4} + // aes -> {sve-aes} + {AArch64::ARMV8A, {"noaes", "sve-aes"}, {"aes", "sve-aes"}, {}}, + {AArch64::ARMV8A, {"sve-aes", "noaes"}, {}, {"aes", "sve-aes"}}, + + // sve2 -> {sve2p1, sve2-bitperm, sve2-sha3, sve2-sm4, sve2-aes} {AArch64::ARMV8A, {"nosve2", "sve2p1"}, {"sve2", "sve2p1"}, {}}, {AArch64::ARMV8A, {"sve2p1", "nosve2"}, {}, {"sve2", "sve2p1"}}, {AArch64::ARMV8A, @@ -1855,6 +1861,8 @@ AArch64ExtensionDependenciesBaseArchTestParams {AArch64::ARMV8A, {"sve2-sha3", "nosve2"}, {}, {"sve2", "sve2-sha3"}}, {AArch64::ARMV8A, {"nosve2", "sve2-sm4"}, {"sve2", "sve2-sm4"}, {}}, {AArch64::ARMV8A, {"sve2-sm4", "nosve2"}, {}, {"sve2", "sve2-sm4"}}, + {AArch64::ARMV8A, {"nosve2", "sve2-aes"}, {"sve2", "sve2-aes"}, {}}, + {AArch64::ARMV8A, {"sve2-aes", "nosve2"}, {}, {"sve2", "sve2-aes"}}, // sve-b16b16 -> {sme-b16b16} {AArch64::ARMV9_4A, @@ -1955,16 +1963,29 @@ AArch64ExtensionDependenciesBaseArchTestParams {AArch64::ARMV8A, {"norcpc", "rcpc3"}, {"rcpc", "rcpc3"}, {}}, {AArch64::ARMV8A, {"rcpc3", "norcpc"}, {}, {"rcpc", "rcpc3"}}, - // sve2-aes -> ssve-aes + // sve-aes -> {ssve-aes, sve2-aes} {AArch64::ARMV9_6A, - {"nosve2-aes", "ssve-aes"}, - {"sve2-aes", "ssve-aes"}, + {"nosve-aes", "ssve-aes"}, + {"sve-aes", "ssve-aes"}, {}}, {AArch64::ARMV9_6A, - {"ssve-aes", "nosve2-aes"}, + {"ssve-aes", "nosve-aes"}, {}, - {"ssve-aes", "sve2-aes"}}, -}; + {"ssve-aes", "sve-aes"}}, + {AArch64::ARMV9_6A, + {"nosve-aes", "sve2-aes"}, + {"sve2-aes", "sve-aes"}, + {}}, + {AArch64::ARMV9_6A, + {"sve2-aes", "nosve-aes"}, + {}, + {"sve2-aes", "sve-aes"}}, + + // -sve2-aes should disable sve-aes (only) + {AArch64::ARMV9_6A, + {"sve2", "sve-aes", "nosve2-aes"}, + {"sve2"}, + {"sve2-aes", "sve-aes"}}}; INSTANTIATE_TEST_SUITE_P( AArch64ExtensionDependenciesBaseArch, @@ -2003,4 +2024,4 @@ INSTANTIATE_TEST_SUITE_P( AArch64ExtensionDependenciesBaseCPUTestFixture, ::testing::ValuesIn(AArch64ExtensionDependenciesCPUData)); -} // namespace +} // namespace \ No newline at end of file