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SIDHp503 for x86-64: try implementing multiplication with shifted P #24

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kriskwiatkowski opened this issue Jul 4, 2019 · 1 comment

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@kriskwiatkowski
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kriskwiatkowski commented Jul 4, 2019

https://eprint.iacr.org/2018/700 (in 3.2) describes optimization in P503 which takes advantage of the fact that P503+1 can be reduced to 4, 64-bit words (shifting by 8-bits).

This can be also useful for x86 (maybe)
Optimization was introduced initially in a paper by J. Bos

@kriskwiatkowski
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kriskwiatkowski commented Jul 4, 2019

similar thing can be done to P751 (shift by 32 bits, to get P+1 on 6 words)

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