diff --git a/cpu/2.5.0+cpu/_sources/tutorials/examples.md.txt b/cpu/2.5.0+cpu/_sources/tutorials/examples.md.txt index 27a737e86..809d9046d 100644 --- a/cpu/2.5.0+cpu/_sources/tutorials/examples.md.txt +++ b/cpu/2.5.0+cpu/_sources/tutorials/examples.md.txt @@ -502,7 +502,7 @@ print("Execution finished") import torch from transformers import BertModel -model = BertModel.from_pretrained("bert-base-uncased") +model = BertModel.from_pretrained("bert-base-uncased", attn_implementation="eager") model.eval() vocab_size = model.config.vocab_size diff --git a/cpu/2.5.0+cpu/_sources/tutorials/features/fast_bert.md.txt b/cpu/2.5.0+cpu/_sources/tutorials/features/fast_bert.md.txt index d0621131f..848fd307d 100644 --- a/cpu/2.5.0+cpu/_sources/tutorials/features/fast_bert.md.txt +++ b/cpu/2.5.0+cpu/_sources/tutorials/features/fast_bert.md.txt @@ -9,7 +9,7 @@ Currently `ipex.fast_bert` API is only well optimized for training. For inferenc ### Prerequisite -- Transformers 4.6.0 ~ 4.43.2 +- Transformers 4.6.0 ~ 4.45.0 ### Usage Example @@ -20,7 +20,7 @@ An API `ipex.fast_bert` is provided for a simple usage. Usage of this API follow import torch from transformers import BertModel -model = BertModel.from_pretrained("bert-base-uncased") +model = BertModel.from_pretrained("bert-base-uncased", attn_implementation="eager") model.eval() vocab_size = model.config.vocab_size diff --git a/cpu/2.5.0+cpu/_sources/tutorials/getting_started.md.txt b/cpu/2.5.0+cpu/_sources/tutorials/getting_started.md.txt index 67874f6d4..ee11aabc7 100644 --- a/cpu/2.5.0+cpu/_sources/tutorials/getting_started.md.txt +++ b/cpu/2.5.0+cpu/_sources/tutorials/getting_started.md.txt @@ -1,6 +1,6 @@ # Quick Start -The following instructions assume you have installed the Intel® Extension for PyTorch\*. For installation instructions, refer to [Installation](../../../index.html#installation?platform=cpu&version=main). +The following instructions assume you have installed the Intel® Extension for PyTorch\*. For installation instructions, refer to [Installation](../../../index.html#installation?platform=cpu&version=v2.5.0%2Bcpu). To start using the Intel® Extension for PyTorch\* in your code, you need to make the following changes: @@ -64,7 +64,6 @@ In [Cheat Sheet](./cheat_sheet.md), you can find more commands that can help you `ipex.llm.optimize` is used for Large Language Models (LLM). - ```python import torch #################### code changes #################### @@ -157,4 +156,4 @@ with torch.inference_mode(), torch.cpu.amp.autocast(enabled=amp_enabled): print(gen_text, total_new_tokens, flush=True) ``` -More LLM examples, including usage of low precision data types are available in the [LLM Examples](https://github.com/intel/intel-extension-for-pytorch/tree/main/examples/cpu/llm) section. +More LLM examples, including usage of low precision data types are available in the [LLM Examples](https://github.com/intel/intel-extension-for-pytorch/tree/release/2.5/examples/cpu/llm) section. diff --git a/cpu/2.5.0+cpu/_sources/tutorials/installation.md.txt b/cpu/2.5.0+cpu/_sources/tutorials/installation.md.txt index 707a091db..567dd2d38 100644 --- a/cpu/2.5.0+cpu/_sources/tutorials/installation.md.txt +++ b/cpu/2.5.0+cpu/_sources/tutorials/installation.md.txt @@ -1,8 +1,8 @@ Installation ============ -Select your preferences and follow the installation instructions provided on the [Installation page](../../../index.html#installation?platform=cpu&version=v2.4.0%2Bcpu). +Select your preferences and follow the installation instructions provided on the [Installation page](../../../index.html#installation?platform=cpu&version=v2.5.0%2Bcpu). After successful installation, refer to the [Quick Start](getting_started.md) and [Examples](examples.md) sections to start using the extension in your code. -**NOTE:** For detailed instructions on installing and setting up the environment for Large Language Models (LLM), as well as example scripts, refer to the [LLM best practices](https://github.com/intel/intel-extension-for-pytorch/tree/v2.4.0%2Bcpu/examples/cpu/llm). +**NOTE:** For detailed instructions on installing and setting up the environment for Large Language Models (LLM), as well as example scripts, refer to the [LLM best practices](https://github.com/intel/intel-extension-for-pytorch/tree/v2.5.0%2Bcpu/examples/cpu/llm). diff --git a/cpu/2.5.0+cpu/_sources/tutorials/introduction.rst.txt b/cpu/2.5.0+cpu/_sources/tutorials/introduction.rst.txt index 8037db666..1c4309dfb 100644 --- a/cpu/2.5.0+cpu/_sources/tutorials/introduction.rst.txt +++ b/cpu/2.5.0+cpu/_sources/tutorials/introduction.rst.txt @@ -16,7 +16,7 @@ the `Large Language Models (LLM) `_ section. Get Started ----------- -- `Installation <../../../index.html#installation?platform=cpu&version=v2.4.0%2Bcpu>`_ +- `Installation <../../../index.html#installation?platform=cpu&version=v2.5.0%2Bcpu>`_ - `Quick Start `_ - `Examples `_ diff --git a/cpu/2.5.0+cpu/_sources/tutorials/releases.md.txt b/cpu/2.5.0+cpu/_sources/tutorials/releases.md.txt index 3ee67a92e..70c8fbed0 100644 --- a/cpu/2.5.0+cpu/_sources/tutorials/releases.md.txt +++ b/cpu/2.5.0+cpu/_sources/tutorials/releases.md.txt @@ -1,6 +1,33 @@ Releases ======== +## 2.5.0 + +We are excited to announce the release of Intel® Extension for PyTorch* 2.5.0+cpu which accompanies PyTorch 2.5. This release mainly brings you the support for Llama3.2, optimization on newly launched Intel® Xeon® 6 P-core platform, GPTQ/AWQ format support, and latest optimization to push better performance for LLM models. This release also includes a set of bug fixing and small optimizations. We want to sincerely thank our dedicated community for your contributions. As always, we encourage you to try this release and feedback as to improve further on this product. + +### Highlights + +* Llama 3.2 support + +Meta has newly released [Llama 3.2](https://ai.meta.com/blog/llama-3-2-connect-2024-vision-edge-mobile-devices/), which includes small and medium-sized vision LLMs (11B and 90B), and lightweight, text-only models (1B and 3B). Intel® Extension for PyTorch* provides [support of Llama 3.2](https://www.intel.com/content/www/us/en/developer/articles/technical/intel-ai-solutions-support-the-new-llama-3-2-model.html) since its launch date with early release version, and now support with this official release. + +* Optimization for Intel® Xeon® 6 +Intel® Xeon® 6 deliver new degrees of performance with more cores, a choice of microarchitecture, additional memory bandwidth, and exceptional input/output (I/O) across a range of workloads. Intel® Extension for PyTorch* provides dedicated optimization on this new processor family for features like Multiplexed Rank DIMM (MRDIMM), SNC=3 scenario, etc.. + +* Large Language Model (LLM) optimization: +Intel® Extension for PyTorch* provides more feature support of the weight only quantization including GPTQ/AWQ format support, symmetric quantization of activation and weight, and added chunked prefill/prefix prefill support in LLM module API, etc.. These features enable better adoption of community model weight and provides better performance for low-precision scenarios. This release also extended the optimized models to include newly published Llama 3.2 vision models. A full list of optimized models can be found at [LLM optimization](https://github.com/intel/intel-extension-for-pytorch/tree/v2.5.0+cpu/examples/cpu/llm/inference). + +* Bug fixing and other optimization + - Optimized the performance of the IndirectAccessKVCacheAttention kernel +[#3185](https://github.com/intel/intel-extension-for-pytorch/commit/8572e1faf97998783ea2a7fc6ee3094090feebc4) [#3209](https://github.com/intel/intel-extension-for-pytorch/commit/65e96630a2e17f7b762c5c765f10264ad08db098) [#3214](https://github.com/intel/intel-extension-for-pytorch/commit/a04214f7ab4e43648d75abdcf0fae53e5076be2b) [#3218](https://github.com/intel/intel-extension-for-pytorch/commit/f219012ab1babbc67c9b545fa7251cd981a2a3a2) [#3248](https://github.com/intel/intel-extension-for-pytorch/commit/9f6178eb028d36b3ed1f5985e57b7cf160acf38a) + - Fixed the Segmentation fault in the IndirectAccessKVCacheAttention kernel [#3246](https://github.com/intel/intel-extension-for-pytorch/commit/bee5ab644086c9b25eb61916c6773932c74667d3) + - Fixed the correctness issue in the PagedAttention kernel for Llama-68M-Chat-v1 [#3307](https://github.com/intel/intel-extension-for-pytorch/commit/638a7d26acb33af450ea9869b5b43ccdbe0e962b) + - Fixed the support in `ipex.llm.optimize` to ensure `model.generate` returns the correct output type when `return_dict_in_generate` is set to `True`. [#3333](https://github.com/intel/intel-extension-for-pytorch/commit/584a4e2e2c6193b926554f951d2608489cac5d7a) + - Optimized the performance of the Flash Attention kernel [#3291](https://github.com/intel/intel-extension-for-pytorch/commit/8fb43ec45ed93b62efef07f4b2e8dcd7dd502b8b) + - Upgraded oneDNN to v3.6 [#3305](https://github.com/intel/intel-extension-for-pytorch/commit/91639fa0812ee3c12c672002c2bf5cf1cac4bc0a) + +**Full Changelog**: https://github.com/intel/intel-extension-for-pytorch/compare/v2.4.0+cpu...v2.5.0+cpu + ## 2.4.0 We are excited to announce the release of Intel® Extension for PyTorch\* 2.4.0+cpu which accompanies PyTorch 2.4. This release mainly brings you the support for Llama3.1, basic support for LLM serving frameworks like vLLM/TGI, and a set of optimization to push better performance for LLM models. This release also extends the list of optimized LLM models to a broader level and includes a set of bug fixing and small optimizations. We want to sincerely thank our dedicated community for your contributions. As always, we encourage you to try this release and feedback as to improve further on this product. diff --git a/cpu/2.5.0+cpu/_static/htmls/tbl_deepspeed.html b/cpu/2.5.0+cpu/_static/htmls/tbl_deepspeed.html index 2751ef96a..15fc0edf3 100644 --- a/cpu/2.5.0+cpu/_static/htmls/tbl_deepspeed.html +++ b/cpu/2.5.0+cpu/_static/htmls/tbl_deepspeed.html @@ -44,6 +44,18 @@

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- -
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  • 🟩 signifies that the model can perform well and with good accuracy (<1% difference as compared with FP32).

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\ No newline at end of file + \ No newline at end of file diff --git a/cpu/2.5.0+cpu/design_doc/cpu/isa_dyndisp.html b/cpu/2.5.0+cpu/design_doc/cpu/isa_dyndisp.html index 7b6547cb6..69d9f100f 100644 --- a/cpu/2.5.0+cpu/design_doc/cpu/isa_dyndisp.html +++ b/cpu/2.5.0+cpu/design_doc/cpu/isa_dyndisp.html @@ -125,7 +125,7 @@

Intel® Extension for PyTorch* CPU ISA Dynamic Dispatch Design DocSphinx using a theme provided by Read the Docs. - +

© Intel Corporation. Intel, the Intel logo, and other Intel marks are trademarks of Intel Corporation or its subsidiaries. Other names and brands may be claimed as the property of others. No license (express or implied, by estoppel or otherwise) to any intellectual property rights is granted by this document, with the sole exception that code included in this document is licensed subject to the Zero-Clause BSD open source license (OBSD), http://opensource.org/licenses/0BSD.
diff --git a/cpu/2.5.0+cpu/genindex.html b/cpu/2.5.0+cpu/genindex.html index 2277ac96e..7d5f93d36 100644 --- a/cpu/2.5.0+cpu/genindex.html +++ b/cpu/2.5.0+cpu/genindex.html @@ -377,7 +377,7 @@

V

Built with Sphinx using a theme provided by Read the Docs. - +

© Intel Corporation. Intel, the Intel logo, and other Intel marks are trademarks of Intel Corporation or its subsidiaries. Other names and brands may be claimed as the property of others. No license (express or implied, by estoppel or otherwise) to any intellectual property rights is granted by this document, with the sole exception that code included in this document is licensed subject to the Zero-Clause BSD open source license (OBSD), http://opensource.org/licenses/0BSD.
diff --git a/cpu/2.5.0+cpu/index.html b/cpu/2.5.0+cpu/index.html index 5c8318428..4eb3badab 100644 --- a/cpu/2.5.0+cpu/index.html +++ b/cpu/2.5.0+cpu/index.html @@ -183,7 +183,7 @@

Support Built with Sphinx using a theme provided by Read the Docs. - +

© Intel Corporation. Intel, the Intel logo, and other Intel marks are trademarks of Intel Corporation or its subsidiaries. Other names and brands may be claimed as the property of others. No license (express or implied, by estoppel or otherwise) to any intellectual property rights is granted by this document, with the sole exception that code included in this document is licensed subject to the Zero-Clause BSD open source license (OBSD), http://opensource.org/licenses/0BSD.
diff --git a/cpu/2.5.0+cpu/py-modindex.html b/cpu/2.5.0+cpu/py-modindex.html index 8c9e02bb8..fff29e5f4 100644 --- a/cpu/2.5.0+cpu/py-modindex.html +++ b/cpu/2.5.0+cpu/py-modindex.html @@ -165,7 +165,7 @@

Python Module Index

Built with Sphinx using a theme provided by Read the Docs. - +

© Intel Corporation. Intel, the Intel logo, and other Intel marks are trademarks of Intel Corporation or its subsidiaries. Other names and brands may be claimed as the property of others. No license (express or implied, by estoppel or otherwise) to any intellectual property rights is granted by this document, with the sole exception that code included in this document is licensed subject to the Zero-Clause BSD open source license (OBSD), http://opensource.org/licenses/0BSD.
diff --git a/cpu/2.5.0+cpu/search.html b/cpu/2.5.0+cpu/search.html index abb60a5a0..c53598003 100644 --- a/cpu/2.5.0+cpu/search.html +++ b/cpu/2.5.0+cpu/search.html @@ -140,7 +140,7 @@ Built with Sphinx using a theme provided by Read the Docs. - +

© Intel Corporation. Intel, the Intel logo, and other Intel marks are trademarks of Intel Corporation or its subsidiaries. Other names and brands may be claimed as the property of others. No license (express or implied, by estoppel or otherwise) to any intellectual property rights is granted by this document, with the sole exception that code included in this document is licensed subject to the Zero-Clause BSD open source license (OBSD), http://opensource.org/licenses/0BSD.
diff --git a/cpu/2.5.0+cpu/searchindex.js b/cpu/2.5.0+cpu/searchindex.js index 082550705..5a4f1c84c 100644 --- a/cpu/2.5.0+cpu/searchindex.js +++ b/cpu/2.5.0+cpu/searchindex.js @@ -1 +1 @@ -Search.setIndex({"alltitles": {"$\\alpha$ Usage": [[16, "alpha-usage"]], "1. Creating a serialized file": [[32, "creating-a-serialized-file"]], "1. Defining hyperparameters to tune:": [[14, "defining-hyperparameters-to-tune"]], "1.0.0-Alpha": [[34, "id45"]], "1.0.1-Alpha": [[34, "alpha"]], "1.0.2": [[34, "id44"]], "1.1.0": [[34, "id42"]], "1.10.0": [[34, "id32"]], "1.10.100": [[34, "id31"]], "1.11.0": [[34, "id29"]], "1.11.200": [[34, "id27"]], "1.12.0": [[34, "id24"]], "1.12.100": [[34, "id23"]], "1.12.300": [[34, "id21"]], "1.13.0": [[34, "id18"]], "1.13.100": [[34, "id16"]], "1.2.0": [[34, "id39"]], "1.8.0": [[34, "id37"]], "1.9.0": [[34, "id36"]], "2. Creating a Model Archive": [[32, "creating-a-model-archive"]], "2. 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8, "wip": 18, "woq": 29, "worker": 32, "write": [5, 18], "xyz": 17, "xyzkrnl": 17, "your": 31, "your_conf_fil": 14, "your_python_script": 14}}) \ No newline at end of file diff --git a/cpu/2.5.0+cpu/tutorials/api_doc.html b/cpu/2.5.0+cpu/tutorials/api_doc.html index 2f56f6335..81944c4d8 100644 --- a/cpu/2.5.0+cpu/tutorials/api_doc.html +++ b/cpu/2.5.0+cpu/tutorials/api_doc.html @@ -1751,7 +1751,7 @@

Graph OptimizationSphinx using a theme provided by Read the Docs. - +

© Intel Corporation. Intel, the Intel logo, and other Intel marks are trademarks of Intel Corporation or its subsidiaries. Other names and brands may be claimed as the property of others. No license (express or implied, by estoppel or otherwise) to any intellectual property rights is granted by this document, with the sole exception that code included in this document is licensed subject to the Zero-Clause BSD open source license (OBSD), http://opensource.org/licenses/0BSD.
diff --git a/cpu/2.5.0+cpu/tutorials/blogs_publications.html b/cpu/2.5.0+cpu/tutorials/blogs_publications.html index 099e42d92..c20682bfd 100644 --- a/cpu/2.5.0+cpu/tutorials/blogs_publications.html +++ b/cpu/2.5.0+cpu/tutorials/blogs_publications.html @@ -167,7 +167,7 @@

Blogs & PublicationsSphinx using a theme provided by Read the Docs. - +

© Intel Corporation. Intel, the Intel logo, and other Intel marks are trademarks of Intel Corporation or its subsidiaries. Other names and brands may be claimed as the property of others. No license (express or implied, by estoppel or otherwise) to any intellectual property rights is granted by this document, with the sole exception that code included in this document is licensed subject to the Zero-Clause BSD open source license (OBSD), http://opensource.org/licenses/0BSD.
diff --git a/cpu/2.5.0+cpu/tutorials/cheat_sheet.html b/cpu/2.5.0+cpu/tutorials/cheat_sheet.html index 3551797d4..24b2ee3bf 100644 --- a/cpu/2.5.0+cpu/tutorials/cheat_sheet.html +++ b/cpu/2.5.0+cpu/tutorials/cheat_sheet.html @@ -195,7 +195,7 @@

Cheat SheetSphinx using a theme provided by Read the Docs. - +

© Intel Corporation. Intel, the Intel logo, and other Intel marks are trademarks of Intel Corporation or its subsidiaries. Other names and brands may be claimed as the property of others. No license (express or implied, by estoppel or otherwise) to any intellectual property rights is granted by this document, with the sole exception that code included in this document is licensed subject to the Zero-Clause BSD open source license (OBSD), http://opensource.org/licenses/0BSD.
diff --git a/cpu/2.5.0+cpu/tutorials/contribution.html b/cpu/2.5.0+cpu/tutorials/contribution.html index 9c4077718..9c1b5789e 100644 --- a/cpu/2.5.0+cpu/tutorials/contribution.html +++ b/cpu/2.5.0+cpu/tutorials/contribution.html @@ -331,7 +331,7 @@

Tips< Built with Sphinx using a theme provided by Read the Docs. - +

© Intel Corporation. Intel, the Intel logo, and other Intel marks are trademarks of Intel Corporation or its subsidiaries. Other names and brands may be claimed as the property of others. No license (express or implied, by estoppel or otherwise) to any intellectual property rights is granted by this document, with the sole exception that code included in this document is licensed subject to the Zero-Clause BSD open source license (OBSD), http://opensource.org/licenses/0BSD.
diff --git a/cpu/2.5.0+cpu/tutorials/examples.html b/cpu/2.5.0+cpu/tutorials/examples.html index cf225776b..8f595e425 100644 --- a/cpu/2.5.0+cpu/tutorials/examples.html +++ b/cpu/2.5.0+cpu/tutorials/examples.html @@ -636,7 +636,7 @@

Fast Bert (Prototype)
import torch
 from transformers import BertModel
 
-model = BertModel.from_pretrained("bert-base-uncased")
+model = BertModel.from_pretrained("bert-base-uncased", attn_implementation="eager")
 model.eval()
 
 vocab_size = model.config.vocab_size
@@ -1455,7 +1455,7 @@ 

Intel® AI Reference ModelsSphinx using a theme provided by Read the Docs. - +

© Intel Corporation. Intel, the Intel logo, and other Intel marks are trademarks of Intel Corporation or its subsidiaries. Other names and brands may be claimed as the property of others. No license (express or implied, by estoppel or otherwise) to any intellectual property rights is granted by this document, with the sole exception that code included in this document is licensed subject to the Zero-Clause BSD open source license (OBSD), http://opensource.org/licenses/0BSD.
diff --git a/cpu/2.5.0+cpu/tutorials/features.html b/cpu/2.5.0+cpu/tutorials/features.html index 95d044081..ba89bfe2c 100644 --- a/cpu/2.5.0+cpu/tutorials/features.html +++ b/cpu/2.5.0+cpu/tutorials/features.html @@ -440,7 +440,7 @@

Fast BERT Optimization (Prototype, NEW feature from 2.0.0)Sphinx using a theme provided by Read the Docs. - +

© Intel Corporation. Intel, the Intel logo, and other Intel marks are trademarks of Intel Corporation or its subsidiaries. Other names and brands may be claimed as the property of others. No license (express or implied, by estoppel or otherwise) to any intellectual property rights is granted by this document, with the sole exception that code included in this document is licensed subject to the Zero-Clause BSD open source license (OBSD), http://opensource.org/licenses/0BSD.
diff --git a/cpu/2.5.0+cpu/tutorials/features/amp.html b/cpu/2.5.0+cpu/tutorials/features/amp.html index 07fd70fd3..6328a3f82 100644 --- a/cpu/2.5.0+cpu/tutorials/features/amp.html +++ b/cpu/2.5.0+cpu/tutorials/features/amp.html @@ -262,7 +262,7 @@

Ops that promote to the widest input typeSphinx using a theme provided by Read the Docs. - +

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diff --git a/cpu/2.5.0+cpu/tutorials/features/auto_channels_last.html b/cpu/2.5.0+cpu/tutorials/features/auto_channels_last.html index de335adfc..915851e3b 100644 --- a/cpu/2.5.0+cpu/tutorials/features/auto_channels_last.html +++ b/cpu/2.5.0+cpu/tutorials/features/auto_channels_last.html @@ -192,7 +192,7 @@

Known issueSphinx using a theme provided by Read the Docs. - +

© Intel Corporation. Intel, the Intel logo, and other Intel marks are trademarks of Intel Corporation or its subsidiaries. Other names and brands may be claimed as the property of others. No license (express or implied, by estoppel or otherwise) to any intellectual property rights is granted by this document, with the sole exception that code included in this document is licensed subject to the Zero-Clause BSD open source license (OBSD), http://opensource.org/licenses/0BSD.
diff --git a/cpu/2.5.0+cpu/tutorials/features/codeless_optimization.html b/cpu/2.5.0+cpu/tutorials/features/codeless_optimization.html index fac1c5810..22c6f3bf8 100644 --- a/cpu/2.5.0+cpu/tutorials/features/codeless_optimization.html +++ b/cpu/2.5.0+cpu/tutorials/features/codeless_optimization.html @@ -280,7 +280,7 @@

Already using Jit TraceSphinx using a theme provided by Read the Docs. - +

© Intel Corporation. Intel, the Intel logo, and other Intel marks are trademarks of Intel Corporation or its subsidiaries. Other names and brands may be claimed as the property of others. No license (express or implied, by estoppel or otherwise) to any intellectual property rights is granted by this document, with the sole exception that code included in this document is licensed subject to the Zero-Clause BSD open source license (OBSD), http://opensource.org/licenses/0BSD.
diff --git a/cpu/2.5.0+cpu/tutorials/features/fast_bert.html b/cpu/2.5.0+cpu/tutorials/features/fast_bert.html index e90c4339d..763e6afa2 100644 --- a/cpu/2.5.0+cpu/tutorials/features/fast_bert.html +++ b/cpu/2.5.0+cpu/tutorials/features/fast_bert.html @@ -144,7 +144,7 @@

Feature Description

Prerequisite

    -
  • Transformers 4.6.0 ~ 4.43.2

  • +
  • Transformers 4.6.0 ~ 4.45.0

@@ -153,7 +153,7 @@

Usage Example
import torch
 from transformers import BertModel
 
-model = BertModel.from_pretrained("bert-base-uncased")
+model = BertModel.from_pretrained("bert-base-uncased", attn_implementation="eager")
 model.eval()
 
 vocab_size = model.config.vocab_size
@@ -194,7 +194,7 @@ 

Usage ExampleSphinx using a theme provided by Read the Docs. - +

© Intel Corporation. Intel, the Intel logo, and other Intel marks are trademarks of Intel Corporation or its subsidiaries. Other names and brands may be claimed as the property of others. No license (express or implied, by estoppel or otherwise) to any intellectual property rights is granted by this document, with the sole exception that code included in this document is licensed subject to the Zero-Clause BSD open source license (OBSD), http://opensource.org/licenses/0BSD.
diff --git a/cpu/2.5.0+cpu/tutorials/features/graph_capture.html b/cpu/2.5.0+cpu/tutorials/features/graph_capture.html index 06ddd1bfe..504b9cb2d 100644 --- a/cpu/2.5.0+cpu/tutorials/features/graph_capture.html +++ b/cpu/2.5.0+cpu/tutorials/features/graph_capture.html @@ -180,7 +180,7 @@

Usage ExampleSphinx using a theme provided by Read the Docs. - +

© Intel Corporation. Intel, the Intel logo, and other Intel marks are trademarks of Intel Corporation or its subsidiaries. Other names and brands may be claimed as the property of others. No license (express or implied, by estoppel or otherwise) to any intellectual property rights is granted by this document, with the sole exception that code included in this document is licensed subject to the Zero-Clause BSD open source license (OBSD), http://opensource.org/licenses/0BSD.
diff --git a/cpu/2.5.0+cpu/tutorials/features/graph_optimization.html b/cpu/2.5.0+cpu/tutorials/features/graph_optimization.html index 240c613fe..dc20c83af 100644 --- a/cpu/2.5.0+cpu/tutorials/features/graph_optimization.html +++ b/cpu/2.5.0+cpu/tutorials/features/graph_optimization.html @@ -392,7 +392,7 @@

Folding Built with Sphinx using a theme provided by Read the Docs. - +

© Intel Corporation. Intel, the Intel logo, and other Intel marks are trademarks of Intel Corporation or its subsidiaries. Other names and brands may be claimed as the property of others. No license (express or implied, by estoppel or otherwise) to any intellectual property rights is granted by this document, with the sole exception that code included in this document is licensed subject to the Zero-Clause BSD open source license (OBSD), http://opensource.org/licenses/0BSD.
diff --git a/cpu/2.5.0+cpu/tutorials/features/hypertune.html b/cpu/2.5.0+cpu/tutorials/features/hypertune.html index 03a8ec635..a2b73436b 100644 --- a/cpu/2.5.0+cpu/tutorials/features/hypertune.html +++ b/cpu/2.5.0+cpu/tutorials/features/hypertune.html @@ -330,7 +330,7 @@

Usage ExamplesSphinx using a theme provided by Read the Docs. - +

© Intel Corporation. Intel, the Intel logo, and other Intel marks are trademarks of Intel Corporation or its subsidiaries. Other names and brands may be claimed as the property of others. No license (express or implied, by estoppel or otherwise) to any intellectual property rights is granted by this document, with the sole exception that code included in this document is licensed subject to the Zero-Clause BSD open source license (OBSD), http://opensource.org/licenses/0BSD.
diff --git a/cpu/2.5.0+cpu/tutorials/features/int8_overview.html b/cpu/2.5.0+cpu/tutorials/features/int8_overview.html index da219b2e2..9fb177830 100644 --- a/cpu/2.5.0+cpu/tutorials/features/int8_overview.html +++ b/cpu/2.5.0+cpu/tutorials/features/int8_overview.html @@ -300,7 +300,7 @@

Convert to Dynamic Quantized Model and DeploySphinx using a theme provided by Read the Docs. - +

© Intel Corporation. Intel, the Intel logo, and other Intel marks are trademarks of Intel Corporation or its subsidiaries. Other names and brands may be claimed as the property of others. No license (express or implied, by estoppel or otherwise) to any intellectual property rights is granted by this document, with the sole exception that code included in this document is licensed subject to the Zero-Clause BSD open source license (OBSD), http://opensource.org/licenses/0BSD.
diff --git a/cpu/2.5.0+cpu/tutorials/features/int8_recipe_tuning_api.html b/cpu/2.5.0+cpu/tutorials/features/int8_recipe_tuning_api.html index 5b47f44b1..60fbdb256 100644 --- a/cpu/2.5.0+cpu/tutorials/features/int8_recipe_tuning_api.html +++ b/cpu/2.5.0+cpu/tutorials/features/int8_recipe_tuning_api.html @@ -390,7 +390,7 @@

Determining the Sphinx using a theme provided by Read the Docs. - +

© Intel Corporation. Intel, the Intel logo, and other Intel marks are trademarks of Intel Corporation or its subsidiaries. Other names and brands may be claimed as the property of others. No license (express or implied, by estoppel or otherwise) to any intellectual property rights is granted by this document, with the sole exception that code included in this document is licensed subject to the Zero-Clause BSD open source license (OBSD), http://opensource.org/licenses/0BSD.
diff --git a/cpu/2.5.0+cpu/tutorials/features/isa_dynamic_dispatch.html b/cpu/2.5.0+cpu/tutorials/features/isa_dynamic_dispatch.html index 48e126072..e635c8da5 100644 --- a/cpu/2.5.0+cpu/tutorials/features/isa_dynamic_dispatch.html +++ b/cpu/2.5.0+cpu/tutorials/features/isa_dynamic_dispatch.html @@ -742,7 +742,7 @@

CPU feature checkSphinx using a theme provided by Read the Docs. - +

© Intel Corporation. Intel, the Intel logo, and other Intel marks are trademarks of Intel Corporation or its subsidiaries. Other names and brands may be claimed as the property of others. No license (express or implied, by estoppel or otherwise) to any intellectual property rights is granted by this document, with the sole exception that code included in this document is licensed subject to the Zero-Clause BSD open source license (OBSD), http://opensource.org/licenses/0BSD.
diff --git a/cpu/2.5.0+cpu/tutorials/features/nhwc.html b/cpu/2.5.0+cpu/tutorials/features/nhwc.html index cbbff7a5f..87c5762af 100644 --- a/cpu/2.5.0+cpu/tutorials/features/nhwc.html +++ b/cpu/2.5.0+cpu/tutorials/features/nhwc.html @@ -370,7 +370,7 @@

CPU Channels Last TargetsSphinx using a theme provided by Read the Docs. - +

© Intel Corporation. Intel, the Intel logo, and other Intel marks are trademarks of Intel Corporation or its subsidiaries. Other names and brands may be claimed as the property of others. No license (express or implied, by estoppel or otherwise) to any intellectual property rights is granted by this document, with the sole exception that code included in this document is licensed subject to the Zero-Clause BSD open source license (OBSD), http://opensource.org/licenses/0BSD.
diff --git a/cpu/2.5.0+cpu/tutorials/features/optimizer_fusion.html b/cpu/2.5.0+cpu/tutorials/features/optimizer_fusion.html index b16dfd160..e79a8474c 100644 --- a/cpu/2.5.0+cpu/tutorials/features/optimizer_fusion.html +++ b/cpu/2.5.0+cpu/tutorials/features/optimizer_fusion.html @@ -184,7 +184,7 @@

Operation FusionSphinx using a theme provided by Read the Docs. - +

© Intel Corporation. Intel, the Intel logo, and other Intel marks are trademarks of Intel Corporation or its subsidiaries. Other names and brands may be claimed as the property of others. No license (express or implied, by estoppel or otherwise) to any intellectual property rights is granted by this document, with the sole exception that code included in this document is licensed subject to the Zero-Clause BSD open source license (OBSD), http://opensource.org/licenses/0BSD.
diff --git a/cpu/2.5.0+cpu/tutorials/features/runtime_extension.html b/cpu/2.5.0+cpu/tutorials/features/runtime_extension.html index e9666485a..ad7f47d41 100644 --- a/cpu/2.5.0+cpu/tutorials/features/runtime_extension.html +++ b/cpu/2.5.0+cpu/tutorials/features/runtime_extension.html @@ -347,7 +347,7 @@

IOMP preload or load during the runtimeSphinx using a theme provided by Read the Docs. - +

© Intel Corporation. Intel, the Intel logo, and other Intel marks are trademarks of Intel Corporation or its subsidiaries. Other names and brands may be claimed as the property of others. No license (express or implied, by estoppel or otherwise) to any intellectual property rights is granted by this document, with the sole exception that code included in this document is licensed subject to the Zero-Clause BSD open source license (OBSD), http://opensource.org/licenses/0BSD.
diff --git a/cpu/2.5.0+cpu/tutorials/features/split_sgd.html b/cpu/2.5.0+cpu/tutorials/features/split_sgd.html index c2eb39803..4db0b9352 100644 --- a/cpu/2.5.0+cpu/tutorials/features/split_sgd.html +++ b/cpu/2.5.0+cpu/tutorials/features/split_sgd.html @@ -220,7 +220,7 @@

Split SGD< Built with Sphinx using a theme provided by Read the Docs. - +

© Intel Corporation. Intel, the Intel logo, and other Intel marks are trademarks of Intel Corporation or its subsidiaries. Other names and brands may be claimed as the property of others. No license (express or implied, by estoppel or otherwise) to any intellectual property rights is granted by this document, with the sole exception that code included in this document is licensed subject to the Zero-Clause BSD open source license (OBSD), http://opensource.org/licenses/0BSD.
diff --git a/cpu/2.5.0+cpu/tutorials/features/sq_recipe_tuning_api.html b/cpu/2.5.0+cpu/tutorials/features/sq_recipe_tuning_api.html index 1a88cdca5..99867857b 100644 --- a/cpu/2.5.0+cpu/tutorials/features/sq_recipe_tuning_api.html +++ b/cpu/2.5.0+cpu/tutorials/features/sq_recipe_tuning_api.html @@ -209,7 +209,7 @@

Smooth Quant Recipe Tuning API (Prototype)Sphinx using a theme provided by Read the Docs. - +

© Intel Corporation. Intel, the Intel logo, and other Intel marks are trademarks of Intel Corporation or its subsidiaries. Other names and brands may be claimed as the property of others. No license (express or implied, by estoppel or otherwise) to any intellectual property rights is granted by this document, with the sole exception that code included in this document is licensed subject to the Zero-Clause BSD open source license (OBSD), http://opensource.org/licenses/0BSD.
diff --git a/cpu/2.5.0+cpu/tutorials/getting_started.html b/cpu/2.5.0+cpu/tutorials/getting_started.html index d80e6400a..8e8e85197 100644 --- a/cpu/2.5.0+cpu/tutorials/getting_started.html +++ b/cpu/2.5.0+cpu/tutorials/getting_started.html @@ -113,7 +113,7 @@

Quick Start

-

The following instructions assume you have installed the Intel® Extension for PyTorch*. For installation instructions, refer to Installation.

+

The following instructions assume you have installed the Intel® Extension for PyTorch*. For installation instructions, refer to Installation.

To start using the Intel® Extension for PyTorch* in your code, you need to make the following changes:

  1. Import the extension with import intel_extension_for_pytorch as ipex.

  2. @@ -261,7 +261,7 @@

    LLM Quick Startprint(gen_text, total_new_tokens, flush=True)

-

More LLM examples, including usage of low precision data types are available in the LLM Examples section.

+

More LLM examples, including usage of low precision data types are available in the LLM Examples section.

@@ -282,7 +282,7 @@

LLM Quick StartSphinx using a theme provided by Read the Docs. - +

© Intel Corporation. Intel, the Intel logo, and other Intel marks are trademarks of Intel Corporation or its subsidiaries. Other names and brands may be claimed as the property of others. No license (express or implied, by estoppel or otherwise) to any intellectual property rights is granted by this document, with the sole exception that code included in this document is licensed subject to the Zero-Clause BSD open source license (OBSD), http://opensource.org/licenses/0BSD.
diff --git a/cpu/2.5.0+cpu/tutorials/installation.html b/cpu/2.5.0+cpu/tutorials/installation.html index eef9efb3a..bf139131e 100644 --- a/cpu/2.5.0+cpu/tutorials/installation.html +++ b/cpu/2.5.0+cpu/tutorials/installation.html @@ -110,9 +110,9 @@

Installation

-

Select your preferences and follow the installation instructions provided on the Installation page.

+

Select your preferences and follow the installation instructions provided on the Installation page.

After successful installation, refer to the Quick Start and Examples sections to start using the extension in your code.

-

NOTE: For detailed instructions on installing and setting up the environment for Large Language Models (LLM), as well as example scripts, refer to the LLM best practices.

+

NOTE: For detailed instructions on installing and setting up the environment for Large Language Models (LLM), as well as example scripts, refer to the LLM best practices.

@@ -132,7 +132,7 @@

InstallationSphinx using a theme provided by Read the Docs. - +

© Intel Corporation. Intel, the Intel logo, and other Intel marks are trademarks of Intel Corporation or its subsidiaries. Other names and brands may be claimed as the property of others. No license (express or implied, by estoppel or otherwise) to any intellectual property rights is granted by this document, with the sole exception that code included in this document is licensed subject to the Zero-Clause BSD open source license (OBSD), http://opensource.org/licenses/0BSD.
diff --git a/cpu/2.5.0+cpu/tutorials/introduction.html b/cpu/2.5.0+cpu/tutorials/introduction.html index d33171992..27607af3d 100644 --- a/cpu/2.5.0+cpu/tutorials/introduction.html +++ b/cpu/2.5.0+cpu/tutorials/introduction.html @@ -128,7 +128,7 @@

Introduction

Get Started

@@ -156,7 +156,7 @@

API DocumentationSphinx using a theme provided by Read the Docs. - +

© Intel Corporation. Intel, the Intel logo, and other Intel marks are trademarks of Intel Corporation or its subsidiaries. Other names and brands may be claimed as the property of others. No license (express or implied, by estoppel or otherwise) to any intellectual property rights is granted by this document, with the sole exception that code included in this document is licensed subject to the Zero-Clause BSD open source license (OBSD), http://opensource.org/licenses/0BSD.
diff --git a/cpu/2.5.0+cpu/tutorials/known_issues.html b/cpu/2.5.0+cpu/tutorials/known_issues.html index d1c3b186f..bd15b60c6 100644 --- a/cpu/2.5.0+cpu/tutorials/known_issues.html +++ b/cpu/2.5.0+cpu/tutorials/known_issues.html @@ -316,7 +316,7 @@

Result CorrectnessSphinx using a theme provided by Read the Docs. - +

© Intel Corporation. Intel, the Intel logo, and other Intel marks are trademarks of Intel Corporation or its subsidiaries. Other names and brands may be claimed as the property of others. No license (express or implied, by estoppel or otherwise) to any intellectual property rights is granted by this document, with the sole exception that code included in this document is licensed subject to the Zero-Clause BSD open source license (OBSD), http://opensource.org/licenses/0BSD.
diff --git a/cpu/2.5.0+cpu/tutorials/license.html b/cpu/2.5.0+cpu/tutorials/license.html index be0f43618..cf3a81ca8 100644 --- a/cpu/2.5.0+cpu/tutorials/license.html +++ b/cpu/2.5.0+cpu/tutorials/license.html @@ -132,7 +132,7 @@

License Built with Sphinx using a theme provided by Read the Docs. - +

© Intel Corporation. Intel, the Intel logo, and other Intel marks are trademarks of Intel Corporation or its subsidiaries. Other names and brands may be claimed as the property of others. No license (express or implied, by estoppel or otherwise) to any intellectual property rights is granted by this document, with the sole exception that code included in this document is licensed subject to the Zero-Clause BSD open source license (OBSD), http://opensource.org/licenses/0BSD.
diff --git a/cpu/2.5.0+cpu/tutorials/llm.html b/cpu/2.5.0+cpu/tutorials/llm.html index 0f18ce717..d1d88c340 100644 --- a/cpu/2.5.0+cpu/tutorials/llm.html +++ b/cpu/2.5.0+cpu/tutorials/llm.html @@ -156,9 +156,9 @@

Verified for single instance mode🟩

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LLAMA

@@ -183,16 +183,16 @@

Verified for single instance mode🟩

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LLAMA

meta-llama/Meta-Llama-3-70B

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LLAMA

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LLAMA

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meta-llama/Llama-3.2-11B-Vision-Instruct

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GPT-J

EleutherAI/gpt-j-6b

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bigscience/bloom-1b7

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bigcode/starcoder

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google/flan-t5-xl

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Whisper

@@ -494,11 +512,7 @@

Verified for single instance mode

- -
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  • 🟩 signifies that the model can perform well and with good accuracy (<1% difference as compared with FP32).

  • -
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+

Verified for distributed inference mode via DeepSpeed

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Verified for distributed inference mode via DeepSpeed

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EleutherAI/gpt-j-6b

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EleutherAI/gpt-neox-20b

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databricks/dolly-v2-12b

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facebook/opt-30b

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bigscience/bloom-1b7

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baichuan-inc/Baichuan-13B-Chat

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  • 🟨 signifies that the model can perform well while accuracy may not been in a perfect state (>1% difference as compared with FP32).

  • -

Note: The above verified models (including other models in the same model family, like “codellama/CodeLlama-7b-hf” from LLAMA family) are well supported with all optimizations like indirect access KV cache, fused ROPE, and customized linear kernels. We are working in progress to better support the models in the tables with various data types. In addition, more models will be optimized in the future.

+

Note: The above verified models (including other models in the same model family, like “codellama/CodeLlama-7b-hf” from LLAMA family) are well supported with all optimizations like indirect access KV cache, fused ROPE, and customized linear kernels. We are working in progress to better support the models in the tables with various data types. In addition, more models will be optimized in the future.

Please check LLM best known practice for instructions to install/setup environment and example scripts.

@@ -853,7 +875,7 @@

Distributed InferenceSphinx using a theme provided by Read the Docs. - +

© Intel Corporation. Intel, the Intel logo, and other Intel marks are trademarks of Intel Corporation or its subsidiaries. Other names and brands may be claimed as the property of others. No license (express or implied, by estoppel or otherwise) to any intellectual property rights is granted by this document, with the sole exception that code included in this document is licensed subject to the Zero-Clause BSD open source license (OBSD), http://opensource.org/licenses/0BSD.
diff --git a/cpu/2.5.0+cpu/tutorials/llm/llm_optimize.html b/cpu/2.5.0+cpu/tutorials/llm/llm_optimize.html index 67a840168..3f7e17c55 100644 --- a/cpu/2.5.0+cpu/tutorials/llm/llm_optimize.html +++ b/cpu/2.5.0+cpu/tutorials/llm/llm_optimize.html @@ -271,7 +271,7 @@

Distributed Inference with DeepSpeedSphinx using a theme provided by Read the Docs. - +

© Intel Corporation. Intel, the Intel logo, and other Intel marks are trademarks of Intel Corporation or its subsidiaries. Other names and brands may be claimed as the property of others. No license (express or implied, by estoppel or otherwise) to any intellectual property rights is granted by this document, with the sole exception that code included in this document is licensed subject to the Zero-Clause BSD open source license (OBSD), http://opensource.org/licenses/0BSD.
diff --git a/cpu/2.5.0+cpu/tutorials/performance.html b/cpu/2.5.0+cpu/tutorials/performance.html index 3035ceb5a..0ed45be76 100644 --- a/cpu/2.5.0+cpu/tutorials/performance.html +++ b/cpu/2.5.0+cpu/tutorials/performance.html @@ -1038,7 +1038,7 @@

Hardware ConfigurationSphinx using a theme provided by Read the Docs. - +

© Intel Corporation. Intel, the Intel logo, and other Intel marks are trademarks of Intel Corporation or its subsidiaries. Other names and brands may be claimed as the property of others. No license (express or implied, by estoppel or otherwise) to any intellectual property rights is granted by this document, with the sole exception that code included in this document is licensed subject to the Zero-Clause BSD open source license (OBSD), http://opensource.org/licenses/0BSD.
diff --git a/cpu/2.5.0+cpu/tutorials/performance_tuning/launch_script.html b/cpu/2.5.0+cpu/tutorials/performance_tuning/launch_script.html index 60c029aa6..c4f061b05 100644 --- a/cpu/2.5.0+cpu/tutorials/performance_tuning/launch_script.html +++ b/cpu/2.5.0+cpu/tutorials/performance_tuning/launch_script.html @@ -835,7 +835,7 @@

GNU OpenMP LibrarySphinx using a theme provided by Read the Docs. - +

© Intel Corporation. Intel, the Intel logo, and other Intel marks are trademarks of Intel Corporation or its subsidiaries. Other names and brands may be claimed as the property of others. No license (express or implied, by estoppel or otherwise) to any intellectual property rights is granted by this document, with the sole exception that code included in this document is licensed subject to the Zero-Clause BSD open source license (OBSD), http://opensource.org/licenses/0BSD.
diff --git a/cpu/2.5.0+cpu/tutorials/performance_tuning/torchserve.html b/cpu/2.5.0+cpu/tutorials/performance_tuning/torchserve.html index 3bd16b73c..d21bff958 100644 --- a/cpu/2.5.0+cpu/tutorials/performance_tuning/torchserve.html +++ b/cpu/2.5.0+cpu/tutorials/performance_tuning/torchserve.html @@ -462,7 +462,7 @@

Performance Boost with Intel® Extension for PyTorch* and LauncherSphinx using a theme provided by Read the Docs. - +

© Intel Corporation. Intel, the Intel logo, and other Intel marks are trademarks of Intel Corporation or its subsidiaries. Other names and brands may be claimed as the property of others. No license (express or implied, by estoppel or otherwise) to any intellectual property rights is granted by this document, with the sole exception that code included in this document is licensed subject to the Zero-Clause BSD open source license (OBSD), http://opensource.org/licenses/0BSD.
diff --git a/cpu/2.5.0+cpu/tutorials/performance_tuning/tuning_guide.html b/cpu/2.5.0+cpu/tutorials/performance_tuning/tuning_guide.html index 1c2ef6a06..cac1039fc 100644 --- a/cpu/2.5.0+cpu/tutorials/performance_tuning/tuning_guide.html +++ b/cpu/2.5.0+cpu/tutorials/performance_tuning/tuning_guide.html @@ -366,7 +366,7 @@

OneDNN primitive cacheSphinx using a theme provided by Read the Docs. - +

© Intel Corporation. Intel, the Intel logo, and other Intel marks are trademarks of Intel Corporation or its subsidiaries. Other names and brands may be claimed as the property of others. No license (express or implied, by estoppel or otherwise) to any intellectual property rights is granted by this document, with the sole exception that code included in this document is licensed subject to the Zero-Clause BSD open source license (OBSD), http://opensource.org/licenses/0BSD.
diff --git a/cpu/2.5.0+cpu/tutorials/releases.html b/cpu/2.5.0+cpu/tutorials/releases.html index 16fe282ca..8759d1240 100644 --- a/cpu/2.5.0+cpu/tutorials/releases.html +++ b/cpu/2.5.0+cpu/tutorials/releases.html @@ -58,101 +58,105 @@
  • Large Language Models (LLM)
  • Performance
  • Releases
      -
    • 2.4.0
        +
      • 2.5.0
      • -
      • 2.3.100
          +
        • 2.4.0
        • -
        • 2.3.0
            +
          • 2.3.100
          • -
          • 2.2.0
              +
            • 2.3.0
            • -
            • 2.1.100
                +
              • 2.2.0
              • -
              • 2.1.0
                  +
                • 2.1.100
                • -
                • 2.0.100
                    +
                  • 2.1.0
                  • -
                  • 2.0.0
                      +
                    • 2.0.100
                    • -
                    • 1.13.100
                        +
                      • 2.0.0
                      • -
                      • 1.13.0
                          +
                        • 1.13.100
                        • -
                        • 1.12.300
                            -
                          • Highlights
                          • +
                          • 1.13.0
                          • -
                          • 1.12.100
                          • -
                          • 1.12.0
                              -
                            • Highlights
                            • -
                            • Known Issues
                            • +
                            • 1.12.300
                            • -
                            • 1.11.200
                                -
                              • Highlights
                              • +
                              • 1.12.100
                              • +
                              • 1.12.0
                              • -
                              • 1.11.0
                                  +
                                • 1.11.200 +
                                • +
                                • 1.11.0
                                • -
                                • 1.10.100
                                • -
                                • 1.10.0
                                    -
                                  • Highlights
                                  • -
                                  • Known Issues
                                  • -
                                  • What’s Changed
                                  • +
                                  • 1.10.100
                                  • +
                                  • 1.10.0
                                  • -
                                  • 1.9.0
                                      +
                                    • 1.9.0
                                    • -
                                    • 1.8.0
                                        -
                                      • What’s New
                                      • +
                                      • 1.8.0
                                      • -
                                      • 1.2.0
                                          -
                                        • What’s New
                                        • +
                                        • 1.2.0
                                        • -
                                        • 1.1.0
                                            -
                                          • What’s New
                                          • +
                                          • 1.1.0
                                          • -
                                          • 1.0.2
                                          • +
                                          • 1.0.2
                                          • 1.0.1-Alpha
                                          • -
                                          • 1.0.0-Alpha
                                              -
                                            • What’s New
                                            • +
                                            • 1.0.0-Alpha
                                            • @@ -211,11 +215,40 @@

                                              Releases

                                              -

                                              2.4.0

                                              -

                                              We are excited to announce the release of Intel® Extension for PyTorch* 2.4.0+cpu which accompanies PyTorch 2.4. This release mainly brings you the support for Llama3.1, basic support for LLM serving frameworks like vLLM/TGI, and a set of optimization to push better performance for LLM models. This release also extends the list of optimized LLM models to a broader level and includes a set of bug fixing and small optimizations. We want to sincerely thank our dedicated community for your contributions. As always, we encourage you to try this release and feedback as to improve further on this product.

                                              +

                                              2.5.0

                                              +

                                              We are excited to announce the release of Intel® Extension for PyTorch* 2.5.0+cpu which accompanies PyTorch 2.5. This release mainly brings you the support for Llama3.2, optimization on newly launched Intel® Xeon® 6 P-core platform, GPTQ/AWQ format support, and latest optimization to push better performance for LLM models. This release also includes a set of bug fixing and small optimizations. We want to sincerely thank our dedicated community for your contributions. As always, we encourage you to try this release and feedback as to improve further on this product.

                                              Highlights

                                                +
                                              • Llama 3.2 support

                                              • +
                                              +

                                              Meta has newly released Llama 3.2, which includes small and medium-sized vision LLMs (11B and 90B), and lightweight, text-only models (1B and 3B). Intel® Extension for PyTorch* provides support of Llama 3.2 since its launch date with early release version, and now support with this official release.

                                              +
                                                +
                                              • Optimization for Intel® Xeon® 6 +Intel® Xeon® 6 deliver new degrees of performance with more cores, a choice of microarchitecture, additional memory bandwidth, and exceptional input/output (I/O) across a range of workloads. Intel® Extension for PyTorch* provides dedicated optimization on this new processor family for features like Multiplexed Rank DIMM (MRDIMM), SNC=3 scenario, etc..

                                              • +
                                              • Large Language Model (LLM) optimization: +Intel® Extension for PyTorch* provides more feature support of the weight only quantization including GPTQ/AWQ format support, symmetric quantization of activation and weight, and added chunked prefill/prefix prefill support in LLM module API, etc.. These features enable better adoption of community model weight and provides better performance for low-precision scenarios. This release also extended the optimized models to include newly published Llama 3.2 vision models. A full list of optimized models can be found at LLM optimization.

                                              • +
                                              • Bug fixing and other optimization

                                                +
                                                  +
                                                • Optimized the performance of the IndirectAccessKVCacheAttention kernel +#3185 #3209 #3214 #3218 #3248

                                                • +
                                                • Fixed the Segmentation fault in the IndirectAccessKVCacheAttention kernel #3246

                                                • +
                                                • Fixed the correctness issue in the PagedAttention kernel for Llama-68M-Chat-v1 #3307

                                                • +
                                                • Fixed the support in ipex.llm.optimize to ensure model.generate returns the correct output type when return_dict_in_generate is set to True. #3333

                                                • +
                                                • Optimized the performance of the Flash Attention kernel #3291

                                                • +
                                                • Upgraded oneDNN to v3.6 #3305

                                                • +
                                                +
                                              • +
                                              +

                                              Full Changelog: https://github.com/intel/intel-extension-for-pytorch/compare/v2.4.0+cpu…v2.5.0+cpu

                                              +
                                              +
                                              +
                                              +

                                              2.4.0

                                              +

                                              We are excited to announce the release of Intel® Extension for PyTorch* 2.4.0+cpu which accompanies PyTorch 2.4. This release mainly brings you the support for Llama3.1, basic support for LLM serving frameworks like vLLM/TGI, and a set of optimization to push better performance for LLM models. This release also extends the list of optimized LLM models to a broader level and includes a set of bug fixing and small optimizations. We want to sincerely thank our dedicated community for your contributions. As always, we encourage you to try this release and feedback as to improve further on this product.

                                              +
                                              +

                                              Highlights

                                              +
                                              • Llama 3.1 support

                                              Meta has newly released Llama 3.1 with new features like longer context length (128K) support. Intel® Extension for PyTorch* provides support of Llama 3.1 since its launch date with early release version, and now support with this official release.

                                              @@ -241,10 +274,10 @@

                                              Highlights -

                                              2.3.100

                                              -
                                              -

                                              Highlights

                                              +
                                              +

                                              2.3.100

                                              +
                                              +

                                              Highlights

                                              -
                                              -

                                              2.3.0

                                              +
                                              +

                                              2.3.0

                                              We are excited to announce the release of Intel® Extension for PyTorch* 2.3.0+cpu which accompanies PyTorch 2.3. This release mainly brings you the new feature on Large Language Model (LLM) called module level LLM optimization API, which provides module level optimizations for commonly used LLM modules and functionalities, and targets to optimize customized LLM modeling for scenarios like private models, self-customized models, LLM serving frameworks, etc. This release also extends the list of optimized LLM models to a broader level and includes a set of bug fixing and small optimizations. We want to sincerely thank our dedicated community for your contributions. As always, we encourage you to try this release and feedback as to improve further on this product.

                                              -
                                              -

                                              Highlights

                                              +
                                              +

                                              Highlights

                                              -
                                              -

                                              2.2.0

                                              +
                                              +

                                              2.2.0

                                              We are excited to announce the release of Intel® Extension for PyTorch* 2.2.0+cpu which accompanies PyTorch 2.2. This release mainly brings in our latest optimization on Large Language Model (LLM) including new dedicated API set (ipex.llm), new capability for auto-tuning accuracy recipe for LLM, and a broader list of optimized LLM models, together with a set of bug fixing and small optimization. We want to sincerely thank our dedicated community for your contributions. As always, we encourage you to try this release and feedback as to improve further on this product.

                                              -
                                              -

                                              Highlights

                                              +
                                              +

                                              Highlights

                                              • Large Language Model (LLM) optimization

                                                Intel® Extension for PyTorch* provides a new dedicated module, ipex.llm, to host for Large Language Models (LLMs) specific APIs. With ipex.llm, Intel® Extension for PyTorch* provides comprehensive LLM optimization cross various popular datatypes including FP32/BF16/INT8/INT4. Specifically for low precision, both SmoothQuant and Weight-Only quantization are supported for various scenarios. And user can also run Intel® Extension for PyTorch* with Tensor Parallel to fit in the multiple ranks or multiple nodes scenarios to get even better performance.

                                                @@ -362,10 +395,10 @@

                                                Highlights

                                                Full Changelog: https://github.com/intel/intel-extension-for-pytorch/compare/v2.1.100+cpu…v2.2.0+cpu

                                              -
                                              -

                                              2.1.100

                                              -
                                              -

                                              Highlights

                                              +
                                              +

                                              2.1.100

                                              +
                                              +

                                              Highlights

                                              -
                                              -

                                              2.1.0

                                              -
                                              -

                                              Highlights

                                              +
                                              +

                                              2.1.0

                                              +
                                              +

                                              Highlights

                                              • Large Language Model (LLM) optimization (Experimental): Intel® Extension for PyTorch* provides a lot of specific optimizations for LLMs in this new release. In operator level, we provide highly efficient GEMM kernel to speedup Linear layer and customized operators to reduce the memory footprint. To better trade-off the performance and accuracy, different low-precision solutions e.g., smoothQuant for INT8 and weight-only-quantization for INT4 and INT8 are also enabled. Besides, tensor parallel can also be adopt to get lower latency for LLMs.

                                                A new API function, ipex.optimize_transformers, is designed to optimize transformer-based models within frontend Python modules, with a particular focus on Large Language Models (LLMs). It provides optimizations for both model-wise and content-generation-wise. You just need to invoke the ipex.optimize_transformers function instead of the ipex.optimize function to apply all optimizations transparently. More detailed information can be found at Large Language Model optimizations overview.

                                                @@ -407,10 +440,10 @@

                                                Highlights

                                              -
                                              -

                                              2.0.100

                                              -
                                              -

                                              Highlights

                                              +
                                              +

                                              2.0.100

                                              +
                                              +

                                              Highlights

                                              -
                                              -

                                              2.0.0

                                              +
                                              +

                                              2.0.0

                                              We are pleased to announce the release of Intel® Extension for PyTorch* 2.0.0-cpu which accompanies PyTorch 2.0. This release mainly brings in our latest optimization on NLP (BERT), support of PyTorch 2.0’s hero API –- torch.compile as one of its backend, together with a set of bug fixing and small optimization.

                                              -
                                              -

                                              Highlights

                                              +
                                              +

                                              Highlights

                                              • Fast BERT optimization (Experimental): Intel introduced a new technique to speed up BERT workloads. Intel® Extension for PyTorch* integrated this implementation, which benefits BERT model especially training. A new API ipex.fast_bert is provided to try this new optimization. More detailed information can be found at Fast Bert Feature.

                                              • MHA optimization with Flash Attention: Intel optimized MHA module with Flash Attention technique as inspired by Stanford paper. This brings less memory consumption for LLM, and also provides better inference performance for models like BERT, Stable Diffusion, etc.

                                              • @@ -461,10 +494,10 @@

                                                Known IssuesKnown Issues webpage.

                                              -
                                              -

                                              1.13.100

                                              -
                                              -

                                              Highlights

                                              +
                                              +

                                              1.13.100

                                              +
                                              +

                                              Highlights

                                              -
                                              -

                                              1.13.0

                                              +
                                              +

                                              1.13.0

                                              We are pleased to announce the release of Intel® Extension for PyTorch* 1.13.0-cpu which accompanies PyTorch 1.13. This release is highlighted with quite a few usability features which help users to get good performance and accuracy on CPU with less effort. We also added a couple of performance features as always. Check out the feature summary below.

                                              • Usability Features

                                              • @@ -495,8 +528,8 @@

                                                1.13.0

                                                Packed MKL SGEMM landed as the default kernel option for FP32 Linear, bringing up-to 20% geomean speedup for real-time NLP tasks.

                                              • DL compiler is now turned on by default with oneDNN fusion and gives additional performance boost for INT8 models.

                                              • -
                                                -

                                                Highlights

                                                +
                                                +

                                                Highlights

                                                • Automatic channels last format conversion: Channels last conversion is now applied to PyTorch modules automatically with ipex.optimize by default for both training and inference scenarios. Users don’t have to explicitly convert input and weight for CV models.

                                                  import intel_extension_for_pytorch as ipex
                                                  @@ -571,15 +604,15 @@ 

                                                  Highlights

                                                -
                                                -

                                                Known Issues

                                                +
                                                +

                                                Known Issues

                                                Please check at Known Issues webpage.

                                                -
                                                -

                                                1.12.300

                                                -
                                                -

                                                Highlights

                                                +
                                                +

                                                1.12.300

                                                +
                                                +

                                                Highlights

                                                -
                                                -

                                                1.12.100

                                                +
                                                +

                                                1.12.100

                                                This is a patch release to fix the AVX2 issue that blocks running on non-AVX512 platforms.

                                                -
                                                -

                                                1.12.0

                                                +
                                                +

                                                1.12.0

                                                We are excited to bring you the release of Intel® Extension for PyTorch* 1.12.0-cpu, by tightly following PyTorch 1.12 release. In this release, we matured the automatic int8 quantization and made it a stable feature. We stabilized runtime extension and brought about a MultiStreamModule feature to further boost throughput in offline inference scenario. We also brought about various enhancements in operation and graph which are positive for performance of broad set of workloads.

                                                Highlights include:

                                                  @@ -603,8 +636,8 @@

                                                  1.12.0

                                                  More optimizations in graph and operations to improve performance of broad set of models, examples include but not limited to wave2vec, T5, Albert etc.

                                                • Pre-built experimental binary with oneDNN Graph Compiler tuned on would deliver additional performance gain for Bert, Albert, Roberta in INT8 inference.

                                                -
                                                -

                                                Highlights

                                                +
                                                +

                                                Highlights

                                                • Matured automatic INT8 quantization feature baking into a well-tuned default quantization recipe. We facilitated the user experience and provided a wide range of calibration algorithms like Histogram, MinMax, MovingAverageMinMax, etc. Meanwhile, We polished the static quantization with better flexibility and enabled dynamic quantization as well. Compared to the previous version, the brief changes are as follows. Refer to tutorial page for more details.

                                                  @@ -730,8 +763,8 @@

                                                  Highlights -
                                                  -

                                                  Known Issues

                                                  +
                                                  +

                                                  Known Issues

                                                  • RuntimeError: Overflow when unpacking long when a tensor’s min max value exceeds int range while performing int8 calibration. Please customize QConfig to use min-max calibration method.

                                                  • Calibrating with quantize_per_tensor, when benchmarking with 1 OpenMP* thread, results might be incorrect with large tensors (find more detailed info here. Editing your code following the pseudocode below can workaround this issue, if you do need to explicitly set OMP_NUM_THREAEDS=1 for benchmarking. However, there could be a performance regression if oneDNN graph compiler prototype feature is utilized.

                                                    @@ -791,10 +824,10 @@

                                                    Known Issues

                                                  -
                                                  -

                                                  1.11.200

                                                  -
                                                  -

                                                  Highlights

                                                  +
                                                  +

                                                  1.11.200

                                                  +
                                                  +

                                                  Highlights

                                                  • Enable more fused operators to accelerate particular models.

                                                  • Fuse Convolution and LeakyReLU (#648)

                                                  • @@ -807,8 +840,8 @@

                                                    Highlights

                                                    Full Changelog

                                                  -
                                                  -

                                                  1.11.0

                                                  +
                                                  +

                                                  1.11.0

                                                  We are excited to announce Intel® Extension for PyTorch* 1.11.0-cpu release by tightly following PyTorch 1.11 release. Along with extension 1.11, we focused on continually improving OOB user experience and performance. Highlights include:

                                                  • Support a single binary with runtime dynamic dispatch based on AVX2/AVX512 hardware ISA detection

                                                  • @@ -817,8 +850,8 @@

                                                    1.11.0

                                                    Add more optimizations, including graph fusions for speeding up Transformer-based models and CNN, etc

                                                  • Reduce the binary size for both the PIP wheel and C++ SDK (2X to 5X reduction from the previous version)

                                                  -
                                                  -

                                                  Highlights

                                                  +
                                                  +

                                                  Highlights

                                                  • Combine the AVX2 and AVX512 binary as a single binary and automatically dispatch to different implementations based on hardware ISA detection at runtime. The typical case is to serve the data center that mixtures AVX2-only and AVX512 platforms. It does not need to deploy the different ISA binary now compared to the previous version

                                                    NOTE: The extension uses the oneDNN library as the backend. However, the BF16 and INT8 operator sets and features are different between AVX2 and AVX512. Refer to oneDNN document for more details.

                                                    @@ -887,8 +920,8 @@

                                                    What’s Changed -

                                                    1.10.100

                                                    +
                                                    +

                                                    1.10.100

                                                    This release is meant to fix the following issues:

                                                    • Resolve the issue that the PyTorch Tensor Expression(TE) did not work after importing the extension.

                                                    • @@ -901,12 +934,12 @@

                                                      1.10.100<

                                                    -
                                                    -

                                                    1.10.0

                                                    +
                                                    +

                                                    1.10.0

                                                    The Intel® Extension for PyTorch* 1.10 is on top of PyTorch 1.10. In this release, we polished the front end APIs. The APIs are more simple, stable, and straightforward now. According to PyTorch community recommendation, we changed the underhood device from XPU to CPU. With this change, the model and tensor does not need to be converted to the extension device to get performance improvement. It simplifies the model changes.

                                                    Besides that, we continuously optimize the Transformer* and CNN models by fusing more operators and applying NHWC. We measured the 1.10 performance on Torchvison and HugginFace. As expected, 1.10 can speed up the two model zones.

                                                    -
                                                    -

                                                    Highlights

                                                    +
                                                    +

                                                    Highlights

                                                    • Change the package name to intel_extension_for_pytorch while the original package name is intel_pytorch_extension. This change targets to avoid any potential legal issues.

                                                    @@ -1120,8 +1153,8 @@

                                                    Highlights
                                                  • Runtime Extension (Experimental) provides a runtime CPU pool API to bind threads to cores. It also features async tasks. Note: Intel® Extension for PyTorch* Runtime extension is still in the experimental stage. The API is subject to change. More detailed descriptions are available in the extension documentation.

                                                  -
                                                  -

                                                  Known Issues

                                                  +
                                                  +

                                                  Known Issues

                                                  • omp_set_num_threads function failed to change OpenMP threads number of oneDNN operators if it was set before.

                                                    omp_set_num_threads function is provided in Intel® Extension for PyTorch* to change the number of threads used with OpenMP. However, it failed to change the number of OpenMP threads if it was set before.

                                                    @@ -1142,13 +1175,13 @@

                                                    Known Issues

                                                  -
                                                  -

                                                  What’s Changed

                                                  +
                                                  +

                                                  What’s Changed

                                                  Full Changelog: https://github.com/intel/intel-extension-for-pytorch/compare/v1.9.0…v1.10.0+cpu-rc3

                                                  -
                                                  -

                                                  1.9.0

                                                  +
                                                  +

                                                  1.9.0

                                                  What’s New

                                                    @@ -1160,10 +1193,10 @@

                                                    What’s New -

                                                    1.8.0

                                                    -
                                                    -

                                                    What’s New

                                                    +
                                                    +

                                                    1.8.0

                                                    +
                                                    +

                                                    What’s New

                                                    • Rebased the Intel Extension for Pytorch from Pytorch -1.7.0 to the official Pytorch-1.8.0 release. The new XPU device type has been added into Pytorch-1.8.0(49786), don’t need to patch PyTorch to enable Intel Extension for Pytorch anymore

                                                    • Upgraded the oneDNN from v1.5-rc to v1.8.1

                                                    • @@ -1171,10 +1204,10 @@

                                                      What’s New

                                                    -
                                                    -

                                                    1.2.0

                                                    -
                                                    -

                                                    What’s New

                                                    +
                                                    +

                                                    1.2.0

                                                    +
                                                    +

                                                    What’s New

                                                    • We rebased the Intel Extension for pytorch from Pytorch -1.5rc3 to the official Pytorch-1.7.0 release. It will have performance improvement with the new Pytorch-1.7 support.

                                                    • Device name was changed from DPCPP to XPU.

                                                      @@ -1211,17 +1244,17 @@

                                                      Others<

                                                    -
                                                    -

                                                    Known issues

                                                    +
                                                    +

                                                    Known issues

                                                    • Multi-node training still encounter hang issues after several iterations. The fix will be included in the next official release.

                                                    -
                                                    -

                                                    1.1.0

                                                    -
                                                    -

                                                    What’s New

                                                    +
                                                    +

                                                    1.1.0

                                                    +
                                                    +

                                                    What’s New

                                                    -
                                                    -

                                                    1.0.0-Alpha

                                                    -
                                                    -

                                                    What’s New

                                                    +
                                                    +

                                                    1.0.0-Alpha

                                                    +
                                                    +

                                                    What’s New

                                                    • Auto Operator Optimization

                                                      Intel Extension for PyTorch will automatically optimize the operators of PyTorch when importing its python package. It will significantly improve the computation performance if the input tensor and the model is converted to the extension device.

                                                      @@ -1359,8 +1392,8 @@

                                                      Performance Result -

                                                      Known issue

                                                      +
                                                      +

                                                      Known issue

                                                      • #10 All data types have not been registered for DPCPP

                                                      • #37 MaxPool can’t get nan result when input’s value is nan

                                                      • @@ -1390,7 +1423,7 @@

                                                        NOTE< Built with Sphinx using a theme provided by Read the Docs. - +

                                                        © Intel Corporation. Intel, the Intel logo, and other Intel marks are trademarks of Intel Corporation or its subsidiaries. Other names and brands may be claimed as the property of others. No license (express or implied, by estoppel or otherwise) to any intellectual property rights is granted by this document, with the sole exception that code included in this document is licensed subject to the Zero-Clause BSD open source license (OBSD), http://opensource.org/licenses/0BSD.