diff --git a/bindings/python/capstone/tricore.py b/bindings/python/capstone/tricore.py index 9a48a9f795d..79b02a69637 100644 --- a/bindings/python/capstone/tricore.py +++ b/bindings/python/capstone/tricore.py @@ -7,14 +7,14 @@ class TriCoreOpMem(ctypes.Structure): _fields_ = ( ('base', ctypes.c_uint8), - ('disp', ctypes.c_int32), + ('disp', ctypes.c_int64), ) class TriCoreOpValue(ctypes.Union): _fields_ = ( ('reg', ctypes.c_uint), - ('imm', ctypes.c_int32), + ('imm', ctypes.c_int64), ('mem', TriCoreOpMem), ) diff --git a/cstool/cstool_tricore.c b/cstool/cstool_tricore.c index 28446e7a982..6a7a3face68 100644 --- a/cstool/cstool_tricore.c +++ b/cstool/cstool_tricore.c @@ -1,5 +1,4 @@ #include -#include #include #include "cstool.h" @@ -30,13 +29,13 @@ void print_insn_detail_tricore(csh handle, cs_insn *ins) cs_reg_name(handle, op->reg)); break; case TRICORE_OP_IMM: - printf("\t\toperands[%u].type: IMM = 0x%x\n", i, - op->imm); + printf("\t\toperands[%u].type: IMM = 0x%" PRIx64 "\n", + i, op->imm); break; case TRICORE_OP_MEM: printf("\t\toperands[%u].type: MEM\n" "\t\t\t.mem.base: REG = %s\n" - "\t\t\t.mem.disp: 0x%x\n", + "\t\t\t.mem.disp: 0x%" PRIx64 "\n", i, cs_reg_name(handle, op->mem.base), op->mem.disp); break; diff --git a/suite/MC/TriCore/tc110.s.cs b/suite/MC/TriCore/tc110.s.cs index 67ed452d745..3a0d20dbbae 100644 --- a/suite/MC/TriCore/tc110.s.cs +++ b/suite/MC/TriCore/tc110.s.cs @@ -293,7 +293,7 @@ 0xc5, 0x00, 0x00, 0x00 = lea a0, #0 0xd9, 0x00, 0x00, 0x00 = lea a0, [a0]#0 0x49, 0x00, 0x00, 0x0a = lea a0, [a0]#0 -0xfc, 0x00 = loop a0, #-0x20 +0xfc, 0x00 = loop a0, #0xffffffe0 0xfd, 0x00, 0x00, 0x00 = loop a0, #0 0x7a, 0x00 = lt d15, d0, d0 0xfa, 0x00 = lt d15, d0, #0 diff --git a/suite/MC/TriCore/tc120.s.cs b/suite/MC/TriCore/tc120.s.cs index f750aad2476..f121f747534 100644 --- a/suite/MC/TriCore/tc120.s.cs +++ b/suite/MC/TriCore/tc120.s.cs @@ -291,7 +291,7 @@ 0xc5, 0x00, 0x00, 0x00 = lea a0, #0 0xd9, 0x00, 0x00, 0x00 = lea a0, [a0]#0 0x49, 0x00, 0x00, 0x0a = lea a0, [a0]#0 -0xfc, 0x00 = loop a0, #-0x20 +0xfc, 0x00 = loop a0, #0xffffffe0 0xfd, 0x00, 0x00, 0x00 = loop a0, #0 0xfd, 0x00, 0x00, 0x80 = loopu #0 0x7a, 0x00 = lt d15, d0, d0 diff --git a/suite/MC/TriCore/tc130.s.cs b/suite/MC/TriCore/tc130.s.cs index 936c3e2b4b3..adace40f2fb 100644 --- a/suite/MC/TriCore/tc130.s.cs +++ b/suite/MC/TriCore/tc130.s.cs @@ -303,7 +303,7 @@ 0xc5, 0x00, 0x00, 0x00 = lea a0, #0 0xd9, 0x00, 0x00, 0x00 = lea a0, [a0]#0 0x49, 0x00, 0x00, 0x0a = lea a0, [a0]#0 -0xfc, 0x00 = loop a0, #-0x20 +0xfc, 0x00 = loop a0, #0xffffffe0 0xfd, 0x00, 0x00, 0x00 = loop a0, #0 0xfd, 0x00, 0x00, 0x80 = loopu #0 0x7a, 0x00 = lt d15, d0, d0 diff --git a/suite/MC/TriCore/tc131.s.cs b/suite/MC/TriCore/tc131.s.cs index 7ec6369dece..b8454e771a8 100644 --- a/suite/MC/TriCore/tc131.s.cs +++ b/suite/MC/TriCore/tc131.s.cs @@ -312,7 +312,7 @@ 0xc5, 0x00, 0x00, 0x00 = lea a0, #0 0xd9, 0x00, 0x00, 0x00 = lea a0, [a0]#0 0x49, 0x00, 0x00, 0x0a = lea a0, [a0]#0 -0xfc, 0x00 = loop a0, #-0x20 +0xfc, 0x00 = loop a0, #0xffffffe0 0xfd, 0x00, 0x00, 0x00 = loop a0, #0 0xfd, 0x00, 0x00, 0x80 = loopu #0 0x7a, 0x00 = lt d15, d0, d0 diff --git a/suite/MC/TriCore/tc160.s.cs b/suite/MC/TriCore/tc160.s.cs index 14fe1ccfea4..fb3eee902cb 100644 --- a/suite/MC/TriCore/tc160.s.cs +++ b/suite/MC/TriCore/tc160.s.cs @@ -331,7 +331,7 @@ 0xc5, 0x00, 0x00, 0x00 = lea a0, #0 0xd9, 0x00, 0x00, 0x00 = lea a0, [a0]#0 0x49, 0x00, 0x00, 0x0a = lea a0, [a0]#0 -0xfc, 0x00 = loop a0, #-0x20 +0xfc, 0x00 = loop a0, #0xffffffe0 0xfd, 0x00, 0x00, 0x00 = loop a0, #0 0xfd, 0x00, 0x00, 0x80 = loopu #0 0x7a, 0x00 = lt d15, d0, d0 diff --git a/suite/MC/TriCore/tc161.s.cs b/suite/MC/TriCore/tc161.s.cs index b75a0d8abf9..30574e7ac0b 100644 --- a/suite/MC/TriCore/tc161.s.cs +++ b/suite/MC/TriCore/tc161.s.cs @@ -337,7 +337,7 @@ 0xc5, 0x00, 0x00, 0x00 = lea a0, #0 0xd9, 0x00, 0x00, 0x00 = lea a0, [a0]#0 0x49, 0x00, 0x00, 0x0a = lea a0, [a0]#0 -0xfc, 0x00 = loop a0, #-0x20 +0xfc, 0x00 = loop a0, #0xffffffe0 0xfd, 0x00, 0x00, 0x00 = loop a0, #0 0xfd, 0x00, 0x00, 0x80 = loopu #0 0x7a, 0x00 = lt d15, d0, d0 diff --git a/suite/MC/TriCore/tc162.s.cs b/suite/MC/TriCore/tc162.s.cs index 823227d625e..baed4ba3356 100644 --- a/suite/MC/TriCore/tc162.s.cs +++ b/suite/MC/TriCore/tc162.s.cs @@ -343,7 +343,7 @@ 0xd9, 0x00, 0x00, 0x00 = lea a0, [a0]#0 0x49, 0x00, 0x00, 0x0a = lea a0, [a0]#0 0xc5, 0x00, 0x00, 0x04 = lha a0, #0 -0xfc, 0x00 = loop a0, #-0x20 +0xfc, 0x00 = loop a0, #0xffffffe0 0xfd, 0x00, 0x00, 0x00 = loop a0, #0 0xfd, 0x00, 0x00, 0x80 = loopu #0 0x7a, 0x00 = lt d15, d0, d0 diff --git a/tests/test_tricore.c b/tests/test_tricore.c index c423d72d250..38e71ba6e81 100644 --- a/tests/test_tricore.c +++ b/tests/test_tricore.c @@ -51,8 +51,8 @@ static void print_insn_detail(cs_insn *ins) cs_reg_name(handle, op->reg)); break; case TRICORE_OP_IMM: - printf("\t\toperands[%u].type: IMM = 0x%x\n", i, - op->imm); + printf("\t\toperands[%u].type: IMM = 0x%" PRIx64 "\n", + i, op->imm); break; case TRICORE_OP_MEM: printf("\t\toperands[%u].type: MEM\n", i); @@ -60,8 +60,9 @@ static void print_insn_detail(cs_insn *ins) printf("\t\t\toperands[%u].mem.base: REG = %s\n", i, cs_reg_name(handle, op->mem.base)); if (op->mem.disp != 0) - printf("\t\t\toperands[%u].mem.disp: 0x%x\n", i, - op->mem.disp); + printf("\t\t\toperands[%u].mem.disp: 0x%" PRIx64 + "\n", + i, op->mem.disp); break; }