diff --git a/arch/Xtensa/XtensaMapping.c b/arch/Xtensa/XtensaMapping.c index 460ff50682..2eba17ea1b 100644 --- a/arch/Xtensa/XtensaMapping.c +++ b/arch/Xtensa/XtensaMapping.c @@ -91,7 +91,7 @@ static void set_instr_map_data(MCInst *MI) cs_xtensa_op *prev = (operand - 1); if (prev->type == CS_OP_MEM_REG && prev->access == op->access) { - prev->type = Xtensa_OP_MEM; + prev->type = XTENSA_OP_MEM; prev->mem.disp = mc->ImmVal; continue; } @@ -169,7 +169,7 @@ void Xtensa_reg_access(const cs_insn *insn, cs_regs regs_read, for (i = 0; i < detail->op_count; i++) { cs_xtensa_op *op = &(detail->operands[i]); switch (op->type) { - case Xtensa_OP_REG: + case XTENSA_OP_REG: if ((op->access & CS_AC_READ) && !arr_exist(regs_read, read_count, op->reg)) { regs_read[read_count] = (uint16_t)op->reg; @@ -181,7 +181,7 @@ void Xtensa_reg_access(const cs_insn *insn, cs_regs regs_read, write_count++; } break; - case Xtensa_OP_MEM: + case XTENSA_OP_MEM: // registers appeared in memory references always being read if ((op->mem.base != XTENSA_REG_INVALID) && !arr_exist(regs_read, read_count, op->mem.base)) { diff --git a/bindings/python/capstone/xtensa_const.py b/bindings/python/capstone/xtensa_const.py index d841f933ad..5fc51bb48a 100644 --- a/bindings/python/capstone/xtensa_const.py +++ b/bindings/python/capstone/xtensa_const.py @@ -106,10 +106,10 @@ XTENSA_GRP_JUMP = 2 XTENSA_GRP_RET = 3 XTENSA_FEATURE_HASDENSITY = 128 -Xtensa_GRP_ENDING = 129 -Xtensa_OP_INVALID = CS_OP_INVALID -Xtensa_OP_REG = CS_OP_REG -Xtensa_OP_IMM = CS_OP_IMM -Xtensa_OP_MEM = CS_OP_MEM -Xtensa_OP_MEM_REG = CS_OP_MEM_REG -Xtensa_OP_MEM_IMM = CS_OP_MEM_IMM +XTENSA_GRP_ENDING = 129 +XTENSA_OP_INVALID = CS_OP_INVALID +XTENSA_OP_REG = CS_OP_REG +XTENSA_OP_IMM = CS_OP_IMM +XTENSA_OP_MEM = CS_OP_MEM +XTENSA_OP_MEM_REG = CS_OP_MEM_REG +XTENSA_OP_MEM_IMM = CS_OP_MEM_IMM diff --git a/include/capstone/xtensa.h b/include/capstone/xtensa.h index 0a6a0f925f..6312e45fd9 100644 --- a/include/capstone/xtensa.h +++ b/include/capstone/xtensa.h @@ -139,16 +139,16 @@ XTENSA_FEATURE_HASDENSITY = 128, // clang-format on // generated content end - Xtensa_GRP_ENDING, ///< mark the end of the list of features + XTENSA_GRP_ENDING, ///< mark the end of the list of features } xtensa_feature; typedef enum cs_xtensa_op_type { - Xtensa_OP_INVALID = CS_OP_INVALID, ///< = (Uninitialized). - Xtensa_OP_REG = CS_OP_REG, ///< = (Register operand). - Xtensa_OP_IMM = CS_OP_IMM, ///< = (Immediate operand). - Xtensa_OP_MEM = CS_OP_MEM, ///< = (Memory operand). - Xtensa_OP_MEM_REG = CS_OP_MEM_REG, ///< = (Memory Register operand). - Xtensa_OP_MEM_IMM = CS_OP_MEM_IMM, ///< = (Memory Immediate operand). + XTENSA_OP_INVALID = CS_OP_INVALID, ///< = (Uninitialized). + XTENSA_OP_REG = CS_OP_REG, ///< = (Register operand). + XTENSA_OP_IMM = CS_OP_IMM, ///< = (Immediate operand). + XTENSA_OP_MEM = CS_OP_MEM, ///< = (Memory operand). + XTENSA_OP_MEM_REG = CS_OP_MEM_REG, ///< = (Memory Register operand). + XTENSA_OP_MEM_IMM = CS_OP_MEM_IMM, ///< = (Memory Immediate operand). } cs_xtensa_op_type; typedef struct cs_xtensa_op_mem {