Buffer write valid "haX_bwvalid" only driven twice?

[atmughrabi]

hello,

The PSLSE generates the data to read (write buffer) with a valid signal haX_bwvalid and I noticed for each cache line we assume the worst-case scenario which are two valid signals for 128Bytes request. I was wondering shouldn't we make this haX_bwvalid signal be random (1,2,3...etc) this makes the simulation more complete for the PSLSE. as it states in the document these valid signals could be multiple (1,2,3...etc) and driven back to back.

I know CAPI 1.0 might seem outdated but since this is the only version that supports caches, it is important for us to use.

Thanks again!