From 173e7a9aa0fba72785390d69fa3e9de4ca44d429 Mon Sep 17 00:00:00 2001 From: Seth Maurice-Brant Date: Tue, 5 Dec 2023 14:51:00 +0000 Subject: [PATCH] Clocks and Buses --- .../Assembly/TheStoredProgramConcept.md | 28 +++++++++++++++++++ 1 file changed, 28 insertions(+) diff --git a/content/sixth/CompSci/Theory/Assembly/TheStoredProgramConcept.md b/content/sixth/CompSci/Theory/Assembly/TheStoredProgramConcept.md index 2e1fdeb04b..8067bbf6ed 100644 --- a/content/sixth/CompSci/Theory/Assembly/TheStoredProgramConcept.md +++ b/content/sixth/CompSci/Theory/Assembly/TheStoredProgramConcept.md @@ -26,3 +26,31 @@ tags: - The CPU decodes the instruction (works out what it is supposed to do and gathers any required data) - The CPU then executes the instruction on the data (performs that operation) + + +### Buses + +- The buses provide a pathway for instructions and data to be moved between the CPU and RAM + +#### Control bus + +- Are we trying to read from or write to RAM + +#### Address bus + +- This carries the address in the RAM that is to be read from or written to + +##### Data bus + +- The piece of data that is read from or is to be written from the RAM + +### Clock + +- The metronome that synchronises all the operations in the processor +- When we talk about "clock speed" this is what we mean + +- Operations in the processor start on the tick of the click and must be finished before the next tick happens +- This is one of the biggest barriers to faster processors +- Clock speeds are so high (4GHz+) that the electrical signals that pass between components don't have time to propagate from one side of the processor to the other + +