Skip to content

Commit

Permalink
arm/riscv: remove redundant judgment
Browse files Browse the repository at this point in the history
Signed-off-by: hujun5 <[email protected]>
  • Loading branch information
hujun260 committed Oct 15, 2024
1 parent 5a38c8b commit 473bf4e
Show file tree
Hide file tree
Showing 4 changed files with 20 additions and 42 deletions.
17 changes: 5 additions & 12 deletions arch/arm/src/armv6-m/arm_svcall.c
Original file line number Diff line number Diff line change
Expand Up @@ -446,13 +446,11 @@ int arm_svcall(int irq, void *context, void *arg)
* switch.
*/

#ifdef CONFIG_DEBUG_SYSCALL_INFO
# ifndef CONFIG_DEBUG_SVCALL
if (cmd > SYS_switch_context)
# else
if (regs != tcb->xcp.regs)
# endif
{
restore_critical_section(tcb, this_cpu());

#ifdef CONFIG_DEBUG_SYSCALL_INFO
regs = (uint32_t *)tcb->xcp.regs;

svcinfo("SVCall Return:\n");
Expand All @@ -464,19 +462,14 @@ int arm_svcall(int irq, void *context, void *arg)
regs[REG_R12], regs[REG_R13], regs[REG_R14], regs[REG_R15]);
svcinfo(" PSR: %08x EXC_RETURN: %08x CONTROL: %08x\n",
regs[REG_XPSR], regs[REG_EXC_RETURN], regs[REG_CONTROL]);
#endif
}
# ifdef CONFIG_DEBUG_SVCALL
#ifdef CONFIG_DEBUG_SYSCALL_INFO
else
{
svcinfo("SVCall Return: %d\n", regs[REG_R0]);
}
# endif
#endif

if (regs != tcb->xcp.regs)
{
restore_critical_section(this_task(), this_cpu());
}

return OK;
}
17 changes: 5 additions & 12 deletions arch/arm/src/armv7-m/arm_svcall.c
Original file line number Diff line number Diff line change
Expand Up @@ -456,13 +456,11 @@ int arm_svcall(int irq, void *context, void *arg)
* switch.
*/

#ifdef CONFIG_DEBUG_SYSCALL_INFO
# ifndef CONFIG_DEBUG_SVCALL
if (cmd > SYS_switch_context)
# else
if (regs != tcb->xcp.regs)
# endif
{
restore_critical_section(tcb, this_cpu());

#ifdef CONFIG_DEBUG_SYSCALL_INFO
regs = (uint32_t *)tcb->xcp.regs;

svcinfo("SVCall Return:\n");
Expand All @@ -474,19 +472,14 @@ int arm_svcall(int irq, void *context, void *arg)
regs[REG_R12], regs[REG_R13], regs[REG_R14], regs[REG_R15]);
svcinfo(" PSR: %08x EXC_RETURN: %08x CONTROL: %08x\n",
regs[REG_XPSR], regs[REG_EXC_RETURN], regs[REG_CONTROL]);
#endif
}
# ifdef CONFIG_DEBUG_SVCALL
#ifdef CONFIG_DEBUG_SYSCALL_INFO
else
{
svcinfo("SVCall Return: %d\n", regs[REG_R0]);
}
# endif
#endif

if (regs != tcb->xcp.regs)
{
restore_critical_section(this_task(), this_cpu());
}

return OK;
}
17 changes: 5 additions & 12 deletions arch/arm/src/armv8-m/arm_svcall.c
Original file line number Diff line number Diff line change
Expand Up @@ -456,13 +456,11 @@ int arm_svcall(int irq, void *context, void *arg)
* switch.
*/

#ifdef CONFIG_DEBUG_SYSCALL_INFO
# ifndef CONFIG_DEBUG_SVCALL
if (cmd > SYS_switch_context)
# else
if (regs != tcb->xcp.regs)
# endif
{
restore_critical_section(tcb, this_cpu());

#ifdef CONFIG_DEBUG_SYSCALL_INFO
regs = (uint32_t *)tcb->xcp.regs;

svcinfo("SVCall Return:\n");
Expand All @@ -474,19 +472,14 @@ int arm_svcall(int irq, void *context, void *arg)
regs[REG_R12], regs[REG_R13], regs[REG_R14], regs[REG_R15]);
svcinfo(" PSR: %08x EXC_RETURN: %08x CONTROL: %08x\n",
regs[REG_XPSR], regs[REG_EXC_RETURN], regs[REG_CONTROL]);
#endif
}
# ifdef CONFIG_DEBUG_SVCALL
#ifdef CONFIG_DEBUG_SYSCALL_INFO
else
{
svcinfo("SVCall Return: %d\n", regs[REG_R0]);
}
# endif
#endif

if (regs != tcb->xcp.regs)
{
restore_critical_section(this_task(), this_cpu());
}

return OK;
}
11 changes: 5 additions & 6 deletions arch/risc-v/src/common/riscv_swint.c
Original file line number Diff line number Diff line change
Expand Up @@ -342,21 +342,20 @@ int riscv_swint(int irq, void *context, void *arg)
* switch
*/

#ifdef CONFIG_DEBUG_SYSCALL_INFO
if (regs != new_regs)
{
restore_critical_section(this_task(), this_cpu());

#ifdef CONFIG_DEBUG_SYSCALL_INFO
svcinfo("SWInt Return: Context switch!\n");
up_dump_register(new_regs);
#endif
}
else
{
#ifdef CONFIG_DEBUG_SYSCALL_INFO
svcinfo("SWInt Return: %" PRIxPTR "\n", regs[REG_A0]);
}
#endif

if (regs != new_regs)
{
restore_critical_section(this_task(), this_cpu());
}

return OK;
Expand Down

0 comments on commit 473bf4e

Please sign in to comment.