From 2b7a6d1be631d247519d085c01ab2520b6670f49 Mon Sep 17 00:00:00 2001 From: hujun5 Date: Tue, 10 Oct 2023 09:50:35 +0800 Subject: [PATCH] refine: move BIT Macro to nuttx/bits.h The BIT macro is widely used in NuttX, and to achieve a unified strategy, we have placed the implementation of the BIT macro in bits.h to simplify code implementation. Signed-off-by: hujun5 --- arch/arm/src/phy62xx/types.h | 5 +--- .../arm/src/tlsr82/hardware/tlsr82_register.h | 5 ++-- arch/arm64/src/common/arm64_arch.h | 2 +- .../risc-v/src/esp32c3/hardware/esp32c3_soc.h | 3 +- arch/xtensa/src/esp32/hardware/esp32_soc.h | 3 +- .../xtensa/src/esp32s2/hardware/esp32s2_soc.h | 3 +- .../xtensa/src/esp32s3/hardware/esp32s3_soc.h | 3 +- drivers/clk/clk.h | 2 +- drivers/lcd/max7219.c | 10 ++----- drivers/lcd/memlcd.c | 12 ++------ drivers/sensors/mpu60x0.c | 5 +--- drivers/serial/serial_pl011.c | 2 +- drivers/video/max7456.c | 5 +--- include/nuttx/bits.h | 29 ++++++++++--------- include/nuttx/sensors/mpu9250.h | 5 +--- 15 files changed, 34 insertions(+), 60 deletions(-) diff --git a/arch/arm/src/phy62xx/types.h b/arch/arm/src/phy62xx/types.h index 1061ca55bd1b8..ef3b4aa59911a 100644 --- a/arch/arm/src/phy62xx/types.h +++ b/arch/arm/src/phy62xx/types.h @@ -29,6 +29,7 @@ #include #include +#include typedef signed char int8; /* !< Signed 8 bit integer */ typedef unsigned char uint8; /* !< Unsigned 8 bit integer */ @@ -39,15 +40,11 @@ typedef unsigned short uint16; /* !< Unsigned 16 bit integer */ typedef signed long int32; /* !< Signed 32 bit integer */ typedef unsigned long uint32; /* !< Unsigned 32 bit integer */ -typedef uint8 halDataAlign_t; /* !< Used for byte alignment */ - #define ALIGN4_U8 __align(4) uint8 #define ALIGN4_U16 __align(4) uint16 #define ALIGN4_INT8 __align(4) int8 #define ALIGN4_INT16 __align(4) int16 -#define BIT(n) (1ul << (n)) - #define write_reg(addr,data) (*(volatile unsigned int *)(addr) = (unsigned int)(data)) #define read_reg(addr) (*(volatile unsigned int *)(addr)) diff --git a/arch/arm/src/tlsr82/hardware/tlsr82_register.h b/arch/arm/src/tlsr82/hardware/tlsr82_register.h index 82c311ec3c7c0..e989a79c0c449 100644 --- a/arch/arm/src/tlsr82/hardware/tlsr82_register.h +++ b/arch/arm/src/tlsr82/hardware/tlsr82_register.h @@ -28,6 +28,7 @@ #include #include "arm_internal.h" +#include /**************************************************************************** * Pre-processor Definitions @@ -47,9 +48,7 @@ /* Common macros definition */ -#define BIT(n) (1 << (n)) -#define BIT_MASK_LEN(len) (BIT(len)-1) -#define BIT_RNG(s, e) (BIT_MASK_LEN((e) - (s) + 1) << (s)) +#define BIT_RNG(s, e) (GENMASK(e, s)) #define BM_SET(x, m) ((x) |= (m)) #define BM_CLR(x, m) ((x) &= ~(m)) #define BM_IS_SET(x, m) ((x) & (m)) diff --git a/arch/arm64/src/common/arm64_arch.h b/arch/arm64/src/common/arm64_arch.h index 9f357beac25b8..789ebebff0c1c 100644 --- a/arch/arm64/src/common/arm64_arch.h +++ b/arch/arm64/src/common/arm64_arch.h @@ -35,6 +35,7 @@ #endif #include +#include #include "barriers.h" @@ -42,7 +43,6 @@ * Pre-processor Definitions ****************************************************************************/ -#define BIT(n) ((1UL) << (n)) #define BIT64(n) ((1ULL) << (n)) /* Bit mask with bits 0 through n-1 (inclusive) set, diff --git a/arch/risc-v/src/esp32c3/hardware/esp32c3_soc.h b/arch/risc-v/src/esp32c3/hardware/esp32c3_soc.h index a3c42315116e2..ead5c1f7c5a9d 100644 --- a/arch/risc-v/src/esp32c3/hardware/esp32c3_soc.h +++ b/arch/risc-v/src/esp32c3/hardware/esp32c3_soc.h @@ -24,6 +24,7 @@ #include #include +#include #include "esp32c3_attr.h" @@ -254,8 +255,6 @@ #define SOC_INTERRUPT_LEVEL_MEDIUM 4 -#define BIT(nr) (1UL << (nr)) - /* Extract the field from the register and shift it to avoid wrong reading */ #define REG_MASK(_reg, _field) (((_reg) & (_field##_M)) >> (_field##_S)) diff --git a/arch/xtensa/src/esp32/hardware/esp32_soc.h b/arch/xtensa/src/esp32/hardware/esp32_soc.h index a762c04656930..ff4f9da8a08c3 100644 --- a/arch/xtensa/src/esp32/hardware/esp32_soc.h +++ b/arch/xtensa/src/esp32/hardware/esp32_soc.h @@ -29,6 +29,7 @@ #include #include "xtensa_attr.h" +#include /**************************************************************************** * Pre-processor Definitions @@ -77,8 +78,6 @@ #define ETS_UNCACHED_ADDR(addr) (addr) #define ETS_CACHED_ADDR(addr) (addr) -#define BIT(nr) (1UL << (nr)) - /* Write value to register */ #define REG_WRITE(_r, _v) (*(volatile uint32_t *)(_r)) = (_v) diff --git a/arch/xtensa/src/esp32s2/hardware/esp32s2_soc.h b/arch/xtensa/src/esp32s2/hardware/esp32s2_soc.h index 24b1895e28a64..c68b45f7413dc 100644 --- a/arch/xtensa/src/esp32s2/hardware/esp32s2_soc.h +++ b/arch/xtensa/src/esp32s2/hardware/esp32s2_soc.h @@ -30,6 +30,7 @@ #include "xtensa.h" #include "xtensa_attr.h" +#include /**************************************************************************** * Pre-processor Definitions @@ -79,8 +80,6 @@ #define ETS_UNCACHED_ADDR(addr) (addr) #define ETS_CACHED_ADDR(addr) (addr) -#define BIT(nr) (1UL << (nr)) - /* Write value to register */ #define REG_WRITE(_r, _v) (*(volatile uint32_t *)(_r)) = (_v) diff --git a/arch/xtensa/src/esp32s3/hardware/esp32s3_soc.h b/arch/xtensa/src/esp32s3/hardware/esp32s3_soc.h index 160cd27b88d9c..57dd0ce9fae3d 100644 --- a/arch/xtensa/src/esp32s3/hardware/esp32s3_soc.h +++ b/arch/xtensa/src/esp32s3/hardware/esp32s3_soc.h @@ -31,6 +31,7 @@ #endif #include "xtensa_attr.h" +#include /**************************************************************************** * Pre-processor Definitions @@ -185,8 +186,6 @@ #define ETS_UNCACHED_ADDR(addr) (addr) #define ETS_CACHED_ADDR(addr) (addr) -#define BIT(nr) (1UL << (nr)) - #ifndef __ASSEMBLY__ /* Write value to register */ diff --git a/drivers/clk/clk.h b/drivers/clk/clk.h index d005021f6becd..b890a6c6c58d1 100644 --- a/drivers/clk/clk.h +++ b/drivers/clk/clk.h @@ -30,6 +30,7 @@ #include #include #include +#include #ifdef CONFIG_CLK @@ -37,7 +38,6 @@ * Pre-processor Definitions ****************************************************************************/ -#define BIT(nr) (1ULL << (nr)) #define MASK(width) (BIT(width) - 1) #define MULT_ROUND_UP(r, m) ((r) * (m) + (m) - 1) #define DIV_ROUND_UP(n,d) (((n) + (d) - 1) / (d)) diff --git a/drivers/lcd/max7219.c b/drivers/lcd/max7219.c index 88be218644120..3cc8e6f16b782 100644 --- a/drivers/lcd/max7219.c +++ b/drivers/lcd/max7219.c @@ -35,6 +35,7 @@ #include #include +#include #include #include #include @@ -119,11 +120,6 @@ #define LS_BIT (1 << 0) #define MS_BIT (1 << 7) -#define BIT(nr) (1 << (nr)) -#define BITS_PER_BYTE 8 -#define BIT_MASK(nr) (1 << ((nr) % BITS_PER_BYTE)) -#define BIT_BYTE(nr) ((nr) / BITS_PER_BYTE) - /**************************************************************************** * Private Type Definition ****************************************************************************/ @@ -289,14 +285,14 @@ static struct max7219_dev_s g_max7219dev = static inline void __set_bit(int nr, uint8_t * addr) { - uint8_t mask = BIT_MASK(nr); + uint8_t mask = BIT_BYTE_MASK(nr); uint8_t *p = ((uint8_t *) addr) + BIT_BYTE(nr); *p |= mask; } static inline void __clear_bit(int nr, uint8_t * addr) { - uint8_t mask = BIT_MASK(nr); + uint8_t mask = BIT_BYTE_MASK(nr); uint8_t *p = ((uint8_t *) addr) + BIT_BYTE(nr); *p &= ~mask; } diff --git a/drivers/lcd/memlcd.c b/drivers/lcd/memlcd.c index e14f683e8155a..dd89227007fa6 100644 --- a/drivers/lcd/memlcd.c +++ b/drivers/lcd/memlcd.c @@ -33,8 +33,7 @@ #include #include -#include -#include +#include #include #include #include @@ -245,21 +244,16 @@ static struct memlcd_dev_s g_memlcddev = * ****************************************************************************/ -#define BIT(nr) (1 << (nr)) -#define BITS_PER_BYTE 8 -#define BIT_MASK(nr) (1 << ((nr) % BITS_PER_BYTE)) -#define BIT_BYTE(nr) ((nr) / BITS_PER_BYTE) - static inline void __set_bit(int nr, uint8_t * addr) { - uint8_t mask = BIT_MASK(nr); + uint8_t mask = BIT_BYTE_MASK(nr); uint8_t *p = ((uint8_t *) addr) + BIT_BYTE(nr); *p |= mask; } static inline void __clear_bit(int nr, uint8_t * addr) { - uint8_t mask = BIT_MASK(nr); + uint8_t mask = BIT_BYTE_MASK(nr); uint8_t *p = ((uint8_t *) addr) + BIT_BYTE(nr); *p &= ~mask; } diff --git a/drivers/sensors/mpu60x0.c b/drivers/sensors/mpu60x0.c index e7a10f1e21fde..7bc7b65a4bf01 100644 --- a/drivers/sensors/mpu60x0.c +++ b/drivers/sensors/mpu60x0.c @@ -32,6 +32,7 @@ #include #include #include +#include #include #include @@ -50,10 +51,6 @@ * Pre-processor Definitions ****************************************************************************/ -/* Sets bit @n */ - -#define BIT(n) (1 << (n)) - /* Creates a mask of @m bits, i.e. MASK(2) -> 00000011 */ #define MASK(m) (BIT(m) - 1) diff --git a/drivers/serial/serial_pl011.c b/drivers/serial/serial_pl011.c index 600ac0bc4fa58..d77fbc8a32ae8 100644 --- a/drivers/serial/serial_pl011.c +++ b/drivers/serial/serial_pl011.c @@ -38,6 +38,7 @@ #include #include +#include #include #include #include @@ -65,7 +66,6 @@ #endif #define PL011_BIT_MASK(x, y) (((2 << (x)) - 1) << (y)) -#define BIT(n) ((1UL) << (n)) /* PL011 Uart Flags Register */ #define PL011_FR_CTS BIT(0) /* clear to send - inverted */ diff --git a/drivers/video/max7456.c b/drivers/video/max7456.c index 96d1deb18294f..2683911258f76 100644 --- a/drivers/video/max7456.c +++ b/drivers/video/max7456.c @@ -74,6 +74,7 @@ #include #include +#include #include #include #include @@ -88,10 +89,6 @@ #define DEBUG 1 -/* Sets bit @n */ - -#define BIT(n) (1 << (n)) - /* Creates a mask of @m bits, i.e. MASK(2) -> 00000011 */ #define MASK(m) (BIT((m) + 1) - 1) diff --git a/include/nuttx/bits.h b/include/nuttx/bits.h index 470a622ee664d..138765eda3d9c 100644 --- a/include/nuttx/bits.h +++ b/include/nuttx/bits.h @@ -26,31 +26,32 @@ ****************************************************************************/ #include -#include -#include +#include /**************************************************************************** * Pre-processor Definitions ****************************************************************************/ #ifndef BITS_PER_BYTE -# define BITS_PER_BYTE 8 +# define BITS_PER_BYTE CHAR_BIT #endif -#if UINTPTR_MAX > UINT32_MAX -# define BITS_PER_LONG 64 -#else -# define BITS_PER_LONG 32 +#ifndef BITS_PER_LONG +# define BITS_PER_LONG (sizeof(unsigned long) * BITS_PER_BYTE) #endif #ifndef BITS_PER_LONG_LONG -# define BITS_PER_LONG_LONG 64 +# define BITS_PER_LONG_LONG (sizeof(unsigned long long) * BITS_PER_BYTE) #endif -#define BIT_MASK(nr) (UINT32_C(1) << ((nr) % BITS_PER_LONG)) +#define BIT_BYTE_MASK(nr) (1ul << ((nr) % BITS_PER_BYTE)) +#define BIT_WORD_MASK(nr) (1ul << ((nr) % BITS_PER_LONG)) +#define BIT_BYTE(nr) ((nr) / BITS_PER_BYTE) #define BIT_WORD(nr) ((nr) / BITS_PER_LONG) -#define BIT_ULL_MASK(nr) (UINT64_C(1) << ((nr) % BITS_PER_LONG_LONG)) +#define BIT_ULL_MASK(nr) (1ull << ((nr) % BITS_PER_LONG_LONG)) #define BIT_ULL_WORD(nr) ((nr) / BITS_PER_LONG_LONG) +#define BIT(nr) (1ul << (nr)) +#define BIT_ULL(nr) (1ull << (nr)) /* Create a contiguous bitmask starting at bit position @l and ending at * position @h. For example @@ -58,14 +59,14 @@ */ #define __GENMASK(h, l) \ - (((~UINT32_C(0)) - (UINT32_C(1) << (l)) + 1) & \ - (~UINT32_C(0) >> (BITS_PER_LONG - 1 - (h)))) + (((~0ul) - (1ul << (l)) + 1) & \ + (~0ul >> (BITS_PER_LONG - 1 - (h)))) #define GENMASK(h, l) \ (BUILD_BUG_ON_ZERO((l) > (h)) + __GENMASK(h, l)) #define __GENMASK_ULL(h, l) \ - (((~UINT64_C(0)) - (UINT64_C(1) << (l)) + 1) & \ - (~UINT64_C(0) >> (BITS_PER_LONG_LONG - 1 - (h)))) + (((~0ull) - (1ull << (l)) + 1) & \ + (~0ull >> (BITS_PER_LONG_LONG - 1 - (h)))) #define GENMASK_ULL(h, l) \ (BUILD_BUG_ON_ZERO((l) > (h)) + __GENMASK_ULL(h, l)) diff --git a/include/nuttx/sensors/mpu9250.h b/include/nuttx/sensors/mpu9250.h index 3c04e3b0ee565..1cb8523e6ba5c 100644 --- a/include/nuttx/sensors/mpu9250.h +++ b/include/nuttx/sensors/mpu9250.h @@ -28,15 +28,12 @@ #include #include #include +#include /**************************************************************************** * Pre-processor Definitions ****************************************************************************/ -/* Sets bit @n */ - -#define BIT(n) (1 << (n)) - /* Creates a mask of @m bits, i.e. MASK(2) -> 00000011 */ #define MASK(m) (BIT(m) - 1)